├── .gitignore ├── CMSIS ├── asm │ └── startup_stm32f40_41xxx.s ├── inc │ ├── arm_common_tables.h │ ├── arm_const_structs.h │ ├── arm_math.h │ ├── core_cm4.h │ ├── core_cmFunc.h │ ├── core_cmInstr.h │ ├── core_cmSimd.h │ ├── stm32f4xx.h │ └── system_stm32f4xx.h └── src │ └── system_stm32f4xx.c ├── DSP_CAN_IAP ├── inc │ ├── CANA.h │ └── IAP.h └── src │ ├── CANA.c │ ├── IAP - 副本 (2).c │ ├── IAP - 副本.c │ └── IAP.c ├── FatFs ├── inc │ ├── diskio.h │ ├── ff.h │ ├── ffconf.h │ ├── integer.h │ └── sdio_sd.h └── src │ ├── cc936.c │ ├── ccsbcs.c │ ├── diskio.c │ ├── ff.c │ ├── sdio_sd.c │ ├── syscall.c │ └── unicode.c ├── MDK删除.bat ├── STM32-DSP_CAN_Boot.si4project ├── STM32-DSP_CAN_Boot.bookmarks.xml ├── STM32-DSP_CAN_Boot.sip_sym ├── STM32-DSP_CAN_Boot.sip_xab ├── STM32-DSP_CAN_Boot.sip_xad ├── STM32-DSP_CAN_Boot.sip_xc ├── STM32-DSP_CAN_Boot.sip_xf ├── STM32-DSP_CAN_Boot.sip_xm ├── STM32-DSP_CAN_Boot.sip_xr ├── STM32-DSP_CAN_Boot.sip_xsb ├── STM32-DSP_CAN_Boot.sip_xsd ├── STM32-DSP_CAN_Boot.siproj ├── STM32-DSP_CAN_Boot.siproj_settings.xml ├── STM32-DSP_CAN_Boot.siwork ├── STM32-DSP_CAN_Boot.snippets.xml └── cache │ └── parse │ ├── DSP_CAN_IAP_inc_CANA.h.sisc │ ├── DSP_CAN_IAP_inc_IAP.h.sisc │ ├── DSP_CAN_IAP_src_CANA.c.sisc │ ├── DSP_CAN_IAP_src_IAP.c.sisc │ ├── FatFs_inc_diskio.h.sisc │ ├── FatFs_inc_ff.h.sisc │ ├── FatFs_inc_ffconf.h.sisc │ ├── FatFs_inc_integer.h.sisc │ ├── FatFs_inc_sdio_sd.h.sisc │ ├── FatFs_src_cc936.c.sisc │ ├── FatFs_src_ccsbcs.c.sisc │ ├── FatFs_src_diskio.c.sisc │ ├── FatFs_src_ff.c.sisc │ ├── FatFs_src_sdio_sd.c.sisc │ ├── FatFs_src_syscall.c.sisc │ ├── FatFs_src_unicode.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_misc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_adc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_can.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_cec.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_crc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_cryp.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dac.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dbgmcu.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dcmi.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dfsdm.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dma.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dma2d.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_dsi.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_exti.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_flash.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_flash_ramfunc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_fmc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_fmpi2c.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_fsmc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_gpio.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_hash.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_i2c.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_iwdg.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_lptim.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_ltdc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_pwr.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_qspi.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_rcc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_rng.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_rtc.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_sai.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_sdio.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_spdifrx.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_spi.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_syscfg.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_tim.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_usart.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_inc_stm32f4xx_wwdg.h.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_misc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_adc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_can.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_cec.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_crc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_cryp.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_cryp_aes.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_cryp_des.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_cryp_tdes.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dac.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dbgmcu.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dcmi.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dfsdm.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dma.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dma2d.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_dsi.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_exti.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_flash.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_flash_ramfunc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_fmc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_fmpi2c.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_fsmc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_gpio.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_hash.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_hash_md5.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_hash_sha1.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_i2c.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_iwdg.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_lptim.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_ltdc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_pwr.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_qspi.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_rcc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_rng.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_rtc.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_sai.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_sdio.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_spdifrx.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_spi.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_syscfg.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_tim.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_usart.c.sisc │ ├── STM32F4xx_StdPeriph_Driver_src_stm32f4xx_wwdg.c.sisc │ ├── bsp_inc_USART1.h.sisc │ ├── bsp_inc_can_app.h.sisc │ ├── bsp_inc_can_bootloader.h.sisc │ ├── bsp_inc_can_driver.h.sisc │ ├── bsp_inc_crc16.h.sisc │ ├── bsp_inc_delay.h.sisc │ ├── bsp_inc_hex_to_bin.h.sisc │ ├── bsp_src_USART1.c.sisc │ ├── bsp_src_can_app.c.sisc │ ├── bsp_src_can_bootloader.c.sisc │ ├── bsp_src_can_driver.c.sisc │ ├── bsp_src_delay.c.sisc │ ├── bsp_src_hex_to_bin.c.sisc │ ├── bsp_src_hex_to_bin_-_副本.c.sisc │ ├── user_inc_main.h.sisc │ ├── user_inc_stm32f4xx_conf.h.sisc │ ├── user_inc_stm32f4xx_it.h.sisc │ ├── user_inc_user_config.h.sisc │ ├── user_src_main.c.sisc │ ├── user_src_stm32f4xx_it.c.sisc │ └── user_src_user_config.c.sisc ├── STM32F4xx_StdPeriph_Driver ├── Release_Notes.html ├── inc │ ├── misc.h │ ├── stm32f4xx_adc.h │ ├── stm32f4xx_can.h │ ├── stm32f4xx_cec.h │ ├── stm32f4xx_crc.h │ ├── stm32f4xx_cryp.h │ ├── stm32f4xx_dac.h │ ├── stm32f4xx_dbgmcu.h │ ├── stm32f4xx_dcmi.h │ ├── stm32f4xx_dfsdm.h │ ├── stm32f4xx_dma.h │ ├── stm32f4xx_dma2d.h │ ├── stm32f4xx_dsi.h │ ├── stm32f4xx_exti.h │ ├── stm32f4xx_flash.h │ ├── stm32f4xx_flash_ramfunc.h │ ├── stm32f4xx_fmc.h │ ├── stm32f4xx_fmpi2c.h │ ├── stm32f4xx_fsmc.h │ ├── stm32f4xx_gpio.h │ ├── stm32f4xx_hash.h │ ├── stm32f4xx_i2c.h │ ├── stm32f4xx_iwdg.h │ ├── stm32f4xx_lptim.h │ ├── stm32f4xx_ltdc.h │ ├── stm32f4xx_pwr.h │ ├── stm32f4xx_qspi.h │ ├── stm32f4xx_rcc.h │ ├── stm32f4xx_rng.h │ ├── stm32f4xx_rtc.h │ ├── stm32f4xx_sai.h │ ├── stm32f4xx_sdio.h │ ├── stm32f4xx_spdifrx.h │ ├── stm32f4xx_spi.h │ ├── stm32f4xx_syscfg.h │ ├── stm32f4xx_tim.h │ ├── stm32f4xx_usart.h │ └── stm32f4xx_wwdg.h └── src │ ├── misc.c │ ├── stm32f4xx_adc.c │ ├── stm32f4xx_can.c │ ├── stm32f4xx_cec.c │ ├── stm32f4xx_crc.c │ ├── stm32f4xx_cryp.c │ ├── stm32f4xx_cryp_aes.c │ ├── stm32f4xx_cryp_des.c │ ├── stm32f4xx_cryp_tdes.c │ ├── stm32f4xx_dac.c │ ├── stm32f4xx_dbgmcu.c │ ├── stm32f4xx_dcmi.c │ ├── stm32f4xx_dfsdm.c │ ├── stm32f4xx_dma.c │ ├── stm32f4xx_dma2d.c │ ├── stm32f4xx_dsi.c │ ├── stm32f4xx_exti.c │ ├── stm32f4xx_flash.c │ ├── stm32f4xx_flash_ramfunc.c │ ├── stm32f4xx_fmc.c │ ├── stm32f4xx_fmpi2c.c │ ├── stm32f4xx_fsmc.c │ ├── stm32f4xx_gpio.c │ ├── stm32f4xx_hash.c │ ├── stm32f4xx_hash_md5.c │ ├── stm32f4xx_hash_sha1.c │ ├── stm32f4xx_i2c.c │ ├── stm32f4xx_iwdg.c │ ├── stm32f4xx_lptim.c │ ├── stm32f4xx_ltdc.c │ ├── stm32f4xx_pwr.c │ ├── stm32f4xx_qspi.c │ ├── stm32f4xx_rcc.c │ ├── stm32f4xx_rng.c │ ├── stm32f4xx_rtc.c │ ├── stm32f4xx_sai.c │ ├── stm32f4xx_sdio.c │ ├── stm32f4xx_spdifrx.c │ ├── stm32f4xx_spi.c │ ├── stm32f4xx_syscfg.c │ ├── stm32f4xx_tim.c │ ├── stm32f4xx_usart.c │ └── stm32f4xx_wwdg.c ├── bsp ├── inc │ ├── USART1.h │ ├── can_app.h │ ├── can_bootloader.h │ ├── can_driver.h │ ├── crc16.h │ ├── delay.h │ └── hex_to_bin.h └── src │ ├── USART1.c │ ├── can_app.c │ ├── can_bootloader.c │ ├── can_driver.c │ ├── delay.c │ ├── hex_to_bin - 副本.c │ └── hex_to_bin.c ├── output ├── STM32-DSP-CAN-Boot.bin ├── STM32-DSP-CAN-Boot.build_log.htm ├── STM32-DSP-CAN-Boot.hex └── STM32-DSP-CAN-Boot.htm ├── prj ├── DebugConfig │ ├── DSP_Boot_STM32F407IGTx.dbgconf │ └── Target_1_STM32F407IGTx.dbgconf ├── EventRecorderStub.scvd ├── JLinkLog.txt ├── MDK删除.bat ├── STM32-DSP-CAN-Boot.uvguix.admin ├── STM32-DSP-CAN-Boot.uvoptx └── STM32-DSP-CAN-Boot.uvprojx └── user ├── inc ├── main.h ├── stm32f4xx_conf.h ├── stm32f4xx_it.h └── user_config.h └── src ├── main.c ├── stm32f4xx_it.c └── user_config.c /.gitignore: -------------------------------------------------------------------------------- 1 | Release 2 | ipch 3 | Debug 4 | Backup -------------------------------------------------------------------------------- /CMSIS/inc/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | //extern const q31_t realCoefAQ31[1024]; 50 | //extern const q31_t realCoefBQ31[1024]; 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /CMSIS/inc/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /CMSIS/inc/stm32f4xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/CMSIS/inc/stm32f4xx.h -------------------------------------------------------------------------------- /CMSIS/inc/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 09-November-2016 7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32f4xx_system 33 | * @{ 34 | */ 35 | 36 | /** 37 | * @brief Define to prevent recursive inclusion 38 | */ 39 | #ifndef __SYSTEM_STM32F4XX_H 40 | #define __SYSTEM_STM32F4XX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** @addtogroup STM32F4xx_System_Includes 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @} 52 | */ 53 | 54 | 55 | /** @addtogroup STM32F4xx_System_Exported_types 56 | * @{ 57 | */ 58 | 59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 60 | 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /CMSIS/src/system_stm32f4xx.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/CMSIS/src/system_stm32f4xx.c -------------------------------------------------------------------------------- /DSP_CAN_IAP/inc/CANA.h: -------------------------------------------------------------------------------- 1 | #ifndef __CANA_H__ 2 | #define __CANA_H__ 3 | #include "user_config.h" 4 | #define CAN_Tx_Port GPIOH 5 | #define CAN_Tx_Pin GPIO_Pin_13 6 | #define CAN_Tx_Port_CLK RCC_AHB1Periph_GPIOH 7 | #define CAN_Rx_Port GPIOI 8 | #define CAN_Rx_Pin GPIO_Pin_9 9 | #define CAN_Rx_Port_CLK RCC_AHB1Periph_GPIOI 10 | void CANA_GPIO_Config(void); 11 | void CANA_Config(void); 12 | void CANA_RX_Config(void); 13 | void CANA_IT_Config(void); 14 | void CAN_ConfigFilter(uint8_t FilterNumber,uint16_t can_addr); 15 | uint8_t CAN_WriteData(CanTxMsg *TxMessage); 16 | #endif 17 | -------------------------------------------------------------------------------- /DSP_CAN_IAP/inc/IAP.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/DSP_CAN_IAP/inc/IAP.h -------------------------------------------------------------------------------- /DSP_CAN_IAP/src/CANA.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/DSP_CAN_IAP/src/CANA.c -------------------------------------------------------------------------------- /DSP_CAN_IAP/src/IAP - 副本 (2).c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/DSP_CAN_IAP/src/IAP - 副本 (2).c -------------------------------------------------------------------------------- /DSP_CAN_IAP/src/IAP - 副本.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/DSP_CAN_IAP/src/IAP - 副本.c -------------------------------------------------------------------------------- /DSP_CAN_IAP/src/IAP.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/DSP_CAN_IAP/src/IAP.c -------------------------------------------------------------------------------- /FatFs/inc/diskio.h: -------------------------------------------------------------------------------- 1 | /*-----------------------------------------------------------------------/ 2 | / Low level disk interface modlue include file (C)ChaN, 2014 / 3 | /-----------------------------------------------------------------------*/ 4 | 5 | #ifndef _DISKIO_DEFINED 6 | #define _DISKIO_DEFINED 7 | 8 | #ifdef __cplusplus 9 | extern "C" { 10 | #endif 11 | 12 | #include "integer.h" 13 | 14 | 15 | /* Status of Disk Functions */ 16 | typedef BYTE DSTATUS; 17 | 18 | /* Results of Disk Functions */ 19 | typedef enum { 20 | RES_OK = 0, /* 0: Successful */ 21 | RES_ERROR, /* 1: R/W Error */ 22 | RES_WRPRT, /* 2: Write Protected */ 23 | RES_NOTRDY, /* 3: Not Ready */ 24 | RES_PARERR /* 4: Invalid Parameter */ 25 | } DRESULT; 26 | 27 | 28 | /*---------------------------------------*/ 29 | /* Prototypes for disk control functions */ 30 | 31 | 32 | DSTATUS disk_initialize (BYTE pdrv); 33 | DSTATUS disk_status (BYTE pdrv); 34 | DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count); 35 | DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count); 36 | DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff); 37 | 38 | 39 | /* Disk Status Bits (DSTATUS) */ 40 | 41 | #define STA_NOINIT 0x01 /* Drive not initialized */ 42 | #define STA_NODISK 0x02 /* No medium in the drive */ 43 | #define STA_PROTECT 0x04 /* Write protected */ 44 | 45 | 46 | /* Command code for disk_ioctrl fucntion */ 47 | 48 | /* Generic command (Used by FatFs) */ 49 | #define CTRL_SYNC 0 /* Complete pending write process (needed at _FS_READONLY == 0) */ 50 | #define GET_SECTOR_COUNT 1 /* Get media size (needed at _USE_MKFS == 1) */ 51 | #define GET_SECTOR_SIZE 2 /* Get sector size (needed at _MAX_SS != _MIN_SS) */ 52 | #define GET_BLOCK_SIZE 3 /* Get erase block size (needed at _USE_MKFS == 1) */ 53 | #define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at _USE_TRIM == 1) */ 54 | 55 | /* Generic command (Not used by FatFs) */ 56 | #define CTRL_POWER 5 /* Get/Set power status */ 57 | #define CTRL_LOCK 6 /* Lock/Unlock media removal */ 58 | #define CTRL_EJECT 7 /* Eject media */ 59 | #define CTRL_FORMAT 8 /* Create physical format on the media */ 60 | 61 | /* MMC/SDC specific ioctl command */ 62 | #define MMC_GET_TYPE 10 /* Get card type */ 63 | #define MMC_GET_CSD 11 /* Get CSD */ 64 | #define MMC_GET_CID 12 /* Get CID */ 65 | #define MMC_GET_OCR 13 /* Get OCR */ 66 | #define MMC_GET_SDSTAT 14 /* Get SD status */ 67 | #define ISDIO_READ 55 /* Read data form SD iSDIO register */ 68 | #define ISDIO_WRITE 56 /* Write data to SD iSDIO register */ 69 | #define ISDIO_MRITE 57 /* Masked write data to SD iSDIO register */ 70 | 71 | /* ATA/CF specific ioctl command */ 72 | #define ATA_GET_REV 20 /* Get F/W revision */ 73 | #define ATA_GET_MODEL 21 /* Get model name */ 74 | #define ATA_GET_SN 22 /* Get serial number */ 75 | 76 | #ifdef __cplusplus 77 | } 78 | #endif 79 | 80 | #endif 81 | -------------------------------------------------------------------------------- /FatFs/inc/integer.h: -------------------------------------------------------------------------------- 1 | /*-------------------------------------------*/ 2 | /* Integer type definitions for FatFs module */ 3 | /*-------------------------------------------*/ 4 | 5 | #ifndef _FF_INTEGER 6 | #define _FF_INTEGER 7 | 8 | #ifdef _WIN32 /* FatFs development platform */ 9 | 10 | #include 11 | #include 12 | typedef unsigned __int64 QWORD; 13 | 14 | 15 | #else /* Embedded platform */ 16 | 17 | /* These types MUST be 16-bit or 32-bit */ 18 | typedef int INT; 19 | typedef unsigned int UINT; 20 | 21 | /* This type MUST be 8-bit */ 22 | typedef unsigned char BYTE; 23 | 24 | /* These types MUST be 16-bit */ 25 | typedef short SHORT; 26 | typedef unsigned short WORD; 27 | typedef unsigned short WCHAR; 28 | 29 | /* These types MUST be 32-bit */ 30 | typedef long LONG; 31 | typedef unsigned long DWORD; 32 | 33 | /* This type MUST be 64-bit (Remove this for C89 compatibility) */ 34 | typedef unsigned long long QWORD; 35 | 36 | #endif 37 | 38 | #endif 39 | -------------------------------------------------------------------------------- /FatFs/inc/sdio_sd.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/FatFs/inc/sdio_sd.h -------------------------------------------------------------------------------- /FatFs/src/diskio.c: -------------------------------------------------------------------------------- 1 | /*-----------------------------------------------------------------------*/ 2 | /* Low level disk I/O module skeleton for FatFs (C)ChaN, 2016 */ 3 | /*-----------------------------------------------------------------------*/ 4 | /* If a working storage control module is available, it should be */ 5 | /* attached to the FatFs via a glue function rather than modifying it. */ 6 | /* This is an example of glue functions to attach various exsisting */ 7 | /* storage control modules to the FatFs module with a defined API. */ 8 | /*-----------------------------------------------------------------------*/ 9 | 10 | #include "diskio.h" /* FatFs lower layer API */ 11 | #include "sdio_sd.h" 12 | DSTATUS disk_status ( 13 | BYTE pdrv /* Physical drive nmuber to identify the drive */ 14 | ) 15 | { 16 | 17 | return RES_OK; 18 | } 19 | /*-----------------------------------------------------------------------*/ 20 | /* Inidialize a Drive */ 21 | /*-----------------------------------------------------------------------*/ 22 | 23 | DSTATUS disk_initialize ( 24 | BYTE pdrv /* Physical drive nmuber to identify the drive */ 25 | ) 26 | { 27 | return RES_OK; 28 | } 29 | /*-----------------------------------------------------------------------*/ 30 | /* Read Sector(s) */ 31 | /*-----------------------------------------------------------------------*/ 32 | 33 | DRESULT disk_read ( 34 | BYTE pdrv, /* Physical drive nmuber to identify the drive */ 35 | BYTE *buff, /* Data buffer to store read data */ 36 | DWORD sector, /* Start sector in LBA */ 37 | UINT count /* Number of sectors to read */ 38 | ) 39 | { 40 | if( SD_ReadMultiBlocks (buff,sector * 512,512,count) != 0) 41 | { 42 | return RES_ERROR; 43 | } 44 | SD_WaitReadOperation(); 45 | while (SD_GetStatus() != SD_TRANSFER_OK); 46 | 47 | return RES_OK; 48 | } 49 | 50 | 51 | 52 | /*-----------------------------------------------------------------------*/ 53 | /* Write Sector(s) */ 54 | /*-----------------------------------------------------------------------*/ 55 | 56 | DRESULT disk_write ( 57 | BYTE pdrv, /* Physical drive nmuber to identify the drive */ 58 | const BYTE *buff, /* Data to be written */ 59 | DWORD sector, /* Start sector in LBA */ 60 | UINT count /* Number of sectors to write */ 61 | ) 62 | { 63 | if( SD_WriteMultiBlocks ((unsigned char *)buff,sector * 512, 512,count) != 0) 64 | { 65 | return RES_ERROR; 66 | } 67 | SD_WaitWriteOperation(); 68 | while (SD_GetStatus() != SD_TRANSFER_OK); 69 | return RES_OK; 70 | } 71 | 72 | 73 | 74 | /*-----------------------------------------------------------------------*/ 75 | /* Miscellaneous Functions */ 76 | /*-----------------------------------------------------------------------*/ 77 | 78 | DRESULT disk_ioctl ( 79 | BYTE pdrv, /* Physical drive nmuber (0..) */ 80 | BYTE cmd, /* Control code */ 81 | void *buff /* Buffer to send/receive control data */ 82 | ) 83 | { 84 | return RES_OK; 85 | } 86 | 87 | unsigned long int get_fattime(void) 88 | { 89 | return 0; 90 | } 91 | -------------------------------------------------------------------------------- /FatFs/src/syscall.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ 2 | /* Sample code of OS dependent controls for FatFs */ 3 | /* (C)ChaN, 2014 */ 4 | /*------------------------------------------------------------------------*/ 5 | 6 | 7 | #include "ff.h" 8 | 9 | 10 | #if _FS_REENTRANT 11 | 12 | 13 | int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */ 14 | BYTE vol, /* Corresponding volume (logical drive number) */ 15 | _SYNC_t *sobj /* Pointer to return the created sync object */ 16 | ) 17 | { 18 | int ret; 19 | 20 | 21 | *sobj = CreateMutex(NULL, FALSE, NULL); /* Win32 */ 22 | ret = (int)(*sobj != INVALID_HANDLE_VALUE); 23 | 24 | // *sobj = SyncObjects[vol]; /* uITRON (give a static sync object) */ 25 | // ret = 1; /* The initial value of the semaphore must be 1. */ 26 | 27 | // *sobj = OSMutexCreate(0, &err); /* uC/OS-II */ 28 | // ret = (int)(err == OS_NO_ERR); 29 | 30 | // *sobj = xSemaphoreCreateMutex(); /* FreeRTOS */ 31 | // ret = (int)(*sobj != NULL); 32 | 33 | return ret; 34 | } 35 | 36 | 37 | 38 | /*------------------------------------------------------------------------*/ 39 | /* Delete a Synchronization Object */ 40 | /*------------------------------------------------------------------------*/ 41 | /* This function is called in f_mount() function to delete a synchronization 42 | / object that created with ff_cre_syncobj() function. When a 0 is returned, 43 | / the f_mount() function fails with FR_INT_ERR. 44 | */ 45 | 46 | int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to any error */ 47 | _SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ 48 | ) 49 | { 50 | int ret; 51 | 52 | 53 | ret = CloseHandle(sobj); /* Win32 */ 54 | 55 | // ret = 1; /* uITRON (nothing to do) */ 56 | 57 | // OSMutexDel(sobj, OS_DEL_ALWAYS, &err); /* uC/OS-II */ 58 | // ret = (int)(err == OS_NO_ERR); 59 | 60 | // vSemaphoreDelete(sobj); /* FreeRTOS */ 61 | // ret = 1; 62 | 63 | return ret; 64 | } 65 | 66 | 67 | 68 | /*------------------------------------------------------------------------*/ 69 | /* Request Grant to Access the Volume */ 70 | /*------------------------------------------------------------------------*/ 71 | /* This function is called on entering file functions to lock the volume. 72 | / When a 0 is returned, the file function fails with FR_TIMEOUT. 73 | */ 74 | 75 | int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */ 76 | _SYNC_t sobj /* Sync object to wait */ 77 | ) 78 | { 79 | int ret; 80 | 81 | ret = (int)(WaitForSingleObject(sobj, _FS_TIMEOUT) == WAIT_OBJECT_0); /* Win32 */ 82 | 83 | // ret = (int)(wai_sem(sobj) == E_OK); /* uITRON */ 84 | 85 | // OSMutexPend(sobj, _FS_TIMEOUT, &err)); /* uC/OS-II */ 86 | // ret = (int)(err == OS_NO_ERR); 87 | 88 | // ret = (int)(xSemaphoreTake(sobj, _FS_TIMEOUT) == pdTRUE); /* FreeRTOS */ 89 | 90 | return ret; 91 | } 92 | 93 | 94 | 95 | /*------------------------------------------------------------------------*/ 96 | /* Release Grant to Access the Volume */ 97 | /*------------------------------------------------------------------------*/ 98 | /* This function is called on leaving file functions to unlock the volume. 99 | */ 100 | 101 | void ff_rel_grant ( 102 | _SYNC_t sobj /* Sync object to be signaled */ 103 | ) 104 | { 105 | ReleaseMutex(sobj); /* Win32 */ 106 | 107 | // sig_sem(sobj); /* uITRON */ 108 | 109 | // OSMutexPost(sobj); /* uC/OS-II */ 110 | 111 | // xSemaphoreGive(sobj); /* FreeRTOS */ 112 | } 113 | 114 | #endif 115 | 116 | 117 | 118 | 119 | #if _USE_LFN == 3 /* LFN with a working buffer on the heap */ 120 | /*------------------------------------------------------------------------*/ 121 | /* Allocate a memory block */ 122 | /*------------------------------------------------------------------------*/ 123 | /* If a NULL is returned, the file function fails with FR_NOT_ENOUGH_CORE. 124 | */ 125 | 126 | void* ff_memalloc ( /* Returns pointer to the allocated memory block */ 127 | UINT msize /* Number of bytes to allocate */ 128 | ) 129 | { 130 | return malloc(msize); /* Allocate a new memory block with POSIX API */ 131 | } 132 | 133 | 134 | /*------------------------------------------------------------------------*/ 135 | /* Free a memory block */ 136 | /*------------------------------------------------------------------------*/ 137 | 138 | void ff_memfree ( 139 | void* mblock /* Pointer to the memory block to free */ 140 | ) 141 | { 142 | free(mblock); /* Discard the memory block with POSIX API */ 143 | } 144 | 145 | #endif 146 | -------------------------------------------------------------------------------- /FatFs/src/unicode.c: -------------------------------------------------------------------------------- 1 | #include "ff.h" 2 | 3 | #if _USE_LFN != 0 4 | 5 | #if _CODE_PAGE == 932 /* Japanese Shift_JIS */ 6 | #include "cc932.c" 7 | #elif _CODE_PAGE == 936 /* Simplified Chinese GBK */ 8 | #include "cc936.c" 9 | #elif _CODE_PAGE == 949 /* Korean */ 10 | #include "cc949.c" 11 | #elif _CODE_PAGE == 950 /* Traditional Chinese Big5 */ 12 | #include "cc950.c" 13 | #else /* Single Byte Character-Set */ 14 | #include "ccsbcs.c" 15 | #endif 16 | 17 | #endif 18 | -------------------------------------------------------------------------------- /MDK删除.bat: -------------------------------------------------------------------------------- 1 | @del /f/q/s *.o 2 | @del /f/q/s *.crf 3 | @del /f/q/s *.bak 4 | @del /f/q/s *.d 5 | @del /f/q/s *.axf 6 | @del /f/q/s *.iex 7 | @del /f/q/s *.lnp 8 | @del /f/q/s *.flg 9 | @del /f/q/s *.tra 10 | @del /f/q/s *.sct 11 | @del /f/q/s *.i 12 | @del /f/q/s *._ip 13 | @del /f/q/s *.lst 14 | @del /f/q/s *.map 15 | @del /f/q/s *.dep 16 | @del /f/q *.txt 17 | @del /f/q/s *.__i 18 | @del /f/q/s *.plg 19 | @del /f/q/s *.ini 20 | @pause -------------------------------------------------------------------------------- /STM32-DSP_CAN_Boot.si4project/STM32-DSP_CAN_Boot.bookmarks.xml: -------------------------------------------------------------------------------- 1 | 2 | 6 | 7 | 8 | -------------------------------------------------------------------------------- /STM32-DSP_CAN_Boot.si4project/STM32-DSP_CAN_Boot.sip_sym: -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/STM32F4xx_StdPeriph_Driver/Release_Notes.html -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/misc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the miscellaneous 8 | * firmware library functions (add-on to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __MISC_H 31 | #define __MISC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup MISC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief NVIC Init Structure definition 52 | */ 53 | 54 | typedef struct 55 | { 56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 57 | This parameter can be an enumerator of @ref IRQn_Type 58 | enumeration (For the complete STM32 Devices IRQ Channels 59 | list, please refer to stm32f4xx.h file) */ 60 | 61 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel 62 | specified in NVIC_IRQChannel. This parameter can be a value 63 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 64 | A lower priority value indicates a higher priority */ 65 | 66 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified 67 | in NVIC_IRQChannel. This parameter can be a value 68 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table 69 | A lower priority value indicates a higher priority */ 70 | 71 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 72 | will be enabled or disabled. 73 | This parameter can be set either to ENABLE or DISABLE */ 74 | } NVIC_InitTypeDef; 75 | 76 | /* Exported constants --------------------------------------------------------*/ 77 | 78 | /** @defgroup MISC_Exported_Constants 79 | * @{ 80 | */ 81 | 82 | /** @defgroup MISC_Vector_Table_Base 83 | * @{ 84 | */ 85 | 86 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000) 87 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000) 88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ 89 | ((VECTTAB) == NVIC_VectTab_FLASH)) 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup MISC_System_Low_Power 95 | * @{ 96 | */ 97 | 98 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 99 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 100 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 102 | ((LP) == NVIC_LP_SLEEPDEEP) || \ 103 | ((LP) == NVIC_LP_SLEEPONEXIT)) 104 | /** 105 | * @} 106 | */ 107 | 108 | /** @defgroup MISC_Preemption_Priority_Group 109 | * @{ 110 | */ 111 | 112 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority 113 | 4 bits for subpriority */ 114 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority 115 | 3 bits for subpriority */ 116 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority 117 | 2 bits for subpriority */ 118 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority 119 | 1 bits for subpriority */ 120 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority 121 | 0 bits for subpriority */ 122 | 123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 124 | ((GROUP) == NVIC_PriorityGroup_1) || \ 125 | ((GROUP) == NVIC_PriorityGroup_2) || \ 126 | ((GROUP) == NVIC_PriorityGroup_3) || \ 127 | ((GROUP) == NVIC_PriorityGroup_4)) 128 | 129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 130 | 131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 132 | 133 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup MISC_SysTick_clock_source 140 | * @{ 141 | */ 142 | 143 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) 144 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) 145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ 146 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) 147 | /** 148 | * @} 149 | */ 150 | 151 | /** 152 | * @} 153 | */ 154 | 155 | /* Exported macro ------------------------------------------------------------*/ 156 | /* Exported functions --------------------------------------------------------*/ 157 | 158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); 159 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); 161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); 162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); 163 | 164 | #ifdef __cplusplus 165 | } 166 | #endif 167 | 168 | #endif /* __MISC_H */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 179 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_CRC_H 31 | #define __STM32F4xx_CRC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup CRC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup CRC_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /* Exported macro ------------------------------------------------------------*/ 60 | /* Exported functions --------------------------------------------------------*/ 61 | 62 | void CRC_ResetDR(void); 63 | uint32_t CRC_CalcCRC(uint32_t Data); 64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 65 | uint32_t CRC_GetCRC(void); 66 | void CRC_SetIDRegister(uint8_t IDValue); 67 | uint8_t CRC_GetIDRegister(void); 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* __STM32F4xx_CRC_H */ 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 84 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_DBGMCU_H 30 | #define __STM32F4xx_DBGMCU_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32f4xx.h" 38 | 39 | /** @addtogroup STM32F4xx_StdPeriph_Driver 40 | * @{ 41 | */ 42 | 43 | /** @addtogroup DBGMCU 44 | * @{ 45 | */ 46 | 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 54 | #define DBGMCU_STOP ((uint32_t)0x00000002) 55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00)) 57 | 58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001) 59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002) 60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004) 61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008) 62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010) 63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020) 64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040) 65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080) 66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100) 67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400) 68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800) 69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000) 70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000) 71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000) 72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000) 73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000) 74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000) 75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00)) 76 | 77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001) 78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002) 79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000) 80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000) 81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000) 82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | uint32_t DBGMCU_GetREVID(void); 90 | uint32_t DBGMCU_GetDEVID(void); 91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 94 | 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif /* __STM32F4xx_DBGMCU_H */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 110 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_exti.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_EXTI_H 31 | #define __STM32F4xx_EXTI_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup EXTI 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief EXTI mode enumeration 52 | */ 53 | 54 | typedef enum 55 | { 56 | EXTI_Mode_Interrupt = 0x00, 57 | EXTI_Mode_Event = 0x04 58 | }EXTIMode_TypeDef; 59 | 60 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 61 | 62 | /** 63 | * @brief EXTI Trigger enumeration 64 | */ 65 | 66 | typedef enum 67 | { 68 | EXTI_Trigger_Rising = 0x08, 69 | EXTI_Trigger_Falling = 0x0C, 70 | EXTI_Trigger_Rising_Falling = 0x10 71 | }EXTITrigger_TypeDef; 72 | 73 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 74 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 75 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 76 | /** 77 | * @brief EXTI Init Structure definition 78 | */ 79 | 80 | typedef struct 81 | { 82 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 83 | This parameter can be any combination value of @ref EXTI_Lines */ 84 | 85 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 86 | This parameter can be a value of @ref EXTIMode_TypeDef */ 87 | 88 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 89 | This parameter can be a value of @ref EXTITrigger_TypeDef */ 90 | 91 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 92 | This parameter can be set either to ENABLE or DISABLE */ 93 | }EXTI_InitTypeDef; 94 | 95 | /* Exported constants --------------------------------------------------------*/ 96 | 97 | /** @defgroup EXTI_Exported_Constants 98 | * @{ 99 | */ 100 | 101 | /** @defgroup EXTI_Lines 102 | * @{ 103 | */ 104 | 105 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 106 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 107 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 108 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 109 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 110 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 111 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 112 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 113 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 114 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 115 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 116 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 117 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 118 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 119 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 120 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 121 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 122 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 123 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */ 124 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 125 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */ 126 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */ 127 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */ 128 | #define EXTI_Line23 ((uint32_t)0x00800000) /*!< External interrupt line 23 Connected to the LPTIM Wakeup event */ 129 | 130 | 131 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00)) 132 | 133 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 134 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 135 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 136 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 137 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 138 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 139 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 140 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 141 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 142 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \ 143 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\ 144 | ((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23)) 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /* Exported macro ------------------------------------------------------------*/ 155 | /* Exported functions --------------------------------------------------------*/ 156 | 157 | /* Function used to set the EXTI configuration to the default reset state *****/ 158 | void EXTI_DeInit(void); 159 | 160 | /* Initialization and Configuration functions *********************************/ 161 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 162 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 163 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 164 | 165 | /* Interrupts and flags management functions **********************************/ 166 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 167 | void EXTI_ClearFlag(uint32_t EXTI_Line); 168 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 169 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 170 | 171 | #ifdef __cplusplus 172 | } 173 | #endif 174 | 175 | #endif /* __STM32F4xx_EXTI_H */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 186 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief Header file of FLASH RAMFUNC driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 31 | #define __STM32F4xx_FLASH_RAMFUNC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup FLASH RAMFUNC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Private define ------------------------------------------------------------*/ 50 | /** 51 | * @brief __RAM_FUNC definition 52 | */ 53 | #if defined ( __CC_ARM ) 54 | /* ARM Compiler 55 | ------------ 56 | RAM functions are defined using the toolchain options. 57 | Functions that are executed in RAM should reside in a separate source module. 58 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 59 | area of a module to a memory space in physical RAM. 60 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 61 | dialog. 62 | */ 63 | #define __RAM_FUNC void 64 | 65 | #elif defined ( __ICCARM__ ) 66 | /* ICCARM Compiler 67 | --------------- 68 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 69 | */ 70 | #define __RAM_FUNC __ramfunc void 71 | 72 | #elif defined ( __GNUC__ ) 73 | /* GNU Compiler 74 | ------------ 75 | RAM functions are defined using a specific toolchain attribute 76 | "__attribute__((section(".RamFunc")))". 77 | */ 78 | #define __RAM_FUNC void __attribute__((section(".RamFunc"))) 79 | 80 | #endif 81 | /* Exported constants --------------------------------------------------------*/ 82 | /* Exported macro ------------------------------------------------------------*/ 83 | /* Exported functions --------------------------------------------------------*/ 84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState); 85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState); 86 | 87 | 88 | #ifdef __cplusplus 89 | } 90 | #endif 91 | 92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 103 | 104 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hash.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the HASH 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_HASH_H 31 | #define __STM32F4xx_HASH_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup HASH 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief HASH Init structure definition 52 | */ 53 | typedef struct 54 | { 55 | uint32_t HASH_AlgoSelection; /*!< SHA-1, SHA-224, SHA-256 or MD5. This parameter 56 | can be a value of @ref HASH_Algo_Selection */ 57 | uint32_t HASH_AlgoMode; /*!< HASH or HMAC. This parameter can be a value 58 | of @ref HASH_processor_Algorithm_Mode */ 59 | uint32_t HASH_DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 60 | bit string. This parameter can be a value of 61 | @ref HASH_Data_Type */ 62 | uint32_t HASH_HMACKeyType; /*!< HMAC Short key or HMAC Long Key. This parameter 63 | can be a value of @ref HASH_HMAC_Long_key_only_for_HMAC_mode */ 64 | }HASH_InitTypeDef; 65 | 66 | /** 67 | * @brief HASH message digest result structure definition 68 | */ 69 | typedef struct 70 | { 71 | uint32_t Data[8]; /*!< Message digest result : 8x 32bit wors for SHA-256, 72 | 7x 32bit wors for SHA-224, 73 | 5x 32bit words for SHA-1 or 74 | 4x 32bit words for MD5 */ 75 | } HASH_MsgDigest; 76 | 77 | /** 78 | * @brief HASH context swapping structure definition 79 | */ 80 | typedef struct 81 | { 82 | uint32_t HASH_IMR; 83 | uint32_t HASH_STR; 84 | uint32_t HASH_CR; 85 | uint32_t HASH_CSR[54]; 86 | }HASH_Context; 87 | 88 | /* Exported constants --------------------------------------------------------*/ 89 | 90 | /** @defgroup HASH_Exported_Constants 91 | * @{ 92 | */ 93 | 94 | /** @defgroup HASH_Algo_Selection 95 | * @{ 96 | */ 97 | #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */ 98 | #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */ 99 | #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */ 100 | #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */ 101 | 102 | #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \ 103 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \ 104 | ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \ 105 | ((ALGOSELECTION) == HASH_AlgoSelection_MD5)) 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @defgroup HASH_processor_Algorithm_Mode 111 | * @{ 112 | */ 113 | #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */ 114 | #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */ 115 | 116 | #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \ 117 | ((ALGOMODE) == HASH_AlgoMode_HMAC)) 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup HASH_Data_Type 123 | * @{ 124 | */ 125 | #define HASH_DataType_32b ((uint32_t)0x0000) /*!< 32-bit data. No swapping */ 126 | #define HASH_DataType_16b HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */ 127 | #define HASH_DataType_8b HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */ 128 | #define HASH_DataType_1b HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */ 129 | 130 | #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DataType_32b)|| \ 131 | ((DATATYPE) == HASH_DataType_16b)|| \ 132 | ((DATATYPE) == HASH_DataType_8b) || \ 133 | ((DATATYPE) == HASH_DataType_1b)) 134 | /** 135 | * @} 136 | */ 137 | 138 | /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode 139 | * @{ 140 | */ 141 | #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */ 142 | #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */ 143 | 144 | #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \ 145 | ((KEYTYPE) == HASH_HMACKeyType_LongKey)) 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @defgroup Number_of_valid_bits_in_last_word_of_the_message 151 | * @{ 152 | */ 153 | #define IS_HASH_VALIDBITSNUMBER(VALIDBITS) ((VALIDBITS) <= 0x1F) 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** @defgroup HASH_interrupts_definition 160 | * @{ 161 | */ 162 | #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */ 163 | #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */ 164 | 165 | #define IS_HASH_IT(IT) ((((IT) & (uint32_t)0xFFFFFFFC) == 0x00000000) && ((IT) != 0x00000000)) 166 | #define IS_HASH_GET_IT(IT) (((IT) == HASH_IT_DINI) || ((IT) == HASH_IT_DCI)) 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** @defgroup HASH_flags_definition 173 | * @{ 174 | */ 175 | #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */ 176 | #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */ 177 | #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */ 178 | #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */ 179 | #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */ 180 | 181 | #define IS_HASH_GET_FLAG(FLAG) (((FLAG) == HASH_FLAG_DINIS) || \ 182 | ((FLAG) == HASH_FLAG_DCIS) || \ 183 | ((FLAG) == HASH_FLAG_DMAS) || \ 184 | ((FLAG) == HASH_FLAG_BUSY) || \ 185 | ((FLAG) == HASH_FLAG_DINNE)) 186 | 187 | #define IS_HASH_CLEAR_FLAG(FLAG)(((FLAG) == HASH_FLAG_DINIS) || \ 188 | ((FLAG) == HASH_FLAG_DCIS)) 189 | 190 | /** 191 | * @} 192 | */ 193 | 194 | /** 195 | * @} 196 | */ 197 | 198 | /* Exported macro ------------------------------------------------------------*/ 199 | /* Exported functions --------------------------------------------------------*/ 200 | 201 | /* Function used to set the HASH configuration to the default reset state ****/ 202 | void HASH_DeInit(void); 203 | 204 | /* HASH Configuration function ************************************************/ 205 | void HASH_Init(HASH_InitTypeDef* HASH_InitStruct); 206 | void HASH_StructInit(HASH_InitTypeDef* HASH_InitStruct); 207 | void HASH_Reset(void); 208 | 209 | /* HASH Message Digest generation functions ***********************************/ 210 | void HASH_DataIn(uint32_t Data); 211 | uint8_t HASH_GetInFIFOWordsNbr(void); 212 | void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber); 213 | void HASH_StartDigest(void); 214 | void HASH_AutoStartDigest(FunctionalState NewState); 215 | void HASH_GetDigest(HASH_MsgDigest* HASH_MessageDigest); 216 | 217 | /* HASH Context swapping functions ********************************************/ 218 | void HASH_SaveContext(HASH_Context* HASH_ContextSave); 219 | void HASH_RestoreContext(HASH_Context* HASH_ContextRestore); 220 | 221 | /* HASH DMA interface function ************************************************/ 222 | void HASH_DMACmd(FunctionalState NewState); 223 | 224 | /* HASH Interrupts and flags management functions *****************************/ 225 | void HASH_ITConfig(uint32_t HASH_IT, FunctionalState NewState); 226 | FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG); 227 | void HASH_ClearFlag(uint32_t HASH_FLAG); 228 | ITStatus HASH_GetITStatus(uint32_t HASH_IT); 229 | void HASH_ClearITPendingBit(uint32_t HASH_IT); 230 | 231 | /* High Level SHA1 functions **************************************************/ 232 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]); 233 | ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, 234 | uint8_t *Input, uint32_t Ilen, 235 | uint8_t Output[20]); 236 | 237 | /* High Level MD5 functions ***************************************************/ 238 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]); 239 | ErrorStatus HMAC_MD5(uint8_t *Key, uint32_t Keylen, 240 | uint8_t *Input, uint32_t Ilen, 241 | uint8_t Output[16]); 242 | 243 | #ifdef __cplusplus 244 | } 245 | #endif 246 | 247 | #endif /*__STM32F4xx_HASH_H */ 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | /** 254 | * @} 255 | */ 256 | 257 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 258 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_IWDG_H 31 | #define __STM32F4xx_IWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup IWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup IWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup IWDG_WriteAccess 56 | * @{ 57 | */ 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 70 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 71 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 72 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 73 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 74 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 75 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 77 | ((PRESCALER) == IWDG_Prescaler_8) || \ 78 | ((PRESCALER) == IWDG_Prescaler_16) || \ 79 | ((PRESCALER) == IWDG_Prescaler_32) || \ 80 | ((PRESCALER) == IWDG_Prescaler_64) || \ 81 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 82 | ((PRESCALER) == IWDG_Prescaler_256)) 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @defgroup IWDG_Flag 88 | * @{ 89 | */ 90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 94 | /** 95 | * @} 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /* Exported macro ------------------------------------------------------------*/ 103 | /* Exported functions --------------------------------------------------------*/ 104 | 105 | /* Prescaler and Counter configuration functions ******************************/ 106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 108 | void IWDG_SetReload(uint16_t Reload); 109 | void IWDG_ReloadCounter(void); 110 | 111 | /* IWDG activation function ***************************************************/ 112 | void IWDG_Enable(void); 113 | 114 | /* Flag management function ***************************************************/ 115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 116 | 117 | #ifdef __cplusplus 118 | } 119 | #endif 120 | 121 | #endif /* __STM32F4xx_IWDG_H */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 132 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_pwr.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_PWR_H 31 | #define __STM32F4xx_PWR_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup PWR 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup PWR_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup PWR_PVD_detection_level 56 | * @{ 57 | */ 58 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0 59 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1 60 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2 61 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3 62 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4 63 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5 64 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6 65 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 66 | 67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \ 69 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \ 70 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7)) 71 | /** 72 | * @} 73 | */ 74 | 75 | 76 | /** @defgroup PWR_Regulator_state_in_STOP_mode 77 | * @{ 78 | */ 79 | #define PWR_MainRegulator_ON ((uint32_t)0x00000000) 80 | #define PWR_LowPowerRegulator_ON PWR_CR_LPDS 81 | 82 | /* --- PWR_Legacy ---*/ 83 | #define PWR_Regulator_ON PWR_MainRegulator_ON 84 | #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON 85 | 86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \ 87 | ((REGULATOR) == PWR_LowPowerRegulator_ON)) 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode 94 | * @{ 95 | */ 96 | #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS 97 | #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS)) 98 | 99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \ 100 | ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON)) 101 | 102 | /** 103 | * @} 104 | */ 105 | #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) || defined(STM32F446xx) 106 | /** @defgroup PWR_Wake_Up_Pin 107 | * @{ 108 | */ 109 | #define PWR_WakeUp_Pin1 ((uint32_t)0x00) 110 | #define PWR_WakeUp_Pin2 ((uint32_t)0x01) 111 | #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) 112 | #define PWR_WakeUp_Pin3 ((uint32_t)0x02) 113 | #endif /* STM32F410xx || STM32F412xG || STM32F413_423xx */ 114 | 115 | #if defined(STM32F446xx) 116 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUp_Pin1) || \ 117 | ((PIN) == PWR_WakeUp_Pin2)) 118 | #else /* STM32F410xx || STM32F412xG */ 119 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUp_Pin1) || ((PIN) == PWR_WakeUp_Pin2) || \ 120 | ((PIN) == PWR_WakeUp_Pin3)) 121 | #endif /* STM32F446xx */ 122 | /** 123 | * @} 124 | */ 125 | #endif /* STM32F410xx || STM32F412xG || STM32F413_423xx || STM32F446xx */ 126 | 127 | /** @defgroup PWR_STOP_mode_entry 128 | * @{ 129 | */ 130 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 131 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 132 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup PWR_Regulator_Voltage_Scale 138 | * @{ 139 | */ 140 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000) 141 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000) 142 | #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000) 143 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \ 144 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \ 145 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale3)) 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @defgroup PWR_Flag 151 | * @{ 152 | */ 153 | #define PWR_FLAG_WU PWR_CSR_WUF 154 | #define PWR_FLAG_SB PWR_CSR_SBF 155 | #define PWR_FLAG_PVDO PWR_CSR_PVDO 156 | #define PWR_FLAG_BRR PWR_CSR_BRR 157 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 158 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY 159 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY 160 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY 161 | 162 | /* --- FLAG Legacy ---*/ 163 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY 164 | 165 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 166 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \ 167 | ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \ 168 | ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY)) 169 | 170 | 171 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 172 | ((FLAG) == PWR_FLAG_UDRDY)) 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /* Exported macro ------------------------------------------------------------*/ 183 | /* Exported functions --------------------------------------------------------*/ 184 | 185 | /* Function used to set the PWR configuration to the default reset state ******/ 186 | void PWR_DeInit(void); 187 | 188 | /* Backup Domain Access function **********************************************/ 189 | void PWR_BackupAccessCmd(FunctionalState NewState); 190 | 191 | /* PVD configuration functions ************************************************/ 192 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 193 | void PWR_PVDCmd(FunctionalState NewState); 194 | 195 | /* WakeUp pins configuration functions ****************************************/ 196 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F411xE) 197 | void PWR_WakeUpPinCmd(FunctionalState NewState); 198 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F411xE */ 199 | #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) ||defined(STM32F446xx) 200 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPinx, FunctionalState NewState); 201 | #endif /* STM32F410xx || STM32F412xG || STM32F413_423xx || STM32F446xx */ 202 | /* Main and Backup Regulators configuration functions *************************/ 203 | void PWR_BackupRegulatorCmd(FunctionalState NewState); 204 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage); 205 | void PWR_OverDriveCmd(FunctionalState NewState); 206 | void PWR_OverDriveSWCmd(FunctionalState NewState); 207 | void PWR_UnderDriveCmd(FunctionalState NewState); 208 | 209 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) 210 | void PWR_MainRegulatorUnderDriveCmd(FunctionalState NewState); 211 | void PWR_LowRegulatorUnderDriveCmd(FunctionalState NewState); 212 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F446xx */ 213 | 214 | #if defined(STM32F401xx) || defined(STM32F410xx) || defined(STM32F411xE) || defined(STM32F412xG) || defined(STM32F413_423xx) 215 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState); 216 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState); 217 | #endif /* STM32F401xx || STM32F410xx || STM32F411xE || STM32F412xG || STM32F413_423xx */ 218 | 219 | /* FLASH Power Down configuration functions ***********************************/ 220 | void PWR_FlashPowerDownCmd(FunctionalState NewState); 221 | 222 | /* Low Power modes configuration functions ************************************/ 223 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 224 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 225 | void PWR_EnterSTANDBYMode(void); 226 | 227 | /* Flags management functions *************************************************/ 228 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 229 | void PWR_ClearFlag(uint32_t PWR_FLAG); 230 | 231 | #ifdef __cplusplus 232 | } 233 | #endif 234 | 235 | #endif /* __STM32F4xx_PWR_H */ 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 246 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_rng.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the Random 8 | * Number Generator(RNG) firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_RNG_H 31 | #define __STM32F4xx_RNG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup RNG 45 | * @{ 46 | */ 47 | #if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) || defined(STM32F429_439xx) || defined(STM32F469_479xx) 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup RNG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup RNG_flags_definition 56 | * @{ 57 | */ 58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */ 59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */ 60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */ 61 | 62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \ 63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \ 64 | ((RNG_FLAG) == RNG_FLAG_SECS)) 65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \ 66 | ((RNG_FLAG) == RNG_FLAG_SECS)) 67 | /** 68 | * @} 69 | */ 70 | 71 | /** @defgroup RNG_interrupts_definition 72 | * @{ 73 | */ 74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */ 75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */ 76 | 77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00)) 78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI)) 79 | /** 80 | * @} 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | 90 | /* Function used to set the RNG configuration to the default reset state *****/ 91 | void RNG_DeInit(void); 92 | 93 | /* Configuration function *****************************************************/ 94 | void RNG_Cmd(FunctionalState NewState); 95 | 96 | /* Get 32 bit Random number function ******************************************/ 97 | uint32_t RNG_GetRandomNumber(void); 98 | 99 | /* Interrupts and flags management functions **********************************/ 100 | void RNG_ITConfig(FunctionalState NewState); 101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG); 102 | void RNG_ClearFlag(uint8_t RNG_FLAG); 103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT); 104 | void RNG_ClearITPendingBit(uint8_t RNG_IT); 105 | #endif /* STM32F40_41xxx || STM32F427_437xx || STM32F410xx || STM32F412xG || STM32F413_423xx || STM32F429_439xx || STM32F469_479xx */ 106 | 107 | #ifdef __cplusplus 108 | } 109 | #endif 110 | 111 | #endif /*__STM32F4xx_RNG_H */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** 118 | * @} 119 | */ 120 | 121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 122 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_wwdg.h 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2016 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F4xx_WWDG_H 31 | #define __STM32F4xx_WWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f4xx.h" 39 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup WWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup WWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup WWDG_Prescaler 56 | * @{ 57 | */ 58 | 59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 64 | ((PRESCALER) == WWDG_Prescaler_2) || \ 65 | ((PRESCALER) == WWDG_Prescaler_4) || \ 66 | ((PRESCALER) == WWDG_Prescaler_8)) 67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported macro ------------------------------------------------------------*/ 79 | /* Exported functions --------------------------------------------------------*/ 80 | 81 | /* Function used to set the WWDG configuration to the default reset state ****/ 82 | void WWDG_DeInit(void); 83 | 84 | /* Prescaler, Refresh window and Counter configuration functions **************/ 85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 86 | void WWDG_SetWindowValue(uint8_t WindowValue); 87 | void WWDG_EnableIT(void); 88 | void WWDG_SetCounter(uint8_t Counter); 89 | 90 | /* WWDG activation function ***************************************************/ 91 | void WWDG_Enable(uint8_t Counter); 92 | 93 | /* Interrupts and flags management functions **********************************/ 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F4xx_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 112 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_crc.c 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_crc.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup CRC 36 | * @brief CRC driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | /* Private macro -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Private functions ---------------------------------------------------------*/ 46 | 47 | /** @defgroup CRC_Private_Functions 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @brief Resets the CRC Data register (DR). 53 | * @param None 54 | * @retval None 55 | */ 56 | void CRC_ResetDR(void) 57 | { 58 | /* Reset CRC generator */ 59 | CRC->CR = CRC_CR_RESET; 60 | } 61 | 62 | /** 63 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 64 | * @param Data: data word(32-bit) to compute its CRC 65 | * @retval 32-bit CRC 66 | */ 67 | uint32_t CRC_CalcCRC(uint32_t Data) 68 | { 69 | CRC->DR = Data; 70 | 71 | return (CRC->DR); 72 | } 73 | 74 | /** 75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 76 | * @param pBuffer: pointer to the buffer containing the data to be computed 77 | * @param BufferLength: length of the buffer to be computed 78 | * @retval 32-bit CRC 79 | */ 80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 81 | { 82 | uint32_t index = 0; 83 | 84 | for(index = 0; index < BufferLength; index++) 85 | { 86 | CRC->DR = pBuffer[index]; 87 | } 88 | return (CRC->DR); 89 | } 90 | 91 | /** 92 | * @brief Returns the current CRC value. 93 | * @param None 94 | * @retval 32-bit CRC 95 | */ 96 | uint32_t CRC_GetCRC(void) 97 | { 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 103 | * @param IDValue: 8-bit value to be stored in the ID register 104 | * @retval None 105 | */ 106 | void CRC_SetIDRegister(uint8_t IDValue) 107 | { 108 | CRC->IDR = IDValue; 109 | } 110 | 111 | /** 112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 113 | * @param None 114 | * @retval 8-bit value of the ID register 115 | */ 116 | uint8_t CRC_GetIDRegister(void) 117 | { 118 | return (CRC->IDR); 119 | } 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 134 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_dbgmcu.h" 30 | 31 | /** @addtogroup STM32F4xx_StdPeriph_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup DBGMCU 36 | * @brief DBGMCU driver modules 37 | * @{ 38 | */ 39 | 40 | /* Private typedef -----------------------------------------------------------*/ 41 | /* Private define ------------------------------------------------------------*/ 42 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 43 | 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private function prototypes -----------------------------------------------*/ 47 | /* Private functions ---------------------------------------------------------*/ 48 | 49 | /** @defgroup DBGMCU_Private_Functions 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @brief Returns the device revision identifier. 55 | * @param None 56 | * @retval Device revision identifier 57 | */ 58 | uint32_t DBGMCU_GetREVID(void) 59 | { 60 | return(DBGMCU->IDCODE >> 16); 61 | } 62 | 63 | /** 64 | * @brief Returns the device identifier. 65 | * @param None 66 | * @retval Device identifier 67 | */ 68 | uint32_t DBGMCU_GetDEVID(void) 69 | { 70 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 71 | } 72 | 73 | /** 74 | * @brief Configures low power mode behavior when the MCU is in Debug mode. 75 | * @param DBGMCU_Periph: specifies the low power mode. 76 | * This parameter can be any combination of the following values: 77 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 78 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 79 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 80 | * @param NewState: new state of the specified low power mode in Debug mode. 81 | * This parameter can be: ENABLE or DISABLE. 82 | * @retval None 83 | */ 84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 85 | { 86 | /* Check the parameters */ 87 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 88 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 89 | if (NewState != DISABLE) 90 | { 91 | DBGMCU->CR |= DBGMCU_Periph; 92 | } 93 | else 94 | { 95 | DBGMCU->CR &= ~DBGMCU_Periph; 96 | } 97 | } 98 | 99 | /** 100 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode. 101 | * @param DBGMCU_Periph: specifies the APB1 peripheral. 102 | * This parameter can be any combination of the following values: 103 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 104 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 105 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 106 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 107 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 108 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 109 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 112 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted. 113 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 114 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 115 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 117 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted 118 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted 119 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 120 | * This parameter can be: ENABLE or DISABLE. 121 | * @retval None 122 | */ 123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 124 | { 125 | /* Check the parameters */ 126 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph)); 127 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 128 | 129 | if (NewState != DISABLE) 130 | { 131 | DBGMCU->APB1FZ |= DBGMCU_Periph; 132 | } 133 | else 134 | { 135 | DBGMCU->APB1FZ &= ~DBGMCU_Periph; 136 | } 137 | } 138 | 139 | /** 140 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode. 141 | * @param DBGMCU_Periph: specifies the APB2 peripheral. 142 | * This parameter can be any combination of the following values: 143 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 144 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 145 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 146 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 147 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 148 | * @param NewState: new state of the specified peripheral in Debug mode. 149 | * This parameter can be: ENABLE or DISABLE. 150 | * @retval None 151 | */ 152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 153 | { 154 | /* Check the parameters */ 155 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph)); 156 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 157 | 158 | if (NewState != DISABLE) 159 | { 160 | DBGMCU->APB2FZ |= DBGMCU_Periph; 161 | } 162 | else 163 | { 164 | DBGMCU->APB2FZ &= ~DBGMCU_Periph; 165 | } 166 | } 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 181 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief FLASH RAMFUNC module driver. 8 | * This file provides a FLASH firmware functions which should be 9 | * executed from internal SRAM 10 | * + Stop/Start the flash interface while System Run 11 | * + Enable/Disable the flash sleep while System Run 12 | * 13 | @verbatim 14 | ============================================================================== 15 | ##### APIs executed from Internal RAM ##### 16 | ============================================================================== 17 | [..] 18 | *** ARM Compiler *** 19 | -------------------- 20 | [..] RAM functions are defined using the toolchain options. 21 | Functions that are be executed in RAM should reside in a separate 22 | source module. Using the 'Options for File' dialog you can simply change 23 | the 'Code / Const' area of a module to a memory space in physical RAM. 24 | Available memory areas are declared in the 'Target' tab of the 25 | Options for Target' dialog. 26 | 27 | *** ICCARM Compiler *** 28 | ----------------------- 29 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 30 | 31 | *** GNU Compiler *** 32 | -------------------- 33 | [..] RAM functions are defined using a specific toolchain attribute 34 | "__attribute__((section(".RamFunc")))". 35 | 36 | @endverbatim 37 | ****************************************************************************** 38 | * @attention 39 | * 40 | *

© COPYRIGHT 2016 STMicroelectronics

41 | * 42 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 43 | * You may not use this file except in compliance with the License. 44 | * You may obtain a copy of the License at: 45 | * 46 | * http://www.st.com/software_license_agreement_liberty_v2 47 | * 48 | * Unless required by applicable law or agreed to in writing, software 49 | * distributed under the License is distributed on an "AS IS" BASIS, 50 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 51 | * See the License for the specific language governing permissions and 52 | * limitations under the License. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f4xx_flash_ramfunc.h" 59 | 60 | /** @addtogroup STM32F4xx_StdPeriph_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup FLASH RAMFUNC 65 | * @brief FLASH RAMFUNC driver modules 66 | * @{ 67 | */ 68 | 69 | /* Private typedef -----------------------------------------------------------*/ 70 | /* Private define ------------------------------------------------------------*/ 71 | /* Private macro -------------------------------------------------------------*/ 72 | /* Private variables ---------------------------------------------------------*/ 73 | /* Private function prototypes -----------------------------------------------*/ 74 | /* Private functions ---------------------------------------------------------*/ 75 | 76 | /** @defgroup FLASH_RAMFUNC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM 81 | * @brief Peripheral Extended features functions 82 | * 83 | @verbatim 84 | 85 | =============================================================================== 86 | ##### ramfunc functions ##### 87 | =============================================================================== 88 | [..] 89 | This subsection provides a set of functions that should be executed from RAM 90 | transfers. 91 | 92 | @endverbatim 93 | * @{ 94 | */ 95 | 96 | /** 97 | * @brief Start/Stop the flash interface while System Run 98 | * @note This mode is only available for STM32F411xx devices. 99 | * @note This mode could n't be set while executing with the flash itself. 100 | * It should be done with specific routine executed from RAM. 101 | * @param NewState: new state of the Smart Card mode. 102 | * This parameter can be: ENABLE or DISABLE. 103 | * @retval None 104 | */ 105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState) 106 | { 107 | if (NewState != DISABLE) 108 | { 109 | /* Start the flash interface while System Run */ 110 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 111 | } 112 | else 113 | { 114 | /* Stop the flash interface while System Run */ 115 | SET_BIT(PWR->CR, PWR_CR_FISSR); 116 | } 117 | } 118 | 119 | /** 120 | * @brief Enable/Disable the flash sleep while System Run 121 | * @note This mode is only available for STM32F411xx devices. 122 | * @note This mode could n't be set while executing with the flash itself. 123 | * It should be done with specific routine executed from RAM. 124 | * @param NewState: new state of the Smart Card mode. 125 | * This parameter can be: ENABLE or DISABLE. 126 | * @retval None 127 | */ 128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState) 129 | { 130 | if (NewState != DISABLE) 131 | { 132 | /* Enable the flash sleep while System Run */ 133 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 134 | } 135 | else 136 | { 137 | /* Disable the flash sleep while System Run */ 138 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 139 | } 140 | } 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 159 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hash_md5.c 4 | * @author MCD Application Team 5 | * @version V1.8.0 6 | * @date 04-November-2016 7 | * @brief This file provides high level functions to compute the HASH MD5 and 8 | * HMAC MD5 Digest of an input message. 9 | * It uses the stm32f4xx_hash.c/.h drivers to access the STM32F4xx HASH 10 | * peripheral. 11 | * 12 | @verbatim 13 | =================================================================== 14 | ##### How to use this driver ##### 15 | =================================================================== 16 | [..] 17 | (#) Enable The HASH controller clock using 18 | RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_HASH, ENABLE); function. 19 | 20 | (#) Calculate the HASH MD5 Digest using HASH_MD5() function. 21 | 22 | (#) Calculate the HMAC MD5 Digest using HMAC_MD5() function. 23 | 24 | @endverbatim 25 | * 26 | ****************************************************************************** 27 | * @attention 28 | * 29 | *

© COPYRIGHT 2016 STMicroelectronics

30 | * 31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 32 | * You may not use this file except in compliance with the License. 33 | * You may obtain a copy of the License at: 34 | * 35 | * http://www.st.com/software_license_agreement_liberty_v2 36 | * 37 | * Unless required by applicable law or agreed to in writing, software 38 | * distributed under the License is distributed on an "AS IS" BASIS, 39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 40 | * See the License for the specific language governing permissions and 41 | * limitations under the License. 42 | * 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hash.h" 48 | 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup HASH 54 | * @brief HASH driver modules 55 | * @{ 56 | */ 57 | 58 | /* Private typedef -----------------------------------------------------------*/ 59 | /* Private define ------------------------------------------------------------*/ 60 | #define MD5BUSY_TIMEOUT ((uint32_t) 0x00010000) 61 | 62 | /* Private macro -------------------------------------------------------------*/ 63 | /* Private variables ---------------------------------------------------------*/ 64 | /* Private function prototypes -----------------------------------------------*/ 65 | /* Private functions ---------------------------------------------------------*/ 66 | 67 | /** @defgroup HASH_Private_Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup HASH_Group7 High Level MD5 functions 72 | * @brief High Level MD5 Hash and HMAC functions 73 | * 74 | @verbatim 75 | =============================================================================== 76 | ##### High Level MD5 Hash and HMAC functions ##### 77 | =============================================================================== 78 | 79 | 80 | @endverbatim 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Compute the HASH MD5 digest. 86 | * @param Input: pointer to the Input buffer to be treated. 87 | * @param Ilen: length of the Input buffer. 88 | * @param Output: the returned digest 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: digest computation done 91 | * - ERROR: digest computation failed 92 | */ 93 | ErrorStatus HASH_MD5(uint8_t *Input, uint32_t Ilen, uint8_t Output[16]) 94 | { 95 | HASH_InitTypeDef MD5_HASH_InitStructure; 96 | HASH_MsgDigest MD5_MessageDigest; 97 | __IO uint16_t nbvalidbitsdata = 0; 98 | uint32_t i = 0; 99 | __IO uint32_t counter = 0; 100 | uint32_t busystatus = 0; 101 | ErrorStatus status = SUCCESS; 102 | uint32_t inputaddr = (uint32_t)Input; 103 | uint32_t outputaddr = (uint32_t)Output; 104 | 105 | 106 | /* Number of valid bits in last word of the Input data */ 107 | nbvalidbitsdata = 8 * (Ilen % 4); 108 | 109 | /* HASH peripheral initialization */ 110 | HASH_DeInit(); 111 | 112 | /* HASH Configuration */ 113 | MD5_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_MD5; 114 | MD5_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH; 115 | MD5_HASH_InitStructure.HASH_DataType = HASH_DataType_8b; 116 | HASH_Init(&MD5_HASH_InitStructure); 117 | 118 | /* Configure the number of valid bits in last word of the data */ 119 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata); 120 | 121 | /* Write the Input block in the IN FIFO */ 122 | for(i=0; i 64) 197 | { 198 | /* HMAC long Key */ 199 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey; 200 | } 201 | else 202 | { 203 | /* HMAC short Key */ 204 | MD5_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey; 205 | } 206 | HASH_Init(&MD5_HASH_InitStructure); 207 | 208 | /* Configure the number of valid bits in last word of the Key */ 209 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey); 210 | 211 | /* Write the Key */ 212 | for(i=0; i
© COPYRIGHT 2016 STMicroelectronics
30 | * 31 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 32 | * You may not use this file except in compliance with the License. 33 | * You may obtain a copy of the License at: 34 | * 35 | * http://www.st.com/software_license_agreement_liberty_v2 36 | * 37 | * Unless required by applicable law or agreed to in writing, software 38 | * distributed under the License is distributed on an "AS IS" BASIS, 39 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 40 | * See the License for the specific language governing permissions and 41 | * limitations under the License. 42 | * 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hash.h" 48 | 49 | /** @addtogroup STM32F4xx_StdPeriph_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup HASH 54 | * @brief HASH driver modules 55 | * @{ 56 | */ 57 | 58 | /* Private typedef -----------------------------------------------------------*/ 59 | /* Private define ------------------------------------------------------------*/ 60 | #define SHA1BUSY_TIMEOUT ((uint32_t) 0x00010000) 61 | 62 | /* Private macro -------------------------------------------------------------*/ 63 | /* Private variables ---------------------------------------------------------*/ 64 | /* Private function prototypes -----------------------------------------------*/ 65 | /* Private functions ---------------------------------------------------------*/ 66 | 67 | /** @defgroup HASH_Private_Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup HASH_Group6 High Level SHA1 functions 72 | * @brief High Level SHA1 Hash and HMAC functions 73 | * 74 | @verbatim 75 | =============================================================================== 76 | ##### High Level SHA1 Hash and HMAC functions ##### 77 | =============================================================================== 78 | 79 | 80 | @endverbatim 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Compute the HASH SHA1 digest. 86 | * @param Input: pointer to the Input buffer to be treated. 87 | * @param Ilen: length of the Input buffer. 88 | * @param Output: the returned digest 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: digest computation done 91 | * - ERROR: digest computation failed 92 | */ 93 | ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20]) 94 | { 95 | HASH_InitTypeDef SHA1_HASH_InitStructure; 96 | HASH_MsgDigest SHA1_MessageDigest; 97 | __IO uint16_t nbvalidbitsdata = 0; 98 | uint32_t i = 0; 99 | __IO uint32_t counter = 0; 100 | uint32_t busystatus = 0; 101 | ErrorStatus status = SUCCESS; 102 | uint32_t inputaddr = (uint32_t)Input; 103 | uint32_t outputaddr = (uint32_t)Output; 104 | 105 | /* Number of valid bits in last word of the Input data */ 106 | nbvalidbitsdata = 8 * (Ilen % 4); 107 | 108 | /* HASH peripheral initialization */ 109 | HASH_DeInit(); 110 | 111 | /* HASH Configuration */ 112 | SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1; 113 | SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH; 114 | SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b; 115 | HASH_Init(&SHA1_HASH_InitStructure); 116 | 117 | /* Configure the number of valid bits in last word of the data */ 118 | HASH_SetLastWordValidBitsNbr(nbvalidbitsdata); 119 | 120 | /* Write the Input block in the IN FIFO */ 121 | for(i=0; i 64) 198 | { 199 | /* HMAC long Key */ 200 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey; 201 | } 202 | else 203 | { 204 | /* HMAC short Key */ 205 | SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey; 206 | } 207 | HASH_Init(&SHA1_HASH_InitStructure); 208 | 209 | /* Configure the number of valid bits in last word of the Key */ 210 | HASH_SetLastWordValidBitsNbr(nbvalidbitskey); 211 | 212 | /* Write the Key */ 213 | for(i=0; i
© COPYRIGHT 2016 STMicroelectronics
68 | * 69 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 70 | * You may not use this file except in compliance with the License. 71 | * You may obtain a copy of the License at: 72 | * 73 | * http://www.st.com/software_license_agreement_liberty_v2 74 | * 75 | * Unless required by applicable law or agreed to in writing, software 76 | * distributed under the License is distributed on an "AS IS" BASIS, 77 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 78 | * See the License for the specific language governing permissions and 79 | * limitations under the License. 80 | * 81 | ****************************************************************************** 82 | */ 83 | 84 | /* Includes ------------------------------------------------------------------*/ 85 | #include "stm32f4xx_iwdg.h" 86 | 87 | /** @addtogroup STM32F4xx_StdPeriph_Driver 88 | * @{ 89 | */ 90 | 91 | /** @defgroup IWDG 92 | * @brief IWDG driver modules 93 | * @{ 94 | */ 95 | 96 | /* Private typedef -----------------------------------------------------------*/ 97 | /* Private define ------------------------------------------------------------*/ 98 | 99 | /* KR register bit mask */ 100 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA) 101 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC) 102 | 103 | /* Private macro -------------------------------------------------------------*/ 104 | /* Private variables ---------------------------------------------------------*/ 105 | /* Private function prototypes -----------------------------------------------*/ 106 | /* Private functions ---------------------------------------------------------*/ 107 | 108 | /** @defgroup IWDG_Private_Functions 109 | * @{ 110 | */ 111 | 112 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions 113 | * @brief Prescaler and Counter configuration functions 114 | * 115 | @verbatim 116 | =============================================================================== 117 | ##### Prescaler and Counter configuration functions ##### 118 | =============================================================================== 119 | 120 | @endverbatim 121 | * @{ 122 | */ 123 | 124 | /** 125 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 126 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 127 | * This parameter can be one of the following values: 128 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 129 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 130 | * @retval None 131 | */ 132 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 133 | { 134 | /* Check the parameters */ 135 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 136 | IWDG->KR = IWDG_WriteAccess; 137 | } 138 | 139 | /** 140 | * @brief Sets IWDG Prescaler value. 141 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 142 | * This parameter can be one of the following values: 143 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 144 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 145 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 146 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 147 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 148 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 149 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 150 | * @retval None 151 | */ 152 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 153 | { 154 | /* Check the parameters */ 155 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 156 | IWDG->PR = IWDG_Prescaler; 157 | } 158 | 159 | /** 160 | * @brief Sets IWDG Reload value. 161 | * @param Reload: specifies the IWDG Reload value. 162 | * This parameter must be a number between 0 and 0x0FFF. 163 | * @retval None 164 | */ 165 | void IWDG_SetReload(uint16_t Reload) 166 | { 167 | /* Check the parameters */ 168 | assert_param(IS_IWDG_RELOAD(Reload)); 169 | IWDG->RLR = Reload; 170 | } 171 | 172 | /** 173 | * @brief Reloads IWDG counter with value defined in the reload register 174 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 175 | * @param None 176 | * @retval None 177 | */ 178 | void IWDG_ReloadCounter(void) 179 | { 180 | IWDG->KR = KR_KEY_RELOAD; 181 | } 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** @defgroup IWDG_Group2 IWDG activation function 188 | * @brief IWDG activation function 189 | * 190 | @verbatim 191 | =============================================================================== 192 | ##### IWDG activation function ##### 193 | =============================================================================== 194 | 195 | @endverbatim 196 | * @{ 197 | */ 198 | 199 | /** 200 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 201 | * @param None 202 | * @retval None 203 | */ 204 | void IWDG_Enable(void) 205 | { 206 | IWDG->KR = KR_KEY_ENABLE; 207 | } 208 | 209 | /** 210 | * @} 211 | */ 212 | 213 | /** @defgroup IWDG_Group3 Flag management function 214 | * @brief Flag management function 215 | * 216 | @verbatim 217 | =============================================================================== 218 | ##### Flag management function ##### 219 | =============================================================================== 220 | 221 | @endverbatim 222 | * @{ 223 | */ 224 | 225 | /** 226 | * @brief Checks whether the specified IWDG flag is set or not. 227 | * @param IWDG_FLAG: specifies the flag to check. 228 | * This parameter can be one of the following values: 229 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 230 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 231 | * @retval The new state of IWDG_FLAG (SET or RESET). 232 | */ 233 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 234 | { 235 | FlagStatus bitstatus = RESET; 236 | /* Check the parameters */ 237 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 238 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 239 | { 240 | bitstatus = SET; 241 | } 242 | else 243 | { 244 | bitstatus = RESET; 245 | } 246 | /* Return the flag status */ 247 | return bitstatus; 248 | } 249 | 250 | /** 251 | * @} 252 | */ 253 | 254 | /** 255 | * @} 256 | */ 257 | 258 | /** 259 | * @} 260 | */ 261 | 262 | /** 263 | * @} 264 | */ 265 | 266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 267 | -------------------------------------------------------------------------------- /STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_qspi.c -------------------------------------------------------------------------------- /bsp/inc/USART1.h: -------------------------------------------------------------------------------- 1 | #ifndef _USART1_H__ 2 | #define _USART1_H__ 3 | #include "user_config.h" 4 | #include "stdio.h" 5 | static void USART1_GPIO_Config(void); 6 | static void USART1_Config(u16 baudrate); 7 | static void USART1_NVIC_Config(void); 8 | static void USART1_send_data(u8 data); 9 | static u8 USART1_Get_data(void); 10 | extern Sys_USART_structure USART1_struct; 11 | #endif 12 | -------------------------------------------------------------------------------- /bsp/inc/can_app.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/inc/can_app.h -------------------------------------------------------------------------------- /bsp/inc/can_bootloader.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/inc/can_bootloader.h -------------------------------------------------------------------------------- /bsp/inc/can_driver.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/inc/can_driver.h -------------------------------------------------------------------------------- /bsp/inc/crc16.h: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | -------------------------------------------------------------------------------- /bsp/inc/delay.h: -------------------------------------------------------------------------------- 1 | #ifndef __DELAY_H 2 | #define __DELAY_H 3 | #include "stm32f4xx.h" 4 | #include "user_config.h" 5 | typedef struct 6 | { 7 | union 8 | { 9 | __IO u32 all; 10 | struct 11 | { 12 | __IO u32 ENABLE:1; 13 | __IO u32 TICK_INT:1; 14 | __IO u32 CLKSOURCE:1; 15 | __IO u32 reserve:13; 16 | __IO u32 COUNTFLAG:1; 17 | __IO u32 reserve1:15; 18 | }bit; 19 | }STK_CTRL; 20 | union 21 | { 22 | __IO u32 all; 23 | struct 24 | { 25 | __IO u32 RELOAD:24; 26 | __IO u32 Reserved:8; 27 | }bit; 28 | }STK_LOAD; 29 | union 30 | { 31 | __IO u32 all; 32 | struct 33 | { 34 | __IO u32 CURRENT:24; 35 | __IO u32 Reserved:8; 36 | }bit; 37 | }STK_VAL; 38 | union 39 | { 40 | __I u32 all; 41 | struct 42 | { 43 | __I u32 TENMS:24; 44 | __I u32 Reserved:8; 45 | }bit; 46 | }STK_CALIB; 47 | }Sys_Tick_Reg; 48 | #define SYS_TICK_BASE ((u32)0xE000E010) 49 | #define Sys_Tick ((Sys_Tick_Reg *)SysTick_BASE) 50 | void delay_init(u8 SYSCLK); 51 | void delay_ms(u16 nms); 52 | void delay_us(u32 nus); 53 | #endif 54 | -------------------------------------------------------------------------------- /bsp/inc/hex_to_bin.h: -------------------------------------------------------------------------------- 1 | /* 2 | * hex_to_bin.h 3 | * 4 | * Created on: 2017?1?17? 5 | * Author: lpr 6 | */ 7 | 8 | #ifndef HEX_TO_BIN_INC_HEX_TO_BIN_H_ 9 | #define HEX_TO_BIN_INC_HEX_TO_BIN_H_ 10 | #define USE_DEBUG 1 11 | #include "user_config.h" 12 | #include "ff.h" 13 | //#include "printf.h" 14 | 15 | #define NUM_OFFSET 48 16 | #define CHAR_OFFSET 55 17 | typedef struct 18 | { 19 | unsigned char data_len; 20 | unsigned long int data_addr; 21 | unsigned long int data_base_addr; 22 | unsigned int data_addr_offset; 23 | unsigned char data_type; 24 | unsigned char Data[64]; 25 | }PACK_INFO; 26 | void Data_clear(unsigned char *data,unsigned long int len); 27 | unsigned char convertion(unsigned char *hex_data); 28 | void hex_to_bin(unsigned char *hex_src,unsigned char *bin_dst,unsigned char len); 29 | u8 Hex_to_Bin(void); 30 | u8 Bin_test(void); 31 | extern PACK_INFO pack_info; 32 | extern unsigned char read_buf[128]; 33 | extern unsigned char bin_buf[128]; 34 | 35 | #endif /* HEX_TO_BIN_INC_HEX_TO_BIN_H_ */ 36 | -------------------------------------------------------------------------------- /bsp/src/USART1.c: -------------------------------------------------------------------------------- 1 | #include "USARt1.h" 2 | Sys_USART_structure USART1_struct = 3 | { 4 | .GPIO_init = USART1_GPIO_Config, 5 | .USART_init = USART1_Config, 6 | .USART_IT_Config = NULL, 7 | .send_data = USART1_send_data, 8 | .receive_data = USART1_Get_data, 9 | .USART = USART1, 10 | }; 11 | static void USART1_GPIO_Config(void) 12 | { 13 | GPIO_InitTypeDef GPIO_init; 14 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA,ENABLE);//??IO???? 15 | 16 | GPIO_init.GPIO_Mode = GPIO_Mode_AF; 17 | GPIO_init.GPIO_OType = GPIO_OType_PP; 18 | GPIO_init.GPIO_Pin = GPIO_Pin_9|GPIO_Pin_10; 19 | GPIO_init.GPIO_PuPd = GPIO_PuPd_UP; 20 | GPIO_init.GPIO_Speed = GPIO_Speed_50MHz; 21 | GPIO_Init(GPIOA,&GPIO_init); 22 | GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_USART1); 23 | GPIO_PinAFConfig(GPIOA,GPIO_PinSource9,GPIO_AF_USART1); 24 | } 25 | static void USART1_Config(u16 baudrate) 26 | { 27 | USART_InitTypeDef USART_init; 28 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1,ENABLE); 29 | USART1_GPIO_Config(); 30 | USART_init.USART_BaudRate = baudrate; 31 | USART_init.USART_HardwareFlowControl = USART_HardwareFlowControl_None; 32 | USART_init.USART_Mode = USART_Mode_Rx|USART_Mode_Tx; 33 | USART_init.USART_Parity = USART_Parity_No;//??? 34 | USART_init.USART_StopBits = USART_StopBits_1; 35 | USART_init.USART_WordLength = USART_WordLength_8b; 36 | USART_Init(USART1_struct.USART,&USART_init); 37 | USART1_NVIC_Config(); 38 | USART_Cmd(USART1_struct.USART,ENABLE); 39 | } 40 | static void USART1_send_data(u8 data) 41 | { 42 | USART_SendData(USART1_struct.USART, (unsigned char) data); 43 | while (USART_GetFlagStatus(USART1_struct.USART, USART_FLAG_TXE) == RESET); 44 | // return (ch); 45 | } 46 | static void USART1_NVIC_Config(void) 47 | { 48 | /* 49 | NVIC_InitTypeDef USART1_NVIC_init; 50 | USART_ITConfig(UART4,USART_IT_RXNE,ENABLE); 51 | USART1_NVIC_init.NVIC_IRQChannel = USART1_IRQn; 52 | USART1_NVIC_init.NVIC_IRQChannelCmd = ENABLE; 53 | USART1_NVIC_init.NVIC_IRQChannelPreemptionPriority = 10; 54 | USART1_NVIC_init.NVIC_IRQChannelSubPriority = 0; 55 | NVIC_Init(&USART1_NVIC_init); 56 | */ 57 | } 58 | static u8 USART1_Get_data(void) 59 | { 60 | u8 temp; 61 | temp = USART_ReceiveData(USART1_struct.USART); 62 | return temp; 63 | } 64 | -------------------------------------------------------------------------------- /bsp/src/can_app.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/can_app.c -------------------------------------------------------------------------------- /bsp/src/can_bootloader.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/can_bootloader.c -------------------------------------------------------------------------------- /bsp/src/can_driver.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/can_driver.c -------------------------------------------------------------------------------- /bsp/src/delay.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/delay.c -------------------------------------------------------------------------------- /bsp/src/hex_to_bin - 副本.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/hex_to_bin - 副本.c -------------------------------------------------------------------------------- /bsp/src/hex_to_bin.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/bsp/src/hex_to_bin.c -------------------------------------------------------------------------------- /output/STM32-DSP-CAN-Boot.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/output/STM32-DSP-CAN-Boot.bin -------------------------------------------------------------------------------- /output/STM32-DSP-CAN-Boot.build_log.htm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/output/STM32-DSP-CAN-Boot.build_log.htm -------------------------------------------------------------------------------- /prj/DebugConfig/DSP_Boot_STM32F407IGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /prj/DebugConfig/Target_1_STM32F407IGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /prj/EventRecorderStub.scvd: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /prj/MDK删除.bat: -------------------------------------------------------------------------------- 1 | @del /f/q/s *.o 2 | @del /f/q/s *.crf 3 | @del /f/q/s *.bak 4 | @del /f/q/s *.d 5 | @del /f/q/s *.axf 6 | @del /f/q/s *.iex 7 | @del /f/q/s *.lnp 8 | @del /f/q/s *.flg 9 | @del /f/q/s *.tra 10 | @del /f/q/s *.sct 11 | @del /f/q/s *.i 12 | @del /f/q/s *._ip 13 | @del /f/q/s *.lst 14 | @del /f/q/s *.map 15 | @del /f/q/s *.dep 16 | @del /f/q *.txt 17 | @del /f/q/s *.__i 18 | @del /f/q/s *.plg 19 | @del /f/q/s *.ini 20 | @pause -------------------------------------------------------------------------------- /user/inc/main.h: -------------------------------------------------------------------------------- 1 | #ifndef __MAIN_H__ 2 | #define __MAIN_H__ 3 | #include "user_config.h" 4 | #include "delay.h" 5 | #define USE_NRF24L01 0 6 | #define USE_W25Q64 1 7 | #endif 8 | -------------------------------------------------------------------------------- /user/inc/stm32f4xx_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_conf.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 20-May-2016 7 | * @brief Library configuration file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_CONF_H 30 | #define __STM32F4xx_CONF_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | /* Uncomment the line below to enable peripheral header file inclusion */ 34 | #include "stm32f4xx_adc.h" 35 | #include "stm32f4xx_crc.h" 36 | #include "stm32f4xx_dbgmcu.h" 37 | #include "stm32f4xx_dma.h" 38 | #include "stm32f4xx_exti.h" 39 | #include "stm32f4xx_flash.h" 40 | #include "stm32f4xx_gpio.h" 41 | #include "stm32f4xx_i2c.h" 42 | #include "stm32f4xx_iwdg.h" 43 | #include "stm32f4xx_pwr.h" 44 | #include "stm32f4xx_rcc.h" 45 | #include "stm32f4xx_rtc.h" 46 | #include "stm32f4xx_sdio.h" 47 | #include "stm32f4xx_spi.h" 48 | #include "stm32f4xx_syscfg.h" 49 | #include "stm32f4xx_tim.h" 50 | #include "stm32f4xx_usart.h" 51 | #include "stm32f4xx_wwdg.h" 52 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 53 | 54 | #if defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) 55 | #include "stm32f4xx_cryp.h" 56 | #include "stm32f4xx_hash.h" 57 | #include "stm32f4xx_rng.h" 58 | #include "stm32f4xx_can.h" 59 | #include "stm32f4xx_dac.h" 60 | #include "stm32f4xx_dcmi.h" 61 | #include "stm32f4xx_dma2d.h" 62 | #include "stm32f4xx_fmc.h" 63 | #include "stm32f4xx_ltdc.h" 64 | #include "stm32f4xx_sai.h" 65 | #endif /* STM32F429_439xx || STM32F446xx || STM32F469_479xx */ 66 | 67 | #if defined(STM32F427_437xx) 68 | #include "stm32f4xx_cryp.h" 69 | #include "stm32f4xx_hash.h" 70 | #include "stm32f4xx_rng.h" 71 | #include "stm32f4xx_can.h" 72 | #include "stm32f4xx_dac.h" 73 | #include "stm32f4xx_dcmi.h" 74 | #include "stm32f4xx_dma2d.h" 75 | #include "stm32f4xx_fmc.h" 76 | #include "stm32f4xx_sai.h" 77 | #endif /* STM32F427_437xx */ 78 | 79 | #if defined(STM32F40_41xxx) 80 | #include "stm32f4xx_cryp.h" 81 | #include "stm32f4xx_hash.h" 82 | #include "stm32f4xx_rng.h" 83 | #include "stm32f4xx_can.h" 84 | #include "stm32f4xx_dac.h" 85 | #include "stm32f4xx_dcmi.h" 86 | #include "stm32f4xx_fsmc.h" 87 | #endif /* STM32F40_41xxx */ 88 | 89 | #if defined(STM32F410xx) 90 | #include "stm32f4xx_rng.h" 91 | #include "stm32f4xx_dac.h" 92 | #endif /* STM32F410xx */ 93 | 94 | #if defined(STM32F411xE) 95 | #include "stm32f4xx_flash_ramfunc.h" 96 | #endif /* STM32F411xE */ 97 | 98 | #if defined(STM32F446xx) || defined(STM32F469_479xx) 99 | #include "stm32f4xx_qspi.h" 100 | #endif /* STM32F446xx || STM32F469_479xx */ 101 | 102 | #if defined(STM32F410xx) || defined(STM32F446xx) 103 | #include "stm32f4xx_fmpi2c.h" 104 | #endif /* STM32F410xx || STM32F446xx */ 105 | 106 | #if defined(STM32F446xx) 107 | #include "stm32f4xx_spdifrx.h" 108 | #include "stm32f4xx_cec.h" 109 | #endif /* STM32F446xx */ 110 | 111 | #if defined(STM32F469_479xx) 112 | #include "stm32f4xx_dsi.h" 113 | #endif /* STM32F469_479xx */ 114 | 115 | #if defined(STM32F410xx) 116 | #include "stm32f4xx_lptim.h" 117 | #endif /* STM32F410xx */ 118 | 119 | #if defined(STM32F412xG) 120 | #include "stm32f4xx_rng.h" 121 | #include "stm32f4xx_can.h" 122 | #include "stm32f4xx_qspi.h" 123 | #include "stm32f4xx_rng.h" 124 | #include "stm32f4xx_fsmc.h" 125 | #include "stm32f4xx_dfsdm.h" 126 | #endif /* STM32F412xG */ 127 | 128 | /* Exported types ------------------------------------------------------------*/ 129 | /* Exported constants --------------------------------------------------------*/ 130 | 131 | /* If an external clock source is used, then the value of the following define 132 | should be set to the value of the external clock source, else, if no external 133 | clock is used, keep this define commented */ 134 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */ 135 | 136 | 137 | /* Uncomment the line below to expanse the "assert_param" macro in the 138 | Standard Peripheral Library drivers code */ 139 | /* #define USE_FULL_ASSERT 1 */ 140 | 141 | /* Exported macro ------------------------------------------------------------*/ 142 | #ifdef USE_FULL_ASSERT 143 | 144 | /** 145 | * @brief The assert_param macro is used for function's parameters check. 146 | * @param expr: If expr is false, it calls assert_failed function 147 | * which reports the name of the source file and the source 148 | * line number of the call that failed. 149 | * If expr is true, it returns no value. 150 | * @retval None 151 | */ 152 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 153 | /* Exported functions ------------------------------------------------------- */ 154 | void assert_failed(uint8_t* file, uint32_t line); 155 | #else 156 | #define assert_param(expr) ((void)0) 157 | #endif /* USE_FULL_ASSERT */ 158 | 159 | #endif /* __STM32F4xx_CONF_H */ 160 | 161 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 162 | -------------------------------------------------------------------------------- /user/inc/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 20-May-2016 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2016 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32F4xx_IT_H 30 | #define __STM32F4xx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32f4xx.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* __STM32F4xx_IT_H */ 59 | 60 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 61 | -------------------------------------------------------------------------------- /user/inc/user_config.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/user/inc/user_config.h -------------------------------------------------------------------------------- /user/src/main.c: -------------------------------------------------------------------------------- 1 | #include "delay.h" 2 | #include "stdio.h" 3 | #include "USARt1.h" 4 | #include "sdio_sd.h" 5 | #include "ff.h" 6 | #include "CANA.h" 7 | #include "IAP.h" 8 | CanTxMsg can_tx_msg; 9 | u8 temp = 0x01; 10 | u8 Status = 0xDE; 11 | SD_Error status = SD_OK; 12 | int main(void) 13 | { 14 | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4); 15 | delay_init(168); 16 | CANA_Config(); 17 | can_tx_msg.DLC = 1; 18 | can_tx_msg.IDE = CAN_ID_EXT; 19 | can_tx_msg.RTR = CAN_RTR_DATA; 20 | status = SD_Init(); 21 | 22 | if(status == SD_OK) 23 | { 24 | 25 | Status = CAN_IAP_Hex(0x134); 26 | CAN1_CanRxMsgFlag = 0; 27 | can_tx_msg.Data[0] = Status; 28 | CAN_WriteData(&can_tx_msg); 29 | } 30 | else 31 | { 32 | can_tx_msg.ExtId = 0x1235; 33 | 34 | CAN1_CanRxMsgFlag = 0; 35 | can_tx_msg.Data[0] = Status; 36 | CAN_WriteData(&can_tx_msg); 37 | } 38 | 39 | while (1) 40 | { 41 | if(CAN1_CanRxMsgFlag) 42 | { 43 | CAN1_CanRxMsgFlag = 0; 44 | can_tx_msg.Data[0] = Status; 45 | temp++; 46 | temp%=5; 47 | CAN_WriteData(&can_tx_msg); 48 | 49 | } 50 | } 51 | } 52 | -------------------------------------------------------------------------------- /user/src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c 4 | * @author MCD Application Team 5 | * @version V1.7.1 6 | * @date 20-May-2016 7 | * @brief Main Interrupt Service Routines. 8 | * This file provides template for all exceptions handler and 9 | * peripherals interrupt service routine. 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© COPYRIGHT 2016 STMicroelectronics

14 | * 15 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 16 | * You may not use this file except in compliance with the License. 17 | * You may obtain a copy of the License at: 18 | * 19 | * http://www.st.com/software_license_agreement_liberty_v2 20 | * 21 | * Unless required by applicable law or agreed to in writing, software 22 | * distributed under the License is distributed on an "AS IS" BASIS, 23 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 24 | * See the License for the specific language governing permissions and 25 | * limitations under the License. 26 | * 27 | ****************************************************************************** 28 | */ 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f4xx_it.h" 32 | 33 | /** @addtogroup Template_Project 34 | * @{ 35 | */ 36 | 37 | /* Private typedef -----------------------------------------------------------*/ 38 | /* Private define ------------------------------------------------------------*/ 39 | /* Private macro -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private function prototypes -----------------------------------------------*/ 42 | /* Private functions ---------------------------------------------------------*/ 43 | 44 | /******************************************************************************/ 45 | /* Cortex-M4 Processor Exceptions Handlers */ 46 | /******************************************************************************/ 47 | 48 | /** 49 | * @brief This function handles NMI exception. 50 | * @param None 51 | * @retval None 52 | */ 53 | void NMI_Handler(void) 54 | { 55 | } 56 | 57 | /** 58 | * @brief This function handles Hard Fault exception. 59 | * @param None 60 | * @retval None 61 | */ 62 | void HardFault_Handler(void) 63 | { 64 | /* Go to infinite loop when Hard Fault exception occurs */ 65 | while (1) 66 | { 67 | } 68 | } 69 | 70 | /** 71 | * @brief This function handles Memory Manage exception. 72 | * @param None 73 | * @retval None 74 | */ 75 | void MemManage_Handler(void) 76 | { 77 | /* Go to infinite loop when Memory Manage exception occurs */ 78 | while (1) 79 | { 80 | } 81 | } 82 | 83 | /** 84 | * @brief This function handles Bus Fault exception. 85 | * @param None 86 | * @retval None 87 | */ 88 | void BusFault_Handler(void) 89 | { 90 | /* Go to infinite loop when Bus Fault exception occurs */ 91 | while (1) 92 | { 93 | } 94 | } 95 | 96 | /** 97 | * @brief This function handles Usage Fault exception. 98 | * @param None 99 | * @retval None 100 | */ 101 | void UsageFault_Handler(void) 102 | { 103 | /* Go to infinite loop when Usage Fault exception occurs */ 104 | while (1) 105 | { 106 | } 107 | } 108 | 109 | /** 110 | * @brief This function handles SVCall exception. 111 | * @param None 112 | * @retval None 113 | */ 114 | void SVC_Handler(void) 115 | { 116 | } 117 | 118 | /** 119 | * @brief This function handles Debug Monitor exception. 120 | * @param None 121 | * @retval None 122 | */ 123 | void DebugMon_Handler(void) 124 | { 125 | } 126 | 127 | /** 128 | * @brief This function handles PendSVC exception. 129 | * @param None 130 | * @retval None 131 | */ 132 | void PendSV_Handler(void) 133 | { 134 | } 135 | 136 | /** 137 | * @brief This function handles SysTick Handler. 138 | * @param None 139 | * @retval None 140 | */ 141 | void SysTick_Handler(void) 142 | { 143 | 144 | } 145 | 146 | /******************************************************************************/ 147 | /* STM32F4xx Peripherals Interrupt Handlers */ 148 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ 149 | /* available peripheral interrupt handler's name please refer to the startup */ 150 | /* file (startup_stm32f4xx.s). */ 151 | /******************************************************************************/ 152 | 153 | /** 154 | * @brief This function handles PPP interrupt request. 155 | * @param None 156 | * @retval None 157 | */ 158 | /*void PPP_IRQHandler(void) 159 | { 160 | }*/ 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | 167 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 168 | -------------------------------------------------------------------------------- /user/src/user_config.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/596142041/STM32-DSP_CAN_Boot/fa1a49390e06f97699cb75b2d5ece05639ef167f/user/src/user_config.c --------------------------------------------------------------------------------