├── CNAME ├── Makefile ├── include ├── a64.hrl └── asm.hrl ├── src ├── a64.app.src ├── opcodes.hdr ├── opcodes.a64 ├── opcodes.fpu └── a64.erl ├── asm.c ├── README.md ├── asm.s └── index.html /CNAME: -------------------------------------------------------------------------------- 1 | a64.voxoz.com 2 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | default: 2 | mad com bun a64 3 | -------------------------------------------------------------------------------- /include/a64.hrl: -------------------------------------------------------------------------------- 1 | -define(VERSION,""). 2 | -------------------------------------------------------------------------------- /src/a64.app.src: -------------------------------------------------------------------------------- 1 | {application, a64, 2 | [{description, "A64 ARM64 Assembler"}, 3 | {vsn, "0.6.4"}, 4 | {registered, []}, 5 | {applications, [kernel,stdlib]}, 6 | {env, []}]}. 7 | -------------------------------------------------------------------------------- /asm.c: -------------------------------------------------------------------------------- 1 | // how to get ARM64 assembly on mac: 2 | // clang -isysroot $(xcrun --sdk iphoneos --show-sdk-path) -arch arm64 asm.c -o asm.o 3 | // objdump -disassemble asm.o 4 | #include 5 | int main( ) { 6 | printf("Hello, world!\n"); 7 | } 8 | // then parse it in Erlang! 9 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | A64: ARM64 Assembler 2 | ==================== 3 | 4 | Build 5 | ----- 6 | 7 | ``` 8 | $ make 9 | $ ./a64 asm.s 10 | $ hexdump asm 11 | 0000000 d1 00 83 ff a9 01 7b fd 91 00 43 fd 90 00 00 08 12 | 0000010 91 3e a1 08 52 80 00 00 b8 1f c3 a0 91 00 83 ff 13 | ``` 14 | 15 | Credits 16 | ------- 17 | 18 | * Maxim Sokhatsky 19 | -------------------------------------------------------------------------------- /asm.s: -------------------------------------------------------------------------------- 1 | at s12e1r, x3 2 | and x8, x7, x3, ror #2 3 | sub sp, sp, #32 4 | stp x29, x30, [sp, #16] 5 | add x29, sp, #16 6 | adrp x8, #0 7 | add x8, x8, #4008 8 | adds x1,x2, w0, uxth #3 9 | mov w0, #0 10 | stur w0, [x29, #-4] 11 | mov x0, x8 12 | bl [#24,0x100007f78] 13 | ldur w9, [x29, #-4] 14 | mov x0, x9 15 | ldp x29, x30, [sp, #16] 16 | add sp, sp, #32 17 | ret 18 | -------------------------------------------------------------------------------- /src/opcodes.hdr: -------------------------------------------------------------------------------- 1 | % SYNRC A64 DASM 2 | 3 | +---------------------= 32/64-bit 4 | | 5 | | +-----------------= S 6 | | | +-+-+-+---------= Opcode 7 | | | 0 0 0 0 --------= UDF 8 | | | 0 0 0 1 --------= N/A 9 | | | 0 0 1 x --------= N/A 10 | | | 1 0 0 x --------= Data Processing Immediate 11 | | | 1 0 1 x --------= Branching, System, Exceptions 12 | | | x 1 x 0 --------= Loads and Stores 13 | | | x 1 0 1 --------= Data Processing Register 14 | | | x 1 1 1 --------= Data Processing Scalar FPU and SIMD 15 | | | | | | | 16 | | | | | | | 17 | 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 18 | +-------------+ +-------------+ +-------------+ +-------------+ 19 | | MSB | | | | | | LSB | 20 | +-------------+ +-------------+ +-------------+ +-------------+ 21 | 22 | -------------------------------------------------------------------------------- /index.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | A64 9 | 10 | 11 | 12 | 16 |

17 |

18 |

A64

19 |

20 | 35 |

36 |

37 |

RUN

38 |


39 |  $ make
40 |  $ ./a64 asm.s
41 |  $ hexdump asm
42 |  0000000 d1 00 83 ff a9 01 7b fd 91 00 43 fd 90 00 00 08
43 |  0000010 91 3e a1 08 52 80 00 00 b8 1f c3 a0 91 00 83 ff
44 |

45 |

46 |

47 | 48 | 51 | 52 | 53 | 54 | -------------------------------------------------------------------------------- /include/asm.hrl: -------------------------------------------------------------------------------- 1 | -ifndef(A64_HRL). 2 | -define(A64_HRL, true). 3 | 4 | -define(x(C), (C==x0 orelse C==x1 orelse C==x2 orelse C==x3 orelse C==x4 orelse C==x5 orelse C==x6 orelse C==x7 orelse 5 | C==x8 orelse C==x9 orelse C==x10 orelse C==x11 orelse C==x12 orelse C==x13 orelse C==x14 orelse C==x15 orelse 6 | C==x16 orelse C==x17 orelse C==x18 orelse C==x19 orelse C==x20 orelse C==x21 orelse C==x22 orelse C==x23 orelse 7 | C==x24 orelse C==x25 orelse C==x26 orelse C==x27 orelse C==x28 orelse C==x29 orelse C==x30 orelse C==sp)). 8 | 9 | -define(w(C), (C==w0 orelse C==w1 orelse C==w2 orelse C==w3 orelse C==w4 orelse C==w5 orelse C==w6 orelse C==w7 orelse 10 | C==w8 orelse C==w9 orelse C==w10 orelse C==w11 orelse C==w12 orelse C==w13 orelse C==w14 orelse C==w15 orelse 11 | C==w16 orelse C==w17 orelse C==w18 orelse C==w19 orelse C==w20 orelse C==w21 orelse C==w22 orelse C==w23 orelse 12 | C==w24 orelse C==w25 orelse C==w26 orelse C==w27 orelse C==w28 orelse C==w29 orelse C==w30 orelse C==wsp)). 13 | 14 | -define(imm(X), is_integer(X)). 15 | -define(op(X), (X == s1e1r orelse X == s1e1w orelse X == s1e0r orelse X == s1e0w orelse X == s1e2r 16 | orelse X == s1e2w orelse X == s12e1r orelse X == s12e1w orelse X == s12e0r orelse X == s12e0w 17 | orelse X == s1e3r orelse X == s1e3w orelse X == s1e1rp orelse X == s1e1wp)). 18 | -define(imm3(X), (is_integer(X) andalso X < 8)). 19 | -define(imm6(X), (is_integer(X) andalso X < 64)). 20 | -define(imm9(X), (is_integer(X) andalso X < 512)). 21 | -define(imm10(X), (is_integer(X) andalso X < 1024)). 22 | -define(imm12(X), (is_integer(X) andalso X < 4096)). 23 | -define(imm13(X), (is_integer(X) andalso X < 8192)). 24 | -define(imm16(X), (is_integer(X) andalso X < 65536)). 25 | -define(imm21(X), (is_integer(X) andalso X < 2097152)). 26 | -define(sh3(X), (X==lsl orelse X == lsr orelse X == asr)). 27 | -define(sh4(X), (X==lsl orelse X == lsr orelse X == asr orelse X == ror)). 28 | -define(extend(X), (X == uxtb orelse X == uxth orelse X == uxtw orelse X == uxtx orelse 29 | X == sxtb orelse X == sxth orelse X == sxtw orelse X == sxtx)). 30 | 31 | -endif. 32 | -------------------------------------------------------------------------------- /src/opcodes.a64: -------------------------------------------------------------------------------- 1 | 0 0 0 0 0 0 0 0 0 0 0 % C6.2.312 UDF 2 | 0 x 0 0 1 0 0 0 0 0 0 % C6.2.286 STXRB % C6.2.253 STLXRB % C6.2.254 STLXRH 3 | 0 x 0 0 1 0 0 0 0 i 1 % C6.2.039 CASP, CASPA, CASPAL, CASPL 4 | 0 x 0 0 1 0 0 0 0 1 0 % C6.2.106 LDAXRH % C6.2.105 LDAXRB % C6.2.163 LDXRB 5 | 0 0 0 0 1 0 0 0 1 0 0 % C6.2.246 STLRB 6 | 0 0 0 0 1 0 0 0 1 1 0 % C6.2.101 LDARB % C6.2.113 LDLARB 7 | 0 0 0 0 1 0 0 0 1 0 0 % C6.2.242 STLLRB % C6.2.243 STLLRH 8 | 0 0 0 0 1 0 0 0 1 i 1 % C6.2.037 CASB, CASAB, CASALB, CASLB 9 | x 0 1 0 1 0 0 0 0 0 _ % C6.2.255 STNP 10 | x 0 1 0 1 0 0 0 0 1 _ % C6.2.116 LDNP 11 | x 0 1 0 1 0 0 0 1 0 _ % C6.2.256 STP 12 | x 0 1 0 1 0 0 0 1 1 _ % C6.2.117 LDP 13 | 0 1 0 0 1 0 0 0 0 1 0 % C6.2.164 LDXRH 14 | 0 1 0 0 1 0 0 0 1 0 0 % C6.2.247 STLRH 15 | 0 1 0 0 1 0 0 0 1 1 0 % C6.2.102 LDARH % C6.2.114 LDLARH 16 | 0 1 0 0 1 0 0 0 1 i 1 % C6.2.038 CASH, CASAH, CASALH, CASLH 17 | 0 1 1 0 1 0 0 i i 1 _ % C6.2.118 LDPSW 18 | 1 x 0 0 1 0 0 0 0 0 0 % C6.2.252 STLXR % C6.2.285 STXR 19 | 1 x 0 0 1 0 0 0 0 0 1 % C6.2.251 STLXP % C6.2.284 STXP 20 | 1 x 0 0 1 0 0 0 0 1 0 % C6.2.104 LDAXR % C6.2.162 LDXR 21 | 1 x 0 0 1 0 0 0 0 1 1 % C6.2.103 LDAXP % C6.2.161 LDXP 22 | 1 x 0 0 1 0 0 0 1 0 0 % C6.2.244 STLLR % C6.2.245 STLR 23 | 1 x 0 0 1 0 0 0 1 1 0 % C6.2.100 LDAR % C6.2.115 LDLAR 24 | 1 x 0 0 1 0 0 0 1 i 1 % C6.2.040 CAS, CASA, CASAL, CASL 25 | x 0 0 0 1 0 1 0 s s 0 % C6.2.012 AND (shifted register) 26 | x 0 0 0 1 0 1 0 s s 1 % C6.2.029 BIC (shifted register) 27 | x 0 1 0 1 0 1 0 0 0 0 % C6.2.177 MOV (register) 28 | x 0 1 0 1 0 1 0 s s 1 % C6.2.186 MVN % C6.2.192 ORN (shifted register) 29 | x 1 0 0 1 0 1 0 s s 0 % C6.2.078 EOR (shifted register) 30 | x 1 0 0 1 0 1 0 s s 1 % C6.2.076 EON (shifted register) 31 | x 1 1 0 1 0 1 0 s s 0 % C6.2.014 ANDS (shifted register) % C6.2.308 TST (shifted register) 32 | x 1 1 0 1 0 1 0 s s 1 % C6.2.030 BICS (shifted register) 33 | x 0 0 0 1 0 1 1 0 0 1 % C6.2.001 ADC % C6.2.003 ADD (extended register) 34 | x 0 0 0 1 0 1 1 s s 0 % C6.2.005 ADD (shifted register) 35 | x 0 1 0 1 0 1 1 0 0 1 % C6.2.006 ADDS (extended register) % C6.2.53 CMN (extended register) 36 | x 0 1 0 1 0 1 1 s s 0 % C6.2.008 ADDS (shifted register) % C6.2.55 CMN (shifted register) 37 | x 1 0 0 1 0 1 1 0 0 1 % C6.2.288 SUB (extended register) 38 | x 1 0 0 1 0 1 1 s s 0 % C6.2.290 SUB (shifted register) % C6.2.187 NEG (shifted register) 39 | x 1 1 0 1 0 1 1 0 0 1 % C6.2.056 CMP (extended register) % C6.2.291 SUBS (extended register) 40 | x 1 1 0 1 0 1 1 s s 0 % C6.2.058 CMP (shifted register) % C6.2.293 SUBS (shifted register) % C6.2.188 NEGS 41 | x i i 1 0 0 0 0 _ _ _ % C6.2.009 ADR % C6.2.010 ADRP 42 | x 0 0 1 0 0 0 1 0 s _ % C6.2.004 ADD (immediate) % C6.2.173 MOV (to/from SP) 43 | x 1 0 1 0 0 0 1 0 s _ % C6.2.289 SUB (immediate) 44 | x 0 1 1 0 0 0 1 0 s _ % C6.2.007 ADDS (immediate) % C6.2.54 CMN (immediate) 45 | x 1 1 1 0 0 0 1 0 s _ % C6.2.057 CMP (immediate) % C6.2.292 SUBS (immediate) 46 | x 0 0 1 0 0 1 0 0 n _ % C6.2.011 AND (immediate) 47 | x 0 0 1 0 0 1 0 1 h w % C6.2.174 MOV (inverted wide immediate) % C6.2.179 MOVN % C6.2.221 SBFX % C6.2.298 SXTB % C6.2.299 SXTH % C6.2.300 SXTW 48 | x 0 0 1 0 0 1 1 0 n _ % C6.2.016 ASR (immediate) % C6.2.219 SBFIZ % C6.2.220 SBFM % C6.2.221 SBFX % C6.2.298 SXTB % C6.2.299 SXTH % C6.2.300 SXTW 49 | x 0 0 1 0 0 1 1 1 n 0 % C6.2.082 EXTR % C6.2.214 ROR (immediate) 50 | x 0 1 1 0 0 1 0 0 n _ % C6.2.176 MOV (bitmask immediate) % C6.2.193 ORR (immediate) 51 | x 0 1 1 0 0 1 1 0 n _ % C6.2.025 BFC % C6.2.26 BFI % C6.2.27 BFM % C6.2.28 BFXIL 52 | x 1 0 1 0 0 1 0 0 n _ % C6.2.077 EOR (immediate) 53 | x 1 0 1 0 0 1 0 1 h w % C6.2.175 MOV (wide immediate) % C6.2.180 MOVZ 54 | x 1 0 1 0 0 1 1 0 n _ % C6.2.166 LSL (immediate) % C6.2.169 LSR (immediate) % C6.2.309 UBFIZ % C6.2.310 UBFM % C6.2.311 UBFX % C6.2.319 UXTB % C6.2.320 UXTH 55 | x 1 1 1 0 0 1 0 0 n _ % C6.2.013 ANDS (immediate) % C6.2.307 TST (immediate) 56 | x 1 1 1 0 0 1 0 1 h w % C6.2.178 MOVK 57 | 0 0 0 1 0 1 _ _ _ _ _ % C6.2.024 B 58 | 0 1 0 1 0 1 0 0 _ _ _ % C6.2.023 B.cond 59 | x 0 1 1 0 1 0 0 _ _ _ % C6.2.042 CBZ 60 | x 0 1 1 0 1 0 1 _ _ _ % C6.2.041 CBNZ 61 | 1 0 0 1 0 1 _ _ _ _ _ % C6.2.031 BL 62 | 1 1 0 1 0 1 0 0 0 0 0 % C6.2.085 HVC % C6.2.227 SMC % C6.2.294 SVC 63 | 1 1 0 1 0 1 0 0 0 0 1 % C6.2.036 BRK 64 | 1 1 0 1 0 1 0 0 0 1 0 % C6.2.084 HLT 65 | 1 1 0 1 0 1 0 0 1 0 1 % C6.2.070 DCPS1 % C6.2.071 DCPS2 % C6.2.072 DCPS3 % C6.2.073 DMB 66 | 1 1 0 1 0 1 0 1 0 0 0 % C6.2.018 AT % C6.2.047 CFINV % C6.2.050 CLREX % C6.2.021 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA % C6.2.022 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB % C6.2.062 CSDB % C6.2.069 DC % C6.2.075 DSB % C6.2.081 ESB % C6.2.083 HINT % C6.2.086 IC % C6.2.087 ISB % C6.2.182 MSR (immediate) % C6.2.183 MSR (register) % C6.2.198 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA % C6.2.204 PSB CSYNC % C6.2.205 PSSBB % C6.2.224 SEV % C6.2.225 SEVL % C6.2.232 SSBB % C6.2.301 SYS % C6.2.305 TLBI % C6.2.306 TSB CSYNC % C6.2.321 WFE % C6.2.322 WFI % C6.2.324 YIELD % C6.2.191 NOP 67 | 1 1 0 1 0 1 0 1 0 0 1 % C6.2.181 MRS % C6.2.302 SYSL 68 | x 0 1 1 0 1 1 0 _ _ _ % C6.2.304 TBZ 69 | x 0 1 1 0 1 1 1 _ _ _ % C6.2.303 TBNZ 70 | 1 1 0 1 0 1 1 0 0 0 0 % C6.2.034 BR 71 | 1 1 0 1 0 1 1 0 0 0 1 % C6.2.032 BLR 72 | 1 1 0 1 0 1 1 0 0 1 0 % C6.2.207 RET % C6.2.208 RETAA, RETAB 73 | 1 1 0 1 0 1 1 0 1 0 0 % C6.2.079 ERET % C6.2.080 ERETAA, ERETAB 74 | 1 1 0 1 0 1 1 0 1 0 1 % C6.2.074 DRPS 75 | 1 1 0 1 0 1 1 z 0 0 0 % C6.2.035 BRAA, BRAAZ, BRAB, BRABZ 76 | 1 1 0 1 0 1 1 z 0 0 1 % C6.2.033 BLRAA, BLRAAZ, BLRAB, BLRABZ 77 | 0 x 0 1 1 0 0 0 _ _ _ % C6.2.120 LDR (literal) 78 | 0 0 1 1 1 0 0 0 0 0 0 % C6.2.273 STTRB % C6.2.282 STURB 79 | 0 0 1 1 1 0 0 0 0 0 1 % C6.2.260 STRB (register) 80 | 0 0 1 1 1 0 0 0 0 1 0 % C6.2.144 LDTRB % C6.2.156 LDURB 81 | 0 0 1 1 1 0 0 0 0 1 1 % C6.2.124 LDRB (register) 82 | 0 0 1 1 1 0 0 0 1 0 1 % C6.2.092 LDAPRB 83 | 0 0 1 1 1 0 0 0 1 i 1 % C6.2.128 LDRSB (register) 84 | 0 0 1 1 1 0 0 0 1 x 0 % C6.2.146 LDTRSB % C6.2.158 LDURSB 85 | 0 0 1 1 1 0 0 0 a r 1 % C6.2.088 LDADDB, LDADDAB, LDADDALB, LDADDLB % C6.2.233 STADDB, STADDLB % C6.2.107 LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB % C6.2.236 STCLRB, STCLRLB % C6.2.110 LDEORB, LDEORAB, LDEORALB, LDEORLB % C6.2.239 STEORB, STEORLB % C6.2.134 LDSETB, LDSETAB, LDSETALB, LDSETLB % C6.2.263 STSETB, STSETLB % C6.2.137 LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB % C6.2.266 STSMAXB, STSMAXLB % C6.2.140 LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB % C6.2.269 STSMINB, STSMINLB % C6.2.149 LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB % C6.2.275 STUMAXB, STUMAXLB % C6.2.152 LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB % C6.2.278 STUMINB, STUMINLB % C6.2.295 SWPB, SWPAB, SWPALB, SWPLB 86 | 0 0 1 1 1 0 0 i 0 0 _ % C6.2.259 STRB (immediate) 87 | 0 0 1 1 1 0 0 i 0 1 i % C6.2.123 LDRB (immediate) 88 | 0 0 1 1 1 0 0 i 1 i i % C6.2.127 LDRSB (immediate) 89 | 0 1 1 1 1 0 0 0 0 0 0 % C6.2.274 STTRH % C6.2.283 STURH 90 | 0 1 1 1 1 0 0 0 0 0 1 % C6.2.262 STRH (register) 91 | 0 1 1 1 1 0 0 0 0 1 0 % C6.2.145 LDTRH % C6.2.157 LDURH 92 | 0 1 1 1 1 0 0 0 0 1 1 % C6.2.126 LDRH (register) 93 | 0 1 1 1 1 0 0 0 1 0 1 % C6.2.093 LDAPRH 94 | 0 1 1 1 1 0 0 0 1 x 0 % C6.2.147 LDTRSH % C6.2.159 LDURSH 95 | 0 1 1 1 1 0 0 0 1 x 1 % C6.2.130 LDRSH (register) 96 | 0 1 1 1 1 0 0 0 a r 1 % C6.2.089 LDADDH, LDADDAH, LDADDALH, LDADDLH % C6.2.234 STADDH, STADDLH % C6.2.108 LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH % C6.2.237 STCLRH, STCLRLH % C6.2.111 LDEORH, LDEORAH, LDEORALH, LDEORLH % C6.2.240 STEORH, STEORLH % C6.2.135 LDSETH, LDSETAH, LDSETALH, LDSETLH % C6.2.264 STSETH, STSETLH % C6.2.138 LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH % C6.2.267 STSMAXH, STSMAXLH % C6.2.141 LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH % C6.2.270 STSMINH, STSMINLH % C6.2.150 LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH % C6.2.276 STUMAXH, STUMAXLH % C6.2.153 LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH % C6.2.279 STUMINH, STUMINLH % C6.2.296 SWPH, SWPAH, SWPALH, SWPLH 97 | 0 1 1 1 1 0 0 i 0 0 _ % C6.2.261 STRH (immediate) 98 | 0 1 1 1 1 0 0 i 0 1 i % C6.2.125 LDRH (immediate) 99 | 0 1 1 1 1 0 0 i 1 x i % C6.2.129 LDRSH (immediate) 100 | 0 1 1 1 1 0 0 i 0 0 _ % C6.2.261 STRH (immediate) 101 | 0 1 1 1 1 0 0 i 0 1 i % C6.2.125 LDRH (immediate) 102 | 0 1 1 1 1 0 0 i 1 x i % C6.2.129 LDRSH (immediate) 103 | 0 1 0 1 1 0 0 1 0 0 0 % C6.2.250 STLURH 104 | 0 1 0 1 1 0 0 1 0 1 0 % C6.2.096 LDAPURH 105 | 0 1 0 1 1 0 0 1 1 i 0 % C6.2.098 LDAPURSH 106 | 0 0 0 1 1 0 0 1 0 0 0 % C6.2.249 STLURB 107 | 0 0 0 1 1 0 0 1 0 1 0 % C6.2.095 LDAPURB 108 | 0 0 0 1 1 0 0 1 1 i 0 % C6.2.097 LDAPURSB 109 | 1 0 1 1 1 0 0 0 1 0 0 % C6.2.148 LDTRSW % C6.2.160 LDURSW 110 | 1 0 1 1 1 0 0 i 1 0 i % C6.2.131 LDRSW (immediate) % C6.2.133 LDRSW (register) 111 | 1 0 0 1 1 0 0 0 _ _ _ % C6.2.132 LDRSW (literal) 112 | 1 0 0 1 1 0 0 1 1 0 0 % C6.2.099 LDAPURSW 113 | 1 x 0 1 1 0 0 1 0 0 0 % C6.2.248 STLUR 114 | 1 x 0 1 1 0 0 1 0 1 0 % C6.2.094 LDAPUR 115 | 1 x 1 1 1 0 0 0 0 0 0 % C6.2.272 STTR % C6.2.281 STUR 116 | 1 x 1 1 1 0 0 0 0 0 1 % C6.2.258 STR (register) 117 | 1 x 1 1 1 0 0 0 0 1 0 % C6.2.143 LDTR % C6.2.155 LDUR 118 | 1 x 1 1 1 0 0 0 0 1 1 % C6.2.121 LDR (register) 119 | 1 x 1 1 1 0 0 0 1 0 1 % C6.2.091 LDAPR 120 | 1 x 1 1 1 0 0 0 a r 1 % C6.2.090 LDADD, LDADDA, LDADDAL, LDADDL % C6.2.235 STADD, STADDL % C6.2.109 LDCLR, LDCLRA, LDCLRAL, LDCLRL % C6.2.238 STCLR, STCLRL % C6.2.112 LDEOR, LDEORA, LDEORAL, LDEORL % C6.2.241 STEOR, STEORL % C6.2.136 LDSET, LDSETA, LDSETAL, LDSETL % C6.2.265 STSET, STSETL % C6.2.139 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL % C6.2.268 STSMAX, STSMAXL % C6.2.142 LDSMIN, LDSMINA, LDSMINAL, LDSMINL % C6.2.271 STSMIN, STSMINL % C6.2.151 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL % C6.2.277 STUMAX, STUMAXL % C6.2.154 LDUMIN, LDUMINA, LDUMINAL, LDUMINL % C6.2.280 STUMIN, STUMINL % C6.2.297 SWP, SWPA, SWPAL, SWPL 121 | 1 x 1 1 1 0 0 i 0 0 _ % C6.2.257 STR (immediate) 122 | 1 x 1 1 1 0 0 i 0 1 i % C6.2.119 LDR (immediate) 123 | 1 1 0 1 1 0 0 0 _ _ _ % C6.2.201 PRFM (literal) 124 | 1 1 1 1 1 0 0 0 1 0 0 % C6.2.203 PRFUM 125 | 1 1 1 1 1 0 0 0 1 0 1 % C6.2.202 PRFM (register) 126 | 1 1 1 1 1 0 0 0 m s 1 % C6.2.122 LDRAA, LDRAB 127 | 1 1 1 1 1 0 0 0 m s 1 % C6.2.122 LDRAA, LDRAB 128 | 1 1 1 1 1 0 0 1 1 0 _ % C6.2.200 PRFM (immediate) 129 | 0 0 1 1 1 0 1 0 0 0 0 % C6.2.223 SETF8, SETF16 130 | x 0 0 1 1 0 1 0 1 0 0 % C6.2.048 CINC % C6.2.66 CSINC % C6.2.64 CSET % C6.2.063 CSEL 131 | x 0 0 1 1 0 1 0 1 1 0 % C6.2.015 ASR (register) % C6.2.17 ASRV % C6.2.060 CRC32B, CRC32H, CRC32W, CRC32X % C6.2.061 CRC32CB, CRC32CH, CRC32CW, CRC32CX % C6.2.165 LSL (register) % C6.2.167 LSLV % C6.2.168 LSR (register) % C6.2.170 LSRV % C6.2.215 ROR (register) % C6.2.216 RORV % C6.2.222 SDIV % C6.2.313 UDIV 132 | x 0 0 1 1 0 1 1 0 0 0 % C6.2.171 MADD % C6.2.185 MUL % C6.2.172 MNEG % C6.2.184 MSUB 133 | x 0 1 1 1 0 1 0 0 0 0 % C6.2.002 ADCS 134 | x 0 1 1 1 0 1 0 0 1 0 % C6.2.043 CCMN (immediate) % C6.2.044 CCMN (register) 135 | x 0 1 1 1 0 1 0 0 0 0 % C6.2.002 ADCS 136 | x 1 0 1 1 0 1 0 0 0 0 % C6.2.189 NGC % C6.2.217 SBC 137 | x 1 0 1 1 0 1 0 1 0 0 % C6.2.049 CINV % C6.2.65 CSETM % C6.2.67 CSINV 138 | x 1 0 1 1 0 1 0 1 0 0 % C6.2.059 CNEG % C6.2.68 CSNEG 139 | x 1 0 1 1 0 1 0 1 1 0 % C6.2.051 CLS 140 | x 1 0 1 1 0 1 0 1 1 0 % C6.2.052 CLZ 141 | x 1 0 1 1 0 1 0 1 1 0 % C6.2.206 RBIT 142 | x 1 0 1 1 0 1 0 1 1 0 % C6.2.209 REV % C6.2.210 REV16 % C6.2.212 REV64 143 | x 1 0 1 1 0 1 0 0 0 0 % C6.2.189 NGC % C6.2.217 SBC 144 | x 1 1 1 1 0 1 0 0 0 0 % C6.2.190 NGCS % C6.2.218 SBCS 145 | x 1 1 1 1 0 1 0 0 1 0 % C6.2.045 CCMP (immediate) % C6.2.046 CCMP (register) 146 | 1 0 0 1 1 0 1 0 1 1 0 % C6.2.197 PACGA 147 | 1 0 0 1 1 0 1 1 0 0 1 % C6.2.226 SMADDL % C6.2.231 SMULL % C6.2.228 SMNEGL % C6.2.229 SMSUBL 148 | 1 0 0 1 1 0 1 1 0 1 0 % C6.2.230 SMULH 149 | 1 0 0 1 1 0 1 1 1 0 1 % C6.2.314 UMADDL % C6.2.318 UMULL % C6.2.315 UMNEGL % C6.2.316 UMSUBL 150 | 1 0 0 1 1 0 1 1 1 1 0 % C6.2.317 UMULH 151 | 1 0 1 1 1 0 1 0 0 0 0 % C6.2.213 RMIF 152 | 1 1 0 1 1 0 1 0 1 1 0 % C6.2.019 AUTDA, AUTDZA % C6.2.020 AUTDB, AUTDZB % C6.2.021 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA % C6.2.022 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB % C6.2.195 PACDA, PACDZA % C6.2.196 PACDB, PACDZB % C6.2.211 REV32 % C6.2.323 XPACD, XPACI, XPACLRI 153 | 1 1 0 1 1 0 1 0 1 1 1 % C6.2.199 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB -------------------------------------------------------------------------------- /src/opcodes.fpu: -------------------------------------------------------------------------------- 1 | 0 x 0 s 1 1 1 0 s s 1 ... 0 | 1 0 1 1 1 0 % C7.2.001 ABS 2 | 0 x 0 s 1 1 1 0 s s 1 ... _ | 1 0 0 0 0 1 % C7.2 002 ADD (vector) 3 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 0 0 0 0 % C7.2.003 ADDHN, ADDHN2 4 | 0 1 0 1 1 1 1 0 s s 1 ... 1 | 1 0 1 1 1 0 % C7.2.004 ADDP (scalar) 5 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 1 1 1 1 % C7.2.005 ADDP (vector) 6 | 0 x 0 0 1 1 1 0 s s 1 ... 1 | 1 0 1 1 1 0 % C7.2.006 ADDV 7 | 0 1 0 0 1 1 1 0 0 0 1 ... 0 | 0 1 0 1 1 0 % C7.2.007 AESD - AES single round decryption. 8 | 0 1 0 0 1 1 1 0 0 0 1 ... 0 | 0 1 0 0 1 0 % C7.2.008 AESE - AES single round encryption. 9 | 0 1 0 0 1 1 1 0 0 0 1 ... 0 | 0 1 1 1 1 0 % C7.2.009 AESIMC - AES inverse mix columns. 10 | 0 1 0 0 1 1 1 0 0 0 1 ... 0 | 0 1 1 0 1 0 % C7.2.010 AESMC - AES mix columns. 11 | 0 x 0 0 1 1 1 0 0 0 1 ... _ | 0 0 0 1 1 1 % C7.2.011 AND (vector) 12 | 1 1 0 0 1 1 1 0 0 0 1 ... _ | 0 _ _ _ _ _ % C7.2.012 BCAX 13 | 0 x 1 0 1 1 1 1 0 0 0 ... c | x x x 1 0 1 % C7.2.013 BIC (vector, immediate) 14 | 0 x 0 0 1 1 1 0 0 1 1 ... _ | 0 0 0 1 1 1 % C7.2.014 BIC (vector, register) 15 | 0 x s 0 1 1 1 1 1 0 i ... _ | 1 1 0 0 h 0 % C7.2.120 FMLSL, FMLSL2 (by element) 16 | 0 x s 0 1 1 1 0 1 0 1 ... _ | 1 1 0 0 1 1 % C7.2.121 FMLSL, FMLSL2 (vector) 17 | 0 x x 0 1 1 1 1 0 0 0 ... _ | 1 1 1 1 0 1 % C7.2.122 FMOV (vector, immediate) 18 | 0 0 0 1 1 1 1 0 x x 1 ... 0 | 0 1 0 0 0 0 % C7.2.123 FMOV (register) 19 | x 0 0 1 1 1 1 0 x x 1 ... _ | 0 0 0 0 0 0 % C7.2.124 FMOV (general) 20 | 0 0 0 1 1 1 1 0 x x 1 ... _ | _ _ _ 1 0 0 % C7.2.125 FMOV (scalar, immediate) 21 | 0 0 0 1 1 1 1 1 x x 1 ... _ | 1 _ _ _ _ _ % C7.2.126 FMSUB 22 | 0 x 1 0 1 1 1 0 1 x 1 ... 0 | 1 1 1 1 1 0 % C7.2.132 FNEG (vector) 23 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 0 1 0 0 0 0 % C7.2.133 FNEG (scalar) 24 | 0 0 0 1 1 1 1 1 s s 1 ... _ | 0 _ _ _ _ _ % C7.2.134 FNMADD 25 | 0 0 0 1 1 1 1 1 s s 1 ... _ | 1 _ _ _ _ _ % C7.2.135 FNMSUB 26 | 0 0 0 1 1 1 1 0 s s 1 ... _ | 1 0 0 0 1 0 % C7.2.136 FNMUL (scalar) 27 | 0 1 0 1 1 1 1 0 1 x 1 ... 1 | 1 1 0 1 1 0 % C7.2.137 FRECPE 28 | 0 1 0 1 1 1 1 0 0 x 1 ... _ | p p 1 1 1 1 % C7.2.138 FRECPS 29 | 0 1 0 1 1 1 1 0 1 x 1 ... 1 | 1 1 1 1 1 0 % C7.2.139 FRECPX 30 | 0 x 1 0 1 1 1 0 0 x 1 ... 1 | 1 0 0 0 1 0 % C7.2.140 FRINTA (vector) 31 | 0 0 0 1 1 1 1 0 s s 1 ... 0 | 0 1 0 0 0 0 % C7.2.141 FRINTA (scalar) 32 | 0 x 1 0 1 1 1 0 1 x 1 ... 1 | 1 0 0 1 1 0 % C7.2.142 FRINTI (vector) 33 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 1 1 0 0 0 0 % C7.2.143 FRINTI (scalar) 34 | 0 x 0 0 1 1 1 0 0 x 1 ... 1 | 1 0 0 1 1 0 % C7.2.144 FRINTM (vector) 35 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 0 1 0 0 0 0 % C7.2.145 FRINTM (scalar) 36 | 0 x 0 0 1 1 1 0 0 x 1 ... 1 | 1 0 0 0 1 0 % C7.2.146 FRINTN (vector) 37 | 0 0 0 1 1 1 1 0 s s 1 ... 0 | 0 1 0 0 0 0 % C7.2.147 FRINTN (scalar) 38 | 0 x 0 0 1 1 1 0 1 x 1 ... 1 | 1 0 0 0 1 0 % C7.2.148 FRINTP (vector) 39 | 0 0 0 1 1 1 1 0 s s 1 ... 0 | 1 1 0 0 0 0 % C7.2.149 FRINTP (scalar) 40 | 0 x 1 0 1 1 1 0 0 s 1 ... 1 | 1 0 0 1 1 0 % C7.2.150 FRINTX (vector) 41 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 0 1 0 0 0 0 % C7.2.151 FRINTX (scalar) 42 | 0 x 0 0 1 1 1 0 0 1 x ... 1 | 1 0 0 1 1 0 % C7.2.152 FRINTZ (vector) 43 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 1 1 0 0 0 0 % C7.2.153 FRINTZ (scalar) 44 | 0 1 1 1 1 1 1 0 1 x x ... 1 | 1 1 0 1 1 0 % C7.2.154 FRSQRTE 45 | 0 1 0 1 1 1 1 0 1 x x ... _ | p p 1 1 1 1 % C7.2.155 FRSQRTS 46 | 0 x 1 0 1 1 1 0 1 1 1 ... 1 | 1 1 1 1 1 0 % C7.2.156 FSQRT (vector) 47 | 0 0 0 1 1 1 1 0 s s 1 ... 1 | 1 1 0 0 0 0 % C7.2.157 FSQRT (scalar) 48 | 0 x 0 0 1 1 1 0 1 x 1 ... _ | p p 0 1 0 1 % C7.2.158 FSUB (vector) 49 | 0 0 0 1 1 1 1 0 s s 1 ... _ | 0 0 1 1 1 0 % C7.2.159 FSUB (scalar) 50 | 0 x 0 0 1 1 0 0 i 1 0 ... _ | x x 1 x s s % C7.2.162 LD1 (multiple structures) 51 | 0 x 0 0 1 1 0 1 i 1 0 ... _ | 1 1 0 0 s s % C7.2.164 LD1R 52 | 0 x 0 0 1 1 0 1 i 1 0 ... _ | x x 0 s s s % C7.2.163 LD1 (single structure) 53 | 0 x 0 0 1 1 0 0 i 1 0 ... _ | 1 0 0 0 s s % C7.2.165 LD2 (multiple structures) 54 | 0 x 0 0 1 1 0 1 i 1 1 ... _ | 1 1 0 0 s s % C7.2.167 LD2R 55 | 0 x 0 0 1 1 0 1 i 1 1 ... _ | x x 0 s s s % C7.2.166 LD2 (single structure) 56 | 0 x 0 0 1 1 0 0 i 1 0 ... _ | 0 1 0 0 s s % C7.2.168 LD3 (multiple structures) 57 | 0 x 0 0 1 1 0 1 0 1 0 ... 0 | 1 1 1 0 s s % C7.2.170 LD3R 58 | 0 x 0 0 1 1 0 1 i 1 0 ... _ | x x 1 s s s % C7.2.169 LD3 (single structure) 59 | 0 x 0 0 1 1 0 0 0 1 0 ... 0 | 0 0 0 0 s s % C7.2.171 LD4 (multiple structures) 60 | 0 x 0 0 1 1 0 1 i 1 1 ... _ | 1 1 1 0 s s % C7.2.173 LD4R 61 | 0 x 0 0 1 1 0 1 i 1 1 ... _ | x x 1 s s s % C7.2.172 LD4 (single structure) 62 | x x 1 0 1 1 0 0 0 1 _ ... _ | _ _ _ _ _ _ % C7.2.174 LDNP (SIMD&FP) 63 | x x 1 0 1 1 0 i i 1 _ ... _ | _ _ _ _ _ _ % C7.2.175 LDP (SIMD&FP) 64 | x x 1 1 1 1 0 0 x 1 0 ... _ | _ _ _ _ 0 1 % C7.2.176 LDR (immediate, SIMD&FP) 65 | x x 0 1 1 1 0 0 _ _ _ ... _ | _ _ _ _ _ _ % C7.2.177 LDR (literal, SIMD&FP) 66 | x x 1 1 1 1 0 0 x 1 1 ... _ | _ _ _ _ 1 0 % C7.2.178 LDR (register, SIMD&FP) 67 | x x 1 1 1 1 0 0 x 1 0 ... _ | _ _ _ _ 0 0 % C7.2.179 LDUR (SIMD&FP) 68 | 0 x 1 0 1 1 1 1 s s i ... _ | 0 0 0 0 h 0 % C7.2.180 MLA (by element) 69 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 0 1 0 1 % C7.2.181 MLA (vector) 70 | 0 x 1 0 1 1 1 1 s s i ... _ | 0 1 0 0 h 0 % C7.2.182 MLS (by element) 71 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 0 1 0 1 % C7.2.183 MLS (vector) 72 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 0 0 0 0 1 % C7.2.184 MOV (scalar) % C7.2.32 DUP (element) 73 | 0 1 1 0 1 1 1 0 0 0 0 ... _ | 0 _ _ _ _ 1 % C7.2.185 MOV (element) % C7.2.160 INS (element) 74 | 0 1 0 0 1 1 1 0 0 0 0 ... _ | 0 0 0 1 1 1 % C7.2.186 MOV (from general) % C7.2.161 INS (general) 75 | 0 x 0 0 1 1 1 0 1 0 1 ... _ | 0 0 0 1 1 1 % C7.2.187 MOV (vector) % C7.2.198 ORR (vector, register) 76 | 0 x 0 0 1 1 1 0 0 0 0 ... 0 | 0 0 1 1 1 1 % C7.2.188 MOV (to general) 77 | 0 x s 0 1 1 1 1 0 0 0 ... _ | _ _ _ _ 0 1 % C7.2.189 MOVI 78 | 0 x 0 0 1 1 1 1 s s i ... _ | 1 0 0 0 h 0 % C7.2.190 MUL (by element) 79 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 0 1 1 1 % C7.2.191 MUL (vector) 80 | 0 x 1 0 1 1 1 0 0 0 1 ... 0 | 0 1 0 0 1 1 % C7.2.192 MVN % C7.2.195 NOT 81 | 0 x 1 0 1 1 1 1 0 0 0 ... _ | _ _ _ _ 0 1 % C7.2.193 MVNI 82 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 1 0 1 1 1 1 % C7.2.194 NEG (vector) 83 | 0 x 0 0 1 1 1 0 1 1 1 ... _ | 0 0 0 1 1 1 % C7.2.196 ORN (vector) 84 | 0 x 0 0 1 1 1 1 0 0 0 ... _ | _ _ _ 1 0 1 % C7.2.197 ORR (vector, immediate) 85 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 0 1 1 1 % C7.2.199 PMUL 86 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 1 1 0 0 0 % C7.2.200 PMULL, PMULL2 87 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 0 0 0 0 % C7.2.201 RADDHN, RADDHN2 88 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 0 0 0 1 1 % C7.2.202 RAX1 89 | 0 x 1 0 1 1 1 0 0 1 1 ... 0 | 0 1 0 1 1 0 % C7.2.203 RBIT (vector) 90 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 0 0 1 1 0 % C7.2.204 REV16 (vector) 91 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 0 0 0 0 1 0 % C7.2.205 REV32 (vector) 92 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 0 0 0 1 0 % C7.2.206 REV64 93 | 0 x 0 0 1 1 1 1 0 _ _ ... _ | 1 0 0 0 1 1 % C7.2.207 RSHRN, RSHRN2 94 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 0 0 % C7.2.208 RSUBHN, RSUBHN2 95 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 1 1 % C7.2.209 SABA 96 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 0 1 0 0 % C7.2.210 SABAL, SABAL2 97 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 0 1 % C7.2.211 SABD 98 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 0 0 % C7.2.212 SABDL, SABDL2 99 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 1 1 0 1 0 % C7.2.213 SADALP 100 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 0 0 0 0 % C7.2.214 SADDL, SADDL2 101 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 0 1 0 1 0 % C7.2.215 SADDLP 102 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 0 1 1 1 0 % C7.2.216 SADDLV 103 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 0 1 0 0 % C7.2.217 SADDW, SADDW2 104 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 1 1 1 0 0 1 % C7.2.218 SCVTF (vector, fixed-point) 105 | 0 x 0 i 1 1 1 0 0 i 1 ... 1 | 1 1 0 1 1 0 % C7.2.219 SCVTF (vector, integer) 106 | x 0 0 1 1 1 1 0 s s 0 ... 0 | _ _ _ _ _ _ % C7.2.220 SCVTF (scalar, fixed-point) 107 | x 0 0 1 1 1 1 0 s s 1 ... 0 | 0 0 0 0 0 0 % C7.2.221 SCVTF (scalar, integer) 108 | 0 x 0 0 1 1 1 1 s s i ... _ | 1 1 1 0 h 0 % C7.2.222 SDOT (by element) 109 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 1 0 0 1 0 1 % C7.2.223 SDOT (vector) 110 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 0 0 0 0 0 % C7.2.224 SHA1C 111 | 0 1 0 1 1 1 1 0 0 0 1 ... 0 | 0 0 0 0 1 0 % C7.2.225 SHA1H 112 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 0 1 0 0 0 % C7.2.226 SHA1M 113 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 0 0 1 0 0 % C7.2.227 SHA1P 114 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 0 1 1 0 0 % C7.2.228 SHA1SU0 115 | 0 1 0 1 1 1 1 0 0 0 1 ... 0 | 0 0 0 1 1 0 % C7.2.229 SHA1SU1 116 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 1 0 1 0 0 % C7.2.230 SHA256H2 117 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 1 0 0 0 0 % C7.2.231 SHA256H 118 | 0 1 0 1 1 1 1 0 0 0 1 ... 0 | 0 0 1 0 1 0 % C7.2.232 SHA256SU0 119 | 0 1 0 1 1 1 1 0 0 0 0 ... _ | 0 1 1 0 0 0 % C7.2.233 SHA256SU1 120 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 0 0 0 0 0 % C7.2.234 SHA512H 121 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 0 0 0 0 1 % C7.2.235 SHA512H2 122 | 1 1 0 0 1 1 1 0 1 1 0 ... 0 | 1 0 0 0 0 0 % C7.2.236 SHA512SU0 123 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 0 0 0 1 0 % C7.2.237 SHA512SU1 124 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 0 0 0 1 % C7.2.238 SHADD 125 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 1 0 1 0 1 % C7.2.239 SHL 126 | 0 x 1 0 1 1 1 0 s s 1 ... 1 | 0 0 1 1 1 0 % C7.2.240 SHLL, SHLL2 127 | 0 x 0 0 1 1 1 1 0 _ _ ... _ | 1 0 0 0 0 1 % C7.2.241 SHRN, SHRN2 128 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 1 0 0 1 % C7.2.242 SHSUB 129 | 0 x 1 i 1 1 1 1 0 _ _ ... _ | 0 1 0 1 0 1 % C7.2.243 SLI 130 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 1 0 0 0 0 % C7.2.244 SM3PARTW1 131 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 1 0 0 0 1 % C7.2.245 SM3PARTW2 132 | 1 1 0 0 1 1 1 0 0 1 0 ... _ | 0 _ _ _ _ _ % C7.2.246 SM3SS1 133 | 1 1 0 0 1 1 1 0 0 1 0 ... _ | 1 0 i i 0 0 % C7.2.247 SM3TT1A 134 | 1 1 0 0 1 1 1 0 0 1 0 ... _ | 1 0 i i 0 1 % C7.2.248 SM3TT1B 135 | 1 1 0 0 1 1 1 0 0 1 0 ... _ | 1 0 i i 1 0 % C7.2.249 SM3TT2A 136 | 1 1 0 0 1 1 1 0 0 1 0 ... _ | 1 0 i i 1 1 % C7.2.250 SM3TT2B 137 | 1 1 0 0 1 1 1 0 1 1 0 ... 0 | 1 0 0 0 0 1 % C7.2.251 SM4E 138 | 1 1 0 0 1 1 1 0 0 1 1 ... _ | 1 1 0 0 1 0 % C7.2.252 SM4EKEY 139 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 0 1 % C7.2.253 SMAX 140 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 0 1 % C7.2.254 SMAXP 141 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 1 0 1 0 1 0 % C7.2.255 SMAXV 142 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 1 1 % C7.2.256 SMIN 143 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 1 1 % C7.2.257 SMINP 144 | 0 x 0 0 1 1 1 0 s s 1 ... 1 | 1 0 1 0 1 0 % C7.2.258 SMINV 145 | 0 x 0 0 1 1 1 1 s s i ... _ | 0 0 1 0 h 0 % C7.2.259 SMLAL, SMLAL2 (by element) 146 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 0 0 0 0 % C7.2.260 SMLAL, SMLAL2 (vector) 147 | 0 x 0 0 1 1 1 1 s s i ... _ | 0 1 1 0 h 0 % C7.2.261 SMLSL, SMLSL2 (by element) 148 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 0 0 % C7.2.262 SMLSL, SMLSL2 (vector) 149 | 0 x 0 0 1 1 1 0 0 0 0 ... _ | 0 0 1 0 1 1 % C7.2.263 SMOV 150 | 0 x 0 0 1 1 1 1 s s i ... _ | 1 0 1 0 h 0 % C7.2.264 SMULL, SMULL2 (by element) 151 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 1 1 0 0 0 0 % C7.2.265 SMULL, SMULL2 (vector) 152 | 0 x 0 i 1 1 1 0 s s 1 ... 0 | 0 1 1 1 1 0 % C7.2.266 SQABS 153 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 0 0 0 0 1 1 % C7.2.267 SQADD 154 | 0 x 0 i 1 1 1 1 s s i ... _ | 0 0 1 1 h 0 % C7.2.268 SQDMLAL, SQDMLAL2 (by element) 155 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 1 0 0 1 0 0 % C7.2.269 SQDMLAL, SQDMLAL2 (vector) 156 | 0 x 0 i 1 1 1 1 s s i ... _ | 0 1 1 1 h 0 % C7.2.270 SQDMLSL, SQDMLSL2 (by element) 157 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 1 0 1 1 0 0 % C7.2.271 SQDMLSL, SQDMLSL2 (vector) 158 | 0 x 0 i 1 1 1 1 s s i ... _ | 1 1 0 0 h 0 % C7.2.272 SQDMULH (by element) 159 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 1 0 1 1 0 1 % C7.2.273 SQDMULH (vector) 160 | 0 x 0 0 1 1 1 1 s s i ... _ | 1 0 1 1 h 0 % C7.2.274 SQDMULL, SQDMULL2 (by element) 161 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 1 1 0 1 0 0 % C7.2.275 SQDMULL, SQDMULL2 (vector) 162 | 0 x 1 i 1 1 1 0 s s 1 ... _ | 0 1 1 1 1 0 % C7.2.276 SQNEG 163 | 0 x 1 i 1 1 1 1 s s i ... _ | 1 1 0 1 h 0 % C7.2.277 SQRDMLAH (by element) 164 | 0 x 1 i 1 1 1 0 s s 0 ... _ | 1 0 0 0 0 1 % C7.2.278 SQRDMLAH (vector) 165 | 0 x 1 i 1 1 1 1 s s i ... _ | 1 1 1 1 h 0 % C7.2.279 SQRDMLSH (by element) 166 | 0 x 1 i 1 1 1 0 s s 0 ... _ | 1 0 0 0 1 1 % C7.2.280 SQRDMLSH (vector) 167 | 0 x 0 i 1 1 1 1 s s i ... _ | 1 1 0 1 h 0 % C7.2.281 SQRDMULH (by element) 168 | 0 x 1 i 1 1 1 0 s s 1 ... _ | 1 0 1 1 0 1 % C7.2.282 SQRDMULH (vector) 169 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 0 1 0 1 1 1 % C7.2.283 SQRSHL 170 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 1 0 0 1 1 1 % C7.2.284 SQRSHRN, SQRSHRN2 171 | 0 x 1 i 1 1 1 1 0 _ _ ... _ | 1 0 0 0 1 1 % C7.2.285 SQRSHRUN, SQRSHRUN2 172 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 1 1 1 0 1 % C7.2.286 SQSHL (immediate) 173 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 0 1 0 0 1 1 % C7.2.287 SQSHL (register) 174 | 0 x 1 0 1 1 1 1 0 _ _ ... _ | 0 1 1 0 0 1 % C7.2.288 SQSHLU 175 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 1 0 0 1 0 1 % C7.2.289 SQSHRN, SQSHRN2 176 | 0 x 1 i 1 1 1 1 0 _ _ ... _ | 1 0 0 0 0 1 % C7.2.290 SQSHRUN, SQSHRUN2 177 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 1 0 1 1 % C7.2.291 SQSUB 178 | 0 x 0 0 1 1 1 0 s s 1 ... 1 | 0 1 0 0 1 0 % C7.2.292 SQXTN, SQXTN2 179 | 0 x 1 0 1 1 1 0 s s 1 ... 1 | 0 0 1 0 1 0 % C7.2.293 SQXTUN, SQXTUN2 180 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 0 1 0 1 % C7.2.294 SRHADD 181 | 0 x 1 i 1 1 1 1 0 _ _ ... _ | 0 1 0 0 0 1 % C7.2.295 SRI 182 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 0 1 0 1 0 1 % C7.2.296 SRSHL 183 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 0 1 0 0 1 % C7.2.297 SRSHR 184 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 0 1 1 0 1 % C7.2.298 SRSRA 185 | 0 x 0 i 1 1 1 0 s s 1 ... _ | 0 1 0 0 0 1 % C7.2.299 SSHL 186 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 0 0 0 0 1 % C7.2.301 SSHR 187 | 0 x 0 i 1 1 1 1 0 _ _ ... _ | 0 0 0 1 0 1 % C7.2.302 SSRA 188 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 1 0 0 0 % C7.2.303 SSUBL, SSUBL2 189 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 0 1 1 0 0 % C7.2.304 SSUBW, SSUBW2 190 | 0 x 0 0 1 1 0 0 i 0 0 ... _ | x x 1 x s s % C7.2.305 ST1 (multiple structures) 191 | 0 x 0 0 1 1 0 1 i 0 0 ... _ | x x 0 s s s % C7.2.306 ST1 (single structure) 192 | 0 x 0 0 1 1 0 0 i 0 0 ... _ | 1 0 0 0 s s % C7.2.307 ST2 (multiple structures) 193 | 0 x 0 0 1 1 0 1 i 0 1 ... _ | x x 0 s s s % C7.2.308 ST2 (single structure) 194 | 0 x 0 0 1 1 0 0 i 0 0 ... _ | 0 1 0 0 s s % C7.2.309 ST3 (multiple structures) 195 | 0 x 0 0 1 1 0 1 i 0 0 ... _ | x x 1 s s s % C7.2.310 ST3 (single structure) 196 | 0 x 0 0 1 1 0 0 x 0 0 ... _ | 0 0 0 0 s s % C7.2.311 ST4 (multiple structures) 197 | 0 x 0 0 1 1 0 1 0 0 1 ... 0 | x x 1 s s s % C7.2.312 ST4 (single structure) 198 | s s 1 0 1 1 0 0 0 0 _ ... _ | _ _ _ _ _ _ % C7.2.313 STNP (SIMD&FP) 199 | s s 1 0 1 1 0 i i 0 _ ... _ | _ _ _ _ _ _ % C7.2.314 STP (SIMD&FP) 200 | s s 1 1 1 1 0 0 x 0 0 ... _ | _ _ _ _ i 1 % C7.2.317 STUR (SIMD&FP) 201 | s s 1 1 1 1 0 0 x 0 1 ... _ | _ _ _ _ 1 0 % C7.2.316 STR (register, SIMD&FP) 202 | s s 1 1 1 1 0 0 x 0 0 ... _ | _ _ _ _ 0 0 % C7.2.317 STUR (SIMD&FP) 203 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 0 0 0 1 % C7.2.318 SUB (vector) 204 | 0 x 0 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 0 0 % C7.2.319 SUBHN, SUBHN2 205 | 0 x 0 0 1 1 1 0 s s 1 ... 0 | 0 0 1 1 1 0 % C7.2.320 SUQADD 206 | 0 x 0 0 1 1 1 1 0 _ _ ... 0 | 1 0 1 0 0 1 % C7.2.321 SXTL, SXTL2 % C7.2.300 SSHLL, SSHLL2 207 | 0 x 0 0 1 1 1 0 0 0 0 ... _ | 0 i i 0 0 0 % C7.2.322 TBL 208 | 0 x 0 0 1 1 1 0 0 0 0 ... _ | 0 i i 1 0 0 % C7.2.323 TBX 209 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 0 1 0 1 0 % C7.2.324 TRN1 210 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 1 1 0 1 0 % C7.2.325 TRN2 211 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 1 1 % C7.2.326 UABA 212 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 0 1 0 0 % C7.2.327 UABAL, UABAL2 213 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 0 1 % C7.2.328 UABD 214 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 1 0 0 % C7.2.329 UABDL, UABDL2 215 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 0 1 1 0 1 0 % C7.2.330 UADALP 216 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 0 0 0 0 % C7.2.331 UADDL, UADDL2 217 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 0 0 1 1 0 1 % C7.2.332 UADDLP 218 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 0 0 1 1 1 0 % C7.2.333 UADDLV 219 | 0 x 1 0 1 1 1 1 0 _ _ ... _ | 1 1 1 0 0 1 % C7.2.335 UCVTF (vector, fixed-point) 220 | 0 x 1 1 1 1 1 0 0 s 1 ... 1 | 1 1 0 1 1 0 % C7.2.336 UCVTF (vector, integer) 221 | x 0 0 1 1 1 1 0 s s 0 ... 1 | _ _ _ _ _ _ % C7.2.337 UCVTF (scalar, fixed-point) 222 | x 0 0 1 1 1 1 0 s s 1 ... 1 | 0 0 0 0 0 0 % C7.2.338 UCVTF (scalar, integer) 223 | 0 x 1 0 1 1 1 1 s s i ... _ | 1 1 1 0 h 0 % C7.2.339 UDOT (by element) 224 | 0 x 1 0 1 1 1 0 s s 0 ... _ | 1 0 0 1 0 1 % C7.2.340 UDOT (vector) 225 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 0 0 0 1 % C7.2.341 UHADD 226 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 1 0 0 1 % C7.2.342 UHSUB 227 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 0 1 % C7.2.343 UMAX 228 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 0 1 % C7.2.344 UMAXP 229 | 0 x 1 0 1 1 1 0 s s 1 ... 0 | 1 0 1 0 1 0 % C7.2.345 UMAXV 230 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 1 0 1 1 % C7.2.346 UMIN 231 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 1 1 % C7.2.347 UMINP 232 | 0 x 1 0 1 1 1 0 s s 1 ... 1 | 1 0 1 0 1 0 % C7.2.348 UMINV 233 | 0 x 1 0 1 1 1 1 s s i ... _ | 0 0 1 0 h 0 % C7.2.349 UMLAL, UMLAL2 (by element) 234 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 0 0 0 0 % C7.2.350 UMLAL, UMLAL2 (vector) 235 | 0 x 1 0 1 1 1 1 s s i ... _ | 0 1 1 0 h 0 % C7.2.351 UMLSL, UMLSL2 (by element) 236 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 0 1 0 0 0 % C7.2.352 UMLSL, UMLSL2 (vector) 237 | 0 x 0 0 1 1 1 0 0 0 0 ... _ | 0 0 1 1 1 1 % C7.2.353 UMOV 238 | 0 x 1 0 1 1 1 1 s s i ... _ | 1 0 1 0 h 0 % C7.2.354 UMULL, UMULL2 (by element) 239 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 1 1 0 0 0 0 % C7.2.355 UMULL, UMULL2 (vector) 240 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 0 0 1 1 % C7.2.356 UQADD 241 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 1 0 1 1 1 % C7.2.357 UQRSHL 242 | 0 x 1 0 1 1 1 1 0 _ _ ... _ | 1 0 0 1 1 1 % C7.2.358 UQRSHRN, UQRSHRN2 243 | 0 x 1 i 1 1 1 1 0 _ _ ... _ | 0 1 1 1 0 1 % C7.2.359 UQSHL (immediate) 244 | 0 x 1 i 1 1 1 0 s s 1 ... _ | 0 1 0 0 1 1 % C7.2.360 UQSHL (register) 245 | 0 x 1 0 1 1 1 1 0 _ _ ... _ | 1 0 0 1 0 1 % C7.2.361 UQSHRN, UQSHRN2 246 | 0 x 1 i 1 1 1 0 s s 1 ... _ | 0 0 1 0 1 1 % C7.2.362 UQSUB - Unsigned saturating Subtract. 247 | 0 x 1 i 1 1 1 0 s s 1 ... 1 | 0 1 0 0 1 0 % C7.2.363 UQXTN, UQXTN2 - Unsigned saturating extract Narrow. 248 | 0 x 0 0 1 1 1 0 1 s 1 ... 1 | 1 1 0 0 1 0 % C7.2.364 URECPE - Unsigned Reciprocal Estimate. 249 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 0 1 0 1 % C7.2.365 URHADD Unsigned Rounding Halving Add. 250 | 0 x 1 i 1 1 1 0 s s 1 ... _ | 0 1 0 1 0 1 % C7.2.366 URSHL - Unsigned Rounding Shift Left (register). 251 | 0 1 1 1 1 1 1 1 0 _ _ ... _ | 0 0 1 0 0 1 % C7.2.367 URSHR - Unsigned Rounding Shift Right (immediate). 252 | 0 x 1 0 1 1 1 0 1 s 1 ... 1 | 1 1 0 0 1 0 % C7.2.368 URSQRTE - Unsigned Reciprocal Square Root Estimate. 253 | 0 1 1 1 1 1 1 1 0 _ _ ... _ | 0 0 1 1 0 1 % C7.2.369 URSRA 254 | 0 1 1 1 1 1 1 0 s s 1 ... _ | 0 1 0 0 0 1 % C7.2.370 USHL - Unsigned Shift Left (register). 255 | 0 x 1 0 1 1 1 1 0 _ _ ... 0 | 1 0 1 0 0 1 % C7.2.371 USHLL, USHLL2 % C7.2.377 UXTL, UXTL2 256 | 0 1 1 1 1 1 1 1 0 _ _ ... _ | 0 0 0 0 0 1 % C7.2.372 USHR - Unsigned Shift Right (immediate). 257 | 0 x 1 s 1 1 1 0 s s 1 ... 0 | 0 0 0 1 1 1 % C7.2.373 USQADD 258 | 0 1 1 1 1 1 1 1 0 _ _ ... _ | 0 0 0 1 0 1 % C7.2.374 USRA 259 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 1 0 0 0 % C7.2.375 USUBL, USUBL2 260 | 0 x 1 0 1 1 1 0 s s 1 ... _ | 0 0 1 1 0 0 % C7.2.376 USUBW, USUBW2 - Unsigned Subtract Wide. 261 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 0 0 1 1 0 % C7.2.378 UZP1 - Unzip vectors (primary). 262 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 1 0 1 1 0 % C7.2.379 UZP2 - Unzip vectors (secondary). 263 | 1 1 0 0 1 1 1 0 1 0 0 ... _ | _ _ _ _ _ _ % C7.2.380 XAR - Exclusive OR and Rotate. 264 | 0 x 0 0 1 1 1 0 s s 1 ... 1 | 0 0 1 0 1 0 % C7.2.381 XTN, XTN2 - Extract Narrow. 265 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 0 1 1 1 0 % C7.2.382 ZIP1 - Zip vectors (primary). 266 | 0 x 0 0 1 1 1 0 s s 0 ... _ | 0 1 1 1 1 0 % C7.2.383 ZIP2 - Zip vectors (secondary). -------------------------------------------------------------------------------- /src/a64.erl: -------------------------------------------------------------------------------- 1 | -module(a64). 2 | -copyright('ARM64 Assembler (c) SYNRC'). 3 | -author('Maxim Sokhatsky'). 4 | -include("asm.hrl"). 5 | -compile(export_all). 6 | 7 | main([F]) -> {ok,I} = file:read_file(F), {C,O} = compile(code(I)), %io:format("~p~n",[code(I)]), 8 | file:write_file(base(F),O,[raw,write,binary,create]), halt(C); 9 | main(_) -> io:format("usage: a64 \n"), halt(1). 10 | base(X) -> filename:basename(X,filename:extension(X)). 11 | atom("#"++X) -> list_to_integer(X); 12 | atom(X) -> list_to_atom(X). 13 | 14 | last(X,Y,A) -> 15 | case lists:reverse(X) of 16 | "]"++Z -> [lists:reverse([atom(lists:reverse(Z))|Y])|A]; 17 | _ -> {[atom(X)|Y],A} end. 18 | 19 | code(Bin) -> 20 | [ lists:reverse( 21 | lists:foldl( 22 | fun([$[|X],A) -> last(X,[],A); 23 | (X,{Y,A}) -> last(X,Y,A); 24 | (X,A) -> [atom(X)|A] end,[],string:tokens(C," ,"))) 25 | || C <- string:tokens(binary_to_list(Bin),"\n") ]. 26 | 27 | success(M,F,A) -> try erlang:apply(M,F,A) catch _:_ -> <<>> end. 28 | success_(M,F,A) -> erlang:apply(M,F,A). 29 | 30 | compile(Code) -> 31 | {0,iolist_to_binary([ success(?MODULE,hd(Instr),tl(Instr)) || Instr <- Code])}. 32 | 33 | % register, extend and option encoding 34 | 35 | reg(sp) -> <<31:5>>; 36 | reg(wsp) -> <<31:5>>; 37 | reg(X) -> <<(list_to_integer(tl(atom_to_list(X)))):5>>. 38 | 39 | shift(lsl) -> <<0:2>>; 40 | shift(lsr) -> <<1:2>>; 41 | shift(asr) -> <<2:2>>; 42 | shift(ror) -> <<3:2>>. 43 | 44 | extend(uxtb) -> <<0:3>>; 45 | extend(uxth) -> <<1:3>>; 46 | extend(uxtw) -> <<2:3>>; 47 | extend(uxtx) -> <<3:3>>; 48 | extend(sxtb) -> <<4:3>>; 49 | extend(sxth) -> <<5:3>>; 50 | extend(sxtw) -> <<6:3>>; 51 | extend(sxtx) -> <<7:3>>. 52 | 53 | sys(s1e1r) -> {<<0:3>>,<<0:1>>,<<0:3>>}; 54 | sys(s1e1w) -> {<<0:3>>,<<0:1>>,<<1:3>>}; 55 | sys(s1e0r) -> {<<0:3>>,<<0:1>>,<<2:3>>}; 56 | sys(s1e0w) -> {<<0:3>>,<<0:1>>,<<3:3>>}; 57 | sys(s1e2r) -> {<<4:3>>,<<0:1>>,<<0:3>>}; 58 | sys(s1e2w) -> {<<4:3>>,<<0:1>>,<<1:3>>}; 59 | sys(s12e1r) -> {<<4:3>>,<<0:1>>,<<4:3>>}; 60 | sys(s12e1w) -> {<<4:3>>,<<0:1>>,<<5:3>>}; 61 | sys(s12e0r) -> {<<4:3>>,<<0:1>>,<<6:3>>}; 62 | sys(s12e0w) -> {<<4:3>>,<<0:1>>,<<7:3>>}; 63 | sys(s1e3r) -> {<<6:3>>,<<0:1>>,<<0:3>>}; 64 | sys(s1e3w) -> {<<6:3>>,<<0:1>>,<<1:3>>}; 65 | sys(s1e1rp) -> {<<0:3>>,<<1:1>>,<<0:3>>}; 66 | sys(s1e1wp) -> {<<0:3>>,<<1:1>>,<<1:3>>}. 67 | 68 | % C6.2.1 ADC 69 | 70 | adc(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 71 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), 72 | <<1:1,0:2,13:4,0:4,Rm/bitstring,0:6,Rn/bitstring,Rd/bitstring>>; 73 | 74 | adc(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 75 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), 76 | <<0:1,0:2,13:4,0:4,Rm/bitstring,0:6,Rn/bitstring,Rd/bitstring>>. 77 | 78 | % C6.2.2 ADCS 79 | 80 | adcs(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 81 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), 82 | <<1:1,1:2,13:4,0:4,Rm/bitstring,0:6,Rn/bitstring,Rd/bitstring>>; 83 | 84 | adcs(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 85 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), 86 | <<0:1,1:2,13:4,0:4,Rm/bitstring,0:6,Rn/bitstring,Rd/bitstring>>. 87 | 88 | % C6.2.3 ADD (extended register) 89 | 90 | add(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 91 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <<0:3>>, 92 | <<1:1,0:2,11:5,1:3,Rm/bitstring,3:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 93 | 94 | add(R1,R2,[R3,Im]) when ?x(R1), ?x(R2), ?x(R3), ?imm3(Im) -> 95 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, 96 | <<1:1,0:2,11:5,1:3,Rm/bitstring,3:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 97 | 98 | add(R1,R2,R3) when ?x(R1), ?x(R2), ?w(R3) -> 99 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <<0:3>>, 100 | <<1:1,0:2,11:5,1:3,Rm/bitstring,3:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 101 | 102 | add(R1,R2,[R3,Im]) when ?x(R1), ?x(R2), ?w(R3), ?imm3(Im) -> 103 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, 104 | <<1:1,0:2,11:5,1:3,Rm/bitstring,3:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 105 | 106 | add(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 107 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <<0:3>>, 108 | <<0:1,0:2,11:5,1:3,Rm/bitstring,6:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 109 | 110 | add(R1,R2,[R3,Im]) when ?w(R1), ?w(R2), ?w(R3), ?imm3(Im) -> 111 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, 112 | <<0:1,0:2,11:5,1:3,Rm/bitstring,6:3,I/bitstring,Rn/bitstring,Rd/bitstring>>; 113 | 114 | % C6.2.4 ADD (immediate) % C6.2.173 MOV (to/from SP) 115 | 116 | add(R1,R2,Im) when ?x(R1), ?x(R2), ?imm12(Im) -> 117 | Dst = reg(R1), Src = reg(R2), I = <>, 118 | <<1:1,0:2,34:6,0:1,I/bitstring,Src/bitstring,Dst/bitstring>>; 119 | 120 | add(R1,R2,Im) when ?w(R1), ?w(R2), ?imm12(Im) -> 121 | Dst = reg(R1), Src = reg(R2), I = <>, 122 | <<0:1,0:2,34:6,0:1,I/bitstring,Src/bitstring,Dst/bitstring>>. 123 | 124 | % C6.2.5 ADD (shifted register) 125 | 126 | add(R1,R2,R3,Sh,Im) when ?x(R1), ?x(R2), ?x(R3), ?imm6(Im), ?sh3(Sh) -> 127 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = shift(Sh), 128 | <<1:1,0:2,11:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 129 | 130 | add(R1,R2,R3,Sh,Im) when ?w(R1), ?w(R2), ?w(R3), ?imm6(Im), ?sh3(Sh) -> 131 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = shift(Sh), 132 | <<0:1,0:2,11:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 133 | 134 | % C6.2.6 ADDS (extended register) % C6.2.53 CMN (extended register) 135 | 136 | adds(R1,R2,R3,Ex,Im) when ?x(R1), ?x(R2), ?x(R3), ?imm3(Im), ?extend(Ex) -> 137 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = extend(Ex), 138 | <<1:1,1:2,11:5,1:3,Rm/bitstring,S/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 139 | 140 | adds(R1,R2,R3,Ex,Im) when ?x(R1), ?x(R2), ?w(R3), ?imm3(Im), ?extend(Ex) -> 141 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = extend(Ex), 142 | <<1:1,1:2,11:5,1:3,Rm/bitstring,S/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 143 | 144 | adds(R1,R2,R3,Ex,Im) when ?w(R1), ?w(R2), ?w(R3), ?imm3(Im), ?extend(Ex) -> 145 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = extend(Ex), 146 | <<0:1,1:2,11:5,1:3,Rm/bitstring,S/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 147 | 148 | % C6.2.8 ADDS (shifted register) % C6.2.55 CMN (shifted register) 149 | 150 | adds(R1,R2,R3,Sh,Im) when ?x(R1), ?x(R2), ?x(R3), ?imm6(Im), ?sh3(Sh) -> 151 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = shift(Sh), 152 | <<1:1,1:2,11:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 153 | 154 | adds(R1,R2,R3,Sh,Im) when ?w(R1), ?w(R2), ?w(R3), ?imm6(Im), ?sh3(Sh) -> 155 | Rm = reg(R3), Rn = reg(R2), Rd = reg(R1), I = <>, S = shift(Sh), 156 | <<0:1,1:2,11:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 157 | 158 | % C6.2.7 ADDS (immediate) % C6.2.54 CMN (immediate) 159 | 160 | adds(R1,R2,Im) when ?x(R1), ?x(R2), ?imm12(Im) -> 161 | Dst = reg(R1), Src = reg(R2), I = <>, Sh = <<1:1>>, 162 | <<1:1,1:2,34:6,Sh/bitstring,I/bitstring,Src/bitstring,Dst/bitstring>>; 163 | 164 | adds(R1,R2,Im) when ?w(R1), ?w(R2), ?imm12(Im) -> 165 | Rd = reg(R1), Rn = reg(R2), I = <>, Sh = <<1:1>>, 166 | <<0:1,1:2,34:6,Sh/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 167 | 168 | % C6.2.9 ADR 169 | 170 | adr(R1,Im) when ?x(R1), ?imm21(Im) -> 171 | Dst = reg(R1), I = <<(Im bsr 2):19>>, J = <>, 172 | <<0:1,J:2/bitstring,16:5,I:19/bitstring,Dst:5/bitstring>>. 173 | 174 | % C6.2.10 ADRP 175 | 176 | adrp(R1,Im) when ?x(R1), ?imm21(Im) -> 177 | Dst = reg(R1), I = <<(Im bsr 2):19>>, J = <>, 178 | <<1:1,J:2/bitstring,16:5,I:19/bitstring,Dst:5/bitstring>>. 179 | 180 | % C6.2.11 AND (immediate) 181 | 182 | 'and'(R1,R2,Im) when ?x(R1), ?x(R2), ?imm13(Im) -> 183 | Rd = reg(R1), Rn = reg(R2), Immr = <>, Imms = <<(Im bsr 6):6>>, H = <<(Im bsr 12):1>>, Sh = <<0:2>>, 184 | <<1:1,0:2,9:4,Sh/bitstring,H/bitstring,Immr/bitstring,Imms/bitstring,Rn/bitstring,Rd/bitstring>>; 185 | 186 | 'and'(R1,R2,Im) when ?w(R1), ?w(R2), ?imm12(Im) -> 187 | Rd = reg(R1), Rn = reg(R2), Immr = <>, Imms = <<(Im bsr 6):6>>, Sh = <<0:2>>, 188 | <<0:1,0:2,9:4,Sh/bitstring,0:1,Immr/bitstring,Imms/bitstring,Rn/bitstring,Rd/bitstring>>; 189 | 190 | % C6.2.12 AND (shifted register) 191 | 192 | 'and'(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 193 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <<0:6>>, Sh = <<0:2>>, 194 | <<1:1,0:2,10:5,Sh/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 195 | 196 | 'and'(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 197 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <<0:6>>, Sh = <<0:2>>, 198 | <<0:1,0:2,10:5,Sh/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 199 | 200 | 'and'(R1,R2,R3,Sh,Im) when ?x(R1), ?x(R2), ?x(R3), ?sh4(Sh), ?imm6(Im) -> 201 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <>, S = shift(Sh), 202 | <<1:1,0:2,10:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 203 | 204 | 'and'(R1,R2,R3,Sh,Im) when ?w(R1), ?w(R2), ?w(R3), ?sh4(Sh), ?imm6(Im) -> 205 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <>, S = shift(Sh), 206 | <<0:1,0:2,10:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 207 | 208 | % C6.2.13 ANDS (immediate) % C6.2.307 TST (immediate) 209 | 210 | ands(R1,R2,Im) when ?x(R1), ?x(R2), ?imm13(Im) -> 211 | Rd = reg(R1), Rn = reg(R2), Immr = <>, Imms = <<(Im bsr 6):6>>, H = <<(Im bsr 12):1>>, Sh = <<0:2>>, 212 | <<1:1,3:2,9:4,Sh/bitstring,H/bitstring,Immr/bitstring,Imms/bitstring,Rn/bitstring,Rd/bitstring>>; 213 | 214 | ands(R1,R2,Im) when ?w(R1), ?w(R2), ?imm12(Im) -> 215 | Rd = reg(R1), Rn = reg(R2), Immr = <>, Imms = <<(Im bsr 6):6>>, Sh = <<0:2>>, 216 | <<0:1,3:2,9:4,Sh/bitstring,0:1,Immr/bitstring,Imms/bitstring,Rn/bitstring,Rd/bitstring>>; 217 | 218 | % C6.2.14 ANDS (shifted register) % C6.2.308 TST (shifted register) 219 | 220 | ands(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 221 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <<0:6>>, Sh = <<0:2>>, 222 | <<1:1,3:2,10:5,Sh/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 223 | 224 | ands(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 225 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <<0:6>>, Sh = <<0:2>>, 226 | <<0:1,3:2,10:5,Sh/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 227 | 228 | ands(R1,R2,R3,Sh,Im) when ?x(R1), ?x(R2), ?sh4(Sh), ?imm6(Im) -> 229 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <>, S = shift(Sh), 230 | <<1:1,3:2,10:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>; 231 | 232 | ands(R1,R2,R3,Sh,Im) when ?w(R1), ?w(R2), ?sh4(Sh), ?imm6(Im) -> 233 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), I = <>, S = shift(Sh), 234 | <<0:1,3:2,10:5,S/bitstring,0:1,Rm/bitstring,I/bitstring,Rn/bitstring,Rd/bitstring>>. 235 | 236 | % C6.2.15 ASR (register) % C6.2.17 ASRV 237 | 238 | asr(R1,R2,R3) when ?x(R1), ?x(R2), ?x(R3) -> 239 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), 240 | <<1:1,0:2,13:4,6:4,Rm/bitstring,2:4,2:2,Rn/bitstring,Rd/bitstring>>; 241 | 242 | asr(R1,R2,R3) when ?w(R1), ?w(R2), ?w(R3) -> 243 | Rm = reg(R3), Rd = reg(R1), Rn = reg(R2), 244 | <<0:1,0:2,13:4,6:4,Rm/bitstring,2:4,2:2,Rn/bitstring,Rd/bitstring>>. 245 | 246 | % C6.2.16 ASR (immediate) % C6.2.219 SBFIZ % C6.2.220 SBFM % C6.2.221 SBFX % C6.2.298 SXTB % C6.2.299 SXTH % C6.2.300 SXTW 247 | 248 | % C6.2.18 AT 249 | 250 | at(Op,X) when ?op(Op), ?x(X) -> 251 | R = reg(X), {Op1,M,Op2} = sys(Op), 252 | <<13:4,5:4,1:5,Op1/bitstring,7:4,4:3,M/bitstring,Op2/bitstring,R/bitstring>>. 253 | 254 | % C6.2.19 AUTDA, AUTDZA 255 | 256 | autdza(R1) when ?x(R1) -> 257 | <<>>. 258 | 259 | autda(R1,R2) when ?x(R1), ?x(R2) -> 260 | <<>>. 261 | 262 | % C6.2.20 AUTDB, AUTDZB 263 | 264 | % C6.2.21 AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA 265 | 266 | % C6.2.22 AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB 267 | 268 | % C6.2.23 B.cond 269 | 270 | % C6.2.24 B 271 | 272 | % C6.2.25 BFC % C6.2.26 BFI % C6.2.27 BFM % C6.2.28 BFXIL 273 | 274 | % C6.2.29 BIC (shifted register) 275 | 276 | % C6.2.30 BICS (shifted register) 277 | 278 | % C6.2.31 BL 279 | 280 | % C6.2.32 BLR 281 | 282 | % C6.2.33 BLRAA, BLRAAZ, BLRAB, BLRABZ 283 | 284 | % C6.2.34 BR 285 | 286 | % C6.2.35 BRAA, BRAAZ, BRAB, BRABZ 287 | 288 | % C6.2.36 BRK 289 | 290 | % C6.2.37 CASB, CASAB, CASALB, CASLB 291 | 292 | % C6.2.38 CASH, CASAH, CASALH, CASLH 293 | 294 | % C6.2.39 CASP, CASPA, CASPAL, CASPL 295 | 296 | % C6.2.40 CAS, CASA, CASAL, CASL 297 | 298 | % C6.2.41 CBNZ 299 | 300 | % C6.2.42 CBZ 301 | 302 | % C6.2.43 CCMN (immediate) 303 | 304 | % C6.2.44 CCMN (register) 305 | 306 | % C6.2.45 CCMP (immediate) 307 | 308 | % C6.2.46 CCMP (register) 309 | 310 | % C6.2.47 CFINV 311 | 312 | % C6.2.48 CINC % C6.2.66 CSINC % C6.2.64 CSET 313 | 314 | % C6.2.49 CINV % C6.2.65 CSETM % C6.2.67 CSINV 315 | 316 | % C6.2.50 CLREX 317 | 318 | % C6.2.51 CLS 319 | 320 | % C6.2.52 CLZ 321 | 322 | % C6.2.56 CMP (extended register) % C6.2.291 SUBS (extended register) 323 | 324 | % C6.2.57 CMP (immediate) % C6.2.292 SUBS (immediate) 325 | 326 | % C6.2.58 CMP (shifted register) % C6.2.293 SUBS (shifted register) % C6.2.188 NEGS 327 | 328 | % C6.2.59 CNEG % C6.2.68 CSNEG 329 | 330 | % C6.2.60 CRC32B, CRC32H, CRC32W, CRC32X 331 | 332 | % C6.2.61 CRC32CB, CRC32CH, CRC32CW, CRC32CX 333 | 334 | % C6.2.62 CSDB 335 | 336 | % C6.2.63 CSEL 337 | 338 | % C6.2.69 DC 339 | 340 | % C6.2.70 DCPS1 341 | 342 | % C6.2.71 DCPS2 343 | 344 | % C6.2.72 DCPS3 345 | 346 | % C6.2.73 DMB 347 | 348 | % C6.2.74 DRPS 349 | 350 | % C6.2.75 DSB 351 | 352 | % C6.2.76 EON (shifted register) 353 | 354 | % C6.2.77 EOR (immediate) 355 | 356 | % C6.2.78 EOR (shifted register) 357 | 358 | % C6.2.79 ERET 359 | 360 | % C6.2.80 ERETAA, ERETAB 361 | 362 | % C6.2.81 ESB 363 | 364 | % C6.2.82 EXTR % C6.2.214 ROR (immediate) 365 | 366 | % C6.2.83 HINT 367 | 368 | % C6.2.84 HLT 369 | 370 | % C6.2.85 HVC 371 | 372 | % C6.2.86 IC 373 | 374 | % C6.2.87 ISB 375 | 376 | % C6.2.88 LDADDB, LDADDAB, LDADDALB, LDADDLB % C6.2.233 STADDB, STADDLB 377 | 378 | % C6.2.89 LDADDH, LDADDAH, LDADDALH, LDADDLH % C6.2.234 STADDH, STADDLH 379 | 380 | % C6.2.90 LDADD, LDADDA, LDADDAL, LDADDL % C6.2.235 STADD, STADDL 381 | 382 | % C6.2.91 LDAPR 383 | 384 | % C6.2.92 LDAPRB 385 | 386 | % C6.2.93 LDAPRH 387 | 388 | % C6.2.94 LDAPUR 389 | 390 | % C6.2.95 LDAPURB 391 | 392 | % C6.2.96 LDAPURH 393 | 394 | % C6.2.97 LDAPURSB 395 | 396 | % C6.2.98 LDAPURSH 397 | 398 | % C6.2.99 LDAPURSW 399 | 400 | % C6.2.100 LDAR 401 | 402 | % C6.2.101 LDARB 403 | 404 | % C6.2.102 LDARH 405 | 406 | % C6.2.103 LDAXP 407 | 408 | % C6.2.104 LDAXR 409 | 410 | % C6.2.105 LDAXRB 411 | 412 | % C6.2.106 LDAXRH 413 | 414 | % C6.2.107 LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB % C6.2.236 STCLRB, STCLRLB 415 | 416 | % C6.2.108 LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH % C6.2.237 STCLRH, STCLRLH 417 | 418 | % C6.2.109 LDCLR, LDCLRA, LDCLRAL, LDCLRL % C6.2.238 STCLR, STCLRL 419 | 420 | % C6.2.110 LDEORB, LDEORAB, LDEORALB, LDEORLB % C6.2.239 STEORB, STEORLB 421 | 422 | % C6.2.111 LDEORH, LDEORAH, LDEORALH, LDEORLH % C6.2.240 STEORH, STEORLH 423 | 424 | % C6.2.112 LDEOR, LDEORA, LDEORAL, LDEORL % C6.2.241 STEOR, STEORL 425 | 426 | % C6.2.113 LDLARB 427 | 428 | % C6.2.114 LDLARH 429 | 430 | % C6.2.115 LDLAR 431 | 432 | % C6.2.116 LDNP 433 | 434 | % C6.2.117 LDP 435 | 436 | % C6.2.118 LDPSW 437 | 438 | % C6.2.119 LDR (immediate) 439 | 440 | % C6.2.120 LDR (literal) 441 | 442 | % C6.2.121 LDR (register) 443 | 444 | % C6.2.122 LDRAA, LDRAB 445 | 446 | % C6.2.123 LDRB (immediate) 447 | 448 | % C6.2.124 LDRB (register) 449 | 450 | % C6.2.125 LDRH (immediate) 451 | 452 | % C6.2.126 LDRH (register) 453 | 454 | % C6.2.127 LDRSB (immediate) 455 | 456 | % C6.2.128 LDRSB (register) 457 | 458 | % C6.2.129 LDRSH (immediate) 459 | 460 | % C6.2.130 LDRSH (register) 461 | 462 | % C6.2.131 LDRSW (immediate) 463 | 464 | % C6.2.132 LDRSW (literal) 465 | 466 | % C6.2.133 LDRSW (register) 467 | 468 | % C6.2.134 LDSETB, LDSETAB, LDSETALB, LDSETLB % C6.2.263 STSETB, STSETLB 469 | 470 | % C6.2.135 LDSETH, LDSETAH, LDSETALH, LDSETLH % C6.2.264 STSETH, STSETLH 471 | 472 | % C6.2.136 LDSET, LDSETA, LDSETAL, LDSETL % C6.2.265 STSET, STSETL 473 | 474 | % C6.2.137 LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB % C6.2.266 STSMAXB, STSMAXLB 475 | 476 | % C6.2.138 LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH % C6.2.267 STSMAXH, STSMAXLH 477 | 478 | % C6.2.139 LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL % C6.2.268 STSMAX, STSMAXL 479 | 480 | % C6.2.140 LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB % C6.2.269 STSMINB, STSMINLB 481 | 482 | % C6.2.141 LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH % C6.2.270 STSMINH, STSMINLH 483 | 484 | % C6.2.142 LDSMIN, LDSMINA, LDSMINAL, LDSMINL % C6.2.271 STSMIN, STSMINL 485 | 486 | % C6.2.143 LDTR 487 | 488 | % C6.2.144 LDTRB 489 | 490 | % C6.2.145 LDTRH 491 | 492 | % C6.2.146 LDTRSB 493 | 494 | % C6.2.147 LDTRSH 495 | 496 | % C6.2.148 LDTRSW 497 | 498 | % C6.2.149 LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB % C6.2.275 STUMAXB, STUMAXLB 499 | 500 | % C6.2.150 LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH % C6.2.276 STUMAXH, STUMAXLH 501 | 502 | % C6.2.151 LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL % C6.2.277 STUMAX, STUMAXL 503 | 504 | % C6.2.152 LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB % C6.2.278 STUMINB, STUMINLB 505 | 506 | % C6.2.153 LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH % C6.2.279 STUMINH, STUMINLH 507 | 508 | % C6.2.154 LDUMIN, LDUMINA, LDUMINAL, LDUMINL % C6.2.280 STUMIN, STUMINL 509 | 510 | % C6.2.155 LDUR 511 | 512 | % C6.2.156 LDURB 513 | 514 | % C6.2.157 LDURH 515 | 516 | % C6.2.158 LDURSB 517 | 518 | % C6.2.159 LDURSH 519 | 520 | % C6.2.160 LDURSW 521 | 522 | % C6.2.161 LDXP 523 | 524 | % C6.2.162 LDXR 525 | 526 | % C6.2.163 LDXRB 527 | 528 | % C6.2.164 LDXRH 529 | 530 | % C6.2.165 LSL (register) % C6.2.167 LSLV 531 | 532 | % C6.2.166 LSL (immediate) % C6.2.309 UBFIZ % C6.2.310 UBFM % C6.2.311 UBFX % C6.2.319 UXTB % C6.2.320 UXTH 533 | 534 | % C6.2.168 LSR (register) % C6.2.170 LSRV 535 | 536 | % C6.2.171 MADD % C6.2.185 MUL 537 | 538 | % C6.2.172 MNEG % C6.2.184 MSUB 539 | 540 | % C6.2.174 MOV (inverted wide immediate) % C6.2.179 MOVN 541 | 542 | movn(R1,Im) when ?x(R1), ?imm16(Im) -> 543 | R = reg(R1), I = <>, 544 | <<1:1,0:2,37:6,0:2,I/bitstring,R/bitstring>>; 545 | 546 | movn(R1,Im) when ?w(R1), ?imm16(Im) -> 547 | R = reg(R1), I = <>, 548 | <<0:1,0:2,37:6,0:2,I/bitstring,R/bitstring>>. 549 | 550 | % C6.2.175 MOV (wide immediate) % C6.2.180 MOVZ 551 | 552 | movz(R1,Im) when ?x(R1), ?imm16(Im) -> 553 | R = reg(R1), I = <>, 554 | <<1:1,2:2,37:6,0:2,I/bitstring,R/bitstring>>; 555 | 556 | movz(R1,Im) when ?w(R1), ?imm16(Im) -> 557 | R = reg(R1), I = <>, 558 | <<0:1,2:2,37:6,0:2,I/bitstring,R/bitstring>>. 559 | 560 | % C6.2.176 MOV (bitmask immediate) % C6.2.193 ORR (immediate) 561 | 562 | orr(R1,Im) when ?x(R1), ?imm16(Im) -> 563 | R = reg(R1), Rm = <>, 564 | <<1:1,1:2,10:5,0:3,Rm/bitstring,R/bitstring>>; 565 | 566 | orr(R1,Im) when ?w(R1), ?imm16(Im) -> 567 | R = reg(R1), Rm = <>, 568 | <<0:1,1:2,10:5,0:3,Rm/bitstring,R/bitstring>>. 569 | 570 | % C6.2.177 MOV (register) 571 | 572 | % C6.2.178 MOVK 573 | 574 | % C6.2.181 MRS 575 | 576 | % C6.2.182 MSR (immediate) 577 | 578 | % C6.2.183 MSR (register) 579 | 580 | % C6.2.186 MVN 581 | 582 | % C6.2.189 NGC % C6.2.217 SBC 583 | 584 | % C6.2.190 NGCS % C6.2.218 SBCS 585 | 586 | % C6.2.191 NOP 587 | 588 | % C6.2.192 ORN (shifted register) 589 | 590 | % C6.2.195 PACDA, PACDZA 591 | 592 | % C6.2.196 PACDB, PACDZB 593 | 594 | % C6.2.197 PACGA 595 | 596 | % C6.2.198 PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA 597 | 598 | % C6.2.199 PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB 599 | 600 | % C6.2.200 PRFM (immediate) 601 | 602 | % C6.2.201 PRFM (literal) 603 | 604 | % C6.2.202 PRFM (register) 605 | 606 | % C6.2.203 PRFUM 607 | 608 | % C6.2.204 PSB CSYNC 609 | 610 | % C6.2.205 PSSBB 611 | 612 | % C6.2.206 RBIT 613 | 614 | % C6.2.207 RET 615 | 616 | % C6.2.208 RETAA, RETAB 617 | 618 | % C6.2.209 REV % C6.2.212 REV64 619 | 620 | % C6.2.210 REV16 621 | 622 | % C6.2.211 REV32 623 | 624 | % C6.2.213 RMIF 625 | 626 | % C6.2.215 ROR (register) % C6.2.216 RORV 627 | 628 | % C6.2.222 SDIV 629 | 630 | % C6.2.223 SETF8, SETF16 631 | 632 | % C6.2.224 SEV 633 | 634 | % C6.2.225 SEVL 635 | 636 | % C6.2.226 SMADDL % C6.2.231 SMULL 637 | 638 | % C6.2.227 SMC 639 | 640 | % C6.2.228 SMNEGL % C6.2.229 SMSUBL 641 | 642 | % C6.2.230 SMULH 643 | 644 | % C6.2.232 SSBB 645 | 646 | % C6.2.242 STLLRB 647 | 648 | % C6.2.243 STLLRH 649 | 650 | % C6.2.244 STLLR 651 | 652 | % C6.2.245 STLR 653 | 654 | % C6.2.246 STLRB 655 | 656 | % C6.2.247 STLRH 657 | 658 | % C6.2.248 STLUR 659 | 660 | % C6.2.249 STLURB 661 | 662 | % C6.2.250 STLURH 663 | 664 | % C6.2.251 STLXP 665 | 666 | % C6.2.252 STLXR 667 | 668 | % C6.2.253 STLXRB 669 | 670 | % C6.2.254 STLXRH 671 | 672 | % C6.2.255 STNP 673 | 674 | % C6.2.256 STP 675 | 676 | % Post-index 677 | 678 | stp(R1,R2,[R3],Im) when ?w(R1), ?w(R2), ?x(R3), ?imm9(Im) -> 679 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 4):7>>, 680 | <<1:2,5:3,0:1,1:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>; 681 | 682 | stp(R1,R2,[R3],Im) when ?x(R1), ?x(R2), ?x(R3), ?imm10(Im) -> 683 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 8):7>>, 684 | <<2:2,5:3,0:1,1:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>. 685 | 686 | % Signed offset 687 | 688 | stp(R1,R2,[R3,Im]) when ?w(R1), ?w(R2), ?x(R3), ?imm9(Im) -> 689 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 4):7>>, 690 | <<1:2,5:3,0:1,2:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>; 691 | 692 | stp(R1,R2,[R3,Im]) when ?x(R1), ?x(R2), ?x(R3), ?imm10(Im) -> 693 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 8):7>>, 694 | <<2:2,5:3,0:1,2:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>; 695 | 696 | % Pre-index 697 | 698 | stp(R1,R2,[R3,Im,$!]) when ?w(R1), ?w(R2), ?x(R3), ?imm9(Im) -> 699 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 4):7>>, 700 | <<1:2,5:3,0:1,3:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>; 701 | 702 | stp(R1,R2,[R3,Im,$!]) when ?x(R1), ?x(R2), ?x(R3), ?imm10(Im) -> 703 | Dst = reg(R1), Src = reg(R2), Rn = reg(R3), I = <<(Im div 8):7>>, 704 | <<2:2,5:3,0:1,3:3,0:1,I/bitstring,Src/bitstring,Rn/bitstring,Dst/bitstring>>. 705 | 706 | % C6.2.257 STR (immediate) 707 | 708 | % C6.2.258 STR (register) 709 | 710 | % C6.2.259 STRB (immediate) 711 | 712 | % C6.2.260 STRB (register) 713 | 714 | % C6.2.261 STRH (immediate) 715 | 716 | % C6.2.262 STRH (register) 717 | 718 | % C6.2.272 STTR 719 | 720 | % C6.2.273 STTRB 721 | 722 | % C6.2.274 STTRH 723 | 724 | % C6.2.281 STUR 725 | 726 | stur(R1,[R2,Im]) when ?x(R1), ?x(R2), ?imm9(Im) -> 727 | Rt = reg(R1), Rn = reg(R2), I = <>, 728 | <<3:2,7:3,0:6,I/bitstring,0:2,Rn/bitstring,Rt/bitstring>>; 729 | 730 | stur(R1,[R2,Im]) when ?w(R1), ?x(R2), ?imm9(Im) -> 731 | Rt = reg(R1), Rn = reg(R2), I = <>, 732 | <<2:2,7:3,0:6,I/bitstring,0:2,Rn/bitstring,Rt/bitstring>>. 733 | 734 | % C6.2.282 STURB 735 | 736 | % C6.2.283 STURH 737 | 738 | % C6.2.284 STXP 739 | 740 | % C6.2.285 STXR 741 | 742 | % C6.2.286 STXRB 743 | 744 | % C6.2.287 STXRH 745 | 746 | % C6.2.288 SUB (extended register) 747 | 748 | % C6.2.289 SUB (immediate) 749 | 750 | sub(R1,R2,Im) when ?x(R1), ?x(R2), ?imm12(Im) -> 751 | Dst = reg(R1), Src = reg(R2), I = <>, 752 | <<1:1,2:2,34:6,0:1,I/bitstring,Src/bitstring,Dst/bitstring>>; 753 | 754 | sub(R1,R2,Im) when ?w(R1), ?w(R2), ?imm12(Im) -> 755 | Dst = reg(R1), Src = reg(R2), I = <>, 756 | <<0:1,2:2,34:6,0:1,I/bitstring,Src/bitstring,Dst/bitstring>>. 757 | 758 | % C6.2.290 SUB (shifted register) % C6.2.187 NEG (shifted register) 759 | 760 | % C6.2.294 SVC 761 | 762 | % C6.2.295 SWPB, SWPAB, SWPALB, SWPLB 763 | 764 | % C6.2.296 SWPH, SWPAH, SWPALH, SWPLH 765 | 766 | % C6.2.297 SWP, SWPA, SWPAL, SWPL 767 | 768 | % C6.2.301 SYS 769 | 770 | % C6.2.302 SYSL 771 | 772 | % C6.2.303 TBNZ 773 | 774 | % C6.2.304 TBZ 775 | 776 | % C6.2.305 TLBI 777 | 778 | % C6.2.306 TSB CSYNC 779 | 780 | % C6.2.312 UDF 781 | 782 | % C6.2.313 UDIV 783 | 784 | % C6.2.314 UMADDL % C6.2.318 UMULL 785 | 786 | % C6.2.315 UMNEGL % C6.2.316 UMSUBL 787 | 788 | % C6.2.317 UMULH 789 | 790 | % C6.2.321 WFE 791 | 792 | % C6.2.322 WFI 793 | 794 | % C6.2.323 XPACD, XPACI, XPACLRI 795 | 796 | % C6.2.324 YIELD --------------------------------------------------------------------------------