├── .github ├── dependabot.yml └── workflows │ ├── build.yaml │ ├── cmsis_rv2.yaml │ ├── examples.yaml │ └── gh-pages.yml ├── .gitignore ├── ARM.CMSIS-FreeRTOS.pdsc ├── CMSIS └── RTOS2 │ └── FreeRTOS │ ├── Config │ ├── FreeRTOSConfig.h │ └── TrustZone │ │ └── FreeRTOSConfig.h │ ├── Examples │ ├── .vscode │ │ └── launch.json │ ├── App │ │ ├── Hello │ │ │ ├── Hello.cproject.yml │ │ │ ├── README.md │ │ │ ├── RTE │ │ │ │ ├── CMSIS-View │ │ │ │ │ ├── EventRecorderConf.h │ │ │ │ │ └── EventRecorderConf.h.base@1.1.0 │ │ │ │ └── RTOS │ │ │ │ │ ├── FreeRTOSConfig.h │ │ │ │ │ └── FreeRTOSConfig.h.base@10.7.0 │ │ │ ├── hello.c │ │ │ ├── main.c │ │ │ └── main.h │ │ └── TrustZone │ │ │ ├── NonSecure │ │ │ ├── README.md │ │ │ ├── RTE │ │ │ │ ├── CMSIS-View │ │ │ │ │ ├── EventRecorderConf.h │ │ │ │ │ └── EventRecorderConf.h.base@1.1.0 │ │ │ │ └── RTOS │ │ │ │ │ ├── FreeRTOSConfig.h │ │ │ │ │ └── FreeRTOSConfig.h.base@10.7.0 │ │ │ ├── TZ_NonSecure.cproject.yml │ │ │ └── main_ns.c │ │ │ ├── README.md │ │ │ └── Secure │ │ │ ├── README.md │ │ │ ├── RTE │ │ │ └── RTOS │ │ │ │ ├── FreeRTOSConfig.h │ │ │ │ └── FreeRTOSConfig.h.base@10.2.0 │ │ │ ├── TZ_Secure.cproject.yml │ │ │ ├── library_nsc.c │ │ │ ├── library_nsc.h │ │ │ └── main_s.c │ ├── Examples.csolution.yml │ ├── README.md │ ├── Target │ │ ├── CM0 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM0 │ │ │ │ │ ├── regions_ARMCM0.h │ │ │ │ │ ├── startup_ARMCM0.c │ │ │ │ │ ├── startup_ARMCM0.c.base@2.0.3 │ │ │ │ │ ├── system_ARMCM0.c │ │ │ │ │ └── system_ARMCM0.c.base@1.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM0plus │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM0P │ │ │ │ │ ├── regions_ARMCM0P.h │ │ │ │ │ ├── startup_ARMCM0plus.c │ │ │ │ │ ├── startup_ARMCM0plus.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM0plus.c │ │ │ │ │ └── system_ARMCM0plus.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM23 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM23 │ │ │ │ │ ├── partition_ARMCM23.h │ │ │ │ │ ├── partition_ARMCM23.h.base@1.0.0 │ │ │ │ │ ├── regions_ARMCM23.h │ │ │ │ │ ├── startup_ARMCM23.c │ │ │ │ │ ├── startup_ARMCM23.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM23.c │ │ │ │ │ └── system_ARMCM23.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM23_noTZ │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM23 │ │ │ │ │ ├── regions_ARMCM23.h │ │ │ │ │ ├── startup_ARMCM23.c │ │ │ │ │ ├── startup_ARMCM23.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM23.c │ │ │ │ │ └── system_ARMCM23.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM3 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM3 │ │ │ │ │ ├── ARMCM3_ac6.sct │ │ │ │ │ ├── ARMCM3_ac6.sct.base@1.0.0 │ │ │ │ │ ├── ac6_linker_script.sct.src │ │ │ │ │ ├── regions_ARMCM3.h │ │ │ │ │ ├── startup_ARMCM3.c │ │ │ │ │ ├── startup_ARMCM3.c.base@2.0.3 │ │ │ │ │ ├── system_ARMCM3.c │ │ │ │ │ └── system_ARMCM3.c.base@1.0.1 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM33 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM33 │ │ │ │ │ ├── partition_ARMCM33.h │ │ │ │ │ ├── partition_ARMCM33.h.base@1.1.1 │ │ │ │ │ ├── regions_ARMCM33.h │ │ │ │ │ ├── startup_ARMCM33.c │ │ │ │ │ ├── startup_ARMCM33.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM33.c │ │ │ │ │ └── system_ARMCM33.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM33_noTZ │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM33 │ │ │ │ │ ├── regions_ARMCM33.h │ │ │ │ │ ├── startup_ARMCM33.c │ │ │ │ │ ├── startup_ARMCM33.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM33.c │ │ │ │ │ └── system_ARMCM33.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM4 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM4 │ │ │ │ │ ├── regions_ARMCM4.h │ │ │ │ │ ├── startup_ARMCM4.c │ │ │ │ │ ├── startup_ARMCM4.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM4.c │ │ │ │ │ └── system_ARMCM4.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM55 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM55 │ │ │ │ │ ├── partition_ARMCM55.h │ │ │ │ │ ├── partition_ARMCM55.h.base@1.0.0 │ │ │ │ │ ├── regions_ARMCM55.h │ │ │ │ │ ├── startup_ARMCM55.c │ │ │ │ │ ├── startup_ARMCM55.c.base@1.1.0 │ │ │ │ │ ├── system_ARMCM55.c │ │ │ │ │ └── system_ARMCM55.c.base@1.1.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM55_noTZ │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM55 │ │ │ │ │ ├── regions_ARMCM55.h │ │ │ │ │ ├── startup_ARMCM55.c │ │ │ │ │ ├── startup_ARMCM55.c.base@1.1.0 │ │ │ │ │ ├── system_ARMCM55.c │ │ │ │ │ └── system_ARMCM55.c.base@1.1.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM7 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM7 │ │ │ │ │ ├── regions_ARMCM7.h │ │ │ │ │ ├── startup_ARMCM7.c │ │ │ │ │ ├── startup_ARMCM7.c.base@3.0.0 │ │ │ │ │ ├── system_ARMCM7.c │ │ │ │ │ └── system_ARMCM7.c.base@2.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM85 │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM85 │ │ │ │ │ ├── partition_ARMCM85.h │ │ │ │ │ ├── partition_ARMCM85.h.base@1.0.0 │ │ │ │ │ ├── regions_ARMCM85.h │ │ │ │ │ ├── startup_ARMCM85.c │ │ │ │ │ ├── startup_ARMCM85.c.base@1.0.0 │ │ │ │ │ ├── system_ARMCM85.c │ │ │ │ │ └── system_ARMCM85.c.base@1.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ ├── CM85_noTZ │ │ │ ├── RTE │ │ │ │ └── Device │ │ │ │ │ └── ARMCM85 │ │ │ │ │ ├── regions_ARMCM85.h │ │ │ │ │ ├── startup_ARMCM85.c │ │ │ │ │ ├── startup_ARMCM85.c.base@1.0.0 │ │ │ │ │ ├── system_ARMCM85.c │ │ │ │ │ └── system_ARMCM85.c.base@1.0.0 │ │ │ ├── Target.clayer.yml │ │ │ └── fvp_config.txt │ │ └── README.md │ └── vcpkg-configuration.json │ ├── FreeRTOS.scvd │ ├── Include │ ├── freertos_evr.h │ ├── freertos_mpool.h │ └── freertos_os2.h │ └── Source │ ├── clib_os.c │ ├── cmsis_os2.c │ ├── freertos_evr.c │ └── handlers.c ├── Documentation ├── Doxygen │ ├── freertos.dxy.in │ ├── gen_doc.sh │ ├── linkchecker.rc │ ├── src │ │ ├── cmsis_rtos2_validation.txt │ │ ├── create_project.md │ │ ├── example_projects.md │ │ ├── freertos_evr.txt │ │ ├── function_overview.md │ │ ├── images │ │ │ ├── freertos_config_h_cmsis_rtos.png │ │ │ ├── freertos_config_h_native.png │ │ │ ├── hello_out.png │ │ │ ├── manage_rte_freertos_native.png │ │ │ ├── manage_rte_freertos_rtos2.png │ │ │ ├── project_window_freertos_native.png │ │ │ ├── project_window_freertos_rtos2.png │ │ │ └── trustzone_out.png │ │ ├── mainpage.md │ │ └── technical_data.md │ └── style_template │ │ ├── cmsis_logo_white_small.png │ │ ├── darkmode_toggle.js │ │ ├── dropdown.png │ │ ├── extra_navtree.css │ │ ├── extra_search.css │ │ ├── extra_stylesheet.css │ │ ├── extra_tabs.css │ │ ├── footer.html │ │ ├── footer.js.in │ │ ├── header.html │ │ ├── layout.xml │ │ ├── navtree.js │ │ ├── resize.js │ │ ├── search.css │ │ ├── search.js │ │ ├── tab_b.png │ │ ├── tab_topnav.png │ │ ├── tabs.js │ │ └── version.css ├── index.html └── version.js ├── LICENSE ├── README.md ├── Source ├── CMakeLists.txt ├── GitHub-FreeRTOS-Kernel-Home.url ├── History.txt ├── LICENSE.md ├── MISRA.md ├── Quick_Start_Guide.url ├── README.md ├── croutine.c ├── cspell.config.yaml ├── event_groups.c ├── examples │ ├── README.md │ ├── cmake_example │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── coverity │ │ ├── CMakeLists.txt │ │ ├── FreeRTOSConfig.h │ │ ├── README.md │ │ └── coverity_misra.config │ └── template_configuration │ │ ├── FreeRTOSConfig.h │ │ └── readme.md ├── include │ ├── CMakeLists.txt │ ├── FreeRTOS.h │ ├── StackMacros.h │ ├── atomic.h │ ├── croutine.h │ ├── deprecated_definitions.h │ ├── event_groups.h │ ├── list.h │ ├── message_buffer.h │ ├── mpu_prototypes.h │ ├── mpu_syscall_numbers.h │ ├── mpu_wrappers.h │ ├── newlib-freertos.h │ ├── picolibc-freertos.h │ ├── portable.h │ ├── projdefs.h │ ├── queue.h │ ├── semphr.h │ ├── stack_macros.h │ ├── stdint.readme │ ├── stream_buffer.h │ ├── task.h │ └── timers.h ├── list.c ├── manifest.yml ├── portable │ ├── ARMClang │ │ └── Use-the-GCC-ports.txt │ ├── ARMv8M │ │ ├── ReadMe.txt │ │ ├── copy_files.py │ │ ├── non_secure │ │ │ ├── ReadMe.txt │ │ │ ├── port.c │ │ │ ├── portable │ │ │ │ ├── GCC │ │ │ │ │ ├── ARM_CM23 │ │ │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ │ │ ├── portasm.c │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM23_NTZ │ │ │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ │ │ ├── portasm.c │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM33 │ │ │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ │ │ ├── portasm.c │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM33_NTZ │ │ │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ │ │ ├── portasm.c │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM35P │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM55 │ │ │ │ │ │ └── portmacro.h │ │ │ │ │ └── ARM_CM85 │ │ │ │ │ │ └── portmacro.h │ │ │ │ └── IAR │ │ │ │ │ ├── ARM_CM23 │ │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ │ ├── portasm.s │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM23_NTZ │ │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ │ ├── portasm.s │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM33 │ │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ │ ├── portasm.s │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM33_NTZ │ │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ │ ├── portasm.s │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM35P │ │ │ │ │ └── portmacro.h │ │ │ │ │ ├── ARM_CM55 │ │ │ │ │ └── portmacro.h │ │ │ │ │ └── ARM_CM85 │ │ │ │ │ └── portmacro.h │ │ │ ├── portasm.h │ │ │ └── portmacrocommon.h │ │ └── secure │ │ │ ├── ReadMe.txt │ │ │ ├── context │ │ │ ├── portable │ │ │ │ ├── GCC │ │ │ │ │ ├── ARM_CM23 │ │ │ │ │ │ └── secure_context_port.c │ │ │ │ │ └── ARM_CM33 │ │ │ │ │ │ └── secure_context_port.c │ │ │ │ └── IAR │ │ │ │ │ ├── ARM_CM23 │ │ │ │ │ └── secure_context_port_asm.s │ │ │ │ │ └── ARM_CM33 │ │ │ │ │ └── secure_context_port_asm.s │ │ │ ├── secure_context.c │ │ │ └── secure_context.h │ │ │ ├── heap │ │ │ ├── secure_heap.c │ │ │ └── secure_heap.h │ │ │ ├── init │ │ │ ├── secure_init.c │ │ │ └── secure_init.h │ │ │ └── macros │ │ │ └── secure_port_macros.h │ ├── BCC │ │ └── 16BitDOS │ │ │ ├── Flsh186 │ │ │ ├── port.c │ │ │ └── prtmacro.h │ │ │ ├── PC │ │ │ ├── port.c │ │ │ └── prtmacro.h │ │ │ └── common │ │ │ ├── portasm.h │ │ │ └── portcomn.c │ ├── CCRH │ │ └── F1Kx │ │ │ ├── README.md │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ ├── CCS │ │ ├── ARM_CM3 │ │ │ ├── port.c │ │ │ ├── portasm.asm │ │ │ └── portmacro.h │ │ ├── ARM_CM4F │ │ │ ├── port.c │ │ │ ├── portasm.asm │ │ │ └── portmacro.h │ │ ├── ARM_Cortex-R4 │ │ │ ├── port.c │ │ │ ├── portASM.asm │ │ │ └── portmacro.h │ │ └── MSP430X │ │ │ ├── data_model.h │ │ │ ├── port.c │ │ │ ├── portext.asm │ │ │ └── portmacro.h │ ├── CMakeLists.txt │ ├── CodeWarrior │ │ ├── ColdFire_V1 │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── ColdFire_V2 │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ └── HCS12 │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── Common │ │ ├── mpu_wrappers.c │ │ └── mpu_wrappers_v2.c │ ├── GCC │ │ ├── ARM7_AT91FR40008 │ │ │ ├── port.c │ │ │ ├── portISR.c │ │ │ └── portmacro.h │ │ ├── ARM7_AT91SAM7S │ │ │ ├── AT91SAM7X256.h │ │ │ ├── ioat91sam7x256.h │ │ │ ├── lib_AT91SAM7X256.c │ │ │ ├── lib_AT91SAM7X256.h │ │ │ ├── port.c │ │ │ ├── portISR.c │ │ │ └── portmacro.h │ │ ├── ARM7_LPC2000 │ │ │ ├── port.c │ │ │ ├── portISR.c │ │ │ └── portmacro.h │ │ ├── ARM7_LPC23xx │ │ │ ├── port.c │ │ │ ├── portISR.c │ │ │ └── portmacro.h │ │ ├── ARM_CA53_64_BIT │ │ │ └── README.md │ │ ├── ARM_CA53_64_BIT_SRE │ │ │ └── README.md │ │ ├── ARM_CA9 │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── ARM_CM0 │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ ├── port.c │ │ │ ├── portasm.c │ │ │ ├── portasm.h │ │ │ └── portmacro.h │ │ ├── ARM_CM23 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port.c │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM23_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM3 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM33 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port.c │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM33_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM35P │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port.c │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM35P_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM3_MPU │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4F │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4_MPU │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM55 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port.c │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM55_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM7 │ │ │ ├── ReadMe.txt │ │ │ └── r0p1 │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ ├── ARM_CM85 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port.c │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM85_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ ├── port.c │ │ │ │ ├── portasm.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CR5 │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── ARM_CRx_MPU │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ ├── portmacro.h │ │ │ └── portmacro_asm.h │ │ ├── ARM_CRx_No_GIC │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── ATMega323 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── AVR32_UC3 │ │ │ ├── exception.S │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── AVR_AVRDx │ │ │ └── README.md │ │ ├── AVR_Mega0 │ │ │ └── README.md │ │ ├── Arm_AARCH64 │ │ │ ├── README.md │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── Arm_AARCH64_SRE │ │ │ ├── README.md │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── CORTUS_APS3 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ColdFire_V2 │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── H8S2329 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── HCS12 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── IA32_flat │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ └── portmacro.h │ │ ├── MCF5235 │ │ │ └── readme.md │ │ ├── MSP430F449 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── MicroBlaze │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── MicroBlazeV8 │ │ │ ├── port.c │ │ │ ├── port_exceptions.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── MicroBlazeV9 │ │ │ ├── port.c │ │ │ ├── port_exceptions.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── NiosII │ │ │ ├── port.c │ │ │ ├── port_asm.S │ │ │ └── portmacro.h │ │ ├── PPC405_Xilinx │ │ │ ├── FPU_Macros.h │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── PPC440_Xilinx │ │ │ ├── FPU_Macros.h │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── RISC-V │ │ │ ├── Documentation.url │ │ │ ├── chip_extensions.cmake │ │ │ ├── chip_specific_extensions │ │ │ │ ├── Pulpino_Vega_RV32M1RM │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ ├── RISCV_MTIME_CLINT_no_extensions │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ ├── RISCV_no_extensions │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ ├── RV32I_CLINT_no_extensions │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ └── readme.txt │ │ │ ├── port.c │ │ │ ├── portASM.S │ │ │ ├── portContext.h │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RL78 │ │ │ ├── isr_support.h │ │ │ ├── port.c │ │ │ ├── portasm.S │ │ │ └── portmacro.h │ │ ├── RX100 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX200 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── RX600 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX600v2 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX700v3_DPFPU │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── STR75x │ │ │ ├── port.c │ │ │ ├── portISR.c │ │ │ └── portmacro.h │ │ └── TriCore_1782 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── porttrap.c │ ├── IAR │ │ ├── 78K0R │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s26 │ │ │ └── portmacro.h │ │ ├── ARM_CA5_No_GIC │ │ │ ├── port.c │ │ │ ├── portASM.h │ │ │ ├── portASM.s │ │ │ └── portmacro.h │ │ ├── ARM_CA9 │ │ │ ├── port.c │ │ │ ├── portASM.h │ │ │ ├── portASM.s │ │ │ └── portmacro.h │ │ ├── ARM_CM0 │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── ARM_CM23 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port_asm.s │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM23_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM3 │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── ARM_CM33 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port_asm.s │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM33_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM35P │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port_asm.s │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM35P_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM4F │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── ARM_CM4F_MPU │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── ARM_CM55 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port_asm.s │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM55_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CM7 │ │ │ ├── ReadMe.txt │ │ │ └── r0p1 │ │ │ │ ├── port.c │ │ │ │ ├── portasm.s │ │ │ │ └── portmacro.h │ │ ├── ARM_CM85 │ │ │ ├── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ │ └── secure │ │ │ │ ├── secure_context.c │ │ │ │ ├── secure_context.h │ │ │ │ ├── secure_context_port_asm.s │ │ │ │ ├── secure_heap.c │ │ │ │ ├── secure_heap.h │ │ │ │ ├── secure_init.c │ │ │ │ ├── secure_init.h │ │ │ │ └── secure_port_macros.h │ │ ├── ARM_CM85_NTZ │ │ │ └── non_secure │ │ │ │ ├── mpu_wrappers_v2_asm.S │ │ │ │ ├── port.c │ │ │ │ ├── portasm.h │ │ │ │ ├── portasm.s │ │ │ │ ├── portmacro.h │ │ │ │ └── portmacrocommon.h │ │ ├── ARM_CRx_No_GIC │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ └── portmacro.h │ │ ├── ATMega323 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── portmacro.s90 │ │ ├── AVR32_UC3 │ │ │ ├── exception.s82 │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ ├── read.c │ │ │ └── write.c │ │ ├── AVR_AVRDx │ │ │ ├── port.c │ │ │ ├── porthardware.h │ │ │ ├── portmacro.h │ │ │ └── portmacro.s90 │ │ ├── AVR_Mega0 │ │ │ ├── port.c │ │ │ ├── porthardware.h │ │ │ ├── portmacro.h │ │ │ └── portmacro.s90 │ │ ├── AtmelSAM7S64 │ │ │ ├── AT91SAM7S64.h │ │ │ ├── AT91SAM7S64_inc.h │ │ │ ├── AT91SAM7X128.h │ │ │ ├── AT91SAM7X128_inc.h │ │ │ ├── AT91SAM7X256.h │ │ │ ├── AT91SAM7X256_inc.h │ │ │ ├── ISR_Support.h │ │ │ ├── lib_AT91SAM7S64.h │ │ │ ├── lib_AT91SAM7X128.h │ │ │ ├── lib_AT91SAM7X256.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ ├── AtmelSAM9XE │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ ├── LPC2000 │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ ├── MSP430 │ │ │ ├── port.c │ │ │ ├── portasm.h │ │ │ ├── portext.s43 │ │ │ └── portmacro.h │ │ ├── MSP430X │ │ │ ├── data_model.h │ │ │ ├── port.c │ │ │ ├── portext.s43 │ │ │ └── portmacro.h │ │ ├── RISC-V │ │ │ ├── Documentation.url │ │ │ ├── chip_extensions.cmake │ │ │ ├── chip_specific_extensions │ │ │ │ ├── RV32I_CLINT_no_extensions │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ └── readme.txt │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ ├── portContext.h │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RL78 │ │ │ ├── port.c │ │ │ ├── portasm.s │ │ │ └── portmacro.h │ │ ├── RX100 │ │ │ ├── port.c │ │ │ ├── port_asm.s │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX600 │ │ │ ├── port.c │ │ │ ├── port_asm.s │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX700v3_DPFPU │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RXv2 │ │ │ ├── port.c │ │ │ ├── port_asm.s │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── STR71x │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ ├── STR75x │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ ├── STR91x │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s79 │ │ │ └── portmacro.h │ │ └── V850ES │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── portasm.s85 │ │ │ ├── portasm_Fx3.s85 │ │ │ ├── portasm_Hx2.s85 │ │ │ └── portmacro.h │ ├── Keil │ │ └── See-also-the-RVDS-directory.txt │ ├── MPLAB │ │ ├── PIC18F │ │ │ ├── port.c │ │ │ ├── portmacro.h │ │ │ └── stdio.h │ │ ├── PIC24_dsPIC │ │ │ ├── port.c │ │ │ ├── portasm_PIC24.S │ │ │ ├── portasm_dsPIC.S │ │ │ └── portmacro.h │ │ ├── PIC32MEC14xx │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── port_asm.S │ │ │ └── portmacro.h │ │ ├── PIC32MX │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── port_asm.S │ │ │ └── portmacro.h │ │ └── PIC32MZ │ │ │ ├── ISR_Support.h │ │ │ ├── port.c │ │ │ ├── port_asm.S │ │ │ └── portmacro.h │ ├── MSVC-MingW │ │ ├── port.c │ │ └── portmacro.h │ ├── MemMang │ │ ├── ReadMe.url │ │ ├── heap_1.c │ │ ├── heap_2.c │ │ ├── heap_3.c │ │ ├── heap_4.c │ │ └── heap_5.c │ ├── MikroC │ │ └── ARM_CM4F │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── Paradigm │ │ └── Tern_EE │ │ │ ├── large_untested │ │ │ ├── port.c │ │ │ ├── portasm.h │ │ │ └── portmacro.h │ │ │ └── small │ │ │ ├── port.c │ │ │ ├── portasm.h │ │ │ └── portmacro.h │ ├── RVDS │ │ ├── ARM7_LPC21xx │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ ├── portmacro.h │ │ │ └── portmacro.inc │ │ ├── ARM_CA9 │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ ├── portmacro.h │ │ │ └── portmacro.inc │ │ ├── ARM_CM0 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM3 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4F │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4_MPU │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ └── ARM_CM7 │ │ │ ├── ReadMe.txt │ │ │ └── r0p1 │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── Renesas │ │ ├── RX100 │ │ │ ├── port.c │ │ │ ├── port_asm.src │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX200 │ │ │ ├── port.c │ │ │ ├── port_asm.src │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX600 │ │ │ ├── port.c │ │ │ ├── port_asm.src │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX600v2 │ │ │ ├── port.c │ │ │ ├── port_asm.src │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ ├── RX700v3_DPFPU │ │ │ ├── port.c │ │ │ ├── port_asm.src │ │ │ ├── portmacro.h │ │ │ └── readme.txt │ │ └── SH2A_FPU │ │ │ ├── ISR_Support.inc │ │ │ ├── port.c │ │ │ ├── portasm.src │ │ │ └── portmacro.h │ ├── Rowley │ │ ├── ARM7 │ │ │ └── readme.txt │ │ └── MSP430F449 │ │ │ ├── port.c │ │ │ ├── portasm.h │ │ │ ├── portext.asm │ │ │ └── portmacro.h │ ├── SDCC │ │ └── Cygnal │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── Softune │ │ ├── MB91460 │ │ │ ├── __STD_LIB_sbrk.c │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ └── MB96340 │ │ │ ├── __STD_LIB_sbrk.c │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── Tasking │ │ └── ARM_CM4F │ │ │ ├── port.c │ │ │ ├── port_asm.asm │ │ │ └── portmacro.h │ ├── ThirdParty │ │ ├── CDK │ │ │ └── T-HEAD_CK802 │ │ │ │ ├── port.c │ │ │ │ ├── portasm.S │ │ │ │ └── portmacro.h │ │ ├── Community-Supported-Ports │ │ │ ├── CCRH │ │ │ │ └── RH850_F1KM_S4 │ │ │ │ │ ├── README.md │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portasm.s │ │ │ │ │ └── portmacro.h │ │ │ ├── CCS │ │ │ │ └── C2000_C28x │ │ │ │ │ ├── README.md │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portasm.asm │ │ │ │ │ └── portmacro.h │ │ │ ├── GCC │ │ │ │ ├── CORTEX_A53_64-bit_UltraScale_MPSoC │ │ │ │ │ ├── ReadMe.txt │ │ │ │ │ ├── bsp_patches │ │ │ │ │ │ ├── ReadMe.txt │ │ │ │ │ │ ├── boot.S │ │ │ │ │ │ ├── cpu.c │ │ │ │ │ │ ├── cpu.h │ │ │ │ │ │ ├── scugic_v4_2_diff.png │ │ │ │ │ │ ├── standalone_v7_2_diff.png │ │ │ │ │ │ ├── xil-crt0.S │ │ │ │ │ │ └── xscugic.c │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portASM.S │ │ │ │ │ ├── portZynqUltrascale.c │ │ │ │ │ ├── port_asm_vectors.S │ │ │ │ │ └── portmacro.h │ │ │ │ ├── MSP430FR5969 │ │ │ │ │ ├── port.c │ │ │ │ │ └── portmacro.h │ │ │ │ ├── RISC-V │ │ │ │ │ └── chip_specific_extensions │ │ │ │ │ │ └── THEAD_RV32 │ │ │ │ │ │ └── freertos_risc_v_chip_specific_extensions.h │ │ │ │ ├── RP2350_ARM_NTZ │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── FreeRTOS_Kernel_import.cmake │ │ │ │ │ ├── LICENSE.md │ │ │ │ │ ├── README.md │ │ │ │ │ ├── library.cmake │ │ │ │ │ ├── non_secure │ │ │ │ │ │ ├── freertos_sdk_config.h │ │ │ │ │ │ ├── mpu_wrappers_v2_asm.c │ │ │ │ │ │ ├── port.c │ │ │ │ │ │ ├── portasm.c │ │ │ │ │ │ ├── portasm.h │ │ │ │ │ │ ├── portmacro.h │ │ │ │ │ │ ├── portmacrocommon.h │ │ │ │ │ │ └── rp2040_config.h │ │ │ │ │ └── pico_sdk_import.cmake │ │ │ │ ├── RP2350_RISC-V │ │ │ │ │ ├── CMakeLists.txt │ │ │ │ │ ├── Documentation.url │ │ │ │ │ ├── FreeRTOS_Kernel_import.cmake │ │ │ │ │ ├── LICENSE.md │ │ │ │ │ ├── README.md │ │ │ │ │ ├── include │ │ │ │ │ │ ├── freertos_risc_v_chip_specific_extensions.h │ │ │ │ │ │ ├── freertos_sdk_config.h │ │ │ │ │ │ ├── portContext.h │ │ │ │ │ │ ├── portmacro.h │ │ │ │ │ │ └── rp2040_config.h │ │ │ │ │ ├── library.cmake │ │ │ │ │ ├── notes.txt │ │ │ │ │ ├── pico_sdk_import.cmake │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portASM.S │ │ │ │ │ └── readme.txt │ │ │ │ └── TriCore_38xa │ │ │ │ │ ├── port.c │ │ │ │ │ ├── port.h │ │ │ │ │ ├── portmacro.h │ │ │ │ │ ├── porttrap.c │ │ │ │ │ └── readme.txt │ │ │ ├── LICENSE │ │ │ ├── README.md │ │ │ └── Z88DK │ │ │ │ └── Z180 │ │ │ │ ├── port.c │ │ │ │ ├── portmacro.h │ │ │ │ └── readme.md │ │ ├── GCC │ │ │ ├── ARC_EM_HS │ │ │ │ ├── arc_freertos_exceptions.c │ │ │ │ ├── arc_freertos_exceptions.h │ │ │ │ ├── arc_support.s │ │ │ │ ├── freertos_tls.c │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ ├── ARC_v1 │ │ │ │ ├── arc_freertos_exceptions.c │ │ │ │ ├── arc_freertos_exceptions.h │ │ │ │ ├── arc_support.s │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_TFM │ │ │ │ ├── README.md │ │ │ │ └── os_wrapper_freertos.c │ │ │ ├── ATmega │ │ │ │ ├── port.c │ │ │ │ ├── portmacro.h │ │ │ │ └── readme.md │ │ │ ├── Posix │ │ │ │ ├── FreeRTOS-simulator-for-Linux.url │ │ │ │ ├── port.c │ │ │ │ ├── portmacro.h │ │ │ │ └── utils │ │ │ │ │ ├── wait_for_event.c │ │ │ │ │ └── wait_for_event.h │ │ │ ├── RISC-V │ │ │ │ └── README-for-info-on-official-MIT-license-port.txt │ │ │ ├── RP2040 │ │ │ │ ├── CMakeLists.txt │ │ │ │ ├── FreeRTOS_Kernel_import.cmake │ │ │ │ ├── LICENSE.md │ │ │ │ ├── README.md │ │ │ │ ├── include │ │ │ │ │ ├── freertos_sdk_config.h │ │ │ │ │ ├── portmacro.h │ │ │ │ │ └── rp2040_config.h │ │ │ │ ├── library.cmake │ │ │ │ ├── pico_sdk_import.cmake │ │ │ │ └── port.c │ │ │ └── Xtensa_ESP32 │ │ │ │ ├── FreeRTOS-openocd.c │ │ │ │ ├── include │ │ │ │ ├── FreeRTOSConfig_arch.h │ │ │ │ ├── port_systick.h │ │ │ │ ├── portbenchmark.h │ │ │ │ ├── portmacro.h │ │ │ │ ├── xt_asm_utils.h │ │ │ │ ├── xtensa_api.h │ │ │ │ ├── xtensa_config.h │ │ │ │ ├── xtensa_context.h │ │ │ │ ├── xtensa_rtos.h │ │ │ │ └── xtensa_timer.h │ │ │ │ ├── port.c │ │ │ │ ├── port_common.c │ │ │ │ ├── port_systick.c │ │ │ │ ├── portasm.S │ │ │ │ ├── portmux_impl.h │ │ │ │ ├── portmux_impl.inc.h │ │ │ │ ├── xtensa_context.S │ │ │ │ ├── xtensa_init.c │ │ │ │ ├── xtensa_loadstore_handler.S │ │ │ │ ├── xtensa_overlay_os_hook.c │ │ │ │ ├── xtensa_vector_defaults.S │ │ │ │ └── xtensa_vectors.S │ │ ├── KnownIssues.md │ │ ├── Partner-Supported-Ports │ │ │ ├── Cadence │ │ │ │ └── Xtensa │ │ │ │ │ ├── Makefile │ │ │ │ │ ├── asm-offsets.c │ │ │ │ │ ├── mpu.S │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portasm.S │ │ │ │ │ ├── portbenchmark.h │ │ │ │ │ ├── portclib.c │ │ │ │ │ ├── portmacro.h │ │ │ │ │ ├── portmpu.c │ │ │ │ │ ├── porttrace.h │ │ │ │ │ ├── readme_xtensa.txt │ │ │ │ │ ├── relnotes.txt │ │ │ │ │ ├── xtensa_api.h │ │ │ │ │ ├── xtensa_config.h │ │ │ │ │ ├── xtensa_context.S │ │ │ │ │ ├── xtensa_context.h │ │ │ │ │ ├── xtensa_coproc_handler.S │ │ │ │ │ ├── xtensa_intr.c │ │ │ │ │ ├── xtensa_intr_asm.S │ │ │ │ │ ├── xtensa_intr_wrapper.c │ │ │ │ │ ├── xtensa_overlay_os_hook.c │ │ │ │ │ ├── xtensa_rtos.h │ │ │ │ │ ├── xtensa_timer.h │ │ │ │ │ ├── xtensa_vectors.S │ │ │ │ │ └── xtensa_vectors_xea3.S │ │ │ ├── GCC │ │ │ │ ├── AVR_AVRDx │ │ │ │ │ ├── port.c │ │ │ │ │ ├── porthardware.h │ │ │ │ │ └── portmacro.h │ │ │ │ └── AVR_Mega0 │ │ │ │ │ ├── port.c │ │ │ │ │ ├── porthardware.h │ │ │ │ │ └── portmacro.h │ │ │ ├── LICENSE │ │ │ ├── README.md │ │ │ ├── TI │ │ │ │ └── CORTEX_A53_64-BIT_TI_AM64_SMP │ │ │ │ │ ├── port.c │ │ │ │ │ ├── portASM.S │ │ │ │ │ └── portmacro.h │ │ │ └── Tasking │ │ │ │ └── AURIX_TC3xx │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ ├── README.md │ │ ├── XCC │ │ │ └── Xtensa │ │ │ │ └── readme_xtensa.txt │ │ └── xClang │ │ │ └── XCOREAI │ │ │ ├── port.c │ │ │ ├── port.xc │ │ │ ├── portasm.S │ │ │ ├── portmacro.h │ │ │ └── rtos_support_rtos_config.h │ ├── WizC │ │ └── PIC18 │ │ │ ├── Drivers │ │ │ └── Tick │ │ │ │ ├── Tick.c │ │ │ │ └── isrTick.c │ │ │ ├── Install.bat │ │ │ ├── addFreeRTOS.h │ │ │ ├── port.c │ │ │ └── portmacro.h │ ├── oWatcom │ │ └── 16BitDOS │ │ │ ├── Flsh186 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ │ ├── PC │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ │ └── common │ │ │ ├── portasm.h │ │ │ └── portcomn.c │ ├── readme.txt │ └── template │ │ ├── port.c │ │ └── portmacro.h ├── queue.c ├── sbom.spdx ├── stream_buffer.c ├── tasks.c └── timers.c └── gen_pack.sh /.github/dependabot.yml: -------------------------------------------------------------------------------- 1 | version: 2 2 | updates: 3 | - package-ecosystem: "github-actions" 4 | directory: ".github/workflows" 5 | schedule: 6 | interval: "weekly" 7 | open-pull-requests-limit: 10 8 | labels: 9 | - "dependencies" 10 | - "github-actions" 11 | commit-message: 12 | prefix: "chore" 13 | include: "scope" 14 | -------------------------------------------------------------------------------- /.github/workflows/build.yaml: -------------------------------------------------------------------------------- 1 | name: Build documentation and pack 2 | on: 3 | workflow_dispatch: 4 | push: 5 | branches: [ main ] 6 | pull_request: 7 | branches: [ main ] 8 | release: 9 | types: [published] 10 | jobs: 11 | pack: 12 | name: Generate pack 13 | runs-on: ubuntu-24.04 14 | steps: 15 | - uses: actions/checkout@v4 16 | with: 17 | fetch-depth: 0 18 | 19 | - name: Fetch tags 20 | if: ${{ github.event_name == 'release' }} 21 | run: | 22 | git fetch --tags --force 23 | 24 | - uses: Open-CMSIS-Pack/gen-pack-action@main 25 | with: 26 | doxygen-version: 1.13.2 # default 27 | packchk-version: 1.3.95 # default 28 | gen-doc-script: ./Documentation/Doxygen/gen_doc.sh # skipped by default 29 | doc-path: ./Documentation/html # skipped by default 30 | gen-pack-script: ./gen_pack.sh --no-preprocess # skipped by default 31 | gen-pack-output: ./output # skipped by default 32 | gh-pages-branch: gh-pages # default 33 | -------------------------------------------------------------------------------- /.github/workflows/examples.yaml: -------------------------------------------------------------------------------- 1 | name: Example 2 | on: 3 | workflow_dispatch: 4 | pull_request: 5 | paths: 6 | - .github/workflows/examples.yaml 7 | - CMSIS/RTOS2/FreeRTOS/Examples/* 8 | - CMSIS/RTOS2/FreeRTOS/Include/* 9 | - CMSIS/RTOS2/FreeRTOS/Source/* 10 | - Source/**/* 11 | - ARM.CMSIS-FreeRTOS.pdsc 12 | push: 13 | branches: [main] 14 | 15 | concurrency: 16 | group: ${{ github.workflow }}-${{ github.ref }} 17 | cancel-in-progress: true 18 | 19 | jobs: 20 | examples: 21 | strategy: 22 | fail-fast: true 23 | matrix: 24 | compiler: [AC6, GCC, CLANG] 25 | 26 | runs-on: ubuntu-24.04 27 | 28 | steps: 29 | - uses: actions/checkout@v4 30 | 31 | - name: Cache packs 32 | uses: actions/cache@v4 33 | with: 34 | key: packs-${{ github.run_id }}-${{ matrix.compiler }} 35 | restore-keys: | 36 | packs- 37 | path: /home/runner/.cache/arm/packs 38 | 39 | - name: Install LLVM dependencies and tools 40 | working-directory: /home/runner 41 | run: | 42 | sudo apt-get update 43 | sudo apt-get install libtinfo6 44 | 45 | - name: Prepare vcpkg env 46 | uses: ARM-software/cmsis-actions/vcpkg@main 47 | with: 48 | config: ./CMSIS/RTOS2/FreeRTOS/Examples/vcpkg-configuration.json 49 | 50 | - name: Activate Arm tool license 51 | run: | 52 | armlm activate --server https://mdk-preview.keil.arm.com --product KEMDK-COM0 53 | 54 | - uses: ammaraskar/gcc-problem-matcher@master 55 | 56 | - name: Register local pack 57 | run: | 58 | cpackget rm ARM.CMSIS-FreeRTOS || echo "Ok" 59 | cpackget add ./ARM.CMSIS-FreeRTOS.pdsc 60 | 61 | - name: Build exmples 62 | working-directory: ./CMSIS/RTOS2/FreeRTOS/Examples 63 | run: | 64 | cbuild Examples.csolution.yml --packs --update-rte --toolchain ${{ matrix.compiler }} 65 | 66 | - name: Deactivate Arm tool license 67 | if: always() 68 | run: | 69 | armlm deactivate --product KEMDK-COM0 70 | -------------------------------------------------------------------------------- /.github/workflows/gh-pages.yml: -------------------------------------------------------------------------------- 1 | # Simple workflow for deploying static content to GitHub Pages 2 | name: Deploy static content to GitHub Pages 3 | 4 | on: 5 | # Runs on pushes targeting the default branch 6 | push: 7 | branches: [gh-pages] 8 | 9 | # Allows you to run this workflow manually from the Actions tab 10 | workflow_dispatch: 11 | 12 | # Sets permissions of the GITHUB_TOKEN to allow deployment to GitHub Pages 13 | permissions: 14 | contents: read 15 | pages: write 16 | id-token: write 17 | 18 | # Allow only one concurrent deployment, skipping runs queued between the run in-progress and latest queued. 19 | # However, do NOT cancel in-progress runs as we want to allow these production deployments to complete. 20 | concurrency: 21 | group: "pages" 22 | cancel-in-progress: false 23 | 24 | jobs: 25 | # Single deploy job since we're just deploying 26 | deploy: 27 | environment: 28 | name: github-pages 29 | url: ${{ steps.deployment.outputs.page_url }} 30 | runs-on: ubuntu-latest 31 | steps: 32 | - name: Checkout 33 | uses: actions/checkout@v4 34 | 35 | - name: Setup Pages 36 | uses: actions/configure-pages@v5 37 | 38 | - name: Upload artifact 39 | uses: actions/upload-pages-artifact@v3 40 | with: 41 | # Upload entire repository 42 | path: '.' 43 | 44 | - name: Deploy to GitHub Pages 45 | id: deployment 46 | uses: actions/deploy-pages@v4 -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Ignored documentation outputs 2 | Documentation/Doxygen/*.dxy 3 | Documentation/Doxygen/src/history.txt 4 | Documentation/html 5 | 6 | # Ignored IDE and cbuild outputs 7 | **/_* 8 | **/out 9 | **/tmp 10 | **.cbuild*.yml 11 | **.clangd 12 | 13 | # Ignored gen_pack outputs 14 | build 15 | output 16 | **/linkchecker-out.csv 17 | 18 | # Ignored libraries 19 | **.a 20 | **.lib 21 | 22 | # Other files and directories 23 | **.bak 24 | **.DS_STORE 25 | **.tar.bz2 26 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/Hello.cproject.yml: -------------------------------------------------------------------------------- 1 | project: 2 | description: Hello World example 3 | 4 | packs: 5 | - pack: ARM::CMSIS@>=6.0.0 6 | - pack: ARM::Cortex_DFP 7 | - pack: ARM::CMSIS-FreeRTOS 8 | - pack: ARM::CMSIS-View 9 | 10 | components: 11 | - component: CMSIS:CORE 12 | - component: CMSIS:OS Tick:SysTick 13 | - component: CMSIS:RTOS2:FreeRTOS&Cortex-M 14 | - component: CMSIS-View:Event Recorder&Semihosting 15 | 16 | - component: RTOS&FreeRTOS:Core&Cortex-M 17 | - component: RTOS&FreeRTOS:Config&CMSIS RTOS2 18 | - component: RTOS&FreeRTOS:Event Groups 19 | - component: RTOS&FreeRTOS:Heap&Heap_4 20 | - component: RTOS&FreeRTOS:Timers 21 | 22 | groups: 23 | - group: Documentation 24 | files: 25 | - file: README.md 26 | - group: Application 27 | files: 28 | - file: hello.c 29 | - group: Board 30 | files: 31 | - file: main.c 32 | 33 | layers: 34 | - layer: $Target-Layer$ 35 | type: Target 36 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/README.md: -------------------------------------------------------------------------------- 1 | # Hello World Application 2 | This example prints "Hello World" and a counter value via the standard output. It 3 | can be used as a starting point when developing new applications. 4 | 5 | ### Functionality 6 | The application initializes CMSIS-RTOS2, creates the main application thread and starts 7 | the RTOS scheduler. The application thread increments a counter and outputs it together 8 | with the counter value. 9 | 10 | ### Output 11 | The "Hello World" string, along with the counter value, is output via printf and 12 | retargeted to the debug console. 13 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/RTE/CMSIS-View/EventRecorderConf.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2016-2021 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: EventRecorderConf.h 19 | * Purpose: Event Recorder software component configuration options 20 | * Rev.: V1.1.0 21 | */ 22 | 23 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 24 | 25 | // Event Recorder 26 | 27 | // Number of Records 28 | // <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024 29 | // <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768 30 | // <65536=>65536 31 | // Configures size of Event Record Buffer (each record is 16 bytes) 32 | // Must be 2^n (min=8, max=65536) 33 | #define EVENT_RECORD_COUNT 256U 34 | 35 | // Time Stamp Source 36 | // <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer 37 | // <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset) 38 | // Selects source for 32-bit time stamp 39 | #define EVENT_TIMESTAMP_SOURCE 0 40 | 41 | // Time Stamp Clock Frequency [Hz] <0-1000000000> 42 | // Defines initial time stamp clock frequency (0 when not used) 43 | #define EVENT_TIMESTAMP_FREQ 0U 44 | 45 | // 46 | 47 | //------------- <<< end of configuration section >>> --------------------------- 48 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/RTE/CMSIS-View/EventRecorderConf.h.base@1.1.0: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2016-2021 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: EventRecorderConf.h 19 | * Purpose: Event Recorder software component configuration options 20 | * Rev.: V1.1.0 21 | */ 22 | 23 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 24 | 25 | // Event Recorder 26 | 27 | // Number of Records 28 | // <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024 29 | // <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768 30 | // <65536=>65536 31 | // Configures size of Event Record Buffer (each record is 16 bytes) 32 | // Must be 2^n (min=8, max=65536) 33 | #define EVENT_RECORD_COUNT 64U 34 | 35 | // Time Stamp Source 36 | // <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer 37 | // <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset) 38 | // Selects source for 32-bit time stamp 39 | #define EVENT_TIMESTAMP_SOURCE 0 40 | 41 | // Time Stamp Clock Frequency [Hz] <0-1000000000> 42 | // Defines initial time stamp clock frequency (0 when not used) 43 | #define EVENT_TIMESTAMP_FREQ 0U 44 | 45 | // 46 | 47 | //------------- <<< end of configuration section >>> --------------------------- 48 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/hello.c: -------------------------------------------------------------------------------- 1 | /*--------------------------------------------------------------------------- 2 | * Copyright (c) 2024 Arm Limited (or its affiliates). All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | *---------------------------------------------------------------------------*/ 18 | 19 | #include 20 | #include "main.h" 21 | #include "cmsis_os2.h" 22 | 23 | /*--------------------------------------------------------------------------- 24 | * Application main thread 25 | *---------------------------------------------------------------------------*/ 26 | static void app_main (void *argument) { 27 | (void)argument; 28 | 29 | for(int count = 0; count < 10; count++) { 30 | printf("Hello World %d\r\n", count); 31 | osDelay(1000U); 32 | } 33 | osDelay(osWaitForever); 34 | } 35 | 36 | /*--------------------------------------------------------------------------- 37 | * Application initialization 38 | *---------------------------------------------------------------------------*/ 39 | void app_initialize (void) { 40 | osThreadNew(app_main, NULL, NULL); 41 | } 42 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/main.c: -------------------------------------------------------------------------------- 1 | /*--------------------------------------------------------------------------- 2 | * Copyright (c) 2021-2023 Arm Limited (or its affiliates). 3 | * All rights reserved. 4 | * 5 | * SPDX-License-Identifier: Apache-2.0 6 | * 7 | * Licensed under the Apache License, Version 2.0 (the License); you may 8 | * not use this file except in compliance with the License. 9 | * You may obtain a copy of the License at 10 | * 11 | * www.apache.org/licenses/LICENSE-2.0 12 | * 13 | * Unless required by applicable law or agreed to in writing, software 14 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 15 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 | * See the License for the specific language governing permissions and 17 | * limitations under the License. 18 | *---------------------------------------------------------------------------*/ 19 | 20 | #include "RTE_Components.h" 21 | #include CMSIS_device_header 22 | #include "cmsis_os2.h" 23 | 24 | #include "main.h" 25 | 26 | int main (void) { 27 | 28 | osKernelInitialize(); // Initialize CMSIS-RTOS2 29 | app_initialize(); // Initialize application 30 | osKernelStart(); // Start thread execution 31 | 32 | for (;;) {} 33 | } 34 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/Hello/main.h: -------------------------------------------------------------------------------- 1 | /*--------------------------------------------------------------------------- 2 | * Copyright (c) 2021-2023 Arm Limited (or its affiliates). 3 | * All rights reserved. 4 | * 5 | * SPDX-License-Identifier: Apache-2.0 6 | * 7 | * Licensed under the Apache License, Version 2.0 (the License); you may 8 | * not use this file except in compliance with the License. 9 | * You may obtain a copy of the License at 10 | * 11 | * www.apache.org/licenses/LICENSE-2.0 12 | * 13 | * Unless required by applicable law or agreed to in writing, software 14 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 15 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 | * See the License for the specific language governing permissions and 17 | * limitations under the License. 18 | *---------------------------------------------------------------------------*/ 19 | 20 | #ifndef MAIN_H__ 21 | #define MAIN_H__ 22 | 23 | /* Prototypes */ 24 | extern void app_initialize (void); 25 | 26 | #endif 27 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/NonSecure/README.md: -------------------------------------------------------------------------------- 1 | # TrustZone NonSecure Application 2 | The TrustZone Non-Secure example project shows the setup of the CMSIS-RTOS2 FreeRTOS 3 | application for Armv8-M TrustZone. It demonstrates how the Non-Secure application uses 4 | the Arm CMSE interface to communicate with the Secure application via function calls. 5 | 6 | > **Note:** 7 | > - The TrustZone Secure example project must be used together with Non-Secure project 8 | > to successfully execute the application on target. 9 | 10 | ### Functionality 11 | The application executes CMSIS-RTOS2 thread which calls a secure side function from 12 | the non-secure side. The secure function then calls back to a non-secure side. The 13 | return value of the secure function is the value of a counter variable stored on 14 | the secure side. 15 | 16 | ### Output 17 | Counter values used in this application are output via printf and retargeted to debug 18 | console. 19 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/NonSecure/RTE/CMSIS-View/EventRecorderConf.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2016-2021 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: EventRecorderConf.h 19 | * Purpose: Event Recorder software component configuration options 20 | * Rev.: V1.1.0 21 | */ 22 | 23 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 24 | 25 | // Event Recorder 26 | 27 | // Number of Records 28 | // <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024 29 | // <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768 30 | // <65536=>65536 31 | // Configures size of Event Record Buffer (each record is 16 bytes) 32 | // Must be 2^n (min=8, max=65536) 33 | #define EVENT_RECORD_COUNT 256U 34 | 35 | // Time Stamp Source 36 | // <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer 37 | // <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset) 38 | // Selects source for 32-bit time stamp 39 | #define EVENT_TIMESTAMP_SOURCE 0 40 | 41 | // Time Stamp Clock Frequency [Hz] <0-1000000000> 42 | // Defines initial time stamp clock frequency (0 when not used) 43 | #define EVENT_TIMESTAMP_FREQ 0U 44 | 45 | // 46 | 47 | //------------- <<< end of configuration section >>> --------------------------- 48 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/NonSecure/RTE/CMSIS-View/EventRecorderConf.h.base@1.1.0: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2016-2021 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: EventRecorderConf.h 19 | * Purpose: Event Recorder software component configuration options 20 | * Rev.: V1.1.0 21 | */ 22 | 23 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 24 | 25 | // Event Recorder 26 | 27 | // Number of Records 28 | // <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024 29 | // <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768 30 | // <65536=>65536 31 | // Configures size of Event Record Buffer (each record is 16 bytes) 32 | // Must be 2^n (min=8, max=65536) 33 | #define EVENT_RECORD_COUNT 64U 34 | 35 | // Time Stamp Source 36 | // <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer 37 | // <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset) 38 | // Selects source for 32-bit time stamp 39 | #define EVENT_TIMESTAMP_SOURCE 0 40 | 41 | // Time Stamp Clock Frequency [Hz] <0-1000000000> 42 | // Defines initial time stamp clock frequency (0 when not used) 43 | #define EVENT_TIMESTAMP_FREQ 0U 44 | 45 | // 46 | 47 | //------------- <<< end of configuration section >>> --------------------------- 48 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/NonSecure/TZ_NonSecure.cproject.yml: -------------------------------------------------------------------------------- 1 | project: 2 | 3 | processor: 4 | trustzone: non-secure 5 | 6 | packs: 7 | - pack: ARM::CMSIS@>=6.0.0 8 | - pack: ARM::CMSIS-FreeRTOS 9 | - pack: ARM::CMSIS-View 10 | 11 | components: 12 | - component: CMSIS:CORE 13 | - component: CMSIS:OS Tick:SysTick 14 | - component: CMSIS:RTOS2:FreeRTOS&Cortex-M 15 | - component: CMSIS-View:Event Recorder&Semihosting 16 | 17 | - component: RTOS&FreeRTOS:Core&Cortex-M 18 | - component: RTOS&FreeRTOS:Config&CMSIS RTOS2 19 | - component: RTOS&FreeRTOS:Event Groups 20 | - component: RTOS&FreeRTOS:Heap&Heap_4 21 | - component: RTOS&FreeRTOS:Timers 22 | 23 | groups: 24 | - group: Documentation 25 | files: 26 | - file: ../README.md 27 | 28 | - group: Non-secure Code 29 | files: 30 | - file: main_ns.c 31 | 32 | - group: Secure Library 33 | files: 34 | - file: ../Secure/library_nsc.h 35 | - file: $cmse-lib(TZ_Secure)$ 36 | 37 | layers: 38 | - layer: $Target-Layer$ 39 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/README.md: -------------------------------------------------------------------------------- 1 | # TrustZone: secure/non-secure thread context management 2 | 3 | TrustZone example shows application setup for secure/non-secure thread context management. 4 | It is divided into two parts: 5 | - Secure application 6 | - Non-secure application 7 | 8 | ## Secure Application 9 | 10 | Secure application does initial setup and starts the non-secure application. It contains functions 11 | that can be called from the non-secure application. The interface for these (non-secure callable) 12 | functions is provided as "CMSE lib" object file, which is integrated into the non-secure application. 13 | 14 | ## Non-secure Application 15 | 16 | Non-secure application initializes RTOS and executes thread that calls secure function. In addition 17 | it also contains a callback function which gets called from the secure application. 18 | 19 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/Secure/README.md: -------------------------------------------------------------------------------- 1 | # TrustZone Secure Application 2 | The TrustZone Secure example project shows the setup of the CMSIS-RTOS2 FreeRTOS 3 | application for Armv8-M TrustZone. It demonstrates how the Secure application boots 4 | from the secure side and passes the execution to the application running on the 5 | non-secure side. It also shows how to define secure side functions that can be called 6 | from the non-secure side application. 7 | 8 | ### Functionality 9 | The application sets the stack for the non-secure side and then calls the Reset Handler on 10 | the non-secure side. It also provides the function that is declared as a non-secure 11 | callable function (i.e. it can be called from the non-secure side application). 12 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/Secure/TZ_Secure.cproject.yml: -------------------------------------------------------------------------------- 1 | project: 2 | 3 | processor: 4 | trustzone: secure 5 | 6 | packs: 7 | - pack: ARM::CMSIS@>=6.0.0 8 | - pack: ARM::CMSIS-FreeRTOS 9 | 10 | components: 11 | - component: CMSIS:CORE 12 | - component: RTOS&FreeRTOS:TrustZone 13 | 14 | groups: 15 | - group: Documentation 16 | files: 17 | - file: ../README.md 18 | 19 | - group: Secure Code 20 | files: 21 | - file: main_s.c 22 | 23 | - group: Secure Library 24 | files: 25 | - file: library_nsc.c 26 | 27 | layers: 28 | - layer: $Target-Layer$ -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/Secure/library_nsc.c: -------------------------------------------------------------------------------- 1 | /* -------------------------------------------------------------------------- 2 | * Copyright (c) 2013-2019 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: library_nsc.c 19 | * Purpose: Example function callable from the non-secure domain 20 | * 21 | *---------------------------------------------------------------------------*/ 22 | 23 | #include 24 | #include "secure_port_macros.h" // ARM.FreeRTOS::RTOS:TrustZone 25 | 26 | #include "library_nsc.h" // Non-secure callable function definition 27 | 28 | /* Non-secure function pointer type */ 29 | typedef void (*NS_Func_t) (void) __attribute__((cmse_nonsecure_call)); 30 | 31 | 32 | /* Secure counter */ 33 | static uint32_t Count_S = 0U; 34 | 35 | /* Function that can be called from the non-secure application */ 36 | secureportNON_SECURE_CALLABLE uint32_t Func_NSC (Callback_t callback) { 37 | NS_Func_t ns_callback; 38 | 39 | /* Create function pointer to call back non-secure domain */ 40 | ns_callback = (NS_Func_t)cmse_nsfptr_create(callback); 41 | 42 | /* Execute callback function */ 43 | ns_callback(); 44 | 45 | Count_S += 1U; 46 | 47 | /* Return secure counter value */ 48 | return Count_S; 49 | } 50 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/Secure/library_nsc.h: -------------------------------------------------------------------------------- 1 | /* -------------------------------------------------------------------------- 2 | * Copyright (c) 2013-2019 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: library_nsc.h 19 | * Purpose: Example function callable from the non-secure domain 20 | * 21 | *---------------------------------------------------------------------------*/ 22 | 23 | #ifndef LIBRARY_NSC_H__ 24 | #define LIBRARY_NSC_H__ 25 | 26 | #include 27 | 28 | /* Callback function pointer type */ 29 | typedef void (*Callback_t) (void); 30 | 31 | 32 | /* 33 | Secure function that executes: 34 | - callback to the non-secure application 35 | - increments secure counter and return its value 36 | */ 37 | uint32_t Func_NSC (Callback_t callback); 38 | 39 | #endif /* LIBRARY_NSC */ 40 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/App/TrustZone/Secure/main_s.c: -------------------------------------------------------------------------------- 1 | /* -------------------------------------------------------------------------- 2 | * Copyright (c) 2013-2022 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * Name: main_s.c 19 | * Purpose: TrustZone Secure Domain example program 20 | * 21 | *---------------------------------------------------------------------------*/ 22 | 23 | #include 24 | #include 25 | #include "secure_port_macros.h" // ARM.FreeRTOS::RTOS:TrustZone 26 | 27 | 28 | /* Start address of non-secure application */ 29 | #ifndef NS_APP_START_ADDRESS 30 | #define NS_APP_START_ADDRESS (0x00000000) 31 | #endif 32 | 33 | /* Non-secure function pointer type */ 34 | typedef void (*NS_Func_t) (void) __attribute__((cmse_nonsecure_call)); 35 | 36 | /* 37 | Fist entry in the non-secure vector table is the Main Stack Pointer: 38 | *((uint32_t *)(NS_APP_START_ADDRESS)) == MSP_NS 39 | 40 | Second entry in the non-secure vector table is the Reset Handler: 41 | *((uint32_t *)(NS_APP_START_ADDRESS + 4U)) == Reset_Handler 42 | */ 43 | 44 | 45 | int main (void) { 46 | NS_Func_t ResetHandler_NS; 47 | 48 | /* Set Main Stack Pointer for the non-secure side (MSP_NS) */ 49 | secureportSET_MSP_NS (*((uint32_t *)(NS_APP_START_ADDRESS))); 50 | 51 | /* Set address of the non-secure Reset Handler */ 52 | ResetHandler_NS = (NS_Func_t)(*((uint32_t *)(NS_APP_START_ADDRESS + 4U))); 53 | 54 | /* Call non-secure Reset Handler and start executing non-secure application */ 55 | ResetHandler_NS(); 56 | 57 | /* Non-secure application does not return */ 58 | for (;;){;} 59 | } 60 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0/RTE/Device/ARMCM0/regions_ARMCM0.h: -------------------------------------------------------------------------------- 1 | #ifndef REGIONS_ARMCM0_H 2 | #define REGIONS_ARMCM0_H 3 | 4 | 5 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 6 | 7 | // Device pack: ARM::Cortex_DFP@1.0.0 8 | // Device pack used to generate this file 9 | 10 | // ROM Configuration 11 | // ======================= 12 | // ROM=<__ROM0> 13 | // Base address <0x0-0xFFFFFFFF:8> 14 | // Defines base address of memory region. 15 | // Default: 0x00000000 16 | #define __ROM0_BASE 0x00000000 17 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 18 | // Defines size of memory region. 19 | // Default: 0x00040000 20 | #define __ROM0_SIZE 0x00400000 21 | // Default region 22 | // Enables memory region globally for the application. 23 | #define __ROM0_DEFAULT 1 24 | // Startup 25 | // Selects region to be used for startup code. 26 | #define __ROM0_STARTUP 1 27 | // 28 | 29 | // 30 | 31 | // RAM Configuration 32 | // ======================= 33 | // RAM=<__RAM0> 34 | // Base address <0x0-0xFFFFFFFF:8> 35 | // Defines base address of memory region. 36 | // Default: 0x20000000 37 | #define __RAM0_BASE 0x20000000 38 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 39 | // Defines size of memory region. 40 | // Default: 0x00020000 41 | #define __RAM0_SIZE 0x00400000 42 | // Default region 43 | // Enables memory region globally for the application. 44 | #define __RAM0_DEFAULT 1 45 | // No zero initialize 46 | // Excludes region from zero initialization. 47 | #define __RAM0_NOINIT 0 48 | // 49 | 50 | // 51 | 52 | // Stack / Heap Configuration 53 | // Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 54 | // Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55 | #define __STACK_SIZE 0x00001000 56 | #define __HEAP_SIZE 0x00010000 57 | // 58 | 59 | 60 | #endif /* REGIONS_ARMCM0_H */ 61 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0/RTE/Device/ARMCM0/system_ARMCM0.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_ARMCM0.c 3 | * @brief CMSIS Device System Source File for 4 | * ARMCM0 Device 5 | * @version V1.0.0 6 | * @date 09. July 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #include "ARMCM0.h" 27 | 28 | /*---------------------------------------------------------------------------- 29 | Define clocks 30 | *----------------------------------------------------------------------------*/ 31 | #define XTAL (50000000UL) /* Oscillator frequency */ 32 | 33 | #define SYSTEM_CLOCK (XTAL / 2U) 34 | 35 | 36 | /*---------------------------------------------------------------------------- 37 | System Core Clock Variable 38 | *----------------------------------------------------------------------------*/ 39 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ 40 | 41 | 42 | /*---------------------------------------------------------------------------- 43 | System Core Clock update function 44 | *----------------------------------------------------------------------------*/ 45 | void SystemCoreClockUpdate (void) 46 | { 47 | SystemCoreClock = SYSTEM_CLOCK; 48 | } 49 | 50 | /*---------------------------------------------------------------------------- 51 | System initialization function 52 | *----------------------------------------------------------------------------*/ 53 | void SystemInit (void) 54 | { 55 | SystemCoreClock = SYSTEM_CLOCK; 56 | } 57 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0/RTE/Device/ARMCM0/system_ARMCM0.c.base@1.0.0: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_ARMCM0.c 3 | * @brief CMSIS Device System Source File for 4 | * ARMCM0 Device 5 | * @version V1.0.0 6 | * @date 09. July 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #include "ARMCM0.h" 27 | 28 | /*---------------------------------------------------------------------------- 29 | Define clocks 30 | *----------------------------------------------------------------------------*/ 31 | #define XTAL (50000000UL) /* Oscillator frequency */ 32 | 33 | #define SYSTEM_CLOCK (XTAL / 2U) 34 | 35 | 36 | /*---------------------------------------------------------------------------- 37 | System Core Clock Variable 38 | *----------------------------------------------------------------------------*/ 39 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ 40 | 41 | 42 | /*---------------------------------------------------------------------------- 43 | System Core Clock update function 44 | *----------------------------------------------------------------------------*/ 45 | void SystemCoreClockUpdate (void) 46 | { 47 | SystemCoreClock = SYSTEM_CLOCK; 48 | } 49 | 50 | /*---------------------------------------------------------------------------- 51 | System initialization function 52 | *----------------------------------------------------------------------------*/ 53 | void SystemInit (void) 54 | { 55 | SystemCoreClock = SYSTEM_CLOCK; 56 | } 57 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M0 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM0 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0/fvp_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xab' : T32 SVC number for semihosting 5 | armcortexm0ct.semihosting-cmd_line= # (string, init-time) default = '' : Command line available to semihosting SVC calls 6 | armcortexm0ct.semihosting-cwd= # (string, init-time) default = '' : Base directory for semihosting file access. 7 | armcortexm0ct.semihosting-enable=1 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 8 | armcortexm0ct.semihosting-heap_base=0 # (int , init-time) default = '0x0' : Virtual address of heap base 9 | armcortexm0ct.semihosting-heap_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of top of heap 10 | armcortexm0ct.semihosting-stack_base=0 # (int , init-time) default = '0x20800000' : Virtual address of base of descending stack 11 | armcortexm0ct.semihosting-stack_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of stack limit 12 | fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation 13 | fvp_mps2.telnetterminal0.start_telnet=0 # (bool , init-time) default = '1' : Start telnet if nothing connected 14 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0plus/RTE/Device/ARMCM0P/regions_ARMCM0P.h: -------------------------------------------------------------------------------- 1 | #ifndef REGIONS_ARMCM0P_H 2 | #define REGIONS_ARMCM0P_H 3 | 4 | 5 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 6 | 7 | // Device pack: ARM::Cortex_DFP@1.0.0 8 | // Device pack used to generate this file 9 | 10 | // ROM Configuration 11 | // ======================= 12 | // ROM=<__ROM0> 13 | // Base address <0x0-0xFFFFFFFF:8> 14 | // Defines base address of memory region. 15 | // Default: 0x00000000 16 | #define __ROM0_BASE 0x00000000 17 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 18 | // Defines size of memory region. 19 | // Default: 0x00040000 20 | #define __ROM0_SIZE 0x00400000 21 | // Default region 22 | // Enables memory region globally for the application. 23 | #define __ROM0_DEFAULT 1 24 | // Startup 25 | // Selects region to be used for startup code. 26 | #define __ROM0_STARTUP 1 27 | // 28 | 29 | // 30 | 31 | // RAM Configuration 32 | // ======================= 33 | // RAM=<__RAM0> 34 | // Base address <0x0-0xFFFFFFFF:8> 35 | // Defines base address of memory region. 36 | // Default: 0x20000000 37 | #define __RAM0_BASE 0x20000000 38 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 39 | // Defines size of memory region. 40 | // Default: 0x00020000 41 | #define __RAM0_SIZE 0x00400000 42 | // Default region 43 | // Enables memory region globally for the application. 44 | #define __RAM0_DEFAULT 1 45 | // No zero initialize 46 | // Excludes region from zero initialization. 47 | #define __RAM0_NOINIT 0 48 | // 49 | 50 | // 51 | 52 | // Stack / Heap Configuration 53 | // Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 54 | // Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55 | #define __STACK_SIZE 0x00001000 56 | #define __HEAP_SIZE 0x00010000 57 | // 58 | 59 | 60 | #endif /* REGIONS_ARMCM0P_H */ 61 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0plus/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M0+ target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM0P 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM0plus/fvp_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0plusct.VTOR=0 # (bool , init-time) default = '0' : Include Vector Table Offset Register 5 | armcortexm0plusct.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xab' : T32 SVC number for semihosting 6 | armcortexm0plusct.semihosting-cmd_line= # (string, init-time) default = '' : Command line available to semihosting SVC calls 7 | armcortexm0plusct.semihosting-cwd= # (string, init-time) default = '' : Base directory for semihosting file access. 8 | armcortexm0plusct.semihosting-enable=1 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 9 | armcortexm0plusct.semihosting-heap_base=0 # (int , init-time) default = '0x0' : Virtual address of heap base 10 | armcortexm0plusct.semihosting-heap_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of top of heap 11 | armcortexm0plusct.semihosting-stack_base=0 # (int , init-time) default = '0x20800000' : Virtual address of base of descending stack 12 | armcortexm0plusct.semihosting-stack_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of stack limit 13 | fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation 14 | fvp_mps2.telnetterminal0.start_telnet=0 # (bool , init-time) default = '1' : Start telnet if nothing connected 15 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM23/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M23 with TrustZone target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM23 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM23_noTZ/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M23 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM23 9 | processor: 10 | trustzone: off 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM3/RTE/Device/ARMCM3/regions_ARMCM3.h: -------------------------------------------------------------------------------- 1 | #ifndef REGIONS_ARMCM3_H 2 | #define REGIONS_ARMCM3_H 3 | 4 | 5 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 6 | 7 | // Device pack: ARM::Cortex_DFP@1.0.0 8 | // Device pack used to generate this file 9 | 10 | // ROM Configuration 11 | // ======================= 12 | // ROM=<__ROM0> 13 | // Base address <0x0-0xFFFFFFFF:8> 14 | // Defines base address of memory region. 15 | // Default: 0x00000000 16 | #define __ROM0_BASE 0x00000000 17 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 18 | // Defines size of memory region. 19 | // Default: 0x00040000 20 | #define __ROM0_SIZE 0x00400000 21 | // Default region 22 | // Enables memory region globally for the application. 23 | #define __ROM0_DEFAULT 1 24 | // Startup 25 | // Selects region to be used for startup code. 26 | #define __ROM0_STARTUP 1 27 | // 28 | 29 | // 30 | 31 | // RAM Configuration 32 | // ======================= 33 | // RAM=<__RAM0> 34 | // Base address <0x0-0xFFFFFFFF:8> 35 | // Defines base address of memory region. 36 | // Default: 0x20000000 37 | #define __RAM0_BASE 0x20000000 38 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 39 | // Defines size of memory region. 40 | // Default: 0x00020000 41 | #define __RAM0_SIZE 0x00400000 42 | // Default region 43 | // Enables memory region globally for the application. 44 | #define __RAM0_DEFAULT 1 45 | // No zero initialize 46 | // Excludes region from zero initialization. 47 | #define __RAM0_NOINIT 0 48 | // 49 | 50 | // 51 | 52 | // Stack / Heap Configuration 53 | // Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 54 | // Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55 | #define __STACK_SIZE 0x00001000 56 | #define __HEAP_SIZE 0x00010000 57 | // 58 | 59 | 60 | #endif /* REGIONS_ARMCM3_H */ 61 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM3/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M3 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM3 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM3/fvp_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xab' : T32 SVC number for semihosting 5 | armcortexm3ct.semihosting-cmd_line= # (string, init-time) default = '' : Command line available to semihosting SVC calls 6 | armcortexm3ct.semihosting-cwd= # (string, init-time) default = '' : Base directory for semihosting file access. 7 | armcortexm3ct.semihosting-enable=1 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 8 | armcortexm3ct.semihosting-heap_base=0 # (int , init-time) default = '0x0' : Virtual address of heap base 9 | armcortexm3ct.semihosting-heap_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of top of heap 10 | armcortexm3ct.semihosting-stack_base=0 # (int , init-time) default = '0x20800000' : Virtual address of base of descending stack 11 | armcortexm3ct.semihosting-stack_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of stack limit 12 | fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation 13 | fvp_mps2.telnetterminal0.start_telnet=0 # (bool , init-time) default = '1' : Start telnet if nothing connected 14 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM33/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M33 with TrustZone target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM33 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM33_noTZ/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M33 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM33 9 | processor: 10 | trustzone: off 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM4/RTE/Device/ARMCM4/regions_ARMCM4.h: -------------------------------------------------------------------------------- 1 | #ifndef REGIONS_ARMCM4_H 2 | #define REGIONS_ARMCM4_H 3 | 4 | 5 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 6 | 7 | // Device pack: ARM::Cortex_DFP@1.0.0 8 | // Device pack used to generate this file 9 | 10 | // ROM Configuration 11 | // ======================= 12 | // ROM=<__ROM0> 13 | // Base address <0x0-0xFFFFFFFF:8> 14 | // Defines base address of memory region. 15 | // Default: 0x00000000 16 | #define __ROM0_BASE 0x00000000 17 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 18 | // Defines size of memory region. 19 | // Default: 0x00040000 20 | #define __ROM0_SIZE 0x00400000 21 | // Default region 22 | // Enables memory region globally for the application. 23 | #define __ROM0_DEFAULT 1 24 | // Startup 25 | // Selects region to be used for startup code. 26 | #define __ROM0_STARTUP 1 27 | // 28 | 29 | // 30 | 31 | // RAM Configuration 32 | // ======================= 33 | // RAM=<__RAM0> 34 | // Base address <0x0-0xFFFFFFFF:8> 35 | // Defines base address of memory region. 36 | // Default: 0x20000000 37 | #define __RAM0_BASE 0x20000000 38 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 39 | // Defines size of memory region. 40 | // Default: 0x00020000 41 | #define __RAM0_SIZE 0x00400000 42 | // Default region 43 | // Enables memory region globally for the application. 44 | #define __RAM0_DEFAULT 1 45 | // No zero initialize 46 | // Excludes region from zero initialization. 47 | #define __RAM0_NOINIT 0 48 | // 49 | 50 | // 51 | 52 | // Stack / Heap Configuration 53 | // Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 54 | // Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55 | #define __STACK_SIZE 0x00001000 56 | #define __HEAP_SIZE 0x00010000 57 | // 58 | 59 | 60 | #endif /* REGIONS_ARMCM4_H */ 61 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM4/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M4 with FPU target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM4 9 | processor: 10 | fpu: sp 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM4/fvp_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xab' : T32 SVC number for semihosting 5 | armcortexm4ct.semihosting-cmd_line= # (string, init-time) default = '' : Command line available to semihosting SVC calls 6 | armcortexm4ct.semihosting-cwd= # (string, init-time) default = '' : Base directory for semihosting file access. 7 | armcortexm4ct.semihosting-enable=1 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 8 | armcortexm4ct.semihosting-heap_base=0 # (int , init-time) default = '0x0' : Virtual address of heap base 9 | armcortexm4ct.semihosting-heap_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of top of heap 10 | armcortexm4ct.semihosting-stack_base=0 # (int , init-time) default = '0x20800000' : Virtual address of base of descending stack 11 | armcortexm4ct.semihosting-stack_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of stack limit 12 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 13 | fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation 14 | fvp_mps2.telnetterminal0.start_telnet=0 # (bool , init-time) default = '1' : Start telnet if nothing connected 15 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM55/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M55 with TrustZone target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM55 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM55_noTZ/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M55 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM55 9 | processor: 10 | trustzone: off 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM7/RTE/Device/ARMCM7/regions_ARMCM7.h: -------------------------------------------------------------------------------- 1 | #ifndef REGIONS_ARMCM7_H 2 | #define REGIONS_ARMCM7_H 3 | 4 | 5 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 6 | 7 | // Device pack: ARM::Cortex_DFP@1.0.0 8 | // Device pack used to generate this file 9 | 10 | // ROM Configuration 11 | // ======================= 12 | // ROM=<__ROM0> 13 | // Base address <0x0-0xFFFFFFFF:8> 14 | // Defines base address of memory region. 15 | // Default: 0x00000000 16 | #define __ROM0_BASE 0x00000000 17 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 18 | // Defines size of memory region. 19 | // Default: 0x00040000 20 | #define __ROM0_SIZE 0x00400000 21 | // Default region 22 | // Enables memory region globally for the application. 23 | #define __ROM0_DEFAULT 1 24 | // Startup 25 | // Selects region to be used for startup code. 26 | #define __ROM0_STARTUP 1 27 | // 28 | 29 | // 30 | 31 | // RAM Configuration 32 | // ======================= 33 | // RAM=<__RAM0> 34 | // Base address <0x0-0xFFFFFFFF:8> 35 | // Defines base address of memory region. 36 | // Default: 0x20000000 37 | #define __RAM0_BASE 0x20000000 38 | // Region size [bytes] <0x0-0xFFFFFFFF:8> 39 | // Defines size of memory region. 40 | // Default: 0x00020000 41 | #define __RAM0_SIZE 0x00400000 42 | // Default region 43 | // Enables memory region globally for the application. 44 | #define __RAM0_DEFAULT 1 45 | // No zero initialize 46 | // Excludes region from zero initialization. 47 | #define __RAM0_NOINIT 0 48 | // 49 | 50 | // 51 | 52 | // Stack / Heap Configuration 53 | // Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 54 | // Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 55 | #define __STACK_SIZE 0x00001000 56 | #define __HEAP_SIZE 0x00010000 57 | // 58 | 59 | 60 | #endif /* REGIONS_ARMCM7_H */ 61 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM7/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M7 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM7 9 | processor: 10 | fpu: dp 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM7/fvp_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.INITVTOR=0 # (int , init-time) default = '0x0' : vector-table offset at reset 5 | armcortexm7ct.semihosting-Thumb_SVC=0xAB # (int , init-time) default = '0xab' : T32 SVC number for semihosting 6 | armcortexm7ct.semihosting-cmd_line= # (string, init-time) default = '' : Command line available to semihosting SVC calls 7 | armcortexm7ct.semihosting-cwd= # (string, init-time) default = '' : Base directory for semihosting file access. 8 | armcortexm7ct.semihosting-enable=1 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 9 | armcortexm7ct.semihosting-heap_base=0 # (int , init-time) default = '0x0' : Virtual address of heap base 10 | armcortexm7ct.semihosting-heap_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of top of heap 11 | armcortexm7ct.semihosting-stack_base=0 # (int , init-time) default = '0x20800000' : Virtual address of base of descending stack 12 | armcortexm7ct.semihosting-stack_limit=0 # (int , init-time) default = '0x20700000' : Virtual address of stack limit 13 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 14 | fvp_mps2.mps2_visualisation.disable-visualisation=1 # (bool , init-time) default = '0' : Enable/disable visualisation 15 | fvp_mps2.telnetterminal0.start_telnet=0 # (bool , init-time) default = '1' : Start telnet if nothing connected 16 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM85/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M85 with TrustZone target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM85 9 | 10 | components: 11 | - component: Device:Startup&C Startup 12 | 13 | linker: 14 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 15 | 16 | groups: 17 | - group: FVP 18 | files: 19 | - file: ./fvp_config.txt 20 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/Target/CM85_noTZ/Target.clayer.yml: -------------------------------------------------------------------------------- 1 | layer: 2 | type: Target 3 | description: Cortex-M85 target components and files 4 | 5 | packs: 6 | - pack: ARM::Cortex_DFP 7 | 8 | for-device: ARMCM85 9 | processor: 10 | trustzone: off 11 | 12 | components: 13 | - component: Device:Startup&C Startup 14 | 15 | linker: 16 | - regions: RTE/Device/$Dname$/regions_$Dname$.h 17 | 18 | groups: 19 | - group: FVP 20 | files: 21 | - file: ./fvp_config.txt 22 | -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Examples/vcpkg-configuration.json: -------------------------------------------------------------------------------- 1 | { 2 | "registries": [ 3 | { 4 | "name": "arm", 5 | "kind": "artifact", 6 | "location": "https://artifacts.tools.arm.com/vcpkg-registry" 7 | } 8 | ], 9 | "requires": { 10 | "arm:tools/kitware/cmake": "3.31.5", 11 | "arm:tools/ninja-build/ninja": "1.12.0", 12 | "arm:tools/open-cmsis-pack/cmsis-toolbox": "2.8.0", 13 | "arm:compilers/arm/armclang": "6.23.0", 14 | "arm:compilers/arm/arm-none-eabi-gcc": "14.2.1", 15 | "arm:compilers/arm/llvm-embedded": "19.1.5", 16 | "arm:debuggers/arm/armdbg": "6.4.0", 17 | "arm:models/arm/avh-fvp": "11.28.32" 18 | } 19 | } -------------------------------------------------------------------------------- /CMSIS/RTOS2/FreeRTOS/Source/handlers.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file irq_handler.c 3 | * @brief CMSIS-FreeRTOS Interrupt Handler 4 | * @version 9.1.0 5 | * @date 11 Aug 2017 6 | * 7 | * @note 8 | * 9 | ******************************************************************************/ 10 | /* 11 | * Copyright (c) 2017 Arm Limited. All rights reserved. 12 | * 13 | * SPDX-License-Identifier: Apache-2.0 14 | * 15 | * Licensed under the Apache License, Version 2.0 (the License); you may 16 | * not use this file except in compliance with the License. 17 | * You may obtain a copy of the License at 18 | * 19 | * www.apache.org/licenses/LICENSE-2.0 20 | * 21 | * Unless required by applicable law or agreed to in writing, software 22 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 23 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 24 | * See the License for the specific language governing permissions and 25 | * limitations under the License. 26 | */ 27 | 28 | #include 29 | 30 | #include "RTE_Components.h" 31 | #include CMSIS_device_header 32 | #include "irq_ctrl.h" 33 | 34 | /* The function called by the RTOS port layer after it has managed interrupt 35 | entry. */ 36 | void vApplicationIRQHandler( uint32_t ulICCIAR ) 37 | { 38 | uint32_t ulInterruptID; 39 | IRQHandler_t h; 40 | 41 | /* Re-enable interrupts. */ 42 | __enable_irq(); 43 | 44 | /* The ID of the interrupt can be obtained by bitwise anding the ICCIAR value 45 | with 0x3FF. */ 46 | ulInterruptID = ulICCIAR & 0x3FFUL; 47 | 48 | /* Call the function installed in the array of installed handler functions. */ 49 | h = IRQ_GetHandler (ulInterruptID); 50 | 51 | /* Call handler function */ 52 | if (h != NULL) { 53 | h(); 54 | } 55 | } 56 | -------------------------------------------------------------------------------- /Documentation/Doxygen/linkchecker.rc: -------------------------------------------------------------------------------- 1 | [output] 2 | ignoreerrors= 3 | mag.svg 4 | mag_sel.svg 5 | mag_d.svg 6 | mag_seld.svg 7 | ../tab_a.png 8 | ../tab_ad.png 9 | minus.svg 10 | plus.svg 11 | minusd.svg 12 | plusd.svg 13 | 14 | [filtering] 15 | ignorewarnings= 16 | http-redirected 17 | -------------------------------------------------------------------------------- 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39 | } 40 | 41 | .tablist .MSearchBoxActive { 42 | pointer-events: none; 43 | opacity:0.0; 44 | } 45 | 46 | .tablist .MSearchBoxInactive:hover { 47 | pointer-events: none; 48 | opacity:0.0; 49 | } -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/extra_tabs.css: -------------------------------------------------------------------------------- 1 | 2 | /* in Doxygen 1.9.2 'tabs' is assigned to second navigation row (navrow1) with 3 | 'Main Page', 'Namespaces', etc */ 4 | 5 | .tabs, .tabs1, .tabs2, .tabs3, .main-nav { 6 | background-color: var(--arm_light_gray); 7 | color: var(--arm_black); 8 | width: 100%; 9 | z-index: 101; 10 | font-family: 'Futura PT W01 Medium', 'Lato Light', Lato, Calibri, sans-serif; 11 | font-size: 14px; 12 | font-weight: 800; 13 | } 14 | 15 | .tabs1 { 16 | background-color: var(--arm_black); 17 | font-size: 16px; 18 | } 19 | 20 | .tabs1 a { 21 | color:while; 22 | } 23 | 24 | .tabs { 25 | background-color: var(--nav_tabs-background-color); 26 | border-top-style:solid; 27 | border-top-width:1px; 28 | border-top-color:var(--nav_tabs-border-color); 29 | } 30 | 31 | .tablist, .main-menu { 32 | margin: 0; 33 | padding: 0; 34 | display: table; 35 | line-height: 28px; 36 | } 37 | 38 | .tablist li { 39 | float: left; 40 | display: table-cell; 41 | background-color: var(--nav_tabs-background-color); 42 | border-right-style:solid; 43 | border-right-width:1px; 44 | border-right-color:var(--nav_tabs-border-color); 45 | list-style: none; 46 | margin:0px; 47 | } 48 | 49 | .tabs1 .tablist li { 50 | background-color: var(--arm_black); 51 | font-weight: 1000; 52 | } 53 | 54 | .tablist a { 55 | display: block; 56 | padding: 0 10px; 57 | color: var(--arm_dark_gray); 58 | font-weight: 600; 59 | outline: none; 60 | } 61 | 62 | .tabs1 .tablist a { 63 | padding: 3px 20px; 64 | color: white; 65 | background-color:var(--arm_black); 66 | } 67 | 68 | .tablist li.current a { 69 | background-color: var(--arm_dark_gray); 70 | color: white; 71 | } 72 | 73 | .tabs1 .tablist li.current a { 74 | background-color: var(--arm_blue); 75 | } 76 | 77 | .tabs .tablist a { 78 | background-color: var(--nav_tabs-background-color); 79 | color: var(--nav_tabs-text-color); 80 | } 81 | .tabs .tablist li.current a { 82 | background-color: var(--nav_tabs-background-active-color); 83 | color: var(--nav_tabs-text-active-color); 84 | } 85 | 86 | .tabs a:hover { 87 | color: var(--arm_orange); 88 | } 89 | 90 | .tabs li.current a:hover { 91 | color: white; 92 | } 93 | 94 | .tabs1 a:hover { 95 | color: var(--arm_yellow); 96 | } 97 | -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/footer.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 15 | 16 | 17 | 18 | 19 | 20 | -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/footer.js.in: -------------------------------------------------------------------------------- 1 | function writeHeader() { 2 | document.write('Version {projectNumber}'); 3 | }; 4 | 5 | function writeFooter() { 6 | document.write('Generated on {datetime} for {projectName} {projectNumberFull}. Copyright © {year} Arm Limited (or its affiliates). All rights reserved.'); 7 | }; 8 | -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/tab_b.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ARM-software/CMSIS-FreeRTOS/1eedee62fe372847db7e6821d333cdb806e38df3/Documentation/Doxygen/style_template/tab_b.png -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/tab_topnav.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ARM-software/CMSIS-FreeRTOS/1eedee62fe372847db7e6821d333cdb806e38df3/Documentation/Doxygen/style_template/tab_topnav.png -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/tabs.js: -------------------------------------------------------------------------------- 1 | var strgURL = location.pathname; // path of current component 2 | 3 | // constructor for the array of objects 4 | function tabElement(id, folderName, tabTxt ) { 5 | this.id = id; // elementID as needed in html; 6 | this.folderName = folderName; // folder name of the component 7 | this.tabTxt = tabTxt; // Text displayed as menu on the web 8 | this.currentListItem = '
  • ' + this.tabTxt + '
    • '; 9 | this.listItem = '
  • ' + this.tabTxt + '
    • '; 10 | }; 11 | 12 | // array of objects 13 | var arr = []; 14 | 15 | // fill array (not needed in case of a single tab) 16 | // arr.push( new tabElement( "id", "folderName", "tabTxt")); 17 | 18 | // write tabs 19 | // called from the header file. 20 | function writeComponentTabs() { 21 | for ( var i=0; i < arr.length; i++ ) { 22 | str = "/" + arr[i].folderName + "/" 23 | if (strgURL.search(str) > 0) { // if this is the current folder 24 | document.write(arr[i].currentListItem); // then print and highlight the tab 25 | } else { 26 | document.write(arr[i].listItem); // else, print the tab 27 | } 28 | } 29 | }; 30 | -------------------------------------------------------------------------------- /Documentation/Doxygen/style_template/version.css: -------------------------------------------------------------------------------- 1 | :root { 2 | --arm_light_blue: #00C1DE; 3 | --arm_blue: #11809F; 4 | --arm_blue1: #0091BD; 5 | --arm_dark_blue: #002B49; 6 | --arm_light_gray: #E5ECEB; 7 | --arm_light_gray1: #EFF5F4; 8 | --arm_light_gray2: #EBEBEB; 9 | --arm_light_gray3: #F7F7F7; 10 | --arm_dark_gray: #7D868C; 11 | --arm_black: #333E48; 12 | --arm_orange: #FF6B00; 13 | --arm_yellow: #FFC700; 14 | } 15 | 16 | /* Dropdown Button */ 17 | .dropbtn { 18 | margin: 0px; 19 | padding: 0px 20px 0px 0em; 20 | background-image: url("dropdown.png"); 21 | background-repeat: no-repeat; 22 | background-size: 0.5em; 23 | background-position: right center; 24 | cursor: pointer; 25 | } 26 | 27 | /* The container
    - needed to position the dropdown content */ 28 | .dropdown { 29 | position: relative; 30 | display: inline-block; 31 | } 32 | 33 | /* Dropdown Content (Hidden by Default) */ 34 | .dropdown-content { 35 | display: none; 36 | position: absolute; 37 | background-color: var(--arm_light_gray3); 38 | min-width: 160px; 39 | box-shadow: 0px 8px 16px 0px rgba(0,0,0,0.4); 40 | white-space: nowrap; 41 | cursor: pointer; 42 | z-index: 1; 43 | } 44 | 45 | /* Links inside the dropdown */ 46 | .dropdown-content a { 47 | # color: black; 48 | color: var(--arm_dark_gray); 49 | padding: 4px 6px; 50 | text-decoration: none; 51 | display: block; 52 | } 53 | 54 | /* Change color of dropdown links on hover */ 55 | .dropdown-content a:hover {background-color: #ddd} 56 | 57 | /* Show the dropdown menu (use JS to add this class to the .dropdown-content container when the user clicks on the dropdown button) */ 58 | .show {display:block;} 59 | -------------------------------------------------------------------------------- /Documentation/index.html: -------------------------------------------------------------------------------- 1 |  2 | 3 | 4 | Redirect to the main page after 0 seconds 5 | 6 | 7 | 8 | 9 | 10 | 11 | If the automatic redirection is failing, click Open Documentation. 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /Documentation/version.js: -------------------------------------------------------------------------------- 1 | function writeVersionDropdown() { 2 | /* Placeholder function not used for local docs */ 3 | } 4 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # CMSIS-FreeRTOS 2 | 3 | This repository contains the CMSIS-RTOS adoption of [FreeRTOS-Kernel Version 11.2.0](https://github.com/FreeRTOS/FreeRTOS-Kernel/releases/download/V11.2.0/FreeRTOS-KernelV11.2.0.zip) as it is released as Software Pack on http://www.keil.com/pack. The [documentation](https://arm-software.github.io/CMSIS-FreeRTOS/) is available under https://arm-software.github.io/CMSIS-FreeRTOS/. 4 | 5 | Use *Issues* to provide feedback and report problems for CMSIS FreeRTOS implementation. 6 | 7 | Use *main* branch for pull-requests. 8 | 9 | ## Directory Structure 10 | 11 | | Directory | Content | 12 | | ----------------------------- | ------------------------------------| 13 | | CMSIS | CMSIS-FreeRTOS related files | 14 | | CMSIS/RTOS2/FreeRTOS/Config | CMSIS-FreeRTOS configuration file | 15 | | CMSIS/RTOS2/FreeRTOS/Examples | CMSIS-FreeRTOS example projects | 16 | | CMSIS/RTOS2/FreeRTOS/Source | CMSIS-FreeRTOS source code | 17 | | Documentation | Source of the documentation | 18 | | Source | FreeRTOS Kernel source code | 19 | 20 | ## Generate CMSIS Pack for Release 21 | 22 | This GitHub development repository contains all the sources you need to successfully build the pack. 23 | 24 | To build the complete pack for installation use the **gen_pack.sh** bash script. This script file also 25 | generates the documentation. 26 | 27 | Documentation may be generated separately using the bash script **gen_doc.sh** (located in ./Documentation/Doxygen). 28 | 29 | ## License 30 | 31 | The FreeRTOS kernel source files are released under the MIT open source license (read [LICENSE.md](./Source/LICENSE.md)). 32 | The rest of the repository content is covered by Apache 2.0 license (read [LICENSE](./LICENSE)). 33 | -------------------------------------------------------------------------------- /Source/GitHub-FreeRTOS-Kernel-Home.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,2 3 | [InternetShortcut] 4 | URL=https://github.com/FreeRTOS/FreeRTOS-Kernel 5 | IconIndex=0 6 | IDList= 7 | HotKey=0 8 | -------------------------------------------------------------------------------- /Source/LICENSE.md: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Permission is hereby granted, free of charge, to any person obtaining a copy 4 | of this software and associated documentation files (the "Software"), to deal 5 | in the Software without restriction, including without limitation the rights 6 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | copies of the Software, and to permit persons to whom the Software is 8 | furnished to do so, subject to the following conditions: 9 | 10 | The above copyright notice and this permission notice shall be included in all 11 | copies or substantial portions of the Software. 12 | 13 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | SOFTWARE. 20 | -------------------------------------------------------------------------------- /Source/Quick_Start_Guide.url: -------------------------------------------------------------------------------- 1 | [InternetShortcut] 2 | URL=https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html 3 | IDList= 4 | [{000214A0-0000-0000-C000-000000000046}] 5 | Prop3=19,2 6 | -------------------------------------------------------------------------------- /Source/cspell.config.yaml: -------------------------------------------------------------------------------- 1 | --- 2 | $schema: https://raw.githubusercontent.com/streetsidesoftware/cspell/main/cspell.schema.json 3 | version: '0.2' 4 | # Allows things like stringLength 5 | allowCompoundWords: true 6 | 7 | # Read files not to spell check from the git ignore 8 | useGitignore: true 9 | 10 | # Language settings for C 11 | languageSettings: 12 | - caseSensitive: false 13 | enabled: true 14 | languageId: c 15 | locale: "*" 16 | 17 | # Add a dictionary, and the path to the word list 18 | dictionaryDefinitions: 19 | - name: freertos-words 20 | path: '.github/.cSpellWords.txt' 21 | addWords: true 22 | 23 | dictionaries: 24 | - freertos-words 25 | 26 | # Paths and files to ignore 27 | ignorePaths: 28 | - 'dependency' 29 | - 'docs' 30 | - 'ThirdParty' 31 | - 'History.txt' 32 | -------------------------------------------------------------------------------- /Source/examples/README.md: -------------------------------------------------------------------------------- 1 | # README for FreeRTOS-Kernel/examples 2 | 3 | The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. 4 | See [FreeRTOS/FreeRTOS/Demo](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS/Demo) to find a list of pre-configured demos on multiple platforms which demonstrate the working of the FreeRTOS-Kernel. 5 | This directory aims to further facilitate the beginners in building their first FreeRTOS project. 6 | 7 | 8 | ## Directory Structure: 9 | 10 | * The [cmake_example](./cmake_example) directory contains a minimal FreeRTOS example project, which uses the configuration file in the template_configuration directory listed below. This will provide you with a starting point for building your applications using FreeRTOS-Kernel. 11 | * The [coverity](./coverity) directory contains a project to run [Synopsys Coverity](https://www.synopsys.com/software-integrity/static-analysis-tools-sast/coverity.html) for checking MISRA compliance. This directory contains further readme files and links to documentation. 12 | * The [template_configuration](./template_configuration) directory contains a sample configuration file FreeRTOSConfig.h which helps you in preparing your application configuration 13 | 14 | 15 | ## Additional examples 16 | 17 | Additional examples of the kernel being used in real life applications in tandem with many other libraries (i.e. FreeRTOS+TCP, coreMQTT, coreHTTP etc.) can be found [here](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS-Plus/Demo). 18 | -------------------------------------------------------------------------------- /Source/examples/coverity/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.15) 2 | 3 | project(coverity) 4 | 5 | set(FREERTOS_KERNEL_PATH "../..") 6 | FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}/*.c) 7 | FILE(GLOB FREERTOS_PORT_CODE ${FREERTOS_KERNEL_PATH}/portable/template/*.c) 8 | 9 | # Coverity incorrectly infers the type of pdTRUE and pdFALSE as boolean because 10 | # of their names. This generates multiple false positive warnings about type 11 | # mismatch. Replace pdTRUE with pdPASS and pdFALSE with pdFAIL to avoid these 12 | # false positive warnings. This workaround will not be needed after Coverity 13 | # fixes the issue of incorrectly inferring the type of pdTRUE and pdFALSE as 14 | # boolean. 15 | add_custom_target(fix_source ALL 16 | COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE} 17 | DEPENDS ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE}) 18 | 19 | # Add the freertos_config for FreeRTOS-Kernel. 20 | add_library(freertos_config INTERFACE) 21 | 22 | target_include_directories(freertos_config 23 | INTERFACE 24 | ./) 25 | 26 | if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1") 27 | message(STATUS "Build FreeRTOS SMP example") 28 | # Adding the following configurations to build SMP template port 29 | add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 ) 30 | endif() 31 | 32 | # Select the heap. Values between 1-5 will pick a heap. 33 | set(FREERTOS_HEAP "3" CACHE STRING "" FORCE) 34 | 35 | # Select the FreeRTOS port. 36 | set(FREERTOS_PORT "TEMPLATE" CACHE STRING "" FORCE) 37 | 38 | # Add the FreeRTOS-Kernel subdirectory. 39 | add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel) 40 | 41 | add_executable(${PROJECT_NAME} 42 | ../cmake_example/main.c) 43 | 44 | add_dependencies(${PROJECT_NAME} fix_source) 45 | 46 | target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config) 47 | -------------------------------------------------------------------------------- /Source/examples/template_configuration/readme.md: -------------------------------------------------------------------------------- 1 | # Configuration support for FreeRTOS 2 | 3 | ## Overview 4 | 5 | Every FreeRTOS project requires FreeRTOSConfig.h located in their include path. In this folder you will find a sample FreeRTOSConfig.h that will assist you in preparing the configuration for your application. 6 | 7 | The FreeRTOSConfig.h in this folder is used in the minimal_freertos_example project provided and it not guaranteed to have the same configuration between updates. -------------------------------------------------------------------------------- /Source/include/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # FreeRTOS internal cmake file. Do not use it in user top-level project 2 | 3 | add_library(freertos_kernel_include INTERFACE) 4 | 5 | target_include_directories(freertos_kernel_include 6 | INTERFACE 7 | . 8 | # Note: DEPRECATED but still supported, may be removed in a future release. 9 | $<$>:${FREERTOS_CONFIG_FILE_DIRECTORY}> 10 | ) 11 | 12 | target_link_libraries(freertos_kernel_include 13 | INTERFACE 14 | $<$:freertos_config> 15 | ) 16 | -------------------------------------------------------------------------------- /Source/include/StackMacros.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | 30 | #ifndef _MSC_VER /* Visual Studio doesn't support #warning. */ 31 | #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in a future release. 32 | #endif 33 | 34 | #include "stack_macros.h" 35 | -------------------------------------------------------------------------------- /Source/manifest.yml: -------------------------------------------------------------------------------- 1 | name : "FreeRTOS-Kernel" 2 | version: "V11.2.0" 3 | description: "FreeRTOS Kernel." 4 | license: "MIT" 5 | -------------------------------------------------------------------------------- /Source/portable/ARMClang/Use-the-GCC-ports.txt: -------------------------------------------------------------------------------- 1 | The FreeRTOS GCC port layer also builds and works with the ARMClang compiler. 2 | To use the ARMClang compiler build the port files from FreeRTOS/Source/portable/GCC. 3 | -------------------------------------------------------------------------------- /Source/portable/ARMv8M/ReadMe.txt: -------------------------------------------------------------------------------- 1 | This directory tree contains the master copy of the FreeRTOS Armv8-M and 2 | Armv8.1-M ports. 3 | Do not use the files located here! These file are copied into separate 4 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to each 5 | FreeRTOS release. 6 | 7 | If your Armv8-M and Armv8.1-M application uses TrustZone then use the files from the 8 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories. 9 | 10 | If your Armv8-M and Armv8.1-M application does not use TrustZone then use the files from 11 | the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories. 12 | -------------------------------------------------------------------------------- /Source/portable/ARMv8M/non_secure/ReadMe.txt: -------------------------------------------------------------------------------- 1 | This directory tree contains the master copy of the FreeRTOS Armv8-M and 2 | Armv8.1-M ports. 3 | Do not use the files located here! These file are copied into separate 4 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to 5 | each FreeRTOS release. 6 | 7 | If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the 8 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories. 9 | 10 | If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from 11 | the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories. 12 | -------------------------------------------------------------------------------- /Source/portable/ARMv8M/secure/ReadMe.txt: -------------------------------------------------------------------------------- 1 | This directory tree contains the master copy of the FreeRTOS Armv8-M and 2 | Armv8.1-M ports. 3 | Do not use the files located here! These file are copied into separate 4 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to 5 | each FreeRTOS release. 6 | 7 | If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the 8 | FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories. 9 | 10 | If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from 11 | the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories. 12 | -------------------------------------------------------------------------------- /Source/portable/ARMv8M/secure/heap/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/ARMv8M/secure/init/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/CCS/MSP430X/data_model.h: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | 29 | .if $DEFINED( __LARGE_DATA_MODEL__ ) 30 | .define "pushm.a", pushm_x 31 | .define "popm.a", popm_x 32 | .define "push.a", push_x 33 | .define "pop.a", pop_x 34 | .define "mov.a", mov_x 35 | .else 36 | .define "pushm.w", pushm_x 37 | .define "popm.w", popm_x 38 | .define "push.w", push_x 39 | .define "pop.w", pop_x 40 | .define "mov.w", mov_x 41 | .endif 42 | 43 | .if $DEFINED( __LARGE_CODE_MODEL__ ) 44 | .define "calla", call_x 45 | .define "reta", ret_x 46 | .else 47 | .define "call", call_x 48 | .define "ret", ret_x 49 | .endif 50 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CA53_64_BIT/README.md: -------------------------------------------------------------------------------- 1 | # ARM_CA53_64_BIT port 2 | 3 | Initial port to support Armv8-A architecture in FreeRTOS kernel was written for 4 | Arm Cortex-A53 processor. 5 | 6 | * ARM_CA53_64_BIT 7 | * Memory mapped interface to access Arm GIC registers 8 | 9 | This port is generic and can be used as a starting point for other Armv8-A 10 | application processors. Therefore, the port `ARM_CA53_64_BIT` is renamed as 11 | `ARM_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`, 12 | should migrate to renamed port `ARM_AARCH64`. 13 | 14 | **NOTE** 15 | 16 | This port uses memory mapped interface to access Arm GIC registers. 17 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CA53_64_BIT_SRE/README.md: -------------------------------------------------------------------------------- 1 | # ARM_CA53_64_BIT_SRE port 2 | 3 | Initial port to support Armv8-A architecture in FreeRTOS kernel was written for 4 | Arm Cortex-A53 processor. 5 | 6 | * ARM_CA53_64_BIT_SRE 7 | * System Register interface to access Arm GIC registers 8 | 9 | This port is generic and can be used as a starting point for other Armv8-A 10 | application processors. Therefore, the port `ARM_AARCH64_SRE` is renamed as 11 | `ARM_AARCH64_SRE`. The existing projects that use old port `ARM_AARCH64_SRE`, 12 | should migrate to renamed port `ARM_AARCH64_SRE`. 13 | 14 | **NOTE** 15 | 16 | This port uses System Register interface to access Arm GIC registers. 17 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM23/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM23/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM33/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM33/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM35P/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM35P/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM55/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM55/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/GCC/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 18 | directory. 19 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM85/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/GCC/ARM_CM85/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/GCC/AVR_AVRDx/README.md: -------------------------------------------------------------------------------- 1 | This port has been moved to `portable/ThirdParty/Partner-Supported-Ports/GCC/AVR_AVRDx` directory. 2 | -------------------------------------------------------------------------------- /Source/portable/GCC/AVR_Mega0/README.md: -------------------------------------------------------------------------------- 1 | This port has been moved to `portable/ThirdParty/Partner-Supported-Ports/GCC/AVR_Mega0` directory. 2 | -------------------------------------------------------------------------------- /Source/portable/GCC/Arm_AARCH64/README.md: -------------------------------------------------------------------------------- 1 | # Armv8-A architecture support 2 | 3 | The Armv8-A architecture introduces the ability to use 64-bit and 32-bit 4 | Execution states, known as AArch64 and AArch32 respectively. The AArch64 5 | Execution state supports the A64 instruction set. It holds addresses in 64-bit 6 | registers and allows instructions in the base instruction set to use 64-bit 7 | registers for their processing. 8 | 9 | The AArch32 Execution state is a 32-bit Execution state that preserves 10 | backwards compatibility with the Armv7-A architecture, enhancing that profile 11 | so that it can support some features included in the AArch64 state. It supports 12 | the T32 and A32 instruction sets. Follow the 13 | [link](https://developer.arm.com/Architectures/A-Profile%20Architecture) 14 | for more information. 15 | 16 | ## ARM_AARCH64 port 17 | 18 | This port adds support for Armv8-A architecture AArch64 execution state. 19 | This port is generic and can be used as a starting point for Armv8-A 20 | application processors. 21 | 22 | * ARM_AARCH64 23 | * Memory mapped interface to access Arm GIC registers 24 | -------------------------------------------------------------------------------- /Source/portable/GCC/Arm_AARCH64_SRE/README.md: -------------------------------------------------------------------------------- 1 | # Armv8-A architecture support 2 | 3 | The Armv8-A architecture introduces the ability to use 64-bit and 32-bit 4 | Execution states, known as AArch64 and AArch32 respectively. The AArch64 5 | Execution state supports the A64 instruction set. It holds addresses in 64-bit 6 | registers and allows instructions in the base instruction set to use 64-bit 7 | registers for their processing. 8 | 9 | The AArch32 Execution state is a 32-bit Execution state that preserves 10 | backwards compatibility with the Armv7-A architecture, enhancing that profile 11 | so that it can support some features included in the AArch64 state. It supports 12 | the T32 and A32 instruction sets. Follow the 13 | [link](https://developer.arm.com/Architectures/A-Profile%20Architecture) 14 | for more information. 15 | 16 | ## ARM_AARCH64_SRE port 17 | 18 | This port adds support for Armv8-A architecture AArch64 execution state. 19 | This port is generic and can be used as a starting point for Armv8-A 20 | application processors. 21 | 22 | * ARM_AARCH64_SRE 23 | * System Register interface to access Arm GIC registers 24 | -------------------------------------------------------------------------------- /Source/portable/GCC/MCF5235/readme.md: -------------------------------------------------------------------------------- 1 | The MCF5235 port is deprecated. The last FreeRTOS version that includes this port is 10.4.3. 2 | 3 | -------------------------------------------------------------------------------- /Source/portable/GCC/RISC-V/Documentation.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,11 3 | [InternetShortcut] 4 | IDList= 5 | URL=https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html 6 | -------------------------------------------------------------------------------- /Source/portable/GCC/RISC-V/chip_extensions.cmake: -------------------------------------------------------------------------------- 1 | if( FREERTOS_PORT STREQUAL "GCC_RISC_V_GENERIC" ) 2 | set( VALID_CHIP_EXTENSIONS 3 | "Pulpino_Vega_RV32M1RM" 4 | "RISCV_MTIME_CLINT_no_extensions" 5 | "RISCV_no_extensions" 6 | "RV32I_CLINT_no_extensions" ) 7 | 8 | if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) 9 | message(FATAL_ERROR 10 | "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" 11 | "Please specify it from top-level CMake file (example):\n" 12 | " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" 13 | " or from CMake command line option:\n" 14 | " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" 15 | "\n" 16 | " Available extension options:\n" 17 | " ${VALID_CHIP_EXTENSIONS} \n") 18 | endif() 19 | endif() 20 | -------------------------------------------------------------------------------- /Source/portable/GCC/RISC-V/chip_specific_extensions/readme.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * The FreeRTOS kernel's RISC-V port is split between the the code that is 3 | * common across all currently supported RISC-V chips (implementations of the 4 | * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 5 | * 6 | * + FreeRTOS\Source\portable\GCC\RISC-V\portASM.S contains the code that 7 | * is common to all currently supported RISC-V chips. There is only one 8 | * portASM.S file because the same file is built for all RISC-V target chips. 9 | * 10 | * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 11 | * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 12 | * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 13 | * as there are multiple RISC-V chip implementations. 14 | * 15 | * !!!NOTE!!! 16 | * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 17 | * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 18 | * compiler's!) include path. For example, if the chip in use includes a core 19 | * local interrupter (CLINT) and does not include any chip specific register 20 | * extensions then add the path below to the assembler's include path: 21 | * FreeRTOS\Source\portable\GCC\RISC-V\chip_specific_extensions\RV32I_CLINT_no_extensions 22 | * 23 | */ 24 | -------------------------------------------------------------------------------- /Source/portable/GCC/RISC-V/readme.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * The FreeRTOS kernel's RISC-V port is split between the the code that is 3 | * common across all currently supported RISC-V chips (implementations of the 4 | * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 5 | * 6 | * + FreeRTOS\Source\portable\GCC\RISC-V\portASM.S contains the code that 7 | * is common to all currently supported RISC-V chips. There is only one 8 | * portASM.S file because the same file is built for all RISC-V target chips. 9 | * 10 | * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 11 | * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 12 | * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 13 | * as there are multiple RISC-V chip implementations. 14 | * 15 | * !!!NOTE!!! 16 | * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 17 | * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 18 | * compiler's!) include path. For example, if the chip in use includes a core 19 | * local interrupter (CLINT) and does not include any chip specific register 20 | * extensions then add the path below to the assembler's include path: 21 | * FreeRTOS\Source\portable\GCC\RISC-V\chip_specific_extensions\RV32I_CLINT_no_extensions 22 | * 23 | */ 24 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM23/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM23/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM33/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM33/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM35P/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM35P/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM55/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM55/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/IAR/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1 18 | directory. 19 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM85/secure/secure_heap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_HEAP_H__ 30 | #define __SECURE_HEAP_H__ 31 | 32 | /* Standard includes. */ 33 | #include 34 | 35 | /** 36 | * @brief Allocates memory from heap. 37 | * 38 | * @param[in] xWantedSize The size of the memory to be allocated. 39 | * 40 | * @return Pointer to the memory region if the allocation is successful, NULL 41 | * otherwise. 42 | */ 43 | void * pvPortMalloc( size_t xWantedSize ); 44 | 45 | /** 46 | * @brief Frees the previously allocated memory. 47 | * 48 | * @param[in] pv Pointer to the memory to be freed. 49 | */ 50 | void vPortFree( void * pv ); 51 | 52 | /** 53 | * @brief Get the free heap size. 54 | * 55 | * @return Free heap size. 56 | */ 57 | size_t xPortGetFreeHeapSize( void ); 58 | 59 | /** 60 | * @brief Get the minimum ever free heap size. 61 | * 62 | * @return Minimum ever free heap size. 63 | */ 64 | size_t xPortGetMinimumEverFreeHeapSize( void ); 65 | 66 | #endif /* __SECURE_HEAP_H__ */ 67 | -------------------------------------------------------------------------------- /Source/portable/IAR/ARM_CM85/secure/secure_init.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef __SECURE_INIT_H__ 30 | #define __SECURE_INIT_H__ 31 | 32 | /** 33 | * @brief De-prioritizes the non-secure exceptions. 34 | * 35 | * This is needed to ensure that the non-secure PendSV runs at the lowest 36 | * priority. Context switch is done in the non-secure PendSV handler. 37 | * 38 | * @note This function must be called in the handler mode. It is no-op if called 39 | * in the thread mode. 40 | */ 41 | void SecureInit_DePrioritizeNSExceptions( void ); 42 | 43 | /** 44 | * @brief Sets up the Floating Point Unit (FPU) for Non-Secure access. 45 | * 46 | * Also sets FPCCR.TS=1 to ensure that the content of the Floating Point 47 | * Registers are not leaked to the non-secure side. 48 | * 49 | * @note This function must be called in the handler mode. It is no-op if called 50 | * in the thread mode. 51 | */ 52 | void SecureInit_EnableNSFPUAccess( void ); 53 | 54 | #endif /* __SECURE_INIT_H__ */ 55 | -------------------------------------------------------------------------------- /Source/portable/IAR/RISC-V/Documentation.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,11 3 | [InternetShortcut] 4 | IDList= 5 | URL=https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html 6 | -------------------------------------------------------------------------------- /Source/portable/IAR/RISC-V/chip_extensions.cmake: -------------------------------------------------------------------------------- 1 | if( FREERTOS_PORT STREQUAL "IAR_RISC_V_GENERIC" ) 2 | set( VALID_CHIP_EXTENSIONS 3 | "RV32I_CLINT_no_extensions" ) 4 | 5 | if( ( NOT FREERTOS_RISCV_EXTENSION ) OR ( NOT ( ${FREERTOS_RISCV_EXTENSION} IN_LIST VALID_CHIP_EXTENSIONS ) ) ) 6 | message(FATAL_ERROR 7 | "FREERTOS_RISCV_EXTENSION \"${FREERTOS_RISCV_EXTENSION}\" is not set or unsupported.\n" 8 | "Please specify it from top-level CMake file (example):\n" 9 | " set(FREERTOS_RISCV_EXTENSION RISCV_MTIME_CLINT_no_extensions CACHE STRING \"\")\n" 10 | " or from CMake command line option:\n" 11 | " -DFREERTOS_RISCV_EXTENSION=RISCV_MTIME_CLINT_no_extensions\n" 12 | "\n" 13 | " Available extension options:\n" 14 | " ${VALID_CHIP_EXTENSIONS} \n") 15 | endif() 16 | endif() 17 | -------------------------------------------------------------------------------- /Source/portable/IAR/RISC-V/chip_specific_extensions/readme.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * The FreeRTOS kernel's RISC-V port is split between the the code that is 3 | * common across all currently supported RISC-V chips (implementations of the 4 | * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 5 | * 6 | * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that 7 | * is common to all currently supported RISC-V chips. There is only one 8 | * portASM.S file because the same file is built for all RISC-V target chips. 9 | * 10 | * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 11 | * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 12 | * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 13 | * as there are multiple RISC-V chip implementations. 14 | * 15 | * !!!NOTE!!! 16 | * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 17 | * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 18 | * compiler's!) include path. For example, if the chip in use includes a core 19 | * local interrupter (CLINT) and does not include any chip specific register 20 | * extensions then add the path below to the assembler's include path: 21 | * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions 22 | * 23 | */ 24 | -------------------------------------------------------------------------------- /Source/portable/IAR/RISC-V/readme.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * The FreeRTOS kernel's RISC-V port is split between the the code that is 3 | * common across all currently supported RISC-V chips (implementations of the 4 | * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 5 | * 6 | * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that 7 | * is common to all currently supported RISC-V chips. There is only one 8 | * portASM.S file because the same file is built for all RISC-V target chips. 9 | * 10 | * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 11 | * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 12 | * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 13 | * as there are multiple RISC-V chip implementations. 14 | * 15 | * !!!NOTE!!! 16 | * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 17 | * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 18 | * compiler's!) include path. For example, if the chip in use includes a core 19 | * local interrupter (CLINT) and does not include any chip specific register 20 | * extensions then add the path below to the assembler's include path: 21 | * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions 22 | * 23 | */ 24 | -------------------------------------------------------------------------------- /Source/portable/Keil/See-also-the-RVDS-directory.txt: -------------------------------------------------------------------------------- 1 | Nothing to see here. 2 | -------------------------------------------------------------------------------- /Source/portable/MPLAB/PIC18F/stdio.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ARM-software/CMSIS-FreeRTOS/1eedee62fe372847db7e6821d333cdb806e38df3/Source/portable/MPLAB/PIC18F/stdio.h -------------------------------------------------------------------------------- /Source/portable/MemMang/ReadMe.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,2 3 | [InternetShortcut] 4 | URL=https://www.FreeRTOS.org/a00111.html 5 | IDList= 6 | -------------------------------------------------------------------------------- /Source/portable/RVDS/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/RVDS/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1 18 | directory. 19 | -------------------------------------------------------------------------------- /Source/portable/Renesas/RX100/port_asm.src: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | .GLB _vSoftwareInterruptISR 29 | .GLB _vSoftwareInterruptEntry 30 | 31 | .SECTION P,CODE 32 | 33 | _vSoftwareInterruptEntry: 34 | 35 | BRA _vSoftwareInterruptISR 36 | 37 | .RVECTOR 27, _vSoftwareInterruptEntry 38 | 39 | .END 40 | -------------------------------------------------------------------------------- /Source/portable/Renesas/RX200/port_asm.src: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | .GLB _vSoftwareInterruptISR 29 | .GLB _vSoftwareInterruptEntry 30 | 31 | .SECTION P,CODE 32 | 33 | _vSoftwareInterruptEntry: 34 | 35 | BRA _vSoftwareInterruptISR 36 | 37 | .RVECTOR 27, _vSoftwareInterruptEntry 38 | 39 | .END 40 | -------------------------------------------------------------------------------- /Source/portable/Renesas/RX600/port_asm.src: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | .GLB _vSoftwareInterruptISR 29 | .GLB _vSoftwareInterruptEntry 30 | 31 | .SECTION P,CODE 32 | 33 | _vSoftwareInterruptEntry: 34 | 35 | BRA _vSoftwareInterruptISR 36 | 37 | .RVECTOR 27, _vSoftwareInterruptEntry 38 | 39 | .END 40 | -------------------------------------------------------------------------------- /Source/portable/Renesas/RX600v2/port_asm.src: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | .GLB _vSoftwareInterruptISR 29 | .GLB _vSoftwareInterruptEntry 30 | 31 | .SECTION P,CODE 32 | 33 | _vSoftwareInterruptEntry: 34 | 35 | BRA _vSoftwareInterruptISR 36 | 37 | .RVECTOR 27, _vSoftwareInterruptEntry 38 | 39 | .END 40 | -------------------------------------------------------------------------------- /Source/portable/Renesas/RX700v3_DPFPU/port_asm.src: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; * FreeRTOS Kernel V11.2.0 3 | ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | ; * 5 | ; * SPDX-License-Identifier: MIT 6 | ; * 7 | ; * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | ; * this software and associated documentation files (the "Software"), to deal in 9 | ; * the Software without restriction, including without limitation the rights to 10 | ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | ; * the Software, and to permit persons to whom the Software is furnished to do so, 12 | ; * subject to the following conditions: 13 | ; * 14 | ; * The above copyright notice and this permission notice shall be included in all 15 | ; * copies or substantial portions of the Software. 16 | ; * 17 | ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | ; * 24 | ; * https://www.FreeRTOS.org 25 | ; * https://github.com/FreeRTOS 26 | ; * 27 | ; */ 28 | .GLB _vSoftwareInterruptISR 29 | .GLB _vSoftwareInterruptEntry 30 | 31 | .SECTION P,CODE 32 | 33 | _vSoftwareInterruptEntry: 34 | 35 | BRA _vSoftwareInterruptISR 36 | 37 | .RVECTOR 27, _vSoftwareInterruptEntry 38 | 39 | .END 40 | -------------------------------------------------------------------------------- /Source/portable/Rowley/ARM7/readme.txt: -------------------------------------------------------------------------------- 1 | The Rowley ARM7 demo uses the GCC ARM7 port files. 2 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/CCRH/RH850_F1KM_S4/README.md: -------------------------------------------------------------------------------- 1 | OVERVIEW 2 | 3 | This directory contains FreeRTOS port for Renesas RH850 F1KM-S4 4 | 5 | The standard demo project to test this port is added at following location: 6 | FreeRTOS-Community-Supported-Demos\RH850_F1KM_S4_CCRH 7 | 8 | This port is distributed under MIT open source license. 9 | 10 | TOOL CHAIN SUPPORT: 11 | IDE and Coding Tool: e² studio version 07-2023 12 | C Compiler Package for RH850 Family [CC-RH] version 2.06.00 for e2 studio. 13 | FreeRTOS Kernel V11.0.1 -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/CCS/C2000_C28x/README.md: -------------------------------------------------------------------------------- 1 | 2 | OVERVIEW 3 | 4 | This directory contains FreeRTOS port for Texas Instruments C28x based microcontrollers. 5 | 6 | The standard demo project to test this port is added at following location: 7 | FreeRTOS-Community-Supported-Demos\C2000_F2838x_C28x_CCS\freertos_ex1_c28x_port_val 8 | 9 | This port is distributed under MIT open source license. 10 | 11 | TOOL CHAIN SUPPORT: 12 | Code Composer Studio™ IDE (CCS) v11.1.0 or newer 13 | C2000 Compiler v20.2.1.LTS or newer 14 | C2000Ware_3_01_00_00 or newer 15 | FreeRTOSv202112.00 16 | 17 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/ReadMe.txt: -------------------------------------------------------------------------------- 1 | The bsp_patches contains the xlinx bsp modifications needed to port FreeRTOS-SMP to the ZynqMPOSC(A53*4) platform, see details bsp_patches/ReadMe.txt -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/bsp_patches/ReadMe.txt: -------------------------------------------------------------------------------- 1 | boot.S: 2 | Added CPU ID determination and stack initialization code after multicore startup. 3 | xil-crt0.S: 4 | Initialize the C runtime environment only on the primary core 5 | Start the secondary cores 6 | cpu.c / cpu.h: 7 | APIs of secondary cores power up and reset 8 | 9 | xscugic.c: 10 | Added CPU interface initialization of the GIC for secondary cores 11 | 12 | scugic_v4_2_diff.png: 13 | standalone_v7_2_diff.png: 14 | Xlinx bsp libaray modification details -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/bsp_patches/scugic_v4_2_diff.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ARM-software/CMSIS-FreeRTOS/1eedee62fe372847db7e6821d333cdb806e38df3/Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/bsp_patches/scugic_v4_2_diff.png -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/bsp_patches/standalone_v7_2_diff.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ARM-software/CMSIS-FreeRTOS/1eedee62fe372847db7e6821d333cdb806e38df3/Source/portable/ThirdParty/Community-Supported-Ports/GCC/CORTEX_A53_64-bit_UltraScale_MPSoC/bsp_patches/standalone_v7_2_diff.png -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/RP2350_ARM_NTZ/LICENSE.md: -------------------------------------------------------------------------------- 1 | BSD-3-Clause License 2 | 3 | Copyright (c) 2020-2021 Raspberry Pi (Trading) Ltd. 4 | 5 | Redistribution and use in source and binary forms, with or without modification, are permitted provided that the 6 | following conditions are met: 7 | 8 | 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following 9 | disclaimer. 10 | 11 | 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 12 | disclaimer in the documentation and/or other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products 15 | derived from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 18 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 | WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 | THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/RP2350_RISC-V/Documentation.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,11 3 | [InternetShortcut] 4 | IDList= 5 | URL=https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html 6 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/RP2350_RISC-V/LICENSE.md: -------------------------------------------------------------------------------- 1 | BSD-3-Clause License 2 | 3 | Copyright (c) 2020-2021 Raspberry Pi (Trading) Ltd. 4 | 5 | Redistribution and use in source and binary forms, with or without modification, are permitted provided that the 6 | following conditions are met: 7 | 8 | 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following 9 | disclaimer. 10 | 11 | 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 12 | disclaimer in the documentation and/or other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products 15 | derived from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 18 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 | WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 | THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/RP2350_RISC-V/notes.txt: -------------------------------------------------------------------------------- 1 | - IRQ premption is currently disabled; this might be easy enough to fix by stacking the core local ISRStackTop, and using 0 2 | for recursing, since that just uses the current one - of course the whole code may not be happy with nested IRQs 3 | - Right now mtvec table and irq handlers are installed on both cores, since the SDK doesn't currently treat them separately. 4 | - Q: Why is critical_nestings stored in TCB on RISC-V? -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/RP2350_RISC-V/readme.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * The FreeRTOS kernel's RISC-V port is split between the the code that is 3 | * common across all currently supported RISC-V chips (implementations of the 4 | * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 5 | * 6 | * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that 7 | * is common to all currently supported RISC-V chips. There is only one 8 | * portASM.S file because the same file is built for all RISC-V target chips. 9 | * 10 | * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 11 | * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 12 | * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 13 | * as there are multiple RISC-V chip implementations. 14 | * 15 | * !!!NOTE!!! 16 | * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 17 | * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 18 | * compiler's!) include path. For example, if the chip in use includes a core 19 | * local interrupter (CLINT) and does not include any chip specific register 20 | * extensions then add the path below to the assembler's include path: 21 | * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions 22 | * 23 | */ 24 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/TriCore_38xa/port.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V10.4.1 3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 6 | * this software and associated documentation files (the "Software"), to deal in 7 | * the Software without restriction, including without limitation the rights to 8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 9 | * the Software, and to permit persons to whom the Software is furnished to do so, 10 | * subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in all 13 | * copies or substantial portions of the Software. 14 | * 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21 | * 22 | * https://www.FreeRTOS.org 23 | * https://github.com/FreeRTOS 24 | * 25 | * 1 tab == 4 spaces! 26 | */ 27 | 28 | #ifndef _PORTABLE_GCC_TRICORE_PORT_H_ 29 | #define _PORTABLE_GCC_TRICORE_PORT_H_ 30 | 31 | //These definitions seem to be missing within the TC3xx include files 32 | //Compile the project with the "-fdollars-in-identifiers" option!! 33 | 34 | #define $FCX 0xFE38 35 | #define $ICR 0xFE2C 36 | #define $PCXI 0xFE00 37 | #define $PSW 0xFE04 38 | #define $SYSCON 0xFE14 39 | 40 | extern void vTrapSysCallYield( int iTrapIdentification ); 41 | 42 | #endif /* _PORTABLE_GCC_TRICORE_PORT_H_ */ 43 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/GCC/TriCore_38xa/readme.txt: -------------------------------------------------------------------------------- 1 | Compile the project with the "-fdollars-in-identifiers" option!! 2 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/LICENSE: -------------------------------------------------------------------------------- 1 | This repository contains multiple directories, each individually licensed. Please see the LICENSE file in each directory. 2 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/README.md: -------------------------------------------------------------------------------- 1 | ## FreeRTOS Community Supported Ports 2 | 3 | This repository contains FreeRTOS ports supported by FreeRTOS community members. 4 | For a community supported FreeRTOS port: 5 | 6 | * The code has not been reviewed by the FreeRTOS team. 7 | * Tests may or may not exist for the FreeRTOS port. 8 | * Customer queries as well as bugs are addressed by the community. 9 | 10 | A new FreeRTOS port can be directly contributed by anyone. Follow the steps 11 | below to contribute a FreeRTOS port to this repository: 12 | 13 | 1. Write FreeRTOS port for your Compiler and Architecture. 14 | 2. *[Optional]* Create a project in the [FreeRTOS Community Supported Demos Repository](https://github.com/FreeRTOS/FreeRTOS-Community-Supported-Demos/tree/main) 15 | for your hardware for running tests as mentioned [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Demo/ThirdParty/Template/README.md). 16 | 3. *[Optional]* Make sure all the tests pass. Add the test results in the Pull Request description. 17 | 4. Add a README file with the following information: 18 | 1. How to use this port? 19 | 2. *[Optional]* Link to the test project created in Step 2. 20 | 3. Any other relevant information. 21 | 5. Raise a pull request to merge the port. 22 | 6. *[Optional]* Raise another PR to merge the test project in the [FreeRTOS Partner Supported Demos Repository](https://github.com/FreeRTOS/FreeRTOS-Partner-Supported-Demos/tree/main). 23 | 24 | ## License 25 | 26 | This repository contains multiple directories, each individually licensed. Please see the LICENSE file in each directory. 27 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Community-Supported-Ports/Z88DK/Z180/readme.md: -------------------------------------------------------------------------------- 1 |

    Z180 support

    2 | 3 | Description 4 | ----------- 5 | This PR establishes support for a Zilog Z180 port, using the Programmable Reload Timer 1, configured at 256 Hz. 6 | 7 | Because of the generality of the Z180, the address of the Interrupt Vector for the programmable timer PRT1 is configurable, and must be configured by the `crt0.asm` outside of this port. A configuration assumption has been made, which should be checked against the actual system environment. 8 | 9 | The two compilers ([used by the z88dk](https://github.com/z88dk/z88dk)) are supported. The sccz80 compiler and the sdcc compiler. The in-line assembly language notation used can be read by both compilers. 10 | 11 | Background 12 | ----------- 13 | This PR is based on running code for the [SC130](https://smallcomputercentral.wordpress.com/sc130-z180-motherboard/)/[SC131](https://smallcomputercentral.wordpress.com/sc131-z180-pocket-computer/) and [YAZ180](https://github.com/feilipu/yaz180) platforms, and is maintained by the z88dk team in this [z88dk-libraries](https://github.com/feilipu/z88dk-libraries/tree/master/freertos) repository. 14 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | /** 30 | * \file 31 | * \brief exception processing for freertos 32 | */ 33 | 34 | /* #include "embARC.h" */ 35 | 36 | #include "arc_freertos_exceptions.h" 37 | 38 | #ifdef __GNU__ 39 | extern void gnu_printf_setup( void ); 40 | #endif 41 | 42 | /** 43 | * \brief freertos related cpu exception initialization, all the interrupts handled by freertos must be not 44 | * fast irqs. If fiq is needed, please install the default firq_exc_entry or your own fast irq entry into 45 | * the specific interrupt exception. 46 | */ 47 | void freertos_exc_init( void ) 48 | { 49 | #ifdef __GNU__ 50 | gnu_printf_setup(); 51 | #endif 52 | } 53 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef ARC_FREERTOS_EXCEPTIONS_H 30 | #define ARC_FREERTOS_EXCEPTIONS_H 31 | 32 | /* 33 | * here, all arc cpu exceptions share the same entry, also for all interrupt 34 | * exceptions 35 | */ 36 | extern void exc_entry_cpu( void ); /* cpu exception entry for freertos */ 37 | extern void exc_entry_int( void ); /* int exception entry for freertos */ 38 | 39 | /* task dispatch functions in .s */ 40 | extern void start_r( void ); 41 | extern void start_dispatch(); 42 | extern void dispatch(); 43 | 44 | extern void freertos_exc_init( void ); 45 | 46 | #endif /* ARC_FREERTOS_EXCEPTIONS_H */ 47 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.c: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | /** 30 | * \file 31 | * \brief exception processing for freertos 32 | */ 33 | 34 | /* #include "embARC.h" */ 35 | 36 | #include "arc_freertos_exceptions.h" 37 | 38 | #ifdef __GNU__ 39 | extern void gnu_printf_setup( void ); 40 | #endif 41 | 42 | /** 43 | * \brief freertos related cpu exception initialization, all the interrupts handled by freertos must be not 44 | * fast irqs. If fiq is needed, please install the default firq_exc_entry or your own fast irq entry into 45 | * the specific interrupt exception. 46 | */ 47 | void freertos_exc_init( void ) 48 | { 49 | #ifdef __GNU__ 50 | gnu_printf_setup(); 51 | #endif 52 | } 53 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/ARC_v1/arc_freertos_exceptions.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2020 Synopsys, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef ARC_FREERTOS_EXCEPTIONS_H 30 | #define ARC_FREERTOS_EXCEPTIONS_H 31 | 32 | /* 33 | * here, all arc cpu exceptions share the same entry, also for all interrupt 34 | * exceptions 35 | */ 36 | extern void exc_entry_cpu( void ); /* cpu exception entry for freertos */ 37 | extern void exc_entry_int( void ); /* int exception entry for freertos */ 38 | 39 | /* task dispatch functions in .s */ 40 | extern void start_r( void ); 41 | extern void start_dispatch(); 42 | extern void dispatch(); 43 | 44 | extern void freertos_exc_init( void ); 45 | 46 | #endif /* ARC_FREERTOS_EXCEPTIONS_H */ 47 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Posix/FreeRTOS-simulator-for-Linux.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,11 3 | [InternetShortcut] 4 | IDList= 5 | URL=https://www.freertos.org/FreeRTOS-simulator-for-Linux.html 6 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Posix/utils/wait_for_event.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | #ifndef WAIT_FOR_EVENT_H_ 30 | #define WAIT_FOR_EVENT_H_ 31 | 32 | #include 33 | #include 34 | 35 | struct event; 36 | 37 | struct event * event_create( void ); 38 | void event_delete( struct event * ); 39 | bool event_wait( struct event * ev ); 40 | bool event_wait_timed( struct event * ev, 41 | time_t ms ); 42 | void event_signal( struct event * ev ); 43 | 44 | 45 | 46 | #endif /* ifndef WAIT_FOR_EVENT_H_ */ 47 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/RISC-V/README-for-info-on-official-MIT-license-port.txt: -------------------------------------------------------------------------------- 1 | The official and MIT licensed FreeRTOS ports for RISC-V are located in the following directories: 2 | \FreeRTOS\Source\portable\GCC\RISC-V 3 | \FreeRTOS\Source\portable\IAR\RISC-V 4 | 5 | Also so https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html 6 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/RP2040/LICENSE.md: -------------------------------------------------------------------------------- 1 | BSD-3-Clause License 2 | 3 | Copyright (c) 2020-2021 Raspberry Pi (Trading) Ltd. 4 | 5 | Redistribution and use in source and binary forms, with or without modification, are permitted provided that the 6 | following conditions are met: 7 | 8 | 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following 9 | disclaimer. 10 | 11 | 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 12 | disclaimer in the documentation and/or other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products 15 | derived from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 18 | INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 | WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 | THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/RP2040/README.md: -------------------------------------------------------------------------------- 1 | ## Overview 2 | 3 | This directory provides an SMP FreeRTOS-Kernel port that can be used with the Raspberry Pi Pico SDK. It supports: 4 | 5 | * Simple CMake INTERFACE libraries, to provide the FreeRTOS-Kernel and also the individual allocator types, without copying code into the user's project. 6 | * Running the FreeRTOS-Kernel and tasks on either core 0 or core 1, or both. 7 | * Use of SDK synchronization primitives (such as mutexes, semaphores, queues from pico_sync) between FreeRTOS tasks and code executing on a non FreeRTOS core, or in IRQ handlers. 8 | 9 | Note that whilst this SMP version can be run on just a single (either) core, it is probably 10 | more efficient to use the non SMP version in the main FreeRTOS-Kernel branch in that case. 11 | 12 | ## Using this port 13 | 14 | You can copy [FreeRTOS_Kernel_import.cmake](FreeRTOS_Kernel_import.cmake) into your project, and 15 | add the following in your `CMakeLists.txt`: 16 | 17 | ```cmake 18 | include(FreeRTOS_Kernel_import.cmake) 19 | ``` 20 | 21 | This will locate the FreeRTOS kernel if it is a direct sub-module of your project, or if you provide the 22 | `FREERTOS_KERNEL_PATH` variable in your environment or via `-DFREERTOS_KERNEL_PATH=/path/to/FreeRTOS-Kernel` on the CMake command line. 23 | 24 | **NOTE:** If you are using version 1.3.1 or older of the Raspberry Pi Pico SDK then this line must appear before the 25 | `pico_sdk_init()` and will cause FreeRTOS to be included/required in all RP2040 targets in your project. After this SDK 26 | version, you can include the FreeRTOS-Kernel support later in your CMake build (possibly in a subdirectory) and the 27 | FreeRTOS-Kernel support will only apply to those targets which explicitly include FreeRTOS support. 28 | 29 | As an alternative to the `import` statement above, you can just add this directory directly via the following (with 30 | the same placement restrictions related to the Raspberry Pi Pico SDK version above): 31 | 32 | ```cmake 33 | add_subdirectory(path/to/this/directory FreeRTOS-Kernel) 34 | ``` 35 | 36 | 37 | ## Advanced Configuration 38 | 39 | Some additional `config` options are defined [here](include/rp2040_config.h) which control some low level implementation details. 40 | 41 | ## Known Limitations 42 | 43 | - Tickless idle has not currently been tested, and is likely non-functional 44 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Xtensa_ESP32/FreeRTOS-openocd.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer 3 | * present in the kernel, so it has to be supplied by other means for 4 | * OpenOCD's threads awareness. 5 | * 6 | * Add this file to your project, and, if you're using --gc-sections, 7 | * ``--undefined=uxTopUsedPriority'' (or 8 | * ``-Wl,--undefined=uxTopUsedPriority'' when using gcc for final 9 | * linking) to your LDFLAGS; same with all the other symbols you need. 10 | */ 11 | 12 | #include "FreeRTOS.h" 13 | #include "esp_attr.h" 14 | #include "sdkconfig.h" 15 | 16 | #ifdef __GNUC__ 17 | #define USED __attribute__( ( used ) ) 18 | #else 19 | #define USED 20 | #endif 21 | 22 | /* 23 | * This file is no longer needed as AFTER FreeRTOS V10.14.1 OpenOCD is fixed in the kernel. 24 | * #ifdef CONFIG_ESP32_DEBUG_OCDAWARE 25 | * const int USED DRAM_ATTR uxTopUsedPriority = configMAX_PRIORITIES - 1; 26 | * #endif 27 | */ 28 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Xtensa_ESP32/include/port_systick.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #pragma once 8 | 9 | /* *INDENT-OFF* */ 10 | #ifdef __cplusplus 11 | extern "C" { 12 | #endif 13 | /* *INDENT-ON* */ 14 | 15 | /** 16 | * @brief Set up the SysTick interrupt 17 | */ 18 | void vPortSetupTimer( void ); 19 | 20 | /* *INDENT-OFF* */ 21 | #ifdef __cplusplus 22 | } 23 | #endif 24 | /* *INDENT-ON* */ 25 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc. 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD 7 | */ 8 | 9 | /* 10 | * Copyright (c) 2015-2019 Cadence Design Systems, Inc. 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining 13 | * a copy of this software and associated documentation files (the 14 | * "Software"), to deal in the Software without restriction, including 15 | * without limitation the rights to use, copy, modify, merge, publish, 16 | * distribute, sublicense, and/or sell copies of the Software, and to 17 | * permit persons to whom the Software is furnished to do so, subject to 18 | * the following conditions: 19 | * 20 | * The above copyright notice and this permission notice shall be included 21 | * in all copies or substantial portions of the Software. 22 | * 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 26 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 27 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 28 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 29 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 30 | */ 31 | 32 | /* 33 | * This utility helps benchmarking interrupt latency and context switches. 34 | * In order to enable it, set configBENCHMARK to 1 in FreeRTOSConfig.h. 35 | * You will also need to download the FreeRTOS_trace patch that contains 36 | * portbenchmark.c and the complete version of portbenchmark.h 37 | */ 38 | 39 | #ifndef PORTBENCHMARK_H 40 | #define PORTBENCHMARK_H 41 | 42 | #if configBENCHMARK 43 | #error "You need to download the FreeRTOS_trace patch that overwrites this file" 44 | #endif 45 | 46 | #define portbenchmarkINTERRUPT_DISABLE() 47 | #define portbenchmarkINTERRUPT_RESTORE( newstate ) 48 | #define portbenchmarkIntLatency() 49 | #define portbenchmarkIntWait() 50 | #define portbenchmarkReset() 51 | #define portbenchmarkPrint() 52 | 53 | #endif /* PORTBENCHMARK */ 54 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc. 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD 7 | */ 8 | 9 | /* 10 | * Copyright (c) 2015-2019 Cadence Design Systems, Inc. 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining 13 | * a copy of this software and associated documentation files (the 14 | * "Software"), to deal in the Software without restriction, including 15 | * without limitation the rights to use, copy, modify, merge, publish, 16 | * distribute, sublicense, and/or sell copies of the Software, and to 17 | * permit persons to whom the Software is furnished to do so, subject to 18 | * the following conditions: 19 | * 20 | * The above copyright notice and this permission notice shall be included 21 | * in all copies or substantial portions of the Software. 22 | * 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 26 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 27 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 28 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 29 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 30 | */ 31 | #include 32 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc. 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD 7 | */ 8 | 9 | /* 10 | * Copyright (c) 2015-2019 Cadence Design Systems, Inc. 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining 13 | * a copy of this software and associated documentation files (the 14 | * "Software"), to deal in the Software without restriction, including 15 | * without limitation the rights to use, copy, modify, merge, publish, 16 | * distribute, sublicense, and/or sell copies of the Software, and to 17 | * permit persons to whom the Software is furnished to do so, subject to 18 | * the following conditions: 19 | * 20 | * The above copyright notice and this permission notice shall be included 21 | * in all copies or substantial portions of the Software. 22 | * 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 26 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 27 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 28 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 29 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 30 | */ 31 | #include 32 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/KnownIssues.md: -------------------------------------------------------------------------------- 1 | # Known Issues 2 | This document lists the known issues in various FreeRTOS third 3 | party ports. 4 | 5 | ## ThirdParty/GCC/ARC_EM_HS 6 | * [Memory Read Protection Violation from Secure MPU on exit from 7 | interrupt](https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/331) 8 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Partner-Supported-Ports/Cadence/Xtensa/asm-offsets.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "../../../../../tasks.c" 4 | 5 | #define DEFINE(sym,val) \ 6 | printf("#define %s %d /* %s */\n", #sym, (val), #val) 7 | 8 | int main(void) 9 | { 10 | DEFINE(TCB_TOP_OF_STACK_OFF, offsetof(TCB_t, pxTopOfStack)); 11 | #if portUSING_MPU_WRAPPERS 12 | DEFINE(TCB_MPU_SETTINGS_OFF, offsetof(TCB_t, xMPUSettings.mpumap)); 13 | DEFINE(MPU_ENTRY_SIZE, sizeof(xthal_MPU_entry)); 14 | DEFINE(MPU_ENTRY_AS_OFF, offsetof(xthal_MPU_entry, as)); 15 | DEFINE(MPU_ENTRY_AT_OFF, offsetof(xthal_MPU_entry, at)); 16 | DEFINE(TCB_TASK_NAME_OFF, offsetof(TCB_t, pcTaskName)); 17 | #endif 18 | #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) 19 | DEFINE(TCB_END_OF_STACK_OFF, offsetof(TCB_t, pxEndOfStack)); 20 | #endif 21 | #if ( configUSE_C_RUNTIME_TLS_SUPPORT == 1 ) 22 | DEFINE(TCB_IMPURE_PTR_OFF, offsetof(TCB_t, xTLSBlock)); 23 | #endif 24 | } 25 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Partner-Supported-Ports/Cadence/Xtensa/portbenchmark.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel 3 | * Copyright (C) 2015-2024 Cadence Design Systems, Inc. 4 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 5 | * 6 | * SPDX-License-Identifier: MIT 7 | * 8 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 9 | * this software and associated documentation files (the "Software"), to deal in 10 | * the Software without restriction, including without limitation the rights to 11 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 12 | * the Software, and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included in all 16 | * copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 20 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 21 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 22 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * https://www.FreeRTOS.org 26 | * https://github.com/FreeRTOS 27 | * 28 | */ 29 | 30 | /* 31 | * This utility helps benchmarking interrupt latency and context switches. 32 | * In order to enable it, set configBENCHMARK to 1 in FreeRTOSConfig.h. 33 | * You will also need to download the FreeRTOS_trace patch that contains 34 | * portbenchmark.c and the complete version of portbenchmark.h 35 | */ 36 | 37 | #ifndef PORTBENCHMARK_H 38 | #define PORTBENCHMARK_H 39 | 40 | #if configBENCHMARK 41 | #error "You need to download the FreeRTOS_trace patch that overwrites this file" 42 | #endif 43 | 44 | #define portbenchmarkINTERRUPT_DISABLE() 45 | #define portbenchmarkINTERRUPT_RESTORE(newstate) 46 | #define portbenchmarkIntLatency() 47 | #define portbenchmarkIntWait() 48 | #define portbenchmarkReset() 49 | #define portbenchmarkPrint() 50 | 51 | #endif /* PORTBENCHMARK */ 52 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Partner-Supported-Ports/Cadence/Xtensa/porttrace.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel 3 | * Copyright (C) 2015-2024 Cadence Design Systems, Inc. 4 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 5 | * 6 | * SPDX-License-Identifier: MIT 7 | * 8 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 9 | * this software and associated documentation files (the "Software"), to deal in 10 | * the Software without restriction, including without limitation the rights to 11 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 12 | * the Software, and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included in all 16 | * copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 20 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 21 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 22 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * https://www.FreeRTOS.org 26 | * https://github.com/FreeRTOS 27 | * 28 | */ 29 | 30 | /* 31 | * This utility helps tracing the entering and exiting from tasks. 32 | * It maintains a circular buffer of tasks in the order they execute, 33 | * and their execution time. To enable it, set configUSE_TRACE_FACILITY_2 34 | * to 1 in FreeRTOSConfig.h. You will also need to download the 35 | * FreeRTOS_trace patch that contains porttrace.c and the complete version 36 | * of porttrace.h. 37 | */ 38 | 39 | #ifndef PORTTRACE_H 40 | #define PORTTRACE_H 41 | 42 | #if configUSE_TRACE_FACILITY_2 43 | #error "You need to download the FreeRTOS_trace patch that overwrites this file" 44 | #endif 45 | 46 | #define porttracePrint(nelements) 47 | #define porttraceStamp(stamp, count_incr) 48 | 49 | #endif /* PORTTRACE_H */ 50 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Partner-Supported-Ports/LICENSE: -------------------------------------------------------------------------------- 1 | This repository contains multiple directories, each individually licensed. Please see the LICENSE file in each directory. 2 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/Partner-Supported-Ports/README.md: -------------------------------------------------------------------------------- 1 | ## FreeRTOS Partner Supported Ports 2 | 3 | This repository contains FreeRTOS ports supported by FreeRTOS partners. For a 4 | partner supported FreeRTOS port: 5 | 6 | * The code has not been reviewed by the FreeRTOS team. 7 | * FreeRTOS team has not verified the tests results but tests exist and are 8 | reported to be successful by the partner. 9 | * Customer queries as well as bugs are addressed by the partner. 10 | 11 | A new FreeRTOS port can be directly contributed by a partner. Follow the steps 12 | below to contribute a FreeRTOS port to this repository: 13 | 14 | 1. Write the FreeRTOS port for your Compiler and Architecture. 15 | 2. Create a project in the [FreeRTOS Partner Supported Demos Repository](https://github.com/FreeRTOS/FreeRTOS-Partner-Supported-Demos/tree/main) 16 | for your hardware for running tests as mentioned [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Demo/ThirdParty/Template/README.md). 17 | 3. Make sure all the tests pass. Add the test results in the Pull Request description. 18 | 4. Add a README file with the following information: 19 | 1. How to use this port? 20 | 2. Link to the test project created in Step 2. 21 | 3. Any other relevant information. 22 | 5. Raise a PR to merge the FreeRTOS port. 23 | 6. Raise another PR to merge the test project in the [FreeRTOS-Partner-Supported-Demos Repository](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS/Demo/ThirdParty/Community-Supported). 24 | 25 | 26 | ## License 27 | 28 | This repository contains multiple directories, each individually licensed. Please see the LICENSE file in each directory. 29 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/XCC/Xtensa/readme_xtensa.txt: -------------------------------------------------------------------------------- 1 | FreeRTOS Port for Xtensa Configurable Processors 2 | ================================================ 3 | 4 | The Xtensa FreeRTOS port has moved and can be found in the 5 | "FreeRTOS-Kernel-Partner-Supported-Ports" submodule of FreeRTOS-Kernel: 6 | 7 | FreeRTOS/Source/portable/ThirdParty/Partner-Supported-Ports/Cadence/Xtensa 8 | 9 | Please see the Xtensa-specific README in this location for more details. 10 | 11 | -End- 12 | -------------------------------------------------------------------------------- /Source/portable/ThirdParty/xClang/XCOREAI/port.xc: -------------------------------------------------------------------------------- 1 | /* 2 | * port.xc 3 | * 4 | * Created on: Jul 31, 2019 5 | * Author: mbruno 6 | */ 7 | 8 | //#include "rtos_support.h" 9 | 10 | extern "C" { 11 | 12 | #include "FreeRTOSConfig.h" /* to get configNUMBER_OF_CORES */ 13 | #ifndef configNUMBER_OF_CORES 14 | #define configNUMBER_OF_CORES 1 15 | #endif 16 | 17 | void __xcore_interrupt_permitted_ugs_vPortStartSchedulerOnCore(void); 18 | 19 | } /* extern "C" */ 20 | 21 | void vPortStartSMPScheduler( void ) 22 | { 23 | par (int i = 0; i < configNUMBER_OF_CORES; i++) { 24 | __xcore_interrupt_permitted_ugs_vPortStartSchedulerOnCore(); 25 | } 26 | } 27 | -------------------------------------------------------------------------------- /Source/portable/WizC/PIC18/addFreeRTOS.h: -------------------------------------------------------------------------------- 1 | /* 2 | * FreeRTOS Kernel V11.2.0 3 | * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 | * 5 | * SPDX-License-Identifier: MIT 6 | * 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 | * this software and associated documentation files (the "Software"), to deal in 9 | * the Software without restriction, including without limitation the rights to 10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 | * the Software, and to permit persons to whom the Software is furnished to do so, 12 | * subject to the following conditions: 13 | * 14 | * The above copyright notice and this permission notice shall be included in all 15 | * copies or substantial portions of the Software. 16 | * 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 | * 24 | * https://www.FreeRTOS.org 25 | * https://github.com/FreeRTOS 26 | * 27 | */ 28 | 29 | /* 30 | Changes from V3.0.0 31 | 32 | Changes from V3.0.1 33 | 34 | Changes from V4.0.1 35 | Uselib pragma added for Croutine.c 36 | */ 37 | 38 | /* 39 | * The installation script will automatically prepend this file to the default FreeRTOS.h. 40 | */ 41 | 42 | #ifndef WIZC_FREERTOS_H 43 | #define WIZC_FREERTOS_H 44 | 45 | #pragma noheap 46 | #pragma wizcpp expandnl on 47 | #pragma wizcpp searchpath "$__PATHNAME__/libFreeRTOS/Include/" 48 | #pragma wizcpp uselib "$__PATHNAME__/libFreeRTOS/Modules/Croutine.c" 49 | #pragma wizcpp uselib "$__PATHNAME__/libFreeRTOS/Modules/Tasks.c" 50 | #pragma wizcpp uselib "$__PATHNAME__/libFreeRTOS/Modules/Queue.c" 51 | #pragma wizcpp uselib "$__PATHNAME__/libFreeRTOS/Modules/List.c" 52 | #pragma wizcpp uselib "$__PATHNAME__/libFreeRTOS/Modules/Port.c" 53 | 54 | #endif /* WIZC_FREERTOS_H */ 55 | -------------------------------------------------------------------------------- /Source/portable/readme.txt: -------------------------------------------------------------------------------- 1 | Each real time kernel port consists of three files that contain the core kernel 2 | components and are common to every port, and one or more files that are 3 | specific to a particular microcontroller and/or compiler. 4 | 5 | 6 | + The FreeRTOS/Source/Portable/MemMang directory contains the five sample 7 | memory allocators as described on the https://www.FreeRTOS.org WEB site. 8 | 9 | + The other directories each contain files specific to a particular 10 | microcontroller or compiler, where the directory name denotes the compiler 11 | specific files the directory contains. 12 | 13 | 14 | 15 | For example, if you are interested in the [compiler] port for the [architecture] 16 | microcontroller, then the port specific files are contained in 17 | FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the 18 | only port you are interested in then all the other directories can be 19 | ignored. 20 | --------------------------------------------------------------------------------