├── README └── main.c /README: -------------------------------------------------------------------------------- 1 | just some code i wanted to be saved for reference and / or future use 2 | taken from here: https://1vwjbxf1wko0yhnr.wordpress.com/author/2pkaqwtuqm2q7djg/ -------------------------------------------------------------------------------- /main.c: -------------------------------------------------------------------------------- 1 | /* 2 | DO WHAT THE FUCK YOU WANT TO PUBLIC LICENSE 3 | Version 2, December 2004 4 | 5 | Copyright (C) 2004 Sam Hocevar 6 | 7 | Everyone is permitted to copy and distribute verbatim or modified 8 | copies of this license document, and changing it is allowed as long 9 | as the name is changed. 10 | 11 | DO WHAT THE FUCK YOU WANT TO PUBLIC LICENSE 12 | TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 13 | 14 | 0. You just DO WHAT THE FUCK YOU WANT TO. 15 | */ 16 | 17 | #include 18 | #include 19 | #include 20 | 21 | typedef unsigned long NvU32; 22 | 23 | typedef struct { 24 | NvU32 version; 25 | NvU32 ClockType:2; 26 | NvU32 reserved:22; 27 | NvU32 reserved1:8; 28 | struct { 29 | NvU32 bIsPresent:1; 30 | NvU32 reserved:31; 31 | NvU32 frequency; 32 | }domain[32]; 33 | } NV_GPU_CLOCK_FREQUENCIES_V2; 34 | 35 | typedef struct { 36 | int value; 37 | struct { 38 | int mindelta; 39 | int maxdelta; 40 | } valueRange; 41 | } NV_GPU_PERF_PSTATES20_PARAM_DELTA; 42 | 43 | typedef struct { 44 | NvU32 domainId; 45 | NvU32 typeId; 46 | NvU32 bIsEditable:1; 47 | NvU32 reserved:31; 48 | NV_GPU_PERF_PSTATES20_PARAM_DELTA freqDelta_kHz; 49 | union { 50 | struct { 51 | NvU32 freq_kHz; 52 | } single; 53 | struct { 54 | NvU32 minFreq_kHz; 55 | NvU32 maxFreq_kHz; 56 | NvU32 domainId; 57 | NvU32 minVoltage_uV; 58 | NvU32 maxVoltage_uV; 59 | } range; 60 | } data; 61 | } NV_GPU_PSTATE20_CLOCK_ENTRY_V1; 62 | 63 | typedef struct { 64 | NvU32 domainId; 65 | NvU32 bIsEditable:1; 66 | NvU32 reserved:31; 67 | NvU32 volt_uV; 68 | int voltDelta_uV; 69 | } NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1; 70 | 71 | typedef struct { 72 | NvU32 version; 73 | NvU32 bIsEditable:1; 74 | NvU32 reserved:31; 75 | NvU32 numPstates; 76 | NvU32 numClocks; 77 | NvU32 numBaseVoltages; 78 | struct { 79 | NvU32 pstateId; 80 | NvU32 bIsEditable:1; 81 | NvU32 reserved:31; 82 | NV_GPU_PSTATE20_CLOCK_ENTRY_V1 clocks[8]; 83 | NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 baseVoltages[4]; 84 | } pstates[16]; 85 | } NV_GPU_PERF_PSTATES20_INFO_V1; 86 | 87 | typedef void *(*NvAPI_QueryInterface_t)(unsigned int offset); 88 | typedef int (*NvAPI_Initialize_t)(); 89 | typedef int (*NvAPI_Unload_t)(); 90 | typedef int (*NvAPI_EnumPhysicalGPUs_t)(int **handles, int *count); 91 | typedef int (*NvAPI_GPU_GetSystemType_t)(int *handle, int *systype); 92 | typedef int (*NvAPI_GPU_GetFullName_t)(int *handle, char *sysname); 93 | typedef int (*NvAPI_GPU_GetPhysicalFrameBufferSize_t)(int *handle, int *memsize); 94 | typedef int (*NvAPI_GPU_GetRamType_t)(int *handle, int *memtype); 95 | typedef int (*NvAPI_GPU_GetVbiosVersionString_t)(int *handle, char *biosname); 96 | typedef int (*NvAPI_GPU_GetAllClockFrequencies_t)(int *handle, NV_GPU_PERF_PSTATES20_INFO_V1 *pstates_info); 97 | typedef int (*NvAPI_GPU_GetPstates20_t)(int *handle, NV_GPU_PERF_PSTATES20_INFO_V1 *pstates_info); 98 | typedef int (*NvAPI_GPU_SetPstates20_t)(int *handle, int *pstates_info); 99 | 100 | NvAPI_QueryInterface_t NvQueryInterface = 0; 101 | NvAPI_Initialize_t NvInit = 0; 102 | NvAPI_Unload_t NvUnload = 0; 103 | NvAPI_EnumPhysicalGPUs_t NvEnumGPUs = 0; 104 | NvAPI_GPU_GetSystemType_t NvGetSysType = 0; 105 | NvAPI_GPU_GetFullName_t NvGetName = 0; 106 | NvAPI_GPU_GetPhysicalFrameBufferSize_t NvGetMemSize = 0; 107 | NvAPI_GPU_GetRamType_t NvGetMemType = 0; 108 | NvAPI_GPU_GetVbiosVersionString_t NvGetBiosName = 0; 109 | NvAPI_GPU_GetAllClockFrequencies_t NvGetFreq = 0; 110 | NvAPI_GPU_GetPstates20_t NvGetPstates = 0; 111 | NvAPI_GPU_SetPstates20_t NvSetPstates = 0; 112 | 113 | int main(int argc, char **argv) 114 | { 115 | int nGPU=0, userfreq = 0, systype=0, memsize=0, memtype=0; 116 | int *hdlGPU[64]={0}, *buf=0; 117 | char sysname[64]={0}, biosname[64]={0}; 118 | NV_GPU_PERF_PSTATES20_INFO_V1 pstates_info; 119 | pstates_info.version = 0x11c94; 120 | 121 | NvQueryInterface = (void*)GetProcAddress(LoadLibrary("nvapi.dll"), "nvapi_QueryInterface"); 122 | NvInit = NvQueryInterface(0x0150E828); 123 | NvUnload = NvQueryInterface(0xD22BDD7E); 124 | NvEnumGPUs = NvQueryInterface(0xE5AC921F); 125 | NvGetSysType = NvQueryInterface(0xBAAABFCC); 126 | NvGetName = NvQueryInterface(0xCEEE8E9F); 127 | NvGetMemSize = NvQueryInterface(0x46FBEB03); 128 | NvGetMemType = NvQueryInterface(0x57F7CAAC); 129 | NvGetBiosName = NvQueryInterface(0xA561FD7D); 130 | NvGetFreq = NvQueryInterface(0xDCB616C3); 131 | NvGetPstates = NvQueryInterface(0x6FF81213); 132 | NvSetPstates = NvQueryInterface(0x0F4DAE6B); 133 | 134 | NvInit(); 135 | NvEnumGPUs(hdlGPU, &nGPU); 136 | NvGetSysType(hdlGPU[0], &systype); 137 | NvGetName(hdlGPU[0], sysname); 138 | NvGetMemSize(hdlGPU[0], &memsize); 139 | NvGetMemType(hdlGPU[0], &memtype); 140 | NvGetBiosName(hdlGPU[0], biosname); 141 | NvGetPstates(hdlGPU[0], &pstates_info); 142 | 143 | switch(systype){ 144 | case 1: printf("\nType: Laptop\n"); break; 145 | case 2: printf("\nType: Desktop\n"); break; 146 | default: printf("\nType: Unknown\n"); break; 147 | } 148 | printf("Name: %s\n", sysname); 149 | printf("VRAM: %dMB GDDR%d\n", memsize/1024, memtype<=7?3:5); 150 | printf("BIOS: %s\n", biosname); 151 | printf("\nGPU: %dMHz\n", (int)((pstates_info.pstates[0].clocks[0]).data.range.maxFreq_kHz)/1000); 152 | printf("RAM: %dMHz\n", (int)((pstates_info.pstates[0].clocks[1]).data.single.freq_kHz)/1000); 153 | printf("\nCurrent GPU OC: %dMHz\n", (int)((pstates_info.pstates[0].clocks[0]).freqDelta_kHz.value)/1000); 154 | printf("Current RAM OC: %dMHz\n", (int)((pstates_info.pstates[0].clocks[1]).freqDelta_kHz.value)/1000); 155 | 156 | if(argc > 1){ 157 | userfreq = atoi(argv[1])*1000; 158 | if(-250000 <= userfreq && userfreq <= 250000) { 159 | buf = malloc(0x1c94); 160 | memset(buf, 0, 0x1c94); 161 | buf[0] = 0x11c94; buf[2] = 1; buf[3] = 1; 162 | buf[10] = userfreq; 163 | NvSetPstates(hdlGPU[0], buf)? printf("\nGPU OC failed!\n") : printf("\nGPU OC OK: %d MHz\n", userfreq/1000); 164 | free(buf); 165 | } else { 166 | printf("\nGPU Frequency not in safe range (-250MHz to +250MHz).\n"); 167 | return 1; 168 | } } 169 | if(argc > 2){ 170 | userfreq = atoi(argv[2])*1000; 171 | if(-250000 <= userfreq && userfreq <= 250000) { 172 | buf = malloc(0x1c94); 173 | memset(buf, 0, 0x1c94); 174 | buf[0] = 0x11c94; buf[2] = 1; buf[3] = 1; 175 | buf[7] = 4; buf[10] = memtype<=7?userfreq:userfreq*2; 176 | NvSetPstates(hdlGPU[0], buf)? printf("VRAM OC failed!\n") : printf("RAM OC OK: %d MHz\n", userfreq/1000); 177 | free(buf); 178 | } else { 179 | printf("\nRAM Frequency not in safe range (-250MHz to +250MHz).\n"); 180 | return 1; 181 | } } 182 | NvUnload(); 183 | return 0; 184 | } --------------------------------------------------------------------------------