├── .cproject ├── .gitattributes ├── .mxproject ├── .project ├── .settings ├── com.atollic.truestudio.debug.hardware_device.prefs ├── language.settings.xml └── org.eclipse.cdt.managedbuilder.core.prefs ├── Debug ├── Drivers │ └── STM32F0xx_HAL_Driver │ │ └── Src │ │ ├── stm32f0xx_hal.o │ │ ├── stm32f0xx_hal.su │ │ ├── stm32f0xx_hal_adc.o │ │ ├── stm32f0xx_hal_adc.su │ │ ├── stm32f0xx_hal_adc_ex.o │ │ ├── stm32f0xx_hal_adc_ex.su │ │ ├── stm32f0xx_hal_cortex.o │ │ ├── stm32f0xx_hal_cortex.su │ │ ├── stm32f0xx_hal_dma.o │ │ ├── stm32f0xx_hal_dma.su │ │ ├── stm32f0xx_hal_flash.o │ │ ├── stm32f0xx_hal_flash.su │ │ ├── stm32f0xx_hal_flash_ex.o │ │ ├── stm32f0xx_hal_flash_ex.su │ │ ├── stm32f0xx_hal_gpio.o │ │ ├── stm32f0xx_hal_gpio.su │ │ ├── stm32f0xx_hal_i2c.o │ │ ├── stm32f0xx_hal_i2c.su │ │ ├── stm32f0xx_hal_i2c_ex.o │ │ ├── stm32f0xx_hal_i2c_ex.su │ │ ├── stm32f0xx_hal_iwdg.o │ │ ├── stm32f0xx_hal_iwdg.su │ │ ├── stm32f0xx_hal_pwr.o │ │ ├── stm32f0xx_hal_pwr.su │ │ ├── stm32f0xx_hal_pwr_ex.o │ │ ├── stm32f0xx_hal_pwr_ex.su │ │ ├── stm32f0xx_hal_rcc.o │ │ ├── stm32f0xx_hal_rcc.su │ │ ├── stm32f0xx_hal_rcc_ex.o │ │ ├── stm32f0xx_hal_rcc_ex.su │ │ ├── stm32f0xx_hal_tim.o │ │ ├── stm32f0xx_hal_tim.su │ │ ├── stm32f0xx_hal_tim_ex.o │ │ ├── stm32f0xx_hal_tim_ex.su │ │ ├── stm32f0xx_ll_exti.o │ │ ├── stm32f0xx_ll_exti.su │ │ ├── stm32f0xx_ll_gpio.o │ │ ├── stm32f0xx_ll_gpio.su │ │ ├── stm32f0xx_ll_utils.o │ │ └── stm32f0xx_ll_utils.su ├── Src │ ├── main.o │ ├── main.su │ ├── stm32f0xx_hal_msp.o │ ├── stm32f0xx_hal_msp.su │ ├── stm32f0xx_it.o │ ├── stm32f0xx_it.su │ ├── system_stm32f0xx.o │ ├── system_stm32f0xx.su │ ├── tune.o │ └── tune.su ├── startup │ └── startup_stm32f031x6.o ├── stm32f0_op_amp_interrupt.elf ├── stm32f0_op_amp_interrupt.list ├── stm32f0_op_amp_interrupt.map ├── stm32f0bemf_op_amp.list └── stm32f0bemf_op_amp.map ├── Drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32F0xx │ │ │ └── Include │ │ │ ├── stm32f031x6.h │ │ │ ├── stm32f0xx.h │ │ │ └── system_stm32f0xx.h │ └── Include │ │ ├── arm_common_tables.h │ │ ├── arm_const_structs.h │ │ ├── arm_math.h │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armcc_V6.h │ │ ├── cmsis_gcc.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_cmFunc.h │ │ ├── core_cmInstr.h │ │ ├── core_cmSimd.h │ │ ├── core_sc000.h │ │ └── core_sc300.h └── STM32F0xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32f0xx_hal.h │ ├── stm32f0xx_hal_adc.h │ ├── stm32f0xx_hal_adc_ex.h │ ├── stm32f0xx_hal_cortex.h │ ├── stm32f0xx_hal_def.h │ ├── stm32f0xx_hal_dma.h │ ├── stm32f0xx_hal_dma_ex.h │ ├── stm32f0xx_hal_flash.h │ ├── stm32f0xx_hal_flash_ex.h │ ├── stm32f0xx_hal_gpio.h │ ├── stm32f0xx_hal_gpio_ex.h │ ├── stm32f0xx_hal_i2c.h │ ├── stm32f0xx_hal_i2c_ex.h │ ├── stm32f0xx_hal_iwdg.h │ ├── stm32f0xx_hal_pwr.h │ ├── stm32f0xx_hal_pwr_ex.h │ ├── stm32f0xx_hal_rcc.h │ ├── stm32f0xx_hal_rcc_ex.h │ ├── stm32f0xx_hal_tim.h │ ├── stm32f0xx_hal_tim_ex.h │ ├── stm32f0xx_ll_bus.h │ ├── stm32f0xx_ll_cortex.h │ ├── stm32f0xx_ll_crs.h │ ├── stm32f0xx_ll_dma.h │ ├── stm32f0xx_ll_exti.h │ ├── stm32f0xx_ll_gpio.h │ ├── stm32f0xx_ll_pwr.h │ ├── stm32f0xx_ll_rcc.h │ ├── stm32f0xx_ll_system.h │ └── stm32f0xx_ll_utils.h │ └── Src │ ├── stm32f0xx_hal.c │ ├── stm32f0xx_hal_adc.c │ ├── stm32f0xx_hal_adc_ex.c │ ├── stm32f0xx_hal_cortex.c │ ├── stm32f0xx_hal_dma.c │ ├── stm32f0xx_hal_flash.c │ ├── stm32f0xx_hal_flash_ex.c │ ├── stm32f0xx_hal_gpio.c │ ├── stm32f0xx_hal_i2c.c │ ├── stm32f0xx_hal_i2c_ex.c │ ├── stm32f0xx_hal_iwdg.c │ ├── stm32f0xx_hal_pwr.c │ ├── stm32f0xx_hal_pwr_ex.c │ ├── stm32f0xx_hal_rcc.c │ ├── stm32f0xx_hal_rcc_ex.c │ ├── stm32f0xx_hal_tim.c │ ├── stm32f0xx_hal_tim_ex.c │ ├── stm32f0xx_ll_exti.c │ ├── stm32f0xx_ll_gpio.c │ └── stm32f0xx_ll_utils.c ├── Inc ├── main.h ├── stm32_assert.h ├── stm32f0xx_hal_conf.h ├── stm32f0xx_it.h └── tune.h ├── LICENSE ├── README.md ├── STM32F031C6_FLASH.ld ├── Src ├── main.c ├── stm32f0xx_hal_msp.c ├── stm32f0xx_it.c ├── system_stm32f0xx.c └── tune.c ├── mx.scratch ├── startup └── startup_stm32f031x6.s ├── stm32f0_op_amp_interrupt.elf.launch ├── stm32f0bemf_op_amp.elf.launch └── stm32f0bemf_op_amp.ioc /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | -------------------------------------------------------------------------------- /.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | HeaderPath=C:/Users/Alka/Google Drive/my32bit/stspin32op_amp_interrupt/stm32f0bemf_op_amp/Inc 3 | HeaderFiles=stm32f0xx_it.h;stm32_assert.h;stm32f0xx_hal_conf.h;main.h; 4 | SourcePath=C:/Users/Alka/Google Drive/my32bit/stspin32op_amp_interrupt/stm32f0bemf_op_amp/Src 5 | SourceFiles=stm32f0xx_it.c;stm32f0xx_hal_msp.c;main.c; 6 | 7 | [PreviousLibFiles] 8 | LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f031x6.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; 9 | 10 | [PreviousUsedTStudioFiles] 11 | SourceFiles=..\Src\main.c;..\Src\stm32f0xx_it.c;..\Src\stm32f0xx_hal_msp.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;../Src/system_stm32f0xx.c;../Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;../Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/startup_stm32f031x6.s; 12 | HeaderPath=..\Drivers\STM32F0xx_HAL_Driver\Inc;..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F0xx\Include;..\Drivers\CMSIS\Include;..\Inc; 13 | CDefines=USE_FULL_LL_DRIVER;__weak:__attribute__((weak));__packed:__attribute__((__packed__)); 14 | 15 | -------------------------------------------------------------------------------- /.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | stm32f0bemf_op_amp 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | ?children? 14 | ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| 15 | 16 | 17 | ?name? 18 | 19 | 20 | 21 | org.eclipse.cdt.make.core.append_environment 22 | true 23 | 24 | 25 | org.eclipse.cdt.make.core.buildArguments 26 | 27 | 28 | 29 | org.eclipse.cdt.make.core.buildCommand 30 | make 31 | 32 | 33 | org.eclipse.cdt.make.core.buildLocation 34 | ${workspace_loc:/STM32100B-EVAL/Debug} 35 | 36 | 37 | org.eclipse.cdt.make.core.contents 38 | org.eclipse.cdt.make.core.activeConfigSettings 39 | 40 | 41 | org.eclipse.cdt.make.core.enableAutoBuild 42 | false 43 | 44 | 45 | org.eclipse.cdt.make.core.enableCleanBuild 46 | true 47 | 48 | 49 | org.eclipse.cdt.make.core.enableFullBuild 50 | true 51 | 52 | 53 | org.eclipse.cdt.make.core.stopOnError 54 | true 55 | 56 | 57 | org.eclipse.cdt.make.core.useDefaultBuildCmd 58 | true 59 | 60 | 61 | 62 | 63 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 64 | 65 | 66 | 67 | 68 | 69 | org.eclipse.cdt.core.cnature 70 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 71 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 72 | 73 | 74 | -------------------------------------------------------------------------------- /.settings/com.atollic.truestudio.debug.hardware_device.prefs: -------------------------------------------------------------------------------- 1 | BOARD=None 2 | CODE_LOCATION=FLASH 3 | ENDIAN=Little-endian 4 | MCU=STM32F031C6 5 | MCU_VENDOR=STMicroelectronics 6 | MODEL=Lite 7 | PROBE=ST-LINK 8 | PROJECT_FORMAT_VERSION=2 9 | TARGET=ARM\u00AE 10 | VERSION=4.1.0 11 | eclipse.preferences.version=1 12 | -------------------------------------------------------------------------------- /.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | -------------------------------------------------------------------------------- /.settings/org.eclipse.cdt.managedbuilder.core.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/delimiter=; 3 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/operation=remove 4 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/delimiter=; 5 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/operation=remove 6 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/append=true 7 | environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true 8 | environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/delimiter=; 9 | environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/operation=remove 10 | environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/append=true 11 | environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true 12 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o: 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stm32f0xx_hal.c:364:10:HAL_GetHalVersion 0 static 12 | stm32f0xx_hal.c:373:10:HAL_GetREVID 0 static 13 | stm32f0xx_hal.c:382:10:HAL_GetDEVID 0 static 14 | stm32f0xx_hal.c:391:10:HAL_GetUIDw0 0 static 15 | stm32f0xx_hal.c:400:10:HAL_GetUIDw1 0 static 16 | stm32f0xx_hal.c:409:10:HAL_GetUIDw2 0 static 17 | stm32f0xx_hal.c:418:6:HAL_DBGMCU_EnableDBGStopMode 0 static 18 | stm32f0xx_hal.c:427:6:HAL_DBGMCU_DisableDBGStopMode 0 static 19 | stm32f0xx_hal.c:436:6:HAL_DBGMCU_EnableDBGStandbyMode 0 static 20 | stm32f0xx_hal.c:445:6:HAL_DBGMCU_DisableDBGStandbyMode 0 static 21 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_adc.c:1910:26:ADC_Enable 24 static 2 | stm32f0xx_hal_adc.c:701:13:HAL_ADC_MspInit 0 static 3 | stm32f0xx_hal_adc.c:359:19:HAL_ADC_Init 24 static 4 | stm32f0xx_hal_adc.c:716:13:HAL_ADC_MspDeInit 0 static 5 | stm32f0xx_hal_adc.c:585:19:HAL_ADC_DeInit 16 static 6 | stm32f0xx_hal_adc.c:758:19:HAL_ADC_Start 8 static 7 | stm32f0xx_hal_adc.c:823:19:HAL_ADC_Stop 16 static 8 | stm32f0xx_hal_adc.c:877:19:HAL_ADC_PollForConversion 24 static 9 | stm32f0xx_hal_adc.c:997:19:HAL_ADC_PollForEvent 24 static 10 | stm32f0xx_hal_adc.c:1073:19:HAL_ADC_Start_IT 8 static 11 | stm32f0xx_hal_adc.c:1154:19:HAL_ADC_Stop_IT 16 static 12 | stm32f0xx_hal_adc.c:1207:19:HAL_ADC_Start_DMA 16 static 13 | stm32f0xx_hal_adc.c:1296:19:HAL_ADC_Stop_DMA 24 static 14 | stm32f0xx_hal_adc.c:1378:10:HAL_ADC_GetValue 0 static 15 | stm32f0xx_hal_adc.c:1511:13:HAL_ADC_ConvCpltCallback 0 static 16 | stm32f0xx_hal_adc.c:2083:13:ADC_DMAConvCplt 8 static 17 | stm32f0xx_hal_adc.c:1526:13:HAL_ADC_ConvHalfCpltCallback 0 static 18 | stm32f0xx_hal_adc.c:2144:13:ADC_DMAHalfConvCplt 8 static 19 | stm32f0xx_hal_adc.c:1541:13:HAL_ADC_LevelOutOfWindowCallback 0 static 20 | stm32f0xx_hal_adc.c:1557:13:HAL_ADC_ErrorCallback 0 static 21 | stm32f0xx_hal_adc.c:2158:13:ADC_DMAError 8 static 22 | stm32f0xx_hal_adc.c:1395:6:HAL_ADC_IRQHandler 16 static 23 | stm32f0xx_hal_adc.c:1611:19:HAL_ADC_ConfigChannel 24 static 24 | stm32f0xx_hal_adc.c:1744:19:HAL_ADC_AnalogWDGConfig 16 static 25 | stm32f0xx_hal_adc.c:1866:10:HAL_ADC_GetState 0 static 26 | stm32f0xx_hal_adc.c:1880:10:HAL_ADC_GetError 0 static 27 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_adc_ex.c:113:19:HAL_ADCEx_Calibration_Start 16 static 2 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_cortex.c:152:6:HAL_NVIC_SetPriority 16 static 2 | stm32f0xx_hal_cortex.c:168:6:HAL_NVIC_EnableIRQ 0 static 3 | stm32f0xx_hal_cortex.c:184:6:HAL_NVIC_DisableIRQ 0 static 4 | stm32f0xx_hal_cortex.c:197:6:HAL_NVIC_SystemReset 0 static 5 | stm32f0xx_hal_cortex.c:210:10:HAL_SYSTICK_Config 0 static 6 | stm32f0xx_hal_cortex.c:242:10:HAL_NVIC_GetPriority 0 static 7 | stm32f0xx_hal_cortex.c:255:6:HAL_NVIC_SetPendingIRQ 0 static 8 | stm32f0xx_hal_cortex.c:273:10:HAL_NVIC_GetPendingIRQ 0 static 9 | stm32f0xx_hal_cortex.c:289:6:HAL_NVIC_ClearPendingIRQ 0 static 10 | stm32f0xx_hal_cortex.c:306:6:HAL_SYSTICK_CLKSourceConfig 0 static 11 | stm32f0xx_hal_cortex.c:333:13:HAL_SYSTICK_Callback 0 static 12 | stm32f0xx_hal_cortex.c:324:6:HAL_SYSTICK_IRQHandler 8 static 13 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_dma.c:154:19:HAL_DMA_Init 16 static 2 | stm32f0xx_hal_dma.c:222:19:HAL_DMA_DeInit 16 static 3 | stm32f0xx_hal_dma.c:298:19:HAL_DMA_Start 20 static 4 | stm32f0xx_hal_dma.c:345:19:HAL_DMA_Start_IT 20 static 5 | stm32f0xx_hal_dma.c:401:19:HAL_DMA_Abort 8 static 6 | stm32f0xx_hal_dma.c:427:19:HAL_DMA_Abort_IT 16 static 7 | stm32f0xx_hal_dma.c:473:19:HAL_DMA_PollForTransfer 32 static 8 | stm32f0xx_hal_dma.c:574:6:HAL_DMA_IRQHandler 24 static 9 | stm32f0xx_hal_dma.c:666:19:HAL_DMA_RegisterCallback 12 static 10 | stm32f0xx_hal_dma.c:717:19:HAL_DMA_UnRegisterCallback 8 static 11 | stm32f0xx_hal_dma.c:793:22:HAL_DMA_GetState 0 static 12 | stm32f0xx_hal_dma.c:804:10:HAL_DMA_GetError 0 static 13 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_flash.c:183:19:HAL_FLASH_Program 48 static 2 | stm32f0xx_hal_flash.c:255:19:HAL_FLASH_Program_IT 20 static 3 | stm32f0xx_hal_flash.c:444:13:HAL_FLASH_EndOfOperationCallback 0 static 4 | stm32f0xx_hal_flash.c:462:13:HAL_FLASH_OperationErrorCallback 0 static 5 | stm32f0xx_hal_flash.c:301:6:HAL_FLASH_IRQHandler 24 static 6 | stm32f0xx_hal_flash.c:495:19:HAL_FLASH_Unlock 0 static 7 | stm32f0xx_hal_flash.c:515:19:HAL_FLASH_Lock 0 static 8 | stm32f0xx_hal_flash.c:527:19:HAL_FLASH_OB_Unlock 0 static 9 | stm32f0xx_hal_flash.c:547:19:HAL_FLASH_OB_Lock 0 static 10 | stm32f0xx_hal_flash.c:560:19:HAL_FLASH_OB_Launch 24 static 11 | stm32f0xx_hal_flash.c:592:10:HAL_FLASH_GetError 0 static 12 | stm32f0xx_hal_flash.c:632:19:FLASH_WaitForLastOperation 24 static 13 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_flash_ex.c:175:19:HAL_FLASHEx_Erase 32 static 2 | stm32f0xx_hal_flash_ex.c:256:19:HAL_FLASHEx_Erase_IT 16 static 3 | stm32f0xx_hal_flash_ex.c:329:19:HAL_FLASHEx_OBErase 24 static 4 | stm32f0xx_hal_flash_ex.c:378:19:HAL_FLASHEx_OBProgram 24 static 5 | stm32f0xx_hal_flash_ex.c:459:6:HAL_FLASHEx_OBGetConfig 0 static 6 | stm32f0xx_hal_flash_ex.c:481:10:HAL_FLASHEx_OBGetUserData 0 static 7 | stm32f0xx_hal_flash_ex.c:976:6:FLASH_PageErase 0 static 8 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_gpio.c:186:6:HAL_GPIO_Init 56 static 2 | stm32f0xx_hal_gpio.c:311:6:HAL_GPIO_DeInit 48 static 3 | stm32f0xx_hal_gpio.c:392:15:HAL_GPIO_ReadPin 0 static 4 | stm32f0xx_hal_gpio.c:425:6:HAL_GPIO_WritePin 0 static 5 | stm32f0xx_hal_gpio.c:447:6:HAL_GPIO_TogglePin 0 static 6 | stm32f0xx_hal_gpio.c:466:19:HAL_GPIO_LockPin 8 static 7 | stm32f0xx_hal_gpio.c:515:13:HAL_GPIO_EXTI_Callback 0 static 8 | stm32f0xx_hal_gpio.c:500:6:HAL_GPIO_EXTI_IRQHandler 8 static 9 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_i2c.c:4406:13:I2C_DMASlaveReceiveCplt 0 static 2 | stm32f0xx_hal_i2c.c:4307:13:I2C_DMAMasterTransmitCplt 8 static 3 | stm32f0xx_hal_i2c.c:4364:13:I2C_DMAMasterReceiveCplt 8 static 4 | stm32f0xx_hal_i2c.c:4574:26:I2C_WaitOnRXNEFlagUntilTimeout 32 static 5 | stm32f0xx_hal_i2c.c:4349:13:I2C_DMASlaveTransmitCplt 0 static 6 | stm32f0xx_hal_i2c.c:4503:26:I2C_WaitOnTXISFlagUntilTimeout 24 static 7 | stm32f0xx_hal_i2c.c:4540:26:I2C_WaitOnSTOPFlagUntilTimeout 24 static 8 | stm32f0xx_hal_i2c.c:3709:26:I2C_RequestMemoryRead 24 static 9 | stm32f0xx_hal_i2c.c:3642:26:I2C_RequestMemoryWrite 24 static 10 | stm32f0xx_hal_i2c.c:527:13:HAL_I2C_MspInit 0 static 11 | stm32f0xx_hal_i2c.c:404:19:HAL_I2C_Init 8 static 12 | stm32f0xx_hal_i2c.c:543:13:HAL_I2C_MspDeInit 0 static 13 | stm32f0xx_hal_i2c.c:491:19:HAL_I2C_DeInit 16 static 14 | stm32f0xx_hal_i2c.c:627:19:HAL_I2C_Master_Transmit 32 static 15 | stm32f0xx_hal_i2c.c:751:19:HAL_I2C_Master_Receive 32 static 16 | stm32f0xx_hal_i2c.c:874:19:HAL_I2C_Slave_Transmit 32 static 17 | stm32f0xx_hal_i2c.c:1014:19:HAL_I2C_Slave_Receive 40 static 18 | stm32f0xx_hal_i2c.c:1146:19:HAL_I2C_Master_Transmit_IT 24 static 19 | stm32f0xx_hal_i2c.c:1215:19:HAL_I2C_Master_Receive_IT 24 static 20 | stm32f0xx_hal_i2c.c:1282:19:HAL_I2C_Slave_Transmit_IT 20 static 21 | stm32f0xx_hal_i2c.c:1331:19:HAL_I2C_Slave_Receive_IT 20 static 22 | stm32f0xx_hal_i2c.c:1382:19:HAL_I2C_Master_Transmit_DMA 32 static 23 | stm32f0xx_hal_i2c.c:1490:19:HAL_I2C_Master_Receive_DMA 32 static 24 | stm32f0xx_hal_i2c.c:1595:19:HAL_I2C_Slave_Transmit_DMA 24 static 25 | stm32f0xx_hal_i2c.c:1661:19:HAL_I2C_Slave_Receive_DMA 24 static 26 | stm32f0xx_hal_i2c.c:1731:19:HAL_I2C_Mem_Write 48 static 27 | stm32f0xx_hal_i2c.c:1884:19:HAL_I2C_Mem_Read 48 static 28 | stm32f0xx_hal_i2c.c:2028:19:HAL_I2C_Mem_Write_IT 48 static 29 | stm32f0xx_hal_i2c.c:2127:19:HAL_I2C_Mem_Read_IT 48 static 30 | stm32f0xx_hal_i2c.c:2225:19:HAL_I2C_Mem_Write_DMA 56 static 31 | stm32f0xx_hal_i2c.c:2341:19:HAL_I2C_Mem_Read_DMA 56 static 32 | stm32f0xx_hal_i2c.c:2455:19:HAL_I2C_IsDeviceReady 56 static 33 | stm32f0xx_hal_i2c.c:2575:19:HAL_I2C_Master_Sequential_Transmit_IT 20 static 34 | stm32f0xx_hal_i2c.c:2648:19:HAL_I2C_Master_Sequential_Receive_IT 20 static 35 | stm32f0xx_hal_i2c.c:2719:19:HAL_I2C_Slave_Sequential_Transmit_IT 28 static 36 | stm32f0xx_hal_i2c.c:2793:19:HAL_I2C_Slave_Sequential_Receive_IT 28 static 37 | stm32f0xx_hal_i2c.c:2863:19:HAL_I2C_EnableListen_IT 0 static 38 | stm32f0xx_hal_i2c.c:2887:19:HAL_I2C_DisableListen_IT 12 static 39 | stm32f0xx_hal_i2c.c:2920:19:HAL_I2C_Master_Abort_IT 8 static 40 | stm32f0xx_hal_i2c.c:2970:6:HAL_I2C_EV_IRQHandler 8 static 41 | stm32f0xx_hal_i2c.c:3034:13:HAL_I2C_MasterTxCpltCallback 0 static 42 | stm32f0xx_hal_i2c.c:3050:13:HAL_I2C_MasterRxCpltCallback 0 static 43 | stm32f0xx_hal_i2c.c:3065:13:HAL_I2C_SlaveTxCpltCallback 0 static 44 | stm32f0xx_hal_i2c.c:3081:13:HAL_I2C_SlaveRxCpltCallback 0 static 45 | stm32f0xx_hal_i2c.c:3099:13:HAL_I2C_AddrCallback 0 static 46 | stm32f0xx_hal_i2c.c:3117:13:HAL_I2C_ListenCpltCallback 0 static 47 | stm32f0xx_hal_i2c.c:3133:13:HAL_I2C_MemTxCpltCallback 0 static 48 | stm32f0xx_hal_i2c.c:3149:13:HAL_I2C_MemRxCpltCallback 0 static 49 | stm32f0xx_hal_i2c.c:3165:13:HAL_I2C_ErrorCallback 0 static 50 | stm32f0xx_hal_i2c.c:3181:13:HAL_I2C_AbortCpltCallback 0 static 51 | stm32f0xx_hal_i2c.c:4184:13:I2C_ITError 8 static 52 | stm32f0xx_hal_i2c.c:4034:13:I2C_ITSlaveCplt 24 static 53 | stm32f0xx_hal_i2c.c:3385:26:I2C_Slave_ISR_IT 32 static 54 | stm32f0xx_hal_i2c.c:3587:26:I2C_Slave_ISR_DMA 16 static 55 | stm32f0xx_hal_i2c.c:4438:13:I2C_DMAAbort 8 static 56 | stm32f0xx_hal_i2c.c:4421:13:I2C_DMAError 8 static 57 | stm32f0xx_hal_i2c.c:2989:6:HAL_I2C_ER_IRQHandler 16 static 58 | stm32f0xx_hal_i2c.c:3942:13:I2C_ITMasterCplt 8 static 59 | stm32f0xx_hal_i2c.c:3264:26:I2C_Master_ISR_IT 32 static 60 | stm32f0xx_hal_i2c.c:3498:26:I2C_Master_ISR_DMA 24 static 61 | stm32f0xx_hal_i2c.c:3216:22:HAL_I2C_GetState 0 static 62 | stm32f0xx_hal_i2c.c:3228:21:HAL_I2C_GetMode 0 static 63 | stm32f0xx_hal_i2c.c:3239:10:HAL_I2C_GetError 0 static 64 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_i2c_ex.c:111:19:HAL_I2CEx_ConfigAnalogFilter 28 static 2 | stm32f0xx_hal_i2c_ex.c:155:19:HAL_I2CEx_ConfigDigitalFilter 28 static 3 | stm32f0xx_hal_i2c_ex.c:207:19:HAL_I2CEx_EnableWakeUp 20 static 4 | stm32f0xx_hal_i2c_ex.c:246:19:HAL_I2CEx_DisableWakeUp 20 static 5 | stm32f0xx_hal_i2c_ex.c:293:6:HAL_I2CEx_EnableFastModePlus 8 static 6 | stm32f0xx_hal_i2c_ex.c:318:6:HAL_I2CEx_DisableFastModePlus 8 static 7 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_iwdg.c:170:19:HAL_IWDG_Init 16 static 2 | stm32f0xx_hal_iwdg.c:254:19:HAL_IWDG_Refresh 0 static 3 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_pwr.c:91:6:HAL_PWR_DeInit 0 static 2 | stm32f0xx_hal_pwr.c:104:6:HAL_PWR_EnableBkUpAccess 0 static 3 | stm32f0xx_hal_pwr.c:116:6:HAL_PWR_DisableBkUpAccess 0 static 4 | stm32f0xx_hal_pwr.c:247:6:HAL_PWR_EnableWakeUpPin 0 static 5 | stm32f0xx_hal_pwr.c:262:6:HAL_PWR_DisableWakeUpPin 0 static 6 | stm32f0xx_hal_pwr.c:285:6:HAL_PWR_EnterSLEEPMode 0 static 7 | stm32f0xx_hal_pwr.c:328:6:HAL_PWR_EnterSTOPMode 8 static 8 | stm32f0xx_hal_pwr.c:383:6:HAL_PWR_EnterSTANDBYMode 0 static 9 | stm32f0xx_hal_pwr.c:407:6:HAL_PWR_EnableSleepOnExit 0 static 10 | stm32f0xx_hal_pwr.c:420:6:HAL_PWR_DisableSleepOnExit 0 static 11 | stm32f0xx_hal_pwr.c:434:6:HAL_PWR_EnableSEVOnPend 0 static 12 | stm32f0xx_hal_pwr.c:447:6:HAL_PWR_DisableSEVOnPend 0 static 13 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_pwr_ex.c:124:6:HAL_PWR_ConfigPVD 0 static 2 | stm32f0xx_hal_pwr_ex.c:166:6:HAL_PWR_EnablePVD 0 static 3 | stm32f0xx_hal_pwr_ex.c:175:6:HAL_PWR_DisablePVD 0 static 4 | stm32f0xx_hal_pwr_ex.c:202:13:HAL_PWR_PVDCallback 0 static 5 | stm32f0xx_hal_pwr_ex.c:185:6:HAL_PWR_PVD_IRQHandler 16 static 6 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_rcc.c:225:6:HAL_RCC_DeInit 0 static 2 | stm32f0xx_hal_rcc.c:269:19:HAL_RCC_OscConfig 40 static 3 | stm32f0xx_hal_rcc.c:725:19:HAL_RCC_ClockConfig 64 static 4 | stm32f0xx_hal_rcc.c:985:6:HAL_RCC_MCOConfig 40 static 5 | stm32f0xx_hal_rcc.c:1019:6:HAL_RCC_EnableCSS 0 static 6 | stm32f0xx_hal_rcc.c:1028:6:HAL_RCC_DisableCSS 0 static 7 | stm32f0xx_hal_rcc.c:1064:10:HAL_RCC_GetSysClockFreq 48 static 8 | stm32f0xx_hal_rcc.c:1139:10:HAL_RCC_GetHCLKFreq 0 static 9 | stm32f0xx_hal_rcc.c:1150:10:HAL_RCC_GetPCLK1Freq 0 static 10 | stm32f0xx_hal_rcc.c:1163:6:HAL_RCC_GetOscConfig 0 static 11 | stm32f0xx_hal_rcc.c:1265:6:HAL_RCC_GetClockConfig 8 static 12 | stm32f0xx_hal_rcc.c:1308:13:HAL_RCC_CSSCallback 0 static 13 | stm32f0xx_hal_rcc.c:1291:6:HAL_RCC_NMI_IRQHandler 8 static 14 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_rcc_ex.c:120:19:HAL_RCCEx_PeriphCLKConfig 40 static 2 | stm32f0xx_hal_rcc_ex.c:286:6:HAL_RCCEx_GetPeriphCLKConfig 0 static 3 | stm32f0xx_hal_rcc_ex.c:386:10:HAL_RCCEx_GetPeriphCLKFreq 8 static 4 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_tim.c:270:13:HAL_TIM_Base_MspInit 0 static 2 | stm32f0xx_hal_tim.c:203:19:HAL_TIM_Base_Init 8 static 3 | stm32f0xx_hal_tim.c:285:13:HAL_TIM_Base_MspDeInit 0 static 4 | stm32f0xx_hal_tim.c:243:19:HAL_TIM_Base_DeInit 8 static 5 | stm32f0xx_hal_tim.c:301:19:HAL_TIM_Base_Start 8 static 6 | stm32f0xx_hal_tim.c:324:19:HAL_TIM_Base_Stop 0 static 7 | stm32f0xx_hal_tim.c:347:19:HAL_TIM_Base_Start_IT 0 static 8 | stm32f0xx_hal_tim.c:367:19:HAL_TIM_Base_Stop_IT 0 static 9 | stm32f0xx_hal_tim.c:388:19:HAL_TIM_Base_Start_DMA 16 static 10 | stm32f0xx_hal_tim.c:432:19:HAL_TIM_Base_Stop_DMA 0 static 11 | stm32f0xx_hal_tim.c:548:13:HAL_TIM_OC_MspInit 0 static 12 | stm32f0xx_hal_tim.c:481:19:HAL_TIM_OC_Init 8 static 13 | stm32f0xx_hal_tim.c:563:13:HAL_TIM_OC_MspDeInit 0 static 14 | stm32f0xx_hal_tim.c:521:19:HAL_TIM_OC_DeInit 8 static 15 | stm32f0xx_hal_tim.c:584:19:HAL_TIM_OC_Start 0 static 16 | stm32f0xx_hal_tim.c:616:19:HAL_TIM_OC_Stop 0 static 17 | stm32f0xx_hal_tim.c:648:19:HAL_TIM_OC_Start_IT 0 static 18 | stm32f0xx_hal_tim.c:714:19:HAL_TIM_OC_Stop_IT 0 static 19 | stm32f0xx_hal_tim.c:782:19:HAL_TIM_OC_Start_DMA 16 static 20 | stm32f0xx_hal_tim.c:899:19:HAL_TIM_OC_Stop_DMA 8 static 21 | stm32f0xx_hal_tim.c:1055:13:HAL_TIM_PWM_MspInit 0 static 22 | stm32f0xx_hal_tim.c:988:19:HAL_TIM_PWM_Init 8 static 23 | stm32f0xx_hal_tim.c:1070:13:HAL_TIM_PWM_MspDeInit 0 static 24 | stm32f0xx_hal_tim.c:1028:19:HAL_TIM_PWM_DeInit 8 static 25 | stm32f0xx_hal_tim.c:1091:19:HAL_TIM_PWM_Start 0 static 26 | stm32f0xx_hal_tim.c:1123:19:HAL_TIM_PWM_Stop 8 static 27 | stm32f0xx_hal_tim.c:1158:19:HAL_TIM_PWM_Start_IT 0 static 28 | stm32f0xx_hal_tim.c:1224:19:HAL_TIM_PWM_Stop_IT 0 static 29 | stm32f0xx_hal_tim.c:1292:19:HAL_TIM_PWM_Start_DMA 16 static 30 | stm32f0xx_hal_tim.c:1409:19:HAL_TIM_PWM_Stop_DMA 8 static 31 | stm32f0xx_hal_tim.c:1565:13:HAL_TIM_IC_MspInit 0 static 32 | stm32f0xx_hal_tim.c:1498:19:HAL_TIM_IC_Init 8 static 33 | stm32f0xx_hal_tim.c:1580:13:HAL_TIM_IC_MspDeInit 0 static 34 | stm32f0xx_hal_tim.c:1538:19:HAL_TIM_IC_DeInit 8 static 35 | stm32f0xx_hal_tim.c:1601:19:HAL_TIM_IC_Start 0 static 36 | stm32f0xx_hal_tim.c:1627:19:HAL_TIM_IC_Stop 8 static 37 | stm32f0xx_hal_tim.c:1653:19:HAL_TIM_IC_Start_IT 0 static 38 | stm32f0xx_hal_tim.c:1712:19:HAL_TIM_IC_Stop_IT 8 static 39 | stm32f0xx_hal_tim.c:1774:19:HAL_TIM_IC_Start_DMA 16 static 40 | stm32f0xx_hal_tim.c:1887:19:HAL_TIM_IC_Stop_DMA 12 static 41 | stm32f0xx_hal_tim.c:2048:13:HAL_TIM_OnePulse_MspInit 0 static 42 | stm32f0xx_hal_tim.c:1974:19:HAL_TIM_OnePulse_Init 16 static 43 | stm32f0xx_hal_tim.c:2063:13:HAL_TIM_OnePulse_MspDeInit 0 static 44 | stm32f0xx_hal_tim.c:2021:19:HAL_TIM_OnePulse_DeInit 8 static 45 | stm32f0xx_hal_tim.c:2082:19:HAL_TIM_OnePulse_Start 0 static 46 | stm32f0xx_hal_tim.c:2115:19:HAL_TIM_OnePulse_Stop 0 static 47 | stm32f0xx_hal_tim.c:2148:19:HAL_TIM_OnePulse_Start_IT 0 static 48 | stm32f0xx_hal_tim.c:2187:19:HAL_TIM_OnePulse_Stop_IT 0 static 49 | stm32f0xx_hal_tim.c:2367:13:HAL_TIM_Encoder_MspInit 0 static 50 | stm32f0xx_hal_tim.c:2247:19:HAL_TIM_Encoder_Init 24 static 51 | stm32f0xx_hal_tim.c:2382:13:HAL_TIM_Encoder_MspDeInit 0 static 52 | stm32f0xx_hal_tim.c:2340:19:HAL_TIM_Encoder_DeInit 8 static 53 | stm32f0xx_hal_tim.c:2402:19:HAL_TIM_Encoder_Start 0 static 54 | stm32f0xx_hal_tim.c:2444:19:HAL_TIM_Encoder_Stop 0 static 55 | stm32f0xx_hal_tim.c:2488:19:HAL_TIM_Encoder_Start_IT 8 static 56 | stm32f0xx_hal_tim.c:2536:19:HAL_TIM_Encoder_Stop_IT 8 static 57 | stm32f0xx_hal_tim.c:2590:19:HAL_TIM_Encoder_Start_DMA 24 static 58 | stm32f0xx_hal_tim.c:2707:19:HAL_TIM_Encoder_Stop_DMA 0 static 59 | stm32f0xx_hal_tim.c:2932:19:HAL_TIM_OC_ConfigChannel 20 static 60 | stm32f0xx_hal_tim.c:3001:19:HAL_TIM_IC_ConfigChannel 28 static 61 | stm32f0xx_hal_tim.c:3097:19:HAL_TIM_PWM_ConfigChannel 20 static 62 | stm32f0xx_hal_tim.c:3197:19:HAL_TIM_OnePulse_ConfigChannel 56 static 63 | stm32f0xx_hal_tim.c:3333:19:HAL_TIM_DMABurst_WriteStart 16 static 64 | stm32f0xx_hal_tim.c:3379:19:HAL_TIM_DMABurst_MultiWriteStart 16 static 65 | stm32f0xx_hal_tim.c:3511:19:HAL_TIM_DMABurst_WriteStop 16 static 66 | stm32f0xx_hal_tim.c:3603:19:HAL_TIM_DMABurst_ReadStart 16 static 67 | stm32f0xx_hal_tim.c:3649:19:HAL_TIM_DMABurst_MultiReadStart 16 static 68 | stm32f0xx_hal_tim.c:3782:19:HAL_TIM_DMABurst_ReadStop 16 static 69 | stm32f0xx_hal_tim.c:3854:19:HAL_TIM_GenerateEvent 8 static 70 | stm32f0xx_hal_tim.c:3891:26:HAL_TIM_ConfigOCrefClear 16 static 71 | stm32f0xx_hal_tim.c:4019:19:HAL_TIM_ConfigClockSource 16 static 72 | stm32f0xx_hal_tim.c:4193:19:HAL_TIM_ConfigTI1Input 0 static 73 | stm32f0xx_hal_tim.c:4225:19:HAL_TIM_SlaveConfigSynchronization 16 static 74 | stm32f0xx_hal_tim.c:4260:19:HAL_TIM_SlaveConfigSynchronization_IT 16 static 75 | stm32f0xx_hal_tim.c:4298:10:HAL_TIM_ReadCapturedValue 0 static 76 | stm32f0xx_hal_tim.c:4385:13:HAL_TIM_PeriodElapsedCallback 0 static 77 | stm32f0xx_hal_tim.c:4644:13:TIM_DMAPeriodElapsedCplt 8 static 78 | stm32f0xx_hal_tim.c:4400:13:HAL_TIM_OC_DelayElapsedCallback 0 static 79 | stm32f0xx_hal_tim.c:4414:13:HAL_TIM_IC_CaptureCallback 0 static 80 | stm32f0xx_hal_tim.c:4611:6:TIM_DMACaptureCplt 8 static 81 | stm32f0xx_hal_tim.c:4429:13:HAL_TIM_PWM_PulseFinishedCallback 0 static 82 | stm32f0xx_hal_tim.c:4579:6:TIM_DMADelayPulseCplt 8 static 83 | stm32f0xx_hal_tim.c:4444:13:HAL_TIM_TriggerCallback 0 static 84 | stm32f0xx_hal_tim.c:2769:6:HAL_TIM_IRQHandler 8 static 85 | stm32f0xx_hal_tim.c:4658:13:TIM_DMATriggerCplt 8 static 86 | stm32f0xx_hal_tim.c:4459:13:HAL_TIM_ErrorCallback 0 static 87 | stm32f0xx_hal_tim.c:4565:6:TIM_DMAError 8 static 88 | stm32f0xx_hal_tim.c:4493:22:HAL_TIM_Base_GetState 0 static 89 | stm32f0xx_hal_tim.c:4503:22:HAL_TIM_OC_GetState 0 static 90 | stm32f0xx_hal_tim.c:4513:22:HAL_TIM_PWM_GetState 0 static 91 | stm32f0xx_hal_tim.c:4523:22:HAL_TIM_IC_GetState 0 static 92 | stm32f0xx_hal_tim.c:4533:22:HAL_TIM_OnePulse_GetState 0 static 93 | stm32f0xx_hal_tim.c:4543:22:HAL_TIM_Encoder_GetState 0 static 94 | stm32f0xx_hal_tim.c:4673:6:TIM_Base_SetConfig 0 static 95 | stm32f0xx_hal_tim.c:4795:6:TIM_OC2_SetConfig 16 static 96 | stm32f0xx_hal_tim.c:5141:6:TIM_TI1_SetConfig 20 static 97 | stm32f0xx_hal_tim.c:5435:6:TIM_ETR_SetConfig 12 static 98 | stm32f0xx_hal_tim.c:5465:6:TIM_CCxChannelCmd 8 static 99 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_tim_ex.c:264:13:HAL_TIMEx_HallSensor_MspInit 0 static 2 | stm32f0xx_hal_tim_ex.c:158:19:HAL_TIMEx_HallSensor_Init 64 static 3 | stm32f0xx_hal_tim_ex.c:279:13:HAL_TIMEx_HallSensor_MspDeInit 0 static 4 | stm32f0xx_hal_tim_ex.c:237:19:HAL_TIMEx_HallSensor_DeInit 8 static 5 | stm32f0xx_hal_tim_ex.c:294:19:HAL_TIMEx_HallSensor_Start 8 static 6 | stm32f0xx_hal_tim_ex.c:315:19:HAL_TIMEx_HallSensor_Stop 8 static 7 | stm32f0xx_hal_tim_ex.c:336:19:HAL_TIMEx_HallSensor_Start_IT 8 static 8 | stm32f0xx_hal_tim_ex.c:360:19:HAL_TIMEx_HallSensor_Stop_IT 8 static 9 | stm32f0xx_hal_tim_ex.c:386:19:HAL_TIMEx_HallSensor_Start_DMA 16 static 10 | stm32f0xx_hal_tim_ex.c:433:19:HAL_TIMEx_HallSensor_Stop_DMA 8 static 11 | stm32f0xx_hal_tim_ex.c:489:19:HAL_TIMEx_OCN_Start 0 static 12 | stm32f0xx_hal_tim_ex.c:519:19:HAL_TIMEx_OCN_Stop 0 static 13 | stm32f0xx_hal_tim_ex.c:549:19:HAL_TIMEx_OCN_Start_IT 0 static 14 | stm32f0xx_hal_tim_ex.c:616:19:HAL_TIMEx_OCN_Stop_IT 0 static 15 | stm32f0xx_hal_tim_ex.c:691:19:HAL_TIMEx_OCN_Start_DMA 16 static 16 | stm32f0xx_hal_tim_ex.c:806:19:HAL_TIMEx_OCN_Stop_DMA 8 static 17 | stm32f0xx_hal_tim_ex.c:906:19:HAL_TIMEx_PWMN_Start 0 static 18 | stm32f0xx_hal_tim_ex.c:935:19:HAL_TIMEx_PWMN_Stop 0 static 19 | stm32f0xx_hal_tim_ex.c:965:19:HAL_TIMEx_PWMN_Start_IT 0 static 20 | stm32f0xx_hal_tim_ex.c:1032:19:HAL_TIMEx_PWMN_Stop_IT 0 static 21 | stm32f0xx_hal_tim_ex.c:1107:19:HAL_TIMEx_PWMN_Start_DMA 16 static 22 | stm32f0xx_hal_tim_ex.c:1222:19:HAL_TIMEx_PWMN_Stop_DMA 8 static 23 | stm32f0xx_hal_tim_ex.c:1309:19:HAL_TIMEx_OnePulseN_Start 0 static 24 | stm32f0xx_hal_tim_ex.c:1334:19:HAL_TIMEx_OnePulseN_Stop 0 static 25 | stm32f0xx_hal_tim_ex.c:1363:19:HAL_TIMEx_OnePulseN_Start_IT 0 static 26 | stm32f0xx_hal_tim_ex.c:1394:19:HAL_TIMEx_OnePulseN_Stop_IT 0 static 27 | stm32f0xx_hal_tim_ex.c:1460:19:HAL_TIMEx_ConfigCommutationEvent 12 static 28 | stm32f0xx_hal_tim_ex.c:1509:19:HAL_TIMEx_ConfigCommutationEvent_IT 12 static 29 | stm32f0xx_hal_tim_ex.c:1562:19:HAL_TIMEx_ConfigCommutationEvent_DMA 12 static 30 | stm32f0xx_hal_tim_ex.c:1606:19:HAL_TIMEx_MasterConfigSynchronization 16 static 31 | stm32f0xx_hal_tim_ex.c:1642:19:HAL_TIMEx_ConfigBreakDeadTime 12 static 32 | stm32f0xx_hal_tim_ex.c:1696:19:HAL_TIMEx_RemapConfig 8 static 33 | stm32f0xx_hal_tim_ex.c:1894:13:HAL_TIMEx_CommutationCallback 0 static 34 | stm32f0xx_hal_tim_ex.c:1924:6:TIMEx_DMACommutationCplt 8 static 35 | stm32f0xx_hal_tim_ex.c:1909:13:HAL_TIMEx_BreakCallback 0 static 36 | stm32f0xx_hal_tim_ex.c:1957:22:HAL_TIMEx_HallSensor_GetState 0 static 37 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_ll_exti.c:96:10:LL_EXTI_DeInit 0 static 2 | stm32f0xx_ll_exti.c:129:10:LL_EXTI_Init 8 static 3 | stm32f0xx_ll_exti.c:210:6:LL_EXTI_StructInit 0 static 4 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_ll_gpio.c:111:13:LL_GPIO_DeInit 0 static 2 | stm32f0xx_ll_gpio.c:172:13:LL_GPIO_Init 36 static 3 | stm32f0xx_ll_gpio.c:248:6:LL_GPIO_StructInit 0 static 4 | -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.o -------------------------------------------------------------------------------- /Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_ll_utils.c:160:6:LL_Init1msTick 8 static 2 | stm32f0xx_ll_utils.c:176:6:LL_mDelay 8 static 3 | stm32f0xx_ll_utils.c:232:6:LL_SetSystemCoreClock 0 static 4 | stm32f0xx_ll_utils.c:255:13:LL_PLL_ConfigSystemClock_HSI 24 static 5 | stm32f0xx_ll_utils.c:380:13:LL_PLL_ConfigSystemClock_HSE 32 static 6 | -------------------------------------------------------------------------------- /Debug/Src/main.o: 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0 static 17 | main.c:373:6:allOff 0 static 18 | main.c:438:7:comStep 4 static 19 | main.c:490:6:fullBrake 0 static 20 | main.c:497:6:allpwm 0 static 21 | main.c:503:6:detectInput 40 static 22 | main.c:556:6:computeProshotDMA 32 static 23 | main.c:610:6:computeMSInput 8 static 24 | main.c:624:6:computeOS125Input 8 static 25 | main.c:638:6:computeOS42Input 8 static 26 | main.c:655:6:computeServoInput 8 static 27 | main.c:670:6:computeDshotDMA 80 static 28 | main.c:718:6:transferComplete 8 static 29 | main.c:772:6:playStartupTune 40 static 30 | main.c:787:6:playInputTune 40 static 31 | main.c:800:6:getBemfState 16 static 32 | main.c:838:6:maskPhaseInterrupts 0 static 33 | main.c:844:6:changeEXTI 8 static 34 | main.c:883:6:calculateOffset 0 static 35 | main.c:903:6:commutate 8 static 36 | main.c:936:6:interruptRoutine 24 static 37 | main.c:1000:6:advanceincrement 24 static 38 | main.c:1058:6:HAL_TIM_PeriodElapsedCallback 0 static 39 | main.c:1081:5:getAbsDif 0 static 40 | main.c:1126:6:startMotor 8 static 41 | main.c:1157:6:zcfoundroutine 16 static 42 | main.c:1565:6:SystemClock_Config 72 static 43 | main.c:1197:5:main 144 static 44 | main.c:1993:6:_Error_Handler 0 static 45 | -------------------------------------------------------------------------------- /Debug/Src/stm32f0xx_hal_msp.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Src/stm32f0xx_hal_msp.o -------------------------------------------------------------------------------- /Debug/Src/stm32f0xx_hal_msp.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_hal_msp.c:53:6:HAL_MspInit 16 static 2 | stm32f0xx_hal_msp.c:74:6:HAL_ADC_MspInit 24 static 3 | stm32f0xx_hal_msp.c:109:6:HAL_ADC_MspDeInit 8 static 4 | stm32f0xx_hal_msp.c:129:6:HAL_TIM_Base_MspInit 48 static 5 | stm32f0xx_hal_msp.c:214:6:HAL_TIM_MspPostInit 40 static 6 | stm32f0xx_hal_msp.c:253:6:HAL_TIM_Base_MspDeInit 8 static 7 | -------------------------------------------------------------------------------- /Debug/Src/stm32f0xx_it.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Src/stm32f0xx_it.o -------------------------------------------------------------------------------- /Debug/Src/stm32f0xx_it.su: -------------------------------------------------------------------------------- 1 | stm32f0xx_it.c:56:6:NMI_Handler 0 static 2 | stm32f0xx_it.c:69:6:HardFault_Handler 0 static 3 | stm32f0xx_it.c:85:6:SVC_Handler 0 static 4 | stm32f0xx_it.c:98:6:PendSV_Handler 0 static 5 | stm32f0xx_it.c:111:6:SysTick_Handler 8 static 6 | stm32f0xx_it.c:133:6:EXTI0_1_IRQHandler 8 static 7 | stm32f0xx_it.c:160:6:EXTI2_3_IRQHandler 8 static 8 | stm32f0xx_it.c:180:6:DMA1_Channel1_IRQHandler 8 static 9 | stm32f0xx_it.c:194:6:DMA1_Channel4_5_IRQHandler 8 static 10 | stm32f0xx_it.c:208:6:TIM2_IRQHandler 8 static 11 | stm32f0xx_it.c:222:6:TIM14_IRQHandler 8 static 12 | -------------------------------------------------------------------------------- /Debug/Src/system_stm32f0xx.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Debug/Src/system_stm32f0xx.o -------------------------------------------------------------------------------- /Debug/Src/system_stm32f0xx.su: -------------------------------------------------------------------------------- 1 | system_stm32f0xx.c:163:6:SystemInit 0 static 2 | system_stm32f0xx.c:260:6:SystemCoreClockUpdate 8 static 3 | -------------------------------------------------------------------------------- /Debug/Src/tune.o: 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https://raw.githubusercontent.com/AlkaMotors/STSPIN32F0-OpAmp-Interrupt-brushless-firmware/48b430594681db440c3ee74d8b26d8feabd8517a/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /** @addtogroup CMSIS 37 | * @{ 38 | */ 39 | 40 | /** @addtogroup stm32f0xx_system 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief Define to prevent recursive inclusion 46 | */ 47 | #ifndef __SYSTEM_STM32F0XX_H 48 | #define __SYSTEM_STM32F0XX_H 49 | 50 | #ifdef __cplusplus 51 | extern "C" { 52 | #endif 53 | 54 | /** @addtogroup STM32F0xx_System_Includes 55 | * @{ 56 | */ 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | 63 | /** @addtogroup STM32F0xx_System_Exported_types 64 | * @{ 65 | */ 66 | /* This variable is updated in three ways: 67 | 1) by calling CMSIS function SystemCoreClockUpdate() 68 | 3) by calling HAL API function HAL_RCC_GetHCLKFreq() 69 | 3) by calling HAL API function HAL_RCC_ClockConfig() 70 | Note: If you use this function to configure the system clock; then there 71 | is no need to call the 2 first functions listed above, since SystemCoreClock 72 | variable is updated automatically. 73 | */ 74 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 75 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 76 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F0xx_System_Exported_Constants 83 | * @{ 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** @addtogroup STM32F0xx_System_Exported_Macros 91 | * @{ 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** @addtogroup STM32F0xx_System_Exported_Functions 99 | * @{ 100 | */ 101 | 102 | extern void SystemInit(void); 103 | extern void SystemCoreClockUpdate(void); 104 | /** 105 | * @} 106 | */ 107 | 108 | #ifdef __cplusplus 109 | } 110 | #endif 111 | 112 | #endif /*__SYSTEM_STM32F0XX_H */ 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 122 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. October 2015 5 | * $Revision: V.1.4.5 a 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | /* extern const q31_t realCoefAQ31[1024]; */ 50 | /* extern const q31_t realCoefBQ31[1024]; */ 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmFunc.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmFunc.h 3 | * @brief CMSIS Cortex-M Core Function Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMFUNC_H 42 | #define __CORE_CMFUNC_H 43 | 44 | 45 | /* ########################### Core Function Access ########################### */ 46 | /** \ingroup CMSIS_Core_FunctionInterface 47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@} end of CMSIS_Core_RegAccFunctions */ 86 | 87 | #endif /* __CORE_CMFUNC_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmInstr.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmInstr.h 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMINSTR_H 42 | #define __CORE_CMINSTR_H 43 | 44 | 45 | /* ########################## Core Instruction Access ######################### */ 46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47 | Access to dedicated instructions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86 | 87 | #endif /* __CORE_CMINSTR_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmSimd.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmSimd.h 3 | * @brief CMSIS Cortex-M SIMD Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMSIMD_H 42 | #define __CORE_CMSIMD_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | 49 | /* ################### Compiler specific Intrinsics ########################### */ 50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 51 | Access to dedicated SIMD instructions 52 | @{ 53 | */ 54 | 55 | /*------------------ RealView Compiler -----------------*/ 56 | #if defined ( __CC_ARM ) 57 | #include "cmsis_armcc.h" 58 | 59 | /*------------------ ARM Compiler V6 -------------------*/ 60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 61 | #include "cmsis_armcc_V6.h" 62 | 63 | /*------------------ GNU Compiler ----------------------*/ 64 | #elif defined ( __GNUC__ ) 65 | #include "cmsis_gcc.h" 66 | 67 | /*------------------ ICC Compiler ----------------------*/ 68 | #elif defined ( __ICCARM__ ) 69 | #include 70 | 71 | /*------------------ TI CCS Compiler -------------------*/ 72 | #elif defined ( __TMS470__ ) 73 | #include 74 | 75 | /*------------------ TASKING Compiler ------------------*/ 76 | #elif defined ( __TASKING__ ) 77 | /* 78 | * The CMSIS functions have been implemented as intrinsics in the compiler. 79 | * Please use "carm -?i" to get an up to date list of all intrinsics, 80 | * Including the CMSIS ones. 81 | */ 82 | 83 | /*------------------ COSMIC Compiler -------------------*/ 84 | #elif defined ( __CSMC__ ) 85 | #include 86 | 87 | #endif 88 | 89 | /*@} end of group CMSIS_SIMD_intrinsics */ 90 | 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /* __CORE_CMSIMD_H */ 97 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_cortex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CORTEX HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F0xx_HAL_CORTEX_H 38 | #define __STM32F0xx_HAL_CORTEX_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f0xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F0xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CORTEX CORTEX 52 | * @{ 53 | */ 54 | /* Exported types ------------------------------------------------------------*/ 55 | /* Exported constants --------------------------------------------------------*/ 56 | 57 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants 58 | * @{ 59 | */ 60 | 61 | /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source 62 | * @{ 63 | */ 64 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 (0x00000000U) 65 | #define SYSTICK_CLKSOURCE_HCLK (0x00000004U) 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /* Exported Macros -----------------------------------------------------------*/ 76 | 77 | /* Exported functions --------------------------------------------------------*/ 78 | /** @addtogroup CORTEX_Exported_Functions CORTEX Exported Functions 79 | * @{ 80 | */ 81 | /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 82 | * @brief Initialization and Configuration functions 83 | * @{ 84 | */ 85 | /* Initialization and de-initialization functions *******************************/ 86 | void HAL_NVIC_SetPriority(IRQn_Type IRQn,uint32_t PreemptPriority, uint32_t SubPriority); 87 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); 88 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); 89 | void HAL_NVIC_SystemReset(void); 90 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions 96 | * @brief Cortex control functions 97 | * @{ 98 | */ 99 | 100 | /* Peripheral Control functions *************************************************/ 101 | uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn); 102 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); 103 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); 104 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); 105 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); 106 | void HAL_SYSTICK_IRQHandler(void); 107 | void HAL_SYSTICK_Callback(void); 108 | /** 109 | * @} 110 | */ 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /* Private types -------------------------------------------------------------*/ 117 | /* Private variables ---------------------------------------------------------*/ 118 | /* Private constants ---------------------------------------------------------*/ 119 | /* Private macros ------------------------------------------------------------*/ 120 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros 121 | * @{ 122 | */ 123 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x4) 124 | 125 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) 126 | 127 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ 128 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) 129 | /** 130 | * @} 131 | */ 132 | 133 | /** 134 | * @} 135 | */ 136 | 137 | /** 138 | * @} 139 | */ 140 | 141 | #ifdef __cplusplus 142 | } 143 | #endif 144 | 145 | #endif /* __STM32F0xx_HAL_CORTEX_H */ 146 | 147 | 148 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 149 | 150 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© COPYRIGHT(c) 2016 STMicroelectronics

11 | * 12 | * Redistribution and use in source and binary forms, with or without modification, 13 | * are permitted provided that the following conditions are met: 14 | * 1. Redistributions of source code must retain the above copyright notice, 15 | * this list of conditions and the following disclaimer. 16 | * 2. Redistributions in binary form must reproduce the above copyright notice, 17 | * this list of conditions and the following disclaimer in the documentation 18 | * and/or other materials provided with the distribution. 19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 20 | * may be used to endorse or promote products derived from this software 21 | * without specific prior written permission. 22 | * 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 | * 34 | ****************************************************************************** 35 | */ 36 | 37 | /* Define to prevent recursive inclusion -------------------------------------*/ 38 | #ifndef __STM32F0xx_HAL_DEF 39 | #define __STM32F0xx_HAL_DEF 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif 44 | 45 | /* Includes ------------------------------------------------------------------*/ 46 | #include "stm32f0xx.h" 47 | #if defined(USE_HAL_LEGACY) 48 | #include "Legacy/stm32_hal_legacy.h" 49 | #endif 50 | #include 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | 54 | /** 55 | * @brief HAL Status structures definition 56 | */ 57 | typedef enum 58 | { 59 | HAL_OK = 0x00U, 60 | HAL_ERROR = 0x01U, 61 | HAL_BUSY = 0x02U, 62 | HAL_TIMEOUT = 0x03U 63 | } HAL_StatusTypeDef; 64 | 65 | /** 66 | * @brief HAL Lock structures definition 67 | */ 68 | typedef enum 69 | { 70 | HAL_UNLOCKED = 0x00U, 71 | HAL_LOCKED = 0x01U 72 | } HAL_LockTypeDef; 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | 76 | #define HAL_MAX_DELAY 0xFFFFFFFFU 77 | 78 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) 79 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) 80 | 81 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \ 82 | do{ \ 83 | (__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \ 84 | (__DMA_HANDLE_).Parent = (__HANDLE__); \ 85 | } while(0) 86 | 87 | #define UNUSED(x) ((void)(x)) 88 | 89 | /** @brief Reset the Handle's State field. 90 | * @param __HANDLE__ specifies the Peripheral Handle. 91 | * @note This macro can be used for the following purpose: 92 | * - When the Handle is declared as local variable; before passing it as parameter 93 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 94 | * to set to 0 the Handle's "State" field. 95 | * Otherwise, "State" field may have any random value and the first time the function 96 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 97 | * (i.e. HAL_PPP_MspInit() will not be executed). 98 | * - When there is a need to reconfigure the low level hardware: instead of calling 99 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 100 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 101 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 102 | * @retval None 103 | */ 104 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) 105 | 106 | #if (USE_RTOS == 1) 107 | #error " USE_RTOS should be 0 in the current HAL release " 108 | #else 109 | #define __HAL_LOCK(__HANDLE__) \ 110 | do{ \ 111 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 112 | { \ 113 | return HAL_BUSY; \ 114 | } \ 115 | else \ 116 | { \ 117 | (__HANDLE__)->Lock = HAL_LOCKED; \ 118 | } \ 119 | }while (0) 120 | 121 | #define __HAL_UNLOCK(__HANDLE__) \ 122 | do{ \ 123 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 124 | }while (0) 125 | #endif /* USE_RTOS */ 126 | 127 | #if defined ( __GNUC__ ) 128 | #ifndef __weak 129 | #define __weak __attribute__((weak)) 130 | #endif /* __weak */ 131 | #ifndef __packed 132 | #define __packed __attribute__((__packed__)) 133 | #endif /* __packed */ 134 | #endif /* __GNUC__ */ 135 | 136 | 137 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 138 | #if defined (__GNUC__) /* GNU Compiler */ 139 | #ifndef __ALIGN_END 140 | #define __ALIGN_END __attribute__ ((aligned (4))) 141 | #endif /* __ALIGN_END */ 142 | #ifndef __ALIGN_BEGIN 143 | #define __ALIGN_BEGIN 144 | #endif /* __ALIGN_BEGIN */ 145 | #else 146 | #ifndef __ALIGN_END 147 | #define __ALIGN_END 148 | #endif /* __ALIGN_END */ 149 | #ifndef __ALIGN_BEGIN 150 | #if defined (__CC_ARM) /* ARM Compiler */ 151 | #define __ALIGN_BEGIN __align(4) 152 | #elif defined (__ICCARM__) /* IAR Compiler */ 153 | #define __ALIGN_BEGIN 154 | #endif /* __CC_ARM */ 155 | #endif /* __ALIGN_BEGIN */ 156 | #endif /* __GNUC__ */ 157 | 158 | /** 159 | * @brief __NOINLINE definition 160 | */ 161 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 162 | /* ARM & GNUCompiler 163 | ---------------- 164 | */ 165 | #define __NOINLINE __attribute__ ( (noinline) ) 166 | 167 | #elif defined ( __ICCARM__ ) 168 | /* ICCARM Compiler 169 | --------------- 170 | */ 171 | #define __NOINLINE _Pragma("optimize = no_inline") 172 | 173 | #endif 174 | 175 | #ifdef __cplusplus 176 | } 177 | #endif 178 | 179 | #endif /* ___STM32F0xx_HAL_DEF */ 180 | 181 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 182 | 183 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F0xx_HAL_I2C_EX_H 38 | #define __STM32F0xx_HAL_I2C_EX_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f0xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F0xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup I2CEx 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | /* Exported constants --------------------------------------------------------*/ 57 | 58 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 59 | * @{ 60 | */ 61 | 62 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 63 | * @{ 64 | */ 65 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 66 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 67 | /** 68 | * @} 69 | */ 70 | 71 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 72 | * @{ 73 | */ 74 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 75 | #if defined(SYSCFG_CFGR1_I2C_FMP_PA9) 76 | #define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /*!< Enable Fast Mode Plus on PA9 */ 77 | #define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_FMP_PA10 /*!< Enable Fast Mode Plus on PA10 */ 78 | #else 79 | #define I2C_FASTMODEPLUS_PA9 (uint32_t)(0x00000001U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA9 not supported */ 80 | #define I2C_FASTMODEPLUS_PA10 (uint32_t)(0x00000002U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA10 not supported */ 81 | #endif 82 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /*!< Enable Fast Mode Plus on PB6 */ 83 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /*!< Enable Fast Mode Plus on PB7 */ 84 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /*!< Enable Fast Mode Plus on PB8 */ 85 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /*!< Enable Fast Mode Plus on PB9 */ 86 | #if defined(SYSCFG_CFGR1_I2C_FMP_I2C1) 87 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /*!< Enable Fast Mode Plus on I2C1 pins */ 88 | #else 89 | #define I2C_FASTMODEPLUS_I2C1 (uint32_t)(0x00000100U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C1 not supported */ 90 | #endif 91 | #if defined(SYSCFG_CFGR1_I2C_FMP_I2C2) 92 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /*!< Enable Fast Mode Plus on I2C2 pins */ 93 | #else 94 | #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ 95 | #endif 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /* Exported macro ------------------------------------------------------------*/ 105 | /* Exported functions --------------------------------------------------------*/ 106 | 107 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 108 | * @{ 109 | */ 110 | 111 | /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions 112 | * @brief Extended features functions 113 | * @{ 114 | */ 115 | 116 | /* Peripheral Control functions ************************************************/ 117 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); 118 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); 119 | #if defined(I2C_CR1_WUPEN) 120 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 121 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 122 | #endif 123 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 124 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 125 | 126 | /* Private constants ---------------------------------------------------------*/ 127 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 128 | * @{ 129 | */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /* Private macros ------------------------------------------------------------*/ 136 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 137 | * @{ 138 | */ 139 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 140 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 141 | 142 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 143 | 144 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 145 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \ 146 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \ 147 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 148 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 149 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 150 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 151 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2))) 153 | /** 154 | * @} 155 | */ 156 | 157 | /* Private Functions ---------------------------------------------------------*/ 158 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 159 | * @{ 160 | */ 161 | /* Private functions are defined in stm32f0xx_hal_i2c_ex.c file */ 162 | /** 163 | * @} 164 | */ 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | #ifdef __cplusplus 183 | } 184 | #endif 185 | 186 | #endif /* __STM32F0xx_HAL_I2C_EX_H */ 187 | 188 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 189 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F0xx_HAL_IWDG_H 38 | #define __STM32F0xx_HAL_IWDG_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f0xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F0xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @defgroup IWDG IWDG 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @brief IWDG Init structure definition 62 | */ 63 | typedef struct 64 | { 65 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 66 | This parameter can be a value of @ref IWDG_Prescaler */ 67 | 68 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 69 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 70 | 71 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. 72 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 73 | 74 | } IWDG_InitTypeDef; 75 | 76 | /** 77 | * @brief IWDG Handle Structure definition 78 | */ 79 | typedef struct 80 | { 81 | IWDG_TypeDef *Instance; /*!< Register base address */ 82 | 83 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 84 | 85 | }IWDG_HandleTypeDef; 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /* Exported constants --------------------------------------------------------*/ 92 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 93 | * @{ 94 | */ 95 | 96 | /** @defgroup IWDG_Prescaler IWDG Prescaler 97 | * @{ 98 | */ 99 | #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ 100 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 101 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 102 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 103 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 104 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 105 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @defgroup IWDG_Window_option IWDG Window option 111 | * @{ 112 | */ 113 | #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /* Exported macros -----------------------------------------------------------*/ 123 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 124 | * @{ 125 | */ 126 | 127 | /** 128 | * @brief Enable the IWDG peripheral. 129 | * @param __HANDLE__ IWDG handle 130 | * @retval None 131 | */ 132 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 133 | 134 | /** 135 | * @brief Reload IWDG counter with value defined in the reload register 136 | * (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled). 137 | * @param __HANDLE__ IWDG handle 138 | * @retval None 139 | */ 140 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /* Exported functions --------------------------------------------------------*/ 147 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 148 | * @{ 149 | */ 150 | 151 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 152 | * @{ 153 | */ 154 | /* Initialization/Start functions ********************************************/ 155 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 156 | /** 157 | * @} 158 | */ 159 | 160 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 161 | * @{ 162 | */ 163 | /* I/O operation functions ****************************************************/ 164 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /* Private constants ---------------------------------------------------------*/ 174 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 175 | * @{ 176 | */ 177 | 178 | /** 179 | * @brief IWDG Key Register BitMask 180 | */ 181 | #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 182 | #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 183 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 184 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /* Private macros ------------------------------------------------------------*/ 191 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 192 | * @{ 193 | */ 194 | 195 | /** 196 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 197 | * @param __HANDLE__ IWDG handle 198 | * @retval None 199 | */ 200 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 201 | 202 | /** 203 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 204 | * @param __HANDLE__ IWDG handle 205 | * @retval None 206 | */ 207 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 208 | 209 | /** 210 | * @brief Check IWDG prescaler value. 211 | * @param __PRESCALER__ IWDG prescaler value 212 | * @retval None 213 | */ 214 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 215 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 216 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 217 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 218 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 219 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 220 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 221 | 222 | /** 223 | * @brief Check IWDG reload value. 224 | * @param __RELOAD__ IWDG reload value 225 | * @retval None 226 | */ 227 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 228 | 229 | /** 230 | * @brief Check IWDG window value. 231 | * @param __WINDOW__ IWDG window value 232 | * @retval None 233 | */ 234 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) 235 | 236 | /** 237 | * @} 238 | */ 239 | 240 | /** 241 | * @} 242 | */ 243 | 244 | /** 245 | * @} 246 | */ 247 | 248 | 249 | #ifdef __cplusplus 250 | } 251 | #endif 252 | 253 | #endif /* __STM32F0xx_HAL_IWDG_H */ 254 | 255 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 256 | 257 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr.h 4 | * @author MCD Application Team 5 | * @brief Header file of PWR HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F0xx_HAL_PWR_H 38 | #define __STM32F0xx_HAL_PWR_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f0xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F0xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup PWR PWR 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | /* Exported constants --------------------------------------------------------*/ 57 | 58 | /** @defgroup PWR_Exported_Constants PWR Exported Constants 59 | * @{ 60 | */ 61 | 62 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode 63 | * @{ 64 | */ 65 | #define PWR_MAINREGULATOR_ON (0x00000000U) 66 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 67 | 68 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 69 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 75 | * @{ 76 | */ 77 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U) 78 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U) 79 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 85 | * @{ 86 | */ 87 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01U) 88 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02U) 89 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 90 | /** 91 | * @} 92 | */ 93 | 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Exported macro ------------------------------------------------------------*/ 100 | /** @defgroup PWR_Exported_Macro PWR Exported Macro 101 | * @{ 102 | */ 103 | 104 | /** @brief Check PWR flag is set or not. 105 | * @param __FLAG__ specifies the flag to check. 106 | * This parameter can be one of the following values: 107 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 108 | * was received from the WKUP pin or from the RTC alarm (Alarm A), 109 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 110 | * An additional wakeup event is detected if the WKUP pin is enabled 111 | * (by setting the EWUP bit) when the WKUP pin level is already high. 112 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 113 | * resumed from StandBy mode. 114 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 115 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 116 | * For this reason, this bit is equal to 0 after Standby or reset 117 | * until the PVDE bit is set. 118 | * Warning: this Flag is not available on STM32F030x8 products 119 | * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference 120 | * voltage VREFINT is ready. 121 | * Warning: this Flag is not available on STM32F030x8 products 122 | * @retval The new state of __FLAG__ (TRUE or FALSE). 123 | */ 124 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 125 | 126 | /** @brief Clear the PWR's pending flags. 127 | * @param __FLAG__ specifies the flag to clear. 128 | * This parameter can be one of the following values: 129 | * @arg PWR_FLAG_WU: Wake Up flag 130 | * @arg PWR_FLAG_SB: StandBy flag 131 | */ 132 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 133 | 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /* Include PWR HAL Extension module */ 140 | #include "stm32f0xx_hal_pwr_ex.h" 141 | 142 | /* Exported functions --------------------------------------------------------*/ 143 | 144 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions 145 | * @{ 146 | */ 147 | 148 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 149 | * @{ 150 | */ 151 | 152 | /* Initialization and de-initialization functions *****************************/ 153 | void HAL_PWR_DeInit(void); 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 160 | * @{ 161 | */ 162 | 163 | /* Peripheral Control functions **********************************************/ 164 | void HAL_PWR_EnableBkUpAccess(void); 165 | void HAL_PWR_DisableBkUpAccess(void); 166 | 167 | /* WakeUp pins configuration functions ****************************************/ 168 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 169 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 170 | 171 | /* Low Power modes configuration functions ************************************/ 172 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 173 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 174 | void HAL_PWR_EnterSTANDBYMode(void); 175 | 176 | void HAL_PWR_EnableSleepOnExit(void); 177 | void HAL_PWR_DisableSleepOnExit(void); 178 | void HAL_PWR_EnableSEVOnPend(void); 179 | void HAL_PWR_DisableSEVOnPend(void); 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | /** 190 | * @} 191 | */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | #ifdef __cplusplus 198 | } 199 | #endif 200 | 201 | 202 | #endif /* __STM32F0xx_HAL_PWR_H */ 203 | 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 205 | 206 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_utils.h 4 | * @author MCD Application Team 5 | * @brief Header file of UTILS LL module. 6 | @verbatim 7 | ============================================================================== 8 | ##### How to use this driver ##### 9 | ============================================================================== 10 | [..] 11 | The LL UTILS driver contains a set of generic APIs that can be 12 | used by user: 13 | (+) Device electronic signature 14 | (+) Timing functions 15 | (+) PLL configuration functions 16 | 17 | @endverbatim 18 | ****************************************************************************** 19 | * @attention 20 | * 21 | *

© COPYRIGHT(c) 2016 STMicroelectronics

22 | * 23 | * Redistribution and use in source and binary forms, with or without modification, 24 | * are permitted provided that the following conditions are met: 25 | * 1. Redistributions of source code must retain the above copyright notice, 26 | * this list of conditions and the following disclaimer. 27 | * 2. Redistributions in binary form must reproduce the above copyright notice, 28 | * this list of conditions and the following disclaimer in the documentation 29 | * and/or other materials provided with the distribution. 30 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 31 | * may be used to endorse or promote products derived from this software 32 | * without specific prior written permission. 33 | * 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 35 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 36 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 37 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 38 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 39 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 40 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 41 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 42 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 43 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 44 | * 45 | ****************************************************************************** 46 | */ 47 | 48 | /* Define to prevent recursive inclusion -------------------------------------*/ 49 | #ifndef __STM32F0xx_LL_UTILS_H 50 | #define __STM32F0xx_LL_UTILS_H 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif 55 | 56 | /* Includes ------------------------------------------------------------------*/ 57 | #include "stm32f0xx.h" 58 | 59 | /** @addtogroup STM32F0xx_LL_Driver 60 | * @{ 61 | */ 62 | 63 | /** @defgroup UTILS_LL UTILS 64 | * @{ 65 | */ 66 | 67 | /* Private types -------------------------------------------------------------*/ 68 | /* Private variables ---------------------------------------------------------*/ 69 | 70 | /* Private constants ---------------------------------------------------------*/ 71 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants 72 | * @{ 73 | */ 74 | 75 | /* Max delay can be used in LL_mDelay */ 76 | #define LL_MAX_DELAY 0xFFFFFFFFU 77 | 78 | /** 79 | * @brief Unique device ID register base address 80 | */ 81 | #define UID_BASE_ADDRESS UID_BASE 82 | 83 | /** 84 | * @brief Flash size data register base address 85 | */ 86 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | /* Private macros ------------------------------------------------------------*/ 93 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros 94 | * @{ 95 | */ 96 | /** 97 | * @} 98 | */ 99 | /* Exported types ------------------------------------------------------------*/ 100 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures 101 | * @{ 102 | */ 103 | /** 104 | * @brief UTILS PLL structure definition 105 | */ 106 | typedef struct 107 | { 108 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. 109 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL 110 | 111 | This feature can be modified afterwards using unitary function 112 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 113 | 114 | #if defined(RCC_PLLSRC_PREDIV1_SUPPORT) 115 | uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock. 116 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 117 | 118 | This feature can be modified afterwards using unitary function 119 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 120 | #else 121 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. 122 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 123 | 124 | This feature can be modified afterwards using unitary function 125 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 126 | #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ 127 | } LL_UTILS_PLLInitTypeDef; 128 | 129 | /** 130 | * @brief UTILS System, AHB and APB buses clock configuration structure definition 131 | */ 132 | typedef struct 133 | { 134 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). 135 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV 136 | 137 | This feature can be modified afterwards using unitary function 138 | @ref LL_RCC_SetAHBPrescaler(). */ 139 | 140 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). 141 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV 142 | 143 | This feature can be modified afterwards using unitary function 144 | @ref LL_RCC_SetAPB1Prescaler(). */ 145 | } LL_UTILS_ClkInitTypeDef; 146 | 147 | /** 148 | * @} 149 | */ 150 | 151 | /* Exported constants --------------------------------------------------------*/ 152 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants 153 | * @{ 154 | */ 155 | 156 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation 157 | * @{ 158 | */ 159 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ 160 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ 161 | /** 162 | * @} 163 | */ 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /* Exported macro ------------------------------------------------------------*/ 170 | 171 | /* Exported functions --------------------------------------------------------*/ 172 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions 173 | * @{ 174 | */ 175 | 176 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE 177 | * @{ 178 | */ 179 | 180 | /** 181 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) 182 | * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format 183 | */ 184 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) 185 | { 186 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); 187 | } 188 | 189 | /** 190 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) 191 | * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) 192 | */ 193 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) 194 | { 195 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); 196 | } 197 | 198 | /** 199 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) 200 | * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] 201 | */ 202 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) 203 | { 204 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); 205 | } 206 | 207 | /** 208 | * @brief Get Flash memory size 209 | * @note This bitfield indicates the size of the device Flash memory expressed in 210 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. 211 | * @retval FLASH_SIZE[15:0]: Flash memory size 212 | */ 213 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) 214 | { 215 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); 216 | } 217 | 218 | 219 | /** 220 | * @} 221 | */ 222 | 223 | /** @defgroup UTILS_LL_EF_DELAY DELAY 224 | * @{ 225 | */ 226 | 227 | /** 228 | * @brief This function configures the Cortex-M SysTick source of the time base. 229 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) 230 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick 231 | * configuration by calling this function, for a delay use rather osDelay RTOS service. 232 | * @param Ticks Number of ticks 233 | * @retval None 234 | */ 235 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) 236 | { 237 | /* Configure the SysTick to have interrupt in 1ms time base */ 238 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ 239 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 240 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 241 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ 242 | } 243 | 244 | void LL_Init1msTick(uint32_t HCLKFrequency); 245 | void LL_mDelay(uint32_t Delay); 246 | 247 | /** 248 | * @} 249 | */ 250 | 251 | /** @defgroup UTILS_EF_SYSTEM SYSTEM 252 | * @{ 253 | */ 254 | 255 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); 256 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 257 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 258 | #if defined(RCC_CFGR_SW_HSI48) 259 | ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 260 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 261 | #endif /*RCC_CFGR_SW_HSI48*/ 262 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, 263 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | /** 270 | * @} 271 | */ 272 | 273 | /** 274 | * @} 275 | */ 276 | 277 | /** 278 | * @} 279 | */ 280 | 281 | #ifdef __cplusplus 282 | } 283 | #endif 284 | 285 | #endif /* __STM32F0xx_LL_UTILS_H */ 286 | 287 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 288 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_adc_ex.c 4 | * @author MCD Application Team 5 | * @brief This file provides firmware functions to manage the following 6 | * functionalities of the Analog to Digital Convertor (ADC) 7 | * peripheral: 8 | * + Operation functions 9 | * ++ Calibration (ADC automatic self-calibration) 10 | * Other functions (generic functions) are available in file 11 | * "stm32f0xx_hal_adc.c". 12 | * 13 | @verbatim 14 | [..] 15 | (@) Sections "ADC peripheral features" and "How to use this driver" are 16 | available in file of generic functions "stm32l1xx_hal_adc.c". 17 | [..] 18 | @endverbatim 19 | ****************************************************************************** 20 | * @attention 21 | * 22 | *

© COPYRIGHT(c) 2016 STMicroelectronics

23 | * 24 | * Redistribution and use in source and binary forms, with or without modification, 25 | * are permitted provided that the following conditions are met: 26 | * 1. Redistributions of source code must retain the above copyright notice, 27 | * this list of conditions and the following disclaimer. 28 | * 2. Redistributions in binary form must reproduce the above copyright notice, 29 | * this list of conditions and the following disclaimer in the documentation 30 | * and/or other materials provided with the distribution. 31 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 32 | * may be used to endorse or promote products derived from this software 33 | * without specific prior written permission. 34 | * 35 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 36 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 37 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 38 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 39 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 40 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 41 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 42 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 43 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 | * 46 | ****************************************************************************** 47 | */ 48 | 49 | /* Includes ------------------------------------------------------------------*/ 50 | #include "stm32f0xx_hal.h" 51 | 52 | /** @addtogroup STM32F0xx_HAL_Driver 53 | * @{ 54 | */ 55 | 56 | /** @defgroup ADCEx ADCEx 57 | * @brief ADC HAL module driver 58 | * @{ 59 | */ 60 | 61 | #ifdef HAL_ADC_MODULE_ENABLED 62 | 63 | /* Private typedef -----------------------------------------------------------*/ 64 | /* Private define ------------------------------------------------------------*/ 65 | /** @defgroup ADCEx_Private_Constants ADCEx Private Constants 66 | * @{ 67 | */ 68 | 69 | /* Fixed timeout values for ADC calibration, enable settling time, disable */ 70 | /* settling time. */ 71 | /* Values defined to be higher than worst cases: low clock frequency, */ 72 | /* maximum prescaler. */ 73 | /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ 74 | /* prescaler 4. */ 75 | /* Unit: ms */ 76 | #define ADC_DISABLE_TIMEOUT 2 77 | #define ADC_CALIBRATION_TIMEOUT 2U 78 | /** 79 | * @} 80 | */ 81 | 82 | /* Private macros -------------------------------------------------------------*/ 83 | /* Private variables ---------------------------------------------------------*/ 84 | /* Private function prototypes -----------------------------------------------*/ 85 | /* Private functions ---------------------------------------------------------*/ 86 | 87 | /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions 88 | * @{ 89 | */ 90 | 91 | /** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 92 | * @brief Extended Initialization and Configuration functions 93 | * 94 | @verbatim 95 | =============================================================================== 96 | ##### IO operation functions ##### 97 | =============================================================================== 98 | [..] This section provides functions allowing to: 99 | (+) Perform the ADC calibration. 100 | @endverbatim 101 | * @{ 102 | */ 103 | 104 | /** 105 | * @brief Perform an ADC automatic self-calibration 106 | * Calibration prerequisite: ADC must be disabled (execute this 107 | * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). 108 | * @note Calibration factor can be read after calibration, using function 109 | * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). 110 | * @param hadc ADC handle 111 | * @retval HAL status 112 | */ 113 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) 114 | { 115 | HAL_StatusTypeDef tmp_hal_status = HAL_OK; 116 | uint32_t tickstart = 0U; 117 | uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because register read is already declared as volatile */ 118 | 119 | /* Check the parameters */ 120 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 121 | 122 | /* Process locked */ 123 | __HAL_LOCK(hadc); 124 | 125 | /* Calibration prerequisite: ADC must be disabled. */ 126 | if (ADC_IS_ENABLE(hadc) == RESET) 127 | { 128 | /* Set ADC state */ 129 | ADC_STATE_CLR_SET(hadc->State, 130 | HAL_ADC_STATE_REG_BUSY, 131 | HAL_ADC_STATE_BUSY_INTERNAL); 132 | 133 | /* Disable ADC DMA transfer request during calibration */ 134 | /* Note: Specificity of this STM32 serie: Calibration factor is */ 135 | /* available in data register and also transfered by DMA. */ 136 | /* To not insert ADC calibration factor among ADC conversion data */ 137 | /* in array variable, DMA transfer must be disabled during */ 138 | /* calibration. */ 139 | backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); 140 | CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); 141 | 142 | /* Start ADC calibration */ 143 | hadc->Instance->CR |= ADC_CR_ADCAL; 144 | 145 | tickstart = HAL_GetTick(); 146 | 147 | /* Wait for calibration completion */ 148 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) 149 | { 150 | if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 151 | { 152 | /* Update ADC state machine to error */ 153 | ADC_STATE_CLR_SET(hadc->State, 154 | HAL_ADC_STATE_BUSY_INTERNAL, 155 | HAL_ADC_STATE_ERROR_INTERNAL); 156 | 157 | /* Process unlocked */ 158 | __HAL_UNLOCK(hadc); 159 | 160 | return HAL_ERROR; 161 | } 162 | } 163 | 164 | /* Restore ADC DMA transfer request after calibration */ 165 | SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); 166 | 167 | /* Set ADC state */ 168 | ADC_STATE_CLR_SET(hadc->State, 169 | HAL_ADC_STATE_BUSY_INTERNAL, 170 | HAL_ADC_STATE_READY); 171 | } 172 | else 173 | { 174 | /* Update ADC state machine to error */ 175 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 176 | 177 | tmp_hal_status = HAL_ERROR; 178 | } 179 | 180 | /* Process unlocked */ 181 | __HAL_UNLOCK(hadc); 182 | 183 | /* Return function status */ 184 | return tmp_hal_status; 185 | } 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | #endif /* HAL_ADC_MODULE_ENABLED */ 196 | /** 197 | * @} 198 | */ 199 | 200 | /** 201 | * @} 202 | */ 203 | 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 205 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended PWR HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Power Controller (PWR) peripheral: 8 | * + Extended Initialization and de-initialization functions 9 | * + Extended Peripheral Control functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | *

© COPYRIGHT(c) 2016 STMicroelectronics

15 | * 16 | * Redistribution and use in source and binary forms, with or without modification, 17 | * are permitted provided that the following conditions are met: 18 | * 1. Redistributions of source code must retain the above copyright notice, 19 | * this list of conditions and the following disclaimer. 20 | * 2. Redistributions in binary form must reproduce the above copyright notice, 21 | * this list of conditions and the following disclaimer in the documentation 22 | * and/or other materials provided with the distribution. 23 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 24 | * may be used to endorse or promote products derived from this software 25 | * without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 30 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 35 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 | * 38 | ****************************************************************************** 39 | */ 40 | 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "stm32f0xx_hal.h" 43 | 44 | /** @addtogroup STM32F0xx_HAL_Driver 45 | * @{ 46 | */ 47 | 48 | /** @defgroup PWREx PWREx 49 | * @brief PWREx HAL module driver 50 | * @{ 51 | */ 52 | 53 | #ifdef HAL_PWR_MODULE_ENABLED 54 | 55 | /* Private typedef -----------------------------------------------------------*/ 56 | /* Private define ------------------------------------------------------------*/ 57 | /** @defgroup PWREx_Private_Constants PWREx Private Constants 58 | * @{ 59 | */ 60 | #define PVD_MODE_IT (0x00010000U) 61 | #define PVD_MODE_EVT (0x00020000U) 62 | #define PVD_RISING_EDGE (0x00000001U) 63 | #define PVD_FALLING_EDGE (0x00000002U) 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Private macro -------------------------------------------------------------*/ 69 | /* Private variables ---------------------------------------------------------*/ 70 | /* Private function prototypes -----------------------------------------------*/ 71 | /* Exported functions ---------------------------------------------------------*/ 72 | 73 | /** @defgroup PWREx_Exported_Functions PWREx Exported Functions 74 | * @{ 75 | */ 76 | 77 | /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions 78 | * @brief Extended Peripheral Control functions 79 | * 80 | @verbatim 81 | 82 | =============================================================================== 83 | ##### Peripheral extended control functions ##### 84 | =============================================================================== 85 | 86 | *** PVD configuration *** 87 | ========================= 88 | [..] 89 | (+) The PVD is used to monitor the VDD power supply by comparing it to a 90 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). 91 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 92 | than the PVD threshold. This event is internally connected to the EXTI 93 | line16 and can generate an interrupt if enabled. This is done through 94 | HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. 95 | (+) The PVD is stopped in Standby mode. 96 | -@- PVD is not available on STM32F030x4/x6/x8 97 | 98 | *** VDDIO2 Monitor Configuration *** 99 | ==================================== 100 | [..] 101 | (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it 102 | to VREFInt Voltage 103 | (+) This monitor is internally connected to the EXTI line31 104 | and can generate an interrupt if enabled. This is done through 105 | HAL_PWREx_EnableVddio2Monitor() function. 106 | -@- VDDIO2 is available on STM32F07x/09x/04x 107 | 108 | @endverbatim 109 | * @{ 110 | */ 111 | 112 | #if defined (STM32F031x6) || defined (STM32F051x8) || \ 113 | defined (STM32F071xB) || defined (STM32F091xC) || \ 114 | defined (STM32F042x6) || defined (STM32F072xB) 115 | /** 116 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 117 | * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration 118 | * information for the PVD. 119 | * @note Refer to the electrical characteristics of your device datasheet for 120 | * more details about the voltage threshold corresponding to each 121 | * detection level. 122 | * @retval None 123 | */ 124 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) 125 | { 126 | /* Check the parameters */ 127 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); 128 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); 129 | 130 | /* Set PLS[7:5] bits according to PVDLevel value */ 131 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); 132 | 133 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 134 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); 135 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); 136 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 137 | 138 | /* Configure interrupt mode */ 139 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) 140 | { 141 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); 142 | } 143 | 144 | /* Configure event mode */ 145 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) 146 | { 147 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); 148 | } 149 | 150 | /* Configure the edge */ 151 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) 152 | { 153 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); 154 | } 155 | 156 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) 157 | { 158 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 159 | } 160 | } 161 | 162 | /** 163 | * @brief Enables the Power Voltage Detector(PVD). 164 | * @retval None 165 | */ 166 | void HAL_PWR_EnablePVD(void) 167 | { 168 | PWR->CR |= (uint32_t)PWR_CR_PVDE; 169 | } 170 | 171 | /** 172 | * @brief Disables the Power Voltage Detector(PVD). 173 | * @retval None 174 | */ 175 | void HAL_PWR_DisablePVD(void) 176 | { 177 | PWR->CR &= ~((uint32_t)PWR_CR_PVDE); 178 | } 179 | 180 | /** 181 | * @brief This function handles the PWR PVD interrupt request. 182 | * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). 183 | * @retval None 184 | */ 185 | void HAL_PWR_PVD_IRQHandler(void) 186 | { 187 | /* Check PWR exti flag */ 188 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) 189 | { 190 | /* PWR PVD interrupt user callback */ 191 | HAL_PWR_PVDCallback(); 192 | 193 | /* Clear PWR Exti pending bit */ 194 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 195 | } 196 | } 197 | 198 | /** 199 | * @brief PWR PVD interrupt callback 200 | * @retval None 201 | */ 202 | __weak void HAL_PWR_PVDCallback(void) 203 | { 204 | /* NOTE : This function Should not be modified, when the callback is needed, 205 | the HAL_PWR_PVDCallback could be implemented in the user file 206 | */ 207 | } 208 | 209 | #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ 210 | /* defined (STM32F071xB) || defined (STM32F091xC) || */ 211 | /* defined (STM32F042x6) || defined (STM32F072xB) */ 212 | 213 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ 214 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 215 | defined (STM32F091xC) || defined (STM32F098xx) 216 | /** 217 | * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. 218 | * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, 219 | an interrupt is generated Irq line 1. 220 | NVIS has to be enable by user. 221 | * @retval None 222 | */ 223 | void HAL_PWREx_EnableVddio2Monitor(void) 224 | { 225 | __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); 226 | __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); 227 | } 228 | 229 | /** 230 | * @brief Disable the Vddio2 Monitor. 231 | * @retval None 232 | */ 233 | void HAL_PWREx_DisableVddio2Monitor(void) 234 | { 235 | __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); 236 | __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); 237 | 238 | } 239 | 240 | /** 241 | * @brief This function handles the PWR Vddio2 monitor interrupt request. 242 | * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). 243 | * @retval None 244 | */ 245 | void HAL_PWREx_Vddio2Monitor_IRQHandler(void) 246 | { 247 | /* Check PWR exti flag */ 248 | if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) 249 | { 250 | /* PWR Vddio2 monitor interrupt user callback */ 251 | HAL_PWREx_Vddio2MonitorCallback(); 252 | 253 | /* Clear PWR Exti pending bit */ 254 | __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); 255 | } 256 | } 257 | 258 | /** 259 | * @brief PWR Vddio2 Monitor interrupt callback 260 | * @retval None 261 | */ 262 | __weak void HAL_PWREx_Vddio2MonitorCallback(void) 263 | { 264 | /* NOTE : This function Should not be modified, when the callback is needed, 265 | the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file 266 | */ 267 | } 268 | 269 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ 270 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 271 | defined (STM32F091xC) || defined (STM32F098xx) */ 272 | 273 | /** 274 | * @} 275 | */ 276 | 277 | /** 278 | * @} 279 | */ 280 | 281 | #endif /* HAL_PWR_MODULE_ENABLED */ 282 | /** 283 | * @} 284 | */ 285 | 286 | /** 287 | * @} 288 | */ 289 | 290 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 291 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | #if defined(USE_FULL_LL_DRIVER) 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx_ll_exti.h" 39 | #ifdef USE_FULL_ASSERT 40 | #include "stm32_assert.h" 41 | #else 42 | #define assert_param(expr) ((void)0U) 43 | #endif 44 | 45 | /** @addtogroup STM32F0xx_LL_Driver 46 | * @{ 47 | */ 48 | 49 | #if defined (EXTI) 50 | 51 | /** @defgroup EXTI_LL EXTI 52 | * @{ 53 | */ 54 | 55 | /* Private types -------------------------------------------------------------*/ 56 | /* Private variables ---------------------------------------------------------*/ 57 | /* Private constants ---------------------------------------------------------*/ 58 | /* Private macros ------------------------------------------------------------*/ 59 | /** @addtogroup EXTI_LL_Private_Macros 60 | * @{ 61 | */ 62 | 63 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 64 | 65 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 66 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 67 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 68 | 69 | 70 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 71 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 72 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 73 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /* Private function prototypes -----------------------------------------------*/ 80 | 81 | /* Exported functions --------------------------------------------------------*/ 82 | /** @addtogroup EXTI_LL_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | /** @addtogroup EXTI_LL_EF_Init 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @brief De-initialize the EXTI registers to their default reset values. 92 | * @retval An ErrorStatus enumeration value: 93 | * - SUCCESS: EXTI registers are de-initialized 94 | * - ERROR: not applicable 95 | */ 96 | uint32_t LL_EXTI_DeInit(void) 97 | { 98 | /* Interrupt mask register set to default reset values */ 99 | #if defined(STM32F030x6) || defined(STM32F031x6) ||defined(STM32F038xx) 100 | LL_EXTI_WriteReg(IMR, 0x0FF40000U); 101 | #elif defined(STM32F070x6) || defined(STM32F042x6) || defined(STM32F048xx) 102 | LL_EXTI_WriteReg(IMR, 0x7FF40000U); 103 | #elif defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) 104 | LL_EXTI_WriteReg(IMR, 0x0F940000U); 105 | #else 106 | LL_EXTI_WriteReg(IMR, 0x7F840000U); 107 | #endif 108 | /* Event mask register set to default reset values */ 109 | LL_EXTI_WriteReg(EMR, 0x00000000U); 110 | /* Rising Trigger selection register set to default reset values */ 111 | LL_EXTI_WriteReg(RTSR, 0x00000000U); 112 | /* Falling Trigger selection register set to default reset values */ 113 | LL_EXTI_WriteReg(FTSR, 0x00000000U); 114 | /* Software interrupt event register set to default reset values */ 115 | LL_EXTI_WriteReg(SWIER, 0x00000000U); 116 | /* Pending register clear */ 117 | LL_EXTI_WriteReg(PR, 0x007BFFFFU); 118 | 119 | return SUCCESS; 120 | } 121 | 122 | /** 123 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 124 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 125 | * @retval An ErrorStatus enumeration value: 126 | * - SUCCESS: EXTI registers are initialized 127 | * - ERROR: not applicable 128 | */ 129 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 130 | { 131 | ErrorStatus status = SUCCESS; 132 | /* Check the parameters */ 133 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 134 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 135 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 136 | 137 | /* ENABLE LineCommand */ 138 | if (EXTI_InitStruct->LineCommand != DISABLE) 139 | { 140 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 141 | 142 | /* Configure EXTI Lines in range from 0 to 31 */ 143 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 144 | { 145 | switch (EXTI_InitStruct->Mode) 146 | { 147 | case LL_EXTI_MODE_IT: 148 | /* First Disable Event on provided Lines */ 149 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 150 | /* Then Enable IT on provided Lines */ 151 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 152 | break; 153 | case LL_EXTI_MODE_EVENT: 154 | /* First Disable IT on provided Lines */ 155 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 156 | /* Then Enable Event on provided Lines */ 157 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 158 | break; 159 | case LL_EXTI_MODE_IT_EVENT: 160 | /* Directly Enable IT & Event on provided Lines */ 161 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 162 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 163 | break; 164 | default: 165 | status = ERROR; 166 | break; 167 | } 168 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 169 | { 170 | switch (EXTI_InitStruct->Trigger) 171 | { 172 | case LL_EXTI_TRIGGER_RISING: 173 | /* First Disable Falling Trigger on provided Lines */ 174 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 175 | /* Then Enable Rising Trigger on provided Lines */ 176 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 177 | break; 178 | case LL_EXTI_TRIGGER_FALLING: 179 | /* First Disable Rising Trigger on provided Lines */ 180 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 181 | /* Then Enable Falling Trigger on provided Lines */ 182 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 183 | break; 184 | case LL_EXTI_TRIGGER_RISING_FALLING: 185 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 186 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 187 | break; 188 | default: 189 | status = ERROR; 190 | break; 191 | } 192 | } 193 | } 194 | } 195 | /* DISABLE LineCommand */ 196 | else 197 | { 198 | /* De-configure EXTI Lines in range from 0 to 31 */ 199 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 200 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 201 | } 202 | return status; 203 | } 204 | 205 | /** 206 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 207 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 208 | * @retval None 209 | */ 210 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 211 | { 212 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 213 | EXTI_InitStruct->LineCommand = DISABLE; 214 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 215 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 216 | } 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | /** 227 | * @} 228 | */ 229 | 230 | #endif /* defined (EXTI) */ 231 | 232 | /** 233 | * @} 234 | */ 235 | 236 | #endif /* USE_FULL_LL_DRIVER */ 237 | 238 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 239 | -------------------------------------------------------------------------------- /Inc/main.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : main.hpp 4 | * Description : This file contains the common defines of the application 5 | ****************************************************************************** 6 | ** This notice applies to any and all portions of this file 7 | * that are not between comment pairs USER CODE BEGIN and 8 | * USER CODE END. Other portions of this file, whether 9 | * inserted by the user or by software development tools 10 | * are owned by their respective copyright owners. 11 | * 12 | * COPYRIGHT(c) 2019 STMicroelectronics 13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __MAIN_H 40 | #define __MAIN_H 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "stm32f0xx.h" 43 | #include "stm32f0xx_ll_system.h" 44 | #include "stm32f0xx_ll_gpio.h" 45 | #include "stm32f0xx_ll_exti.h" 46 | #include "stm32f0xx_ll_bus.h" 47 | #include "stm32f0xx_ll_cortex.h" 48 | #include "stm32f0xx_ll_rcc.h" 49 | #include "stm32f0xx_ll_utils.h" 50 | #include "stm32f0xx_ll_pwr.h" 51 | #include "stm32f0xx_ll_dma.h" 52 | 53 | /* Includes ------------------------------------------------------------------*/ 54 | /* USER CODE BEGIN Includes */ 55 | #include "tune.h" 56 | /* USER CODE END Includes */ 57 | 58 | /* Private define ------------------------------------------------------------*/ 59 | 60 | /* ########################## Assert Selection ############################## */ 61 | /** 62 | * @brief Uncomment the line below to expanse the "assert_param" macro in the 63 | * HAL drivers code 64 | */ 65 | /* #define USE_FULL_ASSERT 1U */ 66 | 67 | /* USER CODE BEGIN Private defines */ 68 | 69 | /* USER CODE END Private defines */ 70 | 71 | #ifdef __cplusplus 72 | extern "C" { 73 | #endif 74 | void _Error_Handler(char *, int); 75 | 76 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__) 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | #endif /* __MAIN_H */ 90 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 91 | -------------------------------------------------------------------------------- /Inc/stm32_assert.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @brief STM32 assert file. 5 | ****************************************************************************** 6 | ** This notice applies to any and all portions of this file 7 | * that are not between comment pairs USER CODE BEGIN and 8 | * USER CODE END. Other portions of this file, whether 9 | * inserted by the user or by software development tools 10 | * are owned by their respective copyright owners. 11 | * 12 | * COPYRIGHT(c) 2019 STMicroelectronics 13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ 40 | #ifndef __STM32_ASSERT_H 41 | #define __STM32_ASSERT_H 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | /* Includes ------------------------------------------------------------------*/ 50 | /* Exported macro ------------------------------------------------------------*/ 51 | #ifdef USE_FULL_ASSERT 52 | /** 53 | * @brief The assert_param macro is used for function's parameters check. 54 | * @param expr: If expr is false, it calls assert_failed function 55 | * which reports the name of the source file and the source 56 | * line number of the call that failed. 57 | * If expr is true, it returns no value. 58 | * @retval None 59 | */ 60 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 61 | /* Exported functions ------------------------------------------------------- */ 62 | void assert_failed(uint8_t* file, uint32_t line); 63 | #else 64 | #define assert_param(expr) ((void)0U) 65 | #endif /* USE_FULL_ASSERT */ 66 | 67 | #ifdef __cplusplus 68 | } 69 | #endif 70 | 71 | #endif /* __STM32_ASSERT_H */ 72 | 73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 74 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_it.h 4 | * @brief This file contains the headers of the interrupt handlers. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2019 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __STM32F0xx_IT_H 36 | #define __STM32F0xx_IT_H 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f0xx_hal.h" 44 | #include "main.h" 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* Exported functions ------------------------------------------------------- */ 49 | 50 | void NMI_Handler(void); 51 | void HardFault_Handler(void); 52 | void SVC_Handler(void); 53 | void PendSV_Handler(void); 54 | void SysTick_Handler(void); 55 | void EXTI0_1_IRQHandler(void); 56 | void EXTI2_3_IRQHandler(void); 57 | void DMA1_Channel1_IRQHandler(void); 58 | void DMA1_Channel4_5_IRQHandler(void); 59 | void TIM2_IRQHandler(void); 60 | void TIM14_IRQHandler(void); 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* __STM32F0xx_IT_H */ 67 | 68 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 69 | -------------------------------------------------------------------------------- /Inc/tune.h: -------------------------------------------------------------------------------- 1 | void playStartupTune(); 2 | void playInputTune(); 3 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STSPIN32F0 OpAmp Interrupt brushless firmware 2 | Firmware for the stspin32f0a 3 | -------------------------------------------------------------------------------- /STM32F031C6_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | 5 | ** File : stm32_flash.ld 6 | ** 7 | ** Abstract : Linker script for STM32F031C6 Device with 8 | ** 32KByte FLASH, 4KByte RAM 9 | ** 10 | ** Set heap size, stack size and stack location according 11 | ** to application requirements. 12 | ** 13 | ** Set memory bank area and size if external memory is used. 14 | ** 15 | ** Target : STMicroelectronics STM32 16 | ** 17 | ** Environment : Atollic TrueSTUDIO(R) 18 | ** 19 | ** Distribution: The file is distributed as is, without any warranty 20 | ** of any kind. 21 | ** 22 | ** (c)Copyright Atollic AB. 23 | ** You may use this file as-is or modify it according to the needs of your 24 | ** project. This file may only be built (assembled or compiled and linked) 25 | ** using the Atollic TrueSTUDIO(R) product. The use of this file together 26 | ** with other tools than Atollic TrueSTUDIO(R) is not permitted. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20001000; /* end of RAM */ 36 | /* Generate a link error if heap and stack don't fit into RAM */ 37 | _Min_Heap_Size = 0x200; /* required amount of heap */ 38 | _Min_Stack_Size = 0x400; /* required amount of stack */ 39 | 40 | /* Specify the memory areas */ 41 | MEMORY 42 | { 43 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 4K 44 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K 45 | } 46 | 47 | /* Define output sections */ 48 | SECTIONS 49 | { 50 | /* The startup code goes first into FLASH */ 51 | .isr_vector : 52 | { 53 | . = ALIGN(4); 54 | KEEP(*(.isr_vector)) /* Startup code */ 55 | . = ALIGN(4); 56 | } >FLASH 57 | 58 | /* The program code and other data goes into FLASH */ 59 | .text : 60 | { 61 | . = ALIGN(4); 62 | *(.text) /* .text sections (code) */ 63 | *(.text*) /* .text* sections (code) */ 64 | *(.glue_7) /* glue arm to thumb code */ 65 | *(.glue_7t) /* glue thumb to arm code */ 66 | *(.eh_frame) 67 | 68 | KEEP (*(.init)) 69 | KEEP (*(.fini)) 70 | 71 | . = ALIGN(4); 72 | _etext = .; /* define a global symbols at end of code */ 73 | } >FLASH 74 | 75 | /* Constant data goes into FLASH */ 76 | .rodata : 77 | { 78 | . = ALIGN(4); 79 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 80 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 81 | . = ALIGN(4); 82 | } >FLASH 83 | 84 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 85 | .ARM : { 86 | __exidx_start = .; 87 | *(.ARM.exidx*) 88 | __exidx_end = .; 89 | } >FLASH 90 | 91 | .preinit_array : 92 | { 93 | PROVIDE_HIDDEN (__preinit_array_start = .); 94 | KEEP (*(.preinit_array*)) 95 | PROVIDE_HIDDEN (__preinit_array_end = .); 96 | } >FLASH 97 | .init_array : 98 | { 99 | PROVIDE_HIDDEN (__init_array_start = .); 100 | KEEP (*(SORT(.init_array.*))) 101 | KEEP (*(.init_array*)) 102 | PROVIDE_HIDDEN (__init_array_end = .); 103 | } >FLASH 104 | .fini_array : 105 | { 106 | PROVIDE_HIDDEN (__fini_array_start = .); 107 | KEEP (*(SORT(.fini_array.*))) 108 | KEEP (*(.fini_array*)) 109 | PROVIDE_HIDDEN (__fini_array_end = .); 110 | } >FLASH 111 | 112 | /* used by the startup to initialize data */ 113 | _sidata = LOADADDR(.data); 114 | 115 | /* Initialized data sections goes into RAM, load LMA copy after code */ 116 | .data : 117 | { 118 | . = ALIGN(4); 119 | _sdata = .; /* create a global symbol at data start */ 120 | *(.data) /* .data sections */ 121 | *(.data*) /* .data* sections */ 122 | 123 | . = ALIGN(4); 124 | _edata = .; /* define a global symbol at data end */ 125 | } >RAM AT> FLASH 126 | 127 | 128 | /* Uninitialized data section */ 129 | . = ALIGN(4); 130 | .bss : 131 | { 132 | /* This is used by the startup in order to initialize the .bss secion */ 133 | _sbss = .; /* define a global symbol at bss start */ 134 | __bss_start__ = _sbss; 135 | *(.bss) 136 | *(.bss*) 137 | *(COMMON) 138 | 139 | . = ALIGN(4); 140 | _ebss = .; /* define a global symbol at bss end */ 141 | __bss_end__ = _ebss; 142 | } >RAM 143 | 144 | /* User_heap_stack section, used to check that there is enough RAM left */ 145 | ._user_heap_stack : 146 | { 147 | . = ALIGN(4); 148 | PROVIDE ( end = . ); 149 | PROVIDE ( _end = . ); 150 | . = . + _Min_Heap_Size; 151 | . = . + _Min_Stack_Size; 152 | . = ALIGN(4); 153 | } >RAM 154 | 155 | 156 | 157 | /* Remove information from the standard libraries */ 158 | /DISCARD/ : 159 | { 160 | libc.a ( * ) 161 | libm.a ( * ) 162 | libgcc.a ( * ) 163 | } 164 | 165 | .ARM.attributes 0 : { *(.ARM.attributes) } 166 | } 167 | 168 | 169 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f0xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2019 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f0xx_hal.h" 41 | 42 | extern DMA_HandleTypeDef hdma_adc; 43 | 44 | extern DMA_HandleTypeDef hdma_tim2_ch4; 45 | 46 | extern void _Error_Handler(char *, int); 47 | /* USER CODE BEGIN 0 */ 48 | 49 | /* USER CODE END 0 */ 50 | /** 51 | * Initializes the Global MSP. 52 | */ 53 | void HAL_MspInit(void) 54 | { 55 | /* USER CODE BEGIN MspInit 0 */ 56 | 57 | /* USER CODE END MspInit 0 */ 58 | 59 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 60 | 61 | /* System interrupt init*/ 62 | /* SVC_IRQn interrupt configuration */ 63 | HAL_NVIC_SetPriority(SVC_IRQn, 0, 0); 64 | /* PendSV_IRQn interrupt configuration */ 65 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); 66 | /* SysTick_IRQn interrupt configuration */ 67 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 68 | 69 | /* USER CODE BEGIN MspInit 1 */ 70 | 71 | /* USER CODE END MspInit 1 */ 72 | } 73 | 74 | void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 75 | { 76 | 77 | if(hadc->Instance==ADC1) 78 | { 79 | /* USER CODE BEGIN ADC1_MspInit 0 */ 80 | 81 | /* USER CODE END ADC1_MspInit 0 */ 82 | /* Peripheral clock enable */ 83 | __HAL_RCC_ADC1_CLK_ENABLE(); 84 | 85 | /* ADC1 DMA Init */ 86 | /* ADC Init */ 87 | hdma_adc.Instance = DMA1_Channel1; 88 | hdma_adc.Init.Direction = DMA_PERIPH_TO_MEMORY; 89 | hdma_adc.Init.PeriphInc = DMA_PINC_DISABLE; 90 | hdma_adc.Init.MemInc = DMA_MINC_ENABLE; 91 | hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 92 | hdma_adc.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 93 | hdma_adc.Init.Mode = DMA_CIRCULAR; 94 | hdma_adc.Init.Priority = DMA_PRIORITY_LOW; 95 | if (HAL_DMA_Init(&hdma_adc) != HAL_OK) 96 | { 97 | _Error_Handler(__FILE__, __LINE__); 98 | } 99 | 100 | __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc); 101 | 102 | /* USER CODE BEGIN ADC1_MspInit 1 */ 103 | 104 | /* USER CODE END ADC1_MspInit 1 */ 105 | } 106 | 107 | } 108 | 109 | void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 110 | { 111 | 112 | if(hadc->Instance==ADC1) 113 | { 114 | /* USER CODE BEGIN ADC1_MspDeInit 0 */ 115 | 116 | /* USER CODE END ADC1_MspDeInit 0 */ 117 | /* Peripheral clock disable */ 118 | __HAL_RCC_ADC1_CLK_DISABLE(); 119 | 120 | /* ADC1 DMA DeInit */ 121 | HAL_DMA_DeInit(hadc->DMA_Handle); 122 | /* USER CODE BEGIN ADC1_MspDeInit 1 */ 123 | 124 | /* USER CODE END ADC1_MspDeInit 1 */ 125 | } 126 | 127 | } 128 | 129 | void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) 130 | { 131 | 132 | GPIO_InitTypeDef GPIO_InitStruct; 133 | if(htim_base->Instance==TIM1) 134 | { 135 | /* USER CODE BEGIN TIM1_MspInit 0 */ 136 | 137 | /* USER CODE END TIM1_MspInit 0 */ 138 | /* Peripheral clock enable */ 139 | __HAL_RCC_TIM1_CLK_ENABLE(); 140 | /* USER CODE BEGIN TIM1_MspInit 1 */ 141 | 142 | /* USER CODE END TIM1_MspInit 1 */ 143 | } 144 | else if(htim_base->Instance==TIM2) 145 | { 146 | /* USER CODE BEGIN TIM2_MspInit 0 */ 147 | 148 | /* USER CODE END TIM2_MspInit 0 */ 149 | /* Peripheral clock enable */ 150 | __HAL_RCC_TIM2_CLK_ENABLE(); 151 | 152 | /**TIM2 GPIO Configuration 153 | PA3 ------> TIM2_CH4 154 | */ 155 | GPIO_InitStruct.Pin = GPIO_PIN_3; 156 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 157 | GPIO_InitStruct.Pull = GPIO_NOPULL; 158 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 159 | GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; 160 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 161 | 162 | /* TIM2 DMA Init */ 163 | /* TIM2_CH4 Init */ 164 | hdma_tim2_ch4.Instance = DMA1_Channel4; 165 | hdma_tim2_ch4.Init.Direction = DMA_PERIPH_TO_MEMORY; 166 | hdma_tim2_ch4.Init.PeriphInc = DMA_PINC_DISABLE; 167 | hdma_tim2_ch4.Init.MemInc = DMA_MINC_ENABLE; 168 | hdma_tim2_ch4.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 169 | hdma_tim2_ch4.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; 170 | hdma_tim2_ch4.Init.Mode = DMA_NORMAL; 171 | hdma_tim2_ch4.Init.Priority = DMA_PRIORITY_MEDIUM; 172 | if (HAL_DMA_Init(&hdma_tim2_ch4) != HAL_OK) 173 | { 174 | _Error_Handler(__FILE__, __LINE__); 175 | } 176 | 177 | __HAL_LINKDMA(htim_base,hdma[TIM_DMA_ID_CC4],hdma_tim2_ch4); 178 | 179 | /* TIM2 interrupt Init */ 180 | HAL_NVIC_SetPriority(TIM2_IRQn, 1, 0); 181 | HAL_NVIC_EnableIRQ(TIM2_IRQn); 182 | /* USER CODE BEGIN TIM2_MspInit 1 */ 183 | 184 | /* USER CODE END TIM2_MspInit 1 */ 185 | } 186 | else if(htim_base->Instance==TIM3) 187 | { 188 | /* USER CODE BEGIN TIM3_MspInit 0 */ 189 | 190 | /* USER CODE END TIM3_MspInit 0 */ 191 | /* Peripheral clock enable */ 192 | __HAL_RCC_TIM3_CLK_ENABLE(); 193 | /* USER CODE BEGIN TIM3_MspInit 1 */ 194 | 195 | /* USER CODE END TIM3_MspInit 1 */ 196 | } 197 | else if(htim_base->Instance==TIM14) 198 | { 199 | /* USER CODE BEGIN TIM14_MspInit 0 */ 200 | 201 | /* USER CODE END TIM14_MspInit 0 */ 202 | /* Peripheral clock enable */ 203 | __HAL_RCC_TIM14_CLK_ENABLE(); 204 | /* TIM14 interrupt Init */ 205 | HAL_NVIC_SetPriority(TIM14_IRQn, 1, 0); 206 | HAL_NVIC_EnableIRQ(TIM14_IRQn); 207 | /* USER CODE BEGIN TIM14_MspInit 1 */ 208 | 209 | /* USER CODE END TIM14_MspInit 1 */ 210 | } 211 | 212 | } 213 | 214 | void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) 215 | { 216 | 217 | GPIO_InitTypeDef GPIO_InitStruct; 218 | if(htim->Instance==TIM1) 219 | { 220 | /* USER CODE BEGIN TIM1_MspPostInit 0 */ 221 | 222 | /* USER CODE END TIM1_MspPostInit 0 */ 223 | 224 | /**TIM1 GPIO Configuration 225 | PB13 ------> TIM1_CH1N 226 | PB14 ------> TIM1_CH2N 227 | PB15 ------> TIM1_CH3N 228 | PA8 ------> TIM1_CH1 229 | PA9 ------> TIM1_CH2 230 | PA10 ------> TIM1_CH3 231 | */ 232 | GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 233 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 234 | GPIO_InitStruct.Pull = GPIO_NOPULL; 235 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 236 | GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; 237 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 238 | 239 | GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10; 240 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 241 | GPIO_InitStruct.Pull = GPIO_NOPULL; 242 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 243 | GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; 244 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 245 | 246 | /* USER CODE BEGIN TIM1_MspPostInit 1 */ 247 | 248 | /* USER CODE END TIM1_MspPostInit 1 */ 249 | } 250 | 251 | } 252 | 253 | void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) 254 | { 255 | 256 | if(htim_base->Instance==TIM1) 257 | { 258 | /* USER CODE BEGIN TIM1_MspDeInit 0 */ 259 | 260 | /* USER CODE END TIM1_MspDeInit 0 */ 261 | /* Peripheral clock disable */ 262 | __HAL_RCC_TIM1_CLK_DISABLE(); 263 | /* USER CODE BEGIN TIM1_MspDeInit 1 */ 264 | 265 | /* USER CODE END TIM1_MspDeInit 1 */ 266 | } 267 | else if(htim_base->Instance==TIM2) 268 | { 269 | /* USER CODE BEGIN TIM2_MspDeInit 0 */ 270 | 271 | /* USER CODE END TIM2_MspDeInit 0 */ 272 | /* Peripheral clock disable */ 273 | __HAL_RCC_TIM2_CLK_DISABLE(); 274 | 275 | /**TIM2 GPIO Configuration 276 | PA3 ------> TIM2_CH4 277 | */ 278 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3); 279 | 280 | /* TIM2 DMA DeInit */ 281 | HAL_DMA_DeInit(htim_base->hdma[TIM_DMA_ID_CC4]); 282 | 283 | /* TIM2 interrupt DeInit */ 284 | HAL_NVIC_DisableIRQ(TIM2_IRQn); 285 | /* USER CODE BEGIN TIM2_MspDeInit 1 */ 286 | 287 | /* USER CODE END TIM2_MspDeInit 1 */ 288 | } 289 | else if(htim_base->Instance==TIM3) 290 | { 291 | /* USER CODE BEGIN TIM3_MspDeInit 0 */ 292 | 293 | /* USER CODE END TIM3_MspDeInit 0 */ 294 | /* Peripheral clock disable */ 295 | __HAL_RCC_TIM3_CLK_DISABLE(); 296 | /* USER CODE BEGIN TIM3_MspDeInit 1 */ 297 | 298 | /* USER CODE END TIM3_MspDeInit 1 */ 299 | } 300 | else if(htim_base->Instance==TIM14) 301 | { 302 | /* USER CODE BEGIN TIM14_MspDeInit 0 */ 303 | 304 | /* USER CODE END TIM14_MspDeInit 0 */ 305 | /* Peripheral clock disable */ 306 | __HAL_RCC_TIM14_CLK_DISABLE(); 307 | 308 | /* TIM14 interrupt DeInit */ 309 | HAL_NVIC_DisableIRQ(TIM14_IRQn); 310 | /* USER CODE BEGIN TIM14_MspDeInit 1 */ 311 | 312 | /* USER CODE END TIM14_MspDeInit 1 */ 313 | } 314 | 315 | } 316 | 317 | /* USER CODE BEGIN 1 */ 318 | 319 | /* USER CODE END 1 */ 320 | 321 | /** 322 | * @} 323 | */ 324 | 325 | /** 326 | * @} 327 | */ 328 | 329 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 330 | -------------------------------------------------------------------------------- /Src/stm32f0xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2019 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f0xx_hal.h" 35 | #include "stm32f0xx.h" 36 | #include "stm32f0xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | extern void transferComplete(); 40 | extern void interruptRoutine(); 41 | /* USER CODE END 0 */ 42 | 43 | /* External variables --------------------------------------------------------*/ 44 | extern DMA_HandleTypeDef hdma_adc; 45 | extern DMA_HandleTypeDef hdma_tim2_ch4; 46 | extern TIM_HandleTypeDef htim2; 47 | extern TIM_HandleTypeDef htim14; 48 | 49 | /******************************************************************************/ 50 | /* Cortex-M0 Processor Interruption and Exception Handlers */ 51 | /******************************************************************************/ 52 | 53 | /** 54 | * @brief This function handles Non maskable interrupt. 55 | */ 56 | void NMI_Handler(void) 57 | { 58 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 59 | 60 | /* USER CODE END NonMaskableInt_IRQn 0 */ 61 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 62 | 63 | /* USER CODE END NonMaskableInt_IRQn 1 */ 64 | } 65 | 66 | /** 67 | * @brief This function handles Hard fault interrupt. 68 | */ 69 | void HardFault_Handler(void) 70 | { 71 | /* USER CODE BEGIN HardFault_IRQn 0 */ 72 | 73 | /* USER CODE END HardFault_IRQn 0 */ 74 | while (1) 75 | { 76 | } 77 | /* USER CODE BEGIN HardFault_IRQn 1 */ 78 | 79 | /* USER CODE END HardFault_IRQn 1 */ 80 | } 81 | 82 | /** 83 | * @brief This function handles System service call via SWI instruction. 84 | */ 85 | void SVC_Handler(void) 86 | { 87 | /* USER CODE BEGIN SVC_IRQn 0 */ 88 | 89 | /* USER CODE END SVC_IRQn 0 */ 90 | /* USER CODE BEGIN SVC_IRQn 1 */ 91 | 92 | /* USER CODE END SVC_IRQn 1 */ 93 | } 94 | 95 | /** 96 | * @brief This function handles Pendable request for system service. 97 | */ 98 | void PendSV_Handler(void) 99 | { 100 | /* USER CODE BEGIN PendSV_IRQn 0 */ 101 | 102 | /* USER CODE END PendSV_IRQn 0 */ 103 | /* USER CODE BEGIN PendSV_IRQn 1 */ 104 | 105 | /* USER CODE END PendSV_IRQn 1 */ 106 | } 107 | 108 | /** 109 | * @brief This function handles System tick timer. 110 | */ 111 | void SysTick_Handler(void) 112 | { 113 | /* USER CODE BEGIN SysTick_IRQn 0 */ 114 | 115 | /* USER CODE END SysTick_IRQn 0 */ 116 | HAL_IncTick(); 117 | HAL_SYSTICK_IRQHandler(); 118 | /* USER CODE BEGIN SysTick_IRQn 1 */ 119 | 120 | /* USER CODE END SysTick_IRQn 1 */ 121 | } 122 | 123 | /******************************************************************************/ 124 | /* STM32F0xx Peripheral Interrupt Handlers */ 125 | /* Add here the Interrupt Handlers for the used peripherals. */ 126 | /* For the available peripheral interrupt handler names, */ 127 | /* please refer to the startup file (startup_stm32f0xx.s). */ 128 | /******************************************************************************/ 129 | 130 | /** 131 | * @brief This function handles EXTI line 0 and 1 interrupts. 132 | */ 133 | void EXTI0_1_IRQHandler(void) 134 | { 135 | /* USER CODE BEGIN EXTI0_1_IRQn 0 */ 136 | 137 | /* USER CODE END EXTI0_1_IRQn 0 */ 138 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_0) != RESET) 139 | { 140 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_0); 141 | /* USER CODE BEGIN LL_EXTI_LINE_0 */ 142 | interruptRoutine(); 143 | /* USER CODE END LL_EXTI_LINE_0 */ 144 | } 145 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_1) != RESET) 146 | { 147 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_1); 148 | /* USER CODE BEGIN LL_EXTI_LINE_1 */ 149 | interruptRoutine(); 150 | /* USER CODE END LL_EXTI_LINE_1 */ 151 | } 152 | /* USER CODE BEGIN EXTI0_1_IRQn 1 */ 153 | 154 | /* USER CODE END EXTI0_1_IRQn 1 */ 155 | } 156 | 157 | /** 158 | * @brief This function handles EXTI line 2 and 3 interrupts. 159 | */ 160 | void EXTI2_3_IRQHandler(void) 161 | { 162 | /* USER CODE BEGIN EXTI2_3_IRQn 0 */ 163 | 164 | /* USER CODE END EXTI2_3_IRQn 0 */ 165 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_2) != RESET) 166 | { 167 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_2); 168 | /* USER CODE BEGIN LL_EXTI_LINE_2 */ 169 | interruptRoutine(); 170 | /* USER CODE END LL_EXTI_LINE_2 */ 171 | } 172 | /* USER CODE BEGIN EXTI2_3_IRQn 1 */ 173 | 174 | /* USER CODE END EXTI2_3_IRQn 1 */ 175 | } 176 | 177 | /** 178 | * @brief This function handles DMA1 channel 1 interrupt. 179 | */ 180 | void DMA1_Channel1_IRQHandler(void) 181 | { 182 | /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ 183 | 184 | /* USER CODE END DMA1_Channel1_IRQn 0 */ 185 | HAL_DMA_IRQHandler(&hdma_adc); 186 | /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ 187 | 188 | /* USER CODE END DMA1_Channel1_IRQn 1 */ 189 | } 190 | 191 | /** 192 | * @brief This function handles DMA1 channel 4 and 5 interrupts. 193 | */ 194 | void DMA1_Channel4_5_IRQHandler(void) 195 | { 196 | /* USER CODE BEGIN DMA1_Channel4_5_IRQn 0 */ 197 | 198 | /* USER CODE END DMA1_Channel4_5_IRQn 0 */ 199 | HAL_DMA_IRQHandler(&hdma_tim2_ch4); 200 | /* USER CODE BEGIN DMA1_Channel4_5_IRQn 1 */ 201 | transferComplete(); 202 | /* USER CODE END DMA1_Channel4_5_IRQn 1 */ 203 | } 204 | 205 | /** 206 | * @brief This function handles TIM2 global interrupt. 207 | */ 208 | void TIM2_IRQHandler(void) 209 | { 210 | /* USER CODE BEGIN TIM2_IRQn 0 */ 211 | 212 | /* USER CODE END TIM2_IRQn 0 */ 213 | HAL_TIM_IRQHandler(&htim2); 214 | /* USER CODE BEGIN TIM2_IRQn 1 */ 215 | 216 | /* USER CODE END TIM2_IRQn 1 */ 217 | } 218 | 219 | /** 220 | * @brief This function handles TIM14 global interrupt. 221 | */ 222 | void TIM14_IRQHandler(void) 223 | { 224 | /* USER CODE BEGIN TIM14_IRQn 0 */ 225 | 226 | /* USER CODE END TIM14_IRQn 0 */ 227 | HAL_TIM_IRQHandler(&htim14); 228 | /* USER CODE BEGIN TIM14_IRQn 1 */ 229 | 230 | /* USER CODE END TIM14_IRQn 1 */ 231 | } 232 | 233 | /* USER CODE BEGIN 1 */ 234 | 235 | /* USER CODE END 1 */ 236 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 237 | -------------------------------------------------------------------------------- /Src/tune.c: -------------------------------------------------------------------------------- 1 | #include "tune.h" 2 | 3 | extern void comStep(); 4 | extern void allOff(); 5 | 6 | 7 | //void playStartupTune(){ 8 | // TIM1->PSC = 75; 9 | // TIM1->CCR1 = 5; 10 | // TIM1->CCR2 = 5; 11 | // TIM1->CCR3 = 5; 12 | // comStep(2); 13 | // HAL_Delay(100); 14 | // TIM1->PSC = 50; 15 | // HAL_Delay(100); 16 | // TIM1->PSC = 25; 17 | // HAL_Delay(100); 18 | // allOff(); 19 | // TIM1->PSC = 0; 20 | //} 21 | // 22 | //void playInputTune(){ 23 | // TIM1->PSC = 100; 24 | // TIM1->CCR1 = 5; 25 | // TIM1->CCR2 = 5; 26 | // TIM1->CCR3 = 5; 27 | // comStep(2); 28 | // HAL_Delay(100); 29 | // TIM1->PSC = 50; 30 | // HAL_Delay(100); 31 | // allOff(); 32 | // TIM1->PSC = 0; 33 | //} 34 | -------------------------------------------------------------------------------- /mx.scratch: -------------------------------------------------------------------------------- 1 | 2 | 3 | C:\Users\Alka\Google Drive\my32bit\stspin32op_amp_interrupt\stm32f0bemf_op_amp\\stm32f0bemf_op_amp 4 | ..\Drivers\CMSIS 5 | C:\Users\Alka\STM32Cube\Repository\STM32Cube_FW_F0_V1.9.0\Drivers\CMSIS 6 | 7 | TrueSTUDIO 8 | 0 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | stm32f0bemf_op_amp 26 | STM32F031C6Tx 27 | 0x200 28 | 0x400 29 | 30 | custom 31 | 32 | true 33 | swd 34 | 35 | 0 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | USE_FULL_LL_DRIVER 48 | __weak=__attribute__((weak)) 49 | __packed=__attribute__((__packed__)) 50 | 51 | 52 | 53 | 54 | 55 | 56 | MBEDTLS_CONFIG_FILE="mbedtls_config.h" 57 | _TIMEVAL_DEFINED 58 | _SYS_TIME_H_ 59 | 60 | 61 | 62 | 63 | ..\Inc 64 | ..\Drivers\STM32F0xx_HAL_Driver\Inc 65 | ..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy 66 | ..\Drivers\CMSIS\Device\ST\STM32F0xx\Include 67 | ..\Drivers\CMSIS\Include 68 | 69 | 70 | 71 | 72 | 73 | true 74 | false 75 | 76 | 77 | Inc 78 | 79 | 80 | Src 81 | 82 | 83 | Drivers 84 | 85 | 86 | 87 | 88 | -------------------------------------------------------------------------------- /startup/startup_stm32f031x6.s: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file startup_stm32f031x6.s 4 | * @author MCD Application Team 5 | * @brief STM32F031x4/STM32F031x6 devices vector table for GCC toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Branches to main in the C library (which eventually 11 | * calls main()). 12 | * After Reset the Cortex-M0 processor is in Thread mode, 13 | * priority is Privileged, and the Stack is set to Main. 14 | ****************************************************************************** 15 | * 16 | * Redistribution and use in source and binary forms, with or without modification, 17 | * are permitted provided that the following conditions are met: 18 | * 1. Redistributions of source code must retain the above copyright notice, 19 | * this list of conditions and the following disclaimer. 20 | * 2. Redistributions in binary form must reproduce the above copyright notice, 21 | * this list of conditions and the following disclaimer in the documentation 22 | * and/or other materials provided with the distribution. 23 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 24 | * may be used to endorse or promote products derived from this software 25 | * without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 30 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 35 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 | * 38 | ****************************************************************************** 39 | */ 40 | 41 | .syntax unified 42 | .cpu cortex-m0 43 | .fpu softvfp 44 | .thumb 45 | 46 | .global g_pfnVectors 47 | .global Default_Handler 48 | 49 | /* start address for the initialization values of the .data section. 50 | defined in linker script */ 51 | .word _sidata 52 | /* start address for the .data section. defined in linker script */ 53 | .word _sdata 54 | /* end address for the .data section. defined in linker script */ 55 | .word _edata 56 | /* start address for the .bss section. defined in linker script */ 57 | .word _sbss 58 | /* end address for the .bss section. defined in linker script */ 59 | .word _ebss 60 | 61 | .section .text.Reset_Handler 62 | .weak Reset_Handler 63 | .type Reset_Handler, %function 64 | Reset_Handler: 65 | ldr r0, =_estack 66 | mov sp, r0 /* set stack pointer */ 67 | 68 | /* Copy the data segment initializers from flash to SRAM */ 69 | ldr r0, =_sdata 70 | ldr r1, =_edata 71 | ldr r2, =_sidata 72 | movs r3, #0 73 | b LoopCopyDataInit 74 | 75 | CopyDataInit: 76 | ldr r4, [r2, r3] 77 | str r4, [r0, r3] 78 | adds r3, r3, #4 79 | 80 | LoopCopyDataInit: 81 | adds r4, r0, r3 82 | cmp r4, r1 83 | bcc CopyDataInit 84 | 85 | /* Zero fill the bss segment. */ 86 | ldr r2, =_sbss 87 | ldr r4, =_ebss 88 | movs r3, #0 89 | b LoopFillZerobss 90 | 91 | FillZerobss: 92 | str r3, [r2] 93 | adds r2, r2, #4 94 | 95 | LoopFillZerobss: 96 | cmp r2, r4 97 | bcc FillZerobss 98 | 99 | /* Call the clock system intitialization function.*/ 100 | bl SystemInit 101 | /* Call static constructors */ 102 | bl __libc_init_array 103 | /* Call the application's entry point.*/ 104 | bl main 105 | 106 | LoopForever: 107 | b LoopForever 108 | 109 | 110 | .size Reset_Handler, .-Reset_Handler 111 | 112 | /** 113 | * @brief This is the code that gets called when the processor receives an 114 | * unexpected interrupt. This simply enters an infinite loop, preserving 115 | * the system state for examination by a debugger. 116 | * 117 | * @param None 118 | * @retval : None 119 | */ 120 | .section .text.Default_Handler,"ax",%progbits 121 | Default_Handler: 122 | Infinite_Loop: 123 | b Infinite_Loop 124 | .size Default_Handler, .-Default_Handler 125 | /****************************************************************************** 126 | * 127 | * The minimal vector table for a Cortex M0. Note that the proper constructs 128 | * must be placed on this to ensure that it ends up at physical address 129 | * 0x0000.0000. 130 | * 131 | ******************************************************************************/ 132 | .section .isr_vector,"a",%progbits 133 | .type g_pfnVectors, %object 134 | .size g_pfnVectors, .-g_pfnVectors 135 | 136 | 137 | g_pfnVectors: 138 | .word _estack 139 | .word Reset_Handler 140 | .word NMI_Handler 141 | .word HardFault_Handler 142 | .word 0 143 | .word 0 144 | .word 0 145 | .word 0 146 | .word 0 147 | .word 0 148 | .word 0 149 | .word SVC_Handler 150 | .word 0 151 | .word 0 152 | .word PendSV_Handler 153 | .word SysTick_Handler 154 | .word WWDG_IRQHandler /* Window WatchDog */ 155 | .word PVD_IRQHandler /* PVD through EXTI Line detect */ 156 | .word RTC_IRQHandler /* RTC through the EXTI line */ 157 | .word FLASH_IRQHandler /* FLASH */ 158 | .word RCC_IRQHandler /* RCC */ 159 | .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ 160 | .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ 161 | .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ 162 | .word 0 /* Reserved */ 163 | .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ 164 | .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ 165 | .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */ 166 | .word ADC1_IRQHandler /* ADC1 */ 167 | .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ 168 | .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ 169 | .word TIM2_IRQHandler /* TIM2 */ 170 | .word TIM3_IRQHandler /* TIM3 */ 171 | .word 0 /* Reserved */ 172 | .word 0 /* Reserved */ 173 | .word TIM14_IRQHandler /* TIM14 */ 174 | .word 0 /* Reserved */ 175 | .word TIM16_IRQHandler /* TIM16 */ 176 | .word TIM17_IRQHandler /* TIM17 */ 177 | .word I2C1_IRQHandler /* I2C1 */ 178 | .word 0 /* Reserved */ 179 | .word SPI1_IRQHandler /* SPI1 */ 180 | .word 0 /* Reserved */ 181 | .word USART1_IRQHandler /* USART1 */ 182 | .word 0 /* Reserved */ 183 | .word 0 /* Reserved */ 184 | .word 0 /* Reserved */ 185 | .word 0 /* Reserved */ 186 | 187 | /******************************************************************************* 188 | * 189 | * Provide weak aliases for each Exception handler to the Default_Handler. 190 | * As they are weak aliases, any function with the same name will override 191 | * this definition. 192 | * 193 | *******************************************************************************/ 194 | 195 | .weak NMI_Handler 196 | .thumb_set NMI_Handler,Default_Handler 197 | 198 | .weak HardFault_Handler 199 | .thumb_set HardFault_Handler,Default_Handler 200 | 201 | .weak SVC_Handler 202 | .thumb_set SVC_Handler,Default_Handler 203 | 204 | .weak PendSV_Handler 205 | .thumb_set PendSV_Handler,Default_Handler 206 | 207 | .weak SysTick_Handler 208 | .thumb_set SysTick_Handler,Default_Handler 209 | 210 | .weak WWDG_IRQHandler 211 | .thumb_set WWDG_IRQHandler,Default_Handler 212 | 213 | .weak PVD_IRQHandler 214 | .thumb_set PVD_IRQHandler,Default_Handler 215 | 216 | .weak RTC_IRQHandler 217 | .thumb_set RTC_IRQHandler,Default_Handler 218 | 219 | .weak FLASH_IRQHandler 220 | .thumb_set FLASH_IRQHandler,Default_Handler 221 | 222 | .weak RCC_IRQHandler 223 | .thumb_set RCC_IRQHandler,Default_Handler 224 | 225 | .weak EXTI0_1_IRQHandler 226 | .thumb_set EXTI0_1_IRQHandler,Default_Handler 227 | 228 | .weak EXTI2_3_IRQHandler 229 | .thumb_set EXTI2_3_IRQHandler,Default_Handler 230 | 231 | .weak EXTI4_15_IRQHandler 232 | .thumb_set EXTI4_15_IRQHandler,Default_Handler 233 | 234 | .weak DMA1_Channel1_IRQHandler 235 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 236 | 237 | .weak DMA1_Channel2_3_IRQHandler 238 | .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler 239 | 240 | .weak DMA1_Channel4_5_IRQHandler 241 | .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler 242 | 243 | .weak ADC1_IRQHandler 244 | .thumb_set ADC1_IRQHandler,Default_Handler 245 | 246 | .weak TIM1_BRK_UP_TRG_COM_IRQHandler 247 | .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler 248 | 249 | .weak TIM1_CC_IRQHandler 250 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 251 | 252 | .weak TIM2_IRQHandler 253 | .thumb_set TIM2_IRQHandler,Default_Handler 254 | 255 | .weak TIM3_IRQHandler 256 | .thumb_set TIM3_IRQHandler,Default_Handler 257 | 258 | .weak TIM14_IRQHandler 259 | .thumb_set TIM14_IRQHandler,Default_Handler 260 | 261 | .weak TIM16_IRQHandler 262 | .thumb_set TIM16_IRQHandler,Default_Handler 263 | 264 | .weak TIM17_IRQHandler 265 | .thumb_set TIM17_IRQHandler,Default_Handler 266 | 267 | .weak I2C1_IRQHandler 268 | .thumb_set I2C1_IRQHandler,Default_Handler 269 | 270 | .weak SPI1_IRQHandler 271 | .thumb_set SPI1_IRQHandler,Default_Handler 272 | 273 | .weak USART1_IRQHandler 274 | .thumb_set USART1_IRQHandler,Default_Handler 275 | 276 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 277 | 278 | -------------------------------------------------------------------------------- /stm32f0_op_amp_interrupt.elf.launch: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | -------------------------------------------------------------------------------- /stm32f0bemf_op_amp.elf.launch: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | -------------------------------------------------------------------------------- /stm32f0bemf_op_amp.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | ADC.DMAContinuousRequests=ENABLE 3 | ADC.DiscontinuousConvMode=ENABLE 4 | ADC.EOCSelection=ADC_EOC_SEQ_CONV 5 | ADC.ExternalTrigConv=ADC_EXTERNALTRIGCONV_T1_CC4 6 | ADC.IPParameters=SamplingTime,ExternalTrigConv,DMAContinuousRequests,EOCSelection,DiscontinuousConvMode 7 | ADC.SamplingTime=ADC_SAMPLETIME_239CYCLES_5 8 | Dma.ADC.0.Direction=DMA_PERIPH_TO_MEMORY 9 | Dma.ADC.0.Instance=DMA1_Channel1 10 | Dma.ADC.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD 11 | Dma.ADC.0.MemInc=DMA_MINC_ENABLE 12 | Dma.ADC.0.Mode=DMA_CIRCULAR 13 | Dma.ADC.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD 14 | Dma.ADC.0.PeriphInc=DMA_PINC_DISABLE 15 | Dma.ADC.0.Priority=DMA_PRIORITY_LOW 16 | Dma.ADC.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority 17 | Dma.Request0=ADC 18 | Dma.Request1=TIM2_CH4 19 | Dma.RequestsNb=2 20 | Dma.TIM2_CH4.1.Direction=DMA_PERIPH_TO_MEMORY 21 | Dma.TIM2_CH4.1.Instance=DMA1_Channel4 22 | Dma.TIM2_CH4.1.MemDataAlignment=DMA_MDATAALIGN_WORD 23 | Dma.TIM2_CH4.1.MemInc=DMA_MINC_ENABLE 24 | Dma.TIM2_CH4.1.Mode=DMA_NORMAL 25 | Dma.TIM2_CH4.1.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD 26 | Dma.TIM2_CH4.1.PeriphInc=DMA_PINC_DISABLE 27 | Dma.TIM2_CH4.1.Priority=DMA_PRIORITY_MEDIUM 28 | Dma.TIM2_CH4.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority 29 | File.Version=6 30 | IWDG.IPParameters=Window,Reload 31 | IWDG.Reload=4095 32 | IWDG.Window=4095 33 | KeepUserPlacement=false 34 | Mcu.Family=STM32F0 35 | Mcu.IP0=ADC 36 | Mcu.IP1=DMA 37 | Mcu.IP2=IWDG 38 | Mcu.IP3=NVIC 39 | Mcu.IP4=RCC 40 | Mcu.IP5=SYS 41 | Mcu.IP6=TIM1 42 | Mcu.IP7=TIM2 43 | Mcu.IP8=TIM3 44 | Mcu.IP9=TIM14 45 | Mcu.IPNb=10 46 | Mcu.Name=STM32F031C(4-6)Tx 47 | Mcu.Package=LQFP48 48 | Mcu.Pin0=PF0-OSC_IN 49 | Mcu.Pin1=PA0 50 | Mcu.Pin10=PA10 51 | Mcu.Pin11=PA11 52 | Mcu.Pin12=PA13 53 | Mcu.Pin13=PF6 54 | Mcu.Pin14=PF7 55 | Mcu.Pin15=PA14 56 | Mcu.Pin16=VP_ADC_TempSens_Input 57 | Mcu.Pin17=VP_IWDG_VS_IWDG 58 | Mcu.Pin18=VP_SYS_VS_Systick 59 | Mcu.Pin19=VP_TIM1_VS_ClockSourceINT 60 | Mcu.Pin2=PA1 61 | Mcu.Pin20=VP_TIM1_VS_no_output4 62 | Mcu.Pin21=VP_TIM2_VS_ClockSourceINT 63 | Mcu.Pin22=VP_TIM3_VS_ClockSourceINT 64 | Mcu.Pin23=VP_TIM14_VS_ClockSourceINT 65 | Mcu.Pin3=PA2 66 | Mcu.Pin4=PA3 67 | Mcu.Pin5=PB13 68 | Mcu.Pin6=PB14 69 | Mcu.Pin7=PB15 70 | Mcu.Pin8=PA8 71 | Mcu.Pin9=PA9 72 | Mcu.PinsNb=24 73 | Mcu.UserConstants= 74 | Mcu.UserName=STM32F031C6Tx 75 | MxCube.Version=4.23.0 76 | MxDb.Version=DB.4.0.230 77 | NVIC.DMA1_Channel1_IRQn=true\:1\:0\:true\:false\:true\:false 78 | NVIC.DMA1_Channel4_5_IRQn=true\:1\:0\:true\:false\:true\:false 79 | NVIC.EXTI0_1_IRQn=true\:0\:0\:false\:false\:true\:true 80 | NVIC.EXTI2_3_IRQn=true\:0\:0\:false\:false\:true\:true 81 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false 82 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false 83 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false 84 | NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false 85 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false 86 | NVIC.TIM14_IRQn=true\:1\:0\:true\:false\:true\:true 87 | NVIC.TIM2_IRQn=true\:1\:0\:true\:false\:true\:true 88 | PA0.GPIOParameters=GPIO_ModeDefaultEXTI 89 | PA0.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING 90 | PA0.Locked=true 91 | PA0.Signal=GPXTI0 92 | PA1.GPIOParameters=GPIO_ModeDefaultEXTI 93 | PA1.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING 94 | PA1.Locked=true 95 | PA1.Signal=GPXTI1 96 | PA10.Signal=S_TIM1_CH3 97 | PA11.Locked=true 98 | PA11.Signal=GPIO_Output 99 | PA13.Locked=true 100 | PA13.Mode=Serial_Wire 101 | PA13.Signal=SYS_SWDIO 102 | PA14.Mode=Serial_Wire 103 | PA14.Signal=SYS_SWCLK 104 | PA2.GPIOParameters=GPIO_ModeDefaultEXTI 105 | PA2.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING 106 | PA2.Locked=true 107 | PA2.Signal=GPXTI2 108 | PA3.Locked=true 109 | PA3.Signal=S_TIM2_CH4 110 | PA8.Signal=S_TIM1_CH1 111 | PA9.GPIOParameters=GPIO_FMA9 112 | PA9.GPIO_FMA9=__NULL 113 | PA9.Signal=S_TIM1_CH2 114 | PB13.Locked=true 115 | PB13.Mode=PWM Generation1 CH1 CH1N 116 | PB13.Signal=TIM1_CH1N 117 | PB14.Locked=true 118 | PB14.Mode=PWM Generation2 CH2 CH2N 119 | PB14.Signal=TIM1_CH2N 120 | PB15.Locked=true 121 | PB15.Mode=PWM Generation3 CH3 CH3N 122 | PB15.Signal=TIM1_CH3N 123 | PCC.Checker=false 124 | PCC.Line=STM32F0x1 125 | PCC.MCU=STM32F031C(4-6)Tx 126 | PCC.PartNumber=STM32F031C6Tx 127 | PCC.Seq0=0 128 | PCC.Series=STM32F0 129 | PCC.Temperature=25 130 | PCC.Vdd=3.6 131 | PF0-OSC_IN.Locked=true 132 | PF0-OSC_IN.Signal=GPIO_Output 133 | PF6.Locked=true 134 | PF6.Signal=GPIO_Output 135 | PF7.Locked=true 136 | PF7.Signal=GPIO_Output 137 | PinOutPanel.RotationAngle=0 138 | ProjectManager.AskForMigrate=true 139 | ProjectManager.BackupPrevious=false 140 | ProjectManager.CompilerOptimize=2 141 | ProjectManager.ComputerToolchain=false 142 | ProjectManager.CoupleFile=false 143 | ProjectManager.CustomerFirmwarePackage=C\:/Users/Alka/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0 144 | ProjectManager.DefaultFWLocation=true 145 | ProjectManager.DeletePrevious=true 146 | ProjectManager.DeviceId=STM32F031C6Tx 147 | ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.9.0 148 | ProjectManager.FreePins=false 149 | ProjectManager.HalAssertFull=false 150 | ProjectManager.HeapSize=0x200 151 | ProjectManager.KeepUserCode=true 152 | ProjectManager.LastFirmware=true 153 | ProjectManager.LibraryCopy=1 154 | ProjectManager.PreviousToolchain=TrueSTUDIO 155 | ProjectManager.ProjectBuild=false 156 | ProjectManager.ProjectFileName=stm32f0bemf_op_amp.ioc 157 | ProjectManager.ProjectName=stm32f0bemf_op_amp 158 | ProjectManager.StackSize=0x400 159 | ProjectManager.TargetToolchain=TrueSTUDIO 160 | ProjectManager.ToolChainLocation= 161 | ProjectManager.UnderRoot=true 162 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL,2-MX_DMA_Init-DMA-false-HAL,3-SystemClock_Config-RCC-false-HAL,4-MX_TIM1_Init-TIM1-false-HAL,5-MX_TIM2_Init-TIM2-false-HAL,6-MX_TIM3_Init-TIM3-false-HAL,7-MX_IWDG_Init-IWDG-false-HAL,8-MX_TIM14_Init-TIM14-false-HAL,9-MX_ADC_Init-ADC-false-HAL 163 | RCC.AHBFreq_Value=48000000 164 | RCC.APB1Freq_Value=48000000 165 | RCC.APB1TimFreq_Value=48000000 166 | RCC.FCLKCortexFreq_Value=48000000 167 | RCC.FamilyName=M 168 | RCC.HCLKFreq_Value=48000000 169 | RCC.I2SFreq_Value=48000000 170 | RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,I2SFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value 171 | RCC.MCOFreq_Value=48000000 172 | RCC.PLLCLKFreq_Value=48000000 173 | RCC.PLLMCOFreq_Value=48000000 174 | RCC.PLLMUL=RCC_PLL_MUL12 175 | RCC.SYSCLKFreq_VALUE=48000000 176 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 177 | RCC.TimSysFreq_Value=48000000 178 | RCC.USART1Freq_Value=48000000 179 | SH.GPXTI0.0=GPIO_EXTI0 180 | SH.GPXTI0.ConfNb=1 181 | SH.GPXTI1.0=GPIO_EXTI1 182 | SH.GPXTI1.ConfNb=1 183 | SH.GPXTI2.0=GPIO_EXTI2 184 | SH.GPXTI2.ConfNb=1 185 | SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 CH1N 186 | SH.S_TIM1_CH1.ConfNb=1 187 | SH.S_TIM1_CH2.0=TIM1_CH2,PWM Generation2 CH2 CH2N 188 | SH.S_TIM1_CH2.ConfNb=1 189 | SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3 CH3N 190 | SH.S_TIM1_CH3.ConfNb=1 191 | SH.S_TIM2_CH4.0=TIM2_CH4,Input_Capture4_from_TI4 192 | SH.S_TIM2_CH4.ConfNb=1 193 | TIM1.AutomaticOutput=TIM_AUTOMATICOUTPUT_DISABLE 194 | TIM1.Channel-PWM\ Generation1\ CH1\ CH1N=TIM_CHANNEL_1 195 | TIM1.Channel-PWM\ Generation2\ CH2\ CH2N=TIM_CHANNEL_2 196 | TIM1.Channel-PWM\ Generation3\ CH3\ CH3N=TIM_CHANNEL_3 197 | TIM1.Channel-PWM\ Generation4\ No\ Output=TIM_CHANNEL_4 198 | TIM1.CounterMode=TIM_COUNTERMODE_UP 199 | TIM1.DeadTime=40 200 | TIM1.IPParameters=CounterMode,Channel-PWM Generation1 CH1 CH1N,Channel-PWM Generation2 CH2 CH2N,Channel-PWM Generation3 CH3 CH3N,DeadTime,Prescaler,Period,Channel-PWM Generation4 No Output,AutomaticOutput,OCPolarity_1 201 | TIM1.OCPolarity_1=TIM_OCPOLARITY_HIGH 202 | TIM1.Period=999 203 | TIM1.Prescaler=0 204 | TIM14.IPParameters=Prescaler,Period 205 | TIM14.Period=50000 206 | TIM14.Prescaler=1 207 | TIM2.Channel-Input_Capture4_from_TI4=TIM_CHANNEL_4 208 | TIM2.ICPolarity_CH4=TIM_INPUTCHANNELPOLARITY_BOTHEDGE 209 | TIM2.IPParameters=TIM_MasterOutputTrigger,TIM_MasterSlaveMode,Prescaler,Period,Channel-Input_Capture4_from_TI4,ICPolarity_CH4 210 | TIM2.Period=65535 211 | TIM2.Prescaler=0 212 | TIM2.TIM_MasterOutputTrigger=TIM_TRGO_RESET 213 | TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE 214 | TIM3.IPParameters=Prescaler,Period 215 | TIM3.Period=65535 216 | TIM3.Prescaler=10 217 | VP_ADC_TempSens_Input.Mode=IN-TempSens 218 | VP_ADC_TempSens_Input.Signal=ADC_TempSens_Input 219 | VP_IWDG_VS_IWDG.Mode=IWDG_Activate 220 | VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG 221 | VP_SYS_VS_Systick.Mode=SysTick 222 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 223 | VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer 224 | VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT 225 | VP_TIM1_VS_ClockSourceINT.Mode=Internal 226 | VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT 227 | VP_TIM1_VS_no_output4.Mode=PWM Generation4 No Output 228 | VP_TIM1_VS_no_output4.Signal=TIM1_VS_no_output4 229 | VP_TIM2_VS_ClockSourceINT.Mode=Internal 230 | VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT 231 | VP_TIM3_VS_ClockSourceINT.Mode=Internal 232 | VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT 233 | board=stm32f0bemf_op_amp 234 | --------------------------------------------------------------------------------