├── .gitignore ├── .travis.yml ├── LICENSE ├── Makefile ├── README.md ├── rebar.config ├── rebar.config.script ├── rebar.lock └── src ├── vectorclock.app.src └── vectorclock.erl /.gitignore: -------------------------------------------------------------------------------- 1 | .rebar3 2 | _* 3 | .eunit 4 | *.o 5 | *.beam 6 | *.plt 7 | *.swp 8 | *.swo 9 | .erlang.cookie 10 | ebin 11 | log 12 | erl_crash.dump 13 | .rebar 14 | logs 15 | _build 16 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | language: erlang 2 | otp_release: 3 | - 21.2 4 | install: 5 | - make 6 | script: 7 | - make test 8 | - make dialyzer 9 | - make lint 10 | - rebar3 as test coveralls send 11 | sudo: required 12 | dist: trusty 13 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | 2 | Apache License 3 | Version 2.0, January 2004 4 | http://www.apache.org/licenses/ 5 | 6 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 7 | 8 | 1. Definitions. 9 | 10 | "License" shall mean the terms and conditions for use, reproduction, 11 | and distribution as defined by Sections 1 through 9 of this document. 12 | 13 | "Licensor" shall mean the copyright owner or entity authorized by 14 | the copyright owner that is granting the License. 15 | 16 | "Legal Entity" shall mean the union of the acting entity and all 17 | other entities that control, are controlled by, or are under common 18 | control with that entity. For the purposes of this definition, 19 | "control" means (i) the power, direct or indirect, to cause the 20 | direction or management of such entity, whether by contract or 21 | otherwise, or (ii) ownership of fifty percent (50%) or more of the 22 | outstanding shares, or (iii) beneficial ownership of such entity. 23 | 24 | "You" (or "Your") shall mean an individual or Legal Entity 25 | exercising permissions granted by this License. 26 | 27 | "Source" form shall mean the preferred form for making modifications, 28 | including but not limited to software source code, documentation 29 | source, and configuration files. 30 | 31 | "Object" form shall mean any form resulting from mechanical 32 | transformation or translation of a Source form, including but 33 | not limited to compiled object code, generated documentation, 34 | and conversions to other media types. 35 | 36 | "Work" shall mean the work of authorship, whether in Source or 37 | Object form, made available under the License, as indicated by a 38 | copyright notice that is included in or attached to the work 39 | (an example is provided in the Appendix below). 40 | 41 | "Derivative Works" shall mean any work, whether in Source or Object 42 | form, that is based on (or derived from) the Work and for which the 43 | editorial revisions, annotations, elaborations, or other modifications 44 | represent, as a whole, an original work of authorship. For the purposes 45 | of this License, Derivative Works shall not include works that remain 46 | separable from, or merely link (or bind by name) to the interfaces of, 47 | the Work and Derivative Works thereof. 48 | 49 | "Contribution" shall mean any work of authorship, including 50 | the original version of the Work and any modifications or additions 51 | to that Work or Derivative Works thereof, that is intentionally 52 | submitted to Licensor for inclusion in the Work by the copyright owner 53 | or by an individual or Legal Entity authorized to submit on behalf of 54 | the copyright owner. For the purposes of this definition, "submitted" 55 | means any form of electronic, verbal, or written communication sent 56 | to the Licensor or its representatives, including but not limited to 57 | communication on electronic mailing lists, source code control systems, 58 | and issue tracking systems that are managed by, or on behalf of, the 59 | Licensor for the purpose of discussing and improving the Work, but 60 | excluding communication that is conspicuously marked or otherwise 61 | designated in writing by the copyright owner as "Not a Contribution." 62 | 63 | "Contributor" shall mean Licensor and any individual or Legal Entity 64 | on behalf of whom a Contribution has been received by Licensor and 65 | subsequently incorporated within the Work. 66 | 67 | 2. Grant of Copyright License. Subject to the terms and conditions of 68 | this License, each Contributor hereby grants to You a perpetual, 69 | worldwide, non-exclusive, no-charge, royalty-free, irrevocable 70 | copyright license to reproduce, prepare Derivative Works of, 71 | publicly display, publicly perform, sublicense, and distribute the 72 | Work and such Derivative Works in Source or Object form. 73 | 74 | 3. Grant of Patent License. Subject to the terms and conditions of 75 | this License, each Contributor hereby grants to You a perpetual, 76 | worldwide, non-exclusive, no-charge, royalty-free, irrevocable 77 | (except as stated in this section) patent license to make, have made, 78 | use, offer to sell, sell, import, and otherwise transfer the Work, 79 | where such license applies only to those patent claims licensable 80 | by such Contributor that are necessarily infringed by their 81 | Contribution(s) alone or by combination of their Contribution(s) 82 | with the Work to which such Contribution(s) was submitted. If You 83 | institute patent litigation against any entity (including a 84 | cross-claim or counterclaim in a lawsuit) alleging that the Work 85 | or a Contribution incorporated within the Work constitutes direct 86 | or contributory patent infringement, then any patent licenses 87 | granted to You under this License for that Work shall terminate 88 | as of the date such litigation is filed. 89 | 90 | 4. Redistribution. You may reproduce and distribute copies of the 91 | Work or Derivative Works thereof in any medium, with or without 92 | modifications, and in Source or Object form, provided that You 93 | meet the following conditions: 94 | 95 | (a) You must give any other recipients of the Work or 96 | Derivative Works a copy of this License; and 97 | 98 | (b) You must cause any modified files to carry prominent notices 99 | stating that You changed the files; and 100 | 101 | (c) You must retain, in the Source form of any Derivative Works 102 | that You distribute, all copyright, patent, trademark, and 103 | attribution notices from the Source form of the Work, 104 | excluding those notices that do not pertain to any part of 105 | the Derivative Works; and 106 | 107 | (d) If the Work includes a "NOTICE" text file as part of its 108 | distribution, then any Derivative Works that You distribute must 109 | include a readable copy of the attribution notices contained 110 | within such NOTICE file, excluding those notices that do not 111 | pertain to any part of the Derivative Works, in at least one 112 | of the following places: within a NOTICE text file distributed 113 | as part of the Derivative Works; within the Source form or 114 | documentation, if provided along with the Derivative Works; or, 115 | within a display generated by the Derivative Works, if and 116 | wherever such third-party notices normally appear. The contents 117 | of the NOTICE file are for informational purposes only and 118 | do not modify the License. You may add Your own attribution 119 | notices within Derivative Works that You distribute, alongside 120 | or as an addendum to the NOTICE text from the Work, provided 121 | that such additional attribution notices cannot be construed 122 | as modifying the License. 123 | 124 | You may add Your own copyright statement to Your modifications and 125 | may provide additional or different license terms and conditions 126 | for use, reproduction, or distribution of Your modifications, or 127 | for any such Derivative Works as a whole, provided Your use, 128 | reproduction, and distribution of the Work otherwise complies with 129 | the conditions stated in this License. 130 | 131 | 5. Submission of Contributions. Unless You explicitly state otherwise, 132 | any Contribution intentionally submitted for inclusion in the Work 133 | by You to the Licensor shall be under the terms and conditions of 134 | this License, without any additional terms or conditions. 135 | Notwithstanding the above, nothing herein shall supersede or modify 136 | the terms of any separate license agreement you may have executed 137 | with Licensor regarding such Contributions. 138 | 139 | 6. Trademarks. This License does not grant permission to use the trade 140 | names, trademarks, service marks, or product names of the Licensor, 141 | except as required for reasonable and customary use in describing the 142 | origin of the Work and reproducing the content of the NOTICE file. 143 | 144 | 7. Disclaimer of Warranty. Unless required by applicable law or 145 | agreed to in writing, Licensor provides the Work (and each 146 | Contributor provides its Contributions) on an "AS IS" BASIS, 147 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 148 | implied, including, without limitation, any warranties or conditions 149 | of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A 150 | PARTICULAR PURPOSE. You are solely responsible for determining the 151 | appropriateness of using or redistributing the Work and assume any 152 | risks associated with Your exercise of permissions under this License. 153 | 154 | 8. Limitation of Liability. In no event and under no legal theory, 155 | whether in tort (including negligence), contract, or otherwise, 156 | unless required by applicable law (such as deliberate and grossly 157 | negligent acts) or agreed to in writing, shall any Contributor be 158 | liable to You for damages, including any direct, indirect, special, 159 | incidental, or consequential damages of any character arising as a 160 | result of this License or out of the use or inability to use the 161 | Work (including but not limited to damages for loss of goodwill, 162 | work stoppage, computer failure or malfunction, or any and all 163 | other commercial damages or losses), even if such Contributor 164 | has been advised of the possibility of such damages. 165 | 166 | 9. Accepting Warranty or Additional Liability. While redistributing 167 | the Work or Derivative Works thereof, You may choose to offer, 168 | and charge a fee for, acceptance of support, warranty, indemnity, 169 | or other liability obligations and/or rights consistent with this 170 | License. However, in accepting such obligations, You may act only 171 | on Your own behalf and on Your sole responsibility, not on behalf 172 | of any other Contributor, and only if You agree to indemnify, 173 | defend, and hold each Contributor harmless for any liability 174 | incurred by, or claims asserted against, such Contributor by reason 175 | of your accepting any such warranty or additional liability. 176 | 177 | END OF TERMS AND CONDITIONS 178 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | REBAR = rebar3 2 | 3 | all: compile 4 | 5 | compile: 6 | $(REBAR) compile 7 | 8 | clean: 9 | $(REBAR) clean 10 | 11 | distclean: clean 12 | $(REBAR) clean --all 13 | 14 | cleantests: 15 | rm -f test/*.beam 16 | rm -rf logs/ 17 | 18 | test: 19 | mkdir -p logs 20 | ${REBAR} eunit 21 | ${REBAR} cover --verbose 22 | 23 | docs: 24 | ${REBAR} doc 25 | 26 | xref: compile 27 | ${REBAR} xref 28 | 29 | dialyzer: 30 | ${REBAR} dialyzer 31 | 32 | # style checks 33 | lint: 34 | ${REBAR} as lint lint 35 | 36 | check: distclean cleantests test dialyzer lint 37 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | Archive of vectorclock 2 | =========== 3 | 4 | Current version is included at https://github.com/AntidoteDB/antidote 5 | -------------------------------------------------------------------------------- /rebar.config: -------------------------------------------------------------------------------- 1 | {erl_opts, [debug_info]}. 2 | {deps, []}. 3 | 4 | % lint tool for style checking 5 | {profiles,[ 6 | {lint, [ 7 | {plugins, [{rebar3_lint, {git, "https://github.com/project-fifo/rebar3_lint.git", {tag, "0.1.2"}}}]} 8 | ]}, 9 | {test, [ 10 | {erl_opts, [warnings_as_errors, debug_info, no_inline_list_funcs]}, 11 | {plugins, [{coveralls, {git, "https://github.com/markusn/coveralls-erl", {branch, "master"}}}]}]} 12 | ]}. 13 | 14 | {cover_enabled, true}. 15 | {plugins, [coveralls]}. 16 | {cover_export_enabled, true}. 17 | {coveralls_coverdata, "_build/test/cover/eunit.coverdata"}. 18 | {coveralls_service_name, "travis-ci"}. 19 | 20 | % configuration of style rules 21 | {elvis, 22 | [#{dirs => ["src", "test"], 23 | filter => "*.erl", 24 | rules => [ 25 | {elvis_style, no_tabs}, 26 | {elvis_style, no_trailing_whitespace}, 27 | {elvis_style, macro_names, #{ignore => []}}, 28 | {elvis_style, operator_spaces, #{rules => [{right, ","}, 29 | {right, "--"}, 30 | {left, "--"}, 31 | {right, "++"}, 32 | {left, "++"}]}}, 33 | {elvis_style, god_modules, 34 | #{limit => 25, 35 | ignore => []}}, 36 | {elvis_style, used_ignored_variable}, 37 | {elvis_style, no_behavior_info}, 38 | { 39 | elvis_style, 40 | module_naming_convention, 41 | #{regex => "^[a-z]([a-z0-9]*_?)*(_SUITE)?$", 42 | ignore => []} 43 | }, 44 | { 45 | elvis_style, 46 | function_naming_convention, 47 | #{regex => "^([a-z][a-z0-9]*_?)*$"} 48 | }, 49 | {elvis_style, state_record_and_type}, 50 | {elvis_style, no_spec_with_records} 51 | ] 52 | }, 53 | #{dirs => ["."], 54 | filter => "Makefile", 55 | rules => [{elvis_project, no_deps_master_erlang_mk, #{ignore => []}}, 56 | {elvis_project, protocol_for_deps_erlang_mk, #{ignore => []}}] 57 | }, 58 | #{dirs => ["."], 59 | filter => "rebar.config", 60 | rules => [{elvis_project, no_deps_master_rebar, #{ignore => []}}] 61 | } 62 | ] 63 | }. -------------------------------------------------------------------------------- /rebar.config.script: -------------------------------------------------------------------------------- 1 | case os:getenv("TRAVIS") of 2 | "true" -> 3 | lists:keystore(coveralls_service_job_id, 1, CONFIG, {coveralls_service_job_id, os:getenv("TRAVIS_JOB_ID")}); 4 | _ -> 5 | CONFIG 6 | end. -------------------------------------------------------------------------------- /rebar.lock: -------------------------------------------------------------------------------- 1 | []. 2 | -------------------------------------------------------------------------------- /src/vectorclock.app.src: -------------------------------------------------------------------------------- 1 | {application, vectorclock, 2 | [{description, "A vectorclock library for Erlang"}, 3 | {vsn, "0.2.0"}, 4 | {registered, []}, 5 | {applications, 6 | [kernel, 7 | stdlib 8 | ]}, 9 | {env,[]}, 10 | {modules, []}, 11 | {licenses, ["Apache 2.0"]}, 12 | {links,[{"Github","https://github.com/AntidoteDB/vectorclock"}]} 13 | ]}. 14 | -------------------------------------------------------------------------------- /src/vectorclock.erl: -------------------------------------------------------------------------------- 1 | %% ------------------------------------------------------------------- 2 | %% 3 | %% Copyright (c) 2014 SyncFree Consortium. All Rights Reserved. 4 | %% 5 | %% This file is provided to you under the Apache License, 6 | %% Version 2.0 (the "License"); you may not use this file 7 | %% except in compliance with the License. You may obtain 8 | %% a copy of the License at 9 | %% 10 | %% http://www.apache.org/licenses/LICENSE-2.0 11 | %% 12 | %% Unless required by applicable law or agreed to in writing, 13 | %% software distributed under the License is distributed on an 14 | %% "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY 15 | %% KIND, either express or implied. See the License for the 16 | %% specific language governing permissions and limitations 17 | %% under the License. 18 | %% 19 | %% ------------------------------------------------------------------- 20 | -module(vectorclock). 21 | 22 | -ifdef(TEST). 23 | 24 | -include_lib("eunit/include/eunit.hrl"). 25 | 26 | -endif. 27 | 28 | -export([all_dots_greater/2, all_dots_smaller/2, conc/2, 29 | eq/2, fold/3, from_list/1, ge/2, get/2, 30 | gt/2, le/2, lt/2, map/2, max/1, min/1, 31 | min_clock/2, new/0, set_all/2, 32 | set/3, size/1, to_list/1, update_with/4]). 33 | 34 | -type vc_node() :: term(). 35 | 36 | -type vectorclock() :: #{vc_node() => pos_integer()}. 37 | 38 | -export_type([vectorclock/0]). 39 | 40 | -spec new() -> vectorclock(). 41 | new() -> maps:new(). 42 | 43 | -spec get(vc_node(), vectorclock()) -> non_neg_integer(). 44 | get(Key, VectorClock) -> 45 | maps:get(Key, VectorClock, 0). 46 | 47 | -spec set(vc_node(), non_neg_integer(), vectorclock()) -> vectorclock(). 48 | set(Key, 0, VectorClock) -> 49 | maps:remove(Key, VectorClock); 50 | set(Key, Value, VectorClock) when Value > 0 -> 51 | VectorClock#{Key => Value}. 52 | 53 | -spec set_all(pos_integer(), vectorclock()) -> vectorclock(). 54 | set_all(0, _VectorClock) -> 55 | new(); 56 | set_all(Value, VectorClock) when Value > 0 -> 57 | Fun = fun(_K, _V) -> Value end, 58 | map(Fun, VectorClock). 59 | 60 | 61 | -spec from_list([{vc_node(), pos_integer()}]) -> vectorclock(). 62 | from_list(List) -> maps:from_list(List). 63 | 64 | -spec to_list(vectorclock()) -> [{vc_node(), pos_integer()}]. 65 | to_list(VectorClock) -> maps:to_list(VectorClock). 66 | 67 | -spec map(fun((vc_node(), pos_integer()) -> pos_integer()), vectorclock()) -> vectorclock(). 68 | map(Fun, VectorClock) -> maps:map(Fun, VectorClock). 69 | 70 | -spec fold(fun ((vc_node(), pos_integer(), X) -> X), X, vectorclock()) -> X. 71 | fold(Fun, Init, VectorClock) -> 72 | maps:fold(Fun, Init, VectorClock). 73 | 74 | -spec update_with(vc_node(), fun((pos_integer()) -> pos_integer()), pos_integer(), vectorclock()) -> vectorclock(). 75 | update_with(Key, Fun, Init, VectorClock) -> 76 | maps:update_with(Key, Fun, Init, VectorClock). 77 | 78 | -spec min_clock(vectorclock(), [vc_node()]) -> non_neg_integer(). 79 | min_clock(_VectorClock, []) -> 80 | 0; 81 | min_clock(VectorClock, Nodes) -> 82 | lists:min([get(Node, VectorClock) || Node <- Nodes]). 83 | 84 | -spec max([vectorclock()]) -> vectorclock(). 85 | max([]) -> new(); 86 | max([V]) -> V; 87 | max([V1, V2 | T]) -> max([max2(V1, V2) | T]). 88 | 89 | %% component-wise maximum of two clocks 90 | -spec max2(vectorclock(), vectorclock()) -> vectorclock(). 91 | max2(V1, V2) -> 92 | FoldFun = 93 | fun(DC, A, Acc) -> 94 | B = get(DC, Acc), 95 | case A > B of 96 | true -> Acc#{DC => A}; 97 | false -> Acc 98 | end 99 | end, 100 | maps:fold(FoldFun, V2, V1). 101 | 102 | -spec min([vectorclock()]) -> vectorclock(). 103 | min([]) -> new(); 104 | min([V]) -> V; 105 | min([V1, V2 | T]) -> 106 | min([min2(V1, V2) | T]). 107 | 108 | %% component-wise minimum of two clocks 109 | -spec min2(vectorclock(), vectorclock()) -> vectorclock(). 110 | min2(V1, V2) -> 111 | FoldFun = fun (DC, A, Acc) -> 112 | B = get(DC, V2), 113 | C = min(A, B), 114 | case C of 115 | 0 -> Acc; 116 | _ -> Acc#{DC => C} 117 | end 118 | end, 119 | maps:fold(FoldFun, new(), V1). 120 | 121 | -spec size(vectorclock()) -> non_neg_integer(). 122 | size(V) -> maps:size(V). 123 | 124 | -spec for_all_keys(fun ((pos_integer(), pos_integer()) -> boolean()), vectorclock(), vectorclock()) -> boolean(). 125 | for_all_keys(F, V1, V2) -> 126 | AllDCs = maps:keys(maps:merge(V1, V2)), 127 | Func = fun (DC) -> 128 | A = get(DC, V1), 129 | B = get(DC, V2), 130 | F(A, B) 131 | end, 132 | lists:all(Func, AllDCs). 133 | 134 | -spec eq(vectorclock(), vectorclock()) -> boolean(). 135 | eq(V1, V2) -> le(V1, V2) andalso le(V2, V1). 136 | 137 | -spec le(vectorclock(), vectorclock()) -> boolean(). 138 | le(V1, V2) -> 139 | try 140 | maps:fold(fun (DC, V, true) -> 141 | case V =< get(DC, V2) of 142 | true -> true; 143 | false -> throw(false) 144 | end 145 | end, true, V1) 146 | catch 147 | false -> false 148 | end . 149 | 150 | -spec ge(vectorclock(), vectorclock()) -> boolean(). 151 | ge(V1, V2) -> le(V2, V1). 152 | 153 | -spec all_dots_smaller(vectorclock(), vectorclock()) -> boolean(). 154 | all_dots_smaller(V1, V2) -> 155 | for_all_keys(fun (A, B) -> A < B end, V1, V2). 156 | 157 | -spec all_dots_greater(vectorclock(), vectorclock()) -> boolean(). 158 | all_dots_greater(V1, V2) -> 159 | for_all_keys(fun (A, B) -> A > B end, V1, V2). 160 | 161 | -spec gt(vectorclock(), vectorclock()) -> boolean(). 162 | gt(V1, V2) -> lt(V2, V1). 163 | 164 | -spec lt(vectorclock(), vectorclock()) -> boolean(). 165 | lt(V1, V2) -> 166 | try maps:fold(fun (DC, V, Acc) -> 167 | X = get(DC, V2), 168 | case V =< X of 169 | true -> Acc orelse V < X; 170 | false -> throw(false) 171 | end 172 | end, 173 | false, V1) 174 | orelse 175 | maps:fold(fun (DC, V, _) -> 176 | X = get(DC, V1), 177 | case V > X of 178 | true -> throw(true); 179 | false -> false 180 | end 181 | end, 182 | false, V2) 183 | catch 184 | R -> R 185 | end. 186 | 187 | -spec conc(vectorclock(), vectorclock()) -> boolean(). 188 | conc(V1, V2) -> not ge(V1, V2) andalso not le(V1, V2). 189 | 190 | -ifdef(TEST). 191 | 192 | vectorclock_empty_test() -> 193 | V1 = new(), 194 | V2 = from_list([]), 195 | ?assertEqual(V1, V2), 196 | ?assertEqual((eq(min([]), max([]))), true), 197 | ?assertEqual((to_list(V1)), []). 198 | 199 | vectorclock_test() -> 200 | V1 = from_list([{1, 5}, {2, 4}, {3, 5}, {4, 6}]), 201 | V2 = from_list([{1, 4}, {2, 3}, {3, 4}, {4, 5}]), 202 | V3 = from_list([{1, 5}, {2, 4}, {3, 4}, {4, 5}]), 203 | V4 = from_list([{1, 6}, {2, 3}, {3, 1}, {4, 7}]), 204 | V5 = from_list([{1, 6}, {2, 7}]), 205 | ?assert(all_dots_greater(V1, V2)), 206 | ?assert(all_dots_smaller(V2, V1)), 207 | ?assertNot(all_dots_greater(V1, V3)), 208 | ?assert(gt(V1, V3)), 209 | ?assertNot(gt(V1, V1)), 210 | ?assertNot(ge(V1, V4)), 211 | ?assertNot(le(V1, V4)), 212 | ?assertNot(eq(V1, V4)), 213 | ?assertNot(ge(V1, V5)). 214 | 215 | vectorclock_lt_test() -> 216 | ?assertEqual((lt(from_list([{a, 1}]), from_list([{a, 1}, {b, 1}]))), true), 217 | ?assertEqual((lt(from_list([{a, 1}]), from_list([{a, 1}]))), false), 218 | ?assertEqual((lt(from_list([{a, 2}]), from_list([{a, 1}]))), false). 219 | 220 | vectorclock_max_test() -> 221 | V1 = from_list([{1, 5}, {2, 4}]), 222 | V2 = from_list([{1, 6}, {2, 3}]), 223 | V3 = from_list([{1, 3}, {3, 2}]), 224 | Expected12 = from_list([{1, 6}, {2, 4}]), 225 | Expected23 = from_list([{1, 6}, {2, 3}, {3, 2}]), 226 | Expected13 = from_list([{1, 5}, {2, 4}, {3, 2}]), 227 | Expected123 = from_list([{1, 6}, {2, 4}, {3, 2}]), 228 | Unexpected123 = from_list([{1, 5}, {2, 5}, {3, 5}]), 229 | ?assertEqual((eq(max([V1, V2]), Expected12)), true), 230 | ?assertEqual((eq(max([V2, V3]), Expected23)), true), 231 | ?assertEqual((eq(max([V1, V3]), Expected13)), true), 232 | ?assertEqual((eq(max([V1, V2, V3]), Expected123)), true), 233 | ?assertEqual((eq(max([V1, V2, V3]), Unexpected123)), false). 234 | 235 | vectorclock_min_test() -> 236 | V1 = from_list([{1, 5}, {2, 4}]), 237 | V2 = from_list([{1, 6}, {2, 3}]), 238 | V3 = from_list([{1, 3}, {3, 2}]), 239 | Expected12 = from_list([{1, 5}, {2, 3}]), 240 | Expected23 = from_list([{1, 3}]), 241 | Expected13 = from_list([{1, 3}]), 242 | Expected123 = from_list([{1, 3}]), 243 | Unexpected123 = from_list([{1, 3}, {2, 3}, {3, 2}]), 244 | ?assert(eq(min([V1, V2]), Expected12)), 245 | ?assert(eq(min([V2, V3]), Expected23)), 246 | ?assert(eq(min([V1, V3]), Expected13)), 247 | ?assert(eq(min([V1, V2, V3]), Expected123)), 248 | ?assertNot(eq(min([V1, V2, V3]), Unexpected123)), 249 | ?assert(eq(vectorclock:min([V1]), vectorclock:max([V1]))). 250 | 251 | vectorclock_conc_test() -> 252 | V1 = from_list([{1, 5}, {2, 4}]), 253 | V2 = from_list([{1, 6}, {2, 3}]), 254 | V3 = from_list([{1, 3}, {3, 2}]), 255 | V4 = from_list([{1, 6}, {3, 3}]), 256 | V5 = from_list([{1, 6}]), 257 | ?assert(conc(V1, V2)), 258 | ?assert(conc(V2, V3)), 259 | ?assertNot(conc(V3, V4)), 260 | ?assertNot(conc(V5, V4)). 261 | 262 | vectorclock_set_test() -> 263 | V1 = from_list([{1, 1}, {2, 2}]), 264 | V2 = from_list([{1, 1}, {2, 2}, {3, 3}]), 265 | V3 = from_list([{1, 1}, {2, 4}]), 266 | ?assertEqual(V2, set(3, 3, V1)), 267 | ?assertEqual(V3, set(2, 4, V1)), 268 | ?assertEqual(V1, set(3, 0, V2)). 269 | 270 | vectorclock_setall_test() -> 271 | V1 = from_list([{1, 5}, {8, 4}, {3, 5}, {9, 6}]), 272 | V2 = from_list([{1, 7}, {8, 7}, {3, 7}, {9, 7}]), 273 | ?assertEqual(V2, set_all(7, V1)), 274 | ?assertEqual(new(), set_all(0, V1)). 275 | 276 | vectorclock_minclock_test() -> 277 | V1 = from_list([{1, 5}, {8, 4}, {3, 5}, {9, 6}]), 278 | ?assertEqual(4, min_clock(V1, [1, 8, 3, 9])), 279 | ?assertEqual(0, min_clock(V1, [])), 280 | ?assertEqual(0, min_clock(V1, [1, 8, 3, 9, 10])). 281 | 282 | vectorclock_size_test() -> 283 | V1 = from_list([{1, 5}, {8, 4}, {3, 5}, {9, 6}]), 284 | V2 = new(), 285 | ?assertEqual(4, vectorclock:size(V1)), 286 | ?assertEqual(0, vectorclock:size(V2)). 287 | 288 | vectorclock_update_test() -> 289 | V1 = from_list([{1, 5}, {8, 4}, {3, 5}, {9, 6}]), 290 | V2 = from_list([{1, 5}, {8, 8}, {3, 5}, {9, 6}]), 291 | ?assertEqual(V2, update_with(8, fun (X) -> X * 2 end, 0, V1)). 292 | 293 | vectorclock_fold_test() -> 294 | V1 = from_list([{1, 5}, {8, 4}, {3, 5}, {9, 6}]), 295 | ?assertEqual(20, fold(fun (_Node, X, Acc) -> X + Acc end, 0, V1)). 296 | 297 | -endif. 298 | --------------------------------------------------------------------------------