├── Hardware Description Language (HDL) Implementation ├── About ├── Before_Sig.mem ├── EE4218_MLP_Neural_Network_HDL.xpr ├── EE4218_MLP_Neural_Network_HDL_New.zip ├── EE4218_Project_MLP_HDL_New_10Apr.xsa ├── Sigmoid.v ├── X.mem ├── labels.mem ├── matrix_multiply.v ├── memory_RAM_new_file.v ├── myip_v1_0_new_file.v ├── tb_myip_v1_0_file.v ├── test_input.mem ├── test_input_new.mem ├── test_result_expected.mem ├── test_result_expected_new.mem ├── testbench_HDL.c ├── w_hid.mem └── w_out.mem ├── High Level Synthesis (HLS) Implementation ├── About ├── EE4218_MLP_Neural_Network.xpr ├── EE4218_MLP_Neural_Network_HLS_New.zip ├── EE4218_MLP_Project_HLS_Bitstream_10Apr.xsa ├── EE4218_MLP_Project_HLS_Optimized_10Apr.xsa ├── EE4218_MLP_Project_HLS_Version_Anurag_Johannes.xsa ├── mlp_hls.cpp ├── test_mlp_hls.cpp └── testbench.c ├── README.md ├── Software Implementation ├── About └── helloworld.c └── Test Inputs ├── About ├── X.txt ├── sigmoid.txt ├── w_hid.txt └── w_out.txt /Hardware Description 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