├── extras ├── cmon.bin ├── a6502.bin ├── a6502.elf ├── basfigmon.bin ├── basfigmon.img ├── tube.a65 └── cmon.a65 ├── .gitignore ├── memimage.S ├── stm32f4-discovery.ld ├── Makefile ├── README.md ├── a6502.c ├── COPYING.LGPL3 ├── top.c ├── emulator.S └── COPYING.GPL3 /extras/cmon.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/BigEd/a6502/HEAD/extras/cmon.bin -------------------------------------------------------------------------------- /extras/a6502.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/BigEd/a6502/HEAD/extras/a6502.bin -------------------------------------------------------------------------------- /extras/a6502.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/BigEd/a6502/HEAD/extras/a6502.elf -------------------------------------------------------------------------------- /extras/basfigmon.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/BigEd/a6502/HEAD/extras/basfigmon.bin -------------------------------------------------------------------------------- /extras/basfigmon.img: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/BigEd/a6502/HEAD/extras/basfigmon.img -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Derived files 2 | *.slo 3 | *.lo 4 | *.o 5 | *.bin 6 | *.elf 7 | *.lst 8 | 9 | # editor backup 10 | *~ 11 | 12 | # make dependencies 13 | *.d 14 | -------------------------------------------------------------------------------- /memimage.S: -------------------------------------------------------------------------------- 1 | .text 2 | .global MEMIMAGE 3 | .global MEMIMAGE_END 4 | 5 | .macro include filename 6 | .incbin "\filename" 7 | .endm 8 | 9 | MEMIMAGE: 10 | include IMAGEFILE 11 | MEMIMAGE_END: 12 | .previous 13 | -------------------------------------------------------------------------------- /stm32f4-discovery.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the a6502 project. 3 | * (Inherited from the libopencm3 project.) 4 | * 5 | * Copyright (C) 2009 Uwe Hermann 6 | * Copyright (C) 2011 Stephen Caudle 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | /* Linker script for ST STM32F4DISCOVERY (STM32F407VG, 1024K flash, 128K RAM). */ 23 | 24 | /* Define memory regions. */ 25 | MEMORY 26 | { 27 | rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K 28 | ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K 29 | } 30 | 31 | /* Include the common ld script. */ 32 | INCLUDE libopencm3_stm32f4.ld 33 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the a6502 project. 3 | ## 4 | ## Copyright (C) 2012 Ed Spittles 5 | ## 6 | ## This library is free software: you can redistribute it and/or modify 7 | ## it under the terms of the GNU Lesser General Public License as published by 8 | ## the Free Software Foundation, either version 3 of the License, or 9 | ## (at your option) any later version. 10 | ## 11 | ## This library is distributed in the hope that it will be useful, 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | ## GNU Lesser General Public License for more details. 15 | ## 16 | ## You should have received a copy of the GNU Lesser General Public License 17 | ## along with this library. If not, see . 18 | ## 19 | 20 | IMAGEFILE?=extras/cmon.bin 21 | CCEXTRA=-DIMAGEFILE=$(IMAGEFILE) 22 | CCEXTRA=-DIMAGEFILE=$(IMAGEFILE) -DDEBUG 23 | 24 | CC=arm-none-eabi-gcc 25 | CCOPTS=-mcpu=cortex-m4 -std=c99 -Os -g -Wall -Wextra \ 26 | -fno-common -mcpu=cortex-m4 -mthumb -msoft-float -MD -DSTM32F4 \ 27 | $(CCEXTRA) 28 | 29 | LD=arm-none-eabi-gcc 30 | LDOPTS=-lopencm3_stm32f4 -lc -lnosys \ 31 | -T./stm32f4-discovery.ld -nostartfiles -Wl,--gc-sections \ 32 | -mthumb -mcpu=cortex-m4 -march=armv7 -mfix-cortex-m3-ldrd -msoft-float 33 | 34 | OBJCP=arm-none-eabi-objcopy 35 | 36 | all : a6502.bin 37 | 38 | clean : 39 | rm -f *.o *.bin *.elf *.d 40 | 41 | a6502.o : a6502.c 42 | $(CC) $(CCOPTS) -c $< 43 | 44 | emulator.o : emulator.S 45 | $(CC) $(CCOPTS) -c $< 46 | 47 | memimage.o : memimage.S $(IMAGEFILE) 48 | $(CC) $(CCOPTS) -c $< 49 | 50 | top.o : top.c 51 | $(CC) $(CCOPTS) -c $< 52 | 53 | a6502.elf : a6502.o top.o emulator.o memimage.o 54 | $(LD) -o $@ $^ $(LDOPTS) 55 | 56 | %.bin : %.elf 57 | $(OBJCP) -Obinary $^ $@ 58 | echo now write to dev board with: st-flash write a6502.bin 0x08000000 59 | 60 | # arm-none-eabi-objcopy -Oihex a6502.elf a6502.hex 61 | # arm-none-eabi-objcopy -Osrec a6502.elf a6502.srec 62 | # arm-none-eabi-objdump -S a6502.elf > a6502.list 63 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | The a6502 project is a 6502 emulator (library) written in ARM assembly. 2 | 3 | (Strictly, it's in Thumb-2 assembly, because it's intended for a 4 | particular dev board, the STM32F4DISCOVERY, which has a Cortex-M4 5 | and that core will only run in Thumb mode.) 6 | 7 | On that dev board, the CPU runs at 168MHz and the emulated speed of 8 | the 6502 is 18MHz. 9 | 10 | The project is inspired by [Chris Baird's stm6502](https://github.com/BigEd/stm6502), and likewise offers 11 | a 6502 with 64k RAM and a serial connection. In this case the serial 12 | connection is over USB, and I/O is performed by an extended opcode 13 | instead of being memory-mapped. 14 | 15 | The code takes some ideas from Acorn's [65Tube](http://www.chiark.greenend.org.uk/~theom/riscos/docs/RISCOS2/Emulate65.txt) and from Ian Piumarta's 16 | [lib6502](http://www.piumarta.com/software/lib6502/), but both of those have incompatible copyright so this isn't a 17 | direct descendant of either. 18 | 19 | Broadly, the LGPL license allows use in pretty much any project 20 | (whether open or closed source, free or commercial,) provided any 21 | binary distribution is accompanied by source. 22 | 23 | Refer to the stm6502 project for details about tools and downloading 24 | built firmware. The Makefile here will build a *.bin which includes 25 | an initial memory image for the 6502 - usually that would include a 26 | bootstrap ROM, monitor or application. 27 | 28 | For convenience, there's a built a6502.bin file included in a subdirectory. 29 | It includes only the minimal C'mon monitor by Bruce Clark. 30 | (This binary file is derived in part from other open source 31 | projects and does not form part of the source of this project.) 32 | 33 | An example memory image called `basfigmon.img` is provided for 34 | convenience only, and does not form part of the source 35 | of this project. It was built with 'dd' commands from binaries found 36 | in stm6502 - sources are found in that project. It contains: 37 | - supermon64 at F800, entered at reset 38 | - figforth at 0200 (g 0200) 39 | - EhBASIC at c800 (g c800) 40 | 41 | The file `basfigmon.bin` is a loadable a6502 built with this image. 42 | 43 | A microUSB cable connected to the south edge of the dev board offers 44 | a serial connection to the emulated CPU, which communicates using 45 | - 42 00 for output - writes the char in A 46 | - 42 01 for input (will block) - reads the char in A 47 | 48 | It's not possible for the 6502 to read a null byte, as zero is used as 49 | a sentinel value. The provided C routine which handles opcode 42 50 | (WDM) also translates between \n and \r characters. 51 | 52 | The three ROMs mentioned above seem to work correctly, as do some 53 | trivial test sequences found in top.c - bug reports are welcome. 54 | 55 | At present the emulator does not emulate decimal mode, but otherwise 56 | it passes [Klaus Dormann's test suite](http://forum.6502.org/viewtopic.php?f=2&t=2241). 57 | 58 | EhBASIC needs decimal mode only for HEX$() which is therefore 59 | presently misbehaving. 60 | 61 | Remodelling the emulator in Thumb or ARM assembly might be interesting 62 | (ARM would be the easier case.) 63 | -------------------------------------------------------------------------------- /extras/tube.a65: -------------------------------------------------------------------------------- 1 | ; 2 | ; This file is part of the a6502 project. 3 | ; 4 | ; Copyright (C) 2012 Ed Spittles 5 | ; 6 | ; This library is free software: you can redistribute it and/or modify 7 | ; it under the terms of the GNU Lesser General Public License as published by 8 | ; the Free Software Foundation, either version 3 of the License, or 9 | ; (at your option) any later version. 10 | ; 11 | ; This library is distributed in the hope that it will be useful, 12 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | ; GNU Lesser General Public License for more details. 15 | ; 16 | ; You should have received a copy of the GNU Lesser General Public License 17 | ; along with this library. If not, see . 18 | ; 19 | 20 | ; a set of stubs to fit in the top 2k of memory to fake a TUBE environment 21 | ; (that is, a 6502 BBC second processor) 22 | ; 23 | ; sufficient at least to run HiBASIC (1983 version) 24 | ; presently good enough for interactive i/o but no other OS calls 25 | ; 26 | ; /opt/cc65/bin/ca65 tube.a65 27 | ; /opt/cc65/bin/ld65 -t none -o tube.bin tube.o 28 | ; 29 | 30 | .org $ff09 ; adjusted to place the reset and brk vectors correctly 31 | 32 | ;; we think the tube os uses zero page addresses EE upwards 33 | tmpptr = $ee ; points to oscli parameter block 34 | tmplen = $f0 ; max line length 35 | tmpmin = $f1 ; min acceptable char value 36 | tmpmax = $f2 ; max acceptable char value 37 | 38 | init: 39 | lda #nvwrch 42 | sta $020e+1 43 | lda #Lfff4 46 | sta $020a+1 47 | 48 | lda #1 49 | jmp $b800 ; appropriate for HiBASIC 50 | 51 | nvwrch: 52 | sta $fff0 53 | rts 54 | 55 | osbyte: 56 | cmp #$7e ; acknowledge escape 57 | bne n1 58 | ldx #$ff ; the least we can do 59 | rts 60 | 61 | n1: cmp #$82 ; read machine high order address 62 | bne n2 63 | ldy #0 64 | ldx #0 65 | rts 66 | 67 | n2: cmp #$83 ; read OSHWM 68 | bne n3 69 | ldx #0 70 | ldy #$08 ; 08 for second processor, 0e for beeb 71 | rts 72 | 73 | n3: cmp #$84 ; read HIMEM 74 | bne n4 75 | ldx #0 76 | ldy #$b8 ; f8 for empty second processor, b8 for hibasic, 80 for beeb 77 | rts 78 | 79 | n4: cmp #$da ; Read/Write VDU Queue length (HiBASIC uses only to clear) 80 | bne n5 81 | rts 82 | 83 | n5: .byte $02 ; illegal 84 | 85 | ; code by JGH retrieved from http://mdfs.net/Software/Tube/Serial/6502.src 86 | 87 | ; REM J.G.Harston, 16-Nov-2010 88 | ; REM This code may be freely reused, with acknowledgements 89 | 90 | IRQA = $fc 91 | FAULT = $fd 92 | BRKV = $202 93 | IRQ1V = $204 94 | IRQ2V = $206 95 | 96 | ;\ Interrupt handlers 97 | ;\ ================== 98 | InterruptHandler: 99 | STA IRQA 100 | PLA 101 | PHA ; :\ Save A, get flags from stack 102 | AND #$10 103 | BNE BRKHandler ; :\ If BRK, jump to BRK handler 104 | 105 | beq BRKHandler ; special case for a6502 - ignore the B bit 106 | 107 | JMP (IRQ1V) ; :\ Continue via IRQ1V handler 108 | 109 | IRQ1Handler: 110 | JMP (IRQ2V) ; :\ Pass on to IRQ2V 111 | 112 | BRKHandler: 113 | TXA 114 | PHA ; :\ Save X 115 | TSX 116 | LDA $0103,X ; :\ Get address from stack 117 | CLD 118 | SEC 119 | SBC #$01 120 | STA FAULT 121 | LDA $0104,X 122 | SBC #$00 123 | STA FAULT+1 ; :\ $FD/E=>after BRK opcode 124 | PLA 125 | TAX 126 | LDA IRQA ; :\ Restore X, get saved A 127 | CLI 128 | JMP (BRKV) ; :\ Restore IRQs, jump to Error Handler 129 | 130 | ; end of JGH code 131 | 132 | osword: 133 | cmp #$00 ; read line of input 134 | bne osw1 135 | 136 | stx tmpptr ; tmpptr points to the parameter block at $0037 137 | sty tmpptr+1 138 | 139 | ldy #0 140 | lda (tmpptr),y ; capture the buffer pointer 141 | pha 142 | iny 143 | lda (tmpptr),y ; and the high byte 144 | pha 145 | iny 146 | lda (tmpptr),y ; max line length 147 | sta tmplen 148 | iny 149 | lda (tmpptr),y ; min acceptable char value 150 | sta tmpmin 151 | iny 152 | lda (tmpptr),y ; max acceptable char value 153 | sta tmpmax 154 | pla 155 | sta tmpptr+1 ; reuse tmpptr to point to the buffer 156 | pla 157 | sta tmpptr 158 | 159 | ldy #1 ; neater to have counted down and used X instead of the stack 160 | 161 | osw00del: 162 | dey 163 | 164 | osw00more: 165 | jsr osrdch ; costs a few cycles but easier to intercept 166 | bcs osw00esc ; escape 167 | 168 | .ifdef NLTOCR 169 | cmp #$0a ; linux line end 170 | bne os00skip 171 | lda #$0d ; substitute beeb line end 172 | os00skip: 173 | cmp #$0d ; beeb's native line end 174 | beq osw00ok ; line ends bypass the valid characters test(?) 175 | .endif 176 | 177 | cmp #$15 ; line erase 178 | bne osnotctrlu 179 | ldy #0 ; the least we can do! 180 | beq osw00more 181 | 182 | osnotctrlu: 183 | sta (tmpptr),y ; accept the character, for now 184 | iny 185 | cmp #$0d ; beeb's native line end 186 | beq osw00done 187 | 188 | cmp tmpmin ; check against valid range 189 | bcc osw00del ; reject - should write a backspace char really 190 | cmp tmpmax 191 | beq osw00ok 192 | bcs osw00del 193 | 194 | osw00ok: 195 | jsr nvwrch ; echo 196 | cpy tmplen 197 | bne osw00more 198 | ; we overran - should beep 199 | 200 | osw00done: 201 | jsr osnewl 202 | clc 203 | osw00esc: 204 | rts 205 | 206 | osw1: 207 | cmp #$05 ; read i/o processor memory (host processor) 208 | bne osw2 209 | lda #$0d ; bbc line end - the least we can do! 210 | rts 211 | 212 | osw2: 213 | .byte $02 ; illegal 214 | 215 | nvrdch: 216 | lda $fff0 ; blocking read 217 | cmp #$1b ; detect escape 218 | beq osrdesc 219 | clc ; always successful 220 | rts 221 | osrdesc: 222 | sec 223 | rts 224 | 225 | oscli: 226 | .byte $02 ; illegal 227 | 228 | Lffe0: ; OSRDCH not used directly by HiBASIC 229 | osrdch: 230 | jmp nvrdch 231 | 232 | Lffe3: ; OSASCI 233 | cmp #$0D 234 | bne Lffee 235 | Lffe7: ; OSNEWL 236 | osnewl: 237 | lda #$0A 238 | jsr Lffee 239 | Lffec: ; OSWRCR 240 | lda #$0D 241 | Lffee: ; OSWRCH 242 | jmp nvwrch 243 | Lfff1: 244 | jmp osword 245 | Lfff4: 246 | jmp osbyte 247 | Lfff7: 248 | jmp oscli 249 | 250 | Lnmi: 251 | .byte 7,8 252 | 253 | Lreset: 254 | .word init 255 | Lirqbrk: 256 | .word InterruptHandler 257 | Lend: 258 | -------------------------------------------------------------------------------- /a6502.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the a6502 project. 3 | * 4 | * Copyright (C) 2012 Ed Spittles 5 | * Copyright (C) 2010 Gareth McMullin 6 | * (as inherited from the libopencm3 project.) 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | 29 | extern void top(); 30 | 31 | static const struct usb_device_descriptor dev = { 32 | .bLength = USB_DT_DEVICE_SIZE, 33 | .bDescriptorType = USB_DT_DEVICE, 34 | .bcdUSB = 0x0200, 35 | .bDeviceClass = USB_CLASS_CDC, 36 | .bDeviceSubClass = 0, 37 | .bDeviceProtocol = 0, 38 | .bMaxPacketSize0 = 64, 39 | .idVendor = 0x0483, 40 | .idProduct = 0x5740, 41 | .bcdDevice = 0x0200, 42 | .iManufacturer = 1, 43 | .iProduct = 2, 44 | .iSerialNumber = 3, 45 | .bNumConfigurations = 1, 46 | }; 47 | 48 | /* 49 | * This notification endpoint isn't implemented. According to CDC spec it's 50 | * optional, but its absence causes a NULL pointer dereference in the 51 | * Linux cdc_acm driver. 52 | */ 53 | static const struct usb_endpoint_descriptor comm_endp[] = {{ 54 | .bLength = USB_DT_ENDPOINT_SIZE, 55 | .bDescriptorType = USB_DT_ENDPOINT, 56 | .bEndpointAddress = 0x83, 57 | .bmAttributes = USB_ENDPOINT_ATTR_INTERRUPT, 58 | .wMaxPacketSize = 16, 59 | .bInterval = 255, 60 | }}; 61 | 62 | static const struct usb_endpoint_descriptor data_endp[] = {{ 63 | .bLength = USB_DT_ENDPOINT_SIZE, 64 | .bDescriptorType = USB_DT_ENDPOINT, 65 | .bEndpointAddress = 0x01, 66 | .bmAttributes = USB_ENDPOINT_ATTR_BULK, 67 | .wMaxPacketSize = 64, 68 | .bInterval = 1, 69 | }, { 70 | .bLength = USB_DT_ENDPOINT_SIZE, 71 | .bDescriptorType = USB_DT_ENDPOINT, 72 | .bEndpointAddress = 0x82, 73 | .bmAttributes = USB_ENDPOINT_ATTR_BULK, 74 | .wMaxPacketSize = 64, 75 | .bInterval = 1, 76 | }}; 77 | 78 | static const struct { 79 | struct usb_cdc_header_descriptor header; 80 | struct usb_cdc_call_management_descriptor call_mgmt; 81 | struct usb_cdc_acm_descriptor acm; 82 | struct usb_cdc_union_descriptor cdc_union; 83 | } __attribute__((packed)) cdcacm_functional_descriptors = { 84 | .header = { 85 | .bFunctionLength = sizeof(struct usb_cdc_header_descriptor), 86 | .bDescriptorType = CS_INTERFACE, 87 | .bDescriptorSubtype = USB_CDC_TYPE_HEADER, 88 | .bcdCDC = 0x0110, 89 | }, 90 | .call_mgmt = { 91 | .bFunctionLength = 92 | sizeof(struct usb_cdc_call_management_descriptor), 93 | .bDescriptorType = CS_INTERFACE, 94 | .bDescriptorSubtype = USB_CDC_TYPE_CALL_MANAGEMENT, 95 | .bmCapabilities = 0, 96 | .bDataInterface = 1, 97 | }, 98 | .acm = { 99 | .bFunctionLength = sizeof(struct usb_cdc_acm_descriptor), 100 | .bDescriptorType = CS_INTERFACE, 101 | .bDescriptorSubtype = USB_CDC_TYPE_ACM, 102 | .bmCapabilities = 0, 103 | }, 104 | .cdc_union = { 105 | .bFunctionLength = sizeof(struct usb_cdc_union_descriptor), 106 | .bDescriptorType = CS_INTERFACE, 107 | .bDescriptorSubtype = USB_CDC_TYPE_UNION, 108 | .bControlInterface = 0, 109 | .bSubordinateInterface0 = 1, 110 | } 111 | }; 112 | 113 | static const struct usb_interface_descriptor comm_iface[] = {{ 114 | .bLength = USB_DT_INTERFACE_SIZE, 115 | .bDescriptorType = USB_DT_INTERFACE, 116 | .bInterfaceNumber = 0, 117 | .bAlternateSetting = 0, 118 | .bNumEndpoints = 1, 119 | .bInterfaceClass = USB_CLASS_CDC, 120 | .bInterfaceSubClass = USB_CDC_SUBCLASS_ACM, 121 | .bInterfaceProtocol = USB_CDC_PROTOCOL_AT, 122 | .iInterface = 0, 123 | 124 | .endpoint = comm_endp, 125 | 126 | .extra = &cdcacm_functional_descriptors, 127 | .extralen = sizeof(cdcacm_functional_descriptors) 128 | }}; 129 | 130 | static const struct usb_interface_descriptor data_iface[] = {{ 131 | .bLength = USB_DT_INTERFACE_SIZE, 132 | .bDescriptorType = USB_DT_INTERFACE, 133 | .bInterfaceNumber = 1, 134 | .bAlternateSetting = 0, 135 | .bNumEndpoints = 2, 136 | .bInterfaceClass = USB_CLASS_DATA, 137 | .bInterfaceSubClass = 0, 138 | .bInterfaceProtocol = 0, 139 | .iInterface = 0, 140 | 141 | .endpoint = data_endp, 142 | }}; 143 | 144 | static const struct usb_interface ifaces[] = {{ 145 | .num_altsetting = 1, 146 | .altsetting = comm_iface, 147 | }, { 148 | .num_altsetting = 1, 149 | .altsetting = data_iface, 150 | }}; 151 | 152 | static const struct usb_config_descriptor config = { 153 | .bLength = USB_DT_CONFIGURATION_SIZE, 154 | .bDescriptorType = USB_DT_CONFIGURATION, 155 | .wTotalLength = 0, 156 | .bNumInterfaces = 2, 157 | .bConfigurationValue = 1, 158 | .iConfiguration = 0, 159 | .bmAttributes = 0x80, 160 | .bMaxPower = 0x32, 161 | 162 | .interface = ifaces, 163 | }; 164 | 165 | static const char *usb_strings[] = { 166 | "x", 167 | "Black Sphere Technologies", 168 | "CDC-ACM Demo", 169 | "DEMO", 170 | }; 171 | 172 | static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, 173 | u16 *len, void (**complete)(struct usb_setup_data *req)) 174 | { 175 | (void)complete; 176 | (void)buf; 177 | 178 | switch (req->bRequest) { 179 | case USB_CDC_REQ_SET_CONTROL_LINE_STATE: { 180 | /* 181 | * This Linux cdc_acm driver requires this to be implemented 182 | * even though it's optional in the CDC spec, and we don't 183 | * advertise it in the ACM functional descriptor. 184 | */ 185 | return 1; 186 | } 187 | case USB_CDC_REQ_SET_LINE_CODING: 188 | if (*len < sizeof(struct usb_cdc_line_coding)) 189 | return 0; 190 | 191 | return 1; 192 | } 193 | return 0; 194 | } 195 | 196 | char usb_rx_buf[1]; 197 | 198 | static void cdcacm_data_rx_cb(u8 ep) 199 | { 200 | (void)ep; 201 | 202 | char buf[64]; 203 | int len = usbd_ep_read_packet(0x01, buf, 64); 204 | 205 | /* original demo code does a loopback test in this callback. 206 | We prefer to place input in a global buffer 207 | Might be nice not even to use a callback, but seems necessary. 208 | */ 209 | if (len) 210 | usb_rx_buf[0]=buf[0]; 211 | 212 | /* 213 | int len2 = sprintf(&buf[len], "%d < ", len); 214 | if (len) { 215 | while (usbd_ep_write_packet(0x82, buf, len+len2) == 0) 216 | ; 217 | } 218 | */ 219 | 220 | /* is this meant to be an LED signal? it seems to have no effect 221 | gpio_toggle(GPIOC, GPIO5); 222 | */ 223 | 224 | } 225 | 226 | static void cdcacm_set_config(u16 wValue) 227 | { 228 | (void)wValue; 229 | 230 | usbd_ep_setup(0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); 231 | usbd_ep_setup(0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); 232 | usbd_ep_setup(0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); 233 | 234 | usbd_register_control_callback( 235 | USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, 236 | USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, 237 | cdcacm_control_request); 238 | } 239 | 240 | int main(void) 241 | { 242 | rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]); 243 | 244 | rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN); 245 | rcc_peripheral_enable_clock(&RCC_AHB2ENR, RCC_AHB2ENR_OTGFSEN); 246 | 247 | gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, 248 | GPIO9 | GPIO11 | GPIO12); 249 | gpio_set_af(GPIOA, GPIO_AF10, GPIO9 | GPIO11 | GPIO12); 250 | 251 | usbd_init(&otgfs_usb_driver, &dev, &config, usb_strings); 252 | usbd_register_set_config_callback(cdcacm_set_config); 253 | 254 | top(); 255 | 256 | return(0); 257 | 258 | } 259 | -------------------------------------------------------------------------------- /COPYING.LGPL3: -------------------------------------------------------------------------------- 1 | GNU LESSER GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | 9 | This version of the GNU Lesser General Public License incorporates 10 | the terms and conditions of version 3 of the GNU General Public 11 | License, supplemented by the additional permissions listed below. 12 | 13 | 0. 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Revised Versions of the GNU Lesser General Public License. 145 | 146 | The Free Software Foundation may publish revised and/or new versions 147 | of the GNU Lesser General Public License from time to time. Such new 148 | versions will be similar in spirit to the present version, but may 149 | differ in detail to address new problems or concerns. 150 | 151 | Each version is given a distinguishing version number. If the 152 | Library as you received it specifies that a certain numbered version 153 | of the GNU Lesser General Public License "or any later version" 154 | applies to it, you have the option of following the terms and 155 | conditions either of that published version or of any later version 156 | published by the Free Software Foundation. If the Library as you 157 | received it does not specify a version number of the GNU Lesser 158 | General Public License, you may choose any version of the GNU Lesser 159 | General Public License ever published by the Free Software Foundation. 160 | 161 | If the Library as you received it specifies that a proxy can decide 162 | whether future versions of the GNU Lesser General Public License shall 163 | apply, that proxy's public statement of acceptance of any version is 164 | permanent authorization for you to choose that version for the 165 | Library. 166 | -------------------------------------------------------------------------------- /extras/cmon.a65: -------------------------------------------------------------------------------- 1 | ; C'mon, the Compact MONitor 2 | ; written by Bruce Clark and placed in the public domain 3 | ; 4 | ; minor tweaks and porting by Ed Spittles 5 | ; 6 | ; To the extent possible under law, the owners have waived all 7 | ; copyright and related or neighboring rights to this work. 8 | ; 9 | ; retrieved from http://www.lowkey.comuf.com/cmon.htm 10 | ; archived documentation at http://biged.github.io/6502-website-archives/lowkey.comuf.com/cmon.htm 11 | ; 12 | ; ported to ca65 from dev65 assembler 13 | ; /opt/cc65/bin/ca65 --listing -DSINGLESTEP cmon.a65 14 | ; /opt/cc65/bin/ld65 -t none -o cmon.bin cmon.o 15 | ; 16 | ; define SINGLESTEP to include the single-stepping plugin 17 | ; (modified to display registers in AXYS order) 18 | ; 19 | ; ported to 6502 from 65Org16 20 | ; ported to a6502 emulator 21 | 22 | .feature labels_without_colons 23 | 24 | .ifdef SINGLESTEP 25 | .org $fdd3 ; adjusted to place reset vector correctly 26 | .else 27 | .org $ff26 28 | .endif 29 | 30 | WIDTH = 8 ;must be a power of 2 31 | HEIGHT = 16 32 | 33 | ;INPUT = $7F86 34 | ;OUTPUT = $7F83 35 | 36 | .macro putc 37 | .byte $42,0 ; JSR OUTPUT 38 | ; sta $fff0 39 | .endmacro 40 | 41 | .macro getc 42 | .byte $42,1 ; JSR INPUT 43 | ; lda $fff0 44 | .endmacro 45 | 46 | ; cmon zero page usage 47 | ADRESS = 0 48 | NUMBER = 2 49 | 50 | .ifdef SINGLESTEP 51 | AREG = 4 52 | PREG = 5 53 | SREG = 6 54 | XREG = 7 55 | YREG = 8 56 | STBUF = 9 ;uses 9 bytes 57 | .endif 58 | 59 | init: 60 | .ifdef SINGLESTEP 61 | TSX 62 | STX SREG 63 | PHP 64 | PLA 65 | STA PREG 66 | .endif 67 | 68 | MON CLD 69 | M1 JSR OUTCR 70 | LDA #$2D ;output dash prompt 71 | putc 72 | M2 LDA #0 73 | STA NUMBER+1 74 | STA NUMBER 75 | M3 AND #$0F 76 | M4 LDY #4 ;accumulate digit 77 | M5 ASL NUMBER 78 | ROL NUMBER+1 79 | DEY 80 | BNE M5 81 | ORA NUMBER 82 | STA NUMBER 83 | M6 getc 84 | CMP #$0D 85 | BEQ M1 ;branch if cr 86 | ; 87 | ; Insert additional commands for characters (e.g. control characters) 88 | ; outside the range $20 (space) to $7E (tilde) here 89 | ; 90 | 91 | CMP #$20 ;don't output if outside $20-$7E 92 | BCC M6 93 | CMP #$7F 94 | BCS M6 95 | putc 96 | CMP #$2C 97 | BEQ COMMA 98 | CMP #$40 99 | BEQ AT 100 | ; 101 | ; Insert additional commands for non-letter characters (or case-sensitive 102 | ; letters) here 103 | ; 104 | .ifdef SINGLESTEP 105 | CMP #$24 ; $ is single step 106 | BNE NSSTEP 107 | JMP SSTEP 108 | NSSTEP 109 | .endif 110 | 111 | ; now dealing with letters 112 | EOR #$30 113 | CMP #$0A 114 | BCC M4 ;branch if digit 115 | ORA #$20 ;convert to upper case 116 | SBC #$77 117 | ; 118 | ; mapping: 119 | ; A-F -> $FFFA-$FFFF 120 | ; G-O -> $0000-$0008 121 | ; P-Z -> $FFE9-$FFF3 122 | ; 123 | BEQ GO 124 | CMP #-6 ; #$FA or #$FFFA 125 | BCS M3 126 | ; 127 | ; Insert additional commands for (case-insensitive) letters here 128 | ; 129 | 130 | CMP #-15 ; #$F1 or #$FFF1 131 | BNE M6 132 | DUMP JSR OUTCR 133 | TYA 134 | PHA 135 | CLC ;output address 136 | ADC NUMBER 137 | PHA 138 | LDA #0 139 | ADC NUMBER+1 140 | JSR OUTHEX 141 | PLA 142 | JSR OUTHSP 143 | D1 LDA (NUMBER),Y ;output hex bytes 144 | JSR OUTHSP 145 | INY 146 | TYA 147 | AND #WIDTH-1 148 | BNE D1 149 | PLA 150 | TAY 151 | D2 LDA (NUMBER),Y ;output characters 152 | AND #$7F 153 | CMP #$20 154 | BCC D3 155 | CMP #$7F 156 | BCC D4 157 | D3 EOR #$40 158 | D4 putc 159 | INY 160 | TYA 161 | AND #WIDTH-1 162 | BNE D2 163 | CPY #WIDTH*HEIGHT 164 | BCC DUMP 165 | M2J 166 | JMP M2 ; branches out of range for 6502 when putc is 3 bytes 167 | COMMA LDA NUMBER 168 | STA (ADRESS),Y 169 | INC ADRESS 170 | BNE M2J 171 | INC ADRESS+1 172 | BCS M2J 173 | AT LDA NUMBER 174 | STA ADRESS 175 | LDA NUMBER+1 176 | STA ADRESS+1 177 | BCS M2J 178 | GO JSR G1 179 | JMP M2 ; returning after a 'go' 180 | G1 JMP (NUMBER) 181 | OUTHEX ;JSR OH1 ; for 16-bit bytes 182 | OH1 JSR OH2 183 | OH2 ASL 184 | ADC #0 185 | ASL 186 | ADC #0 187 | ASL 188 | ADC #0 189 | ASL 190 | ADC #0 191 | PHA 192 | AND #$0F 193 | CMP #$0A 194 | BCC OH3 195 | ADC #$66 196 | OH3 EOR #$30 197 | putc 198 | PLA 199 | RTS 200 | OUTHSP JSR OUTHEX 201 | LDA #$20 202 | OA1 putc 203 | RTS 204 | OUTCR LDA #$0D 205 | putc 206 | LDA #$0A 207 | BNE OA1 ;always 208 | 209 | .ifdef SINGLESTEP 210 | SSTEP LDX #7 211 | STEP1 LDA STEP4,X 212 | STA STBUF+1,X 213 | DEX 214 | BPL STEP1 215 | LDX SREG 216 | TXS 217 | LDA (ADRESS),Y 218 | BEQ STBRK 219 | JSR GETLEN 220 | TYA 221 | PHA 222 | STEP2 LDA (ADRESS),Y 223 | STA STBUF,Y 224 | DEY 225 | BPL STEP2 226 | EOR #$20 227 | CMP #1 228 | PLA 229 | JSR STADR 230 | LDA STBUF 231 | CMP #$20 232 | BEQ STJSR 233 | CMP #$4C 234 | BEQ STJMP 235 | CMP #$40 236 | BEQ STRTI 237 | CMP #$60 238 | BEQ STRTS 239 | CMP #$6C 240 | BEQ STJMPI 241 | AND #$1F 242 | CMP #$10 243 | BNE STEP3 244 | LDA #4 245 | STA STBUF+1 246 | STEP3 LDA PREG 247 | PHA 248 | LDA AREG 249 | LDX XREG 250 | LDY YREG 251 | PLP 252 | JMP STBUF 253 | STEP4 NOP 254 | NOP 255 | JMP STNB 256 | JMP STBR 257 | STJSR LDA ADRESS+1 258 | PHA 259 | LDA ADRESS 260 | PHA ;fall thru 261 | STJMP LDY STBUF+1 262 | LDA STBUF+2 263 | STJMP1 STY ADRESS 264 | STJMP2 STA ADRESS+1 265 | JMP STNB1 266 | STJMPI INY 267 | LDA (STBUF+1),Y 268 | STA ADRESS 269 | INY 270 | LDA (STBUF+1),Y 271 | JMP STJMP2 272 | STRTI PLA 273 | STA PREG 274 | PLA 275 | STA ADRESS 276 | PLA 277 | JMP STJMP2 278 | STRTS PLA 279 | STA ADRESS 280 | PLA 281 | STA ADRESS+1 282 | LDA #0 283 | JSR STADR 284 | JMP STNB1 285 | STBRK LDA ADRESS+1 286 | PHA 287 | LDA ADRESS 288 | PHA 289 | LDA PREG 290 | PHA 291 | ORA #$04 ; set i flag 292 | AND #$F7 ; clear d flag 293 | STA PREG 294 | LDY a:-2 ; $FFFFFFFE 295 | LDA a:-1 ; $FFFFFFFF 296 | JMP STJMP1 297 | STNB PHP 298 | STA AREG 299 | STX XREG 300 | STY YREG 301 | PLA 302 | STA PREG 303 | CLD 304 | STNB1 TSX 305 | STX SREG 306 | STNB2 JSR STOUT 307 | JMP M2 308 | STBR DEC ADRESS+1 309 | LDY #-1 ; #$FFFF 310 | LDA (ADRESS),Y 311 | BMI STBR1 312 | INC ADRESS+1 313 | STBR1 CLC 314 | JSR STADR 315 | JMP STNB2 316 | STADR ADC ADRESS 317 | STA ADRESS 318 | BCC STADR1 319 | INC ADRESS+1 320 | STADR1 RTS 321 | OUTPC LDA ADRESS+1 322 | JSR OUTHEX 323 | LDA ADRESS 324 | JMP OUTHSP 325 | STOUT JSR OUTCR 326 | JSR OUTPC ; fall thru 327 | OUTREG LDA AREG 328 | JSR OUTHSP 329 | LDA XREG 330 | JSR OUTHSP 331 | LDA YREG 332 | JSR OUTHSP 333 | LDA SREG 334 | JSR OUTHSP 335 | LDA PREG 336 | JSR OUTHSP 337 | LDA PREG ;fall thru 338 | OUTBIN SEC 339 | ROL 340 | OUTB1 PHA 341 | LDA #$18 342 | ROL 343 | putc 344 | PLA 345 | ASL 346 | BNE OUTB1 347 | RTS 348 | ; 349 | ; 0123456789ABCDEF 350 | ; 351 | ; 00 22...22.121..33. 352 | ; 10 22...22.13...33. 353 | ; 20 32..222.121.333. 354 | ; 30 22...22.13...33. 355 | ; 40 12...22.121.333. 356 | ; 50 22...22.13...33. 357 | ; 60 12...22.121.333. 358 | ; 70 22...22.13...33. 359 | ; 80 .2..222.1.1.333. 360 | ; 90 22..222.131..3.. 361 | ; A0 222.222.121.333. 362 | ; B0 22..222.131.333. 363 | ; C0 22..222.121.333. 364 | ; D0 22...22.13...33. 365 | ; E0 22..222.121.333. 366 | ; F0 22...22.13...33. 367 | ; 368 | ; Return instruction length - 1 (note that BRK is considered to be a 2 byte 369 | ; instruction and returns 1) 370 | ; 371 | GETLEN LDY #1 372 | CMP #$20 ; if opcode = $20, then length = 3 373 | BEQ GETL3 374 | AND #$DF 375 | CMP #$40 376 | BEQ GETL1 ; if (opcode & $DF) = $40, then length = 1 377 | AND #$1F 378 | CMP #$19 379 | BEQ GETL3 ; if (opcode & $1F) = $19, then length = 3 380 | AND #$0D 381 | CMP #$08 382 | BNE GETL2 ; if (opcode & $0D) = $08, then length = 1 383 | GETL1 DEY 384 | GETL2 CMP #$0C 385 | BCC GETL4 ; if (opcode & $0D) >= $0C, then length = 3 386 | GETL3 INY 387 | GETL4 RTS 388 | 389 | BREAK STA AREG 390 | STX XREG 391 | STY YREG 392 | PLA 393 | STA PREG 394 | PLA 395 | STA ADRESS 396 | PLA 397 | STA ADRESS+1 398 | TSX 399 | STX SREG 400 | CLD 401 | JSR STOUT 402 | JMP M1 403 | .endif 404 | 405 | Lnmi: 406 | .byte 1,2 407 | 408 | Lreset: 409 | .word init 410 | 411 | Lirqbrk: 412 | .ifdef SINGLESTEP 413 | .word BREAK 414 | .else 415 | .byte 5,6 416 | .endif 417 | 418 | Lend: 419 | -------------------------------------------------------------------------------- /top.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the a6502 project. 3 | * 4 | * Copyright (C) 2012 Ed Spittles 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | 25 | extern char MEMIMAGE[]; 26 | extern char MEMIMAGE_END[]; /* not an array but the end label to calculate length */ 27 | 28 | extern int emulator(int v, char *mem); 29 | extern char usb_rx_buf[]; 30 | char usb_tx_buf[200]; 31 | 32 | void writechar(int c){ 33 | usb_tx_buf[0]=c; 34 | while (usbd_ep_write_packet(0x82, usb_tx_buf, 1) == 0) 35 | ; 36 | } 37 | 38 | void writestring64(char *s, int n){ 39 | while (usbd_ep_write_packet(0x82, s, n) == 0) 40 | ; 41 | } 42 | 43 | void printchar(int c){ 44 | writechar(c); 45 | } 46 | 47 | void printhex8(int h){ 48 | int n=sprintf(usb_tx_buf, " %02x ", h); 49 | for(int i=0;i 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | /* 21 | 6502 emulator in thumb2 assembly 22 | 23 | 2012-06-11 Ed Spittles started (as outgrowth of usb_cdcacm example in libopencm3) 24 | FIXME: 6502 status register modelling incomplete and undecided 25 | FIXME: (optional?) wrapping of PC and SP; also wrapping in ZP and any other half-word operations 26 | FIXME: decimal mode, of course 27 | 28 | Target is 168MHz cortex m4 (STM32F407VGT6, has 192k of RAM) 29 | 30 | Using deeply nested macros - can get visibility for debug using 31 | arm-none-eabi-gcc -E *.S > x.tmp 32 | arm-none-eabi-as -amlh=x.list x.tmp 33 | 34 | Try to use ARM's status bits to model the 6502's. 35 | As thumb2 offers conditional update of status bits, we might not even need to keep saving and restoring 36 | 37 | As the bits are in different places, and we have no D and I (and of course no B) 38 | When we do save and restore we need to take care of the D and I 39 | We also need a conversion between ARM's positions in a 32-bit word and 6502's order in an 8-bit byte. 40 | 41 | r0 operand byte, opcode 42 | r1 effective address 43 | */ 44 | 45 | #define rmem r2 /* memory base pointer */ 46 | #define rPC r3 /* pc program counter */ 47 | #define rAcc r4 /* a (accumulator) */ 48 | #define rXreg r5 /* x index register */ 49 | #define rYreg r6 /* y index register */ 50 | #define rTrace r7 /* trace control - could consolidate into rPbyteLo */ 51 | 52 | #define rSP r8 /* sp stack pointer */ 53 | #define rPbyteHi r9 /* Process status byte Hi */ /* bit 31 down is in ARM order: NZCV */ 54 | #define rPbyteLo r10 /* Process status byte Lo */ /* D and I, two stuck bits, in 6502 order: nv-bdizc */ 55 | #define rMask24 r11 /* mask for arithmetic fixup */ 56 | 57 | #define armNflag (0x80<<24) /* negative NZCV---- */ 58 | #define armZflag (0x40<<24) /* zero NZCV---- */ 59 | #define armCflag (0x20<<24) /* carry NZCV---- */ 60 | #define armVflag (0x10<<24) /* overflow NZCV---- */ 61 | 62 | #define pByteXflag 0x20 /* stuck nv-bdizc */ 63 | #define pByteBflag 0x10 /* break nv-bdizc */ 64 | #define pByteDflag 0x08 /* decimal nv-bdizc */ 65 | #define pByteIflag 0x04 /* interrupt nv-bdizc */ 66 | 67 | @ #define rdispatch r7 /* dispatch table useful only if switching instruction sets */ 68 | 69 | .thumb 70 | .syntax unified 71 | .text 72 | 73 | @ convert ARMs Pbyte (NZCV) to 6502 status byte (nv-bdizc) in r0 74 | .macro pByteToR0 75 | mov r0, rPbyteLo 76 | MSR APSR, rPbyteHi 77 | @ and r0, #0x3c @ leave only X, B, D and I - may be redundant 78 | it mi 79 | orrmi r0, #0x80 80 | it vs 81 | orrvs r0, #0x40 82 | it eq 83 | orreq r0, #0x02 84 | it cs 85 | orrcs r0, #0x01 86 | .endm 87 | 88 | @ convert from 6502 status byte (nv-bdizc) in r0 to ARMs Pbyte (NZCV) 89 | .macro r0toPByte 90 | orr r0, r0, #(pByteXflag|pByteBflag) @ take care of the stuck bits 91 | 92 | tst r0, #0x80 93 | it ne 94 | orrne r0, #armNflag 95 | 96 | tst r0, #0x02 97 | it ne 98 | orrne r0, #armZflag 99 | 100 | tst r0, #0x01 101 | it ne 102 | orrne r0, #armCflag 103 | 104 | tst r0, #0x40 105 | it ne 106 | orrne r0, #armVflag 107 | 108 | and rPbyteHi, r0, #0xf0000000 109 | and rPbyteLo, r0, #0x0000003c 110 | .endm 111 | 112 | @ print cpu state 113 | .macro print6502state 114 | push {r0-r3} @ could be clobbered 115 | push {r0} @ parameter 7 - IR (probably) 116 | pByteToR0 117 | push {r0} @ parameter 6 - status byte 118 | push {rPC} @ parameter 5 119 | mov r0, rAcc 120 | mov r1, rXreg 121 | mov r2, rYreg 122 | mov r3, rSP 123 | blx print6502state 124 | pop {r0,r1,r2} @ caller fixup (discard pushed params) 125 | pop {r0-r3} 126 | .endm 127 | 128 | @ print PC in hex 129 | .macro printpc 130 | push {r0-r3} @ could be clobbered 131 | mov r0, rPC 132 | blx printhex16 133 | pop {r0-r3} 134 | .endm 135 | 136 | @ print reg in two hex digits 137 | .macro printreghex8 reg 138 | push {r0-r3} @ could be clobbered 139 | mov r0, \reg 140 | blx printhex8 141 | pop {r0-r3} 142 | .endm 143 | 144 | @ print ascii character 145 | .macro printchar c 146 | push {r0-r3} @ could be clobbered 147 | mov r0, #\c 148 | blx printchar 149 | pop {r0-r3} 150 | .endm 151 | 152 | @ print newline and carriage return 153 | .macro printnlcr 154 | printchar '\n' 155 | printchar '\r' 156 | .endm 157 | 158 | .macro load_operand_byte reg /* and increment PC */ 159 | ldrb \reg, [rPC, rmem] 160 | add rPC, #1 @ ignore case of wrapping at 0xffff 161 | .endm 162 | 163 | .macro load_2_operand_bytes reg /* and adjust PC */ 164 | @ there may be a penalty for unaligned accesses but it's faster than doing it by hand 165 | ldrh \reg, [rPC, rmem] @ ignore case of wrapping at 0xffff 166 | add rPC, #2 @ ignore case of wrapping at 0xffff 167 | .endm 168 | 169 | .macro setflags_pre 170 | MSR APSR, rPbyteHi 171 | .endm 172 | 173 | .macro setflags_post 174 | @ this action zeros the three lower bytes, which is why a single rPbyte cannot hold D and I 175 | MRS rPbyteHi, APSR 176 | .endm 177 | 178 | @ report bad instruction (dead end) 179 | badinstruction: 180 | sub rPC, #1 181 | ldrb r0, [rPC, rmem] 182 | mov r1, rPC 183 | blx printbadinstruction 184 | badinstruction_halt: 185 | b badinstruction_halt 186 | 187 | @ print machine state (subroutine) 188 | .thumb_func 189 | printstate: 190 | push {lr} 191 | sub rPC, #1 @ revert the PC to point to the opcode we just fetched 192 | printnlcr 193 | printreghex8 r0 194 | printreghex8 rPC 195 | add rPC, #1 196 | pop {lr} 197 | bx lr 198 | 199 | @ these compute_ea_MODE macros will also adjust the PC, return value in given reg 200 | @ generally we expect to return ea in r1 201 | @ if it turns out that we can always use r1 we can make it global and remove these parameters 202 | @ when we have the ea, we'll get the operand into r0 203 | @ in the meantime r0 is free to use 204 | 205 | .macro compute_ea_zer eareg 206 | load_operand_byte \eareg 207 | .endm 208 | 209 | .macro compute_ea_abs eareg 210 | load_2_operand_bytes \eareg 211 | .endm 212 | 213 | .macro compute_ea_abx eareg 214 | compute_ea_abs_index \eareg rXreg 215 | .endm 216 | 217 | .macro compute_ea_aby eareg 218 | compute_ea_abs_index \eareg rYreg 219 | .endm 220 | 221 | .macro compute_ea_abs_index eareg rIndex 222 | load_2_operand_bytes \eareg 223 | and r0, \rIndex, #0xff @ index register is unsigned here 224 | add \eareg, \eareg, r0 225 | .endm 226 | 227 | .macro compute_ea_zpx eareg /* direct, X */ 228 | compute_ea_zpreg \eareg rXreg 229 | .endm 230 | 231 | .macro compute_ea_zpy eareg /* direct, Y */ 232 | compute_ea_zpreg \eareg rYreg 233 | .endm 234 | 235 | .macro compute_ea_zpreg eareg index /* direct, index */ 236 | load_operand_byte \eareg 237 | add \eareg, \index 238 | and \eareg, #0xff 239 | .endm 240 | 241 | .macro compute_ea_inx eareg /* (direct, X) - pre-indexed */ 242 | load_operand_byte \eareg 243 | add \eareg, rXreg 244 | and \eareg, #0xff 245 | ldrh \eareg, [\eareg, rmem] @ load both bytes - ignore 0xffff wraparound 246 | .endm 247 | 248 | .macro compute_ea_iny eareg /* (direct), Y - post-indexed */ 249 | load_operand_byte \eareg 250 | ldrh \eareg, [\eareg, rmem] @ load both bytes - ignore 0xffff wraparound 251 | and r0, rYreg, #0xff 252 | add \eareg, \eareg, r0 253 | .endm 254 | 255 | @ dispatch next instruction 256 | @ one plan is to append the dispatch to every instruction decode 257 | @ but TBH instruction only goes forward and benefits from branch prediction 258 | @ note that TBH is only available to CPUs with thumb2 259 | @ note also that thumb2 is the only instruction set available on the disco board (Cortex-M3) 260 | 261 | .macro dispatch 262 | ldrb r0, [rmem, rPC] 263 | 264 | /* it would be neat to enable tracing if the user pushbutton is pressed */ 265 | /* also to have other triggering conditions, such as instruction count, PC value, memory access */ 266 | /* we'll put up with an emulator (wdm) operation */ 267 | #ifdef TRACE6502 268 | cmp rTrace, #0 269 | beq nottracing 270 | print6502state 271 | nottracing: 272 | #endif 273 | 274 | add rPC, #1 @ no auto increment in thumb 275 | tbh [pc, r0, lsl #1] @ branch table only goes forward so pc-based is no loss 276 | .endm 277 | 278 | .macro op opcode mnemonic addressmode 279 | @ r0 holds the opcode, rPC is already incremented 280 | l_\opcode: 281 | do_\mnemonic \addressmode 282 | postamble \opcode 283 | .endm 284 | 285 | .macro postamble opcode 286 | @ bl printstate 287 | b loophead 288 | .endm 289 | 290 | .thumb_func 291 | .globl emulator 292 | emulator: 293 | @ we're not returning to main() so we don't save any registers 294 | mov rPC, r0 295 | mov rmem, r1 296 | mov rTrace, #0 297 | mov rMask24, #0xffffff 298 | mov rPbyteLo, #(pByteXflag|pByteBflag) @ set fixed bits 4 and 5 of 6502 status reg 299 | 300 | @ we must at least mask the (uninitialised) register values 301 | @ (PC was initialised by the caller) 302 | and rAcc, rAcc, #0xff 303 | and rXreg, rXreg, #0xff 304 | and rYreg, rYreg, #0xff 305 | mov rSP, #0xff @ actually initialise SP (because we don't presently handle wrapping quite correctly) 306 | 307 | printnlcr 308 | printchar 'G' 309 | printchar 'o' 310 | printchar ':' 311 | printchar ' ' 312 | printpc @ just for confidence that we arrived 313 | printnlcr 314 | 315 | loophead: 316 | dispatch @ launch the first instruction (at least) 317 | 318 | dt: @ dispatch table 319 | .hword ((l_00-dt)/2), ((l_01-dt)/2), ((l_02-dt)/2), ((l_03-dt)/2), ((l_04-dt)/2), ((l_05-dt)/2), ((l_06-dt)/2), ((l_07-dt)/2) 320 | .hword ((l_08-dt)/2), ((l_09-dt)/2), ((l_0a-dt)/2), ((l_0b-dt)/2), ((l_0c-dt)/2), ((l_0d-dt)/2), ((l_0e-dt)/2), ((l_0f-dt)/2) 321 | .hword ((l_10-dt)/2), ((l_11-dt)/2), ((l_12-dt)/2), ((l_13-dt)/2), ((l_14-dt)/2), ((l_15-dt)/2), ((l_16-dt)/2), ((l_17-dt)/2) 322 | .hword ((l_18-dt)/2), ((l_19-dt)/2), ((l_1a-dt)/2), ((l_1b-dt)/2), ((l_1c-dt)/2), ((l_1d-dt)/2), ((l_1e-dt)/2), ((l_1f-dt)/2) 323 | 324 | .hword ((l_20-dt)/2), ((l_21-dt)/2), ((l_22-dt)/2), ((l_23-dt)/2), ((l_24-dt)/2), ((l_25-dt)/2), ((l_26-dt)/2), ((l_27-dt)/2) 325 | .hword ((l_28-dt)/2), ((l_29-dt)/2), ((l_2a-dt)/2), ((l_2b-dt)/2), ((l_2c-dt)/2), ((l_2d-dt)/2), ((l_2e-dt)/2), ((l_2f-dt)/2) 326 | .hword ((l_30-dt)/2), ((l_31-dt)/2), ((l_32-dt)/2), ((l_33-dt)/2), ((l_34-dt)/2), ((l_35-dt)/2), ((l_36-dt)/2), ((l_37-dt)/2) 327 | .hword ((l_38-dt)/2), ((l_39-dt)/2), ((l_3a-dt)/2), ((l_3b-dt)/2), ((l_3c-dt)/2), ((l_3d-dt)/2), ((l_3e-dt)/2), ((l_3f-dt)/2) 328 | 329 | .hword ((l_40-dt)/2), ((l_41-dt)/2), ((l_42-dt)/2), ((l_43-dt)/2), ((l_44-dt)/2), ((l_45-dt)/2), ((l_46-dt)/2), ((l_47-dt)/2) 330 | .hword ((l_48-dt)/2), ((l_49-dt)/2), ((l_4a-dt)/2), ((l_4b-dt)/2), ((l_4c-dt)/2), ((l_4d-dt)/2), ((l_4e-dt)/2), ((l_4f-dt)/2) 331 | .hword ((l_50-dt)/2), ((l_51-dt)/2), ((l_52-dt)/2), ((l_53-dt)/2), ((l_54-dt)/2), ((l_55-dt)/2), ((l_56-dt)/2), ((l_57-dt)/2) 332 | .hword ((l_58-dt)/2), ((l_59-dt)/2), ((l_5a-dt)/2), ((l_5b-dt)/2), ((l_5c-dt)/2), ((l_5d-dt)/2), ((l_5e-dt)/2), ((l_5f-dt)/2) 333 | 334 | .hword ((l_60-dt)/2), ((l_61-dt)/2), ((l_62-dt)/2), ((l_63-dt)/2), ((l_64-dt)/2), ((l_65-dt)/2), ((l_66-dt)/2), ((l_67-dt)/2) 335 | .hword ((l_68-dt)/2), ((l_69-dt)/2), ((l_6a-dt)/2), ((l_6b-dt)/2), ((l_6c-dt)/2), ((l_6d-dt)/2), ((l_6e-dt)/2), ((l_6f-dt)/2) 336 | .hword ((l_70-dt)/2), ((l_71-dt)/2), ((l_72-dt)/2), ((l_73-dt)/2), ((l_74-dt)/2), ((l_75-dt)/2), ((l_76-dt)/2), ((l_77-dt)/2) 337 | .hword ((l_78-dt)/2), ((l_79-dt)/2), ((l_7a-dt)/2), ((l_7b-dt)/2), ((l_7c-dt)/2), ((l_7d-dt)/2), ((l_7e-dt)/2), ((l_7f-dt)/2) 338 | 339 | .hword ((l_80-dt)/2), ((l_81-dt)/2), ((l_82-dt)/2), ((l_83-dt)/2), ((l_84-dt)/2), ((l_85-dt)/2), ((l_86-dt)/2), ((l_87-dt)/2) 340 | .hword ((l_88-dt)/2), ((l_89-dt)/2), ((l_8a-dt)/2), ((l_8b-dt)/2), ((l_8c-dt)/2), ((l_8d-dt)/2), ((l_8e-dt)/2), ((l_8f-dt)/2) 341 | .hword ((l_90-dt)/2), ((l_91-dt)/2), ((l_92-dt)/2), ((l_93-dt)/2), ((l_94-dt)/2), ((l_95-dt)/2), ((l_96-dt)/2), ((l_97-dt)/2) 342 | .hword ((l_98-dt)/2), ((l_99-dt)/2), ((l_9a-dt)/2), ((l_9b-dt)/2), ((l_9c-dt)/2), ((l_9d-dt)/2), ((l_9e-dt)/2), ((l_9f-dt)/2) 343 | 344 | .hword ((l_a0-dt)/2), ((l_a1-dt)/2), ((l_a2-dt)/2), ((l_a3-dt)/2), ((l_a4-dt)/2), ((l_a5-dt)/2), ((l_a6-dt)/2), ((l_a7-dt)/2) 345 | .hword ((l_a8-dt)/2), ((l_a9-dt)/2), ((l_aa-dt)/2), ((l_ab-dt)/2), ((l_ac-dt)/2), ((l_ad-dt)/2), ((l_ae-dt)/2), ((l_af-dt)/2) 346 | .hword ((l_b0-dt)/2), ((l_b1-dt)/2), ((l_b2-dt)/2), ((l_b3-dt)/2), ((l_b4-dt)/2), ((l_b5-dt)/2), ((l_b6-dt)/2), ((l_b7-dt)/2) 347 | .hword ((l_b8-dt)/2), ((l_b9-dt)/2), ((l_ba-dt)/2), ((l_bb-dt)/2), ((l_bc-dt)/2), ((l_bd-dt)/2), ((l_be-dt)/2), ((l_bf-dt)/2) 348 | 349 | .hword ((l_c0-dt)/2), ((l_c1-dt)/2), ((l_c2-dt)/2), ((l_c3-dt)/2), ((l_c4-dt)/2), ((l_c5-dt)/2), ((l_c6-dt)/2), ((l_c7-dt)/2) 350 | .hword ((l_c8-dt)/2), ((l_c9-dt)/2), ((l_ca-dt)/2), ((l_cb-dt)/2), ((l_cc-dt)/2), ((l_cd-dt)/2), ((l_ce-dt)/2), ((l_cf-dt)/2) 351 | .hword ((l_d0-dt)/2), ((l_d1-dt)/2), ((l_d2-dt)/2), ((l_d3-dt)/2), ((l_d4-dt)/2), ((l_d5-dt)/2), ((l_d6-dt)/2), ((l_d7-dt)/2) 352 | .hword ((l_d8-dt)/2), ((l_d9-dt)/2), ((l_da-dt)/2), ((l_db-dt)/2), ((l_dc-dt)/2), ((l_dd-dt)/2), ((l_de-dt)/2), ((l_df-dt)/2) 353 | 354 | .hword ((l_e0-dt)/2), ((l_e1-dt)/2), ((l_e2-dt)/2), ((l_e3-dt)/2), ((l_e4-dt)/2), ((l_e5-dt)/2), ((l_e6-dt)/2), ((l_e7-dt)/2) 355 | .hword ((l_e8-dt)/2), ((l_e9-dt)/2), ((l_ea-dt)/2), ((l_eb-dt)/2), ((l_ec-dt)/2), ((l_ed-dt)/2), ((l_ee-dt)/2), ((l_ef-dt)/2) 356 | .hword ((l_f0-dt)/2), ((l_f1-dt)/2), ((l_f2-dt)/2), ((l_f3-dt)/2), ((l_f4-dt)/2), ((l_f5-dt)/2), ((l_f6-dt)/2), ((l_f7-dt)/2) 357 | .hword ((l_f8-dt)/2), ((l_f9-dt)/2), ((l_fa-dt)/2), ((l_fb-dt)/2), ((l_fc-dt)/2), ((l_fd-dt)/2), ((l_fe-dt)/2), ((l_ff-dt)/2) 358 | 359 | 360 | @ overall for each instruction dispatched we will need to: 361 | @ compute effective address (if any) and adjust PC 362 | @ note that the effective address for an immediate is PC 363 | @ fetch operand (if any) 364 | @ perform operation 365 | @ store to memory (if necessary) 366 | @ proceed to next instruction 367 | 368 | /* trivial cases */ 369 | 370 | .macro do_bad addressmode 371 | b badinstruction 372 | .endm 373 | 374 | .macro do_nop addressmode 375 | .endm 376 | 377 | /* emulation special functions such as i/o - call out to C code */ 378 | .macro do_wdm addressmode 379 | load_operand_byte r0 @ WDM operand is operation code 380 | mov r1, rAcc @ Accumulator is parameter byte 381 | 382 | @ deal with tracing control 383 | cmp r0, #0x54 384 | bne wdm_c 385 | mov rTrace, #1 386 | wdm_c: 387 | push {r1-r3} @ could be clobbered 388 | blx wdm_handler 389 | pop {r1-r3} 390 | mov rAcc, r0 @ Accumulator is result byte FIXME no status reg update - may be applicable only in some cases 391 | .endm 392 | 393 | /* register transfers */ 394 | 395 | .macro do_t src dst @ we also use this as a general primitive to load a reg with N and Z flag updates 396 | @ note that shifts can perturb the C bit (also cmp #0) 397 | @ (it might be quicker to test directly to set N and Z) 398 | @ (or indeed to hold values <<24 for most of the time) 399 | mov \dst, \src, lsl #24 @ shift to get N flag and to mask to a byte 400 | setflags_pre 401 | teq \dst, #0 402 | setflags_post 403 | mov \dst, \dst, lsr #24 @ consider asr, then we get sign extension for future use 404 | .endm 405 | 406 | .macro do_tax addressmode 407 | do_t rAcc rXreg 408 | .endm 409 | 410 | .macro do_tay addressmode 411 | do_t rAcc rYreg 412 | .endm 413 | 414 | .macro do_txa addressmode 415 | do_t rXreg rAcc 416 | .endm 417 | 418 | .macro do_tya addressmode 419 | do_t rYreg rAcc 420 | .endm 421 | 422 | .macro do_tsx addressmode 423 | do_t rSP rXreg 424 | .endm 425 | 426 | .macro do_txs addressmode 427 | mov rSP, rXreg @ perform directly because txs doesn't affect the flags 428 | .endm 429 | 430 | /* store */ 431 | .macro do_streg reg addressmode 432 | compute_ea_\addressmode r1 433 | strb \reg, [r1, rmem] 434 | .endm 435 | 436 | .macro do_sta addressmode 437 | do_streg rAcc \addressmode 438 | .endm 439 | 440 | .macro do_stx addressmode 441 | do_streg rXreg \addressmode 442 | .endm 443 | 444 | .macro do_sty addressmode 445 | do_streg rYreg \addressmode 446 | .endm 447 | 448 | /* load */ 449 | 450 | .macro load_operand_and_ea addressmode Rop Rea 451 | .ifc \addressmode,imm 452 | load_operand_byte \Rop 453 | .else 454 | compute_ea_\addressmode \Rea 455 | ldrb \Rop, [\Rea, rmem] 456 | .endif 457 | .endm 458 | 459 | .macro do_loadreg reg addressmode 460 | load_operand_and_ea \addressmode r0 r1 461 | do_t r0, \reg 462 | .endm 463 | 464 | .macro do_lda addressmode 465 | do_loadreg rAcc \addressmode 466 | .endm 467 | 468 | .macro do_ldx addressmode 469 | do_loadreg rXreg \addressmode 470 | .endm 471 | 472 | .macro do_ldy addressmode 473 | do_loadreg rYreg \addressmode 474 | .endm 475 | 476 | /* processor flags */ 477 | .macro do_sec addressmode 478 | orr rPbyteHi, #armCflag 479 | .endm 480 | 481 | .macro do_sed addressmode 482 | orr rPbyteLo, #pByteDflag 483 | .endm 484 | 485 | .macro do_sei addressmode 486 | orr rPbyteLo, #pByteIflag 487 | .endm 488 | 489 | .macro do_clc addressmode 490 | bic rPbyteHi, #armCflag 491 | .endm 492 | 493 | .macro do_cld addressmode 494 | bic rPbyteLo, #pByteDflag 495 | .endm 496 | 497 | .macro do_cli addressmode 498 | bic rPbyteLo, #pByteIflag 499 | .endm 500 | 501 | .macro do_clv addressmode 502 | bic rPbyteHi, #armVflag 503 | .endm 504 | 505 | /* branches */ 506 | 507 | .macro do_branch why 508 | ldrsb r0, [rPC, rmem] @ load a signed operand 509 | add rPC, #1 @ ignore case of wrapping at 0xffff 510 | setflags_pre 511 | it \why 512 | add\why rPC, r0 @ ignore case of wrapping at 0xffff 513 | .endm 514 | 515 | .macro do_bcc addressmode 516 | do_branch cc 517 | .endm 518 | 519 | .macro do_bcs addressmode 520 | do_branch cs 521 | .endm 522 | 523 | .macro do_beq addressmode 524 | do_branch eq 525 | .endm 526 | 527 | .macro do_bmi addressmode 528 | do_branch mi 529 | .endm 530 | 531 | .macro do_bne addressmode 532 | do_branch ne 533 | .endm 534 | 535 | .macro do_bpl addressmode 536 | do_branch pl 537 | .endm 538 | 539 | .macro do_bvc addressmode 540 | do_branch vc 541 | .endm 542 | 543 | .macro do_bvs addressmode 544 | do_branch vs 545 | .endm 546 | 547 | /* jumps and returns */ 548 | 549 | .macro do_jmp addressmode 550 | @ for efficiency in this case we don't use the macro load_2_operand_bytes 551 | ldrh rPC, [rPC, rmem] @ ignore case of wrapping 552 | .ifc \addressmode,ind 553 | ldrh rPC, [rPC, rmem] @ ignore case of wrapping 554 | .endif 555 | .endm 556 | 557 | .macro do_jsr addressmode 558 | load_operand_byte r0 559 | @ we have half our operand, and PC now ready for stack push 560 | add r1, rSP, #0xff @ 6502 stack is at 0x100 561 | strh rPC, [r1, rmem] @ ignore case of stack pointer wrapping between the 2 pushes 562 | sub rSP, #2 563 | and rSP, #0xff @ consider possibility of having bit 8 of rSP set to 1 always?? 564 | 565 | mov r1, r0 @ low byte of destination 566 | load_operand_byte r0 567 | add rPC, r1, r0, lsl #8 568 | .endm 569 | 570 | .macro do_brk addressmode 571 | add rPC, #1 @ ignore possibility of wrap 572 | 573 | @ push PC - this code very like the jsr 574 | add r1, rSP, #0xff @ 6502 stack is at 0x100 575 | strh rPC, [r1, rmem] @ ignore case of stack pointer wrapping between the 2 pushes 576 | sub rSP, #2 577 | and rSP, #0xff @ consider possibility of having bit 8 of rSP set to 1 always?? 578 | 579 | @ push pByte in 6502 format 580 | do_php imp 581 | orr rPbyteLo, #pByteIflag @ BRK sets interrupt disable just as IRQ would 582 | 583 | mov r0, #0x10000 584 | sub r0, #2 @ brk/irq vector is 0xfffe 585 | ldrh rPC, [r0, rmem] 586 | .endm 587 | 588 | .macro do_rts addressmode 589 | add r1, rSP, #0x101 @ 6502 stack is at 0x100 590 | ldrh rPC, [r1, rmem] @ ignore case of stack pointer wrapping between the 2 pulls 591 | add rSP, #2 592 | and rSP, #0xff @ deal with stack wrapping for once 593 | add rPC, #1 @ ignore possibility of wrap 594 | .endm 595 | 596 | .macro do_rti addressmode 597 | do_plp 598 | 599 | add r1, rSP, #0x101 @ 6502 stack is at 0x100 600 | ldrh rPC, [r1, rmem] @ ignore case of stack pointer wrapping between the 2 pulls 601 | add rSP, #2 @ ignore possibility of wrap 602 | and rSP, #0xff @ deal with stack wrapping for once 603 | .endm 604 | 605 | /* more stack operations */ 606 | 607 | .macro do_pha addressmode 608 | pushbyte rAcc 609 | .endm 610 | 611 | .macro pushbyte reg 612 | add r1, rSP, #0x100 613 | strb \reg, [r1, rmem] 614 | sub rSP, #1 615 | and rSP, #0xff 616 | .endm 617 | 618 | .macro pullbyte reg 619 | add rSP, #1 620 | and rSP, #0xff 621 | add r1, rSP, #0x100 622 | ldrb \reg, [r1, rmem] 623 | .endm 624 | 625 | .macro do_pla addressmode 626 | pullbyte rAcc 627 | do_t rAcc, rAcc 628 | .endm 629 | 630 | .macro do_php addressmode 631 | pByteToR0 632 | pushbyte r0 633 | .endm 634 | 635 | .macro do_plp addressmode 636 | pullbyte r0 637 | r0toPByte 638 | .endm 639 | 640 | /* at least one class of read modify write - inc and dec */ 641 | 642 | .macro do_rmw op addressmode 643 | compute_ea_\addressmode r1 @ calculate effective address and update PC 644 | ldrb r0, [r1, rmem] 645 | \op r0 @ operate, mask, update status flags 646 | strb r0, [r1, rmem] 647 | .endm 648 | 649 | .macro rmw_dec reg 650 | do_rmwincdec dec \reg 651 | .endm 652 | 653 | .macro rmw_inc reg 654 | do_rmwincdec inc \reg 655 | .endm 656 | 657 | .macro do_dec addressmode 658 | do_rmw rmw_dec \addressmode 659 | .endm 660 | 661 | .macro do_inc addressmode 662 | do_rmw rmw_inc \addressmode 663 | .endm 664 | 665 | .macro do_rmwincdec action reg 666 | @ FIXME this is not efficient: operating and then later transferring to set the flags 667 | .ifc \action, inc 668 | add r0, \reg, #1 669 | .else 670 | sub r0, \reg, #1 671 | .endif 672 | do_t r0, \reg 673 | .endm 674 | 675 | .macro do_inx addressmode 676 | do_rmwincdec inc rXreg 677 | .endm 678 | 679 | .macro do_iny addressmode 680 | do_rmwincdec inc rYreg 681 | .endm 682 | 683 | .macro do_dex addressmode 684 | do_rmwincdec dec rXreg 685 | .endm 686 | 687 | .macro do_dey addressmode 688 | do_rmwincdec dec rYreg 689 | .endm 690 | 691 | /* arithmetic and logical, 2-operand, not RMW */ 692 | 693 | .macro do_addsub addressmode op c @ not handling decimal mode! 694 | load_operand_and_ea \addressmode r0 r1 @ in this case we don't need the effective address 695 | mov r0, r0, asl #24 696 | mov rAcc, rAcc, asl #24 @ can't manage to combine shift with subtract - lacking reverse subtract with carry 697 | setflags_pre 698 | it \c 699 | orr\c r0, r0, rMask24 @ allow carry in to count 700 | \op r0, rAcc, r0 @ the overflow flag can only work if we shift everything by 24 701 | setflags_post 702 | mov rAcc, r0, lsr #24 @ this might all be cheaper if the acc was top-aligned (indexed addressing might be more expensive?) 703 | .endm 704 | 705 | .macro do_adc addressmode @ not handling decimal mode! 706 | do_addsub \addressmode adcs cs 707 | .endm 708 | 709 | .macro do_sbc addressmode @ not handling decimal mode! 710 | do_addsub \addressmode sbcs cc 711 | .endm 712 | 713 | .macro do_compare addressmode reg 714 | @ somewhat like addsub, but ARM CMP sets V flag whereas 6502 CMP does not 715 | load_operand_and_ea \addressmode r0 r1 @ in this case we don't need the effective address 716 | mov r0, r0, asl #24 @ we left-justify to get N correct 717 | mov r1, \reg, asl #24 718 | setflags_pre 719 | cmp r1, r0 @ this has set N and Z, not V (or C) 720 | MRS r0, APSR @ these manipulations feel pedestrian - could probably do better 721 | bic r0, #armVflag 722 | tst rPbyteHi, #armVflag 723 | it ne 724 | orrne r0, #armVflag 725 | mov rPbyteHi, r0 726 | .endm 727 | 728 | .macro do_cmp addressmode 729 | do_compare \addressmode rAcc 730 | .endm 731 | 732 | .macro do_cpx addressmode 733 | do_compare \addressmode rXreg 734 | .endm 735 | 736 | .macro do_cpy addressmode 737 | do_compare \addressmode rYreg 738 | .endm 739 | 740 | .macro do_logic addressmode op 741 | @ even for logic ops we need to shift to get N flag correct 742 | load_operand_and_ea \addressmode r0 r1 @ in this case we don't need the effective address 743 | \op r0, rAcc, r0 744 | do_t r0 rAcc 745 | .endm 746 | 747 | .macro do_and addressmode 748 | do_logic \addressmode and 749 | .endm 750 | 751 | .macro do_eor addressmode 752 | do_logic \addressmode eor 753 | .endm 754 | 755 | .macro do_ora addressmode 756 | do_logic \addressmode orr 757 | .endm 758 | 759 | .macro do_bit addressmode 760 | @ we don't need to shift for logic ops 761 | load_operand_and_ea \addressmode r0 r1 @ in this case we don't need the effective address 762 | 763 | @ N bit and V bit to be set from bits 7 and 6 of the operand 764 | @ r0: -------- xx xx NV------ 765 | @ r1: -Z------ xx xx -------- 766 | @ rPbyte: NZCV---- xx xx --11DI-- (Now split into rPbyteHi and rPbyteLo) 767 | 768 | bic rPbyteHi, #(armNflag | armZflag | armVflag) 769 | 770 | tst rAcc, r0 @ determine Z flag from AND 771 | it eq 772 | orreq rPbyteHi, #armZflag 773 | 774 | tst r0, #0x80 775 | it ne 776 | orrne rPbyteHi, #armNflag 777 | 778 | tst r0, #0x40 779 | it ne 780 | orrne rPbyteHi, #armVflag 781 | .endm 782 | 783 | 784 | /* shift and rotate - read modify write, or accumulator */ 785 | 786 | .macro do_asl addressmode 787 | .ifc \addressmode,acc 788 | setflags_pre 789 | movs rAcc, rAcc, lsl #25 790 | setflags_post 791 | mov rAcc, rAcc, lsr #24 792 | .else 793 | load_operand_and_ea \addressmode r0 r1 794 | setflags_pre 795 | movs r0, r0, lsl #25 796 | setflags_post 797 | mov r0, r0, lsr #24 798 | strb r0, [r1, rmem] 799 | .endif 800 | .endm 801 | 802 | .macro do_lsr addressmode 803 | .ifc \addressmode,acc 804 | setflags_pre 805 | movs rAcc, rAcc, lsr #1 806 | setflags_post 807 | .else 808 | load_operand_and_ea \addressmode r0 r1 809 | setflags_pre 810 | movs r0, r0, lsr #1 811 | setflags_post 812 | strb r0, [r1, rmem] 813 | .endif 814 | .endm 815 | 816 | .macro do_rol_inner reg 817 | setflags_pre 818 | adc \reg, \reg @ bring in carry, make 9-bit value 819 | lsls \reg, #24 @ left-justify, set flags 820 | setflags_post 821 | lsr \reg, #24 822 | .endm 823 | 824 | .macro do_ror_inner reg 825 | @ arm: C -- -- -- XX C 826 | @ arm: C XX -- -- -- C 827 | @ arm: C XX -- -- XX C 828 | @ arm: C -- -- -- XX C 829 | 830 | setflags_pre 831 | it cs 832 | orrcs \reg, #0x100 @ fixup the incoming carry 833 | tst \reg, #0x1 @ detect the outgoing carry 834 | it ne 835 | orrne \reg, #0x200 @ propagate the outgoing carry 836 | bic \reg, #0x1 @ clear bit 1 837 | lsls \reg, #23 @ left-justify to set N and Z 838 | setflags_post 839 | lsr \reg, #24 840 | .endm 841 | 842 | .macro do_rol addressmode 843 | @ arm ROL doesn't involve the C bit 844 | @ arm: -- -- -- XX C 845 | .ifc \addressmode,acc 846 | do_rol_inner rAcc 847 | .else 848 | load_operand_and_ea \addressmode r0 r1 849 | do_rol_inner r0 850 | strb r0, [r1, rmem] 851 | .endif 852 | .endm 853 | 854 | .macro do_ror addressmode 855 | .ifc \addressmode,acc 856 | do_ror_inner rAcc 857 | .else 858 | load_operand_and_ea \addressmode r0 r1 859 | do_ror_inner r0 860 | strb r0, [r1, rmem] 861 | .endif 862 | .endm 863 | 864 | /* 6502 instruction set */ 865 | op 00 brk imp 866 | op 01 ora inx 867 | op 02 bad non 868 | op 03 bad non 869 | op 04 bad non /* tsb zer @ 65c02 */ 870 | op 05 ora zer 871 | op 06 asl zer 872 | op 07 bad non 873 | 874 | op 08 php imp 875 | op 09 ora imm 876 | op 0a asl acc 877 | op 0b bad non 878 | op 0c bad non /* tsb abs @ 65c02 */ 879 | op 0d ora abs 880 | op 0e asl abs 881 | op 0f bad non 882 | 883 | op 10 bpl rel 884 | op 11 ora iny 885 | op 12 bad non /* ora drp @ 65c02 */ 886 | op 13 bad non 887 | op 14 bad non /* trb zer @ 65c02 */ 888 | op 15 ora zpx 889 | op 16 asl zpx 890 | op 17 bad non 891 | 892 | op 18 clc imp 893 | op 19 ora aby 894 | op 1a bad non /* inc imp @ 65c02 */ 895 | op 1b bad non 896 | op 1c bad non /* trb abs @ 65c02 */ 897 | op 1d ora abx 898 | op 1e asl abx 899 | op 1f bad non 900 | 901 | op 20 jsr abs 902 | op 21 and inx 903 | op 22 bad non 904 | op 23 bad non 905 | op 24 bit zer 906 | op 25 and zer 907 | op 26 rol zer 908 | op 27 bad non 909 | 910 | op 28 plp imp 911 | op 29 and imm 912 | op 2a rol acc 913 | op 2b bad non 914 | op 2c bit abs 915 | op 2d and abs 916 | op 2e rol abs 917 | op 2f bad non 918 | 919 | op 30 bmi rel 920 | op 31 and iny 921 | op 32 bad non /* and drp @ 65c02 */ 922 | op 33 bad non 923 | op 34 bad non /* bit zpx @ 65c02 */ 924 | op 35 and zpx 925 | op 36 rol zpx 926 | op 37 bad non 927 | 928 | op 38 sec imp 929 | op 39 and aby 930 | op 3a bad non /* dec imp @ 65c02 */ 931 | op 3b bad non 932 | op 3c bad non /* bit abx @ 65c02 */ 933 | op 3d and abx 934 | op 3e rol abx 935 | op 3f bad non 936 | 937 | op 40 rti imp 938 | op 41 eor inx 939 | op 42 wdm imm /* 65816 and emulation extension */ 940 | op 43 bad non 941 | op 44 bad non 942 | op 45 eor zer 943 | op 46 lsr zer 944 | op 47 bad non 945 | 946 | op 48 pha imp 947 | op 49 eor imm 948 | op 4a lsr acc 949 | op 4b bad non 950 | op 4c jmp abs 951 | op 4d eor abs 952 | op 4e lsr abs 953 | op 4f bad non 954 | 955 | op 50 bvc rel 956 | op 51 eor iny 957 | op 52 bad non /* eor drp @ 65c02 */ 958 | op 53 bad non 959 | op 54 bad non 960 | op 55 eor zpx 961 | op 56 lsr zpx 962 | op 57 bad non 963 | 964 | op 58 cli imp 965 | op 59 eor aby 966 | op 5a bad non /* phy imp @ 65c02 */ 967 | op 5b bad non 968 | op 5c bad non 969 | op 5d eor abx 970 | op 5e lsr abx 971 | op 5f bad non 972 | 973 | op 60 rts imp 974 | op 61 adc inx 975 | op 62 bad non 976 | op 63 bad non 977 | op 64 bad non /* stz zer @ 65c02 */ 978 | op 65 adc zer 979 | op 66 ror zer 980 | op 67 bad non 981 | 982 | op 68 pla imp 983 | op 69 adc imm 984 | op 6a ror acc 985 | op 6b bad non 986 | op 6c jmp ind 987 | op 6d adc abs 988 | op 6e ror abs 989 | op 6f bad non 990 | 991 | op 70 bvs rel 992 | op 71 adc iny 993 | op 72 bad non /* adc drp @ 65c02 */ 994 | op 73 bad non 995 | op 74 bad non /* stz zpx @ 65c02 */ 996 | op 75 adc zpx 997 | op 76 ror zpx 998 | op 77 bad non 999 | 1000 | op 78 sei imp 1001 | op 79 adc aby 1002 | op 7a bad non /* ply imp @ 65c02 */ 1003 | op 7b bad non 1004 | op 7c bad non /* jmp inx @ 65c02 */ 1005 | op 7d adc abx 1006 | op 7e ror abx 1007 | op 7f bad non 1008 | 1009 | op 80 bad non /* bra rel @ 65c02 */ 1010 | op 81 sta inx 1011 | op 82 bad non 1012 | op 83 bad non 1013 | op 84 sty zer 1014 | op 85 sta zer 1015 | op 86 stx zer 1016 | op 87 bad non 1017 | 1018 | op 88 dey imp 1019 | op 89 bad non /* bit imm @ 65c02 */ 1020 | op 8a txa imp 1021 | op 8b bad non 1022 | op 8c sty abs 1023 | op 8d sta abs 1024 | op 8e stx abs 1025 | op 8f bad non 1026 | 1027 | op 90 bcc rel 1028 | op 91 sta iny 1029 | op 92 bad non /* sta drp @ 65c02 */ 1030 | op 93 bad non 1031 | op 94 sty zpx 1032 | op 95 sta zpx 1033 | op 96 stx zpy 1034 | op 97 bad non 1035 | 1036 | op 98 tya imp 1037 | op 99 sta aby 1038 | op 9a txs imp 1039 | op 9b bad non 1040 | op 9c bad non /* stz abs @ 65c02 */ 1041 | op 9d sta abx 1042 | op 9e bad non /* stz abx @ 65c02 */ 1043 | op 9f bad non 1044 | 1045 | op a0 ldy imm 1046 | op a1 lda inx 1047 | op a2 ldx imm 1048 | op a3 bad non 1049 | op a4 ldy zer 1050 | op a5 lda zer 1051 | op a6 ldx zer 1052 | op a7 bad non 1053 | 1054 | op a8 tay imp 1055 | op a9 lda imm 1056 | op aa tax imp 1057 | op ab bad non 1058 | op ac ldy abs 1059 | op ad lda abs 1060 | op ae ldx abs 1061 | op af bad non 1062 | 1063 | op b0 bcs rel 1064 | op b1 lda iny 1065 | op b2 bad non /* lda drp @ 65c02 */ 1066 | op b3 bad non 1067 | op b4 ldy zpx 1068 | op b5 lda zpx 1069 | op b6 ldx zpy 1070 | op b7 bad non 1071 | 1072 | op b8 clv imp 1073 | op b9 lda aby 1074 | op ba tsx imp 1075 | op bb bad non 1076 | op bc ldy abx 1077 | op bd lda abx 1078 | op be ldx aby 1079 | op bf bad non 1080 | 1081 | op c0 cpy imm 1082 | op c1 cmp inx 1083 | op c2 bad non 1084 | op c3 bad non 1085 | op c4 cpy zer 1086 | op c5 cmp zer 1087 | op c6 dec zer 1088 | op c7 bad non 1089 | 1090 | op c8 iny imp 1091 | op c9 cmp imm 1092 | op ca dex imp 1093 | op cb bad non 1094 | op cc cpy abs 1095 | op cd cmp abs 1096 | op ce dec abs 1097 | op cf bad non 1098 | 1099 | op d0 bne rel 1100 | op d1 cmp iny 1101 | op d2 bad non /* cmp drp @ 65c02 */ 1102 | op d3 bad non 1103 | op d4 bad non 1104 | op d5 cmp zpx 1105 | op d6 dec zpx 1106 | op d7 bad non 1107 | 1108 | op d8 cld imp 1109 | op d9 cmp aby 1110 | op da bad non /* phx imp @ 65c02 */ 1111 | op db bad non 1112 | op dc bad non 1113 | op dd cmp abx 1114 | op de dec abx 1115 | op df bad non 1116 | 1117 | op e0 cpx imm 1118 | op e1 sbc inx 1119 | op e2 bad non 1120 | op e3 bad non 1121 | op e4 cpx zer 1122 | op e5 sbc zer 1123 | op e6 inc zer 1124 | op e7 bad non 1125 | 1126 | op e8 inx imp 1127 | op e9 sbc imm 1128 | op ea nop imp 1129 | op eb bad non 1130 | op ec cpx abs 1131 | op ed sbc abs 1132 | op ee inc abs 1133 | op ef bad non 1134 | 1135 | op f0 beq rel 1136 | op f1 sbc iny 1137 | op f2 bad non /* sbc drp @ 65c02 */ 1138 | op f3 bad non 1139 | op f4 bad non 1140 | op f5 sbc zpx 1141 | op f6 inc zpx 1142 | op f7 bad non 1143 | 1144 | op f8 sed imp 1145 | op f9 sbc aby 1146 | op fa bad non /* plx imp @ 65c02 */ 1147 | op fb bad non 1148 | op fc bad non 1149 | op fd sbc abx 1150 | op fe inc abx 1151 | op ff bad non 1152 | 1153 | @ EOF 1154 | -------------------------------------------------------------------------------- /COPYING.GPL3: -------------------------------------------------------------------------------- 1 | 2 | GNU GENERAL PUBLIC LICENSE 3 | Version 3, 29 June 2007 4 | 5 | Copyright (C) 2007 Free Software Foundation, Inc. 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The GNU General Public License is a free, copyleft license for 12 | software and other kinds of works. 13 | 14 | The licenses for most software and other practical works are designed 15 | to take away your freedom to share and change the works. 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Patents. 473 | 474 | A "contributor" is a copyright holder who authorizes use under this 475 | License of the Program or a work on which the Program is based. The 476 | work thus licensed is called the contributor's "contributor version". 477 | 478 | A contributor's "essential patent claims" are all patent claims 479 | owned or controlled by the contributor, whether already acquired or 480 | hereafter acquired, that would be infringed by some manner, permitted 481 | by this License, of making, using, or selling its contributor version, 482 | but do not include claims that would be infringed only as a 483 | consequence of further modification of the contributor version. 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No Surrender of Others' Freedom. 542 | 543 | If conditions are imposed on you (whether by court order, agreement or 544 | otherwise) that contradict the conditions of this License, they do not 545 | excuse you from the conditions of this License. If you cannot convey a 546 | covered work so as to satisfy simultaneously your obligations under this 547 | License and any other pertinent obligations, then as a consequence you may 548 | not convey it at all. For example, if you agree to terms that obligate you 549 | to collect a royalty for further conveying from those to whom you convey 550 | the Program, the only way you could satisfy both those terms and this 551 | License would be to refrain entirely from conveying the Program. 552 | 553 | 13. Use with the GNU Affero General Public License. 554 | 555 | Notwithstanding any other provision of this License, you have 556 | permission to link or combine any covered work with a work licensed 557 | under version 3 of the GNU Affero General Public License into a single 558 | combined work, and to convey the resulting work. The terms of this 559 | License will continue to apply to the part which is the covered work, 560 | but the special requirements of the GNU Affero General Public License, 561 | section 13, concerning interaction through a network will apply to the 562 | combination as such. 563 | 564 | 14. Revised Versions of this License. 565 | 566 | The Free Software Foundation may publish revised and/or new versions of 567 | the GNU General Public License from time to time. Such new versions will 568 | be similar in spirit to the present version, but may differ in detail to 569 | address new problems or concerns. 570 | 571 | Each version is given a distinguishing version number. If the 572 | Program specifies that a certain numbered version of the GNU General 573 | Public License "or any later version" applies to it, you have the 574 | option of following the terms and conditions either of that numbered 575 | version or of any later version published by the Free Software 576 | Foundation. If the Program does not specify a version number of the 577 | GNU General Public License, you may choose any version ever published 578 | by the Free Software Foundation. 579 | 580 | If the Program specifies that a proxy can decide which future 581 | versions of the GNU General Public License can be used, that proxy's 582 | public statement of acceptance of a version permanently authorizes you 583 | to choose that version for the Program. 584 | 585 | Later license versions may give you additional or different 586 | permissions. However, no additional obligations are imposed on any 587 | author or copyright holder as a result of your choosing to follow a 588 | later version. 589 | 590 | 15. Disclaimer of Warranty. 591 | 592 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY 593 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT 594 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY 595 | OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, 596 | THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 597 | PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM 598 | IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF 599 | ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 600 | 601 | 16. Limitation of Liability. 602 | 603 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 604 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS 605 | THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY 606 | GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE 607 | USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF 608 | DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD 609 | PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), 610 | EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF 611 | SUCH DAMAGES. 612 | 613 | 17. Interpretation of Sections 15 and 16. 614 | 615 | If the disclaimer of warranty and limitation of liability provided 616 | above cannot be given local legal effect according to their terms, 617 | reviewing courts shall apply local law that most closely approximates 618 | an absolute waiver of all civil liability in connection with the 619 | Program, unless a warranty or assumption of liability accompanies a 620 | copy of the Program in return for a fee. 621 | 622 | END OF TERMS AND CONDITIONS 623 | 624 | How to Apply These Terms to Your New Programs 625 | 626 | If you develop a new program, and you want it to be of the greatest 627 | possible use to the public, the best way to achieve this is to make it 628 | free software which everyone can redistribute and change under these terms. 629 | 630 | To do so, attach the following notices to the program. It is safest 631 | to attach them to the start of each source file to most effectively 632 | state the exclusion of warranty; and each file should have at least 633 | the "copyright" line and a pointer to where the full notice is found. 634 | 635 | 636 | Copyright (C) 637 | 638 | This program is free software: you can redistribute it and/or modify 639 | it under the terms of the GNU General Public License as published by 640 | the Free Software Foundation, either version 3 of the License, or 641 | (at your option) any later version. 642 | 643 | This program is distributed in the hope that it will be useful, 644 | but WITHOUT ANY WARRANTY; without even the implied warranty of 645 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 646 | GNU General Public License for more details. 647 | 648 | You should have received a copy of the GNU General Public License 649 | along with this program. If not, see . 650 | 651 | Also add information on how to contact you by electronic and paper mail. 652 | 653 | If the program does terminal interaction, make it output a short 654 | notice like this when it starts in an interactive mode: 655 | 656 | Copyright (C) 657 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 658 | This is free software, and you are welcome to redistribute it 659 | under certain conditions; type `show c' for details. 660 | 661 | The hypothetical commands `show w' and `show c' should show the appropriate 662 | parts of the General Public License. Of course, your program's commands 663 | might be different; for a GUI interface, you would use an "about box". 664 | 665 | You should also get your employer (if you work as a programmer) or school, 666 | if any, to sign a "copyright disclaimer" for the program, if necessary. 667 | For more information on this, and how to apply and follow the GNU GPL, see 668 | . 669 | 670 | The GNU General Public License does not permit incorporating your program 671 | into proprietary programs. If your program is a subroutine library, you 672 | may consider it more useful to permit linking proprietary applications with 673 | the library. If this is what you want to do, use the GNU Lesser General 674 | Public License instead of this License. But first, please read 675 | . 676 | 677 | --------------------------------------------------------------------------------