├── .github └── workflows │ └── compile.yml ├── .gitignore ├── .gitmodules ├── CODE_OF_CONDUCT.md ├── LICENSE ├── Makefile ├── README.md ├── SECURITY.md ├── SUPPORT.md ├── archdoc ├── .gitignore ├── LICENSE ├── LICENSE-sail-cheri-riscv ├── LICENSE-sail-riscv ├── Makefile ├── acknowledgments.tex ├── app-isaquick-riscv-macros.tex ├── app-isaquick-riscv.tex ├── app-isaquick-table-macros.tex ├── app-related.tex ├── bib-sorting.conf ├── chap-abi.tex ├── chap-altbounds.tex ├── chap-changes.tex ├── chap-cheri-riscv.tex ├── chap-cheri-rtos.tex ├── chap-compartment-model.tex ├── chap-compressed-changes.tex ├── chap-encoding-sail.tex ├── chap-intro.tex ├── chap-isaref-riscv.tex ├── chap-language-extensions.tex ├── chap-permissions.tex ├── chap-weaknesses.tex ├── cheri.bib ├── cheriot-architecture.tex ├── def-riscv-insns-macros.tex ├── def-riscv-insns.tex ├── fig-representable-regions.tex ├── fig-sentry-plt.tex ├── fig-type-token.tex ├── glossary.tex ├── insn-riscv │ ├── auicgp.tex │ ├── auipcc.tex │ ├── candperm.tex │ ├── ccleartag.tex │ ├── cgetaddr.tex │ ├── cgetbase.tex │ ├── cgethigh.tex │ ├── cgetlen.tex │ ├── cgetperm.tex │ ├── cgettag.tex │ ├── cgettop.tex │ ├── cgettype.tex │ ├── cincoffset.tex │ ├── cincoffsetimm.tex │ ├── cjal.tex │ ├── cjalr.tex │ ├── cmove.tex │ ├── crepresentablealignmentmask.tex │ ├── croundrepresentablelength.tex │ ├── cseal.tex │ ├── csetaddr.tex │ ├── csetbounds.tex │ ├── csetboundsexact.tex │ ├── csetboundsimm.tex │ ├── csetboundsrounddown.tex │ ├── csetequalexact.tex │ ├── csethigh.tex │ ├── cspecialrw.tex │ ├── csub.tex │ ├── ctestsubset.tex │ ├── cunseal.tex │ ├── lc.tex │ └── sc.tex ├── latexmkrc ├── misc │ ├── cap_alignment_table.ipynb │ └── perms │ │ ├── Makefile │ │ ├── perms.py │ │ ├── perms5_clustered.dot │ │ ├── perms5_clustered.pdf │ │ └── perms_clustered.png ├── preamble-saildoc-macros.tex └── preamble.tex ├── cgmanifest.json ├── descr ├── etc └── headache_config ├── handwritten_support ├── ROOT ├── cheri_extras.lem ├── cheri_extras.v └── dummy_assembly_mappings.sail ├── opam ├── properties ├── .gitignore ├── Makefile ├── proplib.sail ├── props.sail └── props_setboundsrounddown.sail ├── qtest ├── Makefile └── qtest.ml ├── sail-cheri-riscv.install ├── src ├── cheri_addr_checks.sail ├── cheri_cap_common.sail ├── cheri_decode_ext.sail ├── cheri_insts.sail ├── cheri_insts_begin.sail ├── cheri_insts_cext.sail ├── cheri_insts_end.sail ├── cheri_mem.sail ├── cheri_mem_metadata.sail ├── cheri_misa_ext.sail ├── cheri_pc_access.sail ├── cheri_prelude.sail ├── cheri_pte.sail ├── cheri_ptw.sail ├── cheri_reg_type.sail ├── cheri_regs.sail ├── cheri_riscv_types.sail ├── cheri_scr_map.sail ├── cheri_step_ext.sail ├── cheri_step_rvfi.sail ├── cheri_sys_exceptions.sail ├── cheri_sys_regs.sail ├── cheri_types.sail └── cheri_vmem_types.sail └── test └── run_tests.sh /.github/workflows/compile.yml: -------------------------------------------------------------------------------- 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