├── C910_RTL_FACTORY ├── gen_rtl │ ├── biu │ │ └── rtl │ │ │ ├── ct_biu_csr_req_arbiter.v │ │ │ ├── ct_biu_lowpower.v │ │ │ ├── ct_biu_other_io_sync.v │ │ │ ├── ct_biu_read_channel.v │ │ │ ├── ct_biu_req_arbiter.v │ │ │ ├── ct_biu_snoop_channel.v │ │ │ ├── ct_biu_top.v │ │ │ └── ct_biu_write_channel.v │ ├── ciu │ │ └── rtl │ │ │ ├── ct_ciu_apbif.v │ │ │ ├── ct_ciu_bmbif.v │ │ │ ├── ct_ciu_bmbif_kid.v │ │ │ ├── ct_ciu_ctcq.v │ │ │ ├── ct_ciu_ctcq_reqq_entry.v │ │ │ ├── ct_ciu_ctcq_respq_entry.v │ │ │ ├── ct_ciu_ebiuif.v │ │ │ ├── ct_ciu_l2cif.v │ │ │ ├── ct_ciu_ncq.v │ │ │ ├── ct_ciu_ncq_gm.v │ │ │ ├── ct_ciu_regs.v │ │ │ ├── ct_ciu_regs_kid.v │ │ │ ├── ct_ciu_snb.v │ │ │ ├── ct_ciu_snb_arb.v │ │ │ ├── ct_ciu_snb_dp_sel.v │ │ │ ├── ct_ciu_snb_dp_sel_16.v │ │ │ ├── ct_ciu_snb_dp_sel_8.v │ │ │ ├── ct_ciu_snb_sab.v │ │ │ ├── ct_ciu_snb_sab_entry.v │ │ │ ├── ct_ciu_top.v │ │ │ ├── ct_ciu_vb.v │ │ │ ├── ct_ciu_vb_aw_entry.v │ │ │ ├── ct_ebiu_cawt_entry.v │ │ │ ├── ct_ebiu_lowpower.v │ │ │ ├── ct_ebiu_ncwt_entry.v │ │ │ ├── ct_ebiu_read_channel.v │ │ │ ├── ct_ebiu_snoop_channel_dummy.v │ │ │ ├── ct_ebiu_top.v │ │ │ ├── ct_ebiu_write_channel.v │ │ │ ├── ct_fifo.v │ │ │ ├── ct_piu_other_io.v │ │ │ ├── ct_piu_other_io_dummy.v │ │ │ ├── ct_piu_other_io_sync.v │ │ │ ├── ct_piu_top.v │ │ │ ├── ct_piu_top_dummy.v │ │ │ ├── ct_piu_top_dummy_device.v │ │ │ └── ct_prio.v │ ├── clint │ │ └── rtl │ │ │ ├── ct_clint_func.v │ │ │ └── ct_clint_top.v │ ├── clk │ │ └── rtl │ │ │ ├── ct_clk_top.v │ │ │ ├── ct_mp_clk_top.v │ │ │ └── gated_clk_cell.v │ ├── common │ │ └── rtl │ │ │ ├── BUFGCE.v │ │ │ ├── booth_code.v │ │ │ ├── booth_code_v1.v │ │ │ ├── compressor_32.v │ │ │ ├── compressor_42.v │ │ │ ├── sync_level2level.v │ │ │ └── sync_level2pulse.v │ ├── cp0 │ │ └── rtl │ │ │ ├── ct_cp0_iui.v │ │ │ ├── ct_cp0_lpmd.v │ │ │ ├── ct_cp0_regs.v │ │ │ └── ct_cp0_top.v │ ├── cpu │ │ └── rtl │ │ │ ├── cpu_cfig.h │ │ │ ├── ct_core.v │ │ │ ├── ct_rmu_top_dummy.v │ │ │ ├── ct_sysio_kid.v │ │ │ ├── ct_sysio_top.v │ │ │ ├── ct_top.v │ │ │ ├── mp_top_golden_port.v │ │ │ ├── openC910.v │ │ │ └── top_golden_port.v │ ├── filelists │ │ └── C910_asic_rtl.fl │ ├── fpga │ │ └── rtl │ │ │ ├── ct_f_spsram_1024x128.v │ │ │ ├── ct_f_spsram_1024x144.v │ │ │ ├── ct_f_spsram_1024x32.v │ │ │ ├── ct_f_spsram_1024x59.v │ │ │ ├── ct_f_spsram_1024x64.v │ │ │ ├── ct_f_spsram_1024x92.v │ │ │ ├── ct_f_spsram_128x104.v │ │ │ ├── ct_f_spsram_128x144.v │ │ │ ├── ct_f_spsram_128x16.v │ │ │ ├── ct_f_spsram_16384x128.v │ │ │ ├── ct_f_spsram_2048x128.v │ │ │ ├── ct_f_spsram_2048x144.v │ │ │ ├── ct_f_spsram_2048x32.v │ │ │ ├── ct_f_spsram_2048x59.v │ │ │ ├── ct_f_spsram_2048x88.v │ │ │ ├── ct_f_spsram_256x100.v │ │ │ ├── ct_f_spsram_256x144.v │ │ │ ├── ct_f_spsram_256x196.v │ │ │ ├── ct_f_spsram_256x23.v │ │ │ ├── ct_f_spsram_256x52.v │ │ │ ├── ct_f_spsram_256x54.v │ │ │ ├── ct_f_spsram_256x59.v │ │ │ ├── ct_f_spsram_256x7.v │ │ │ ├── ct_f_spsram_256x84.v │ │ │ ├── ct_f_spsram_32768x128.v │ │ │ ├── ct_f_spsram_4096x128.v │ │ │ ├── ct_f_spsram_4096x144.v │ │ │ ├── ct_f_spsram_4096x32.v │ │ │ ├── ct_f_spsram_4096x84.v │ │ │ ├── ct_f_spsram_512x144.v │ │ │ ├── ct_f_spsram_512x22.v │ │ │ ├── ct_f_spsram_512x44.v │ │ │ ├── ct_f_spsram_512x52.v │ │ │ ├── ct_f_spsram_512x54.v │ │ │ ├── ct_f_spsram_512x59.v │ │ │ ├── ct_f_spsram_512x7.v │ │ │ ├── ct_f_spsram_512x96.v │ │ │ ├── ct_f_spsram_64x108.v │ │ │ ├── ct_f_spsram_65536x128.v │ │ │ ├── ct_f_spsram_8192x128.v │ │ │ ├── ct_f_spsram_8192x32.v │ │ │ └── fpga_ram.v │ ├── had │ │ └── rtl │ │ │ ├── ct_had_bkpt.v │ │ │ ├── ct_had_common_dbg_info.v │ │ │ ├── ct_had_common_regs.v │ │ │ ├── ct_had_common_top.v │ │ │ ├── ct_had_ctrl.v │ │ │ ├── ct_had_dbg_info.v │ │ │ ├── ct_had_ddc_ctrl.v │ │ │ ├── ct_had_ddc_dp.v │ │ │ ├── ct_had_etm.v │ │ │ ├── ct_had_etm_if.v │ │ │ ├── ct_had_event.v │ │ │ ├── ct_had_io.v │ │ │ ├── ct_had_ir.v │ │ │ ├── ct_had_nirv_bkpt.v │ │ │ ├── ct_had_pcfifo.v │ │ │ ├── ct_had_private_ir.v │ │ │ ├── ct_had_private_top.v │ │ │ ├── ct_had_regs.v │ │ │ ├── ct_had_serial.v │ │ │ ├── ct_had_sm.v │ │ │ ├── ct_had_sync_3flop.v │ │ │ └── ct_had_trace.v │ ├── idu │ │ └── rtl │ │ │ ├── ct_idu_dep_reg_entry.v │ │ │ ├── ct_idu_dep_reg_src2_entry.v │ │ │ ├── ct_idu_dep_vreg_entry.v │ │ │ ├── ct_idu_dep_vreg_srcv2_entry.v │ │ │ ├── ct_idu_id_ctrl.v │ │ │ ├── ct_idu_id_decd.v │ │ │ ├── ct_idu_id_decd_special.v │ │ │ ├── ct_idu_id_dp.v │ │ │ ├── ct_idu_id_fence.v │ │ │ ├── ct_idu_id_split_long.v │ │ │ ├── ct_idu_id_split_short.v │ │ │ ├── ct_idu_ir_ctrl.v │ │ │ ├── ct_idu_ir_decd.v │ │ │ ├── ct_idu_ir_dp.v │ │ │ ├── ct_idu_ir_frt.v │ │ │ ├── ct_idu_ir_rt.v │ │ │ ├── ct_idu_ir_vrt.v │ │ │ ├── ct_idu_is_aiq0.v │ │ │ ├── ct_idu_is_aiq0_entry.v │ │ │ ├── ct_idu_is_aiq1.v │ │ │ ├── ct_idu_is_aiq1_entry.v │ │ │ ├── ct_idu_is_aiq_lch_rdy_1.v │ │ │ ├── ct_idu_is_aiq_lch_rdy_2.v │ │ │ ├── ct_idu_is_aiq_lch_rdy_3.v │ │ │ ├── ct_idu_is_biq.v │ │ │ ├── ct_idu_is_biq_entry.v │ │ │ ├── ct_idu_is_ctrl.v │ │ │ ├── ct_idu_is_dp.v │ │ │ ├── ct_idu_is_lsiq.v │ │ │ ├── ct_idu_is_lsiq_entry.v │ │ │ ├── ct_idu_is_pipe_entry.v │ │ │ ├── ct_idu_is_sdiq.v │ │ │ ├── ct_idu_is_sdiq_entry.v │ │ │ ├── ct_idu_is_viq0.v │ │ │ ├── ct_idu_is_viq0_entry.v │ │ │ ├── ct_idu_is_viq1.v │ │ │ ├── ct_idu_is_viq1_entry.v │ │ │ ├── ct_idu_rf_ctrl.v │ │ │ ├── ct_idu_rf_dp.v │ │ │ ├── ct_idu_rf_fwd.v │ │ │ ├── ct_idu_rf_fwd_preg.v │ │ │ ├── ct_idu_rf_fwd_vreg.v │ │ │ ├── ct_idu_rf_pipe0_decd.v │ │ │ ├── ct_idu_rf_pipe1_decd.v │ │ │ ├── ct_idu_rf_pipe2_decd.v │ │ │ ├── ct_idu_rf_pipe3_decd.v │ │ │ ├── ct_idu_rf_pipe4_decd.v │ │ │ ├── ct_idu_rf_pipe6_decd.v │ │ │ ├── ct_idu_rf_pipe7_decd.v │ │ │ ├── ct_idu_rf_prf_eregfile.v │ │ │ ├── ct_idu_rf_prf_fregfile.v │ │ │ ├── ct_idu_rf_prf_gated_ereg.v │ │ │ ├── ct_idu_rf_prf_gated_preg.v │ │ │ ├── ct_idu_rf_prf_gated_vreg.v │ │ │ ├── ct_idu_rf_prf_pregfile.v │ │ │ ├── ct_idu_rf_prf_vregfile.v │ │ │ └── ct_idu_top.v │ ├── ifu │ │ └── rtl │ │ │ ├── ct_ifu_addrgen.v │ │ │ ├── ct_ifu_bht.v │ │ │ ├── ct_ifu_bht_pre_array.v │ │ │ ├── ct_ifu_bht_sel_array.v │ │ │ ├── ct_ifu_btb.v │ │ │ ├── ct_ifu_btb_data_array.v │ │ │ ├── ct_ifu_btb_tag_array.v │ │ │ ├── ct_ifu_debug.v │ │ │ ├── ct_ifu_decd_normal.v │ │ │ ├── ct_ifu_ibctrl.v │ │ │ ├── ct_ifu_ibdp.v │ │ │ ├── ct_ifu_ibuf.v │ │ │ ├── ct_ifu_ibuf_entry.v │ │ │ ├── ct_ifu_icache_data_array0.v │ │ │ ├── ct_ifu_icache_data_array1.v │ │ │ ├── ct_ifu_icache_if.v │ │ │ ├── ct_ifu_icache_predecd_array0.v │ │ │ ├── ct_ifu_icache_predecd_array1.v │ │ │ ├── ct_ifu_icache_tag_array.v │ │ │ ├── ct_ifu_ifctrl.v │ │ │ ├── ct_ifu_ifdp.v │ │ │ ├── ct_ifu_ind_btb.v │ │ │ ├── ct_ifu_ind_btb_array.v │ │ │ ├── ct_ifu_ipb.v │ │ │ ├── ct_ifu_ipctrl.v │ │ │ ├── ct_ifu_ipdecode.v │ │ │ ├── ct_ifu_ipdp.v │ │ │ ├── ct_ifu_l0_btb.v │ │ │ ├── ct_ifu_l0_btb_entry.v │ │ │ ├── ct_ifu_l1_refill.v │ │ │ ├── ct_ifu_lbuf.v │ │ │ ├── ct_ifu_lbuf_entry.v │ │ │ ├── ct_ifu_pcfifo_if.v │ │ │ ├── ct_ifu_pcgen.v │ │ │ ├── ct_ifu_precode.v │ │ │ ├── ct_ifu_ras.v │ │ │ ├── ct_ifu_sfp.v │ │ │ ├── ct_ifu_sfp_entry.v │ │ │ ├── ct_ifu_top.v │ │ │ ├── ct_ifu_vector.v │ │ │ ├── ct_spsram_1024x59.v │ │ │ ├── ct_spsram_1024x64.v │ │ │ ├── ct_spsram_128x16.v │ │ │ ├── ct_spsram_2048x32_split.v │ │ │ ├── ct_spsram_2048x59.v │ │ │ ├── ct_spsram_256x23.v │ │ │ ├── ct_spsram_256x59.v │ │ │ ├── ct_spsram_512x22.v │ │ │ ├── ct_spsram_512x44.v │ │ │ └── ct_spsram_512x59.v │ ├── iu │ │ └── rtl │ │ │ ├── ct_iu_alu.v │ │ │ ├── ct_iu_bju.v │ │ │ ├── ct_iu_bju_pcfifo.v │ │ │ ├── ct_iu_bju_pcfifo_entry.v │ │ │ ├── ct_iu_bju_pcfifo_read_entry.v │ │ │ ├── ct_iu_cbus.v │ │ │ ├── ct_iu_div.v │ │ │ ├── ct_iu_div_entry.v │ │ │ ├── ct_iu_div_srt_radix16.v │ │ │ ├── ct_iu_mult.v │ │ │ ├── ct_iu_rbus.v │ │ │ ├── ct_iu_special.v │ │ │ ├── ct_iu_top.v │ │ │ └── multiplier_65x65_3_stage.v │ ├── l2c │ │ └── rtl │ │ │ ├── ct_l2c_cmp.v │ │ │ ├── ct_l2c_data.v │ │ │ ├── ct_l2c_icc.v │ │ │ ├── ct_l2c_prefetch.v │ │ │ ├── ct_l2c_sub_bank.v │ │ │ ├── ct_l2c_tag.v │ │ │ ├── ct_l2c_tag_ecc.v │ │ │ ├── ct_l2c_top.v │ │ │ ├── ct_l2c_wb.v │ │ │ ├── ct_l2cache_data_array.v │ │ │ ├── ct_l2cache_dirty_array_16way.v │ │ │ ├── ct_l2cache_tag_array_16way.v │ │ │ ├── ct_l2cache_top.v │ │ │ ├── ct_spsram_1024x128.v │ │ │ ├── ct_spsram_1024x144.v │ │ │ ├── ct_spsram_1024x92.v │ │ │ ├── ct_spsram_128x104.v │ │ │ ├── ct_spsram_128x144.v │ │ │ ├── ct_spsram_16384x128.v │ │ │ ├── ct_spsram_2048x128.v │ │ │ ├── ct_spsram_2048x144.v │ │ │ ├── ct_spsram_2048x88.v │ │ │ ├── ct_spsram_256x100.v │ │ │ ├── ct_spsram_256x144.v │ │ │ ├── ct_spsram_32768x128.v │ │ │ ├── ct_spsram_4096x128.v │ │ │ ├── ct_spsram_4096x144.v │ │ │ ├── ct_spsram_4096x84.v │ │ │ ├── ct_spsram_512x144.v │ │ │ ├── ct_spsram_512x96.v │ │ │ ├── ct_spsram_64x108.v │ │ │ ├── ct_spsram_65536x128.v │ │ │ └── ct_spsram_8192x128.v │ ├── lsu │ │ └── rtl │ │ │ ├── ct_lsu_amr.v │ │ │ ├── ct_lsu_bus_arb.v │ │ │ ├── ct_lsu_cache_buffer.v │ │ │ ├── ct_lsu_ctrl.v │ │ │ ├── ct_lsu_dcache_arb.v │ │ │ ├── ct_lsu_dcache_data_array.v │ │ │ ├── ct_lsu_dcache_dirty_array.v │ │ │ ├── ct_lsu_dcache_info_update.v │ │ │ ├── ct_lsu_dcache_ld_tag_array.v │ │ │ ├── ct_lsu_dcache_tag_array.v │ │ │ ├── ct_lsu_dcache_top.v │ │ │ ├── ct_lsu_icc.v │ │ │ ├── ct_lsu_idfifo_8.v │ │ │ ├── ct_lsu_idfifo_entry.v │ │ │ ├── ct_lsu_ld_ag.v │ │ │ ├── ct_lsu_ld_da.v │ │ │ ├── ct_lsu_ld_dc.v │ │ │ ├── ct_lsu_ld_wb.v │ │ │ ├── ct_lsu_lfb.v │ │ │ ├── ct_lsu_lfb_addr_entry.v │ │ │ ├── ct_lsu_lfb_data_entry.v │ │ │ ├── ct_lsu_lm.v │ │ │ ├── ct_lsu_lq.v │ │ │ ├── ct_lsu_lq_entry.v │ │ │ ├── ct_lsu_mcic.v │ │ │ ├── ct_lsu_pfu.v │ │ │ ├── ct_lsu_pfu_gpfb.v │ │ │ ├── ct_lsu_pfu_gsdb.v │ │ │ ├── ct_lsu_pfu_pfb_entry.v │ │ │ ├── ct_lsu_pfu_pfb_l1sm.v │ │ │ ├── ct_lsu_pfu_pfb_l2sm.v │ │ │ ├── ct_lsu_pfu_pfb_tsm.v │ │ │ ├── ct_lsu_pfu_pmb_entry.v │ │ │ ├── ct_lsu_pfu_sdb_cmp.v │ │ │ ├── ct_lsu_pfu_sdb_entry.v │ │ │ ├── ct_lsu_rb.v │ │ │ ├── ct_lsu_rb_entry.v │ │ │ ├── ct_lsu_rot_data.v │ │ │ ├── ct_lsu_sd_ex1.v │ │ │ ├── ct_lsu_snoop_ctcq.v │ │ │ ├── ct_lsu_snoop_ctcq_entry.v │ │ │ ├── ct_lsu_snoop_req_arbiter.v │ │ │ ├── ct_lsu_snoop_resp.v │ │ │ ├── ct_lsu_snoop_snq.v │ │ │ ├── ct_lsu_snoop_snq_entry.v │ │ │ ├── ct_lsu_spec_fail_predict.v │ │ │ ├── ct_lsu_sq.v │ │ │ ├── ct_lsu_sq_entry.v │ │ │ ├── ct_lsu_st_ag.v │ │ │ ├── ct_lsu_st_da.v │ │ │ ├── ct_lsu_st_dc.v │ │ │ ├── ct_lsu_st_wb.v │ │ │ ├── ct_lsu_top.v │ │ │ ├── ct_lsu_vb.v │ │ │ ├── ct_lsu_vb_addr_entry.v │ │ │ ├── ct_lsu_vb_sdb_data.v │ │ │ ├── ct_lsu_vb_sdb_data_entry.v │ │ │ ├── ct_lsu_wmb.v │ │ │ ├── ct_lsu_wmb_ce.v │ │ │ ├── ct_lsu_wmb_entry.v │ │ │ ├── ct_spsram_1024x32.v │ │ │ ├── ct_spsram_2048x32.v │ │ │ ├── ct_spsram_256x52.v │ │ │ ├── ct_spsram_256x54.v │ │ │ ├── ct_spsram_256x7.v │ │ │ ├── ct_spsram_4096x32.v │ │ │ ├── ct_spsram_512x52.v │ │ │ ├── ct_spsram_512x54.v │ │ │ ├── ct_spsram_512x7.v │ │ │ └── ct_spsram_8192x32.v │ ├── mmu │ │ └── rtl │ │ │ ├── ct_mmu_arb.sv │ │ │ ├── ct_mmu_dplru.sv │ │ │ ├── ct_mmu_dutlb.sv │ │ │ ├── ct_mmu_dutlb_entry.sv │ │ │ ├── ct_mmu_dutlb_huge_entry.sv │ │ │ ├── ct_mmu_dutlb_read.sv │ │ │ ├── ct_mmu_iplru.sv │ │ │ ├── ct_mmu_iutlb.sv │ │ │ ├── ct_mmu_iutlb_entry.sv │ │ │ ├── ct_mmu_iutlb_fst_entry.sv │ │ │ ├── ct_mmu_jtlb.sv │ │ │ ├── ct_mmu_jtlb_data_array.sv │ │ │ ├── ct_mmu_jtlb_tag_array.sv │ │ │ ├── ct_mmu_ptw.sv │ │ │ ├── ct_mmu_regs.sv │ │ │ ├── ct_mmu_sysmap.sv │ │ │ ├── ct_mmu_sysmap_hit.sv │ │ │ ├── ct_mmu_tlboper.sv │ │ │ ├── ct_mmu_top.sv │ │ │ ├── ct_spsram_256x196.v │ │ │ ├── ct_spsram_256x84.v │ │ │ └── sysmap.h │ ├── plic │ │ └── rtl │ │ │ ├── csky_apb_1tox_matrix.v │ │ │ ├── plic_32to1_arb.v │ │ │ ├── plic_arb_ctrl.v │ │ │ ├── plic_ctrl.v │ │ │ ├── plic_granu2_arb.v │ │ │ ├── plic_granu_arb.v │ │ │ ├── plic_hart_arb.v │ │ │ ├── plic_hreg_busif.v │ │ │ ├── plic_int_kid.v │ │ │ ├── plic_kid_busif.v │ │ │ └── plic_top.v │ ├── pmp │ │ └── rtl │ │ │ ├── ct_pmp_acc.v │ │ │ ├── ct_pmp_comp_hit.v │ │ │ ├── ct_pmp_regs.v │ │ │ └── ct_pmp_top.v │ ├── pmu │ │ └── rtl │ │ │ ├── ct_hpcp_adder_sel.v │ │ │ ├── ct_hpcp_cnt.v │ │ │ ├── ct_hpcp_cntinten_reg.v │ │ │ ├── ct_hpcp_cntof_reg.v │ │ │ ├── ct_hpcp_event.v │ │ │ └── ct_hpcp_top.v │ ├── rst │ │ └── rtl │ │ │ ├── ct_mp_rst_top.v │ │ │ └── ct_rst_top.v │ ├── rtu │ │ └── rtl │ │ │ ├── ct_rtu_compare_iid.v │ │ │ ├── ct_rtu_encode_32.v │ │ │ ├── ct_rtu_encode_64.v │ │ │ ├── ct_rtu_encode_8.v │ │ │ ├── ct_rtu_encode_96.v │ │ │ ├── ct_rtu_expand_32.v │ │ │ ├── ct_rtu_expand_64.v │ │ │ ├── ct_rtu_expand_8.v │ │ │ ├── ct_rtu_expand_96.v │ │ │ ├── ct_rtu_pst_ereg.v │ │ │ ├── ct_rtu_pst_ereg_entry.v │ │ │ ├── ct_rtu_pst_preg.v │ │ │ ├── ct_rtu_pst_preg_entry.v │ │ │ ├── ct_rtu_pst_vreg.v │ │ │ ├── ct_rtu_pst_vreg_dummy.v │ │ │ ├── ct_rtu_pst_vreg_entry.v │ │ │ ├── ct_rtu_retire.v │ │ │ ├── ct_rtu_rob.v │ │ │ ├── ct_rtu_rob_entry.v │ │ │ ├── ct_rtu_rob_expt.v │ │ │ ├── ct_rtu_rob_rt.v │ │ │ └── ct_rtu_top.v │ ├── vfalu │ │ └── rtl │ │ │ ├── ct_fadd_close_s0_d.v │ │ │ ├── ct_fadd_close_s0_h.v │ │ │ ├── ct_fadd_close_s1_d.v │ │ │ ├── ct_fadd_close_s1_h.v │ │ │ ├── ct_fadd_ctrl.v │ │ │ ├── ct_fadd_double_dp.v │ │ │ ├── ct_fadd_half_dp.v │ │ │ ├── ct_fadd_onehot_sel_d.v │ │ │ ├── ct_fadd_onehot_sel_h.v │ │ │ ├── ct_fadd_scalar_dp.v │ │ │ ├── ct_fadd_top.v │ │ │ ├── ct_fcnvt_ctrl.v │ │ │ ├── ct_fcnvt_double_dp.v │ │ │ ├── ct_fcnvt_dtoh_sh.v │ │ │ ├── ct_fcnvt_dtos_sh.v │ │ │ ├── ct_fcnvt_ftoi_sh.v │ │ │ ├── ct_fcnvt_htos_sh.v │ │ │ ├── ct_fcnvt_itof_sh.v │ │ │ ├── ct_fcnvt_scalar_dp.v │ │ │ ├── ct_fcnvt_stod_sh.v │ │ │ ├── ct_fcnvt_stoh_sh.v │ │ │ ├── ct_fcnvt_top.v │ │ │ ├── ct_fspu_ctrl.v │ │ │ ├── ct_fspu_double.v │ │ │ ├── ct_fspu_dp.v │ │ │ ├── ct_fspu_half.v │ │ │ ├── ct_fspu_single.v │ │ │ ├── ct_fspu_top.v │ │ │ ├── ct_vfalu_dp_pipe6.v │ │ │ ├── ct_vfalu_dp_pipe7.v │ │ │ ├── ct_vfalu_top_pipe6.v │ │ │ └── ct_vfalu_top_pipe7.v │ ├── vfdsu │ │ └── rtl │ │ │ ├── ct_vfdsu_ctrl.v │ │ │ ├── ct_vfdsu_double.v │ │ │ ├── ct_vfdsu_ff1.v │ │ │ ├── ct_vfdsu_pack.v │ │ │ ├── ct_vfdsu_prepare.v │ │ │ ├── ct_vfdsu_round.v │ │ │ ├── ct_vfdsu_scalar_dp.v │ │ │ ├── ct_vfdsu_srt.v │ │ │ ├── ct_vfdsu_srt_radix16_bound_table.v │ │ │ ├── ct_vfdsu_srt_radix16_only_div.v │ │ │ ├── ct_vfdsu_srt_radix16_with_sqrt.v │ │ │ └── ct_vfdsu_top.v │ ├── vfmau │ │ └── rtl │ │ │ ├── ct_vfmau_ctrl.v │ │ │ ├── ct_vfmau_dp.v │ │ │ ├── ct_vfmau_ff1_10bit.v │ │ │ ├── ct_vfmau_lza.v │ │ │ ├── ct_vfmau_lza_32.v │ │ │ ├── ct_vfmau_lza_42.v │ │ │ ├── ct_vfmau_lza_simd_half.v │ │ │ ├── ct_vfmau_mult1.v │ │ │ ├── ct_vfmau_mult_compressor.v │ │ │ ├── ct_vfmau_mult_simd_half.v │ │ │ └── ct_vfmau_top.v │ └── vfpu │ │ └── rtl │ │ ├── ct_vfpu_cbus.v │ │ ├── ct_vfpu_ctrl.v │ │ ├── ct_vfpu_dp.v │ │ ├── ct_vfpu_rbus.v │ │ └── ct_vfpu_top.v └── setup │ └── setup.csh ├── README.md ├── doc ├── openc910_datasheet.pdf ├── 玄铁C910用户手册.pdf └── 玄铁C910集成手册.pdf ├── smart_run ├── Makefile ├── impl │ ├── mem_icg_test │ │ ├── README │ │ ├── cpu_bht_mem_test_tb.v │ │ ├── cpu_btb_mem_test_tb.v │ │ ├── cpu_dmem_test_tb.v │ │ ├── cpu_icg_test_tb.v │ │ ├── cpu_ifupred_mem_test_tb.v │ │ ├── cpu_imem_test_tb.v │ │ ├── cpu_l2_mem_test_tb.v │ │ ├── cpu_mem_icg_check_top.v │ │ ├── cpu_mmu_mem_test_tb.v │ │ ├── filelist_mem_icg_test │ │ ├── mem_icg_check_top.v │ │ └── run_mem_icg_test │ ├── memlist │ │ └── memlist.pl │ ├── sdc │ │ ├── ct_top.sdc │ │ └── openC910.sdc │ └── upf │ │ └── example_cpu_power_spec.upf ├── logical │ ├── ahb │ │ ├── ahb.v │ │ └── ahb2apb.v │ ├── apb │ │ ├── apb.v │ │ └── apb_bridge.v │ ├── axi │ │ ├── axi2ahb.v │ │ ├── axi_err128.v │ │ ├── axi_fifo.v │ │ ├── axi_fifo_entry.v │ │ ├── axi_interconnect128.v │ │ └── axi_slave128.v │ ├── common │ │ ├── BUFGCE.v │ │ ├── clk_gen.v │ │ ├── cpu_sub_system_axi.v │ │ ├── err_gen.v │ │ ├── fifo_counter.v │ │ ├── fpga_clk_gen.v │ │ ├── rv_integration_platform.v │ │ ├── soc.v │ │ ├── timer.v │ │ ├── wid_entry.v │ │ └── wid_for_axi4.v │ ├── filelists │ │ ├── ip.fl │ │ ├── sim.fl │ │ ├── sim_verilator.fl │ │ ├── smart.fl │ │ ├── tb.fl │ │ └── tb_verilator.fl │ ├── gpio │ │ ├── gpio.v │ │ ├── gpio_apbif.v │ │ └── gpio_ctrl.v │ ├── mem │ │ ├── f_spsram_32768x128.v │ │ ├── f_spsram_large.v │ │ ├── mem_ctrl.v │ │ └── ram.v │ ├── pmu │ │ ├── pmu.v │ │ ├── px_had_sync.v │ │ ├── sync.v │ │ └── tap2_sm.v │ ├── tb │ │ ├── Makefile_obj │ │ ├── int_mnt.v │ │ ├── sim_main1.cpp │ │ ├── tb.v │ │ └── tb_verilator.v │ └── uart │ │ ├── uart.v │ │ ├── uart_apb_reg.v │ │ ├── uart_baud_gen.v │ │ ├── uart_ctrl.v │ │ ├── uart_receive.v │ │ └── uart_trans.v ├── setup │ ├── env_check.mk │ ├── example_setup.csh │ ├── nc.tcl │ └── smart_cfg.mk ├── tests │ ├── bin │ │ └── Srec2vmem │ ├── cases │ │ ├── ISA │ │ │ ├── ISA_AMO │ │ │ │ └── ct_lsu_amo_basic_smart.s │ │ │ ├── ISA_BARRIER │ │ │ │ └── ct_lsu_barrier_smart.s │ │ │ ├── ISA_FP │ │ │ │ └── ct_fpu_smoke.s │ │ │ ├── ISA_IMAC │ │ │ │ └── ct_imac_smoke.s │ │ │ └── ISA_THEAD │ │ │ │ └── isa_thead_smoke.s │ │ ├── MMU │ │ │ └── ct_mmu_basic.s │ │ ├── cache │ │ │ └── idcache_oper │ │ │ │ └── ct_idcache_oper.s │ │ ├── coremark │ │ │ ├── core_list_join.c │ │ │ ├── core_main.c │ │ │ ├── core_matrix.c │ │ │ ├── core_portme.c │ │ │ ├── core_portme.h │ │ │ ├── core_state.c │ │ │ ├── core_util.c │ │ │ ├── coremark.h │ │ │ └── cvt.c │ │ ├── csr │ │ │ └── ct_csr_operate.s │ │ ├── debug │ │ │ ├── debug_gpr │ │ │ │ ├── debug_read_write_gpr.s │ │ │ │ ├── debug_read_write_gpr.v │ │ │ │ └── had_drv.vh │ │ │ ├── debug_memory │ │ │ │ ├── debug_read_write_memory.s │ │ │ │ ├── debug_read_write_memory.v │ │ │ │ └── had_drv.vh │ │ │ ├── debug_stim.v │ │ │ ├── debug_stim_gpr.v │ │ │ └── debug_stim_memory.v │ │ ├── exception │ │ │ └── ct_expt_smoke.s │ │ ├── hello_world │ │ │ └── hello_world.c │ │ ├── interrupt │ │ │ ├── int_hw_smoke │ │ │ │ ├── ct_plic_int_smoke_hw.s │ │ │ │ └── ct_plic_int_smoke_hw.v │ │ │ └── int_smoke │ │ │ │ ├── ct_plic_int_smoke.s │ │ │ │ └── ct_plic_int_smoke_hw.v │ │ ├── sleep │ │ │ ├── sleep_test.c │ │ │ └── sleep_test.vh │ │ └── smoke │ │ │ └── bus_smoke │ │ │ └── ct_bus_smoke.s │ ├── lib │ │ ├── Makefile │ │ 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