├── DDR3-21-06-10.v ├── HDMI.v ├── Keyboard.v ├── MMD.v ├── MUL-DIV-MOD.v ├── P1080.v ├── P720.v ├── README.md └── VGA8BitsPerPixel.v /DDR3-21-06-10.v: -------------------------------------------------------------------------------- 1 | `timescale 1 ns / 1 ps 2 | 3 | /////////////////////////////////////////////// 4 | // // 5 | // WARNING THIS CODE IS UNTESTED // 6 | // USE AT YOUR OWN RISK // 7 | // // 8 | /////////////////////////////////////////////// 9 | 10 | /////////////////////////////////////////////// 11 | 12 | // Demo SDRAM controller for MT48LC1M16A1 legacy SDRAM 13 | // (C) fpga4fun.com & KNJN LLC 2014 14 | 15 | // Changes made for MT41K256M16 and the Nexys Video from Digilent Inc. 16 | // by Gregory S. Callen 2021 17 | 18 | // The MT48LC1M16A1 is a 16Mb SDRAM arranged in 1M x 16bits (using 2 banks) 19 | // The MT41K256M16 is a 4Gb SDRAM arranged in 256M x 16bits (using 8 banks) 20 | 21 | // This controller feature set has been reduced to make it easy to understand 22 | // It is based on a more complete controller targeted for Xylo-EM and Xylo-LM boards 23 | 24 | // Assumptions: 25 | // 1. the SDRAM has been initialized with CAS latency=2, and any valid burst mode 26 | // 2. the read agent is active enough to refresh the RAM (if not, add a refresh timer) 27 | 28 | // For more info, check 29 | // http://www.fpga4fun.com/SDRAM.html 30 | 31 | /////////////////////////////////////////////// 32 | 33 | module DDR3( 34 | input clk, 35 | 36 | // read agent 37 | input RdReq, 38 | output RdGnt, 39 | input [27:0] RdAddr, 40 | output reg [15:0] RdData, 41 | output RdDataValid, 42 | 43 | // write agent 44 | input WrReq, 45 | output WrGnt, 46 | input [27:0] WrAddr, 47 | input [15:0] WrData, 48 | 49 | // SDRAM 50 | output ddr3_cke, ddr3_we_n, ddr3_cas_n, ddr3_ras_n, ddr3_dq_oe, 51 | output reg [14:0] ddr3_addr, 52 | output reg [2:0] ddr3_ba, 53 | output reg [1:0] ddr3_dm = 2'b11, 54 | inout [15:0] ddr3_dq 55 | ); 56 | 57 | assign ddr3_cke = 1'b1; 58 | 59 | localparam [2:0] SDRAM_CMD_LOADMODE = 3'b000; 60 | localparam [2:0] SDRAM_CMD_REFRESH = 3'b001; 61 | localparam [2:0] SDRAM_CMD_PRECHARGE = 3'b010; 62 | localparam [2:0] SDRAM_CMD_ACTIVE = 3'b011; 63 | localparam [2:0] SDRAM_CMD_WRITE = 3'b100; 64 | localparam [2:0] SDRAM_CMD_READ = 3'b101; 65 | localparam [2:0] SDRAM_CMD_NOP = 3'b111; 66 | 67 | reg [2:0] SDRAM_CMD = SDRAM_CMD_NOP; 68 | assign {ddr3_ras_n, ddr3_cas_n, ddr3_we_n} = SDRAM_CMD; 69 | 70 | // here we decide which of reads or writes have priority 71 | wire read_now = RdReq; // give priority to read requests 72 | wire write_now = ~RdReq & WrReq; // and if a read is not requested, give writes a chance... 73 | 74 | reg [2:0] state=3'h4; 75 | reg ReadSelected=0; always @(posedge clk) if(state==3'h0) ReadSelected <= read_now; 76 | wire WriteSelected = ~ReadSelected; 77 | 78 | wire ReadCycle = (state==3'h0) ? read_now : ReadSelected; 79 | wire [27:0] Addr = ReadCycle ? RdAddr : WrAddr; 80 | reg [27:0] AddrR=0; always @(posedge clk) AddrR <= Addr; 81 | 82 | wire SameRowAndBank = (Addr[27:10]==AddrR[27:10]); 83 | assign RdGnt = (state==3'h0 & read_now) | (state==3'h1 & ReadSelected & RdReq & SameRowAndBank); 84 | assign WrGnt = (state==3'h0 & write_now) | (state==3'h1 & WriteSelected & WrReq & SameRowAndBank); 85 | 86 | reg cke_flag <= 1'b0; 87 | reg rstn_flag <= 1'b0; 88 | reg [31:0] ticks <= 0; 89 | 90 | wire ddr3_reset_n = rstn_flag ? 1'b1 : 1'b0; 91 | wire ddr3_cke = cke_flag ? 1'd1 : 1'b0; 92 | wire sys_reset = resetn and mem_ready and clk_locked; 93 | 94 | always @(posedge clk) begin 95 | ticks <= ticks + 1; 96 | if ( sys_reset == 0 ) begin 97 | cke_flag <= 1'b0; 98 | rstn_flag <= 1'b0; 99 | ticks <= 0; 100 | state <= 3'h4; 101 | end 102 | case(state) 103 | 3'h0: begin 104 | if(RdReq | WrReq) begin // is there a read or write request? 105 | SDRAM_CMD <= SDRAM_CMD_ACTIVE; // if so activate 106 | ddr3_ba <= Addr[27:25]; // this bank 107 | ddr3_addr <= Addr[24:10]; // this row 108 | ddr3_dm <= 2'b11; 109 | state <= 3'h1; 110 | end else begin 111 | SDRAM_CMD <= SDRAM_CMD_NOP; // otherwise stay idle 112 | ddr3_ba <= 0; 113 | ddr3_addr <= 0; 114 | ddr3_dm <= 2'b11; 115 | state <= 3'h0; 116 | end 117 | end 118 | 3'h1: begin 119 | SDRAM_CMD <= ReadSelected ? SDRAM_CMD_READ : SDRAM_CMD_WRITE; 120 | ddr3_ba <= AddrR[27:25]; 121 | ddr3_addr <= {5'b00000, AddrR[9:0]}; // column 122 | ddr3_addr[10] <= 1'b0; // no auto-precharge 123 | ddr3_dm <= 2'b00; 124 | state <= (ReadSelected ? RdReq : WrReq) & SameRowAndBank ? 3'h1 : 3'h2; 125 | end 126 | 3'h2: begin 127 | $time; 128 | $display("precharge\n"); 129 | SDRAM_CMD <= SDRAM_CMD_PRECHARGE; // close the row when we're done with it 130 | ddr3_ba <= 0; 131 | ddr3_addr <= 11'b100_0000_0000; // all banks precharge 132 | ddr3_dm <= 2'b11; 133 | ticks <= 0; 134 | state <= 3'h0; 135 | end 136 | 3'h3: begin 137 | if ( ticks > 6000000 ) begin // precharge after 60 ms @ 100MHz 138 | state <= 3'h2; 139 | end else begin 140 | SDRAM_CMD <= SDRAM_CMD_NOP; 141 | ddr3_ba <= 0; 142 | ddr3_addr <= 0; 143 | ddr3_dm <= 2'b11; 144 | state <= 3'h0; 145 | end 146 | end 147 | 3'h4: begin 148 | if ( ticks > 22000 ) begin // 220 µs @ 100MHz 149 | rstn_flag <= 1'b1; 150 | $time; 151 | $display("rstn ready\n"); 152 | end 153 | if ( ticks > 75000 ) begin // 750 µs @ 100MHz 154 | cke_flag <= 1'b1; 155 | $time; 156 | $display("cke ready\n"); 157 | end 158 | if ( ticks > 75300 ) begin // 753 µs @ 100MHz 159 | state <= 3'h0; 160 | $time; 161 | $display("all clear\n"); 162 | end 163 | end 164 | endcase 165 | end 166 | 167 | localparam trl = 4; // total read latency is the SDRAM CAS-latency (two) plus the SDRAM controller induced latency (two) 168 | reg [trl-1:0] RdDataValidPipe; 169 | always @(posedge clk) RdDataValidPipe <= {RdDataValidPipe[trl-2:0], state==2'h1 & ReadSelected}; 170 | assign RdDataValid = RdDataValidPipe[trl-1]; 171 | always @(posedge clk) RdData <= ddr3_dq; 172 | 173 | reg ddr3_dq_oe = 1'b0; always @(posedge clk) ddr3_dq_oe <= (state==2'h1) & WriteSelected; 174 | reg [15:0] WrData1=0; always @(posedge clk) WrData1 <= WrData; 175 | reg [15:0] WrData2=0; always @(posedge clk) WrData2 <= WrData1; 176 | 177 | assign ddr3_dq = ddr3_dq_oe ? WrData2 : 16'hZZZZ; 178 | endmodule 179 | /////////////////////////////////////////////// 180 | -------------------------------------------------------------------------------- /HDMI.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 1ps 2 | 3 | module VID720 ( 4 | input MHz74_25, 5 | input MHz371_25, 6 | input [23:0] pixel, 7 | output [11:0] xpos, 8 | output [11:0] ypos, 9 | output reg DrawArea, 10 | output TMDSp_clock, 11 | output TMDSn_clock, 12 | output [ 2:0] TMDSp, 13 | output [ 2:0] TMDSn 14 | ); 15 | 16 | OBUFDS #( 17 | .IOSTANDARD("DEFAULT"), 18 | .SLEW("SLOW") 19 | ) OBUFDS_red ( 20 | .O(TMDSp[2]), 21 | .OB(TMDSn[2]), 22 | .I(redo[~MHz371_25]) 23 | ); 24 | 25 | OBUFDS #( 26 | .IOSTANDARD("DEFAULT"), 27 | .SLEW("SLOW") 28 | ) OBUFDS_grn ( 29 | .O(TMDSp[1]), 30 | .OB(TMDSn[1]), 31 | .I(grno[~MHz371_25]) 32 | ); 33 | 34 | OBUFDS #( 35 | .IOSTANDARD("DEFAULT"), 36 | .SLEW("SLOW") 37 | ) OBUFDS_blu ( 38 | .O(TMDSp[0]), 39 | .OB(TMDSn[0]), 40 | .I(bluo[~MHz371_25]) 41 | ); 42 | 43 | OBUFDS #( 44 | .IOSTANDARD("DEFAULT"), 45 | .SLEW("SLOW") 46 | ) OBUFDS_clock ( 47 | .O(TMDSp_clock), 48 | .OB(TMDSn_clock), 49 | .I(MHz74_25) 50 | ); 51 | 52 | parameter hsp = 1; 53 | parameter hfp = 110; 54 | parameter hbp = 150; 55 | parameter htb = 370; 56 | parameter hva = 1280; 57 | parameter htp = 1650; 58 | 59 | parameter vsp = 1; 60 | parameter vfp = 5; 61 | parameter vbp = 10; 62 | parameter vtb = 30; 63 | parameter vva = 720; 64 | parameter vtl = 750; 65 | 66 | reg hSync = ~hsp; 67 | reg vSync = ~vsp; 68 | 69 | initial begin 70 | DrawArea = 0; 71 | end 72 | 73 | reg [11:0] CounterX = 0; 74 | reg [11:0] CounterY = 0; 75 | 76 | reg [ 3:0] bits = 4'b1111; 77 | reg [ 7:0] redi = 0, grni = 0, blui = 0; 78 | reg [19:0] redo = 0, grno = 0, bluo = 0; 79 | 80 | wire [9:0] TMDS_red, TMDS_grn, TMDS_blu; 81 | 82 | assign xpos = CounterX - htb; 83 | assign ypos = CounterY - vtb; 84 | 85 | TMDS_encoder encode_R(.clock(MHz74_25),.Video(DrawArea),.Cntrl(2'b00),.Color(redi),.TMDS(TMDS_red)); 86 | TMDS_encoder encode_G(.clock(MHz74_25),.Video(DrawArea),.Cntrl(2'b00),.Color(grni),.TMDS(TMDS_grn)); 87 | TMDS_encoder encode_B(.clock(MHz74_25),.Video(DrawArea),.Cntrl({vSync,hSync}),.Color(blui),.TMDS(TMDS_blu)); 88 | 89 | always @ ( posedge MHz371_25 ) begin 90 | redo <= redo >> 2; 91 | grno <= grno >> 2; 92 | bluo <= bluo >> 2; 93 | if ( ~bits[0] ) begin 94 | redo[19:10] <= TMDS_red; 95 | grno[19:10] <= TMDS_grn; 96 | bluo[19:10] <= TMDS_blu; 97 | end 98 | bits <= bits[0] ? bits >> 1 : 4'b1111; 99 | end 100 | 101 | always @ ( posedge MHz74_25 ) begin 102 | DrawArea <= ( CounterX > htb ) && ( CounterY > vtb ); 103 | if ( CounterX == htp ) CounterY <= CounterY == vtl ? 1 : CounterY + 1; 104 | CounterX <= ( CounterX == htp ) ? 1 : CounterX + 1; 105 | hSync <= ( CounterX >= hfp ) && ( CounterX < hbp ); 106 | vSync <= ( CounterY >= vfp ) && ( CounterY < vbp ); 107 | redi <= pixel [23:16]; 108 | grni <= pixel [15: 8]; 109 | blui <= pixel [ 7: 0]; 110 | end 111 | 112 | endmodule // end P720 113 | 114 | module TMDS_encoder ( 115 | input wire clock, 116 | input wire Video, 117 | input wire [1:0] Cntrl, 118 | input wire [7:0] Color, 119 | output reg [9:0] TMDS 120 | ); 121 | 122 | reg [3:0] balance_acc = 0; 123 | reg [9:0] TEMP = 10'd0; 124 | 125 | wire [3:0] Nb1s = Color[0] + Color[1] + Color[2] + Color[3] + Color[4] + Color[5] + Color[6] + Color[7]; 126 | wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && Color[0]==1'b0); 127 | wire [8:0] q_m = {~XNOR, q_m[6:0] ^ Color[7:1] ^ {7{XNOR}}, Color[0]}; 128 | 129 | wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4; 130 | wire balance_sign_eq = (balance[3] == balance_acc[3]); 131 | wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq; 132 | wire [3:0] balance_acc_inc = balance - ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0)); 133 | wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc; 134 | wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}}; 135 | wire [9:0] TMDS_code = Cntrl[1] ? (Cntrl[0] ? 10'b1010101011 : 10'b0101010100) : (Cntrl[0] ? 10'b0010101011 : 10'b1101010100); 136 | 137 | always @ ( posedge clock ) TMDS <= TEMP; 138 | always @ ( posedge clock ) TEMP <= Video ? TMDS_data : TMDS_code; 139 | always @ ( posedge clock ) balance_acc <= Video ? balance_acc_new : 4'h0; 140 | 141 | endmodule // end TMDS 142 | -------------------------------------------------------------------------------- /Keyboard.v: -------------------------------------------------------------------------------- 1 | `timescale 1 ns/10 ps 2 | 3 | module Keyboard( 4 | input wire clk, 5 | input wire PS2C, 6 | input wire PS2D, 7 | output wire [6:0] seg, 8 | output wire [7:0] an 9 | ); 10 | 11 | reg [31:0] data; 12 | reg [31:0] hold; 13 | 14 | wire [7:0] key; 15 | wire flag; 16 | 17 | initial begin 18 | data <= 0; 19 | hold <= 0; 20 | end 21 | 22 | ps2 keyboard ( clk, PS2C, PS2D, flag, key ); 23 | Eight7Segments e7s ( clk, data, seg, an ); 24 | 25 | always @ ( posedge clk ) begin 26 | if ( flag ) begin 27 | hold <= 0; 28 | end else begin 29 | if ( hold < 10000 ) hold <= hold + 1; 30 | end 31 | if ( hold == 4500 ) begin 32 | data [31:24] <= data [23:16]; 33 | data [23:16] <= data [15:8]; 34 | data [15: 8] <= data [7:0]; 35 | data [ 7: 0] <= key; 36 | end 37 | end 38 | 39 | endmodule 40 | 41 | module ps2 ( 42 | input wire clk, 43 | input wire PS2C, 44 | input wire PS2D, 45 | output reg flag, 46 | output reg [7:0] key 47 | ); 48 | 49 | reg [ 3:0] counter; 50 | reg [ 7:0] data_curr; 51 | reg error; 52 | reg parity; 53 | reg pre_clk; 54 | reg [11:0] ticks; 55 | 56 | initial begin 57 | counter = 4'h1; 58 | data_curr = 8'hF0; 59 | error = 1'd0; 60 | flag = 1'b0; 61 | key = 8'hF0; 62 | parity = 1'b1; 63 | pre_clk = 1'b0; 64 | ticks = 12'd0; 65 | end 66 | 67 | // FSM 68 | always @ ( posedge clk ) begin 69 | ticks = ticks + 12'd1; 70 | if ( ticks >= 4000 ) begin 71 | ticks = 12'd0; 72 | if (( ~PS2C ) && pre_clk ) begin 73 | case ( counter ) 74 | 1:; 75 | 2: begin data_curr [0] <= PS2D; parity <= parity ^ PS2D; end 76 | 3: begin data_curr [1] <= PS2D; parity <= parity ^ PS2D; end 77 | 4: begin data_curr [2] <= PS2D; parity <= parity ^ PS2D; end 78 | 5: begin data_curr [3] <= PS2D; parity <= parity ^ PS2D; end 79 | 6: begin data_curr [4] <= PS2D; parity <= parity ^ PS2D; end 80 | 7: begin data_curr [5] <= PS2D; parity <= parity ^ PS2D; end 81 | 8: begin data_curr [6] <= PS2D; parity <= parity ^ PS2D; end 82 | 9: begin data_curr [7] <= PS2D; parity <= parity ^ PS2D; end 83 | 10: begin flag = 1'b1; if ( parity != PS2D ) error <= 1; end 84 | 11: if ( ~error ) flag = 1'b0; 85 | endcase 86 | if (( counter == 1 ) && ( ~PS2D )) begin 87 | counter <= 4'd2; 88 | parity <= 1; 89 | error <= 0; 90 | end else if (( counter >= 2 ) && ( counter < 11 )) 91 | counter <= counter + 4'h1; 92 | else 93 | counter <= 4'h1; 94 | end 95 | pre_clk <= PS2C; 96 | end 97 | end 98 | 99 | always @ ( negedge flag ) begin 100 | key <= data_curr; 101 | end 102 | 103 | endmodule 104 | 105 | module Eight7Segments( 106 | input wire clk, 107 | input wire [31:0] data, 108 | output wire [ 6:0] seg, 109 | output reg [ 7:0] an 110 | ); 111 | reg [ 3:0] display; 112 | reg [20:0] counter; 113 | 114 | HEXdecoder hd ( display, seg ); 115 | 116 | always @ ( * ) begin 117 | an = 255; 118 | an [ counter [20:18] ] = 0; 119 | case ( counter [20:18] ) 120 | 0 : display = data [ 3: 0]; 121 | 1 : display = data [ 7: 4]; 122 | 2 : display = data [11: 8]; 123 | 3 : display = data [15:12]; 124 | 4 : display = data [19:16]; 125 | 5 : display = data [23:20]; 126 | 6 : display = data [27:24]; 127 | 7 : display = data [31:28]; 128 | endcase 129 | end 130 | 131 | always @ ( posedge clk ) begin 132 | counter <= counter + 21'd1; 133 | end 134 | 135 | endmodule 136 | 137 | module HEXdecoder( 138 | input wire [3:0] data, 139 | output wire [6:0] segment 140 | ); 141 | wire [6:0] hex [15:0]; 142 | 143 | assign segment = hex [ data ]; 144 | 145 | assign hex [ 0] = 7'b1000000; 146 | assign hex [ 1] = 7'b1111001; 147 | assign hex [ 2] = 7'b0100100; 148 | assign hex [ 3] = 7'b0110000; 149 | assign hex [ 4] = 7'b0011001; 150 | assign hex [ 5] = 7'b0010010; 151 | assign hex [ 6] = 7'b0000010; 152 | assign hex [ 7] = 7'b1111000; 153 | assign hex [ 8] = 7'b0000000; 154 | assign hex [ 9] = 7'b0010000; 155 | assign hex [10] = 7'b0001000; 156 | assign hex [11] = 7'b0000011; 157 | assign hex [12] = 7'b1000110; 158 | assign hex [13] = 7'b0100001; 159 | assign hex [14] = 7'b0000110; 160 | assign hex [15] = 7'b0001110; 161 | 162 | endmodule 163 | -------------------------------------------------------------------------------- /MMD.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 1ps 2 | 3 | `define polVESA 1'd1 4 | `define hfpVESA 11'd48 5 | `define hbpVESA 11'd160 6 | `define hvaVESA 11'd408 7 | `define hwlVESA 11'd1688 8 | `define vfpVESA 11'd1 9 | `define vbpVESA 11'd4 10 | `define vvaVESA 11'd42 11 | `define vwfVESA 11'd1066 12 | 13 | `define polXGA 1'd0 14 | `define hfpXGA 11'd24 15 | `define hbpXGA 11'd160 16 | `define hvaXGA 11'd320 17 | `define hwlXGA 11'd1344 18 | `define vfpXGA 11'd3 19 | `define vbpXGA 11'd9 20 | `define vvaXGA 11'd38 21 | `define vwfXGA 11'd806 22 | 23 | `define polSVGA 1'd0 24 | `define hfpSVGA 11'd40 25 | `define hbpSVGA 11'd168 26 | `define hvaSVGA 11'd256 27 | `define hwlSVGA 11'd1056 28 | `define vfpSVGA 11'd1 29 | `define vbpSVGA 11'd5 30 | `define vvaSVGA 11'd28 31 | `define vwfSVGA 11'd628 32 | 33 | `define polVGA 1'd1 34 | `define hfpVGA 11'd16 35 | `define hbpVGA 11'd112 36 | `define hvaVGA 11'd160 37 | `define hwlVGA 11'd800 38 | `define vfpVGA 11'd10 39 | `define vbpVGA 11'd12 40 | `define vvaVGA 11'd45 41 | `define vwfVGA 11'd525 42 | 43 | module ALL( 44 | input wire clk, 45 | input wire [1:0] sw, 46 | output wire [3:0] vgaRed, 47 | output wire [3:0] vgaGreen, 48 | output wire [3:0] vgaBlue, 49 | output wire Hsync, 50 | output wire Vsync 51 | ); 52 | 53 | reg [ 1:0] rez; 54 | 55 | wire hsync [3:0]; 56 | wire vsync [3:0]; 57 | wire [ 3:0] red [3:0]; 58 | wire [ 3:0] green [3:0]; 59 | wire [ 3:0] blue [3:0]; 60 | wire [11:0] vcount[3:0]; 61 | wire [11:0] hcount[3:0]; 62 | 63 | assign vgaRed = red[rez]; 64 | assign vgaGreen = green[rez]; 65 | assign vgaBlue = blue[rez]; 66 | assign Hsync = hsync[rez]; 67 | assign Vsync = vsync[rez]; 68 | 69 | always@(*)begin 70 | if((hcount[rez]==1)&&(vcount[rez]==1))begin 71 | rez=sw; 72 | end 73 | end 74 | 75 | CW vc(MHz108,MHz65,MHz40,MHz25,clk); 76 | 77 | Display vga(MHz25,red[0],green[0],blue[0], 78 | hsync[0],vsync[0],hcount[0],vcount[0], 79 | `polVGA,`hfpVGA,`hbpVGA,`hvaVGA,`hwlVGA, 80 | `vfpVGA,`vbpVGA,`vvaVGA,`vwfVGA 81 | ); 82 | 83 | Display svga(MHz40,red[1],green[1],blue[1], 84 | hsync[1],vsync[1],hcount[1],vcount[1], 85 | `polSVGA,`hfpSVGA,`hbpSVGA,`hvaSVGA,`hwlSVGA, 86 | `vfpSVGA,`vbpSVGA,`vvaSVGA,`vwfSVGA 87 | ); 88 | 89 | Display xga(MHz65,red[2],green[2],blue[2], 90 | hsync[2],vsync[2],hcount[2],vcount[2], 91 | `polXGA,`hfpXGA,`hbpXGA,`hvaXGA,`hwlXGA, 92 | `vfpXGA,`vbpXGA,`vvaXGA,`vwfXGA 93 | ); 94 | 95 | Display vesa(MHz108,red[3],green[3],blue[3], 96 | hsync[3],vsync[3],hcount[3],vcount[3], 97 | `polVESA,`hfpVESA,`hbpVESA,`hvaVESA,`hwlVESA, 98 | `vfpVESA,`vbpVESA,`vvaVESA,`vwfVESA 99 | ); 100 | 101 | endmodule 102 | 103 | module Display( 104 | input wire clk, 105 | output wire [ 3:0] vgaRed, 106 | output wire [ 3:0] vgaGreen, 107 | output wire [ 3:0] vgaBlue, 108 | output reg Hsync, 109 | output reg Vsync, 110 | output reg [11:0] hCount, 111 | output reg [11:0] vCount, 112 | input wire POL, 113 | input wire [10:0] HFP, 114 | input wire [10:0] HBP, 115 | input wire [10:0] HVA, 116 | input wire [10:0] HWL, 117 | input wire [10:0] VFP, 118 | input wire [10:0] VBP, 119 | input wire [10:0] VVA, 120 | input wire [10:0] VWF 121 | ); 122 | 123 | reg flip; 124 | reg [ 6:0] chr; 125 | reg [ 7:0] pix; 126 | reg [11:0] color; 127 | reg [11:0] off; 128 | reg [11:0] on; 129 | 130 | wire [ 2:0] col; 131 | wire [ 2:0] row; 132 | wire [ 3:0] hex; 133 | wire [ 7:0] nxt; 134 | wire [11:0] ypos; 135 | wire [11:0] xpos; 136 | wire [14:0] address; 137 | 138 | assign xpos = hCount - HVA + 12'd8; 139 | assign ypos = vCount - VVA; 140 | assign col = xpos[2:0]; 141 | assign row = ypos[2:0]; 142 | assign address = ( ypos[9:3] << 8 ) + xpos[11:3] + 13'd1; 143 | assign vgaRed = color[11:8]; 144 | assign vgaGreen = color[7:4]; 145 | assign vgaBlue = color[3:0]; 146 | 147 | CharSet cs ( clk, chr, row, nxt ); 148 | 149 | initial begin 150 | Hsync = ~POL; 151 | Vsync = ~POL; 152 | hCount = 11'd0; 153 | vCount = 10'd0; 154 | chr = 7'd0; 155 | pix = 8'd0; 156 | color = 12'd0; 157 | on = 12'd0; 158 | off = 12'd0; 159 | end 160 | 161 | always @ (posedge clk) begin 162 | if (( vCount < VVA ) || ( hCount < HVA )) begin 163 | color <= 12'd0; 164 | end else begin 165 | if ( flip ) begin 166 | color <= pix[~col] ? off : on; 167 | end else begin 168 | color <= pix[~col] ? on : off; 169 | end 170 | end 171 | if (( hCount >= HFP ) && ( hCount < HBP )) begin 172 | Hsync <= POL; 173 | end else begin 174 | Hsync <= ~POL; 175 | end 176 | if (( vCount >= VFP ) && ( vCount < VBP )) begin 177 | Vsync <= POL; 178 | end else begin 179 | Vsync <= ~POL; 180 | end 181 | if ( hCount < HWL ) begin 182 | hCount <= hCount + 10'd1; 183 | end else begin 184 | hCount <= 10'd0; 185 | if ( vCount < VWF ) begin 186 | vCount <= vCount + 10'd1; 187 | end else begin 188 | vCount <= 10'd0; 189 | end 190 | end 191 | if ( xpos[2:0] == 3'd6 ) begin 192 | chr <= address[6:0]; 193 | end else if ( xpos[2:0] == 3'd7 ) begin 194 | pix <= nxt; 195 | flip <= address[7]; 196 | off <= address[11:0]; 197 | on <=~address[11:0]; 198 | end 199 | end 200 | 201 | endmodule 202 | 203 | module CharSet( 204 | input wire clk, 205 | input wire [6:0] chr, 206 | input wire [2:0] row, 207 | output reg [7:0] pix 208 | ); 209 | 210 | wire [7:0] char [127:0][7:0]; 211 | 212 | initial begin 213 | pix = 8'd0; 214 | end 215 | 216 | always @ (posedge clk) begin 217 | pix <= char[chr][row]; 218 | end 219 | 220 | assign char[0][0]=8'b00000000; 221 | assign char[0][1]=8'b00110110; 222 | assign char[0][2]=8'b01111111; 223 | assign char[0][3]=8'b01111111; 224 | assign char[0][4]=8'b00111110; 225 | assign char[0][5]=8'b00011100; 226 | assign char[0][6]=8'b00001000; 227 | assign char[0][7]=8'b00000000; 228 | 229 | assign char[1][0]=8'b00011000; 230 | assign char[1][1]=8'b00011000; 231 | assign char[1][2]=8'b00011000; 232 | assign char[1][3]=8'b00011111; 233 | assign char[1][4]=8'b00011111; 234 | assign char[1][5]=8'b00011000; 235 | assign char[1][6]=8'b00011000; 236 | assign char[1][7]=8'b00011000; 237 | 238 | assign char[2][0]=8'b00000011; 239 | assign char[2][1]=8'b00000011; 240 | assign char[2][2]=8'b00000011; 241 | assign char[2][3]=8'b00000011; 242 | assign char[2][4]=8'b00000011; 243 | assign char[2][5]=8'b00000011; 244 | assign char[2][6]=8'b00000011; 245 | assign char[2][7]=8'b00000011; 246 | 247 | assign char[3][0]=8'b00011000; 248 | assign char[3][1]=8'b00011000; 249 | assign char[3][2]=8'b00011000; 250 | assign char[3][3]=8'b11111000; 251 | assign char[3][4]=8'b11111000; 252 | assign char[3][5]=8'b00000000; 253 | assign char[3][6]=8'b00000000; 254 | assign char[3][7]=8'b00000000; 255 | 256 | assign char[4][0]=8'b00011000; 257 | assign char[4][1]=8'b00011000; 258 | assign char[4][2]=8'b00011000; 259 | assign char[4][3]=8'b11111000; 260 | assign char[4][4]=8'b11111000; 261 | assign char[4][5]=8'b00011000; 262 | assign char[4][6]=8'b00011000; 263 | assign char[4][7]=8'b00011000; 264 | 265 | assign char[5][0]=8'b00000000; 266 | assign char[5][1]=8'b00000000; 267 | assign char[5][2]=8'b00000000; 268 | assign char[5][3]=8'b11111000; 269 | assign char[5][4]=8'b11111000; 270 | assign char[5][5]=8'b00011000; 271 | assign char[5][6]=8'b00011000; 272 | assign char[5][7]=8'b00011000; 273 | 274 | assign char[6][0]=8'b00000011; 275 | assign char[6][1]=8'b00000111; 276 | assign char[6][2]=8'b00001110; 277 | assign char[6][3]=8'b00011100; 278 | assign char[6][4]=8'b00111000; 279 | assign char[6][5]=8'b01110000; 280 | assign char[6][6]=8'b11100000; 281 | assign char[6][7]=8'b11000000; 282 | 283 | assign char[7][0]=8'b11000000; 284 | assign char[7][1]=8'b11100000; 285 | assign char[7][2]=8'b01110000; 286 | assign char[7][3]=8'b00111000; 287 | assign char[7][4]=8'b00011100; 288 | assign char[7][5]=8'b00001110; 289 | assign char[7][6]=8'b00000111; 290 | assign char[7][7]=8'b00000011; 291 | 292 | assign char[8][0]=8'b00000001; 293 | assign char[8][1]=8'b00000011; 294 | assign char[8][2]=8'b00000111; 295 | assign char[8][3]=8'b00001111; 296 | assign char[8][4]=8'b00011111; 297 | assign char[8][5]=8'b00111111; 298 | assign char[8][6]=8'b01111111; 299 | assign char[8][7]=8'b11111111; 300 | 301 | assign char[9][0]=8'b00000000; 302 | assign char[9][1]=8'b00000000; 303 | assign char[9][2]=8'b00000000; 304 | assign char[9][3]=8'b00000000; 305 | assign char[9][4]=8'b00001111; 306 | assign char[9][5]=8'b00001111; 307 | assign char[9][6]=8'b00001111; 308 | assign char[9][7]=8'b00001111; 309 | 310 | assign char[10][0]=8'b10000000; 311 | assign char[10][1]=8'b11000000; 312 | assign char[10][2]=8'b11100000; 313 | assign char[10][3]=8'b11110000; 314 | assign char[10][4]=8'b11111000; 315 | assign char[10][5]=8'b11111100; 316 | assign char[10][6]=8'b11111110; 317 | assign char[10][7]=8'b11111111; 318 | 319 | assign char[11][0]=8'b00001111; 320 | assign char[11][1]=8'b00001111; 321 | assign char[11][2]=8'b00001111; 322 | assign char[11][3]=8'b00001111; 323 | assign char[11][4]=8'b00000000; 324 | assign char[11][5]=8'b00000000; 325 | assign char[11][6]=8'b00000000; 326 | assign char[11][7]=8'b00000000; 327 | 328 | assign char[12][0]=8'b11110000; 329 | assign char[12][1]=8'b11110000; 330 | assign char[12][2]=8'b11110000; 331 | assign char[12][3]=8'b11110000; 332 | assign char[12][4]=8'b00000000; 333 | assign char[12][5]=8'b00000000; 334 | assign char[12][6]=8'b00000000; 335 | assign char[12][7]=8'b00000000; 336 | 337 | assign char[13][0]=8'b11111111; 338 | assign char[13][1]=8'b11111111; 339 | assign char[13][2]=8'b00000000; 340 | assign char[13][3]=8'b00000000; 341 | assign char[13][4]=8'b00000000; 342 | assign char[13][5]=8'b00000000; 343 | assign char[13][6]=8'b00000000; 344 | assign char[13][7]=8'b00000000; 345 | 346 | assign char[14][0]=8'b00000000; 347 | assign char[14][1]=8'b00000000; 348 | assign char[14][2]=8'b00000000; 349 | assign char[14][3]=8'b00000000; 350 | assign char[14][4]=8'b00000000; 351 | assign char[14][5]=8'b00000000; 352 | assign char[14][6]=8'b11111111; 353 | assign char[14][7]=8'b11111111; 354 | 355 | assign char[15][0]=8'b00000000; 356 | assign char[15][1]=8'b00000000; 357 | assign char[15][2]=8'b00000000; 358 | assign char[15][3]=8'b00000000; 359 | assign char[15][4]=8'b11110000; 360 | assign char[15][5]=8'b11110000; 361 | assign char[15][6]=8'b11110000; 362 | assign char[15][7]=8'b11110000; 363 | 364 | assign char[16][0]=8'b00000000; 365 | assign char[16][1]=8'b00011100; 366 | assign char[16][2]=8'b00011100; 367 | assign char[16][3]=8'b01110111; 368 | assign char[16][4]=8'b01110111; 369 | assign char[16][5]=8'b00001000; 370 | assign char[16][6]=8'b00011100; 371 | assign char[16][7]=8'b00000000; 372 | 373 | assign char[17][0]=8'b00000000; 374 | assign char[17][1]=8'b00000000; 375 | assign char[17][2]=8'b00000000; 376 | assign char[17][3]=8'b00011111; 377 | assign char[17][4]=8'b00011111; 378 | assign char[17][5]=8'b00011000; 379 | assign char[17][6]=8'b00011000; 380 | assign char[17][7]=8'b00011000; 381 | 382 | assign char[18][0]=8'b00000000; 383 | assign char[18][1]=8'b00000000; 384 | assign char[18][2]=8'b00000000; 385 | assign char[18][3]=8'b11111111; 386 | assign char[18][4]=8'b11111111; 387 | assign char[18][5]=8'b00000000; 388 | assign char[18][6]=8'b00000000; 389 | assign char[18][7]=8'b00000000; 390 | 391 | assign char[19][0]=8'b00011000; 392 | assign char[19][1]=8'b00011000; 393 | assign char[19][2]=8'b00011000; 394 | assign char[19][3]=8'b11111111; 395 | assign char[19][4]=8'b11111111; 396 | assign char[19][5]=8'b00011000; 397 | assign char[19][6]=8'b00011000; 398 | assign char[19][7]=8'b00011000; 399 | 400 | assign char[20][0]=8'b00000000; 401 | assign char[20][1]=8'b00000000; 402 | assign char[20][2]=8'b00111100; 403 | assign char[20][3]=8'b01111110; 404 | assign char[20][4]=8'b01111110; 405 | assign char[20][5]=8'b01111110; 406 | assign char[20][6]=8'b00111100; 407 | assign char[20][7]=8'b00000000; 408 | 409 | assign char[21][0]=8'b00000000; 410 | assign char[21][1]=8'b00000000; 411 | assign char[21][2]=8'b00000000; 412 | assign char[21][3]=8'b00000000; 413 | assign char[21][4]=8'b11111111; 414 | assign char[21][5]=8'b11111111; 415 | assign char[21][6]=8'b11111111; 416 | assign char[21][7]=8'b11111111; 417 | 418 | assign char[22][0]=8'b11000000; 419 | assign char[22][1]=8'b11000000; 420 | assign char[22][2]=8'b11000000; 421 | assign char[22][3]=8'b11000000; 422 | assign char[22][4]=8'b11000000; 423 | assign char[22][5]=8'b11000000; 424 | assign char[22][6]=8'b11000000; 425 | assign char[22][7]=8'b11000000; 426 | 427 | assign char[23][0]=8'b00000000; 428 | assign char[23][1]=8'b00000000; 429 | assign char[23][2]=8'b00000000; 430 | assign char[23][3]=8'b11111111; 431 | assign char[23][4]=8'b11111111; 432 | assign char[23][5]=8'b00011000; 433 | assign char[23][6]=8'b00011000; 434 | assign char[23][7]=8'b00011000; 435 | 436 | assign char[24][0]=8'b00011000; 437 | assign char[24][1]=8'b00011000; 438 | assign char[24][2]=8'b00011000; 439 | assign char[24][3]=8'b11111111; 440 | assign char[24][4]=8'b11111111; 441 | assign char[24][5]=8'b00000000; 442 | assign char[24][6]=8'b00000000; 443 | assign char[24][7]=8'b00000000; 444 | 445 | assign char[25][0]=8'b11110000; 446 | assign char[25][1]=8'b11110000; 447 | assign char[25][2]=8'b11110000; 448 | assign char[25][3]=8'b11110000; 449 | assign char[25][4]=8'b11110000; 450 | assign char[25][5]=8'b11110000; 451 | assign char[25][6]=8'b11110000; 452 | assign char[25][7]=8'b11110000; 453 | 454 | assign char[26][0]=8'b00011000; 455 | assign char[26][1]=8'b00011000; 456 | assign char[26][2]=8'b00011000; 457 | assign char[26][3]=8'b00011111; 458 | assign char[26][4]=8'b00011111; 459 | assign char[26][5]=8'b00000000; 460 | assign char[26][6]=8'b00000000; 461 | assign char[26][7]=8'b00000000; 462 | 463 | assign char[27][0]=8'b01111000; 464 | assign char[27][1]=8'b01100000; 465 | assign char[27][2]=8'b01111000; 466 | assign char[27][3]=8'b01100000; 467 | assign char[27][4]=8'b01111110; 468 | assign char[27][5]=8'b00011000; 469 | assign char[27][6]=8'b00011110; 470 | assign char[27][7]=8'b00000000; 471 | 472 | assign char[28][0]=8'b00000000; 473 | assign char[28][1]=8'b00011000; 474 | assign char[28][2]=8'b00111100; 475 | assign char[28][3]=8'b01111110; 476 | assign char[28][4]=8'b00011000; 477 | assign char[28][5]=8'b00011000; 478 | assign char[28][6]=8'b00011000; 479 | assign char[28][7]=8'b00000000; 480 | 481 | assign char[29][0]=8'b00000000; 482 | assign char[29][1]=8'b00011000; 483 | assign char[29][2]=8'b00011000; 484 | assign char[29][3]=8'b00011000; 485 | assign char[29][4]=8'b01111110; 486 | assign char[29][5]=8'b00111100; 487 | assign char[29][6]=8'b00011000; 488 | assign char[29][7]=8'b00000000; 489 | 490 | assign char[30][0]=8'b00000000; 491 | assign char[30][1]=8'b00011000; 492 | assign char[30][2]=8'b00110000; 493 | assign char[30][3]=8'b01111110; 494 | assign char[30][4]=8'b00110000; 495 | assign char[30][5]=8'b00011000; 496 | assign char[30][6]=8'b00000000; 497 | assign char[30][7]=8'b00000000; 498 | 499 | assign char[31][0]=8'b00000000; 500 | assign char[31][1]=8'b00011000; 501 | assign char[31][2]=8'b00001100; 502 | assign char[31][3]=8'b01111110; 503 | assign char[31][4]=8'b00001100; 504 | assign char[31][5]=8'b00011000; 505 | assign char[31][6]=8'b00000000; 506 | assign char[31][7]=8'b00000000; 507 | 508 | assign char[32][0]=8'b00000000; 509 | assign char[32][1]=8'b00000000; 510 | assign char[32][2]=8'b00000000; 511 | assign char[32][3]=8'b00000000; 512 | assign char[32][4]=8'b00000000; 513 | assign char[32][5]=8'b00000000; 514 | assign char[32][6]=8'b00000000; 515 | assign char[32][7]=8'b00000000; 516 | 517 | assign char[33][0]=8'b00000000; 518 | assign char[33][1]=8'b00011000; 519 | assign char[33][2]=8'b00011000; 520 | assign char[33][3]=8'b00011000; 521 | assign char[33][4]=8'b00011000; 522 | assign char[33][5]=8'b00000000; 523 | assign char[33][6]=8'b00011000; 524 | assign char[33][7]=8'b00000000; 525 | 526 | assign char[34][0]=8'b00000000; 527 | assign char[34][1]=8'b01100110; 528 | assign char[34][2]=8'b01100110; 529 | assign char[34][3]=8'b01100110; 530 | assign char[34][4]=8'b00000000; 531 | assign char[34][5]=8'b00000000; 532 | assign char[34][6]=8'b00000000; 533 | assign char[34][7]=8'b00000000; 534 | 535 | assign char[35][0]=8'b00000000; 536 | assign char[35][1]=8'b01100110; 537 | assign char[35][2]=8'b11111111; 538 | assign char[35][3]=8'b01100110; 539 | assign char[35][4]=8'b01100110; 540 | assign char[35][5]=8'b11111111; 541 | assign char[35][6]=8'b01100110; 542 | assign char[35][7]=8'b00000000; 543 | 544 | assign char[36][0]=8'b00011000; 545 | assign char[36][1]=8'b00111110; 546 | assign char[36][2]=8'b01100000; 547 | assign char[36][3]=8'b00111100; 548 | assign char[36][4]=8'b00000110; 549 | assign char[36][5]=8'b01111100; 550 | assign char[36][6]=8'b00011000; 551 | assign char[36][7]=8'b00000000; 552 | 553 | assign char[37][0]=8'b00000000; 554 | assign char[37][1]=8'b01100110; 555 | assign char[37][2]=8'b01101100; 556 | assign char[37][3]=8'b00011000; 557 | assign char[37][4]=8'b00110000; 558 | assign char[37][5]=8'b01100110; 559 | assign char[37][6]=8'b01000110; 560 | assign char[37][7]=8'b00000000; 561 | 562 | assign char[38][0]=8'b00011100; 563 | assign char[38][1]=8'b00110110; 564 | assign char[38][2]=8'b00011100; 565 | assign char[38][3]=8'b00111000; 566 | assign char[38][4]=8'b01101111; 567 | assign char[38][5]=8'b01100110; 568 | assign char[38][6]=8'b00111011; 569 | assign char[38][7]=8'b00000000; 570 | 571 | assign char[39][0]=8'b00000000; 572 | assign char[39][1]=8'b00011000; 573 | assign char[39][2]=8'b00011000; 574 | assign char[39][3]=8'b00011000; 575 | assign char[39][4]=8'b00000000; 576 | assign char[39][5]=8'b00000000; 577 | assign char[39][6]=8'b00000000; 578 | assign char[39][7]=8'b00000000; 579 | 580 | assign char[40][0]=8'b00000000; 581 | assign char[40][1]=8'b00001110; 582 | assign char[40][2]=8'b00011100; 583 | assign char[40][3]=8'b00011000; 584 | assign char[40][4]=8'b00011000; 585 | assign char[40][5]=8'b00011100; 586 | assign char[40][6]=8'b00001110; 587 | assign char[40][7]=8'b00000000; 588 | 589 | assign char[41][0]=8'b00000000; 590 | assign char[41][1]=8'b01110000; 591 | assign char[41][2]=8'b00111000; 592 | assign char[41][3]=8'b00011000; 593 | assign char[41][4]=8'b00011000; 594 | assign char[41][5]=8'b00111000; 595 | assign char[41][6]=8'b01110000; 596 | assign char[41][7]=8'b00000000; 597 | 598 | assign char[42][0]=8'b00000000; 599 | assign char[42][1]=8'b01100110; 600 | assign char[42][2]=8'b00111100; 601 | assign char[42][3]=8'b11111111; 602 | assign char[42][4]=8'b00111100; 603 | assign char[42][5]=8'b01100110; 604 | assign char[42][6]=8'b00000000; 605 | assign char[42][7]=8'b00000000; 606 | 607 | assign char[43][0]=8'b00000000; 608 | assign char[43][1]=8'b00011000; 609 | assign char[43][2]=8'b00011000; 610 | assign char[43][3]=8'b01111110; 611 | assign char[43][4]=8'b00011000; 612 | assign char[43][5]=8'b00011000; 613 | assign char[43][6]=8'b00000000; 614 | assign char[43][7]=8'b00000000; 615 | 616 | assign char[44][0]=8'b00000000; 617 | assign char[44][1]=8'b00000000; 618 | assign char[44][2]=8'b00000000; 619 | assign char[44][3]=8'b00000000; 620 | assign char[44][4]=8'b00000000; 621 | assign char[44][5]=8'b00011000; 622 | assign char[44][6]=8'b00011000; 623 | assign char[44][7]=8'b00110000; 624 | 625 | assign char[45][0]=8'b00000000; 626 | assign char[45][1]=8'b00000000; 627 | assign char[45][2]=8'b00000000; 628 | assign char[45][3]=8'b01111110; 629 | assign char[45][4]=8'b00000000; 630 | assign char[45][5]=8'b00000000; 631 | assign char[45][6]=8'b00000000; 632 | assign char[45][7]=8'b00000000; 633 | 634 | assign char[46][0]=8'b00000000; 635 | assign char[46][1]=8'b00000000; 636 | assign char[46][2]=8'b00000000; 637 | assign char[46][3]=8'b00000000; 638 | assign char[46][4]=8'b00000000; 639 | assign char[46][5]=8'b00011000; 640 | assign char[46][6]=8'b00011000; 641 | assign char[46][7]=8'b00000000; 642 | 643 | assign char[47][0]=8'b00000000; 644 | assign char[47][1]=8'b00000110; 645 | assign char[47][2]=8'b00001100; 646 | assign char[47][3]=8'b00011000; 647 | assign char[47][4]=8'b00110000; 648 | assign char[47][5]=8'b01100000; 649 | assign char[47][6]=8'b01000000; 650 | assign char[47][7]=8'b00000000; 651 | 652 | assign char[48][0]=8'b00000000; 653 | assign char[48][1]=8'b00111100; 654 | assign char[48][2]=8'b01100110; 655 | assign char[48][3]=8'b01101110; 656 | assign char[48][4]=8'b01110110; 657 | assign char[48][5]=8'b01100110; 658 | assign char[48][6]=8'b00111100; 659 | assign char[48][7]=8'b00000000; 660 | 661 | assign char[49][0]=8'b00000000; 662 | assign char[49][1]=8'b00011000; 663 | assign char[49][2]=8'b00111000; 664 | assign char[49][3]=8'b00011000; 665 | assign char[49][4]=8'b00011000; 666 | assign char[49][5]=8'b00011000; 667 | assign char[49][6]=8'b01111110; 668 | assign char[49][7]=8'b00000000; 669 | 670 | assign char[50][0]=8'b00000000; 671 | assign char[50][1]=8'b00111100; 672 | assign char[50][2]=8'b01100110; 673 | assign char[50][3]=8'b00001100; 674 | assign char[50][4]=8'b00011000; 675 | assign char[50][5]=8'b00110000; 676 | assign char[50][6]=8'b01111110; 677 | assign char[50][7]=8'b00000000; 678 | 679 | assign char[51][0]=8'b00000000; 680 | assign char[51][1]=8'b01111110; 681 | assign char[51][2]=8'b00001100; 682 | assign char[51][3]=8'b00011000; 683 | assign char[51][4]=8'b00001100; 684 | assign char[51][5]=8'b01100110; 685 | assign char[51][6]=8'b00111100; 686 | assign char[51][7]=8'b00000000; 687 | 688 | assign char[52][0]=8'b00000000; 689 | assign char[52][1]=8'b00001100; 690 | assign char[52][2]=8'b00011100; 691 | assign char[52][3]=8'b00111100; 692 | assign char[52][4]=8'b01101100; 693 | assign char[52][5]=8'b01111110; 694 | assign char[52][6]=8'b00001100; 695 | assign char[52][7]=8'b00000000; 696 | 697 | assign char[53][0]=8'b00000000; 698 | assign char[53][1]=8'b01111110; 699 | assign char[53][2]=8'b01100000; 700 | assign char[53][3]=8'b01111100; 701 | assign char[53][4]=8'b00000110; 702 | assign char[53][5]=8'b01100110; 703 | assign char[53][6]=8'b00111100; 704 | assign char[53][7]=8'b00000000; 705 | 706 | assign char[54][0]=8'b00000000; 707 | assign char[54][1]=8'b00111100; 708 | assign char[54][2]=8'b01100000; 709 | assign char[54][3]=8'b01111100; 710 | assign char[54][4]=8'b01100110; 711 | assign char[54][5]=8'b01100110; 712 | assign char[54][6]=8'b00111100; 713 | assign char[54][7]=8'b00000000; 714 | 715 | assign char[55][0]=8'b00000000; 716 | assign char[55][1]=8'b01111110; 717 | assign char[55][2]=8'b00000110; 718 | assign char[55][3]=8'b00001100; 719 | assign char[55][4]=8'b00011000; 720 | assign char[55][5]=8'b00110000; 721 | assign char[55][6]=8'b00110000; 722 | assign char[55][7]=8'b00000000; 723 | 724 | assign char[56][0]=8'b00000000; 725 | assign char[56][1]=8'b00111100; 726 | assign char[56][2]=8'b01100110; 727 | assign char[56][3]=8'b00111100; 728 | assign char[56][4]=8'b01100110; 729 | assign char[56][5]=8'b01100110; 730 | assign char[56][6]=8'b00111100; 731 | assign char[56][7]=8'b00000000; 732 | 733 | assign char[57][0]=8'b00000000; 734 | assign char[57][1]=8'b00111100; 735 | assign char[57][2]=8'b01100110; 736 | assign char[57][3]=8'b00111110; 737 | assign char[57][4]=8'b00000110; 738 | assign char[57][5]=8'b00001100; 739 | assign char[57][6]=8'b00111000; 740 | assign char[57][7]=8'b00000000; 741 | 742 | assign char[58][0]=8'b00000000; 743 | assign char[58][1]=8'b00000000; 744 | assign char[58][2]=8'b00011000; 745 | assign char[58][3]=8'b00011000; 746 | assign char[58][4]=8'b00000000; 747 | assign char[58][5]=8'b00011000; 748 | assign char[58][6]=8'b00011000; 749 | assign char[58][7]=8'b00000000; 750 | 751 | assign char[59][0]=8'b00000000; 752 | assign char[59][1]=8'b00000000; 753 | assign char[59][2]=8'b00011000; 754 | assign char[59][3]=8'b00011000; 755 | assign char[59][4]=8'b00000000; 756 | assign char[59][5]=8'b00011000; 757 | assign char[59][6]=8'b00011000; 758 | assign char[59][7]=8'b00110000; 759 | 760 | assign char[60][0]=8'b00000110; 761 | assign char[60][1]=8'b00001100; 762 | assign char[60][2]=8'b00011000; 763 | assign char[60][3]=8'b00110000; 764 | assign char[60][4]=8'b00011000; 765 | assign char[60][5]=8'b00001100; 766 | assign char[60][6]=8'b00000110; 767 | assign char[60][7]=8'b00000000; 768 | 769 | assign char[61][0]=8'b00000000; 770 | assign char[61][1]=8'b00000000; 771 | assign char[61][2]=8'b01111110; 772 | assign char[61][3]=8'b00000000; 773 | assign char[61][4]=8'b00000000; 774 | assign char[61][5]=8'b01111110; 775 | assign char[61][6]=8'b00000000; 776 | assign char[61][7]=8'b00000000; 777 | 778 | assign char[62][0]=8'b01100000; 779 | assign char[62][1]=8'b00110000; 780 | assign char[62][2]=8'b00011000; 781 | assign char[62][3]=8'b00001100; 782 | assign char[62][4]=8'b00011000; 783 | assign char[62][5]=8'b00110000; 784 | assign char[62][6]=8'b01100000; 785 | assign char[62][7]=8'b00000000; 786 | 787 | assign char[63][0]=8'b00000000; 788 | assign char[63][1]=8'b00111100; 789 | assign char[63][2]=8'b01100110; 790 | assign char[63][3]=8'b00001100; 791 | assign char[63][4]=8'b00011000; 792 | assign char[63][5]=8'b00000000; 793 | assign char[63][6]=8'b00011000; 794 | assign char[63][7]=8'b00000000; 795 | 796 | assign char[64][0]=8'b00000000; 797 | assign char[64][1]=8'b00111100; 798 | assign char[64][2]=8'b01100110; 799 | assign char[64][3]=8'b01101110; 800 | assign char[64][4]=8'b01101110; 801 | assign char[64][5]=8'b01100000; 802 | assign char[64][6]=8'b00111110; 803 | assign char[64][7]=8'b00000000; 804 | 805 | assign char[65][0]=8'b00000000; 806 | assign char[65][1]=8'b00011000; 807 | assign char[65][2]=8'b00111100; 808 | assign char[65][3]=8'b01100110; 809 | assign char[65][4]=8'b01100110; 810 | assign char[65][5]=8'b01111110; 811 | assign char[65][6]=8'b01100110; 812 | assign char[65][7]=8'b00000000; 813 | 814 | assign char[66][0]=8'b00000000; 815 | assign char[66][1]=8'b01111100; 816 | assign char[66][2]=8'b01100110; 817 | assign char[66][3]=8'b01111100; 818 | assign char[66][4]=8'b01100110; 819 | assign char[66][5]=8'b01100110; 820 | assign char[66][6]=8'b01111100; 821 | assign char[66][7]=8'b00000000; 822 | 823 | assign char[67][0]=8'b00000000; 824 | assign char[67][1]=8'b00111100; 825 | assign char[67][2]=8'b01100110; 826 | assign char[67][3]=8'b01100000; 827 | assign char[67][4]=8'b01100000; 828 | assign char[67][5]=8'b01100110; 829 | assign char[67][6]=8'b00111100; 830 | assign char[67][7]=8'b00000000; 831 | 832 | assign char[68][0]=8'b00000000; 833 | assign char[68][1]=8'b01111000; 834 | assign char[68][2]=8'b01101100; 835 | assign char[68][3]=8'b01100110; 836 | assign char[68][4]=8'b01100110; 837 | assign char[68][5]=8'b01101100; 838 | assign char[68][6]=8'b01111000; 839 | assign char[68][7]=8'b00000000; 840 | 841 | assign char[69][0]=8'b00000000; 842 | assign char[69][1]=8'b01111110; 843 | assign char[69][2]=8'b01100000; 844 | assign char[69][3]=8'b01111100; 845 | assign char[69][4]=8'b01100000; 846 | assign char[69][5]=8'b01100000; 847 | assign char[69][6]=8'b01111110; 848 | assign char[69][7]=8'b00000000; 849 | 850 | assign char[70][0]=8'b00000000; 851 | assign char[70][1]=8'b01111110; 852 | assign char[70][2]=8'b01100000; 853 | assign char[70][3]=8'b01111100; 854 | assign char[70][4]=8'b01100000; 855 | assign char[70][5]=8'b01100000; 856 | assign char[70][6]=8'b01100000; 857 | assign char[70][7]=8'b00000000; 858 | 859 | assign char[71][0]=8'b00000000; 860 | assign char[71][1]=8'b00111110; 861 | assign char[71][2]=8'b01100000; 862 | assign char[71][3]=8'b01100000; 863 | assign char[71][4]=8'b01101110; 864 | assign char[71][5]=8'b01100110; 865 | assign char[71][6]=8'b00111110; 866 | assign char[71][7]=8'b00000000; 867 | 868 | assign char[72][0]=8'b00000000; 869 | assign char[72][1]=8'b01100110; 870 | assign char[72][2]=8'b01100110; 871 | assign char[72][3]=8'b01111110; 872 | assign char[72][4]=8'b01100110; 873 | assign char[72][5]=8'b01100110; 874 | assign char[72][6]=8'b01100110; 875 | assign char[72][7]=8'b00000000; 876 | 877 | assign char[73][0]=8'b00000000; 878 | assign char[73][1]=8'b01111110; 879 | assign char[73][2]=8'b00011000; 880 | assign char[73][3]=8'b00011000; 881 | assign char[73][4]=8'b00011000; 882 | assign char[73][5]=8'b00011000; 883 | assign char[73][6]=8'b01111110; 884 | assign char[73][7]=8'b00000000; 885 | 886 | assign char[74][0]=8'b00000000; 887 | assign char[74][1]=8'b00000110; 888 | assign char[74][2]=8'b00000110; 889 | assign char[74][3]=8'b00000110; 890 | assign char[74][4]=8'b00000110; 891 | assign char[74][5]=8'b01100110; 892 | assign char[74][6]=8'b00111100; 893 | assign char[74][7]=8'b00000000; 894 | 895 | assign char[75][0]=8'b00000000; 896 | assign char[75][1]=8'b01100110; 897 | assign char[75][2]=8'b01101100; 898 | assign char[75][3]=8'b01111000; 899 | assign char[75][4]=8'b01111000; 900 | assign char[75][5]=8'b01101100; 901 | assign char[75][6]=8'b01100110; 902 | assign char[75][7]=8'b00000000; 903 | 904 | assign char[76][0]=8'b00000000; 905 | assign char[76][1]=8'b01100000; 906 | assign char[76][2]=8'b01100000; 907 | assign char[76][3]=8'b01100000; 908 | assign char[76][4]=8'b01100000; 909 | assign char[76][5]=8'b01100000; 910 | assign char[76][6]=8'b01111110; 911 | assign char[76][7]=8'b00000000; 912 | 913 | assign char[77][0]=8'b00000000; 914 | assign char[77][1]=8'b01100011; 915 | assign char[77][2]=8'b01110111; 916 | assign char[77][3]=8'b01111111; 917 | assign char[77][4]=8'b01101011; 918 | assign char[77][5]=8'b01100011; 919 | assign char[77][6]=8'b01100011; 920 | assign char[77][7]=8'b00000000; 921 | 922 | assign char[78][0]=8'b00000000; 923 | assign char[78][1]=8'b01100110; 924 | assign char[78][2]=8'b01110110; 925 | assign char[78][3]=8'b01111110; 926 | assign char[78][4]=8'b01111110; 927 | assign char[78][5]=8'b01101110; 928 | assign char[78][6]=8'b01100110; 929 | assign char[78][7]=8'b00000000; 930 | 931 | assign char[79][0]=8'b00000000; 932 | assign char[79][1]=8'b00111100; 933 | assign char[79][2]=8'b01100110; 934 | assign char[79][3]=8'b01100110; 935 | assign char[79][4]=8'b01100110; 936 | assign char[79][5]=8'b01100110; 937 | assign char[79][6]=8'b00111100; 938 | assign char[79][7]=8'b00000000; 939 | 940 | assign char[80][0]=8'b00000000; 941 | assign char[80][1]=8'b01111100; 942 | assign char[80][2]=8'b01100110; 943 | assign char[80][3]=8'b01100110; 944 | assign char[80][4]=8'b01111100; 945 | assign char[80][5]=8'b01100000; 946 | assign char[80][6]=8'b01100000; 947 | assign char[80][7]=8'b00000000; 948 | 949 | assign char[81][0]=8'b00000000; 950 | assign char[81][1]=8'b00111100; 951 | assign char[81][2]=8'b01100110; 952 | assign char[81][3]=8'b01100110; 953 | assign char[81][4]=8'b01100110; 954 | assign char[81][5]=8'b01101100; 955 | assign char[81][6]=8'b00110110; 956 | assign char[81][7]=8'b00000000; 957 | 958 | assign char[82][0]=8'b00000000; 959 | assign char[82][1]=8'b01111100; 960 | assign char[82][2]=8'b01100110; 961 | assign char[82][3]=8'b01100110; 962 | assign char[82][4]=8'b01111100; 963 | assign char[82][5]=8'b01101100; 964 | assign char[82][6]=8'b01100110; 965 | assign char[82][7]=8'b00000000; 966 | 967 | assign char[83][0]=8'b00000000; 968 | assign char[83][1]=8'b00111100; 969 | assign char[83][2]=8'b01100000; 970 | assign char[83][3]=8'b00111100; 971 | assign char[83][4]=8'b00000110; 972 | assign char[83][5]=8'b00000110; 973 | assign char[83][6]=8'b00111100; 974 | assign char[83][7]=8'b00000000; 975 | 976 | assign char[84][0]=8'b00000000; 977 | assign char[84][1]=8'b01111110; 978 | assign char[84][2]=8'b00011000; 979 | assign char[84][3]=8'b00011000; 980 | assign char[84][4]=8'b00011000; 981 | assign char[84][5]=8'b00011000; 982 | assign char[84][6]=8'b00011000; 983 | assign char[84][7]=8'b00000000; 984 | 985 | assign char[85][0]=8'b00000000; 986 | assign char[85][1]=8'b01100110; 987 | assign char[85][2]=8'b01100110; 988 | assign char[85][3]=8'b01100110; 989 | assign char[85][4]=8'b01100110; 990 | assign char[85][5]=8'b01100110; 991 | assign char[85][6]=8'b01111110; 992 | assign char[85][7]=8'b00000000; 993 | 994 | assign char[86][0]=8'b00000000; 995 | assign char[86][1]=8'b01100110; 996 | assign char[86][2]=8'b01100110; 997 | assign char[86][3]=8'b01100110; 998 | assign char[86][4]=8'b01100110; 999 | assign char[86][5]=8'b00111100; 1000 | assign char[86][6]=8'b00011000; 1001 | assign char[86][7]=8'b00000000; 1002 | 1003 | assign char[87][0]=8'b00000000; 1004 | assign char[87][1]=8'b01100011; 1005 | assign char[87][2]=8'b01100011; 1006 | assign char[87][3]=8'b01101011; 1007 | assign char[87][4]=8'b01111111; 1008 | assign char[87][5]=8'b01110111; 1009 | assign char[87][6]=8'b01100011; 1010 | assign char[87][7]=8'b00000000; 1011 | 1012 | assign char[88][0]=8'b00000000; 1013 | assign char[88][1]=8'b01100110; 1014 | assign char[88][2]=8'b01100110; 1015 | assign char[88][3]=8'b00111100; 1016 | assign char[88][4]=8'b00111100; 1017 | assign char[88][5]=8'b01100110; 1018 | assign char[88][6]=8'b01100110; 1019 | assign char[88][7]=8'b00000000; 1020 | 1021 | assign char[89][0]=8'b00000000; 1022 | assign char[89][1]=8'b01100110; 1023 | assign char[89][2]=8'b01100110; 1024 | assign char[89][3]=8'b00111100; 1025 | assign char[89][4]=8'b00011000; 1026 | assign char[89][5]=8'b00011000; 1027 | assign char[89][6]=8'b00011000; 1028 | assign char[89][7]=8'b00000000; 1029 | 1030 | assign char[90][0]=8'b00000000; 1031 | assign char[90][1]=8'b01111110; 1032 | assign char[90][2]=8'b00001100; 1033 | assign char[90][3]=8'b00011000; 1034 | assign char[90][4]=8'b00110000; 1035 | assign char[90][5]=8'b01100000; 1036 | assign char[90][6]=8'b01111110; 1037 | assign char[90][7]=8'b00000000; 1038 | 1039 | assign char[91][0]=8'b00000000; 1040 | assign char[91][1]=8'b00011110; 1041 | assign char[91][2]=8'b00011000; 1042 | assign char[91][3]=8'b00011000; 1043 | assign char[91][4]=8'b00011000; 1044 | assign char[91][5]=8'b00011000; 1045 | assign char[91][6]=8'b00011110; 1046 | assign char[91][7]=8'b00000000; 1047 | 1048 | assign char[92][0]=8'b00000000; 1049 | assign char[92][1]=8'b01000000; 1050 | assign char[92][2]=8'b01100000; 1051 | assign char[92][3]=8'b00110000; 1052 | assign char[92][4]=8'b00011000; 1053 | assign char[92][5]=8'b00001100; 1054 | assign char[92][6]=8'b00000110; 1055 | assign char[92][7]=8'b00000000; 1056 | 1057 | assign char[93][0]=8'b00000000; 1058 | assign char[93][1]=8'b01111000; 1059 | assign char[93][2]=8'b00011000; 1060 | assign char[93][3]=8'b00011000; 1061 | assign char[93][4]=8'b00011000; 1062 | assign char[93][5]=8'b00011000; 1063 | assign char[93][6]=8'b01111000; 1064 | assign char[93][7]=8'b00000000; 1065 | 1066 | assign char[94][0]=8'b00000000; 1067 | assign char[94][1]=8'b00001000; 1068 | assign char[94][2]=8'b00011100; 1069 | assign char[94][3]=8'b00110110; 1070 | assign char[94][4]=8'b01100011; 1071 | assign char[94][5]=8'b00000000; 1072 | assign char[94][6]=8'b00000000; 1073 | assign char[94][7]=8'b00000000; 1074 | 1075 | assign char[95][0]=8'b00000000; 1076 | assign char[95][1]=8'b00000000; 1077 | assign char[95][2]=8'b00000000; 1078 | assign char[95][3]=8'b00000000; 1079 | assign char[95][4]=8'b00000000; 1080 | assign char[95][5]=8'b00000000; 1081 | assign char[95][6]=8'b11111111; 1082 | assign char[95][7]=8'b00000000; 1083 | 1084 | assign char[96][0]=8'b00000000; 1085 | assign char[96][1]=8'b00011000; 1086 | assign char[96][2]=8'b00111100; 1087 | assign char[96][3]=8'b01111110; 1088 | assign char[96][4]=8'b01111110; 1089 | assign char[96][5]=8'b00111100; 1090 | assign char[96][6]=8'b00011000; 1091 | assign char[96][7]=8'b00000000; 1092 | 1093 | assign char[97][0]=8'b00000000; 1094 | assign char[97][1]=8'b00000000; 1095 | assign char[97][2]=8'b00111100; 1096 | assign char[97][3]=8'b00000110; 1097 | assign char[97][4]=8'b00111110; 1098 | assign char[97][5]=8'b01100110; 1099 | assign char[97][6]=8'b00111110; 1100 | assign char[97][7]=8'b00000000; 1101 | 1102 | assign char[98][0]=8'b00000000; 1103 | assign char[98][1]=8'b01100000; 1104 | assign char[98][2]=8'b01100000; 1105 | assign char[98][3]=8'b01111100; 1106 | assign char[98][4]=8'b01100110; 1107 | assign char[98][5]=8'b01100110; 1108 | assign char[98][6]=8'b01111100; 1109 | assign char[98][7]=8'b00000000; 1110 | 1111 | assign char[99][0]=8'b00000000; 1112 | assign char[99][1]=8'b00000000; 1113 | assign char[99][2]=8'b00111100; 1114 | assign char[99][3]=8'b01100000; 1115 | assign char[99][4]=8'b01100000; 1116 | assign char[99][5]=8'b01100000; 1117 | assign char[99][6]=8'b00111100; 1118 | assign char[99][7]=8'b00000000; 1119 | 1120 | assign char[100][0]=8'b00000000; 1121 | assign char[100][1]=8'b00000110; 1122 | assign char[100][2]=8'b00000110; 1123 | assign char[100][3]=8'b00111110; 1124 | assign char[100][4]=8'b01100110; 1125 | assign char[100][5]=8'b01100110; 1126 | assign char[100][6]=8'b00111110; 1127 | assign char[100][7]=8'b00000000; 1128 | 1129 | assign char[101][0]=8'b00000000; 1130 | assign char[101][1]=8'b00000000; 1131 | assign char[101][2]=8'b00111100; 1132 | assign char[101][3]=8'b01100110; 1133 | assign char[101][4]=8'b01111110; 1134 | assign char[101][5]=8'b01100000; 1135 | assign char[101][6]=8'b00111100; 1136 | assign char[101][7]=8'b00000000; 1137 | 1138 | assign char[102][0]=8'b00000000; 1139 | assign char[102][1]=8'b00001110; 1140 | assign char[102][2]=8'b00011000; 1141 | assign char[102][3]=8'b00111110; 1142 | assign char[102][4]=8'b00011000; 1143 | assign char[102][5]=8'b00011000; 1144 | assign char[102][6]=8'b00011000; 1145 | assign char[102][7]=8'b00000000; 1146 | 1147 | assign char[103][0]=8'b00000000; 1148 | assign char[103][1]=8'b00000000; 1149 | assign char[103][2]=8'b00111110; 1150 | assign char[103][3]=8'b01100110; 1151 | assign char[103][4]=8'b01100110; 1152 | assign char[103][5]=8'b00111110; 1153 | assign char[103][6]=8'b00000110; 1154 | assign char[103][7]=8'b01111100; 1155 | 1156 | assign char[104][0]=8'b00000000; 1157 | assign char[104][1]=8'b01100000; 1158 | assign char[104][2]=8'b01100000; 1159 | assign char[104][3]=8'b01111100; 1160 | assign char[104][4]=8'b01100110; 1161 | assign char[104][5]=8'b01100110; 1162 | assign char[104][6]=8'b01100110; 1163 | assign char[104][7]=8'b00000000; 1164 | 1165 | assign char[105][0]=8'b00000000; 1166 | assign char[105][1]=8'b00011000; 1167 | assign char[105][2]=8'b00000000; 1168 | assign char[105][3]=8'b00111000; 1169 | assign char[105][4]=8'b00011000; 1170 | assign char[105][5]=8'b00011000; 1171 | assign char[105][6]=8'b00111100; 1172 | assign char[105][7]=8'b00000000; 1173 | 1174 | assign char[106][0]=8'b00000000; 1175 | assign char[106][1]=8'b00000110; 1176 | assign char[106][2]=8'b00000000; 1177 | assign char[106][3]=8'b00000110; 1178 | assign char[106][4]=8'b00000110; 1179 | assign char[106][5]=8'b00000110; 1180 | assign char[106][6]=8'b00000110; 1181 | assign char[106][7]=8'b00111100; 1182 | 1183 | assign char[107][0]=8'b00000000; 1184 | assign char[107][1]=8'b01100000; 1185 | assign char[107][2]=8'b01100000; 1186 | assign char[107][3]=8'b01101100; 1187 | assign char[107][4]=8'b01111000; 1188 | assign char[107][5]=8'b01101100; 1189 | assign char[107][6]=8'b01100110; 1190 | assign char[107][7]=8'b00000000; 1191 | 1192 | assign char[108][0]=8'b00000000; 1193 | assign char[108][1]=8'b00111000; 1194 | assign char[108][2]=8'b00011000; 1195 | assign char[108][3]=8'b00011000; 1196 | assign char[108][4]=8'b00011000; 1197 | assign char[108][5]=8'b00011000; 1198 | assign char[108][6]=8'b00111100; 1199 | assign char[108][7]=8'b00000000; 1200 | 1201 | assign char[109][0]=8'b00000000; 1202 | assign char[109][1]=8'b00000000; 1203 | assign char[109][2]=8'b01100110; 1204 | assign char[109][3]=8'b01111111; 1205 | assign char[109][4]=8'b01111111; 1206 | assign char[109][5]=8'b01101011; 1207 | assign char[109][6]=8'b01100011; 1208 | assign char[109][7]=8'b00000000; 1209 | 1210 | assign char[110][0]=8'b00000000; 1211 | assign char[110][1]=8'b00000000; 1212 | assign char[110][2]=8'b01111100; 1213 | assign char[110][3]=8'b01100110; 1214 | assign char[110][4]=8'b01100110; 1215 | assign char[110][5]=8'b01100110; 1216 | assign char[110][6]=8'b01100110; 1217 | assign char[110][7]=8'b00000000; 1218 | 1219 | assign char[111][0]=8'b00000000; 1220 | assign char[111][1]=8'b00000000; 1221 | assign char[111][2]=8'b00111100; 1222 | assign char[111][3]=8'b01100110; 1223 | assign char[111][4]=8'b01100110; 1224 | assign char[111][5]=8'b01100110; 1225 | assign char[111][6]=8'b00111100; 1226 | assign char[111][7]=8'b00000000; 1227 | 1228 | assign char[112][0]=8'b00000000; 1229 | assign char[112][1]=8'b00000000; 1230 | assign char[112][2]=8'b01111100; 1231 | assign char[112][3]=8'b01100110; 1232 | assign char[112][4]=8'b01100110; 1233 | assign char[112][5]=8'b01111100; 1234 | assign char[112][6]=8'b01100000; 1235 | assign char[112][7]=8'b01100000; 1236 | 1237 | assign char[113][0]=8'b00000000; 1238 | assign char[113][1]=8'b00000000; 1239 | assign char[113][2]=8'b00111110; 1240 | assign char[113][3]=8'b01100110; 1241 | assign char[113][4]=8'b01100110; 1242 | assign char[113][5]=8'b00111110; 1243 | assign char[113][6]=8'b00000110; 1244 | assign char[113][7]=8'b00000110; 1245 | 1246 | assign char[114][0]=8'b00000000; 1247 | assign char[114][1]=8'b00000000; 1248 | assign char[114][2]=8'b01111100; 1249 | assign char[114][3]=8'b01100110; 1250 | assign char[114][4]=8'b01100000; 1251 | assign char[114][5]=8'b01100000; 1252 | assign char[114][6]=8'b01100000; 1253 | assign char[114][7]=8'b00000000; 1254 | 1255 | assign char[115][0]=8'b00000000; 1256 | assign char[115][1]=8'b00000000; 1257 | assign char[115][2]=8'b00111110; 1258 | assign char[115][3]=8'b01100000; 1259 | assign char[115][4]=8'b00111100; 1260 | assign char[115][5]=8'b00000110; 1261 | assign char[115][6]=8'b01111100; 1262 | assign char[115][7]=8'b00000000; 1263 | 1264 | assign char[116][0]=8'b00000000; 1265 | assign char[116][1]=8'b00011000; 1266 | assign char[116][2]=8'b01111110; 1267 | assign char[116][3]=8'b00011000; 1268 | assign char[116][4]=8'b00011000; 1269 | assign char[116][5]=8'b00011000; 1270 | assign char[116][6]=8'b00001110; 1271 | assign char[116][7]=8'b00000000; 1272 | 1273 | assign char[117][0]=8'b00000000; 1274 | assign char[117][1]=8'b00000000; 1275 | assign char[117][2]=8'b01100110; 1276 | assign char[117][3]=8'b01100110; 1277 | assign char[117][4]=8'b01100110; 1278 | assign char[117][5]=8'b01100110; 1279 | assign char[117][6]=8'b00111110; 1280 | assign char[117][7]=8'b00000000; 1281 | 1282 | assign char[118][0]=8'b00000000; 1283 | assign char[118][1]=8'b00000000; 1284 | assign char[118][2]=8'b01100110; 1285 | assign char[118][3]=8'b01100110; 1286 | assign char[118][4]=8'b01100110; 1287 | assign char[118][5]=8'b00111100; 1288 | assign char[118][6]=8'b00011000; 1289 | assign char[118][7]=8'b00000000; 1290 | 1291 | assign char[119][0]=8'b00000000; 1292 | assign char[119][1]=8'b00000000; 1293 | assign char[119][2]=8'b01100011; 1294 | assign char[119][3]=8'b01101011; 1295 | assign char[119][4]=8'b01111111; 1296 | assign char[119][5]=8'b00111110; 1297 | assign char[119][6]=8'b00110110; 1298 | assign char[119][7]=8'b00000000; 1299 | 1300 | assign char[120][0]=8'b00000000; 1301 | assign char[120][1]=8'b00000000; 1302 | assign char[120][2]=8'b01100110; 1303 | assign char[120][3]=8'b00111100; 1304 | assign char[120][4]=8'b00011000; 1305 | assign char[120][5]=8'b00111100; 1306 | assign char[120][6]=8'b01100110; 1307 | assign char[120][7]=8'b00000000; 1308 | 1309 | assign char[121][0]=8'b00000000; 1310 | assign char[121][1]=8'b00000000; 1311 | assign char[121][2]=8'b01100110; 1312 | assign char[121][3]=8'b01100110; 1313 | assign char[121][4]=8'b01100110; 1314 | assign char[121][5]=8'b00111110; 1315 | assign char[121][6]=8'b00001100; 1316 | assign char[121][7]=8'b01111000; 1317 | 1318 | assign char[122][0]=8'b00000000; 1319 | assign char[122][1]=8'b00000000; 1320 | assign char[122][2]=8'b01111110; 1321 | assign char[122][3]=8'b00001100; 1322 | assign char[122][4]=8'b00011000; 1323 | assign char[122][5]=8'b00110000; 1324 | assign char[122][6]=8'b01111110; 1325 | assign char[122][7]=8'b00000000; 1326 | 1327 | assign char[123][0]=8'b00000000; 1328 | assign char[123][1]=8'b00011000; 1329 | assign char[123][2]=8'b00111100; 1330 | assign char[123][3]=8'b01111110; 1331 | assign char[123][4]=8'b01111110; 1332 | assign char[123][5]=8'b00011000; 1333 | assign char[123][6]=8'b00111100; 1334 | assign char[123][7]=8'b00000000; 1335 | 1336 | assign char[124][0]=8'b00011000; 1337 | assign char[124][1]=8'b00011000; 1338 | assign char[124][2]=8'b00011000; 1339 | assign char[124][3]=8'b00011000; 1340 | assign char[124][4]=8'b00011000; 1341 | assign char[124][5]=8'b00011000; 1342 | assign char[124][6]=8'b00011000; 1343 | assign char[124][7]=8'b00011000; 1344 | 1345 | assign char[125][0]=8'b00000000; 1346 | assign char[125][1]=8'b01111110; 1347 | assign char[125][2]=8'b01111000; 1348 | assign char[125][3]=8'b01111100; 1349 | assign char[125][4]=8'b01101110; 1350 | assign char[125][5]=8'b01100110; 1351 | assign char[125][6]=8'b00000110; 1352 | assign char[125][7]=8'b00000000; 1353 | 1354 | assign char[126][0]=8'b00001000; 1355 | assign char[126][1]=8'b00011000; 1356 | assign char[126][2]=8'b00111000; 1357 | assign char[126][3]=8'b01111000; 1358 | assign char[126][4]=8'b00111000; 1359 | assign char[126][5]=8'b00011000; 1360 | assign char[126][6]=8'b00001000; 1361 | assign char[126][7]=8'b00000000; 1362 | 1363 | assign char[127][0]=8'b00010000; 1364 | assign char[127][1]=8'b00011000; 1365 | assign char[127][2]=8'b00011100; 1366 | assign char[127][3]=8'b00011110; 1367 | assign char[127][4]=8'b00011100; 1368 | assign char[127][5]=8'b00011000; 1369 | assign char[127][6]=8'b00010000; 1370 | assign char[127][7]=8'b00000000; 1371 | 1372 | endmodule 1373 | -------------------------------------------------------------------------------- /MUL-DIV-MOD.v: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | // Bit by Bit Multiply & Divide + Modulus 5 | // Copyright © 2022 by Gregory Scott Callen 6 | // All Rights Reserved. 7 | 8 | // Migration from JavaScript to Verilog. 9 | 10 | module mul ( 11 | input wire t, 12 | input wire [19:0] a, 13 | input wire [19:0] b, 14 | output reg [19:0] p 15 | ); 16 | 17 | // p = a * b 18 | initial begin 19 | p = ~20'h0; 20 | end 21 | 22 | always @ ( posedge t ) begin 23 | 24 | p = 20'h0; 25 | 26 | p = a [ 0 ] & b [ 0 ] ? p + ( 20'h1 << 0 ) : p ; 27 | p = a [ 0 ] & b [ 1 ] ? p + ( 20'h1 << 1 ) : p ; 28 | p = a [ 0 ] & b [ 2 ] ? p + ( 20'h1 << 2 ) : p ; 29 | p = a [ 0 ] & b [ 3 ] ? p + ( 20'h1 << 3 ) : p ; 30 | p = a [ 0 ] & b [ 4 ] ? p + ( 20'h1 << 4 ) : p ; 31 | p = a [ 0 ] & b [ 5 ] ? p + ( 20'h1 << 5 ) : p ; 32 | p = a [ 0 ] & b [ 6 ] ? p + ( 20'h1 << 6 ) : p ; 33 | p = a [ 0 ] & b [ 7 ] ? p + ( 20'h1 << 7 ) : p ; 34 | p = a [ 0 ] & b [ 8 ] ? p + ( 20'h1 << 8 ) : p ; 35 | p = a [ 0 ] & b [ 9 ] ? p + ( 20'h1 << 9 ) : p ; 36 | 37 | // Bit by Bit Multiply & Divide + Modulus 38 | // Copyright © 2022 by Gregory Scott Callen 39 | // All Rights Reserved. 40 | 41 | p = a [ 1 ] & b [ 0 ] ? p + ( 20'h1 << 1 ) : p ; 42 | p = a [ 1 ] & b [ 1 ] ? p + ( 20'h1 << 2 ) : p ; 43 | p = a [ 1 ] & b [ 2 ] ? p + ( 20'h1 << 3 ) : p ; 44 | p = a [ 1 ] & b [ 3 ] ? p + ( 20'h1 << 4 ) : p ; 45 | p = a [ 1 ] & b [ 4 ] ? p + ( 20'h1 << 5 ) : p ; 46 | p = a [ 1 ] & b [ 5 ] ? p + ( 20'h1 << 6 ) : p ; 47 | p = a [ 1 ] & b [ 6 ] ? p + ( 20'h1 << 7 ) : p ; 48 | p = a [ 1 ] & b [ 7 ] ? p + ( 20'h1 << 8 ) : p ; 49 | p = a [ 1 ] & b [ 8 ] ? p + ( 20'h1 << 9 ) : p ; 50 | p = a [ 1 ] & b [ 9 ] ? p + ( 20'h1 << 10 ) : p ; 51 | 52 | // Bit by Bit Multiply & Divide + Modulus 53 | // Copyright © 2022 by Gregory Scott Callen 54 | // All Rights Reserved. 55 | 56 | p = a [ 2 ] & b [ 0 ] ? p + ( 20'h1 << 2 ) : p ; 57 | p = a [ 2 ] & b [ 1 ] ? p + ( 20'h1 << 3 ) : p ; 58 | p = a [ 2 ] & b [ 2 ] ? p + ( 20'h1 << 4 ) : p ; 59 | p = a [ 2 ] & b [ 3 ] ? p + ( 20'h1 << 5 ) : p ; 60 | p = a [ 2 ] & b [ 4 ] ? p + ( 20'h1 << 6 ) : p ; 61 | p = a [ 2 ] & b [ 5 ] ? p + ( 20'h1 << 7 ) : p ; 62 | p = a [ 2 ] & b [ 6 ] ? p + ( 20'h1 << 8 ) : p ; 63 | p = a [ 2 ] & b [ 7 ] ? p + ( 20'h1 << 9 ) : p ; 64 | p = a [ 2 ] & b [ 8 ] ? p + ( 20'h1 << 10 ) : p ; 65 | p = a [ 2 ] & b [ 9 ] ? p + ( 20'h1 << 11 ) : p ; 66 | 67 | // Bit by Bit Multiply & Divide + Modulus 68 | // Copyright © 2022 by Gregory Scott Callen 69 | // All Rights Reserved. 70 | 71 | p = a [ 3 ] & b [ 0 ] ? p + ( 20'h1 << 3 ) : p ; 72 | p = a [ 3 ] & b [ 1 ] ? p + ( 20'h1 << 4 ) : p ; 73 | p = a [ 3 ] & b [ 2 ] ? p + ( 20'h1 << 5 ) : p ; 74 | p = a [ 3 ] & b [ 3 ] ? p + ( 20'h1 << 6 ) : p ; 75 | p = a [ 3 ] & b [ 4 ] ? p + ( 20'h1 << 7 ) : p ; 76 | p = a [ 3 ] & b [ 5 ] ? p + ( 20'h1 << 8 ) : p ; 77 | p = a [ 3 ] & b [ 6 ] ? p + ( 20'h1 << 9 ) : p ; 78 | p = a [ 3 ] & b [ 7 ] ? p + ( 20'h1 << 10 ) : p ; 79 | p = a [ 3 ] & b [ 8 ] ? p + ( 20'h1 << 11 ) : p ; 80 | p = a [ 3 ] & b [ 9 ] ? p + ( 20'h1 << 12 ) : p ; 81 | 82 | // Bit by Bit Multiply & Divide + Modulus 83 | // Copyright © 2022 by Gregory Scott Callen 84 | // All Rights Reserved. 85 | 86 | p = a [ 4 ] & b [ 0 ] ? p + ( 20'h1 << 4 ) : p ; 87 | p = a [ 4 ] & b [ 1 ] ? p + ( 20'h1 << 5 ) : p ; 88 | p = a [ 4 ] & b [ 2 ] ? p + ( 20'h1 << 6 ) : p ; 89 | p = a [ 4 ] & b [ 3 ] ? p + ( 20'h1 << 7 ) : p ; 90 | p = a [ 4 ] & b [ 4 ] ? p + ( 20'h1 << 8 ) : p ; 91 | p = a [ 4 ] & b [ 5 ] ? p + ( 20'h1 << 9 ) : p ; 92 | p = a [ 4 ] & b [ 6 ] ? p + ( 20'h1 << 10 ) : p ; 93 | p = a [ 4 ] & b [ 7 ] ? p + ( 20'h1 << 11 ) : p ; 94 | p = a [ 4 ] & b [ 8 ] ? p + ( 20'h1 << 12 ) : p ; 95 | p = a [ 4 ] & b [ 9 ] ? p + ( 20'h1 << 13 ) : p ; 96 | 97 | // Bit by Bit Multiply & Divide + Modulus 98 | // Copyright © 2022 by Gregory Scott Callen 99 | // All Rights Reserved. 100 | 101 | p = a [ 5 ] & b [ 0 ] ? p + ( 20'h1 << 5 ) : p ; 102 | p = a [ 5 ] & b [ 1 ] ? p + ( 20'h1 << 6 ) : p ; 103 | p = a [ 5 ] & b [ 2 ] ? p + ( 20'h1 << 7 ) : p ; 104 | p = a [ 5 ] & b [ 3 ] ? p + ( 20'h1 << 8 ) : p ; 105 | p = a [ 5 ] & b [ 4 ] ? p + ( 20'h1 << 9 ) : p ; 106 | p = a [ 5 ] & b [ 5 ] ? p + ( 20'h1 << 10 ) : p ; 107 | p = a [ 5 ] & b [ 6 ] ? p + ( 20'h1 << 11 ) : p ; 108 | p = a [ 5 ] & b [ 7 ] ? p + ( 20'h1 << 12 ) : p ; 109 | p = a [ 5 ] & b [ 8 ] ? p + ( 20'h1 << 13 ) : p ; 110 | p = a [ 5 ] & b [ 9 ] ? p + ( 20'h1 << 14 ) : p ; 111 | 112 | // Bit by Bit Multiply & Divide + Modulus 113 | // Copyright © 2022 by Gregory Scott Callen 114 | // All Rights Reserved. 115 | 116 | p = a [ 6 ] & b [ 0 ] ? p + ( 20'h1 << 6 ) : p ; 117 | p = a [ 6 ] & b [ 1 ] ? p + ( 20'h1 << 7 ) : p ; 118 | p = a [ 6 ] & b [ 2 ] ? p + ( 20'h1 << 8 ) : p ; 119 | p = a [ 6 ] & b [ 3 ] ? p + ( 20'h1 << 9 ) : p ; 120 | p = a [ 6 ] & b [ 4 ] ? p + ( 20'h1 << 10 ) : p ; 121 | p = a [ 6 ] & b [ 5 ] ? p + ( 20'h1 << 11 ) : p ; 122 | p = a [ 6 ] & b [ 6 ] ? p + ( 20'h1 << 12 ) : p ; 123 | p = a [ 6 ] & b [ 7 ] ? p + ( 20'h1 << 13 ) : p ; 124 | p = a [ 6 ] & b [ 8 ] ? p + ( 20'h1 << 14 ) : p ; 125 | p = a [ 6 ] & b [ 9 ] ? p + ( 20'h1 << 15 ) : p ; 126 | 127 | // Bit by Bit Multiply & Divide + Modulus 128 | // Copyright © 2022 by Gregory Scott Callen 129 | // All Rights Reserved. 130 | 131 | p = a [ 7 ] & b [ 0 ] ? p + ( 20'h1 << 7 ) : p ; 132 | p = a [ 7 ] & b [ 1 ] ? p + ( 20'h1 << 8 ) : p ; 133 | p = a [ 7 ] & b [ 2 ] ? p + ( 20'h1 << 9 ) : p ; 134 | p = a [ 7 ] & b [ 3 ] ? p + ( 20'h1 << 10 ) : p ; 135 | p = a [ 7 ] & b [ 4 ] ? p + ( 20'h1 << 11 ) : p ; 136 | p = a [ 7 ] & b [ 5 ] ? p + ( 20'h1 << 12 ) : p ; 137 | p = a [ 7 ] & b [ 6 ] ? p + ( 20'h1 << 13 ) : p ; 138 | p = a [ 7 ] & b [ 7 ] ? p + ( 20'h1 << 14 ) : p ; 139 | p = a [ 7 ] & b [ 8 ] ? p + ( 20'h1 << 15 ) : p ; 140 | p = a [ 7 ] & b [ 9 ] ? p + ( 20'h1 << 16 ) : p ; 141 | 142 | // Bit by Bit Multiply & Divide + Modulus 143 | // Copyright © 2022 by Gregory Scott Callen 144 | // All Rights Reserved. 145 | 146 | p = a [ 8 ] & b [ 0 ] ? p + ( 20'h1 << 8 ) : p ; 147 | p = a [ 8 ] & b [ 1 ] ? p + ( 20'h1 << 9 ) : p ; 148 | p = a [ 8 ] & b [ 2 ] ? p + ( 20'h1 << 10 ) : p ; 149 | p = a [ 8 ] & b [ 3 ] ? p + ( 20'h1 << 11 ) : p ; 150 | p = a [ 8 ] & b [ 4 ] ? p + ( 20'h1 << 12 ) : p ; 151 | p = a [ 8 ] & b [ 5 ] ? p + ( 20'h1 << 13 ) : p ; 152 | p = a [ 8 ] & b [ 6 ] ? p + ( 20'h1 << 14 ) : p ; 153 | p = a [ 8 ] & b [ 7 ] ? p + ( 20'h1 << 15 ) : p ; 154 | p = a [ 8 ] & b [ 8 ] ? p + ( 20'h1 << 16 ) : p ; 155 | p = a [ 8 ] & b [ 9 ] ? p + ( 20'h1 << 17 ) : p ; 156 | 157 | // Bit by Bit Multiply & Divide + Modulus 158 | // Copyright © 2022 by Gregory Scott Callen 159 | // All Rights Reserved. 160 | 161 | p = a [ 9 ] & b [ 0 ] ? p + ( 20'h1 << 9 ) : p ; 162 | p = a [ 9 ] & b [ 1 ] ? p + ( 20'h1 << 10 ) : p ; 163 | p = a [ 9 ] & b [ 2 ] ? p + ( 20'h1 << 11 ) : p ; 164 | p = a [ 9 ] & b [ 3 ] ? p + ( 20'h1 << 12 ) : p ; 165 | p = a [ 9 ] & b [ 4 ] ? p + ( 20'h1 << 13 ) : p ; 166 | p = a [ 9 ] & b [ 5 ] ? p + ( 20'h1 << 14 ) : p ; 167 | p = a [ 9 ] & b [ 6 ] ? p + ( 20'h1 << 15 ) : p ; 168 | p = a [ 9 ] & b [ 7 ] ? p + ( 20'h1 << 16 ) : p ; 169 | p = a [ 9 ] & b [ 8 ] ? p + ( 20'h1 << 17 ) : p ; 170 | p = a [ 9 ] & b [ 9 ] ? p + ( 20'h1 << 18 ) : p ; 171 | 172 | // Bit by Bit Multiply & Divide + Modulus 173 | // Copyright © 2022 by Gregory Scott Callen 174 | // All Rights Reserved. 175 | 176 | end 177 | 178 | endmodule // 72897 = 517 * 141 179 | 180 | // Bit by Bit Multiply & Divide + Modulus 181 | // Copyright © 2022 by Gregory Scott Callen 182 | // All Rights Reserved. 183 | 184 | module div ( 185 | input wire t, 186 | input wire [19:0] a, 187 | input wire [19:0] b, 188 | output reg [19:0] n, 189 | output reg [19:0] r 190 | ); 191 | 192 | initial begin 193 | n = ~20'h0; 194 | r = ~20'h0; 195 | end 196 | 197 | always @ ( posedge t ) begin 198 | 199 | r = a; n = 20'd0; 200 | 201 | if (( b << 9 ) <= r ) begin 202 | n = n | 20'd512; 203 | r = b [ 9 ] ? r - ( 20'd1 << 18 ) : r ; 204 | r = b [ 8 ] ? r - ( 20'd1 << 17 ) : r ; 205 | r = b [ 7 ] ? r - ( 20'd1 << 16 ) : r ; 206 | r = b [ 6 ] ? r - ( 20'd1 << 15 ) : r ; 207 | r = b [ 5 ] ? r - ( 20'd1 << 14 ) : r ; 208 | r = b [ 4 ] ? r - ( 20'd1 << 13 ) : r ; 209 | r = b [ 3 ] ? r - ( 20'd1 << 12 ) : r ; 210 | r = b [ 2 ] ? r - ( 20'd1 << 11 ) : r ; 211 | r = b [ 1 ] ? r - ( 20'd1 << 10 ) : r ; 212 | r = b [ 0 ] ? r - ( 20'd1 << 9 ) : r ; 213 | end 214 | 215 | // Bit by Bit Multiply & Divide + Modulus 216 | // Copyright © 2022 by Gregory Scott Callen 217 | // All Rights Reserved. 218 | 219 | if (( b << 8 ) <= r ) begin 220 | n = n | 20'd256; 221 | r = b [ 9 ] ? r - ( 20'd1 << 17 ) : r ; 222 | r = b [ 8 ] ? r - ( 20'd1 << 16 ) : r ; 223 | r = b [ 7 ] ? r - ( 20'd1 << 15 ) : r ; 224 | r = b [ 6 ] ? r - ( 20'd1 << 14 ) : r ; 225 | r = b [ 5 ] ? r - ( 20'd1 << 13 ) : r ; 226 | r = b [ 4 ] ? r - ( 20'd1 << 12 ) : r ; 227 | r = b [ 3 ] ? r - ( 20'd1 << 11 ) : r ; 228 | r = b [ 2 ] ? r - ( 20'd1 << 10 ) : r ; 229 | r = b [ 1 ] ? r - ( 20'd1 << 9 ) : r ; 230 | r = b [ 0 ] ? r - ( 20'd1 << 8 ) : r ; 231 | end 232 | 233 | // Bit by Bit Multiply & Divide + Modulus 234 | // Copyright © 2022 by Gregory Scott Callen 235 | // All Rights Reserved. 236 | 237 | if (( b << 7 ) <= r ) begin 238 | n = n | 20'd128; 239 | r = b [ 9 ] ? r - ( 20'd1 << 16 ) : r ; 240 | r = b [ 8 ] ? r - ( 20'd1 << 15 ) : r ; 241 | r = b [ 7 ] ? r - ( 20'd1 << 14 ) : r ; 242 | r = b [ 6 ] ? r - ( 20'd1 << 13 ) : r ; 243 | r = b [ 5 ] ? r - ( 20'd1 << 12 ) : r ; 244 | r = b [ 4 ] ? r - ( 20'd1 << 11 ) : r ; 245 | r = b [ 3 ] ? r - ( 20'd1 << 10 ) : r ; 246 | r = b [ 2 ] ? r - ( 20'd1 << 9 ) : r ; 247 | r = b [ 1 ] ? r - ( 20'd1 << 8 ) : r ; 248 | r = b [ 0 ] ? r - ( 20'd1 << 7 ) : r ; 249 | end 250 | 251 | // Bit by Bit Multiply & Divide + Modulus 252 | // Copyright © 2022 by Gregory Scott Callen 253 | // All Rights Reserved. 254 | 255 | if (( b << 6 ) <= r ) begin 256 | n = n | 20'd64; 257 | r = b [ 9 ] ? r - ( 20'd1 << 15 ) : r ; 258 | r = b [ 8 ] ? r - ( 20'd1 << 14 ) : r ; 259 | r = b [ 7 ] ? r - ( 20'd1 << 13 ) : r ; 260 | r = b [ 6 ] ? r - ( 20'd1 << 12 ) : r ; 261 | r = b [ 5 ] ? r - ( 20'd1 << 11 ) : r ; 262 | r = b [ 4 ] ? r - ( 20'd1 << 10 ) : r ; 263 | r = b [ 3 ] ? r - ( 20'd1 << 9 ) : r ; 264 | r = b [ 2 ] ? r - ( 20'd1 << 8 ) : r ; 265 | r = b [ 1 ] ? r - ( 20'd1 << 7 ) : r ; 266 | r = b [ 0 ] ? r - ( 20'd1 << 6 ) : r ; 267 | end 268 | 269 | // Bit by Bit Multiply & Divide + Modulus 270 | // Copyright © 2022 by Gregory Scott Callen 271 | // All Rights Reserved. 272 | 273 | if (( b << 5 ) <= r ) begin 274 | n = n | 20'd32; 275 | r = b [ 9 ] ? r - ( 20'd1 << 14 ) : r ; 276 | r = b [ 8 ] ? r - ( 20'd1 << 13 ) : r ; 277 | r = b [ 7 ] ? r - ( 20'd1 << 12 ) : r ; 278 | r = b [ 6 ] ? r - ( 20'd1 << 11 ) : r ; 279 | r = b [ 5 ] ? r - ( 20'd1 << 10 ) : r ; 280 | r = b [ 4 ] ? r - ( 20'd1 << 9 ) : r ; 281 | r = b [ 3 ] ? r - ( 20'd1 << 8 ) : r ; 282 | r = b [ 2 ] ? r - ( 20'd1 << 7 ) : r ; 283 | r = b [ 1 ] ? r - ( 20'd1 << 6 ) : r ; 284 | r = b [ 0 ] ? r - ( 20'd1 << 5 ) : r ; 285 | end 286 | 287 | // Bit by Bit Multiply & Divide + Modulus 288 | // Copyright © 2022 by Gregory Scott Callen 289 | // All Rights Reserved. 290 | 291 | if (( b << 4 ) <= r ) begin 292 | n = n | 20'd16; 293 | r = b [ 9 ] ? r - ( 20'd1 << 13 ) : r ; 294 | r = b [ 8 ] ? r - ( 20'd1 << 12 ) : r ; 295 | r = b [ 7 ] ? r - ( 20'd1 << 11 ) : r ; 296 | r = b [ 6 ] ? r - ( 20'd1 << 10 ) : r ; 297 | r = b [ 5 ] ? r - ( 20'd1 << 9 ) : r ; 298 | r = b [ 4 ] ? r - ( 20'd1 << 8 ) : r ; 299 | r = b [ 3 ] ? r - ( 20'd1 << 7 ) : r ; 300 | r = b [ 2 ] ? r - ( 20'd1 << 6 ) : r ; 301 | r = b [ 1 ] ? r - ( 20'd1 << 5 ) : r ; 302 | r = b [ 0 ] ? r - ( 20'd1 << 4 ) : r ; 303 | end 304 | 305 | // Bit by Bit Multiply & Divide + Modulus 306 | // Copyright © 2022 by Gregory Scott Callen 307 | // All Rights Reserved. 308 | 309 | if (( b << 3 ) <= r ) begin 310 | n = n | 20'd8; 311 | r = b [ 9 ] ? r - ( 20'd1 << 12 ) : r ; 312 | r = b [ 8 ] ? r - ( 20'd1 << 11 ) : r ; 313 | r = b [ 7 ] ? r - ( 20'd1 << 10 ) : r ; 314 | r = b [ 6 ] ? r - ( 20'd1 << 9 ) : r ; 315 | r = b [ 5 ] ? r - ( 20'd1 << 8 ) : r ; 316 | r = b [ 4 ] ? r - ( 20'd1 << 7 ) : r ; 317 | r = b [ 3 ] ? r - ( 20'd1 << 6 ) : r ; 318 | r = b [ 2 ] ? r - ( 20'd1 << 5 ) : r ; 319 | r = b [ 1 ] ? r - ( 20'd1 << 4 ) : r ; 320 | r = b [ 0 ] ? r - ( 20'd1 << 3 ) : r ; 321 | end 322 | 323 | // Bit by Bit Multiply & Divide + Modulus 324 | // Copyright © 2022 by Gregory Scott Callen 325 | // All Rights Reserved. 326 | 327 | if (( b << 2 ) <= r ) begin 328 | n = n | 20'd4; 329 | r = b [ 9 ] ? r - ( 20'd1 << 11 ) : r ; 330 | r = b [ 8 ] ? r - ( 20'd1 << 10 ) : r ; 331 | r = b [ 7 ] ? r - ( 20'd1 << 9 ) : r ; 332 | r = b [ 6 ] ? r - ( 20'd1 << 8 ) : r ; 333 | r = b [ 5 ] ? r - ( 20'd1 << 7 ) : r ; 334 | r = b [ 4 ] ? r - ( 20'd1 << 6 ) : r ; 335 | r = b [ 3 ] ? r - ( 20'd1 << 5 ) : r ; 336 | r = b [ 2 ] ? r - ( 20'd1 << 4 ) : r ; 337 | r = b [ 1 ] ? r - ( 20'd1 << 3 ) : r ; 338 | r = b [ 0 ] ? r - ( 20'd1 << 2 ) : r ; 339 | end 340 | 341 | // Bit by Bit Multiply & Divide + Modulus 342 | // Copyright © 2022 by Gregory Scott Callen 343 | // All Rights Reserved. 344 | 345 | if (( b << 1 ) <= r ) begin 346 | n = n | 20'd2; 347 | r = b [ 9 ] ? r - ( 20'd1 << 10 ) : r ; 348 | r = b [ 8 ] ? r - ( 20'd1 << 9 ) : r ; 349 | r = b [ 7 ] ? r - ( 20'd1 << 8 ) : r ; 350 | r = b [ 6 ] ? r - ( 20'd1 << 7 ) : r ; 351 | r = b [ 5 ] ? r - ( 20'd1 << 6 ) : r ; 352 | r = b [ 4 ] ? r - ( 20'd1 << 5 ) : r ; 353 | r = b [ 3 ] ? r - ( 20'd1 << 4 ) : r ; 354 | r = b [ 2 ] ? r - ( 20'd1 << 3 ) : r ; 355 | r = b [ 1 ] ? r - ( 20'd1 << 2 ) : r ; 356 | r = b [ 0 ] ? r - ( 20'd1 << 1 ) : r ; 357 | end 358 | 359 | // Bit by Bit Multiply & Divide + Modulus 360 | // Copyright © 2022 by Gregory Scott Callen 361 | // All Rights Reserved. 362 | 363 | if (( b << 0 ) <= r ) begin 364 | n = n | 20'd1; 365 | r = b [ 9 ] ? r - ( 20'd1 << 9 ) : r ; 366 | r = b [ 8 ] ? r - ( 20'd1 << 8 ) : r ; 367 | r = b [ 7 ] ? r - ( 20'd1 << 7 ) : r ; 368 | r = b [ 6 ] ? r - ( 20'd1 << 6 ) : r ; 369 | r = b [ 5 ] ? r - ( 20'd1 << 5 ) : r ; 370 | r = b [ 4 ] ? r - ( 20'd1 << 4 ) : r ; 371 | r = b [ 3 ] ? r - ( 20'd1 << 3 ) : r ; 372 | r = b [ 2 ] ? r - ( 20'd1 << 2 ) : r ; 373 | r = b [ 1 ] ? r - ( 20'd1 << 1 ) : r ; 374 | r = b [ 0 ] ? r - ( 20'd1 << 0 ) : r ; 375 | end 376 | 377 | // Bit by Bit Multiply & Divide + Modulus 378 | // Copyright © 2022 by Gregory Scott Callen 379 | // All Rights Reserved. 380 | 381 | end 382 | 383 | // 524 = 72897 / 139 r 61 384 | 385 | endmodule 386 | -------------------------------------------------------------------------------- /P1080.v: -------------------------------------------------------------------------------- 1 | 2 | `timescale 1ns / 1ps 3 | 4 | //////////////////////////////////////////////////////////////////////////////// 5 | // Company: Dendrite Digital 6 | // Engineer: Gregory Scott Callen 7 | // 8 | // Create Date: 19:26:19 10/06/2020 9 | // Design Name: P1080 10 | // Module Name: E:/private/P1080/P1080.v 11 | // Project Name: P1080 12 | // Target Device: Nexys 4 (Limited Edition) Artix 7 100T 13 | // Tool versions: Vivado 2019.2 14 | // 15 | // Dependencies: 100 MHz Clock Input and 12-bit VGA Output 16 | // 17 | // Revision: 0.01 - File Created 18 | // Revision: 0.02 - Moved from ISE to Vivado 19 | // 20 | //////////////////////////////////////////////////////////////////////////////// 21 | 22 | //`define DEBUG 23 | 24 | `ifdef DEBUG 25 | module TestP1080; 26 | 27 | // Inputs 28 | reg clk; 29 | 30 | // Outputs 31 | wire MHz148; 32 | wire [11:0] hCount; 33 | wire [11:0] vCount; 34 | wire [11:0] x; 35 | wire [11:0] y; 36 | wire memw; 37 | wire [14:0] mema; 38 | wire [31:0] memi; 39 | wire [31:0] memo; 40 | wire [3:0] vgaRed; 41 | wire [3:0] vgaGreen; 42 | wire [3:0] vgaBlue; 43 | wire Hsync; 44 | wire Vsync; 45 | 46 | // Instantiate the Unit Under Test (UUT) 47 | P720 uut ( 48 | .clk(clk), 49 | .MHz148(MHz148), 50 | .hCount(hCount), 51 | .vCount(vCount), 52 | .x(x), 53 | .y(y), 54 | .memw(memw), 55 | .mema(mema), 56 | .memi(memi), 57 | .memo(memo), 58 | .vgaRed(vgaRed), 59 | .vgaGreen(vgaGreen), 60 | .vgaBlue(vgaBlue), 61 | .Hsync(Hsync), 62 | .Vsync(Vsync) 63 | ); 64 | 65 | initial begin 66 | // Initialize Inputs 67 | clk = 0; 68 | 69 | // Wait 100 ns for global reset to finish 70 | #100; 71 | 72 | // Add stimulus here 73 | 74 | end 75 | 76 | always clk=#10~clk; 77 | 78 | endmodule 79 | `endif 80 | 81 | `define hva 1920 82 | `define hfp 88 83 | `define hsw 44 84 | `define hbp 148 85 | `define htb 280 86 | `define htp 2200 87 | `define hsp 1'd1 88 | 89 | `define vva 1080 90 | `define vfp 4 91 | `define vsw 5 92 | `define vbp 36 93 | `define vtb 45 94 | `define vtl 1125 95 | `define vsp 1'd1 96 | 97 | module P1080( 98 | input wire clk, 99 | `ifdef DEBUG 100 | output wire MHz148, 101 | output reg [11:0] hCount, 102 | output reg [11:0] vCount, 103 | output wire [11:0] x, 104 | output wire [11:0] y, 105 | output reg memw, 106 | output reg [14:0] mema, 107 | output reg [31:0] memi, 108 | output wire [31:0] memo, 109 | `endif 110 | output wire [ 3:0] vgaRed, 111 | output wire [ 3:0] vgaGreen, 112 | output wire [ 3:0] vgaBlue, 113 | output reg Hsync, 114 | output reg Vsync 115 | ); 116 | 117 | `ifndef DEBUG 118 | wire MHz148; 119 | reg [11:0] hCount; 120 | reg [11:0] vCount; 121 | wire [11:0] y; 122 | wire [11:0] x; 123 | reg memw; 124 | reg [15:0] mema; 125 | reg [31:0] memi; 126 | wire [31:0] memo; 127 | `endif 128 | 129 | reg MHz74; 130 | reg [ 7:0] locb; 131 | reg [11:0] color; 132 | reg [11:0] off; 133 | reg [11:0] on; 134 | reg [23:0] temp; 135 | 136 | wire [ 3:0] hex; 137 | wire [ 3:0] i; 138 | 139 | assign x = hCount-11'd`htb+11'd4; 140 | assign y = vCount-10'd`vtb-10'd4; 141 | assign vgaRed = color[11:8]; 142 | assign vgaGreen = color[7:4]; 143 | assign vgaBlue = color[3:0]; 144 | 145 | timer clock(MHz148,clk); // 74.25 MHz 146 | 147 | wire [31:0] chro; 148 | reg [ 7:0] chra; 149 | ChrSet acs(~MHz74,chra,chro); 150 | 151 | wire [31:0] ramo; 152 | wire [31:0] rami; assign rami=memi; 153 | wire [14:0] rama; assign rama=mema[14:0]; 154 | wire ramw; assign ramw=(mema[15]==1'd0)?memw:1'd1; 155 | VRAM ram(~MHz74,ramw,rama,rami,ramo); 156 | 157 | assign memo=(mema[15]==1'd1)?chro:ramo; 158 | 159 | wire [ 2:0] col;assign col = x[2:0]; 160 | wire [ 2:0] row;assign row = y[2:0]; 161 | wire [ 7:0] pixels; 162 | reg [31:0] data; 163 | locByte loc(data,row[1:0],pixels); 164 | 165 | wire [ 7:0] myByte; 166 | mySixBits msb(y[6:3]^x[6:3]|6'd0,myByte); 167 | 168 | initial begin 169 | MHz74 =1'd0; 170 | memw <=1'd0; 171 | mema <=~16'd0; 172 | memi <=32'hFFF00800; 173 | data <=32'd0; 174 | temp <=32'd0; 175 | color <=12'd0; 176 | on <=12'hFFF; 177 | off <=12'h009; 178 | hCount<=12'd360; 179 | vCount<=12'd30; 180 | Hsync <=1'd0; 181 | Vsync <=1'd0; 182 | end 183 | 184 | 185 | always @ (posedge MHz74)begin 186 | if(memw==1)begin 187 | if(x[2:1]==1)begin 188 | mema<=(y[9:3]<<8)-(y[9:3]<<4)+x[11:3]+16'd1; 189 | end else if(x[2:1]==2)begin 190 | temp<=memo[31:8]; 191 | chra<={memo[6:0],y[2]}; 192 | `ifdef DEBUG 193 | $display("\npixel clock = 6"); 194 | $display("mema = %4h",mema); 195 | $display("memo = %8h",memo); 196 | $strobe ("chra = %2h",chra>>1); 197 | `endif 198 | end else if(x[2:1]==3)begin 199 | data<=chro; 200 | on <=temp[23:12]; 201 | off <=temp[11: 0]; 202 | end 203 | end else begin 204 | mema<=mema+16'd1; 205 | chra<=(mema[6:0]<<1)+8'd2; 206 | if(mema!=16'hFFFF)begin 207 | if(mema<16'h7F00)begin 208 | memi<=((memi+32'h00700300)|mema[6:0])+32'd1; 209 | end else begin 210 | memi<=chro; 211 | end 212 | end 213 | if(mema==16'h8000)begin 214 | memw<=1'd1; 215 | mema<=0; 216 | `ifdef DEBUG 217 | $strobe("\n"); 218 | $strobe("initialize memw=%1b mema=%5h memi=%8h memo=%8h",memw,mema,memi,memo); 219 | `endif 220 | end 221 | end 222 | end 223 | 224 | always @ (posedge MHz148) begin 225 | MHz74=~MHz74; 226 | if(memw==1)begin 227 | if((hCount>`hfp)&&(hCount<=`hfp+`hsw))begin 228 | Hsync<=`hsp; 229 | end else begin 230 | Hsync<=~`hsp; 231 | end 232 | if((vCount>`vfp)&&(vCount<=`vfp+`vsw))begin 233 | Vsync<=`vsp; 234 | end else begin 235 | Vsync<=~`vsp; 236 | end 237 | if(x==`hva-1)begin 238 | hCount<=12'd1; 239 | vCount<=vCount+12'd1; 240 | end else begin 241 | hCount<=hCount+12'd1; 242 | end 243 | if(y==`vva-1)begin 244 | vCount<=12'd1; 245 | end 246 | if((x>=`hva)||(y>=`vva))begin 247 | color<=12'd0; 248 | end else begin 249 | color<=pixels[~col]?on:off; 250 | `ifdef DEBUG 251 | $display("\npixel clock=%1d",col); 252 | $display("hCount=%4d x=%4d",hCount,x); 253 | $display("vCount=%4d y=%4d",vCount,y); 254 | $display("pixels=%8h",pixels); 255 | $display(" on=%3h", on); 256 | $display(" off=%3h", off); 257 | `endif 258 | end 259 | `ifdef DEBUG 260 | if(x[2:0]==0)begin 261 | $display("\npixel clock = 7"); 262 | $display("mema = %4h",mema); 263 | $display("chro = %8h",chro); 264 | $display(" on = %3h",temp[23:12]); 265 | $display(" off = %3h",temp[11: 0]); 266 | end 267 | if((x==32)&&(y==0))begin 268 | $finish; 269 | end 270 | `endif 271 | end 272 | end 273 | endmodule 274 | 275 | module mySixBits( 276 | input wire [5:0] chra, 277 | output wire [7:0] chro 278 | ); 279 | 280 | wire [7:0] myByte [63:0]; 281 | 282 | assign chro = myByte[chra]; 283 | 284 | assign myByte[ 0]=8'd48 ; // 0 285 | assign myByte[ 1]=8'd49 ; // 1 286 | assign myByte[ 2]=8'd50 ; // 2 287 | assign myByte[ 3]=8'd51 ; // 3 288 | assign myByte[ 4]=8'd52 ; // 4 289 | assign myByte[ 5]=8'd53 ; // 5 290 | assign myByte[ 6]=8'd54 ; // 6 291 | assign myByte[ 7]=8'd55 ; // 7 292 | assign myByte[ 8]=8'd56 ; // 8 293 | assign myByte[ 9]=8'd57 ; // 9 294 | assign myByte[10]=8'd65 ; // A 295 | assign myByte[11]=8'd66 ; // B 296 | assign myByte[12]=8'd67 ; // C 297 | assign myByte[13]=8'd68 ; // D 298 | assign myByte[14]=8'd69 ; // E 299 | assign myByte[15]=8'd70 ; // F 300 | assign myByte[16]=8'd71 ; // G 301 | assign myByte[17]=8'd72 ; // H 302 | assign myByte[18]=8'd73 ; // I 303 | assign myByte[19]=8'd74 ; // J 304 | assign myByte[20]=8'd75 ; // K 305 | assign myByte[21]=8'd76 ; // L 306 | assign myByte[22]=8'd77 ; // M 307 | assign myByte[23]=8'd78 ; // N 308 | assign myByte[24]=8'd79 ; // O 309 | assign myByte[25]=8'd80 ; // P 310 | assign myByte[26]=8'd81 ; // Q 311 | assign myByte[27]=8'd82 ; // R 312 | assign myByte[28]=8'd83 ; // S 313 | assign myByte[29]=8'd84 ; // T 314 | assign myByte[30]=8'd85 ; // U 315 | assign myByte[31]=8'd86 ; // V 316 | assign myByte[32]=8'd87 ; // W 317 | assign myByte[33]=8'd88 ; // X 318 | assign myByte[34]=8'd89 ; // Y 319 | assign myByte[35]=8'd90 ; // Z 320 | assign myByte[36]=8'd97 ; // a 321 | assign myByte[37]=8'd98 ; // b 322 | assign myByte[38]=8'd99 ; // c 323 | assign myByte[39]=8'd100; // d 324 | assign myByte[40]=8'd101; // e 325 | assign myByte[41]=8'd102; // f 326 | assign myByte[42]=8'd103; // g 327 | assign myByte[43]=8'd104; // h 328 | assign myByte[44]=8'd105; // i 329 | assign myByte[45]=8'd106; // j 330 | assign myByte[46]=8'd107; // k 331 | assign myByte[47]=8'd108; // l 332 | assign myByte[48]=8'd109; // m 333 | assign myByte[49]=8'd110; // n 334 | assign myByte[50]=8'd111; // o 335 | assign myByte[51]=8'd112; // p 336 | assign myByte[52]=8'd113; // q 337 | assign myByte[53]=8'd114; // r 338 | assign myByte[54]=8'd115; // s 339 | assign myByte[55]=8'd116; // t 340 | assign myByte[56]=8'd117; // u 341 | assign myByte[57]=8'd118; // v 342 | assign myByte[58]=8'd119; // w 343 | assign myByte[59]=8'd120; // x 344 | assign myByte[60]=8'd121; // y 345 | assign myByte[61]=8'd122; // z 346 | assign myByte[62]=8'd46 ; // . 347 | assign myByte[63]=8'd32 ; // space 348 | 349 | endmodule 350 | 351 | module locByte( 352 | input wire [31:0] l, 353 | input wire [ 1:0] s, 354 | output wire [ 7:0] b 355 | ); 356 | wire[7:0]lbytes[3:0]; 357 | 358 | assign lbytes[0]=l[31:24]; 359 | assign lbytes[1]=l[23:16]; 360 | assign lbytes[2]=l[15: 8]; 361 | assign lbytes[3]=l[ 7: 0]; 362 | 363 | assign b=lbytes[s]; 364 | 365 | endmodule 366 | 367 | module VRAM( 368 | input wire memc, 369 | input wire memw, 370 | input wire [14:0] mema, 371 | input wire [31:0] memi, 372 | output reg [31:0] memo 373 | ); 374 | 375 | reg [31:0] ram [32767:0]; 376 | 377 | initial begin 378 | memo<=32'd0; 379 | end 380 | 381 | always @ (posedge memc) begin 382 | if(memw==1'd0)begin 383 | ram[mema]<=memi; 384 | end else begin 385 | memo<=ram[mema]; 386 | end 387 | end 388 | 389 | endmodule 390 | 391 | module ChrSet( 392 | input wire chrc, 393 | input wire [ 7:0] chra, 394 | output reg [31:0] chro 395 | ); 396 | 397 | wire[31:0]rom[255:0]; 398 | 399 | initial begin 400 | chro<=32'd0; 401 | end 402 | 403 | always@(posedge chrc)begin 404 | chro<=rom[chra]; 405 | end 406 | 407 | assign rom[ 0]={8'b00000000, 408 | 8'b00110110, 409 | 8'b01111111, 410 | 8'b01111111}; 411 | assign rom[ 1]={8'b00111110, 412 | 8'b00011100, 413 | 8'b00001000, 414 | 8'b00000000}; 415 | 416 | assign rom[ 2]={8'b00011000, 417 | 8'b00011000, 418 | 8'b00011000, 419 | 8'b00011111}; 420 | assign rom[ 3]={8'b00011111, 421 | 8'b00011000, 422 | 8'b00011000, 423 | 8'b00011000}; 424 | 425 | assign rom[ 4]={8'b00000011, 426 | 8'b00000011, 427 | 8'b00000011, 428 | 8'b00000011}; 429 | assign rom[ 5]={8'b00000011, 430 | 8'b00000011, 431 | 8'b00000011, 432 | 8'b00000011}; 433 | 434 | assign rom[ 6]={8'b00011000, 435 | 8'b00011000, 436 | 8'b00011000, 437 | 8'b11111000}; 438 | assign rom[ 7]={8'b11111000, 439 | 8'b00000000, 440 | 8'b00000000, 441 | 8'b00000000}; 442 | 443 | assign rom[ 8]={8'b00011000, 444 | 8'b00011000, 445 | 8'b00011000, 446 | 8'b11111000}; 447 | assign rom[ 9]={8'b11111000, 448 | 8'b00011000, 449 | 8'b00011000, 450 | 8'b00011000}; 451 | 452 | assign rom[ 10]={8'b00000000, 453 | 8'b00000000, 454 | 8'b00000000, 455 | 8'b11111000}; 456 | assign rom[ 11]={8'b11111000, 457 | 8'b00011000, 458 | 8'b00011000, 459 | 8'b00011000}; 460 | 461 | assign rom[ 12]={8'b00000011, 462 | 8'b00000111, 463 | 8'b00001110, 464 | 8'b00011100}; 465 | assign rom[ 13]={8'b00111000, 466 | 8'b01110000, 467 | 8'b11100000, 468 | 8'b11000000}; 469 | 470 | assign rom[ 14]={8'b11000000, 471 | 8'b11100000, 472 | 8'b01110000, 473 | 8'b00111000}; 474 | assign rom[ 15]={8'b00011100, 475 | 8'b00001110, 476 | 8'b00000111, 477 | 8'b00000011}; 478 | 479 | assign rom[ 16]={8'b00000001, 480 | 8'b00000011, 481 | 8'b00000111, 482 | 8'b00001111}; 483 | assign rom[ 17]={8'b00011111, 484 | 8'b00111111, 485 | 8'b01111111, 486 | 8'b11111111}; 487 | 488 | assign rom[ 18]={8'b00000000, 489 | 8'b00000000, 490 | 8'b00000000, 491 | 8'b00000000}; 492 | assign rom[ 19]={8'b00001111, 493 | 8'b00001111, 494 | 8'b00001111, 495 | 8'b00001111}; 496 | 497 | assign rom[ 20]={8'b10000000, 498 | 8'b11000000, 499 | 8'b11100000, 500 | 8'b11110000}; 501 | assign rom[ 21]={8'b11111000, 502 | 8'b11111100, 503 | 8'b11111110, 504 | 8'b11111111}; 505 | 506 | assign rom[ 22]={8'b00001111, 507 | 8'b00001111, 508 | 8'b00001111, 509 | 8'b00001111}; 510 | assign rom[ 23]={8'b00000000, 511 | 8'b00000000, 512 | 8'b00000000, 513 | 8'b00000000}; 514 | 515 | assign rom[ 24]={8'b11110000, 516 | 8'b11110000, 517 | 8'b11110000, 518 | 8'b11110000}; 519 | assign rom[ 25]={8'b00000000, 520 | 8'b00000000, 521 | 8'b00000000, 522 | 8'b00000000}; 523 | 524 | assign rom[ 26]={8'b11111111, 525 | 8'b11111111, 526 | 8'b00000000, 527 | 8'b00000000}; 528 | assign rom[ 27]={8'b00000000, 529 | 8'b00000000, 530 | 8'b00000000, 531 | 8'b00000000}; 532 | 533 | assign rom[ 28]={8'b00000000, 534 | 8'b00000000, 535 | 8'b00000000, 536 | 8'b00000000}; 537 | assign rom[ 29]={8'b00000000, 538 | 8'b00000000, 539 | 8'b11111111, 540 | 8'b11111111}; 541 | 542 | assign rom[ 30]={8'b00000000, 543 | 8'b00000000, 544 | 8'b00000000, 545 | 8'b00000000}; 546 | assign rom[ 31]={8'b11110000, 547 | 8'b11110000, 548 | 8'b11110000, 549 | 8'b11110000}; 550 | 551 | assign rom[ 32]={8'b00000000, 552 | 8'b00011100, 553 | 8'b00011100, 554 | 8'b01110111}; 555 | assign rom[ 33]={8'b01110111, 556 | 8'b00001000, 557 | 8'b00011100, 558 | 8'b00000000}; 559 | 560 | assign rom[ 34]={8'b00000000, 561 | 8'b00000000, 562 | 8'b00000000, 563 | 8'b00011111}; 564 | assign rom[ 35]={8'b00011111, 565 | 8'b00011000, 566 | 8'b00011000, 567 | 8'b00011000}; 568 | 569 | assign rom[ 36]={8'b00000000, 570 | 8'b00000000, 571 | 8'b00000000, 572 | 8'b11111111}; 573 | assign rom[ 37]={8'b11111111, 574 | 8'b00000000, 575 | 8'b00000000, 576 | 8'b00000000}; 577 | 578 | assign rom[ 38]={8'b00011000, 579 | 8'b00011000, 580 | 8'b00011000, 581 | 8'b11111111}; 582 | assign rom[ 39]={8'b11111111, 583 | 8'b00011000, 584 | 8'b00011000, 585 | 8'b00011000}; 586 | 587 | assign rom[ 40]={8'b00000000, 588 | 8'b00000000, 589 | 8'b00111100, 590 | 8'b01111110}; 591 | assign rom[ 41]={8'b01111110, 592 | 8'b01111110, 593 | 8'b00111100, 594 | 8'b00000000}; 595 | 596 | assign rom[ 42]={8'b00000000, 597 | 8'b00000000, 598 | 8'b00000000, 599 | 8'b00000000}; 600 | assign rom[ 43]={8'b11111111, 601 | 8'b11111111, 602 | 8'b11111111, 603 | 8'b11111111}; 604 | 605 | assign rom[ 44]={8'b11000000, 606 | 8'b11000000, 607 | 8'b11000000, 608 | 8'b11000000}; 609 | assign rom[ 45]={8'b11000000, 610 | 8'b11000000, 611 | 8'b11000000, 612 | 8'b11000000}; 613 | 614 | assign rom[ 46]={8'b00000000, 615 | 8'b00000000, 616 | 8'b00000000, 617 | 8'b11111111}; 618 | assign rom[ 47]={8'b11111111, 619 | 8'b00011000, 620 | 8'b00011000, 621 | 8'b00011000}; 622 | 623 | assign rom[ 48]={8'b00011000, 624 | 8'b00011000, 625 | 8'b00011000, 626 | 8'b11111111}; 627 | assign rom[ 49]={8'b11111111, 628 | 8'b00000000, 629 | 8'b00000000, 630 | 8'b00000000}; 631 | 632 | assign rom[ 50]={8'b11110000, 633 | 8'b11110000, 634 | 8'b11110000, 635 | 8'b11110000}; 636 | assign rom[ 51]={8'b11110000, 637 | 8'b11110000, 638 | 8'b11110000, 639 | 8'b11110000}; 640 | 641 | assign rom[ 52]={8'b00011000, 642 | 8'b00011000, 643 | 8'b00011000, 644 | 8'b00011111}; 645 | assign rom[ 53]={8'b00011111, 646 | 8'b00000000, 647 | 8'b00000000, 648 | 8'b00000000}; 649 | 650 | assign rom[ 54]={8'b01111000, 651 | 8'b01100000, 652 | 8'b01111000, 653 | 8'b01100000}; 654 | assign rom[ 55]={8'b01111110, 655 | 8'b00011000, 656 | 8'b00011110, 657 | 8'b00000000}; 658 | 659 | assign rom[ 56]={8'b00000000, 660 | 8'b00011000, 661 | 8'b00111100, 662 | 8'b01111110}; 663 | assign rom[ 57]={8'b00011000, 664 | 8'b00011000, 665 | 8'b00011000, 666 | 8'b00000000}; 667 | 668 | assign rom[ 58]={8'b00000000, 669 | 8'b00011000, 670 | 8'b00011000, 671 | 8'b00011000}; 672 | assign rom[ 59]={8'b01111110, 673 | 8'b00111100, 674 | 8'b00011000, 675 | 8'b00000000}; 676 | 677 | assign rom[ 60]={8'b00000000, 678 | 8'b00011000, 679 | 8'b00110000, 680 | 8'b01111110}; 681 | assign rom[ 61]={8'b00110000, 682 | 8'b00011000, 683 | 8'b00000000, 684 | 8'b00000000}; 685 | 686 | assign rom[ 62]={8'b00000000, 687 | 8'b00011000, 688 | 8'b00001100, 689 | 8'b01111110}; 690 | assign rom[ 63]={8'b00001100, 691 | 8'b00011000, 692 | 8'b00000000, 693 | 8'b00000000}; 694 | 695 | assign rom[ 64]={8'b00000000, 696 | 8'b00000000, 697 | 8'b00000000, 698 | 8'b00000000}; 699 | assign rom[ 65]={8'b00000000, 700 | 8'b00000000, 701 | 8'b00000000, 702 | 8'b00000000}; 703 | 704 | assign rom[ 66]={8'b00000000, 705 | 8'b00011000, 706 | 8'b00011000, 707 | 8'b00011000}; 708 | assign rom[ 67]={8'b00011000, 709 | 8'b00000000, 710 | 8'b00011000, 711 | 8'b00000000}; 712 | 713 | assign rom[ 68]={8'b00000000, 714 | 8'b01100110, 715 | 8'b01100110, 716 | 8'b01100110}; 717 | assign rom[ 69]={8'b00000000, 718 | 8'b00000000, 719 | 8'b00000000, 720 | 8'b00000000}; 721 | 722 | assign rom[ 70]={8'b00000000, 723 | 8'b01100110, 724 | 8'b11111111, 725 | 8'b01100110}; 726 | assign rom[ 71]={8'b01100110, 727 | 8'b11111111, 728 | 8'b01100110, 729 | 8'b00000000}; 730 | 731 | assign rom[ 72]={8'b00011000, 732 | 8'b00111110, 733 | 8'b01100000, 734 | 8'b00111100}; 735 | assign rom[ 73]={8'b00000110, 736 | 8'b01111100, 737 | 8'b00011000, 738 | 8'b00000000}; 739 | 740 | assign rom[ 74]={8'b00000000, 741 | 8'b01100110, 742 | 8'b01101100, 743 | 8'b00011000}; 744 | assign rom[ 75]={8'b00110000, 745 | 8'b01100110, 746 | 8'b01000110, 747 | 8'b00000000}; 748 | 749 | assign rom[ 76]={8'b00011100, 750 | 8'b00110110, 751 | 8'b00011100, 752 | 8'b00111000}; 753 | assign rom[ 77]={8'b01101111, 754 | 8'b01100110, 755 | 8'b00111011, 756 | 8'b00000000}; 757 | 758 | assign rom[ 78]={8'b00000000, 759 | 8'b00011000, 760 | 8'b00011000, 761 | 8'b00011000}; 762 | assign rom[ 79]={8'b00000000, 763 | 8'b00000000, 764 | 8'b00000000, 765 | 8'b00000000}; 766 | 767 | assign rom[ 80]={8'b00000000, 768 | 8'b00001110, 769 | 8'b00011100, 770 | 8'b00011000}; 771 | assign rom[ 81]={8'b00011000, 772 | 8'b00011100, 773 | 8'b00001110, 774 | 8'b00000000}; 775 | 776 | assign rom[ 82]={8'b00000000, 777 | 8'b01110000, 778 | 8'b00111000, 779 | 8'b00011000}; 780 | assign rom[ 83]={8'b00011000, 781 | 8'b00111000, 782 | 8'b01110000, 783 | 8'b00000000}; 784 | 785 | assign rom[ 84]={8'b00000000, 786 | 8'b01100110, 787 | 8'b00111100, 788 | 8'b11111111}; 789 | assign rom[ 85]={8'b00111100, 790 | 8'b01100110, 791 | 8'b00000000, 792 | 8'b00000000}; 793 | 794 | assign rom[ 86]={8'b00000000, 795 | 8'b00011000, 796 | 8'b00011000, 797 | 8'b01111110}; 798 | assign rom[ 87]={8'b00011000, 799 | 8'b00011000, 800 | 8'b00000000, 801 | 8'b00000000}; 802 | 803 | assign rom[ 88]={8'b00000000, 804 | 8'b00000000, 805 | 8'b00000000, 806 | 8'b00000000}; 807 | assign rom[ 89]={8'b00000000, 808 | 8'b00011000, 809 | 8'b00011000, 810 | 8'b00110000}; 811 | 812 | assign rom[ 90]={8'b00000000, 813 | 8'b00000000, 814 | 8'b00000000, 815 | 8'b01111110}; 816 | assign rom[ 91]={8'b00000000, 817 | 8'b00000000, 818 | 8'b00000000, 819 | 8'b00000000}; 820 | 821 | assign rom[ 92]={8'b00000000, 822 | 8'b00000000, 823 | 8'b00000000, 824 | 8'b00000000}; 825 | assign rom[ 93]={8'b00000000, 826 | 8'b00011000, 827 | 8'b00011000, 828 | 8'b00000000}; 829 | 830 | assign rom[ 94]={8'b00000000, 831 | 8'b00000110, 832 | 8'b00001100, 833 | 8'b00011000}; 834 | assign rom[ 95]={8'b00110000, 835 | 8'b01100000, 836 | 8'b01000000, 837 | 8'b00000000}; 838 | 839 | assign rom[ 96]={8'b00000000, 840 | 8'b00111100, 841 | 8'b01100110, 842 | 8'b01101110}; 843 | assign rom[ 97]={8'b01110110, 844 | 8'b01100110, 845 | 8'b00111100, 846 | 8'b00000000}; 847 | 848 | assign rom[ 98]={8'b00000000, 849 | 8'b00011000, 850 | 8'b00111000, 851 | 8'b00011000}; 852 | assign rom[ 99]={8'b00011000, 853 | 8'b00011000, 854 | 8'b01111110, 855 | 8'b00000000}; 856 | 857 | assign rom[100]={8'b00000000, 858 | 8'b00111100, 859 | 8'b01100110, 860 | 8'b00001100}; 861 | assign rom[101]={8'b00011000, 862 | 8'b00110000, 863 | 8'b01111110, 864 | 8'b00000000}; 865 | 866 | assign rom[102]={8'b00000000, 867 | 8'b01111110, 868 | 8'b00001100, 869 | 8'b00011000}; 870 | assign rom[103]={8'b00001100, 871 | 8'b01100110, 872 | 8'b00111100, 873 | 8'b00000000}; 874 | 875 | assign rom[104]={8'b00000000, 876 | 8'b00001100, 877 | 8'b00011100, 878 | 8'b00111100}; 879 | assign rom[105]={8'b01101100, 880 | 8'b01111110, 881 | 8'b00001100, 882 | 8'b00000000}; 883 | 884 | assign rom[106]={8'b00000000, 885 | 8'b01111110, 886 | 8'b01100000, 887 | 8'b01111100}; 888 | assign rom[107]={8'b00000110, 889 | 8'b01100110, 890 | 8'b00111100, 891 | 8'b00000000}; 892 | 893 | assign rom[108]={8'b00000000, 894 | 8'b00111100, 895 | 8'b01100000, 896 | 8'b01111100}; 897 | assign rom[109]={8'b01100110, 898 | 8'b01100110, 899 | 8'b00111100, 900 | 8'b00000000}; 901 | 902 | assign rom[110]={8'b00000000, 903 | 8'b01111110, 904 | 8'b00000110, 905 | 8'b00001100}; 906 | assign rom[111]={8'b00011000, 907 | 8'b00110000, 908 | 8'b00110000, 909 | 8'b00000000}; 910 | 911 | assign rom[112]={8'b00000000, 912 | 8'b00111100, 913 | 8'b01100110, 914 | 8'b00111100}; 915 | assign rom[113]={8'b01100110, 916 | 8'b01100110, 917 | 8'b00111100, 918 | 8'b00000000}; 919 | 920 | assign rom[114]={8'b00000000, 921 | 8'b00111100, 922 | 8'b01100110, 923 | 8'b00111110}; 924 | assign rom[115]={8'b00000110, 925 | 8'b00001100, 926 | 8'b00111000, 927 | 8'b00000000}; 928 | 929 | assign rom[116]={8'b00000000, 930 | 8'b00000000, 931 | 8'b00011000, 932 | 8'b00011000}; 933 | assign rom[117]={8'b00000000, 934 | 8'b00011000, 935 | 8'b00011000, 936 | 8'b00000000}; 937 | 938 | assign rom[118]={8'b00000000, 939 | 8'b00000000, 940 | 8'b00011000, 941 | 8'b00011000}; 942 | assign rom[119]={8'b00000000, 943 | 8'b00011000, 944 | 8'b00011000, 945 | 8'b00110000}; 946 | 947 | assign rom[120]={8'b00000110, 948 | 8'b00001100, 949 | 8'b00011000, 950 | 8'b00110000}; 951 | assign rom[121]={8'b00011000, 952 | 8'b00001100, 953 | 8'b00000110, 954 | 8'b00000000}; 955 | 956 | assign rom[122]={8'b00000000, 957 | 8'b00000000, 958 | 8'b01111110, 959 | 8'b00000000}; 960 | assign rom[123]={8'b00000000, 961 | 8'b01111110, 962 | 8'b00000000, 963 | 8'b00000000}; 964 | 965 | assign rom[124]={8'b01100000, 966 | 8'b00110000, 967 | 8'b00011000, 968 | 8'b00001100}; 969 | assign rom[125]={8'b00011000, 970 | 8'b00110000, 971 | 8'b01100000, 972 | 8'b00000000}; 973 | 974 | assign rom[126]={8'b00000000, 975 | 8'b00111100, 976 | 8'b01100110, 977 | 8'b00001100}; 978 | assign rom[127]={8'b00011000, 979 | 8'b00000000, 980 | 8'b00011000, 981 | 8'b00000000}; 982 | 983 | assign rom[128]={8'b00000000, 984 | 8'b00111100, 985 | 8'b01100110, 986 | 8'b01101110}; 987 | assign rom[129]={8'b01101110, 988 | 8'b01100000, 989 | 8'b00111110, 990 | 8'b00000000}; 991 | 992 | assign rom[130]={8'b00000000, 993 | 8'b00011000, 994 | 8'b00111100, 995 | 8'b01100110}; 996 | assign rom[131]={8'b01100110, 997 | 8'b01111110, 998 | 8'b01100110, 999 | 8'b00000000}; 1000 | 1001 | assign rom[132]={8'b00000000, 1002 | 8'b01111100, 1003 | 8'b01100110, 1004 | 8'b01111100}; 1005 | assign rom[133]={8'b01100110, 1006 | 8'b01100110, 1007 | 8'b01111100, 1008 | 8'b00000000}; 1009 | 1010 | assign rom[134]={8'b00000000, 1011 | 8'b00111100, 1012 | 8'b01100110, 1013 | 8'b01100000}; 1014 | assign rom[135]={8'b01100000, 1015 | 8'b01100110, 1016 | 8'b00111100, 1017 | 8'b00000000}; 1018 | 1019 | assign rom[136]={8'b00000000, 1020 | 8'b01111000, 1021 | 8'b01101100, 1022 | 8'b01100110}; 1023 | assign rom[137]={8'b01100110, 1024 | 8'b01101100, 1025 | 8'b01111000, 1026 | 8'b00000000}; 1027 | 1028 | assign rom[138]={8'b00000000, 1029 | 8'b01111110, 1030 | 8'b01100000, 1031 | 8'b01111100}; 1032 | assign rom[139]={8'b01100000, 1033 | 8'b01100000, 1034 | 8'b01111110, 1035 | 8'b00000000}; 1036 | 1037 | assign rom[140]={8'b00000000, 1038 | 8'b01111110, 1039 | 8'b01100000, 1040 | 8'b01111100}; 1041 | assign rom[141]={8'b01100000, 1042 | 8'b01100000, 1043 | 8'b01100000, 1044 | 8'b00000000}; 1045 | 1046 | assign rom[142]={8'b00000000, 1047 | 8'b00111110, 1048 | 8'b01100000, 1049 | 8'b01100000}; 1050 | assign rom[143]={8'b01101110, 1051 | 8'b01100110, 1052 | 8'b00111110, 1053 | 8'b00000000}; 1054 | 1055 | assign rom[144]={8'b00000000, 1056 | 8'b01100110, 1057 | 8'b01100110, 1058 | 8'b01111110}; 1059 | assign rom[145]={8'b01100110, 1060 | 8'b01100110, 1061 | 8'b01100110, 1062 | 8'b00000000}; 1063 | 1064 | assign rom[146]={8'b00000000, 1065 | 8'b01111110, 1066 | 8'b00011000, 1067 | 8'b00011000}; 1068 | assign rom[147]={8'b00011000, 1069 | 8'b00011000, 1070 | 8'b01111110, 1071 | 8'b00000000}; 1072 | 1073 | assign rom[148]={8'b00000000, 1074 | 8'b00000110, 1075 | 8'b00000110, 1076 | 8'b00000110}; 1077 | assign rom[149]={8'b00000110, 1078 | 8'b01100110, 1079 | 8'b00111100, 1080 | 8'b00000000}; 1081 | 1082 | assign rom[150]={8'b00000000, 1083 | 8'b01100110, 1084 | 8'b01101100, 1085 | 8'b01111000}; 1086 | assign rom[151]={8'b01111000, 1087 | 8'b01101100, 1088 | 8'b01100110, 1089 | 8'b00000000}; 1090 | 1091 | assign rom[152]={8'b00000000, 1092 | 8'b01100000, 1093 | 8'b01100000, 1094 | 8'b01100000}; 1095 | assign rom[153]={8'b01100000, 1096 | 8'b01100000, 1097 | 8'b01111110, 1098 | 8'b00000000}; 1099 | 1100 | assign rom[154]={8'b00000000, 1101 | 8'b01100011, 1102 | 8'b01110111, 1103 | 8'b01111111}; 1104 | assign rom[155]={8'b01101011, 1105 | 8'b01100011, 1106 | 8'b01100011, 1107 | 8'b00000000}; 1108 | 1109 | assign rom[156]={8'b00000000, 1110 | 8'b01100110, 1111 | 8'b01110110, 1112 | 8'b01111110}; 1113 | assign rom[157]={8'b01111110, 1114 | 8'b01101110, 1115 | 8'b01100110, 1116 | 8'b00000000}; 1117 | 1118 | assign rom[158]={8'b00000000, 1119 | 8'b00111100, 1120 | 8'b01100110, 1121 | 8'b01100110}; 1122 | assign rom[159]={8'b01100110, 1123 | 8'b01100110, 1124 | 8'b00111100, 1125 | 8'b00000000}; 1126 | 1127 | assign rom[160]={8'b00000000, 1128 | 8'b01111100, 1129 | 8'b01100110, 1130 | 8'b01100110}; 1131 | assign rom[161]={8'b01111100, 1132 | 8'b01100000, 1133 | 8'b01100000, 1134 | 8'b00000000}; 1135 | 1136 | assign rom[162]={8'b00000000, 1137 | 8'b00111100, 1138 | 8'b01100110, 1139 | 8'b01100110}; 1140 | assign rom[163]={8'b01100110, 1141 | 8'b01101100, 1142 | 8'b00110110, 1143 | 8'b00000000}; 1144 | 1145 | assign rom[164]={8'b00000000, 1146 | 8'b01111100, 1147 | 8'b01100110, 1148 | 8'b01100110}; 1149 | assign rom[165]={8'b01111100, 1150 | 8'b01101100, 1151 | 8'b01100110, 1152 | 8'b00000000}; 1153 | 1154 | assign rom[166]={8'b00000000, 1155 | 8'b00111100, 1156 | 8'b01100000, 1157 | 8'b00111100}; 1158 | assign rom[167]={8'b00000110, 1159 | 8'b00000110, 1160 | 8'b00111100, 1161 | 8'b00000000}; 1162 | 1163 | assign rom[168]={8'b00000000, 1164 | 8'b01111110, 1165 | 8'b00011000, 1166 | 8'b00011000}; 1167 | assign rom[169]={8'b00011000, 1168 | 8'b00011000, 1169 | 8'b00011000, 1170 | 8'b00000000}; 1171 | 1172 | assign rom[170]={8'b00000000, 1173 | 8'b01100110, 1174 | 8'b01100110, 1175 | 8'b01100110}; 1176 | assign rom[171]={8'b01100110, 1177 | 8'b01100110, 1178 | 8'b01111110, 1179 | 8'b00000000}; 1180 | 1181 | assign rom[172]={8'b00000000, 1182 | 8'b01100110, 1183 | 8'b01100110, 1184 | 8'b01100110}; 1185 | assign rom[173]={8'b01100110, 1186 | 8'b00111100, 1187 | 8'b00011000, 1188 | 8'b00000000}; 1189 | 1190 | assign rom[174]={8'b00000000, 1191 | 8'b01100011, 1192 | 8'b01100011, 1193 | 8'b01101011}; 1194 | assign rom[175]={8'b01111111, 1195 | 8'b01110111, 1196 | 8'b01100011, 1197 | 8'b00000000}; 1198 | 1199 | assign rom[176]={8'b00000000, 1200 | 8'b01100110, 1201 | 8'b01100110, 1202 | 8'b00111100}; 1203 | assign rom[177]={8'b00111100, 1204 | 8'b01100110, 1205 | 8'b01100110, 1206 | 8'b00000000}; 1207 | 1208 | assign rom[178]={8'b00000000, 1209 | 8'b01100110, 1210 | 8'b01100110, 1211 | 8'b00111100}; 1212 | assign rom[179]={8'b00011000, 1213 | 8'b00011000, 1214 | 8'b00011000, 1215 | 8'b00000000}; 1216 | 1217 | assign rom[180]={8'b00000000, 1218 | 8'b01111110, 1219 | 8'b00001100, 1220 | 8'b00011000}; 1221 | assign rom[181]={8'b00110000, 1222 | 8'b01100000, 1223 | 8'b01111110, 1224 | 8'b00000000}; 1225 | 1226 | assign rom[182]={8'b00000000, 1227 | 8'b00011110, 1228 | 8'b00011000, 1229 | 8'b00011000}; 1230 | assign rom[183]={8'b00011000, 1231 | 8'b00011000, 1232 | 8'b00011110, 1233 | 8'b00000000}; 1234 | 1235 | assign rom[184]={8'b00000000, 1236 | 8'b01000000, 1237 | 8'b01100000, 1238 | 8'b00110000}; 1239 | assign rom[185]={8'b00011000, 1240 | 8'b00001100, 1241 | 8'b00000110, 1242 | 8'b00000000}; 1243 | 1244 | assign rom[186]={8'b00000000, 1245 | 8'b01111000, 1246 | 8'b00011000, 1247 | 8'b00011000}; 1248 | assign rom[187]={8'b00011000, 1249 | 8'b00011000, 1250 | 8'b01111000, 1251 | 8'b00000000}; 1252 | 1253 | assign rom[188]={8'b00000000, 1254 | 8'b00001000, 1255 | 8'b00011100, 1256 | 8'b00110110}; 1257 | assign rom[189]={8'b01100011, 1258 | 8'b00000000, 1259 | 8'b00000000, 1260 | 8'b00000000}; 1261 | 1262 | assign rom[190]={8'b00000000, 1263 | 8'b00000000, 1264 | 8'b00000000, 1265 | 8'b00000000}; 1266 | assign rom[191]={8'b00000000, 1267 | 8'b00000000, 1268 | 8'b11111111, 1269 | 8'b00000000}; 1270 | 1271 | assign rom[192]={8'b00000000, 1272 | 8'b00011000, 1273 | 8'b00111100, 1274 | 8'b01111110}; 1275 | assign rom[193]={8'b01111110, 1276 | 8'b00111100, 1277 | 8'b00011000, 1278 | 8'b00000000}; 1279 | 1280 | assign rom[194]={8'b00000000, 1281 | 8'b00000000, 1282 | 8'b00111100, 1283 | 8'b00000110}; 1284 | assign rom[195]={8'b00111110, 1285 | 8'b01100110, 1286 | 8'b00111110, 1287 | 8'b00000000}; 1288 | 1289 | assign rom[196]={8'b00000000, 1290 | 8'b01100000, 1291 | 8'b01100000, 1292 | 8'b01111100}; 1293 | assign rom[197]={8'b01100110, 1294 | 8'b01100110, 1295 | 8'b01111100, 1296 | 8'b00000000}; 1297 | 1298 | assign rom[198]={8'b00000000, 1299 | 8'b00000000, 1300 | 8'b00111100, 1301 | 8'b01100000}; 1302 | assign rom[199]={8'b01100000, 1303 | 8'b01100000, 1304 | 8'b00111100, 1305 | 8'b00000000}; 1306 | 1307 | assign rom[200]={8'b00000000, 1308 | 8'b00000110, 1309 | 8'b00000110, 1310 | 8'b00111110}; 1311 | assign rom[201]={8'b01100110, 1312 | 8'b01100110, 1313 | 8'b00111110, 1314 | 8'b00000000}; 1315 | 1316 | assign rom[202]={8'b00000000, 1317 | 8'b00000000, 1318 | 8'b00111100, 1319 | 8'b01100110}; 1320 | assign rom[203]={8'b01111110, 1321 | 8'b01100000, 1322 | 8'b00111100, 1323 | 8'b00000000}; 1324 | 1325 | assign rom[204]={8'b00000000, 1326 | 8'b00001110, 1327 | 8'b00011000, 1328 | 8'b00111110}; 1329 | assign rom[205]={8'b00011000, 1330 | 8'b00011000, 1331 | 8'b00011000, 1332 | 8'b00000000}; 1333 | 1334 | assign rom[206]={8'b00000000, 1335 | 8'b00000000, 1336 | 8'b00111110, 1337 | 8'b01100110}; 1338 | assign rom[207]={8'b01100110, 1339 | 8'b00111110, 1340 | 8'b00000110, 1341 | 8'b01111100}; 1342 | 1343 | assign rom[208]={8'b00000000, 1344 | 8'b01100000, 1345 | 8'b01100000, 1346 | 8'b01111100}; 1347 | assign rom[209]={8'b01100110, 1348 | 8'b01100110, 1349 | 8'b01100110, 1350 | 8'b00000000}; 1351 | 1352 | assign rom[210]={8'b00000000, 1353 | 8'b00011000, 1354 | 8'b00000000, 1355 | 8'b00111000}; 1356 | assign rom[211]={8'b00011000, 1357 | 8'b00011000, 1358 | 8'b00111100, 1359 | 8'b00000000}; 1360 | 1361 | assign rom[212]={8'b00000000, 1362 | 8'b00000110, 1363 | 8'b00000000, 1364 | 8'b00000110}; 1365 | assign rom[213]={8'b00000110, 1366 | 8'b00000110, 1367 | 8'b00000110, 1368 | 8'b00111100}; 1369 | 1370 | assign rom[214]={8'b00000000, 1371 | 8'b01100000, 1372 | 8'b01100000, 1373 | 8'b01101100}; 1374 | assign rom[215]={8'b01111000, 1375 | 8'b01101100, 1376 | 8'b01100110, 1377 | 8'b00000000}; 1378 | 1379 | assign rom[216]={8'b00000000, 1380 | 8'b00111000, 1381 | 8'b00011000, 1382 | 8'b00011000}; 1383 | assign rom[217]={8'b00011000, 1384 | 8'b00011000, 1385 | 8'b00111100, 1386 | 8'b00000000}; 1387 | 1388 | assign rom[218]={8'b00000000, 1389 | 8'b00000000, 1390 | 8'b01100110, 1391 | 8'b01111111}; 1392 | assign rom[219]={8'b01111111, 1393 | 8'b01101011, 1394 | 8'b01100011, 1395 | 8'b00000000}; 1396 | 1397 | assign rom[220]={8'b00000000, 1398 | 8'b00000000, 1399 | 8'b01111100, 1400 | 8'b01100110}; 1401 | assign rom[221]={8'b01100110, 1402 | 8'b01100110, 1403 | 8'b01100110, 1404 | 8'b00000000}; 1405 | 1406 | assign rom[222]={8'b00000000, 1407 | 8'b00000000, 1408 | 8'b00111100, 1409 | 8'b01100110}; 1410 | assign rom[223]={8'b01100110, 1411 | 8'b01100110, 1412 | 8'b00111100, 1413 | 8'b00000000}; 1414 | 1415 | assign rom[224]={8'b00000000, 1416 | 8'b00000000, 1417 | 8'b01111100, 1418 | 8'b01100110}; 1419 | assign rom[225]={8'b01100110, 1420 | 8'b01111100, 1421 | 8'b01100000, 1422 | 8'b01100000}; 1423 | 1424 | assign rom[226]={8'b00000000, 1425 | 8'b00000000, 1426 | 8'b00111110, 1427 | 8'b01100110}; 1428 | assign rom[227]={8'b01100110, 1429 | 8'b00111110, 1430 | 8'b00000110, 1431 | 8'b00000110}; 1432 | 1433 | assign rom[228]={8'b00000000, 1434 | 8'b00000000, 1435 | 8'b01111100, 1436 | 8'b01100110}; 1437 | assign rom[229]={8'b01100000, 1438 | 8'b01100000, 1439 | 8'b01100000, 1440 | 8'b00000000}; 1441 | 1442 | assign rom[230]={8'b00000000, 1443 | 8'b00000000, 1444 | 8'b00111110, 1445 | 8'b01100000}; 1446 | assign rom[231]={8'b00111100, 1447 | 8'b00000110, 1448 | 8'b01111100, 1449 | 8'b00000000}; 1450 | 1451 | assign rom[232]={8'b00000000, 1452 | 8'b00011000, 1453 | 8'b01111110, 1454 | 8'b00011000}; 1455 | assign rom[233]={8'b00011000, 1456 | 8'b00011000, 1457 | 8'b00001110, 1458 | 8'b00000000}; 1459 | 1460 | assign rom[234]={8'b00000000, 1461 | 8'b00000000, 1462 | 8'b01100110, 1463 | 8'b01100110}; 1464 | assign rom[235]={8'b01100110, 1465 | 8'b01100110, 1466 | 8'b00111110, 1467 | 8'b00000000}; 1468 | 1469 | assign rom[236]={8'b00000000, 1470 | 8'b00000000, 1471 | 8'b01100110, 1472 | 8'b01100110}; 1473 | assign rom[237]={8'b01100110, 1474 | 8'b00111100, 1475 | 8'b00011000, 1476 | 8'b00000000}; 1477 | 1478 | assign rom[238]={8'b00000000, 1479 | 8'b00000000, 1480 | 8'b01100011, 1481 | 8'b01101011}; 1482 | assign rom[239]={8'b01111111, 1483 | 8'b00111110, 1484 | 8'b00110110, 1485 | 8'b00000000}; 1486 | 1487 | assign rom[240]={8'b00000000, 1488 | 8'b00000000, 1489 | 8'b01100110, 1490 | 8'b00111100}; 1491 | assign rom[241]={8'b00011000, 1492 | 8'b00111100, 1493 | 8'b01100110, 1494 | 8'b00000000}; 1495 | 1496 | assign rom[242]={8'b00000000, 1497 | 8'b00000000, 1498 | 8'b01100110, 1499 | 8'b01100110}; 1500 | assign rom[243]={8'b01100110, 1501 | 8'b00111110, 1502 | 8'b00001100, 1503 | 8'b01111000}; 1504 | 1505 | assign rom[244]={8'b00000000, 1506 | 8'b00000000, 1507 | 8'b01111110, 1508 | 8'b00001100}; 1509 | assign rom[245]={8'b00011000, 1510 | 8'b00110000, 1511 | 8'b01111110, 1512 | 8'b00000000}; 1513 | 1514 | assign rom[246]={8'b00000000, 1515 | 8'b00011000, 1516 | 8'b00111100, 1517 | 8'b01111110}; 1518 | assign rom[247]={8'b01111110, 1519 | 8'b00011000, 1520 | 8'b00111100, 1521 | 8'b00000000}; 1522 | 1523 | assign rom[248]={8'b00011000, 1524 | 8'b00011000, 1525 | 8'b00011000, 1526 | 8'b00011000}; 1527 | assign rom[249]={8'b00011000, 1528 | 8'b00011000, 1529 | 8'b00011000, 1530 | 8'b00011000}; 1531 | 1532 | assign rom[250]={8'b00000000, 1533 | 8'b01111110, 1534 | 8'b01111000, 1535 | 8'b01111100}; 1536 | assign rom[251]={8'b01101110, 1537 | 8'b01100110, 1538 | 8'b00000110, 1539 | 8'b00000000}; 1540 | 1541 | assign rom[252]={8'b00001000, 1542 | 8'b00011000, 1543 | 8'b00111000, 1544 | 8'b01111000}; 1545 | assign rom[253]={8'b00111000, 1546 | 8'b00011000, 1547 | 8'b00001000, 1548 | 8'b00000000}; 1549 | 1550 | assign rom[254]={8'b00010000, 1551 | 8'b00011000, 1552 | 8'b00011100, 1553 | 8'b00011110}; 1554 | assign rom[255]={8'b00011100, 1555 | 8'b00011000, 1556 | 8'b00010000, 1557 | 8'b00000000}; 1558 | endmodule 1559 | -------------------------------------------------------------------------------- /P720.v: -------------------------------------------------------------------------------- 1 | 2 | `timescale 1ns / 1ps 3 | 4 | //////////////////////////////////////////////////////////////////////////////// 5 | // Company: Dendrite Digital 6 | // Engineer: Gregory Scott Callen 7 | // 8 | // Create Date: 19:26:19 10/06/2020 9 | // Design Name: P720 10 | // Module Name: E:/private/P720/TestP720.v 11 | // Project Name: P720 12 | // Target Device: Nexys 4 (Limited Edition) Artix 7 100T 13 | // Tool versions: Vivado 2019.2 14 | // 15 | // Dependencies: 100 MHz Clock Input and 12-bit VGA Output 16 | // 17 | // Revision: 0.01 - File Created 18 | // Revision: 0.02 - Moved from ISE to Vivado 19 | // 20 | //////////////////////////////////////////////////////////////////////////////// 21 | 22 | //`define DEBUG 23 | 24 | `ifdef DEBUG 25 | module TestP720; 26 | 27 | // Inputs 28 | reg clk; 29 | 30 | // Outputs 31 | wire MHz74; 32 | wire [11:0] hCount; 33 | wire [11:0] vCount; 34 | wire [11:0] x; 35 | wire [11:0] y; 36 | wire memw; 37 | wire [14:0] mema; 38 | wire [31:0] memi; 39 | wire [31:0] memo; 40 | wire [3:0] vgaRed; 41 | wire [3:0] vgaGreen; 42 | wire [3:0] vgaBlue; 43 | wire Hsync; 44 | wire Vsync; 45 | 46 | // Instantiate the Unit Under Test (UUT) 47 | P720 uut ( 48 | .clk(clk), 49 | .MHz74(MHz74), 50 | .hCount(hCount), 51 | .vCount(vCount), 52 | .x(x), 53 | .y(y), 54 | .memw(memw), 55 | .mema(mema), 56 | .memi(memi), 57 | .memo(memo), 58 | .vgaRed(vgaRed), 59 | .vgaGreen(vgaGreen), 60 | .vgaBlue(vgaBlue), 61 | .Hsync(Hsync), 62 | .Vsync(Vsync) 63 | ); 64 | 65 | initial begin 66 | // Initialize Inputs 67 | clk = 0; 68 | 69 | // Wait 100 ns for global reset to finish 70 | #100; 71 | 72 | // Add stimulus here 73 | 74 | end 75 | 76 | always clk=#10~clk; 77 | 78 | endmodule 79 | `endif 80 | 81 | `define hva 1280 82 | `define hfp 110 83 | `define hsw 40 84 | `define hbp 220 85 | `define htb 370 86 | `define htp 1650 87 | `define hsp 1'd1 88 | 89 | `define vva 720 90 | `define vfp 5 91 | `define vsw 5 92 | `define vbp 20 93 | `define vtb 30 94 | `define vtl 750 95 | `define vsp 1'd1 96 | 97 | module P720( 98 | input wire clk, 99 | `ifdef DEBUG 100 | output wire MHz74, 101 | output reg [11:0] hCount, 102 | output reg [11:0] vCount, 103 | output wire [11:0] x, 104 | output wire [11:0] y, 105 | output reg memw, 106 | output reg [14:0] mema, 107 | output reg [31:0] memi, 108 | output wire [31:0] memo, 109 | `endif 110 | output wire [ 3:0] vgaRed, 111 | output wire [ 3:0] vgaGreen, 112 | output wire [ 3:0] vgaBlue, 113 | output reg Hsync, 114 | output reg Vsync 115 | ); 116 | 117 | `ifndef DEBUG 118 | wire MHz74; 119 | reg [10:0] hCount; 120 | reg [ 9:0] vCount; 121 | wire [11:0] y; 122 | wire [11:0] x; 123 | reg memw; 124 | reg [14:0] mema; 125 | reg [31:0] memi; 126 | wire [31:0] memo; 127 | `endif 128 | 129 | reg [ 7:0] locb; 130 | reg [11:0] color; 131 | reg [11:0] off; 132 | reg [11:0] on; 133 | reg [23:0] temp; 134 | 135 | wire [ 3:0] hex; 136 | wire [ 3:0] i; 137 | 138 | assign x = hCount-11'd`htb+11'd4; 139 | assign y = vCount-10'd`vtb-10'd4; 140 | assign vgaRed = color[11:8]; 141 | assign vgaGreen = color[7:4]; 142 | assign vgaBlue = color[3:0]; 143 | 144 | timer clock(MHz74,clk); // 74.25 MHz 145 | 146 | wire [31:0] chro; 147 | reg [ 7:0] chra; 148 | ChrSet acs(~MHz74,chra,chro); 149 | 150 | wire [31:0] ramo; 151 | wire [31:0] rami; assign rami=memi; 152 | wire [13:0] rama; assign rama=mema[13:0]; 153 | wire ramw; assign ramw=(mema[14]==1'd0)?memw:1'd1; 154 | VRAM ram(~MHz74,ramw,rama,rami,ramo); 155 | 156 | assign memo=(mema[14]==1'd1)?chro:ramo; 157 | 158 | wire [ 2:0] col;assign col = x[2:0]; 159 | wire [ 2:0] row;assign row = y[2:0]; 160 | wire [ 7:0] pixels; 161 | reg [31:0] data; 162 | locByte loc(data,row[1:0],pixels); 163 | 164 | wire [ 7:0] myByte; 165 | mySixBits msb(y[6:3]^x[6:3]|6'd0,myByte); 166 | 167 | initial begin 168 | memw <=0; 169 | mema <=~15'd0; 170 | memi <=32'hFFF00800; 171 | data <=32'd0; 172 | temp <=32'd0; 173 | color <=12'd0; 174 | on <=12'hFFF; 175 | off <=12'h009; 176 | hCount<=10'd360; 177 | vCount<=9'd30; 178 | Hsync <=1'd0; 179 | Vsync <=1'd0; 180 | end 181 | 182 | always @ (posedge MHz74) begin 183 | if(memw==1)begin 184 | if((hCount>`hfp)&&(hCount<=`hfp+`hsw))begin 185 | Hsync<=`hsp; 186 | end else begin 187 | Hsync<=~`hsp; 188 | end 189 | if((vCount>`vfp)&&(vCount<=`vfp+`vsw))begin 190 | Vsync<=`vsp; 191 | end else begin 192 | Vsync<=~`vsp; 193 | end 194 | if(x==`hva-1)begin 195 | hCount<=11'd1; 196 | vCount<=vCount+10'd1; 197 | end else begin 198 | hCount<=hCount+11'd1; 199 | end 200 | if(y==`vva-1)begin 201 | vCount<=10'd1; 202 | end 203 | if((x>=`hva)||(y>=`vva))begin 204 | color<=12'd0; 205 | end else begin 206 | color<=pixels[~col]?on:off; 207 | `ifdef DEBUG 208 | $display("\npixel clock=%1d",col); 209 | $display("hCount=%4d x=%4d",hCount,x); 210 | $display("vCount=%4d y=%4d",vCount,y); 211 | $display("pixels=%8h",pixels); 212 | $display(" on=%3h", on); 213 | $display(" off=%3h", off); 214 | `endif 215 | end 216 | if(x[2:0]==5)begin 217 | mema<=(y[9:3]<<7)+(y[9:3]<<5)+x[11:3]+15'd1; 218 | end else if(x[2:0]==6)begin 219 | temp<=memo[31:8]; 220 | chra<=(memo[6:0]<<1)|y[2]; 221 | `ifdef DEBUG 222 | $display("\npixel clock = 6"); 223 | $display("mema = %4h",mema); 224 | $display("memo = %8h",memo); 225 | $strobe ("chra = %2h",chra>>1); 226 | `endif 227 | end else if(x[2:0]==7)begin 228 | data<=chro; 229 | on <=temp[23:12]; 230 | off <=temp[11: 0]; 231 | `ifdef DEBUG 232 | if(x[2:0]==0)begin 233 | $display("\npixel clock = 7"); 234 | $display("mema = %4h",mema); 235 | $display("chro = %8h",chro); 236 | $display(" on = %3h",temp[23:12]); 237 | $display(" off = %3h",temp[11: 0]); 238 | end 239 | `endif 240 | end 241 | `ifdef DEBUG 242 | if((x==32)&&(y==0))begin 243 | $finish; 244 | end 245 | `endif 246 | end else begin 247 | mema<=mema+15'd1; 248 | chra<=(mema[6:0]<<1)+8'd2; 249 | if(mema!=15'h7FFF)begin 250 | if(mema<15'h3F00)begin 251 | memi<=((memi+32'h00700300)|mema[7:0])+32'd1; 252 | end else begin 253 | memi<=chro; 254 | end 255 | end 256 | if(mema==15'h4000)begin 257 | memw<=1'd1; 258 | mema<=0; 259 | `ifdef DEBUG 260 | $strobe("\n"); 261 | $strobe("initialize memw=%1b mema=%5h memi=%8h memo=%8h",memw,mema,memi,memo); 262 | `endif 263 | end 264 | end 265 | end 266 | endmodule 267 | 268 | module mySixBits( 269 | input wire [5:0] chra, 270 | output wire [7:0] chro 271 | ); 272 | 273 | wire [7:0] myByte [63:0]; 274 | 275 | assign chro = myByte[chra]; 276 | 277 | assign myByte[ 0]=8'd48 ; // 0 278 | assign myByte[ 1]=8'd49 ; // 1 279 | assign myByte[ 2]=8'd50 ; // 2 280 | assign myByte[ 3]=8'd51 ; // 3 281 | assign myByte[ 4]=8'd52 ; // 4 282 | assign myByte[ 5]=8'd53 ; // 5 283 | assign myByte[ 6]=8'd54 ; // 6 284 | assign myByte[ 7]=8'd55 ; // 7 285 | assign myByte[ 8]=8'd56 ; // 8 286 | assign myByte[ 9]=8'd57 ; // 9 287 | assign myByte[10]=8'd65 ; // A 288 | assign myByte[11]=8'd66 ; // B 289 | assign myByte[12]=8'd67 ; // C 290 | assign myByte[13]=8'd68 ; // D 291 | assign myByte[14]=8'd69 ; // E 292 | assign myByte[15]=8'd70 ; // F 293 | assign myByte[16]=8'd71 ; // G 294 | assign myByte[17]=8'd72 ; // H 295 | assign myByte[18]=8'd73 ; // I 296 | assign myByte[19]=8'd74 ; // J 297 | assign myByte[20]=8'd75 ; // K 298 | assign myByte[21]=8'd76 ; // L 299 | assign myByte[22]=8'd77 ; // M 300 | assign myByte[23]=8'd78 ; // N 301 | assign myByte[24]=8'd79 ; // O 302 | assign myByte[25]=8'd80 ; // P 303 | assign myByte[26]=8'd81 ; // Q 304 | assign myByte[27]=8'd82 ; // R 305 | assign myByte[28]=8'd83 ; // S 306 | assign myByte[29]=8'd84 ; // T 307 | assign myByte[30]=8'd85 ; // U 308 | assign myByte[31]=8'd86 ; // V 309 | assign myByte[32]=8'd87 ; // W 310 | assign myByte[33]=8'd88 ; // X 311 | assign myByte[34]=8'd89 ; // Y 312 | assign myByte[35]=8'd90 ; // Z 313 | assign myByte[36]=8'd97 ; // a 314 | assign myByte[37]=8'd98 ; // b 315 | assign myByte[38]=8'd99 ; // c 316 | assign myByte[39]=8'd100; // d 317 | assign myByte[40]=8'd101; // e 318 | assign myByte[41]=8'd102; // f 319 | assign myByte[42]=8'd103; // g 320 | assign myByte[43]=8'd104; // h 321 | assign myByte[44]=8'd105; // i 322 | assign myByte[45]=8'd106; // j 323 | assign myByte[46]=8'd107; // k 324 | assign myByte[47]=8'd108; // l 325 | assign myByte[48]=8'd109; // m 326 | assign myByte[49]=8'd110; // n 327 | assign myByte[50]=8'd111; // o 328 | assign myByte[51]=8'd112; // p 329 | assign myByte[52]=8'd113; // q 330 | assign myByte[53]=8'd114; // r 331 | assign myByte[54]=8'd115; // s 332 | assign myByte[55]=8'd116; // t 333 | assign myByte[56]=8'd117; // u 334 | assign myByte[57]=8'd118; // v 335 | assign myByte[58]=8'd119; // w 336 | assign myByte[59]=8'd120; // x 337 | assign myByte[60]=8'd121; // y 338 | assign myByte[61]=8'd122; // z 339 | assign myByte[62]=8'd46 ; // . 340 | assign myByte[63]=8'd32 ; // space 341 | 342 | endmodule 343 | 344 | module locByte( 345 | input wire [31:0] l, 346 | input wire [ 1:0] s, 347 | output wire [ 7:0] b 348 | ); 349 | wire[7:0]lbytes[3:0]; 350 | 351 | assign lbytes[0]=l[31:24]; 352 | assign lbytes[1]=l[23:16]; 353 | assign lbytes[2]=l[15: 8]; 354 | assign lbytes[3]=l[ 7: 0]; 355 | 356 | assign b=lbytes[s]; 357 | 358 | endmodule 359 | 360 | module VRAM( 361 | input wire memc, 362 | input wire memw, 363 | input wire [13:0] mema, 364 | input wire [31:0] memi, 365 | output reg [31:0] memo 366 | ); 367 | 368 | reg [31:0] ram [16383:0]; 369 | 370 | initial begin 371 | memo<=32'd0; 372 | end 373 | 374 | always @ (posedge memc) begin 375 | if(memw==1'd0)begin 376 | ram[mema]<=memi; 377 | end else begin 378 | memo<=ram[mema]; 379 | end 380 | end 381 | 382 | endmodule 383 | 384 | module ChrSet( 385 | input wire chrc, 386 | input wire [ 7:0] chra, 387 | output reg [31:0] chro 388 | ); 389 | 390 | wire[31:0]rom[255:0]; 391 | 392 | initial begin 393 | chro<=32'd0; 394 | end 395 | 396 | always@(posedge chrc)begin 397 | chro<=rom[chra]; 398 | end 399 | 400 | assign rom[ 0]={8'b00000000, 401 | 8'b00110110, 402 | 8'b01111111, 403 | 8'b01111111}; 404 | assign rom[ 1]={8'b00111110, 405 | 8'b00011100, 406 | 8'b00001000, 407 | 8'b00000000}; 408 | 409 | assign rom[ 2]={8'b00011000, 410 | 8'b00011000, 411 | 8'b00011000, 412 | 8'b00011111}; 413 | assign rom[ 3]={8'b00011111, 414 | 8'b00011000, 415 | 8'b00011000, 416 | 8'b00011000}; 417 | 418 | assign rom[ 4]={8'b00000011, 419 | 8'b00000011, 420 | 8'b00000011, 421 | 8'b00000011}; 422 | assign rom[ 5]={8'b00000011, 423 | 8'b00000011, 424 | 8'b00000011, 425 | 8'b00000011}; 426 | 427 | assign rom[ 6]={8'b00011000, 428 | 8'b00011000, 429 | 8'b00011000, 430 | 8'b11111000}; 431 | assign rom[ 7]={8'b11111000, 432 | 8'b00000000, 433 | 8'b00000000, 434 | 8'b00000000}; 435 | 436 | assign rom[ 8]={8'b00011000, 437 | 8'b00011000, 438 | 8'b00011000, 439 | 8'b11111000}; 440 | assign rom[ 9]={8'b11111000, 441 | 8'b00011000, 442 | 8'b00011000, 443 | 8'b00011000}; 444 | 445 | assign rom[ 10]={8'b00000000, 446 | 8'b00000000, 447 | 8'b00000000, 448 | 8'b11111000}; 449 | assign rom[ 11]={8'b11111000, 450 | 8'b00011000, 451 | 8'b00011000, 452 | 8'b00011000}; 453 | 454 | assign rom[ 12]={8'b00000011, 455 | 8'b00000111, 456 | 8'b00001110, 457 | 8'b00011100}; 458 | assign rom[ 13]={8'b00111000, 459 | 8'b01110000, 460 | 8'b11100000, 461 | 8'b11000000}; 462 | 463 | assign rom[ 14]={8'b11000000, 464 | 8'b11100000, 465 | 8'b01110000, 466 | 8'b00111000}; 467 | assign rom[ 15]={8'b00011100, 468 | 8'b00001110, 469 | 8'b00000111, 470 | 8'b00000011}; 471 | 472 | assign rom[ 16]={8'b00000001, 473 | 8'b00000011, 474 | 8'b00000111, 475 | 8'b00001111}; 476 | assign rom[ 17]={8'b00011111, 477 | 8'b00111111, 478 | 8'b01111111, 479 | 8'b11111111}; 480 | 481 | assign rom[ 18]={8'b00000000, 482 | 8'b00000000, 483 | 8'b00000000, 484 | 8'b00000000}; 485 | assign rom[ 19]={8'b00001111, 486 | 8'b00001111, 487 | 8'b00001111, 488 | 8'b00001111}; 489 | 490 | assign rom[ 20]={8'b10000000, 491 | 8'b11000000, 492 | 8'b11100000, 493 | 8'b11110000}; 494 | assign rom[ 21]={8'b11111000, 495 | 8'b11111100, 496 | 8'b11111110, 497 | 8'b11111111}; 498 | 499 | assign rom[ 22]={8'b00001111, 500 | 8'b00001111, 501 | 8'b00001111, 502 | 8'b00001111}; 503 | assign rom[ 23]={8'b00000000, 504 | 8'b00000000, 505 | 8'b00000000, 506 | 8'b00000000}; 507 | 508 | assign rom[ 24]={8'b11110000, 509 | 8'b11110000, 510 | 8'b11110000, 511 | 8'b11110000}; 512 | assign rom[ 25]={8'b00000000, 513 | 8'b00000000, 514 | 8'b00000000, 515 | 8'b00000000}; 516 | 517 | assign rom[ 26]={8'b11111111, 518 | 8'b11111111, 519 | 8'b00000000, 520 | 8'b00000000}; 521 | assign rom[ 27]={8'b00000000, 522 | 8'b00000000, 523 | 8'b00000000, 524 | 8'b00000000}; 525 | 526 | assign rom[ 28]={8'b00000000, 527 | 8'b00000000, 528 | 8'b00000000, 529 | 8'b00000000}; 530 | assign rom[ 29]={8'b00000000, 531 | 8'b00000000, 532 | 8'b11111111, 533 | 8'b11111111}; 534 | 535 | assign rom[ 30]={8'b00000000, 536 | 8'b00000000, 537 | 8'b00000000, 538 | 8'b00000000}; 539 | assign rom[ 31]={8'b11110000, 540 | 8'b11110000, 541 | 8'b11110000, 542 | 8'b11110000}; 543 | 544 | assign rom[ 32]={8'b00000000, 545 | 8'b00011100, 546 | 8'b00011100, 547 | 8'b01110111}; 548 | assign rom[ 33]={8'b01110111, 549 | 8'b00001000, 550 | 8'b00011100, 551 | 8'b00000000}; 552 | 553 | assign rom[ 34]={8'b00000000, 554 | 8'b00000000, 555 | 8'b00000000, 556 | 8'b00011111}; 557 | assign rom[ 35]={8'b00011111, 558 | 8'b00011000, 559 | 8'b00011000, 560 | 8'b00011000}; 561 | 562 | assign rom[ 36]={8'b00000000, 563 | 8'b00000000, 564 | 8'b00000000, 565 | 8'b11111111}; 566 | assign rom[ 37]={8'b11111111, 567 | 8'b00000000, 568 | 8'b00000000, 569 | 8'b00000000}; 570 | 571 | assign rom[ 38]={8'b00011000, 572 | 8'b00011000, 573 | 8'b00011000, 574 | 8'b11111111}; 575 | assign rom[ 39]={8'b11111111, 576 | 8'b00011000, 577 | 8'b00011000, 578 | 8'b00011000}; 579 | 580 | assign rom[ 40]={8'b00000000, 581 | 8'b00000000, 582 | 8'b00111100, 583 | 8'b01111110}; 584 | assign rom[ 41]={8'b01111110, 585 | 8'b01111110, 586 | 8'b00111100, 587 | 8'b00000000}; 588 | 589 | assign rom[ 42]={8'b00000000, 590 | 8'b00000000, 591 | 8'b00000000, 592 | 8'b00000000}; 593 | assign rom[ 43]={8'b11111111, 594 | 8'b11111111, 595 | 8'b11111111, 596 | 8'b11111111}; 597 | 598 | assign rom[ 44]={8'b11000000, 599 | 8'b11000000, 600 | 8'b11000000, 601 | 8'b11000000}; 602 | assign rom[ 45]={8'b11000000, 603 | 8'b11000000, 604 | 8'b11000000, 605 | 8'b11000000}; 606 | 607 | assign rom[ 46]={8'b00000000, 608 | 8'b00000000, 609 | 8'b00000000, 610 | 8'b11111111}; 611 | assign rom[ 47]={8'b11111111, 612 | 8'b00011000, 613 | 8'b00011000, 614 | 8'b00011000}; 615 | 616 | assign rom[ 48]={8'b00011000, 617 | 8'b00011000, 618 | 8'b00011000, 619 | 8'b11111111}; 620 | assign rom[ 49]={8'b11111111, 621 | 8'b00000000, 622 | 8'b00000000, 623 | 8'b00000000}; 624 | 625 | assign rom[ 50]={8'b11110000, 626 | 8'b11110000, 627 | 8'b11110000, 628 | 8'b11110000}; 629 | assign rom[ 51]={8'b11110000, 630 | 8'b11110000, 631 | 8'b11110000, 632 | 8'b11110000}; 633 | 634 | assign rom[ 52]={8'b00011000, 635 | 8'b00011000, 636 | 8'b00011000, 637 | 8'b00011111}; 638 | assign rom[ 53]={8'b00011111, 639 | 8'b00000000, 640 | 8'b00000000, 641 | 8'b00000000}; 642 | 643 | assign rom[ 54]={8'b01111000, 644 | 8'b01100000, 645 | 8'b01111000, 646 | 8'b01100000}; 647 | assign rom[ 55]={8'b01111110, 648 | 8'b00011000, 649 | 8'b00011110, 650 | 8'b00000000}; 651 | 652 | assign rom[ 56]={8'b00000000, 653 | 8'b00011000, 654 | 8'b00111100, 655 | 8'b01111110}; 656 | assign rom[ 57]={8'b00011000, 657 | 8'b00011000, 658 | 8'b00011000, 659 | 8'b00000000}; 660 | 661 | assign rom[ 58]={8'b00000000, 662 | 8'b00011000, 663 | 8'b00011000, 664 | 8'b00011000}; 665 | assign rom[ 59]={8'b01111110, 666 | 8'b00111100, 667 | 8'b00011000, 668 | 8'b00000000}; 669 | 670 | assign rom[ 60]={8'b00000000, 671 | 8'b00011000, 672 | 8'b00110000, 673 | 8'b01111110}; 674 | assign rom[ 61]={8'b00110000, 675 | 8'b00011000, 676 | 8'b00000000, 677 | 8'b00000000}; 678 | 679 | assign rom[ 62]={8'b00000000, 680 | 8'b00011000, 681 | 8'b00001100, 682 | 8'b01111110}; 683 | assign rom[ 63]={8'b00001100, 684 | 8'b00011000, 685 | 8'b00000000, 686 | 8'b00000000}; 687 | 688 | assign rom[ 64]={8'b00000000, 689 | 8'b00000000, 690 | 8'b00000000, 691 | 8'b00000000}; 692 | assign rom[ 65]={8'b00000000, 693 | 8'b00000000, 694 | 8'b00000000, 695 | 8'b00000000}; 696 | 697 | assign rom[ 66]={8'b00000000, 698 | 8'b00011000, 699 | 8'b00011000, 700 | 8'b00011000}; 701 | assign rom[ 67]={8'b00011000, 702 | 8'b00000000, 703 | 8'b00011000, 704 | 8'b00000000}; 705 | 706 | assign rom[ 68]={8'b00000000, 707 | 8'b01100110, 708 | 8'b01100110, 709 | 8'b01100110}; 710 | assign rom[ 69]={8'b00000000, 711 | 8'b00000000, 712 | 8'b00000000, 713 | 8'b00000000}; 714 | 715 | assign rom[ 70]={8'b00000000, 716 | 8'b01100110, 717 | 8'b11111111, 718 | 8'b01100110}; 719 | assign rom[ 71]={8'b01100110, 720 | 8'b11111111, 721 | 8'b01100110, 722 | 8'b00000000}; 723 | 724 | assign rom[ 72]={8'b00011000, 725 | 8'b00111110, 726 | 8'b01100000, 727 | 8'b00111100}; 728 | assign rom[ 73]={8'b00000110, 729 | 8'b01111100, 730 | 8'b00011000, 731 | 8'b00000000}; 732 | 733 | assign rom[ 74]={8'b00000000, 734 | 8'b01100110, 735 | 8'b01101100, 736 | 8'b00011000}; 737 | assign rom[ 75]={8'b00110000, 738 | 8'b01100110, 739 | 8'b01000110, 740 | 8'b00000000}; 741 | 742 | assign rom[ 76]={8'b00011100, 743 | 8'b00110110, 744 | 8'b00011100, 745 | 8'b00111000}; 746 | assign rom[ 77]={8'b01101111, 747 | 8'b01100110, 748 | 8'b00111011, 749 | 8'b00000000}; 750 | 751 | assign rom[ 78]={8'b00000000, 752 | 8'b00011000, 753 | 8'b00011000, 754 | 8'b00011000}; 755 | assign rom[ 79]={8'b00000000, 756 | 8'b00000000, 757 | 8'b00000000, 758 | 8'b00000000}; 759 | 760 | assign rom[ 80]={8'b00000000, 761 | 8'b00001110, 762 | 8'b00011100, 763 | 8'b00011000}; 764 | assign rom[ 81]={8'b00011000, 765 | 8'b00011100, 766 | 8'b00001110, 767 | 8'b00000000}; 768 | 769 | assign rom[ 82]={8'b00000000, 770 | 8'b01110000, 771 | 8'b00111000, 772 | 8'b00011000}; 773 | assign rom[ 83]={8'b00011000, 774 | 8'b00111000, 775 | 8'b01110000, 776 | 8'b00000000}; 777 | 778 | assign rom[ 84]={8'b00000000, 779 | 8'b01100110, 780 | 8'b00111100, 781 | 8'b11111111}; 782 | assign rom[ 85]={8'b00111100, 783 | 8'b01100110, 784 | 8'b00000000, 785 | 8'b00000000}; 786 | 787 | assign rom[ 86]={8'b00000000, 788 | 8'b00011000, 789 | 8'b00011000, 790 | 8'b01111110}; 791 | assign rom[ 87]={8'b00011000, 792 | 8'b00011000, 793 | 8'b00000000, 794 | 8'b00000000}; 795 | 796 | assign rom[ 88]={8'b00000000, 797 | 8'b00000000, 798 | 8'b00000000, 799 | 8'b00000000}; 800 | assign rom[ 89]={8'b00000000, 801 | 8'b00011000, 802 | 8'b00011000, 803 | 8'b00110000}; 804 | 805 | assign rom[ 90]={8'b00000000, 806 | 8'b00000000, 807 | 8'b00000000, 808 | 8'b01111110}; 809 | assign rom[ 91]={8'b00000000, 810 | 8'b00000000, 811 | 8'b00000000, 812 | 8'b00000000}; 813 | 814 | assign rom[ 92]={8'b00000000, 815 | 8'b00000000, 816 | 8'b00000000, 817 | 8'b00000000}; 818 | assign rom[ 93]={8'b00000000, 819 | 8'b00011000, 820 | 8'b00011000, 821 | 8'b00000000}; 822 | 823 | assign rom[ 94]={8'b00000000, 824 | 8'b00000110, 825 | 8'b00001100, 826 | 8'b00011000}; 827 | assign rom[ 95]={8'b00110000, 828 | 8'b01100000, 829 | 8'b01000000, 830 | 8'b00000000}; 831 | 832 | assign rom[ 96]={8'b00000000, 833 | 8'b00111100, 834 | 8'b01100110, 835 | 8'b01101110}; 836 | assign rom[ 97]={8'b01110110, 837 | 8'b01100110, 838 | 8'b00111100, 839 | 8'b00000000}; 840 | 841 | assign rom[ 98]={8'b00000000, 842 | 8'b00011000, 843 | 8'b00111000, 844 | 8'b00011000}; 845 | assign rom[ 99]={8'b00011000, 846 | 8'b00011000, 847 | 8'b01111110, 848 | 8'b00000000}; 849 | 850 | assign rom[100]={8'b00000000, 851 | 8'b00111100, 852 | 8'b01100110, 853 | 8'b00001100}; 854 | assign rom[101]={8'b00011000, 855 | 8'b00110000, 856 | 8'b01111110, 857 | 8'b00000000}; 858 | 859 | assign rom[102]={8'b00000000, 860 | 8'b01111110, 861 | 8'b00001100, 862 | 8'b00011000}; 863 | assign rom[103]={8'b00001100, 864 | 8'b01100110, 865 | 8'b00111100, 866 | 8'b00000000}; 867 | 868 | assign rom[104]={8'b00000000, 869 | 8'b00001100, 870 | 8'b00011100, 871 | 8'b00111100}; 872 | assign rom[105]={8'b01101100, 873 | 8'b01111110, 874 | 8'b00001100, 875 | 8'b00000000}; 876 | 877 | assign rom[106]={8'b00000000, 878 | 8'b01111110, 879 | 8'b01100000, 880 | 8'b01111100}; 881 | assign rom[107]={8'b00000110, 882 | 8'b01100110, 883 | 8'b00111100, 884 | 8'b00000000}; 885 | 886 | assign rom[108]={8'b00000000, 887 | 8'b00111100, 888 | 8'b01100000, 889 | 8'b01111100}; 890 | assign rom[109]={8'b01100110, 891 | 8'b01100110, 892 | 8'b00111100, 893 | 8'b00000000}; 894 | 895 | assign rom[110]={8'b00000000, 896 | 8'b01111110, 897 | 8'b00000110, 898 | 8'b00001100}; 899 | assign rom[111]={8'b00011000, 900 | 8'b00110000, 901 | 8'b00110000, 902 | 8'b00000000}; 903 | 904 | assign rom[112]={8'b00000000, 905 | 8'b00111100, 906 | 8'b01100110, 907 | 8'b00111100}; 908 | assign rom[113]={8'b01100110, 909 | 8'b01100110, 910 | 8'b00111100, 911 | 8'b00000000}; 912 | 913 | assign rom[114]={8'b00000000, 914 | 8'b00111100, 915 | 8'b01100110, 916 | 8'b00111110}; 917 | assign rom[115]={8'b00000110, 918 | 8'b00001100, 919 | 8'b00111000, 920 | 8'b00000000}; 921 | 922 | assign rom[116]={8'b00000000, 923 | 8'b00000000, 924 | 8'b00011000, 925 | 8'b00011000}; 926 | assign rom[117]={8'b00000000, 927 | 8'b00011000, 928 | 8'b00011000, 929 | 8'b00000000}; 930 | 931 | assign rom[118]={8'b00000000, 932 | 8'b00000000, 933 | 8'b00011000, 934 | 8'b00011000}; 935 | assign rom[119]={8'b00000000, 936 | 8'b00011000, 937 | 8'b00011000, 938 | 8'b00110000}; 939 | 940 | assign rom[120]={8'b00000110, 941 | 8'b00001100, 942 | 8'b00011000, 943 | 8'b00110000}; 944 | assign rom[121]={8'b00011000, 945 | 8'b00001100, 946 | 8'b00000110, 947 | 8'b00000000}; 948 | 949 | assign rom[122]={8'b00000000, 950 | 8'b00000000, 951 | 8'b01111110, 952 | 8'b00000000}; 953 | assign rom[123]={8'b00000000, 954 | 8'b01111110, 955 | 8'b00000000, 956 | 8'b00000000}; 957 | 958 | assign rom[124]={8'b01100000, 959 | 8'b00110000, 960 | 8'b00011000, 961 | 8'b00001100}; 962 | assign rom[125]={8'b00011000, 963 | 8'b00110000, 964 | 8'b01100000, 965 | 8'b00000000}; 966 | 967 | assign rom[126]={8'b00000000, 968 | 8'b00111100, 969 | 8'b01100110, 970 | 8'b00001100}; 971 | assign rom[127]={8'b00011000, 972 | 8'b00000000, 973 | 8'b00011000, 974 | 8'b00000000}; 975 | 976 | assign rom[128]={8'b00000000, 977 | 8'b00111100, 978 | 8'b01100110, 979 | 8'b01101110}; 980 | assign rom[129]={8'b01101110, 981 | 8'b01100000, 982 | 8'b00111110, 983 | 8'b00000000}; 984 | 985 | assign rom[130]={8'b00000000, 986 | 8'b00011000, 987 | 8'b00111100, 988 | 8'b01100110}; 989 | assign rom[131]={8'b01100110, 990 | 8'b01111110, 991 | 8'b01100110, 992 | 8'b00000000}; 993 | 994 | assign rom[132]={8'b00000000, 995 | 8'b01111100, 996 | 8'b01100110, 997 | 8'b01111100}; 998 | assign rom[133]={8'b01100110, 999 | 8'b01100110, 1000 | 8'b01111100, 1001 | 8'b00000000}; 1002 | 1003 | assign rom[134]={8'b00000000, 1004 | 8'b00111100, 1005 | 8'b01100110, 1006 | 8'b01100000}; 1007 | assign rom[135]={8'b01100000, 1008 | 8'b01100110, 1009 | 8'b00111100, 1010 | 8'b00000000}; 1011 | 1012 | assign rom[136]={8'b00000000, 1013 | 8'b01111000, 1014 | 8'b01101100, 1015 | 8'b01100110}; 1016 | assign rom[137]={8'b01100110, 1017 | 8'b01101100, 1018 | 8'b01111000, 1019 | 8'b00000000}; 1020 | 1021 | assign rom[138]={8'b00000000, 1022 | 8'b01111110, 1023 | 8'b01100000, 1024 | 8'b01111100}; 1025 | assign rom[139]={8'b01100000, 1026 | 8'b01100000, 1027 | 8'b01111110, 1028 | 8'b00000000}; 1029 | 1030 | assign rom[140]={8'b00000000, 1031 | 8'b01111110, 1032 | 8'b01100000, 1033 | 8'b01111100}; 1034 | assign rom[141]={8'b01100000, 1035 | 8'b01100000, 1036 | 8'b01100000, 1037 | 8'b00000000}; 1038 | 1039 | assign rom[142]={8'b00000000, 1040 | 8'b00111110, 1041 | 8'b01100000, 1042 | 8'b01100000}; 1043 | assign rom[143]={8'b01101110, 1044 | 8'b01100110, 1045 | 8'b00111110, 1046 | 8'b00000000}; 1047 | 1048 | assign rom[144]={8'b00000000, 1049 | 8'b01100110, 1050 | 8'b01100110, 1051 | 8'b01111110}; 1052 | assign rom[145]={8'b01100110, 1053 | 8'b01100110, 1054 | 8'b01100110, 1055 | 8'b00000000}; 1056 | 1057 | assign rom[146]={8'b00000000, 1058 | 8'b01111110, 1059 | 8'b00011000, 1060 | 8'b00011000}; 1061 | assign rom[147]={8'b00011000, 1062 | 8'b00011000, 1063 | 8'b01111110, 1064 | 8'b00000000}; 1065 | 1066 | assign rom[148]={8'b00000000, 1067 | 8'b00000110, 1068 | 8'b00000110, 1069 | 8'b00000110}; 1070 | assign rom[149]={8'b00000110, 1071 | 8'b01100110, 1072 | 8'b00111100, 1073 | 8'b00000000}; 1074 | 1075 | assign rom[150]={8'b00000000, 1076 | 8'b01100110, 1077 | 8'b01101100, 1078 | 8'b01111000}; 1079 | assign rom[151]={8'b01111000, 1080 | 8'b01101100, 1081 | 8'b01100110, 1082 | 8'b00000000}; 1083 | 1084 | assign rom[152]={8'b00000000, 1085 | 8'b01100000, 1086 | 8'b01100000, 1087 | 8'b01100000}; 1088 | assign rom[153]={8'b01100000, 1089 | 8'b01100000, 1090 | 8'b01111110, 1091 | 8'b00000000}; 1092 | 1093 | assign rom[154]={8'b00000000, 1094 | 8'b01100011, 1095 | 8'b01110111, 1096 | 8'b01111111}; 1097 | assign rom[155]={8'b01101011, 1098 | 8'b01100011, 1099 | 8'b01100011, 1100 | 8'b00000000}; 1101 | 1102 | assign rom[156]={8'b00000000, 1103 | 8'b01100110, 1104 | 8'b01110110, 1105 | 8'b01111110}; 1106 | assign rom[157]={8'b01111110, 1107 | 8'b01101110, 1108 | 8'b01100110, 1109 | 8'b00000000}; 1110 | 1111 | assign rom[158]={8'b00000000, 1112 | 8'b00111100, 1113 | 8'b01100110, 1114 | 8'b01100110}; 1115 | assign rom[159]={8'b01100110, 1116 | 8'b01100110, 1117 | 8'b00111100, 1118 | 8'b00000000}; 1119 | 1120 | assign rom[160]={8'b00000000, 1121 | 8'b01111100, 1122 | 8'b01100110, 1123 | 8'b01100110}; 1124 | assign rom[161]={8'b01111100, 1125 | 8'b01100000, 1126 | 8'b01100000, 1127 | 8'b00000000}; 1128 | 1129 | assign rom[162]={8'b00000000, 1130 | 8'b00111100, 1131 | 8'b01100110, 1132 | 8'b01100110}; 1133 | assign rom[163]={8'b01100110, 1134 | 8'b01101100, 1135 | 8'b00110110, 1136 | 8'b00000000}; 1137 | 1138 | assign rom[164]={8'b00000000, 1139 | 8'b01111100, 1140 | 8'b01100110, 1141 | 8'b01100110}; 1142 | assign rom[165]={8'b01111100, 1143 | 8'b01101100, 1144 | 8'b01100110, 1145 | 8'b00000000}; 1146 | 1147 | assign rom[166]={8'b00000000, 1148 | 8'b00111100, 1149 | 8'b01100000, 1150 | 8'b00111100}; 1151 | assign rom[167]={8'b00000110, 1152 | 8'b00000110, 1153 | 8'b00111100, 1154 | 8'b00000000}; 1155 | 1156 | assign rom[168]={8'b00000000, 1157 | 8'b01111110, 1158 | 8'b00011000, 1159 | 8'b00011000}; 1160 | assign rom[169]={8'b00011000, 1161 | 8'b00011000, 1162 | 8'b00011000, 1163 | 8'b00000000}; 1164 | 1165 | assign rom[170]={8'b00000000, 1166 | 8'b01100110, 1167 | 8'b01100110, 1168 | 8'b01100110}; 1169 | assign rom[171]={8'b01100110, 1170 | 8'b01100110, 1171 | 8'b01111110, 1172 | 8'b00000000}; 1173 | 1174 | assign rom[172]={8'b00000000, 1175 | 8'b01100110, 1176 | 8'b01100110, 1177 | 8'b01100110}; 1178 | assign rom[173]={8'b01100110, 1179 | 8'b00111100, 1180 | 8'b00011000, 1181 | 8'b00000000}; 1182 | 1183 | assign rom[174]={8'b00000000, 1184 | 8'b01100011, 1185 | 8'b01100011, 1186 | 8'b01101011}; 1187 | assign rom[175]={8'b01111111, 1188 | 8'b01110111, 1189 | 8'b01100011, 1190 | 8'b00000000}; 1191 | 1192 | assign rom[176]={8'b00000000, 1193 | 8'b01100110, 1194 | 8'b01100110, 1195 | 8'b00111100}; 1196 | assign rom[177]={8'b00111100, 1197 | 8'b01100110, 1198 | 8'b01100110, 1199 | 8'b00000000}; 1200 | 1201 | assign rom[178]={8'b00000000, 1202 | 8'b01100110, 1203 | 8'b01100110, 1204 | 8'b00111100}; 1205 | assign rom[179]={8'b00011000, 1206 | 8'b00011000, 1207 | 8'b00011000, 1208 | 8'b00000000}; 1209 | 1210 | assign rom[180]={8'b00000000, 1211 | 8'b01111110, 1212 | 8'b00001100, 1213 | 8'b00011000}; 1214 | assign rom[181]={8'b00110000, 1215 | 8'b01100000, 1216 | 8'b01111110, 1217 | 8'b00000000}; 1218 | 1219 | assign rom[182]={8'b00000000, 1220 | 8'b00011110, 1221 | 8'b00011000, 1222 | 8'b00011000}; 1223 | assign rom[183]={8'b00011000, 1224 | 8'b00011000, 1225 | 8'b00011110, 1226 | 8'b00000000}; 1227 | 1228 | assign rom[184]={8'b00000000, 1229 | 8'b01000000, 1230 | 8'b01100000, 1231 | 8'b00110000}; 1232 | assign rom[185]={8'b00011000, 1233 | 8'b00001100, 1234 | 8'b00000110, 1235 | 8'b00000000}; 1236 | 1237 | assign rom[186]={8'b00000000, 1238 | 8'b01111000, 1239 | 8'b00011000, 1240 | 8'b00011000}; 1241 | assign rom[187]={8'b00011000, 1242 | 8'b00011000, 1243 | 8'b01111000, 1244 | 8'b00000000}; 1245 | 1246 | assign rom[188]={8'b00000000, 1247 | 8'b00001000, 1248 | 8'b00011100, 1249 | 8'b00110110}; 1250 | assign rom[189]={8'b01100011, 1251 | 8'b00000000, 1252 | 8'b00000000, 1253 | 8'b00000000}; 1254 | 1255 | assign rom[190]={8'b00000000, 1256 | 8'b00000000, 1257 | 8'b00000000, 1258 | 8'b00000000}; 1259 | assign rom[191]={8'b00000000, 1260 | 8'b00000000, 1261 | 8'b11111111, 1262 | 8'b00000000}; 1263 | 1264 | assign rom[192]={8'b00000000, 1265 | 8'b00011000, 1266 | 8'b00111100, 1267 | 8'b01111110}; 1268 | assign rom[193]={8'b01111110, 1269 | 8'b00111100, 1270 | 8'b00011000, 1271 | 8'b00000000}; 1272 | 1273 | assign rom[194]={8'b00000000, 1274 | 8'b00000000, 1275 | 8'b00111100, 1276 | 8'b00000110}; 1277 | assign rom[195]={8'b00111110, 1278 | 8'b01100110, 1279 | 8'b00111110, 1280 | 8'b00000000}; 1281 | 1282 | assign rom[196]={8'b00000000, 1283 | 8'b01100000, 1284 | 8'b01100000, 1285 | 8'b01111100}; 1286 | assign rom[197]={8'b01100110, 1287 | 8'b01100110, 1288 | 8'b01111100, 1289 | 8'b00000000}; 1290 | 1291 | assign rom[198]={8'b00000000, 1292 | 8'b00000000, 1293 | 8'b00111100, 1294 | 8'b01100000}; 1295 | assign rom[199]={8'b01100000, 1296 | 8'b01100000, 1297 | 8'b00111100, 1298 | 8'b00000000}; 1299 | 1300 | assign rom[200]={8'b00000000, 1301 | 8'b00000110, 1302 | 8'b00000110, 1303 | 8'b00111110}; 1304 | assign rom[201]={8'b01100110, 1305 | 8'b01100110, 1306 | 8'b00111110, 1307 | 8'b00000000}; 1308 | 1309 | assign rom[202]={8'b00000000, 1310 | 8'b00000000, 1311 | 8'b00111100, 1312 | 8'b01100110}; 1313 | assign rom[203]={8'b01111110, 1314 | 8'b01100000, 1315 | 8'b00111100, 1316 | 8'b00000000}; 1317 | 1318 | assign rom[204]={8'b00000000, 1319 | 8'b00001110, 1320 | 8'b00011000, 1321 | 8'b00111110}; 1322 | assign rom[205]={8'b00011000, 1323 | 8'b00011000, 1324 | 8'b00011000, 1325 | 8'b00000000}; 1326 | 1327 | assign rom[206]={8'b00000000, 1328 | 8'b00000000, 1329 | 8'b00111110, 1330 | 8'b01100110}; 1331 | assign rom[207]={8'b01100110, 1332 | 8'b00111110, 1333 | 8'b00000110, 1334 | 8'b01111100}; 1335 | 1336 | assign rom[208]={8'b00000000, 1337 | 8'b01100000, 1338 | 8'b01100000, 1339 | 8'b01111100}; 1340 | assign rom[209]={8'b01100110, 1341 | 8'b01100110, 1342 | 8'b01100110, 1343 | 8'b00000000}; 1344 | 1345 | assign rom[210]={8'b00000000, 1346 | 8'b00011000, 1347 | 8'b00000000, 1348 | 8'b00111000}; 1349 | assign rom[211]={8'b00011000, 1350 | 8'b00011000, 1351 | 8'b00111100, 1352 | 8'b00000000}; 1353 | 1354 | assign rom[212]={8'b00000000, 1355 | 8'b00000110, 1356 | 8'b00000000, 1357 | 8'b00000110}; 1358 | assign rom[213]={8'b00000110, 1359 | 8'b00000110, 1360 | 8'b00000110, 1361 | 8'b00111100}; 1362 | 1363 | assign rom[214]={8'b00000000, 1364 | 8'b01100000, 1365 | 8'b01100000, 1366 | 8'b01101100}; 1367 | assign rom[215]={8'b01111000, 1368 | 8'b01101100, 1369 | 8'b01100110, 1370 | 8'b00000000}; 1371 | 1372 | assign rom[216]={8'b00000000, 1373 | 8'b00111000, 1374 | 8'b00011000, 1375 | 8'b00011000}; 1376 | assign rom[217]={8'b00011000, 1377 | 8'b00011000, 1378 | 8'b00111100, 1379 | 8'b00000000}; 1380 | 1381 | assign rom[218]={8'b00000000, 1382 | 8'b00000000, 1383 | 8'b01100110, 1384 | 8'b01111111}; 1385 | assign rom[219]={8'b01111111, 1386 | 8'b01101011, 1387 | 8'b01100011, 1388 | 8'b00000000}; 1389 | 1390 | assign rom[220]={8'b00000000, 1391 | 8'b00000000, 1392 | 8'b01111100, 1393 | 8'b01100110}; 1394 | assign rom[221]={8'b01100110, 1395 | 8'b01100110, 1396 | 8'b01100110, 1397 | 8'b00000000}; 1398 | 1399 | assign rom[222]={8'b00000000, 1400 | 8'b00000000, 1401 | 8'b00111100, 1402 | 8'b01100110}; 1403 | assign rom[223]={8'b01100110, 1404 | 8'b01100110, 1405 | 8'b00111100, 1406 | 8'b00000000}; 1407 | 1408 | assign rom[224]={8'b00000000, 1409 | 8'b00000000, 1410 | 8'b01111100, 1411 | 8'b01100110}; 1412 | assign rom[225]={8'b01100110, 1413 | 8'b01111100, 1414 | 8'b01100000, 1415 | 8'b01100000}; 1416 | 1417 | assign rom[226]={8'b00000000, 1418 | 8'b00000000, 1419 | 8'b00111110, 1420 | 8'b01100110}; 1421 | assign rom[227]={8'b01100110, 1422 | 8'b00111110, 1423 | 8'b00000110, 1424 | 8'b00000110}; 1425 | 1426 | assign rom[228]={8'b00000000, 1427 | 8'b00000000, 1428 | 8'b01111100, 1429 | 8'b01100110}; 1430 | assign rom[229]={8'b01100000, 1431 | 8'b01100000, 1432 | 8'b01100000, 1433 | 8'b00000000}; 1434 | 1435 | assign rom[230]={8'b00000000, 1436 | 8'b00000000, 1437 | 8'b00111110, 1438 | 8'b01100000}; 1439 | assign rom[231]={8'b00111100, 1440 | 8'b00000110, 1441 | 8'b01111100, 1442 | 8'b00000000}; 1443 | 1444 | assign rom[232]={8'b00000000, 1445 | 8'b00011000, 1446 | 8'b01111110, 1447 | 8'b00011000}; 1448 | assign rom[233]={8'b00011000, 1449 | 8'b00011000, 1450 | 8'b00001110, 1451 | 8'b00000000}; 1452 | 1453 | assign rom[234]={8'b00000000, 1454 | 8'b00000000, 1455 | 8'b01100110, 1456 | 8'b01100110}; 1457 | assign rom[235]={8'b01100110, 1458 | 8'b01100110, 1459 | 8'b00111110, 1460 | 8'b00000000}; 1461 | 1462 | assign rom[236]={8'b00000000, 1463 | 8'b00000000, 1464 | 8'b01100110, 1465 | 8'b01100110}; 1466 | assign rom[237]={8'b01100110, 1467 | 8'b00111100, 1468 | 8'b00011000, 1469 | 8'b00000000}; 1470 | 1471 | assign rom[238]={8'b00000000, 1472 | 8'b00000000, 1473 | 8'b01100011, 1474 | 8'b01101011}; 1475 | assign rom[239]={8'b01111111, 1476 | 8'b00111110, 1477 | 8'b00110110, 1478 | 8'b00000000}; 1479 | 1480 | assign rom[240]={8'b00000000, 1481 | 8'b00000000, 1482 | 8'b01100110, 1483 | 8'b00111100}; 1484 | assign rom[241]={8'b00011000, 1485 | 8'b00111100, 1486 | 8'b01100110, 1487 | 8'b00000000}; 1488 | 1489 | assign rom[242]={8'b00000000, 1490 | 8'b00000000, 1491 | 8'b01100110, 1492 | 8'b01100110}; 1493 | assign rom[243]={8'b01100110, 1494 | 8'b00111110, 1495 | 8'b00001100, 1496 | 8'b01111000}; 1497 | 1498 | assign rom[244]={8'b00000000, 1499 | 8'b00000000, 1500 | 8'b01111110, 1501 | 8'b00001100}; 1502 | assign rom[245]={8'b00011000, 1503 | 8'b00110000, 1504 | 8'b01111110, 1505 | 8'b00000000}; 1506 | 1507 | assign rom[246]={8'b00000000, 1508 | 8'b00011000, 1509 | 8'b00111100, 1510 | 8'b01111110}; 1511 | assign rom[247]={8'b01111110, 1512 | 8'b00011000, 1513 | 8'b00111100, 1514 | 8'b00000000}; 1515 | 1516 | assign rom[248]={8'b00011000, 1517 | 8'b00011000, 1518 | 8'b00011000, 1519 | 8'b00011000}; 1520 | assign rom[249]={8'b00011000, 1521 | 8'b00011000, 1522 | 8'b00011000, 1523 | 8'b00011000}; 1524 | 1525 | assign rom[250]={8'b00000000, 1526 | 8'b01111110, 1527 | 8'b01111000, 1528 | 8'b01111100}; 1529 | assign rom[251]={8'b01101110, 1530 | 8'b01100110, 1531 | 8'b00000110, 1532 | 8'b00000000}; 1533 | 1534 | assign rom[252]={8'b00001000, 1535 | 8'b00011000, 1536 | 8'b00111000, 1537 | 8'b01111000}; 1538 | assign rom[253]={8'b00111000, 1539 | 8'b00011000, 1540 | 8'b00001000, 1541 | 8'b00000000}; 1542 | 1543 | assign rom[254]={8'b00010000, 1544 | 8'b00011000, 1545 | 8'b00011100, 1546 | 8'b00011110}; 1547 | assign rom[255]={8'b00011100, 1548 | 8'b00011000, 1549 | 8'b00010000, 1550 | 8'b00000000}; 1551 | endmodule 1552 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # verilog 2 | 3 | This project will eventually have 1280 by 720 pixel display, having 3 indepentant layers ( tile, sprite, and pixel ) plus a PS/2 keyboard interface. 4 | -------------------------------------------------------------------------------- /VGA8BitsPerPixel.v: -------------------------------------------------------------------------------- 1 | `timescale 1ns / 1ps 2 | 3 | //`define DEBUG 4 | 5 | `ifdef DEBUG 6 | 7 | module TestVGA; 8 | 9 | // Inputs 10 | reg clk; 11 | 12 | // Outputs 13 | wire MHz75; 14 | wire [ 2:0] timer; 15 | wire write; 16 | wire [16:0] pixadr; 17 | wire [31:0] pixout; 18 | wire [31:0] pixdat; 19 | wire [ 9:0] vCount; 20 | wire [ 9:0] hCount; 21 | wire [ 3:0] vgaR; 22 | wire [ 3:0] vgaG; 23 | wire [ 3:0] vgaB; 24 | wire hsync; 25 | wire vsync; 26 | 27 | // Instantiate the Unit Under Test (UUT) 28 | VGA uut ( 29 | .clk(clk), 30 | .MHz75(MHz75), 31 | .timer(timer), 32 | .write(write), 33 | .pixadr(pixadr), 34 | .pixout(pixout), 35 | .pixdat(pixdat), 36 | .hCount(hCount), 37 | .vCount(vCount), 38 | .vgaR(vgaR), 39 | .vgaG(vgaG), 40 | .vgaB(vgaB), 41 | .hsync(hsync), 42 | .vsync(vsync) 43 | ); 44 | 45 | initial begin 46 | clk = 0; 47 | #100; 48 | end 49 | 50 | always clk=#10~clk; 51 | 52 | endmodule 53 | 54 | `endif 55 | 56 | // clocks per pixel 57 | `define cpp 3'd3 58 | // horz sync polarity 59 | `define hsp 1'd0 60 | // horz front pourch 61 | `define hfp 10'd16 62 | // horz back pourch 63 | `define hbp 10'd112 64 | // horz total blank 65 | `define htb 10'd160 66 | // horz visible area 67 | `define hva 10'd640 68 | // horz total width 69 | `define htw 10'd800 70 | // vert sync polarity 71 | `define vsp 1'd0 72 | // vert front pourch 73 | `define vfp 10'd10 74 | // vert back pourch 75 | `define vbp 10'd12 76 | // vert total blank 77 | `define vtb 10'd45 78 | // vert visible area 79 | `define vva 10'd480 80 | // vert total height 81 | `define vth 10'd525 82 | 83 | module VGA( 84 | input wire clk, 85 | `ifdef DEBUG 86 | output wire MHz75, 87 | output reg [ 2:0] timer, 88 | output reg write, 89 | output reg [16:0] pixadr, 90 | output wire [31:0] pixdat, 91 | output reg [31:0] pixout, 92 | output reg [ 9:0] hCount, 93 | output reg [ 9:0] vCount, 94 | `endif 95 | output wire [ 3:0] vgaR, 96 | output wire [ 3:0] vgaG, 97 | output wire [ 3:0] vgaB, 98 | output reg hsync, 99 | output reg vsync 100 | ); 101 | 102 | `ifndef DEBUG 103 | wire MHz75; 104 | reg [ 2:0] timer; 105 | reg write; 106 | reg [16:0] pixadr; 107 | wire [31:0] pixdat; 108 | reg [31:0] pixout; 109 | reg [ 9:0] hCount; 110 | reg [ 9:0] vCount; 111 | `endif 112 | 113 | reg [11:0] color; 114 | reg [31:0] pixels; 115 | 116 | wire [ 1:0] col; 117 | wire [ 3:0] i; 118 | wire [ 3:0] hex; 119 | wire [ 7:0] pixel; 120 | wire [11:0] palette [255:0]; 121 | wire [ 9:0] x; 122 | wire [ 9:0] y; 123 | 124 | assign col = x[1:0]; 125 | assign vgaR = color[11:8]; 126 | assign vgaG = color[7:4]; 127 | assign vgaB = color[3:0]; 128 | assign x = hCount-`htb; 129 | assign y = vCount-`vtb; 130 | 131 | vgaClock tick(MHz75,clk); 132 | RAM ram(MHz75,write,pixadr,pixout,pixdat); 133 | quad qp(pixels,col,pixel); 134 | 135 | initial begin 136 | timer = 3'd0; 137 | write = 1'd0; 138 | pixadr = ~17'd0; 139 | pixout = 32'h00010203; 140 | pixels = 32'h0; 141 | color = 12'd0; 142 | hCount = 10'd0; 143 | vCount = 10'd0; 144 | hsync = 1'd1; 145 | vsync = 1'd1; 146 | end 147 | 148 | always @ (posedge MHz75) begin 149 | if(write==1'd1)begin 150 | if((hCount>=`hfp)&&(hCount<`hbp))begin 151 | hsync = `hsp; 152 | end else begin 153 | hsync = ~`hsp; 154 | end 155 | if((vCount>=`vfp)&&(vCount<`vbp))begin 156 | vsync = `vsp; 157 | end else begin 158 | vsync = ~`vsp; 159 | end 160 | if(timer<`cpp)begin 161 | timer = timer + 3'd1; 162 | end else begin 163 | timer = 3'd1; 164 | if(hCount<`htw)begin 165 | hCount = hCount + 10'd1; 166 | `ifdef DEBUG 167 | if((y==10'd3)&&(x==10'd8))$finish; 168 | `endif 169 | end else begin 170 | hCount = 10'd1; 171 | if(vCount<`vth)begin 172 | vCount = vCount + 10'd1; 173 | end else begin 174 | vCount = 10'd1; 175 | pixadr =~17'd0; 176 | end 177 | end 178 | end 179 | `ifdef DEBUG 180 | if((vCount>=`vtb)&&(x<`hva))begin 181 | if(timer==3'd1)begin 182 | if(x[1:0]==2'd0)begin 183 | $display("pixels=%8h pixadr=%6d",pixdat,pixadr); 184 | end 185 | end 186 | end 187 | `endif 188 | if((vCount<`vtb)||(hCount<`htb))begin 189 | color = 12'd0; 190 | end else begin 191 | color = palette[pixel]; 192 | `ifdef DEBUG 193 | if((timer==3'd1)&&(x<`hva))$display("x=%3d y=%3d c=%3h p=%2h",x,y,color,pixel); 194 | `endif 195 | end 196 | if((vCount>=`vtb)&&(x<`hva))begin 197 | if(timer==3'd3)begin 198 | if(x[1:0]==2'd3)begin 199 | pixels = pixdat; 200 | pixadr = pixadr + 17'd1; 201 | end 202 | end 203 | end 204 | end else begin 205 | pixadr = pixadr + 17'd1; 206 | if(pixout[7:0]==8'hFF)begin 207 | pixout = 32'h00010203; 208 | end else begin 209 | pixout = pixout + 32'h04040404; 210 | end 211 | if(pixadr==~17'd0)begin 212 | write = 1'd1; 213 | pixadr = 17'd0; 214 | end 215 | end 216 | end 217 | 218 | assign palette[ 0]=12'hFFF; 219 | assign palette[ 1]=12'hFFE; 220 | assign palette[ 2]=12'hFFD; 221 | assign palette[ 3]=12'hFFC; 222 | assign palette[ 4]=12'hFFB; 223 | assign palette[ 5]=12'hFFA; 224 | assign palette[ 6]=12'hFF9; 225 | assign palette[ 7]=12'hFF8; 226 | assign palette[ 8]=12'hFF7; 227 | assign palette[ 9]=12'hFF6; 228 | assign palette[ 10]=12'hFF5; 229 | assign palette[ 11]=12'hFF4; 230 | assign palette[ 12]=12'hFF3; 231 | assign palette[ 13]=12'hFF2; 232 | assign palette[ 14]=12'hFF1; 233 | assign palette[ 15]=12'hFF0; 234 | assign palette[ 16]=12'hFE0; 235 | assign palette[ 17]=12'hFD0; 236 | assign palette[ 18]=12'hFC0; 237 | assign palette[ 19]=12'hFB0; 238 | assign palette[ 20]=12'hFA0; 239 | assign palette[ 21]=12'hF90; 240 | assign palette[ 22]=12'hF80; 241 | assign palette[ 23]=12'hF70; 242 | assign palette[ 24]=12'hF60; 243 | assign palette[ 25]=12'hF50; 244 | assign palette[ 26]=12'hF40; 245 | assign palette[ 27]=12'hF30; 246 | assign palette[ 28]=12'hF20; 247 | assign palette[ 29]=12'hF10; 248 | assign palette[ 30]=12'hF00; 249 | assign palette[ 31]=12'hE00; 250 | assign palette[ 32]=12'hD00; 251 | assign palette[ 33]=12'hC00; 252 | assign palette[ 34]=12'hB00; 253 | assign palette[ 35]=12'hA00; 254 | assign palette[ 36]=12'h900; 255 | assign palette[ 37]=12'h800; 256 | assign palette[ 38]=12'h700; 257 | assign palette[ 39]=12'h600; 258 | assign palette[ 40]=12'h500; 259 | assign palette[ 41]=12'h400; 260 | assign palette[ 42]=12'h300; 261 | assign palette[ 43]=12'h200; 262 | assign palette[ 44]=12'h100; 263 | assign palette[ 45]=12'h000; 264 | assign palette[ 46]=12'h001; 265 | assign palette[ 47]=12'h002; 266 | assign palette[ 48]=12'h003; 267 | assign palette[ 49]=12'h004; 268 | assign palette[ 50]=12'h005; 269 | assign palette[ 51]=12'h006; 270 | assign palette[ 52]=12'h007; 271 | assign palette[ 53]=12'h008; 272 | assign palette[ 54]=12'h009; 273 | assign palette[ 55]=12'h00A; 274 | assign palette[ 56]=12'h00B; 275 | assign palette[ 57]=12'h00C; 276 | assign palette[ 58]=12'h00D; 277 | assign palette[ 59]=12'h00E; 278 | assign palette[ 60]=12'h00F; 279 | assign palette[ 61]=12'h01F; 280 | assign palette[ 62]=12'h02F; 281 | assign palette[ 63]=12'h03F; 282 | assign palette[ 64]=12'h04F; 283 | assign palette[ 65]=12'h05F; 284 | assign palette[ 66]=12'h06F; 285 | assign palette[ 67]=12'h07F; 286 | assign palette[ 68]=12'h08F; 287 | assign palette[ 69]=12'h09F; 288 | assign palette[ 70]=12'h0AF; 289 | assign palette[ 71]=12'h0BF; 290 | assign palette[ 72]=12'h0CF; 291 | assign palette[ 73]=12'h0DF; 292 | assign palette[ 74]=12'h0EF; 293 | assign palette[ 75]=12'h0FF; 294 | assign palette[ 76]=12'h1FF; 295 | assign palette[ 77]=12'h2FF; 296 | assign palette[ 78]=12'h3FF; 297 | assign palette[ 79]=12'h4FF; 298 | assign palette[ 80]=12'h5FF; 299 | assign palette[ 81]=12'h6FF; 300 | assign palette[ 82]=12'h7FF; 301 | assign palette[ 83]=12'h8FF; 302 | assign palette[ 84]=12'h9FF; 303 | assign palette[ 85]=12'hAFF; 304 | assign palette[ 86]=12'hBFF; 305 | assign palette[ 87]=12'hCFF; 306 | assign palette[ 88]=12'hDFF; 307 | assign palette[ 89]=12'hEFF; 308 | assign palette[ 90]=12'hFFF; 309 | assign palette[ 91]=12'hFEF; 310 | assign palette[ 92]=12'hFDF; 311 | assign palette[ 93]=12'hFCF; 312 | assign palette[ 94]=12'hFBF; 313 | assign palette[ 95]=12'hFAF; 314 | assign palette[ 96]=12'hF9F; 315 | assign palette[ 97]=12'hF8F; 316 | assign palette[ 98]=12'hF7F; 317 | assign palette[ 99]=12'hF6F; 318 | assign palette[100]=12'hF5F; 319 | assign palette[101]=12'hF4F; 320 | assign palette[102]=12'hF3F; 321 | assign palette[103]=12'hF2F; 322 | assign palette[104]=12'hF1F; 323 | assign palette[105]=12'hF0F; 324 | assign palette[106]=12'hF0E; 325 | assign palette[107]=12'hF0D; 326 | assign palette[108]=12'hF0C; 327 | assign palette[109]=12'hF0B; 328 | assign palette[110]=12'hF0A; 329 | assign palette[111]=12'hF09; 330 | assign palette[112]=12'hF08; 331 | assign palette[113]=12'hF07; 332 | assign palette[114]=12'hF06; 333 | assign palette[115]=12'hF05; 334 | assign palette[116]=12'hF04; 335 | assign palette[117]=12'hF03; 336 | assign palette[118]=12'hF02; 337 | assign palette[119]=12'hF01; 338 | assign palette[120]=12'hF00; 339 | assign palette[121]=12'hF11; 340 | assign palette[122]=12'hF22; 341 | assign palette[123]=12'hF33; 342 | assign palette[124]=12'hF44; 343 | assign palette[125]=12'hF55; 344 | assign palette[126]=12'hF66; 345 | assign palette[127]=12'hF77; 346 | assign palette[128]=12'hF88; 347 | assign palette[129]=12'hF99; 348 | assign palette[130]=12'hFAA; 349 | assign palette[131]=12'hFBB; 350 | assign palette[132]=12'hFCC; 351 | assign palette[133]=12'hFDD; 352 | assign palette[134]=12'hFEE; 353 | assign palette[135]=12'hFFF; 354 | assign palette[136]=12'hEFE; 355 | assign palette[137]=12'hDFD; 356 | assign palette[138]=12'hCFC; 357 | assign palette[139]=12'hBFB; 358 | assign palette[140]=12'hAFA; 359 | assign palette[141]=12'h9F9; 360 | assign palette[142]=12'h8F8; 361 | assign palette[143]=12'h7F7; 362 | assign palette[144]=12'h6F6; 363 | assign palette[145]=12'h5F5; 364 | assign palette[146]=12'h4F4; 365 | assign palette[147]=12'h3F3; 366 | assign palette[148]=12'h2F2; 367 | assign palette[149]=12'h1F1; 368 | assign palette[150]=12'h0F0; 369 | assign palette[151]=12'h0E0; 370 | assign palette[152]=12'h0D0; 371 | assign palette[153]=12'h0C0; 372 | assign palette[154]=12'h0B0; 373 | assign palette[155]=12'h0A0; 374 | assign palette[156]=12'h090; 375 | assign palette[157]=12'h080; 376 | assign palette[158]=12'h070; 377 | assign palette[159]=12'h060; 378 | assign palette[160]=12'h050; 379 | assign palette[161]=12'h040; 380 | assign palette[162]=12'h030; 381 | assign palette[163]=12'h020; 382 | assign palette[164]=12'h010; 383 | assign palette[165]=12'h000; 384 | assign palette[166]=12'h100; 385 | assign palette[167]=12'h200; 386 | assign palette[168]=12'h300; 387 | assign palette[169]=12'h400; 388 | assign palette[170]=12'h500; 389 | assign palette[171]=12'h600; 390 | assign palette[172]=12'h700; 391 | assign palette[173]=12'h800; 392 | assign palette[174]=12'h900; 393 | assign palette[175]=12'hA00; 394 | assign palette[176]=12'hB00; 395 | assign palette[177]=12'hC00; 396 | assign palette[178]=12'hD00; 397 | assign palette[179]=12'hE00; 398 | assign palette[180]=12'hF00; 399 | assign palette[181]=12'hF11; 400 | assign palette[182]=12'hF22; 401 | assign palette[183]=12'hF33; 402 | assign palette[184]=12'hF44; 403 | assign palette[185]=12'hF55; 404 | assign palette[186]=12'hF66; 405 | assign palette[187]=12'hF77; 406 | assign palette[188]=12'hF88; 407 | assign palette[189]=12'hF99; 408 | assign palette[190]=12'hFAA; 409 | assign palette[191]=12'hFBB; 410 | assign palette[192]=12'hFCC; 411 | assign palette[193]=12'hFDD; 412 | assign palette[194]=12'hFEE; 413 | assign palette[195]=12'hFFF; 414 | assign palette[196]=12'hEFE; 415 | assign palette[197]=12'hDFD; 416 | assign palette[198]=12'hCFC; 417 | assign palette[199]=12'hBFB; 418 | assign palette[200]=12'hAFA; 419 | assign palette[201]=12'h9F9; 420 | assign palette[202]=12'h8F8; 421 | assign palette[203]=12'h7F7; 422 | assign palette[204]=12'h6F6; 423 | assign palette[205]=12'h5F5; 424 | assign palette[206]=12'h4F4; 425 | assign palette[207]=12'h3F3; 426 | assign palette[208]=12'h2F2; 427 | assign palette[209]=12'h1F1; 428 | assign palette[210]=12'h0F0; 429 | assign palette[211]=12'h00C; 430 | assign palette[212]=12'h009; 431 | assign palette[213]=12'h006; 432 | assign palette[214]=12'h003; 433 | assign palette[215]=12'h000; 434 | assign palette[216]=12'hE00; 435 | assign palette[217]=12'hD00; 436 | assign palette[218]=12'hB00; 437 | assign palette[219]=12'hA00; 438 | assign palette[220]=12'h800; 439 | assign palette[221]=12'h700; 440 | assign palette[222]=12'h500; 441 | assign palette[223]=12'h400; 442 | assign palette[224]=12'h200; 443 | assign palette[225]=12'h100; 444 | assign palette[226]=12'h0E0; 445 | assign palette[227]=12'h0D0; 446 | assign palette[228]=12'h0B0; 447 | assign palette[229]=12'h0A0; 448 | assign palette[230]=12'h080; 449 | assign palette[231]=12'h070; 450 | assign palette[232]=12'h050; 451 | assign palette[233]=12'h040; 452 | assign palette[234]=12'h020; 453 | assign palette[235]=12'h010; 454 | assign palette[236]=12'h000; 455 | assign palette[237]=12'h111; 456 | assign palette[238]=12'h222; 457 | assign palette[239]=12'h333; 458 | assign palette[240]=12'h444; 459 | assign palette[241]=12'h555; 460 | assign palette[242]=12'h666; 461 | assign palette[243]=12'h777; 462 | assign palette[244]=12'h888; 463 | assign palette[245]=12'h999; 464 | assign palette[246]=12'hAAA; 465 | assign palette[247]=12'hBBB; 466 | assign palette[248]=12'hCCC; 467 | assign palette[249]=12'hDDD; 468 | assign palette[250]=12'hEEE; 469 | assign palette[251]=12'hFFF; 470 | assign palette[252]=12'hC09; 471 | assign palette[253]=12'hC90; 472 | assign palette[254]=12'h0C9; 473 | assign palette[255]=12'h90C; 474 | 475 | endmodule 476 | 477 | module RAM( 478 | input wire ramC, 479 | input wire ramW, 480 | input wire [16:0] ramA, 481 | input wire [31:0] ramI, 482 | output reg [31:0] ramO 483 | ); 484 | 485 | reg [31:0] ram [131071:0]; 486 | 487 | initial begin 488 | ramO={5'd31,5'd31,5'd31,1'd1,15'hF0AA}; 489 | end 490 | 491 | always @ (posedge ramC) begin 492 | if(ramW==1'd1)begin 493 | ramO=ram[ramA]; 494 | end else begin 495 | ram[ramA]=ramI; 496 | end 497 | end 498 | 499 | endmodule 500 | 501 | module quad( 502 | input wire [31:0] pixels, 503 | input wire [ 1:0] column, 504 | output wire [ 7:0] pixel 505 | ); 506 | 507 | wire[7:0]p[3:0]; 508 | 509 | assign pixel=p[column]; 510 | 511 | assign p[0]=pixels[31:24]; 512 | assign p[1]=pixels[23:16]; 513 | assign p[2]=pixels[15: 8]; 514 | assign p[3]=pixels[ 7: 0]; 515 | 516 | endmodule 517 | --------------------------------------------------------------------------------