├── .gitignore ├── 49-stlinkv2.rules ├── LICENSE ├── README.md ├── interphase-keyboard-basic ├── config │ ├── interphase.h │ └── nrf_drv_config.h ├── custom │ └── armgcc │ │ ├── Makefile │ │ └── gzll_gcc_nrf51.ld ├── main.c └── program.sh ├── interphase-receiver-basic ├── config │ └── nrf_drv_config.h ├── custom │ └── armgcc │ │ ├── Makefile │ │ └── uart_gcc_nrf51.ld ├── main.c └── program.sh ├── nrf-stlink.cfg └── precompiled ├── precompiled-basic-left.hex ├── precompiled-basic-qmk.hex ├── precompiled-basic-receiver.hex ├── precompiled-basic-right.hex └── testing-receiver-rgb.hex /.gitignore: -------------------------------------------------------------------------------- 1 | *.o 2 | *.hex 3 | *.map 4 | *.bin 5 | *.out 6 | -------------------------------------------------------------------------------- /49-stlinkv2.rules: -------------------------------------------------------------------------------- 1 | # stm32 discovery boards, with onboard st/linkv2 2 | # ie, STM32L, STM32F4. 3 | # STM32VL has st/linkv1, which is quite different 4 | 5 | SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", \ 6 | MODE:="0666", \ 7 | SYMLINK+="stlinkv2_%n" 8 | 9 | # If you share your linux system with other users, or just don't like the 10 | # idea of write permission for everybody, you can replace MODE:="0666" with 11 | # OWNER:="yourusername" to create the device owned by you, or with 12 | # GROUP:="somegroupname" and mange access using standard unix groups. 13 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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Interpretation of Sections 15 and 16. 613 | 614 | If the disclaimer of warranty and limitation of liability provided 615 | above cannot be given local legal effect according to their terms, 616 | reviewing courts shall apply local law that most closely approximates 617 | an absolute waiver of all civil liability in connection with the 618 | Program, unless a warranty or assumption of liability accompanies a 619 | copy of the Program in return for a fee. 620 | 621 | END OF TERMS AND CONDITIONS 622 | 623 | How to Apply These Terms to Your New Programs 624 | 625 | If you develop a new program, and you want it to be of the greatest 626 | possible use to the public, the best way to achieve this is to make it 627 | free software which everyone can redistribute and change under these terms. 628 | 629 | To do so, attach the following notices to the program. It is safest 630 | to attach them to the start of each source file to most effectively 631 | state the exclusion of warranty; and each file should have at least 632 | the "copyright" line and a pointer to where the full notice is found. 633 | 634 | {one line to give the program's name and a brief idea of what it does.} 635 | Copyright (C) {year} {name of author} 636 | 637 | This program is free software: you can redistribute it and/or modify 638 | it under the terms of the GNU General Public License as published by 639 | the Free Software Foundation, either version 3 of the License, or 640 | (at your option) any later version. 641 | 642 | This program is distributed in the hope that it will be useful, 643 | but WITHOUT ANY WARRANTY; without even the implied warranty of 644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 645 | GNU General Public License for more details. 646 | 647 | You should have received a copy of the GNU General Public License 648 | along with this program. If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | {project} Copyright (C) {year} {fullname} 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Interphase Keyboard Firmware 2 | Firmware for Nordic MCUs used in the Interphase Keyboard, contains precompiled .hex files, as well as sources buildable with the Nordic SDK 3 | This firmware is a dervivative of reversebias' mitosis firmware. 4 | https://github.com/reversebias/mitosis 5 | 6 | ## Install dependencies 7 | 8 | Tested on Ubuntu 16.04.2, but should be able to find alternatives on all distros. 9 | 10 | ``` 11 | sudo apt install openocd gcc-arm-none-eabi 12 | ``` 13 | 14 | ## Download Nordic SDK 15 | 16 | Nordic does not allow redistribution of their SDK or components, so download and extract from their site: 17 | 18 | https://developer.nordicsemi.com/nRF5_SDK/nRF5_SDK_v11.x.x/nRF5_SDK_11.0.0_89a8197.zip 19 | 20 | Firmware written and tested with version 11 21 | 22 | ``` 23 | unzip nRF5_SDK_11.0.0_89a8197.zip -d nRF5_SDK_11 24 | cd nRF5_SDK_11 25 | ``` 26 | 27 | ## Toolchain set-up 28 | 29 | A cofiguration file that came with the SDK needs to be changed. Assuming you installed gcc-arm with apt, the compiler root path needs to be changed in /components/toolchain/gcc/Makefile.posix, the line: 30 | ``` 31 | GNU_INSTALL_ROOT := /usr/local/gcc-arm-none-eabi-4_9-2015q1 32 | ``` 33 | Replaced with: 34 | ``` 35 | GNU_INSTALL_ROOT := /usr/ 36 | ``` 37 | 38 | ## Clone repository 39 | Inside nRF5_SDK_11/ 40 | ``` 41 | git clone https://github.com/Durburz/interphase-firmware 42 | ``` 43 | 44 | ## Install udev rules 45 | ``` 46 | sudo cp interphase-firmware/49-stlinkv2.rules /etc/udev/rules.d/ 47 | ``` 48 | Plug in, or replug in the programmer after this. 49 | 50 | ## OpenOCD server 51 | The programming header on the side of the keyboard, from top to bottom: 52 | ``` 53 | SWCLK 54 | SWDIO 55 | GND 56 | 3.3V 57 | ``` 58 | It's best to remove the battery during long sessions of debugging, as charging non-rechargeable lithium batteries isn't recommended. 59 | 60 | Launch a debugging session with: 61 | ``` 62 | openocd -f interphase-firmware/nrf-stlink.cfg 63 | ``` 64 | Should give you an output ending in: 65 | ``` 66 | Info : nrf51.cpu: hardware has 4 breakpoints, 2 watchpoints 67 | ``` 68 | Otherwise you likely have a loose or wrong wire. 69 | 70 | 71 | ## Manual programming 72 | From the factory, these chips need to be erased: 73 | ``` 74 | echo reset halt | telnet localhost 4444 75 | echo nrf51 mass_erase | telnet localhost 4444 76 | ``` 77 | From there, the precompiled binaries can be loaded: 78 | ``` 79 | echo reset halt | telnet localhost 4444 80 | echo flash write_image `readlink -f precompiled-basic-left.hex` | telnet localhost 4444 81 | echo reset | telnet localhost 4444 82 | ``` 83 | 84 | ## Automatic make and programming scripts 85 | To use the automatic build scripts: 86 | ``` 87 | cd mitosis/interphase-keyboard-basic 88 | ./program.sh 89 | ``` 90 | An openocd session should be running in another terminal, as this script sends commands to it. 91 | -------------------------------------------------------------------------------- /interphase-keyboard-basic/config/interphase.h: -------------------------------------------------------------------------------- 1 | 2 | #define HAND_SENSE 12 3 | #define RIGHT_HAND false 4 | #define LEFT_HAND true 5 | 6 | #define ALPHA_SENSE 20 7 | #define ALPABETICAL false 8 | 9 | // left hand pins 10 | 11 | #define L_C01 6 12 | #define L_C02 5 13 | #define L_C03 4 14 | #define L_C04 3 15 | #define L_C05 2 16 | #define L_C06 0 17 | #define L_C07 30 18 | #define L_R01 28 19 | #define L_R02 23 20 | #define L_R03 22 21 | #define L_R04 21 22 | #define L_R05 29 23 | 24 | #define L_MASK (1< RAM 20 | } INSERT AFTER .data; 21 | 22 | INCLUDE "nrf5x_common.ld" -------------------------------------------------------------------------------- /interphase-keyboard-basic/main.c: -------------------------------------------------------------------------------- 1 | 2 | #define COMPILE_RIGHT 3 | //#define COMPILE_LEFT 4 | 5 | #include "interphase.h" 6 | #include "nrf_drv_config.h" 7 | #include "nrf_gzll.h" 8 | #include "nrf_gpio.h" 9 | #include "nrf_delay.h" 10 | #include "nrf_drv_clock.h" 11 | #include "nrf_drv_rtc.h" 12 | 13 | 14 | /*****************************************************************************/ 15 | /** Configuration */ 16 | /*****************************************************************************/ 17 | 18 | const nrf_drv_rtc_t rtc_maint = NRF_DRV_RTC_INSTANCE(0); /**< Declaring an instance of nrf_drv_rtc for RTC0. */ 19 | const nrf_drv_rtc_t rtc_deb = NRF_DRV_RTC_INSTANCE(1); /**< Declaring an instance of nrf_drv_rtc for RTC1. */ 20 | 21 | 22 | // Define payload length 23 | #define TX_PAYLOAD_LENGTH ROWS ///< 5 byte payload length when transmitting 24 | 25 | // Data and acknowledgement payloads 26 | static uint8_t data_payload[TX_PAYLOAD_LENGTH]; ///< Payload to send to Host. 27 | static uint8_t ack_payload[NRF_GZLL_CONST_MAX_PAYLOAD_LENGTH]; ///< Placeholder for received ACK payloads from Host. 28 | 29 | // Debounce time (dependent on tick frequency) 30 | #define DEBOUNCE 5 31 | #define ACTIVITY 500 32 | 33 | // Key buffers 34 | static uint8_t keys[ROWS], keys_snapshot[ROWS], keys_buffer[ROWS]; 35 | static uint32_t debounce_ticks, activity_ticks; 36 | static volatile bool debouncing = false; 37 | 38 | // Debug helper variables 39 | static volatile bool init_ok, enable_ok, push_ok, pop_ok, tx_success; 40 | 41 | // Setup switch pins with pullups 42 | static void gpio_config(void) 43 | { 44 | nrf_gpio_cfg_sense_input(C01, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 45 | nrf_gpio_cfg_sense_input(C02, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 46 | nrf_gpio_cfg_sense_input(C03, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 47 | nrf_gpio_cfg_sense_input(C04, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 48 | nrf_gpio_cfg_sense_input(C05, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 49 | nrf_gpio_cfg_sense_input(C06, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 50 | nrf_gpio_cfg_sense_input(C07, NRF_GPIO_PIN_PULLDOWN, NRF_GPIO_PIN_SENSE_HIGH); 51 | 52 | nrf_gpio_cfg_output(R01); 53 | nrf_gpio_cfg_output(R02); 54 | nrf_gpio_cfg_output(R03); 55 | nrf_gpio_cfg_output(R04); 56 | nrf_gpio_cfg_output(R05); 57 | } 58 | 59 | // Return the key states of one row 60 | static uint8_t read_row(uint32_t row) 61 | { 62 | uint8_t buff = 0; 63 | uint32_t input = 0; 64 | nrf_gpio_pin_set(row); 65 | input = NRF_GPIO->IN; 66 | buff = (buff << 1) | ((input >> C01) & 1); 67 | buff = (buff << 1) | ((input >> C02) & 1); 68 | buff = (buff << 1) | ((input >> C03) & 1); 69 | buff = (buff << 1) | ((input >> C04) & 1); 70 | buff = (buff << 1) | ((input >> C05) & 1); 71 | buff = (buff << 1) | ((input >> C06) & 1); 72 | buff = (buff << 1) | ((input >> C07) & 1); 73 | buff = (buff << 1); 74 | nrf_gpio_pin_clear(row); 75 | return buff; 76 | } 77 | 78 | // Return the key states 79 | static void read_keys(void) 80 | { 81 | keys_buffer[0] = read_row(R01); 82 | keys_buffer[1] = read_row(R02); 83 | keys_buffer[2] = read_row(R03); 84 | keys_buffer[3] = read_row(R04); 85 | keys_buffer[4] = read_row(R05); 86 | return; 87 | } 88 | 89 | static bool compare_keys(uint8_t* first, uint8_t* second, uint32_t size) 90 | { 91 | for(int i=0; i < size; i++) 92 | { 93 | if (first[i] != second[i]) 94 | { 95 | return false; 96 | } 97 | } 98 | return true; 99 | } 100 | 101 | static bool empty_keys(void) 102 | { 103 | for(int i=0; i < ROWS; i++) 104 | { 105 | if (keys_buffer[i]) 106 | { 107 | return false; 108 | } 109 | } 110 | return true; 111 | } 112 | 113 | // Assemble packet and send to receiver 114 | static void send_data(void) 115 | { 116 | for(int i=0; i < ROWS; i++) 117 | { 118 | data_payload[i] = keys[i]; 119 | } 120 | nrf_gzll_add_packet_to_tx_fifo(PIPE_NUMBER, data_payload, TX_PAYLOAD_LENGTH); 121 | } 122 | 123 | // 8Hz held key maintenance, keeping the reciever keystates valid 124 | static void handler_maintenance(nrf_drv_rtc_int_type_t int_type) 125 | { 126 | send_data(); 127 | } 128 | 129 | // 1000Hz debounce sampling 130 | static void handler_debounce(nrf_drv_rtc_int_type_t int_type) 131 | { 132 | read_keys(); 133 | 134 | // debouncing, waits until there have been no transitions in 5ms (assuming five 1ms ticks) 135 | if (debouncing) 136 | { 137 | // if debouncing, check if current keystates equal to the snapshot 138 | if (compare_keys(keys_snapshot, keys_buffer, ROWS)) 139 | { 140 | // DEBOUNCE ticks of stable sampling needed before sending data 141 | debounce_ticks++; 142 | if (debounce_ticks == DEBOUNCE) 143 | { 144 | for(int j=0; j < ROWS; j++) 145 | { 146 | keys[j] = keys_snapshot[j]; 147 | } 148 | send_data(); 149 | } 150 | } 151 | else 152 | { 153 | // if keys change, start period again 154 | debouncing = false; 155 | } 156 | } 157 | else 158 | { 159 | // if the keystate is different from the last data 160 | // sent to the receiver, start debouncing 161 | if (!compare_keys(keys, keys_buffer, ROWS)) 162 | { 163 | for(int k=0; k < ROWS; k++) 164 | { 165 | keys_snapshot[k] = keys_buffer[k]; 166 | } 167 | debouncing = true; 168 | debounce_ticks = 0; 169 | } 170 | } 171 | 172 | // looking for 500 ticks of no keys pressed, to go back to deep sleep 173 | if (empty_keys()) 174 | { 175 | activity_ticks++; 176 | if (activity_ticks > ACTIVITY) 177 | { 178 | nrf_drv_rtc_disable(&rtc_maint); 179 | nrf_drv_rtc_disable(&rtc_deb); 180 | nrf_gpio_pin_set(R01); 181 | nrf_gpio_pin_set(R02); 182 | nrf_gpio_pin_set(R03); 183 | nrf_gpio_pin_set(R04); 184 | nrf_gpio_pin_set(R05); 185 | } 186 | 187 | } 188 | else 189 | { 190 | activity_ticks = 0; 191 | } 192 | 193 | } 194 | 195 | // Low frequency clock configuration 196 | static void lfclk_config(void) 197 | { 198 | nrf_drv_clock_init(); 199 | 200 | nrf_drv_clock_lfclk_request(NULL); 201 | } 202 | 203 | // RTC peripheral configuration 204 | static void rtc_config(void) 205 | { 206 | //Initialize RTC instance 207 | nrf_drv_rtc_init(&rtc_maint, NULL, handler_maintenance); 208 | nrf_drv_rtc_init(&rtc_deb, NULL, handler_debounce); 209 | 210 | //Enable tick event & interrupt 211 | nrf_drv_rtc_tick_enable(&rtc_maint,true); 212 | nrf_drv_rtc_tick_enable(&rtc_deb,true); 213 | 214 | //Power on RTC instance 215 | nrf_drv_rtc_enable(&rtc_maint); 216 | nrf_drv_rtc_enable(&rtc_deb); 217 | } 218 | 219 | int main() 220 | { 221 | // Initialize Gazell 222 | nrf_gzll_init(NRF_GZLL_MODE_DEVICE); 223 | 224 | // Attempt sending every packet up to 100 times 225 | nrf_gzll_set_max_tx_attempts(100); 226 | 227 | // Addressing 228 | nrf_gzll_set_base_address_0(0x01020304); 229 | nrf_gzll_set_base_address_1(0x05060708); 230 | 231 | // Enable Gazell to start sending over the air 232 | nrf_gzll_enable(); 233 | 234 | // Configure 32kHz xtal oscillator 235 | lfclk_config(); 236 | 237 | // Configure RTC peripherals with ticks 238 | rtc_config(); 239 | 240 | // Configure all keys as inputs with pullups 241 | gpio_config(); 242 | 243 | // Set the GPIOTE PORT event as interrupt source, and enable interrupts for GPIOTE 244 | NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Msk; 245 | NVIC_EnableIRQ(GPIOTE_IRQn); 246 | 247 | 248 | // Main loop, constantly sleep, waiting for RTC and gpio IRQs 249 | while(1) 250 | { 251 | __SEV(); 252 | __WFE(); 253 | __WFE(); 254 | } 255 | } 256 | 257 | // This handler will be run after wakeup from system ON (GPIO wakeup) 258 | void GPIOTE_IRQHandler(void) 259 | { 260 | if(NRF_GPIOTE->EVENTS_PORT) 261 | { 262 | //clear wakeup event 263 | NRF_GPIOTE->EVENTS_PORT = 0; 264 | 265 | //enable rtc interupt triggers 266 | nrf_drv_rtc_enable(&rtc_maint); 267 | nrf_drv_rtc_enable(&rtc_deb); 268 | 269 | nrf_gpio_pin_clear(R01); 270 | nrf_gpio_pin_clear(R02); 271 | nrf_gpio_pin_clear(R03); 272 | nrf_gpio_pin_clear(R04); 273 | nrf_gpio_pin_clear(R05); 274 | 275 | //TODO: proper interrupt handling to avoid fake interrupts because of matrix scanning 276 | //debouncing = false; 277 | //debounce_ticks = 0; 278 | activity_ticks = 0; 279 | } 280 | } 281 | 282 | 283 | 284 | /*****************************************************************************/ 285 | /** Gazell callback function definitions */ 286 | /*****************************************************************************/ 287 | 288 | void nrf_gzll_device_tx_success(uint32_t pipe, nrf_gzll_device_tx_info_t tx_info) 289 | { 290 | uint32_t ack_payload_length = NRF_GZLL_CONST_MAX_PAYLOAD_LENGTH; 291 | 292 | if (tx_info.payload_received_in_ack) 293 | { 294 | // Pop packet and write first byte of the payload to the GPIO port. 295 | nrf_gzll_fetch_packet_from_rx_fifo(pipe, ack_payload, &ack_payload_length); 296 | } 297 | } 298 | 299 | // no action is taken when a packet fails to send, this might need to change 300 | void nrf_gzll_device_tx_failed(uint32_t pipe, nrf_gzll_device_tx_info_t tx_info) 301 | { 302 | 303 | } 304 | 305 | // Callbacks not needed 306 | void nrf_gzll_host_rx_data_ready(uint32_t pipe, nrf_gzll_host_rx_info_t rx_info) 307 | {} 308 | void nrf_gzll_disabled() 309 | {} 310 | -------------------------------------------------------------------------------- /interphase-keyboard-basic/program.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | echo '=============================== MAKING ================================' 3 | cd custom/armgcc 4 | make 5 | if [[ $? -ne 0 ]] ; then 6 | exit 0 7 | fi 8 | sleep 0.1 9 | HEX=`readlink -f _build/nrf51822_xxac.hex` 10 | du -b $HEX 11 | 12 | echo 13 | echo '============================= PROGRAMMING =============================' 14 | { 15 | echo "reset halt"; 16 | sleep 0.1; 17 | echo "flash write_image erase" $HEX; 18 | sleep 10; 19 | echo "reset"; 20 | sleep 0.1; 21 | exit; 22 | 23 | } | telnet localhost 4444 24 | 25 | echo 26 | echo '============================== FINISHED ===============================' 27 | -------------------------------------------------------------------------------- /interphase-receiver-basic/config/nrf_drv_config.h: -------------------------------------------------------------------------------- 1 | /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved. 2 | * 3 | * The information contained herein is property of Nordic Semiconductor ASA. 4 | * Terms and conditions of usage are described in detail in NORDIC 5 | * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 6 | * 7 | * Licensees are granted free, non-transferable use of the information. NO 8 | * WARRANTY of ANY KIND is provided. This heading must NOT be removed from 9 | * the file. 10 | * 11 | */ 12 | 13 | #ifndef NRF_DRV_CONFIG_H 14 | #define NRF_DRV_CONFIG_H 15 | 16 | /** 17 | * Provide a non-zero value here in applications that need to use several 18 | * peripherals with the same ID that are sharing certain resources 19 | * (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used 20 | * simultaneously. Therefore, this definition allows to initialize the driver 21 | * for another peripheral from a given group only after the previously used one 22 | * is uninitialized. Normally, this is not possible, because interrupt handlers 23 | * are implemented in individual drivers. 24 | * This functionality requires a more complicated interrupt handling and driver 25 | * initialization, hence it is not always desirable to use it. 26 | */ 27 | #define PERIPHERAL_RESOURCE_SHARING_ENABLED 0 28 | 29 | /* CLOCK */ 30 | #define CLOCK_ENABLED 0 31 | 32 | #if (CLOCK_ENABLED == 1) 33 | #define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default 34 | #define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal 35 | #define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 36 | #endif 37 | 38 | /* GPIOTE */ 39 | #define GPIOTE_ENABLED 0 40 | 41 | #if (GPIOTE_ENABLED == 1) 42 | #define GPIOTE_CONFIG_USE_SWI_EGU false 43 | #define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 44 | #define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 45 | #endif 46 | 47 | /* TIMER */ 48 | #define TIMER0_ENABLED 0 49 | 50 | #if (TIMER0_ENABLED == 1) 51 | #define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz 52 | #define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer 53 | #define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit 54 | #define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 55 | 56 | #define TIMER0_INSTANCE_INDEX 0 57 | #endif 58 | 59 | #define TIMER1_ENABLED 0 60 | 61 | #if (TIMER1_ENABLED == 1) 62 | #define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz 63 | #define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer 64 | #define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit 65 | #define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 66 | 67 | #define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED) 68 | #endif 69 | 70 | #define TIMER2_ENABLED 0 71 | 72 | #if (TIMER2_ENABLED == 1) 73 | #define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz 74 | #define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer 75 | #define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit 76 | #define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 77 | 78 | #define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED) 79 | #endif 80 | 81 | #define TIMER3_ENABLED 0 82 | 83 | #if (TIMER3_ENABLED == 1) 84 | #define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz 85 | #define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer 86 | #define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit 87 | #define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 88 | 89 | #define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED) 90 | #endif 91 | 92 | #define TIMER4_ENABLED 0 93 | 94 | #if (TIMER4_ENABLED == 1) 95 | #define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz 96 | #define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer 97 | #define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit 98 | #define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 99 | 100 | #define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED) 101 | #endif 102 | 103 | 104 | #define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED) 105 | 106 | /* RTC */ 107 | #define RTC0_ENABLED 0 108 | 109 | #if (RTC0_ENABLED == 1) 110 | #define RTC0_CONFIG_FREQUENCY 32678 111 | #define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 112 | #define RTC0_CONFIG_RELIABLE false 113 | 114 | #define RTC0_INSTANCE_INDEX 0 115 | #endif 116 | 117 | #define RTC1_ENABLED 0 118 | 119 | #if (RTC1_ENABLED == 1) 120 | #define RTC1_CONFIG_FREQUENCY 32768 121 | #define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 122 | #define RTC1_CONFIG_RELIABLE false 123 | 124 | #define RTC1_INSTANCE_INDEX (RTC0_ENABLED) 125 | #endif 126 | 127 | #define RTC2_ENABLED 0 128 | 129 | #if (RTC2_ENABLED == 1) 130 | #define RTC2_CONFIG_FREQUENCY 32768 131 | #define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 132 | #define RTC2_CONFIG_RELIABLE false 133 | 134 | #define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED) 135 | #endif 136 | 137 | 138 | #define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED) 139 | 140 | #define NRF_MAXIMUM_LATENCY_US 2000 141 | 142 | /* RNG */ 143 | #define RNG_ENABLED 0 144 | 145 | #if (RNG_ENABLED == 1) 146 | #define RNG_CONFIG_ERROR_CORRECTION true 147 | #define RNG_CONFIG_POOL_SIZE 8 148 | #define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 149 | #endif 150 | 151 | /* PWM */ 152 | 153 | #define PWM0_ENABLED 0 154 | 155 | #if (PWM0_ENABLED == 1) 156 | #define PWM0_CONFIG_OUT0_PIN 2 157 | #define PWM0_CONFIG_OUT1_PIN 3 158 | #define PWM0_CONFIG_OUT2_PIN 4 159 | #define PWM0_CONFIG_OUT3_PIN 5 160 | #define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 161 | #define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz 162 | #define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP 163 | #define PWM0_CONFIG_TOP_VALUE 1000 164 | #define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON 165 | #define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO 166 | 167 | #define PWM0_INSTANCE_INDEX 0 168 | #endif 169 | 170 | #define PWM1_ENABLED 0 171 | 172 | #if (PWM1_ENABLED == 1) 173 | #define PWM1_CONFIG_OUT0_PIN 2 174 | #define PWM1_CONFIG_OUT1_PIN 3 175 | #define PWM1_CONFIG_OUT2_PIN 4 176 | #define PWM1_CONFIG_OUT3_PIN 5 177 | #define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 178 | #define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz 179 | #define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP 180 | #define PWM1_CONFIG_TOP_VALUE 1000 181 | #define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON 182 | #define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO 183 | 184 | #define PWM1_INSTANCE_INDEX (PWM0_ENABLED) 185 | #endif 186 | 187 | #define PWM2_ENABLED 0 188 | 189 | #if (PWM2_ENABLED == 1) 190 | #define PWM2_CONFIG_OUT0_PIN 2 191 | #define PWM2_CONFIG_OUT1_PIN 3 192 | #define PWM2_CONFIG_OUT2_PIN 4 193 | #define PWM2_CONFIG_OUT3_PIN 5 194 | #define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 195 | #define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz 196 | #define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP 197 | #define PWM2_CONFIG_TOP_VALUE 1000 198 | #define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON 199 | #define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO 200 | 201 | #define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED) 202 | #endif 203 | 204 | #define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED) 205 | 206 | /* SPI */ 207 | #define SPI0_ENABLED 0 208 | 209 | #if (SPI0_ENABLED == 1) 210 | #define SPI0_USE_EASY_DMA 0 211 | 212 | #define SPI0_CONFIG_SCK_PIN 2 213 | #define SPI0_CONFIG_MOSI_PIN 3 214 | #define SPI0_CONFIG_MISO_PIN 4 215 | #define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 216 | 217 | #define SPI0_INSTANCE_INDEX 0 218 | #endif 219 | 220 | #define SPI1_ENABLED 0 221 | 222 | #if (SPI1_ENABLED == 1) 223 | #define SPI1_USE_EASY_DMA 0 224 | 225 | #define SPI1_CONFIG_SCK_PIN 2 226 | #define SPI1_CONFIG_MOSI_PIN 3 227 | #define SPI1_CONFIG_MISO_PIN 4 228 | #define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 229 | 230 | #define SPI1_INSTANCE_INDEX (SPI0_ENABLED) 231 | #endif 232 | 233 | #define SPI2_ENABLED 0 234 | 235 | #if (SPI2_ENABLED == 1) 236 | #define SPI2_USE_EASY_DMA 0 237 | 238 | #define SPI2_CONFIG_SCK_PIN 2 239 | #define SPI2_CONFIG_MOSI_PIN 3 240 | #define SPI2_CONFIG_MISO_PIN 4 241 | #define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 242 | 243 | #define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED) 244 | #endif 245 | 246 | #define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED) 247 | 248 | /* SPIS */ 249 | #define SPIS0_ENABLED 0 250 | 251 | #if (SPIS0_ENABLED == 1) 252 | #define SPIS0_CONFIG_SCK_PIN 2 253 | #define SPIS0_CONFIG_MOSI_PIN 3 254 | #define SPIS0_CONFIG_MISO_PIN 4 255 | #define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 256 | 257 | #define SPIS0_INSTANCE_INDEX 0 258 | #endif 259 | 260 | #define SPIS1_ENABLED 0 261 | 262 | #if (SPIS1_ENABLED == 1) 263 | #define SPIS1_CONFIG_SCK_PIN 2 264 | #define SPIS1_CONFIG_MOSI_PIN 3 265 | #define SPIS1_CONFIG_MISO_PIN 4 266 | #define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 267 | 268 | #define SPIS1_INSTANCE_INDEX SPIS0_ENABLED 269 | #endif 270 | 271 | #define SPIS2_ENABLED 0 272 | 273 | #if (SPIS2_ENABLED == 1) 274 | #define SPIS2_CONFIG_SCK_PIN 2 275 | #define SPIS2_CONFIG_MOSI_PIN 3 276 | #define SPIS2_CONFIG_MISO_PIN 4 277 | #define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 278 | 279 | #define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED) 280 | #endif 281 | 282 | #define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED) 283 | 284 | /* UART */ 285 | #define UART0_ENABLED 1 286 | 287 | #if (UART0_ENABLED == 1) 288 | #define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED 289 | #define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED 290 | #define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_115200 291 | #define UART0_CONFIG_PSEL_TXD 9 292 | #define UART0_CONFIG_PSEL_RXD 11 293 | #define UART0_CONFIG_PSEL_CTS 10 294 | #define UART0_CONFIG_PSEL_RTS 8 295 | #define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 296 | #ifdef NRF52 297 | #define UART0_CONFIG_USE_EASY_DMA false 298 | //Compile time flag 299 | #define UART_EASY_DMA_SUPPORT 1 300 | #define UART_LEGACY_SUPPORT 1 301 | #endif //NRF52 302 | #endif 303 | 304 | #define TWI0_ENABLED 0 305 | 306 | #if (TWI0_ENABLED == 1) 307 | #define TWI0_USE_EASY_DMA 0 308 | 309 | #define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K 310 | #define TWI0_CONFIG_SCL 0 311 | #define TWI0_CONFIG_SDA 1 312 | #define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 313 | 314 | #define TWI0_INSTANCE_INDEX 0 315 | #endif 316 | 317 | #define TWI1_ENABLED 0 318 | 319 | #if (TWI1_ENABLED == 1) 320 | #define TWI1_USE_EASY_DMA 0 321 | 322 | #define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K 323 | #define TWI1_CONFIG_SCL 0 324 | #define TWI1_CONFIG_SDA 1 325 | #define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 326 | 327 | #define TWI1_INSTANCE_INDEX (TWI0_ENABLED) 328 | #endif 329 | 330 | #define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED) 331 | 332 | /* TWIS */ 333 | #define TWIS0_ENABLED 0 334 | 335 | #if (TWIS0_ENABLED == 1) 336 | #define TWIS0_CONFIG_ADDR0 0 337 | #define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */ 338 | #define TWIS0_CONFIG_SCL 0 339 | #define TWIS0_CONFIG_SDA 1 340 | #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 341 | 342 | #define TWIS0_INSTANCE_INDEX 0 343 | #endif 344 | 345 | #define TWIS1_ENABLED 0 346 | 347 | #if (TWIS1_ENABLED == 1) 348 | #define TWIS1_CONFIG_ADDR0 0 349 | #define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */ 350 | #define TWIS1_CONFIG_SCL 0 351 | #define TWIS1_CONFIG_SDA 1 352 | #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 353 | 354 | #define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED) 355 | #endif 356 | 357 | #define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED) 358 | /* For more documentation see nrf_drv_twis.h file */ 359 | #define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 360 | /* For more documentation see nrf_drv_twis.h file */ 361 | #define TWIS_NO_SYNC_MODE 0 362 | 363 | /* QDEC */ 364 | #define QDEC_ENABLED 0 365 | 366 | #if (QDEC_ENABLED == 1) 367 | #define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10 368 | #define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us 369 | #define QDEC_CONFIG_PIO_A 1 370 | #define QDEC_CONFIG_PIO_B 2 371 | #define QDEC_CONFIG_PIO_LED 3 372 | #define QDEC_CONFIG_LEDPRE 511 373 | #define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH 374 | #define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 375 | #define QDEC_CONFIG_DBFEN false 376 | #define QDEC_CONFIG_SAMPLE_INTEN false 377 | #endif 378 | 379 | /* ADC */ 380 | #define ADC_ENABLED 0 381 | 382 | #if (ADC_ENABLED == 1) 383 | #define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 384 | #endif 385 | 386 | 387 | /* SAADC */ 388 | #define SAADC_ENABLED 0 389 | 390 | #if (SAADC_ENABLED == 1) 391 | #define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT 392 | #define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED 393 | #define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 394 | #endif 395 | 396 | /* PDM */ 397 | #define PDM_ENABLED 0 398 | 399 | #if (PDM_ENABLED == 1) 400 | #define PDM_CONFIG_MODE NRF_PDM_MODE_MONO 401 | #define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING 402 | #define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K 403 | #define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 404 | #endif 405 | 406 | /* COMP */ 407 | #define COMP_ENABLED 0 408 | 409 | #if (COMP_ENABLED == 1) 410 | #define COMP_CONFIG_REF NRF_COMP_REF_Int1V8 411 | #define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE 412 | #define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High 413 | #define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst 414 | #define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off 415 | #define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 416 | #define COMP_CONFIG_INPUT NRF_COMP_INPUT_0 417 | #endif 418 | 419 | /* LPCOMP */ 420 | #define LPCOMP_ENABLED 0 421 | 422 | #if (LPCOMP_ENABLED == 1) 423 | #define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8 424 | #define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN 425 | #define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW 426 | #define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0 427 | #endif 428 | 429 | /* WDT */ 430 | #define WDT_ENABLED 0 431 | 432 | #if (WDT_ENABLED == 1) 433 | #define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP 434 | #define WDT_CONFIG_RELOAD_VALUE 2000 435 | #define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH 436 | #endif 437 | 438 | /* SWI EGU */ 439 | #ifdef NRF52 440 | #define EGU_ENABLED 0 441 | #endif 442 | 443 | /* I2S */ 444 | #define I2S_ENABLED 0 445 | 446 | #if (I2S_ENABLED == 1) 447 | #define I2S_CONFIG_SCK_PIN 22 448 | #define I2S_CONFIG_LRCK_PIN 23 449 | #define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED 450 | #define I2S_CONFIG_SDOUT_PIN 24 451 | #define I2S_CONFIG_SDIN_PIN 25 452 | #define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH 453 | #define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER 454 | #define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S 455 | #define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT 456 | #define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT 457 | #define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO 458 | #define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8 459 | #define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X 460 | #endif 461 | 462 | #include "nrf_drv_config_validation.h" 463 | 464 | #endif // NRF_DRV_CONFIG_H 465 | -------------------------------------------------------------------------------- /interphase-receiver-basic/custom/armgcc/Makefile: -------------------------------------------------------------------------------- 1 | PROJECT_NAME := interphase-receiver-basic 2 | 3 | export OUTPUT_FILENAME 4 | #MAKEFILE_NAME := $(CURDIR)/$(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST)) 5 | MAKEFILE_NAME := $(MAKEFILE_LIST) 6 | MAKEFILE_DIR := $(dir $(MAKEFILE_NAME) ) 7 | 8 | TEMPLATE_PATH = ../../../../components/toolchain/gcc 9 | ifeq ($(OS),Windows_NT) 10 | include $(TEMPLATE_PATH)/Makefile.windows 11 | else 12 | include $(TEMPLATE_PATH)/Makefile.posix 13 | endif 14 | 15 | MK := mkdir 16 | RM := rm -rf 17 | 18 | #echo suspend 19 | ifeq ("$(VERBOSE)","1") 20 | NO_ECHO := 21 | else 22 | NO_ECHO := @ 23 | endif 24 | 25 | # Toolchain commands 26 | CC := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-gcc' 27 | AS := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-as' 28 | AR := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ar' -r 29 | LD := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ld' 30 | NM := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-nm' 31 | OBJDUMP := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objdump' 32 | OBJCOPY := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objcopy' 33 | SIZE := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-size' 34 | 35 | #function for removing duplicates in a list 36 | remduplicates = $(strip $(if $1,$(firstword $1) $(call remduplicates,$(filter-out $(firstword $1),$1)))) 37 | 38 | #source common to all targets 39 | C_SOURCE_FILES += \ 40 | $(abspath ../../../../components/toolchain/system_nrf51.c) \ 41 | $(abspath ../../main.c) \ 42 | $(abspath ../../../../components/libraries/util/app_error.c) \ 43 | $(abspath ../../../../components/libraries/util/app_error_weak.c) \ 44 | $(abspath ../../../../components/libraries/fifo/app_fifo.c) \ 45 | $(abspath ../../../../components/libraries/util/app_util_platform.c) \ 46 | $(abspath ../../../../components/libraries/util/nrf_assert.c) \ 47 | $(abspath ../../../../components/libraries/uart/retarget.c) \ 48 | $(abspath ../../../../components/libraries/uart/app_uart_fifo.c) \ 49 | $(abspath ../../../../components/drivers_nrf/delay/nrf_delay.c) \ 50 | $(abspath ../../../../components/drivers_nrf/common/nrf_drv_common.c) \ 51 | $(abspath ../../../../components/drivers_nrf/uart/nrf_drv_uart.c) \ 52 | 53 | #assembly files common to all targets 54 | ASM_SOURCE_FILES = $(abspath ../../../../components/toolchain/gcc/gcc_startup_nrf51.s) 55 | 56 | #assembly files common to all targets 57 | LIBS = $(abspath ../../../../components/properitary_rf/gzll/gcc/gzll_gcc.a) 58 | 59 | 60 | #includes common to all targets 61 | INC_PATHS += -I$(abspath ../../config) 62 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/nrf_soc_nosd) 63 | INC_PATHS += -I$(abspath ../../../../components/device) 64 | INC_PATHS += -I$(abspath ../../../../components/libraries/uart) 65 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/hal) 66 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/delay) 67 | INC_PATHS += -I$(abspath ../../../../components/toolchain/CMSIS/Include) 68 | INC_PATHS += -I$(abspath ../..) 69 | INC_PATHS += -I$(abspath ../../../../components/libraries/util) 70 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/uart) 71 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/common) 72 | INC_PATHS += -I$(abspath ../../../../components/toolchain) 73 | INC_PATHS += -I$(abspath ../../../../components/drivers_nrf/config) 74 | INC_PATHS += -I$(abspath ../../../../components/libraries/fifo) 75 | INC_PATHS += -I$(abspath ../../../../components/toolchain/gcc) 76 | INC_PATHS += -I$(abspath ../../../../components/properitary_rf/gzll) 77 | 78 | OBJECT_DIRECTORY = _build 79 | LISTING_DIRECTORY = $(OBJECT_DIRECTORY) 80 | OUTPUT_BINARY_DIRECTORY = $(OBJECT_DIRECTORY) 81 | 82 | # Sorting removes duplicates 83 | BUILD_DIRECTORIES := $(sort $(OBJECT_DIRECTORY) $(OUTPUT_BINARY_DIRECTORY) $(LISTING_DIRECTORY) ) 84 | 85 | #flags common to all targets 86 | CFLAGS = -DNRF51 87 | CFLAGS += -DGAZELL_PRESENT 88 | CFLAGS += -DBOARD_CUSTOM 89 | CFLAGS += -DBSP_DEFINES_ONLY 90 | CFLAGS += -mcpu=cortex-m0 91 | CFLAGS += -mthumb -mabi=aapcs --std=gnu99 92 | CFLAGS += -Wall -Werror -O3 -g3 93 | CFLAGS += -Wno-unused-function 94 | CFLAGS += -Wno-unused-variable 95 | CFLAGS += -mfloat-abi=soft 96 | # keep every function in separate section. This will allow linker to dump unused functions 97 | CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing 98 | CFLAGS += -fno-builtin --short-enums 99 | # keep every function in separate section. This will allow linker to dump unused functions 100 | LDFLAGS += -Xlinker -Map=$(LISTING_DIRECTORY)/$(OUTPUT_FILENAME).map 101 | LDFLAGS += -mthumb -mabi=aapcs -L $(TEMPLATE_PATH) -T$(LINKER_SCRIPT) 102 | LDFLAGS += -mcpu=cortex-m0 103 | # let linker to dump unused sections 104 | LDFLAGS += -Wl,--gc-sections 105 | # use newlib in nano version 106 | LDFLAGS += --specs=nano.specs -lc -lnosys 107 | #suppress wchar errors 108 | LDFLAGS += -Wl,--no-wchar-size-warning 109 | 110 | # Assembler flags 111 | ASMFLAGS += -x assembler-with-cpp 112 | ASMFLAGS += -DNRF51 113 | ASMFLAGS += -DBOARD_CUSTOM 114 | ASMFLAGS += -DBSP_DEFINES_ONLY 115 | 116 | #default target - first one defined 117 | default: clean nrf51822_xxac 118 | 119 | #building all targets 120 | all: clean 121 | $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e cleanobj 122 | $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e nrf51822_xxac 123 | 124 | #target for printing all targets 125 | help: 126 | @echo following targets are available: 127 | @echo nrf51822_xxac 128 | 129 | C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES)) 130 | C_PATHS = $(call remduplicates, $(dir $(C_SOURCE_FILES) ) ) 131 | C_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(C_SOURCE_FILE_NAMES:.c=.o) ) 132 | 133 | ASM_SOURCE_FILE_NAMES = $(notdir $(ASM_SOURCE_FILES)) 134 | ASM_PATHS = $(call remduplicates, $(dir $(ASM_SOURCE_FILES) )) 135 | ASM_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(ASM_SOURCE_FILE_NAMES:.s=.o) ) 136 | 137 | vpath %.c $(C_PATHS) 138 | vpath %.s $(ASM_PATHS) 139 | 140 | OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS) 141 | 142 | nrf51822_xxac: OUTPUT_FILENAME := nrf51822_xxac 143 | nrf51822_xxac: LINKER_SCRIPT=uart_gcc_nrf51.ld 144 | 145 | nrf51822_xxac: $(BUILD_DIRECTORIES) $(OBJECTS) 146 | @echo Linking target: $(OUTPUT_FILENAME).out 147 | $(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out 148 | $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize 149 | 150 | ## Create build directories 151 | $(BUILD_DIRECTORIES): 152 | echo $(MAKEFILE_NAME) 153 | $(MK) $@ 154 | 155 | # Create objects from C SRC files 156 | $(OBJECT_DIRECTORY)/%.o: %.c 157 | @echo Compiling file: $(notdir $<) 158 | $(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $@ $< 159 | 160 | # Assemble files 161 | $(OBJECT_DIRECTORY)/%.o: %.s 162 | @echo Assembly file: $(notdir $<) 163 | $(NO_ECHO)$(CC) $(ASMFLAGS) $(INC_PATHS) -c -o $@ $< 164 | # Link 165 | $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out: $(BUILD_DIRECTORIES) $(OBJECTS) 166 | @echo Linking target: $(OUTPUT_FILENAME).out 167 | $(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out 168 | ## Create binary .bin file from the .out file 169 | $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out 170 | @echo Preparing: $(OUTPUT_FILENAME).bin 171 | $(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin 172 | 173 | ## Create binary .hex file from the .out file 174 | $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out 175 | @echo Preparing: $(OUTPUT_FILENAME).hex 176 | $(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex 177 | 178 | finalize: genbin genhex echosize 179 | 180 | genbin: 181 | @echo Preparing: $(OUTPUT_FILENAME).bin 182 | $(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin 183 | 184 | ## Create binary .hex file from the .out file 185 | genhex: 186 | @echo Preparing: $(OUTPUT_FILENAME).hex 187 | $(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex 188 | echosize: 189 | -@echo '' 190 | $(NO_ECHO)$(SIZE) $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out 191 | -@echo '' 192 | 193 | clean: 194 | $(RM) $(BUILD_DIRECTORIES) 195 | 196 | cleanobj: 197 | $(RM) $(BUILD_DIRECTORIES)/*.o 198 | flash: nrf51822_xxac 199 | @echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$<.hex 200 | nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$<.hex -f nrf51 --chiperase 201 | nrfjprog --reset -f nrf51 202 | 203 | ## Flash softdevice 204 | -------------------------------------------------------------------------------- /interphase-receiver-basic/custom/armgcc/uart_gcc_nrf51.ld: -------------------------------------------------------------------------------- 1 | /* Linker script to configure memory regions. */ 2 | 3 | SEARCH_DIR(.) 4 | GROUP(-lgcc -lc -lnosys) 5 | 6 | MEMORY 7 | { 8 | FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x40000 9 | RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x4000 10 | } 11 | 12 | SECTIONS 13 | { 14 | .fs_data : 15 | { 16 | PROVIDE(__start_fs_data = .); 17 | KEEP(*(.fs_data)) 18 | PROVIDE(__stop_fs_data = .); 19 | } > RAM 20 | } INSERT AFTER .data; 21 | 22 | INCLUDE "nrf5x_common.ld" -------------------------------------------------------------------------------- /interphase-receiver-basic/main.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | #include 4 | #include 5 | #include "app_uart.h" 6 | #include "nrf_drv_uart.h" 7 | #include "app_error.h" 8 | #include "nrf_delay.h" 9 | #include "nrf.h" 10 | #include "nrf_gzll.h" 11 | 12 | #define MAX_TEST_DATA_BYTES (15U) /**< max number of test bytes to be used for tx and rx. */ 13 | #define UART_TX_BUF_SIZE 256 /**< UART TX buffer size. */ 14 | #define UART_RX_BUF_SIZE 1 /**< UART RX buffer size. */ 15 | 16 | 17 | #define RX_PIN_NUMBER 25 18 | #define TX_PIN_NUMBER 24 19 | #define CTS_PIN_NUMBER 23 20 | #define RTS_PIN_NUMBER 22 21 | #define HWFC false 22 | 23 | 24 | // Define payload length 25 | #define TX_PAYLOAD_LENGTH 5 ///< 5 byte payload length 26 | 27 | // ticks for inactive keyboard 28 | #define INACTIVE 100000 29 | 30 | // Binary printing 31 | #define BYTE_TO_BINARY_PATTERN "%c%c%c%c%c%c%c%c" 32 | #define BYTE_TO_BINARY(byte) \ 33 | (byte & 0x80 ? '#' : '.'), \ 34 | (byte & 0x40 ? '#' : '.'), \ 35 | (byte & 0x20 ? '#' : '.'), \ 36 | (byte & 0x10 ? '#' : '.'), \ 37 | (byte & 0x08 ? '#' : '.'), \ 38 | (byte & 0x04 ? '#' : '.'), \ 39 | (byte & 0x02 ? '#' : '.'), \ 40 | (byte & 0x01 ? '#' : '.') 41 | 42 | 43 | // Data and acknowledgement payloads 44 | static uint8_t data_payload_left[NRF_GZLL_CONST_MAX_PAYLOAD_LENGTH]; ///< Placeholder for data payload received from host. 45 | static uint8_t data_payload_right[NRF_GZLL_CONST_MAX_PAYLOAD_LENGTH]; ///< Placeholder for data payload received from host. 46 | static uint8_t ack_payload[TX_PAYLOAD_LENGTH]; ///< Payload to attach to ACK sent to device. 47 | static uint8_t data_buffer[10]; 48 | 49 | // Debug helper variables 50 | extern nrf_gzll_error_code_t nrf_gzll_error_code; ///< Error code 51 | static bool init_ok, enable_ok, push_ok, pop_ok, packet_received_left, packet_received_right; 52 | uint32_t left_active = 0; 53 | uint32_t right_active = 0; 54 | uint8_t c; 55 | 56 | 57 | void uart_error_handle(app_uart_evt_t * p_event) 58 | { 59 | if (p_event->evt_type == APP_UART_COMMUNICATION_ERROR) 60 | { 61 | APP_ERROR_HANDLER(p_event->data.error_communication); 62 | } 63 | else if (p_event->evt_type == APP_UART_FIFO_ERROR) 64 | { 65 | APP_ERROR_HANDLER(p_event->data.error_code); 66 | } 67 | } 68 | 69 | 70 | int main(void) 71 | { 72 | uint32_t err_code; 73 | const app_uart_comm_params_t comm_params = 74 | { 75 | RX_PIN_NUMBER, 76 | TX_PIN_NUMBER, 77 | RTS_PIN_NUMBER, 78 | CTS_PIN_NUMBER, 79 | APP_UART_FLOW_CONTROL_DISABLED, 80 | false, 81 | UART_BAUDRATE_BAUDRATE_Baud1M 82 | }; 83 | 84 | APP_UART_FIFO_INIT(&comm_params, 85 | UART_RX_BUF_SIZE, 86 | UART_TX_BUF_SIZE, 87 | uart_error_handle, 88 | APP_IRQ_PRIORITY_LOW, 89 | err_code); 90 | 91 | APP_ERROR_CHECK(err_code); 92 | 93 | // Initialize Gazell 94 | nrf_gzll_init(NRF_GZLL_MODE_HOST); 95 | 96 | // Addressing 97 | nrf_gzll_set_base_address_0(0x01020304); 98 | nrf_gzll_set_base_address_1(0x05060708); 99 | 100 | // Load data into TX queue 101 | ack_payload[0] = 0x55; 102 | nrf_gzll_add_packet_to_tx_fifo(0, data_payload_left, TX_PAYLOAD_LENGTH); 103 | nrf_gzll_add_packet_to_tx_fifo(1, data_payload_left, TX_PAYLOAD_LENGTH); 104 | 105 | // Enable Gazell to start sending over the air 106 | nrf_gzll_enable(); 107 | 108 | // main loop 109 | while (true) 110 | { 111 | // detecting received packet from interupt, and unpacking 112 | if (packet_received_left) 113 | { 114 | packet_received_left = false; 115 | 116 | data_buffer[0] = ((data_payload_left[0] & 1<<7) ? 1:0) << 0 | 117 | ((data_payload_left[0] & 1<<6) ? 1:0) << 1 | 118 | ((data_payload_left[0] & 1<<5) ? 1:0) << 2 | 119 | ((data_payload_left[0] & 1<<4) ? 1:0) << 3 | 120 | ((data_payload_left[0] & 1<<3) ? 1:0) << 4 | 121 | ((data_payload_left[0] & 1<<2) ? 1:0) << 5 | 122 | ((data_payload_left[0] & 1<<1) ? 1:0) << 6; 123 | 124 | data_buffer[2] = ((data_payload_left[1] & 1<<7) ? 1:0) << 0 | 125 | ((data_payload_left[1] & 1<<6) ? 1:0) << 1 | 126 | ((data_payload_left[1] & 1<<5) ? 1:0) << 2 | 127 | ((data_payload_left[1] & 1<<4) ? 1:0) << 3 | 128 | ((data_payload_left[1] & 1<<3) ? 1:0) << 4 | 129 | ((data_payload_left[1] & 1<<2) ? 1:0) << 5 | 130 | ((data_payload_left[1] & 1<<1) ? 1:0) << 6; 131 | 132 | data_buffer[4] = ((data_payload_left[2] & 1<<7) ? 1:0) << 0 | 133 | ((data_payload_left[2] & 1<<6) ? 1:0) << 1 | 134 | ((data_payload_left[2] & 1<<5) ? 1:0) << 2 | 135 | ((data_payload_left[2] & 1<<4) ? 1:0) << 3 | 136 | ((data_payload_left[2] & 1<<3) ? 1:0) << 4 | 137 | ((data_payload_left[2] & 1<<2) ? 1:0) << 5 | 138 | ((data_payload_left[2] & 1<<1) ? 1:0) << 6; 139 | 140 | data_buffer[6] = ((data_payload_left[3] & 1<<7) ? 1:0) << 0 | 141 | ((data_payload_left[3] & 1<<6) ? 1:0) << 1 | 142 | ((data_payload_left[3] & 1<<5) ? 1:0) << 2 | 143 | ((data_payload_left[3] & 1<<4) ? 1:0) << 3 | 144 | ((data_payload_left[3] & 1<<3) ? 1:0) << 4 | 145 | ((data_payload_left[3] & 1<<2) ? 1:0) << 5 | 146 | ((data_payload_left[3] & 1<<1) ? 1:0) << 6; 147 | 148 | data_buffer[8] = ((data_payload_left[4] & 1<<7) ? 1:0) << 0 | 149 | ((data_payload_left[4] & 1<<6) ? 1:0) << 1 | 150 | ((data_payload_left[4] & 1<<5) ? 1:0) << 2 | 151 | ((data_payload_left[4] & 1<<4) ? 1:0) << 3 | 152 | ((data_payload_left[4] & 1<<3) ? 1:0) << 4 | 153 | ((data_payload_left[4] & 1<<2) ? 1:0) << 5 | 154 | ((data_payload_left[4] & 1<<1) ? 1:0) << 6; 155 | 156 | } 157 | 158 | if (packet_received_right) 159 | { 160 | packet_received_right = false; 161 | 162 | data_buffer[1] = ((data_payload_right[0] & 1<<7) ? 1:0) << 0 | 163 | ((data_payload_right[0] & 1<<6) ? 1:0) << 1 | 164 | ((data_payload_right[0] & 1<<5) ? 1:0) << 2 | 165 | ((data_payload_right[0] & 1<<4) ? 1:0) << 3 | 166 | ((data_payload_right[0] & 1<<3) ? 1:0) << 4 | 167 | ((data_payload_right[0] & 1<<2) ? 1:0) << 5 | 168 | ((data_payload_right[0] & 1<<1) ? 1:0) << 6; 169 | 170 | data_buffer[3] = ((data_payload_right[1] & 1<<7) ? 1:0) << 0 | 171 | ((data_payload_right[1] & 1<<6) ? 1:0) << 1 | 172 | ((data_payload_right[1] & 1<<5) ? 1:0) << 2 | 173 | ((data_payload_right[1] & 1<<4) ? 1:0) << 3 | 174 | ((data_payload_right[1] & 1<<3) ? 1:0) << 4 | 175 | ((data_payload_right[1] & 1<<2) ? 1:0) << 5 | 176 | ((data_payload_right[1] & 1<<1) ? 1:0) << 6; 177 | 178 | data_buffer[5] = ((data_payload_right[2] & 1<<7) ? 1:0) << 0 | 179 | ((data_payload_right[2] & 1<<6) ? 1:0) << 1 | 180 | ((data_payload_right[2] & 1<<5) ? 1:0) << 2 | 181 | ((data_payload_right[2] & 1<<4) ? 1:0) << 3 | 182 | ((data_payload_right[2] & 1<<3) ? 1:0) << 4 | 183 | ((data_payload_right[2] & 1<<2) ? 1:0) << 5 | 184 | ((data_payload_right[2] & 1<<1) ? 1:0) << 6; 185 | 186 | data_buffer[7] = ((data_payload_right[3] & 1<<7) ? 1:0) << 0 | 187 | ((data_payload_right[3] & 1<<6) ? 1:0) << 1 | 188 | ((data_payload_right[3] & 1<<5) ? 1:0) << 2 | 189 | ((data_payload_right[3] & 1<<4) ? 1:0) << 3 | 190 | ((data_payload_right[3] & 1<<3) ? 1:0) << 4 | 191 | ((data_payload_right[3] & 1<<2) ? 1:0) << 5 | 192 | ((data_payload_right[3] & 1<<1) ? 1:0) << 6; 193 | 194 | data_buffer[9] = ((data_payload_right[4] & 1<<7) ? 1:0) << 0 | 195 | ((data_payload_right[4] & 1<<6) ? 1:0) << 1 | 196 | ((data_payload_right[4] & 1<<5) ? 1:0) << 2 | 197 | ((data_payload_right[4] & 1<<4) ? 1:0) << 3 | 198 | ((data_payload_right[4] & 1<<3) ? 1:0) << 4 | 199 | ((data_payload_right[4] & 1<<2) ? 1:0) << 5 | 200 | ((data_payload_right[4] & 1<<1) ? 1:0) << 6; 201 | } 202 | 203 | // checking for a poll request from QMK 204 | if (app_uart_get(&c) == NRF_SUCCESS && c == 's') 205 | { 206 | // sending data to QMK, and an end byte 207 | nrf_drv_uart_tx(data_buffer,10); 208 | app_uart_put(0xE0); 209 | 210 | // debugging help, for printing keystates to a serial console 211 | /* 212 | for (uint8_t i = 0; i < 10; i++) 213 | { 214 | app_uart_put(data_buffer[i]); 215 | } 216 | printf(BYTE_TO_BINARY_PATTERN " " \ 217 | BYTE_TO_BINARY_PATTERN " " \ 218 | BYTE_TO_BINARY_PATTERN " " \ 219 | BYTE_TO_BINARY_PATTERN " " \ 220 | BYTE_TO_BINARY_PATTERN "\r\n", \ 221 | BYTE_TO_BINARY(data_payload_left[0]), \ 222 | BYTE_TO_BINARY(data_payload_left[1]), \ 223 | BYTE_TO_BINARY(data_payload_left[2]), \ 224 | BYTE_TO_BINARY(data_payload_left[3]), \ 225 | BYTE_TO_BINARY(data_payload_left[4])); 226 | nrf_delay_us(100); 227 | */ 228 | } 229 | // allowing UART buffers to clear 230 | nrf_delay_us(10); 231 | 232 | // if no packets recieved from keyboards in a few seconds, assume either 233 | // out of range, or sleeping due to no keys pressed, update keystates to off 234 | left_active++; 235 | right_active++; 236 | if (left_active > INACTIVE) 237 | { 238 | data_buffer[0] = 0; 239 | data_buffer[2] = 0; 240 | data_buffer[4] = 0; 241 | data_buffer[6] = 0; 242 | data_buffer[8] = 0; 243 | left_active = 0; 244 | } 245 | if (right_active > INACTIVE) 246 | { 247 | data_buffer[1] = 0; 248 | data_buffer[3] = 0; 249 | data_buffer[5] = 0; 250 | data_buffer[7] = 0; 251 | data_buffer[9] = 0; 252 | right_active = 0; 253 | } 254 | } 255 | } 256 | 257 | 258 | // Callbacks not needed in this example. 259 | void nrf_gzll_device_tx_success(uint32_t pipe, nrf_gzll_device_tx_info_t tx_info) {} 260 | void nrf_gzll_device_tx_failed(uint32_t pipe, nrf_gzll_device_tx_info_t tx_info) {} 261 | void nrf_gzll_disabled() {} 262 | 263 | // If a data packet was received, identify half, and throw flag 264 | void nrf_gzll_host_rx_data_ready(uint32_t pipe, nrf_gzll_host_rx_info_t rx_info) 265 | { 266 | uint32_t data_payload_length = NRF_GZLL_CONST_MAX_PAYLOAD_LENGTH; 267 | 268 | if (pipe == 0) 269 | { 270 | packet_received_left = true; 271 | left_active = 0; 272 | // Pop packet and write first byte of the payload to the GPIO port. 273 | nrf_gzll_fetch_packet_from_rx_fifo(pipe, data_payload_left, &data_payload_length); 274 | } 275 | else if (pipe == 1) 276 | { 277 | packet_received_right = true; 278 | right_active = 0; 279 | // Pop packet and write first byte of the payload to the GPIO port. 280 | nrf_gzll_fetch_packet_from_rx_fifo(pipe, data_payload_right, &data_payload_length); 281 | } 282 | 283 | // not sure if required, I guess if enough packets are missed during blocking uart 284 | nrf_gzll_flush_rx_fifo(pipe); 285 | 286 | //load ACK payload into TX queue 287 | ack_payload[0] = 0x55; 288 | nrf_gzll_add_packet_to_tx_fifo(pipe, ack_payload, TX_PAYLOAD_LENGTH); 289 | } 290 | -------------------------------------------------------------------------------- /interphase-receiver-basic/program.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | echo '=============================== MAKING ================================' 3 | cd custom/armgcc 4 | make 5 | if [[ $? -ne 0 ]] ; then 6 | exit 0 7 | fi 8 | sleep 0.1 9 | HEX=`readlink -f _build/nrf51822_xxac.hex` 10 | du -b $HEX 11 | 12 | echo 13 | echo '============================= PROGRAMMING =============================' 14 | { 15 | echo "reset halt"; 16 | sleep 0.1; 17 | echo "flash write_image erase" $HEX; 18 | sleep 11; 19 | echo "reset"; 20 | sleep 0.1; 21 | exit; 22 | 23 | } | telnet localhost 4444 24 | 25 | echo 26 | echo '============================== FINISHED ===============================' 27 | -------------------------------------------------------------------------------- /nrf-stlink.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2.cfg] 2 | transport select hla_swd 3 | 4 | set WORKAREASIZE 0x0 5 | source [find target/nrf51.cfg] 6 | -------------------------------------------------------------------------------- /precompiled/precompiled-basic-left.hex: -------------------------------------------------------------------------------- 1 | :1000000000400020E10C0000210D0000230D000045 2 | :1000100000000000000000000000000000000000E0 3 | :10002000000000000000000000000000250D00009E 4 | :100030000000000000000000270D0000290D000056 5 | :10004000E5090000812A00002B0D00002B0D0000A7 6 | :100050002B0D000000000000BD0800002B0D00006B 7 | :100060002B0D00002B0D00000D3A0000A90B000025 8 | :100070002B0D00002B0D00002B0D00002B0D0000A0 9 | :100080002B0D0000450C00002B0D00002B0D000077 10 | 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