├── docs
└── imgs
│ ├── .persistent
│ ├── import1.jpg
│ ├── import2.jpg
│ ├── import3.jpg
│ ├── import4.jpg
│ ├── import5.jpg
│ ├── import6.jpg
│ ├── import7.jpg
│ ├── mobilenets-stm32h7.png
│ └── profiling_160_0_25.png
├── .gitignore
├── Src
├── syscalls.c
├── stm32h7xx_hal_msp.c
└── stm32h7xx_it.c
├── .gitmodules
├── Drivers
├── Device
│ └── ST
│ │ └── STM32H7xx
│ │ └── Include
│ │ ├── stm32h7xx.h
│ │ └── system_stm32h7xx.h
└── STM32H7xx_HAL_Driver
│ ├── Inc
│ ├── stm32h7xx_hal_hsem.h
│ ├── stm32h7xx_hal_def.h
│ ├── stm32h7xx_hal_i2c_ex.h
│ ├── stm32h7xx_hal_gpio.h
│ ├── stm32h7xx_hal_dma_ex.h
│ ├── stm32h7xx_hal_pwr.h
│ ├── stm32h7xx_hal_gpio_ex.h
│ └── stm32h7xx_hal_cortex.h
│ └── Src
│ ├── stm32h7xx_hal_i2c_ex.c
│ └── stm32h7xx_hal_hsem.c
├── Inc
├── intq-mobilenet-v1.h
├── stm32h7xx_it.h
├── main.h
├── intq-mobilenet-v1-models
│ └── 160_0_25_parameters.h
└── stm32h7xx_hal_conf.h
├── .project
├── README.md
├── STM32H743ZITx_FLASH.ld
├── .mxproject
├── intq-mobilenet-v1.ioc
└── LICENSE
/docs/imgs/.persistent:
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1 |
2 |
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1 | .settings/*
2 | /Debug/
3 | /Release/
4 | NUCLEO-H743ZI.xml
5 | *.cfg
6 |
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/.gitmodules:
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1 | [submodule "Drivers/CMSIS"]
2 | path = Drivers/CMSIS
3 | url = https://github.com/EEESlab/CMSIS_NN-INTQ.git
4 |
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/Inc/intq-mobilenet-v1.h:
--------------------------------------------------------------------------------
1 | /*
2 | * intq-mobile_net.h
3 | *
4 | * Created on: Feb 7, 2019
5 | * Author: Alessandro Capotondi
6 | */
7 |
8 | #ifndef __INQ_MOBILE_NET_V1_MODELS_H__
9 | #define __INQ_MOBILE_NET_V1_MODELS_H__
10 |
11 | #include "intq-mobilenet-v1-models/160_0_25_parameters.h"
12 | #include "intq-mobilenet-v1-models/160_0_25_weights_bias.h"
13 |
14 | #endif /* MOBILE_NET_V1_MODELS_INTQ_MOBILE_NET_H_ */
15 |
16 |
--------------------------------------------------------------------------------
/.project:
--------------------------------------------------------------------------------
1 |
2 |
3 | intq-mobilenet-v1
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 |
14 |
15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
16 | full,incremental,
17 |
18 |
19 |
20 |
21 |
22 | org.eclipse.cdt.core.cnature
23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
25 | fr.ac6.mcu.ide.core.MCUProjectNature
26 |
27 |
28 |
--------------------------------------------------------------------------------
/Inc/stm32h7xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32h7xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32H7xx_IT_H
23 | #define __STM32H7xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void SVC_Handler(void);
51 | void PendSV_Handler(void);
52 | void SysTick_Handler(void);
53 | /* USER CODE BEGIN EFP */
54 |
55 | /* USER CODE END EFP */
56 |
57 | #ifdef __cplusplus
58 | }
59 | #endif
60 |
61 | #endif /* __STM32H7xx_IT_H */
62 |
63 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
64 |
--------------------------------------------------------------------------------
/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32h7xx_hal.h"
32 |
33 | /* Private includes ----------------------------------------------------------*/
34 | /* USER CODE BEGIN Includes */
35 |
36 | /* USER CODE END Includes */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* USER CODE BEGIN ET */
40 |
41 | /* USER CODE END ET */
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* USER CODE BEGIN EC */
45 |
46 | /* USER CODE END EC */
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* USER CODE BEGIN EM */
50 |
51 | /* USER CODE END EM */
52 |
53 | /* Exported functions prototypes ---------------------------------------------*/
54 | void Error_Handler(void);
55 |
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | /* Private defines -----------------------------------------------------------*/
61 | /* USER CODE BEGIN Private defines */
62 |
63 | /* USER CODE END Private defines */
64 |
65 | #ifdef __cplusplus
66 | }
67 | #endif
68 |
69 | #endif /* __MAIN_H */
70 |
71 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
72 |
--------------------------------------------------------------------------------
/Src/stm32h7xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * File Name : stm32h7xx_hal_msp.c
5 | * Description : This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN Define */
35 |
36 | /* USER CODE END Define */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN Macro */
40 |
41 | /* USER CODE END Macro */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* External functions --------------------------------------------------------*/
54 | /* USER CODE BEGIN ExternalFunctions */
55 |
56 | /* USER CODE END ExternalFunctions */
57 |
58 | /* USER CODE BEGIN 0 */
59 |
60 | /* USER CODE END 0 */
61 | /**
62 | * Initializes the Global MSP.
63 | */
64 | void HAL_MspInit(void)
65 | {
66 | /* USER CODE BEGIN MspInit 0 */
67 |
68 | /* USER CODE END MspInit 0 */
69 |
70 | __HAL_RCC_SYSCFG_CLK_ENABLE();
71 |
72 | /* System interrupt init*/
73 |
74 | /* USER CODE BEGIN MspInit 1 */
75 |
76 | /* USER CODE END MspInit 1 */
77 | }
78 |
79 | /* USER CODE BEGIN 1 */
80 |
81 | /* USER CODE END 1 */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/Src/stm32h7xx_it.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32h7xx_it.c
5 | * @brief Interrupt Service Routines.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "main.h"
23 | #include "stm32h7xx_it.h"
24 | /* Private includes ----------------------------------------------------------*/
25 | /* USER CODE BEGIN Includes */
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN PD */
35 |
36 | /* USER CODE END PD */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN PM */
40 |
41 | /* USER CODE END PM */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* Private user code ---------------------------------------------------------*/
54 | /* USER CODE BEGIN 0 */
55 |
56 | /* USER CODE END 0 */
57 |
58 | /* External variables --------------------------------------------------------*/
59 |
60 | /* USER CODE BEGIN EV */
61 |
62 | /* USER CODE END EV */
63 |
64 | /******************************************************************************/
65 | /* Cortex Processor Interruption and Exception Handlers */
66 | /******************************************************************************/
67 | /**
68 | * @brief This function handles System service call via SWI instruction.
69 | */
70 | void SVC_Handler(void)
71 | {
72 | /* USER CODE BEGIN SVCall_IRQn 0 */
73 |
74 | /* USER CODE END SVCall_IRQn 0 */
75 | /* USER CODE BEGIN SVCall_IRQn 1 */
76 |
77 | /* USER CODE END SVCall_IRQn 1 */
78 | }
79 |
80 | /**
81 | * @brief This function handles Pendable request for system service.
82 | */
83 | void PendSV_Handler(void)
84 | {
85 | /* USER CODE BEGIN PendSV_IRQn 0 */
86 |
87 | /* USER CODE END PendSV_IRQn 0 */
88 | /* USER CODE BEGIN PendSV_IRQn 1 */
89 |
90 | /* USER CODE END PendSV_IRQn 1 */
91 | }
92 |
93 | /**
94 | * @brief This function handles System tick timer.
95 | */
96 | void SysTick_Handler(void)
97 | {
98 | /* USER CODE BEGIN SysTick_IRQn 0 */
99 |
100 | /* USER CODE END SysTick_IRQn 0 */
101 | HAL_IncTick();
102 | /* USER CODE BEGIN SysTick_IRQn 1 */
103 |
104 | /* USER CODE END SysTick_IRQn 1 */
105 | }
106 |
107 | /******************************************************************************/
108 | /* STM32H7xx Peripheral Interrupt Handlers */
109 | /* Add here the Interrupt Handlers for the used peripherals. */
110 | /* For the available peripheral interrupt handler names, */
111 | /* please refer to the startup file (startup_stm32h7xx.s). */
112 | /******************************************************************************/
113 |
114 | /* USER CODE BEGIN 1 */
115 |
116 | /* USER CODE END 1 */
117 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
118 |
--------------------------------------------------------------------------------
/Drivers/Device/ST/STM32H7xx/Include/system_stm32h7xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32h7xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-Mx Device System Source File for STM32H7xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /** @addtogroup CMSIS
37 | * @{
38 | */
39 |
40 | /** @addtogroup stm32h7xx_system
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief Define to prevent recursive inclusion
46 | */
47 | #ifndef SYSTEM_STM32H7XX_H
48 | #define SYSTEM_STM32H7XX_H
49 |
50 | #ifdef __cplusplus
51 | extern "C" {
52 | #endif
53 |
54 | /** @addtogroup STM32H7xx_System_Includes
55 | * @{
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 |
63 | /** @addtogroup STM32H7xx_System_Exported_types
64 | * @{
65 | */
66 | /* This variable is updated in three ways:
67 | 1) by calling CMSIS function SystemCoreClockUpdate()
68 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
69 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
70 | Note: If you use this function to configure the system clock; then there
71 | is no need to call the 2 first functions listed above, since SystemCoreClock
72 | variable is updated automatically.
73 | */
74 | extern uint32_t SystemCoreClock; /*!< System Domain1 Clock Frequency */
75 | extern uint32_t SystemD2Clock; /*!< System Domain2 Clock Frequency */
76 | extern const uint8_t D1CorePrescTable[16] ; /*!< D1CorePrescTable prescalers table values */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32H7xx_System_Exported_Constants
83 | * @{
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /** @addtogroup STM32H7xx_System_Exported_Macros
91 | * @{
92 | */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @addtogroup STM32H7xx_System_Exported_Functions
99 | * @{
100 | */
101 |
102 | extern void SystemInit(void);
103 | extern void SystemCoreClockUpdate(void);
104 | /**
105 | * @}
106 | */
107 |
108 | #ifdef __cplusplus
109 | }
110 | #endif
111 |
112 | #endif /* SYSTEM_STM32H7XX_H */
113 |
114 | /**
115 | * @}
116 | */
117 |
118 | /**
119 | * @}
120 | */
121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122 |
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/README.md:
--------------------------------------------------------------------------------
1 | # Mobilenet V1 for STM32 over CMSIS-NN
2 |
3 | This project contains an STM32 application for executing a quantized Mobilenet v1 (`160x160x3`, alpha `0.25`) trained for Imangenet on a STM32H7 NUCLEO evaluation board.
4 |
5 | ## Support and Contribution
6 | If you want to collaborate, contribute, or to rise *issues* and suggestions to this project you can use the [Issues](https://github.com/EEESlab/mobilenet_v1_stm32_cmsis_nn/issues) page or contact us:
7 | + **Alessandro Capotondi**, *University of Bologna*, [email](mailto:alessandro.capotondi@unibo.it)
8 | + **Manuele Rusci**, *University of Bologna*, [email](mailto:alessandro.capotondi@unibo.it)
9 |
10 |
11 | ## What is a Mobilenet?
12 | [MobileNets](https://arxiv.org/abs/1704.04861) are small, low-latency, low-power models parameterized to meet the resource constraints of a variety of use cases. They can be built upon for classification, detection, embeddings and segmentation similar to how other popular large scale models, such as Inception, are used. MobileNets can be run efficiently on mobile devices with [TensorFlow Mobile](https://www.tensorflow.org/mobile/).
13 | MobileNets trade off between latency, size and accuracy while comparing favorably with popular models from the literature.
14 |
15 | 
16 |
17 |
18 | Only a limitated set of configurations for MobileNet can be hosted on a ST32H7 device, memory limitation are there (2MB flash + 512kB L2 SRAM). The following chart highlights the subset of configurations compatible for the device.
19 |
20 | 
21 |
22 |
23 | The parameters used on this project is image input `160x160x3` and alpha `0.25`. The following table show the classification performance of such configuration.
24 |
25 | Model | Million MACs | Million Parameters | Top-1 Accuracy| Top-5 Accuracy |
26 | :----:|:------------:|:----------:|:-------:|:-------:|
27 | [MobileNet_v1_0.25_160_uint8](http://download.tensorflow.org/models/mobilenet_v1_2018_08_02/mobilenet_v1_0.25_160_quant.tgz)|21|0.47|43.4|68.5|
28 |
29 | ### UINT8 Asymmetric Quantization for CMSIS-NN
30 | To limit the classification error introduced by the quantization this Mobilenet implementation uses our extended [CMSIS-NN](https://github.com/EEESlab/CMSIS_NN-INTQ) that support an *Asymmetric Quantization* methodology mapped on *UINT8* datatypes.
31 | You find additional information on this [article](https://medium.com/@manuele.rusci/running-mobilenet-on-stm32-mcus-at-the-edge-e217db934f83).
32 |
33 | ### How to import a new Tensorflow model
34 | Shortly we will release a Python script for the import of pre-trained Tensorflow models.
35 |
36 | ## Getting-Started on STM Workbench
37 | + Get a STMicroelectronics [NUCLEO STM32H743ZI](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)
38 | + Install [System Workbench for STM32](https://www.st.com/en/development-tools/sw4stm32.html) for your OS and open it
39 | + Click `File> Import...`, then select `Git> Project from Git` and click the button `Next`
40 |
41 |
42 | 
43 |
44 |
45 | + Select `Clone URI` and click the button `Next`
46 |
47 |
48 | 
49 |
50 |
51 | + Add the URI `https://github.com/EEESlab/mobilenet_v1_stm32_cmsis_nn.git` and click `Next`
52 |
53 |
54 | 
55 |
56 |
57 | + Select all the branches and click the button `Next`
58 |
59 |
60 | 
61 |
62 |
63 | + Select the local destination and click the button `Next`
64 |
65 |
66 | 
67 |
68 |
69 | + Select how to import the project and click the button `Next`
70 |
71 |
72 | 
73 |
74 |
75 | + Import the project (finally)!
76 |
77 |
78 | 
79 |
80 |
81 | + Build and run the application!
82 |
83 | ## Measured Performance
84 | The following table show the profiling layer-per-layer of this Mobilenet implementation on the STM32H7 running at 400MHz.
85 |
86 |
87 | 
88 |
89 |
90 |
91 | ## Limitations
92 | + The project supports only STM32H7 board.
93 | + Input image is statically linked at compile time.
94 |
95 |
96 |
--------------------------------------------------------------------------------
/STM32H743ZITx_FLASH.ld:
--------------------------------------------------------------------------------
1 | /*
2 | *****************************************************************************
3 | **
4 |
5 | ** File : LinkerScript.ld
6 | **
7 | ** Abstract : Linker script for STM32H743ZITx Device with
8 | ** 2048KByte FLASH, 1056KByte RAM
9 | **
10 | ** Set heap size, stack size and stack location according
11 | ** to application requirements.
12 | **
13 | ** Set memory bank area and size if external memory is used.
14 | **
15 | ** Target : STMicroelectronics STM32
16 | **
17 | **
18 | ** Distribution: The file is distributed as is, without any warranty
19 | ** of any kind.
20 | **
21 | ** (c)Copyright Ac6.
22 | ** You may use this file as-is or modify it according to the needs of your
23 | ** project. Distribution of this file (unmodified or modified) is not
24 | ** permitted. Ac6 permit registered System Workbench for MCU users the
25 | ** rights to distribute the assembled, compiled & linked contents of this
26 | ** file as part of an application binary file, provided that it is built
27 | ** using the System Workbench for MCU toolchain.
28 | **
29 | *****************************************************************************
30 | */
31 |
32 | /* Entry Point */
33 | ENTRY(Reset_Handler)
34 |
35 | /* Highest address of the user mode stack */
36 | _estack = 0x20020000; /* end of RAM */
37 | /* Generate a link error if heap and stack don't fit into RAM */
38 | _Min_Heap_Size = 0x0; /* required amount of heap */
39 | _Min_Stack_Size = 0x400; /* required amount of stack */
40 |
41 | /* Specify the memory areas */
42 | MEMORY
43 | {
44 | DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
45 | RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
46 | RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
47 | RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
48 | ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
49 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
50 | }
51 |
52 | /* Define output sections */
53 | SECTIONS
54 | {
55 | /* The startup code goes first into FLASH */
56 | .isr_vector :
57 | {
58 | . = ALIGN(4);
59 | KEEP(*(.isr_vector)) /* Startup code */
60 | . = ALIGN(4);
61 | } >FLASH
62 |
63 | /* The program code and other data goes into FLASH */
64 | .text :
65 | {
66 | . = ALIGN(4);
67 | *(.text) /* .text sections (code) */
68 | *(.text*) /* .text* sections (code) */
69 | *(.glue_7) /* glue arm to thumb code */
70 | *(.glue_7t) /* glue thumb to arm code */
71 | *(.eh_frame)
72 |
73 | KEEP (*(.init))
74 | KEEP (*(.fini))
75 |
76 | . = ALIGN(4);
77 | _etext = .; /* define a global symbols at end of code */
78 | } >FLASH
79 |
80 | /* Constant data goes into FLASH */
81 | .rodata :
82 | {
83 | . = ALIGN(4);
84 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
85 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
86 | . = ALIGN(4);
87 | } >FLASH
88 |
89 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
90 | .ARM : {
91 | __exidx_start = .;
92 | *(.ARM.exidx*)
93 | __exidx_end = .;
94 | } >FLASH
95 |
96 | .preinit_array :
97 | {
98 | PROVIDE_HIDDEN (__preinit_array_start = .);
99 | KEEP (*(.preinit_array*))
100 | PROVIDE_HIDDEN (__preinit_array_end = .);
101 | } >FLASH
102 | .init_array :
103 | {
104 | PROVIDE_HIDDEN (__init_array_start = .);
105 | KEEP (*(SORT(.init_array.*)))
106 | KEEP (*(.init_array*))
107 | PROVIDE_HIDDEN (__init_array_end = .);
108 | } >FLASH
109 | .fini_array :
110 | {
111 | PROVIDE_HIDDEN (__fini_array_start = .);
112 | KEEP (*(SORT(.fini_array.*)))
113 | KEEP (*(.fini_array*))
114 | PROVIDE_HIDDEN (__fini_array_end = .);
115 | } >FLASH
116 |
117 | /* used by the startup to initialize data */
118 | _sidata = LOADADDR(.data);
119 |
120 | /* Initialized data sections goes into RAM, load LMA copy after code */
121 | .data :
122 | {
123 | . = ALIGN(4);
124 | _sdata = .; /* create a global symbol at data start */
125 | *(.data) /* .data sections */
126 | *(.data*) /* .data* sections */
127 |
128 | . = ALIGN(4);
129 | _edata = .; /* define a global symbol at data end */
130 | } >DTCMRAM AT> FLASH
131 |
132 | .L2RAM :
133 | {
134 | KEEP(*(.L2RAM))
135 | } >RAM_D1
136 |
137 |
138 | /* Uninitialized data section */
139 | . = ALIGN(4);
140 | .bss :
141 | {
142 | /* This is used by the startup in order to initialize the .bss secion */
143 | _sbss = .; /* define a global symbol at bss start */
144 | __bss_start__ = _sbss;
145 | *(.bss)
146 | *(.bss*)
147 | *(COMMON)
148 |
149 | . = ALIGN(4);
150 | _ebss = .; /* define a global symbol at bss end */
151 | __bss_end__ = _ebss;
152 | } >DTCMRAM
153 |
154 | /* User_heap_stack section, used to check that there is enough RAM left */
155 | ._user_heap_stack :
156 | {
157 | . = ALIGN(8);
158 | PROVIDE ( end = . );
159 | PROVIDE ( _end = . );
160 | . = . + _Min_Heap_Size;
161 | . = . + _Min_Stack_Size;
162 | . = ALIGN(8);
163 | } >DTCMRAM
164 |
165 |
166 |
167 | /* Remove information from the standard libraries */
168 | /DISCARD/ :
169 | {
170 | libc.a ( * )
171 | libm.a ( * )
172 | libgcc.a ( * )
173 | }
174 |
175 | .ARM.attributes 0 : { *(.ARM.attributes) }
176 | }
177 |
178 |
179 |
--------------------------------------------------------------------------------
/.mxproject:
--------------------------------------------------------------------------------
1 | [PreviousGenFiles]
2 | HeaderPath=C:/Users/Alessandro Capotondi/workspace/workbench/intq-mobilenet-v1/Inc
3 | HeaderFiles=stm32h7xx_it.h;stm32h7xx_hal_conf.h;main.h;
4 | SourcePath=C:/Users/Alessandro Capotondi/workspace/workbench/intq-mobilenet-v1/Src
5 | SourceFiles=stm32h7xx_it.c;stm32h7xx_hal_msp.c;main.c;
6 |
7 | [PreviousLibFiles]
8 | LibFiles=Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_flash_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mdma.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr_ex.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h;Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c.h;Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h;Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;
9 |
10 | [PreviousUsedSW4STM32Files]
11 | SourceFiles=..\Src\main.c;..\Src\stm32h7xx_it.c;..\Src\stm32h7xx_hal_msp.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.c;../Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c;../\Src/system_stm32h7xx.c;../Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c;null;
12 | HeaderPath=..\Drivers\STM32H7xx_HAL_Driver\Inc;..\Drivers\STM32H7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32H7xx\Include;..\Drivers\CMSIS\Include;..\Inc;
13 | CDefines=__weak:__attribute__((weak));__packed:__attribute__((__packed__));
14 |
15 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_hsem.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_hsem.h
4 | * @author MCD Application Team
5 | * @brief Header file of HSEM HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_HSEM_H
38 | #define __STM32H7xx_HAL_HSEM_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 |
48 | /** @addtogroup STM32H7xx_HAL_Driver
49 | * @{
50 | */
51 |
52 | /** @addtogroup HSEM
53 | * @{
54 | */
55 |
56 | /* Exported types ------------------------------------------------------------*/
57 |
58 | /** @defgroup HSEM_Exported_Types HSEM Exported Types
59 | * @{
60 | */
61 |
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /* Exported constants --------------------------------------------------------*/
68 |
69 | /** @defgroup HSEM_Exported_Constants HSEM Exported Constants
70 | * @{
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /* Exported macro ------------------------------------------------------------*/
78 | /** @defgroup HSEM_Exported_Macros HSEM Exported Macros
79 | * @{
80 | */
81 |
82 | /**
83 | * @brief SemID to mask helper Macro.
84 | * @param __SEMID__: semaphore ID from 0 to 31
85 | * @retval Semaphore Mask.
86 | */
87 | #define __HAL_HSEM_SEMID_TO_MASK(__SEMID__) (1 << (__SEMID__))
88 |
89 |
90 | /**
91 | * @brief Enables the specified HSEM interrupts.
92 | * @param __SEM_MASK__: semaphores Mask
93 | * @retval None.
94 | */
95 | #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
96 | /**
97 | * @brief Disables the specified HSEM interrupts.
98 | * @param __SEM_MASK__: semaphores Mask
99 | * @retval None.
100 | */
101 | #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
102 |
103 | /**
104 | * @brief Checks whether interrupt has occurred or not for semaphores specified by a mask.
105 | * @param __SEM_MASK__: semaphores Mask
106 | * @retval semaphores Mask : Semaphores where an interrupt occurred.
107 | */
108 | #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->MISR)
109 |
110 | /**
111 | * @brief Get the semaphores release status flags.
112 | * @param __SEM_MASK__: semaphores Mask
113 | * @retval semaphores Mask : Semaphores where Release flags rise.
114 | */
115 | #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->ISR)
116 |
117 | /**
118 | * @brief Clears the HSEM Interrupt flags.
119 | * @param __SEM_MASK__: semaphores Mask
120 | * @retval None.
121 | */
122 | #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->ICR |= (__SEM_MASK__))
123 |
124 | /**
125 | * @}
126 | */
127 |
128 | /* Exported functions --------------------------------------------------------*/
129 | /** @defgroup HSEM_Exported_Functions HSEM Exported Functions
130 | * @{
131 | */
132 |
133 |
134 | /** @addtogroup HSEM_Exported_Functions_Group1 Take and Release functions
135 | * @brief HSEM Take and Release functions
136 | * @{
137 | */
138 |
139 | /* HSEM semaphore take (lock) using 2-Step method ****************************/
140 | HAL_StatusTypeDef HAL_HSEM_Take(uint32_t SemID, uint32_t ProcessID);
141 | /* HSEM semaphore fast take (lock) using 1-Step method ***********************/
142 | HAL_StatusTypeDef HAL_HSEM_FastTake(uint32_t SemID);
143 | /* HSEM Check semaphore state Taken or not **********************************/
144 | uint32_t HAL_HSEM_IsSemTaken(uint32_t SemID);
145 | /* HSEM Release **************************************************************/
146 | void HAL_HSEM_Release(uint32_t SemID, uint32_t ProcessID);
147 | /* HSEM Release All************************************************************/
148 | void HAL_HSEM_ReleaseAll(uint32_t Key, uint32_t MasterID);
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /** @addtogroup HSEM_Exported_Functions_Group2 HSEM Set and Get Key functions
155 | * @brief HSEM Set and Get Key functions.
156 | * @{
157 | */
158 | /* HSEM Set Clear Key *********************************************************/
159 | void HAL_HSEM_SetClearKey(uint32_t Key);
160 | /* HSEM Get Clear Key *********************************************************/
161 | uint32_t HAL_HSEM_GetClearKey(void);
162 | /**
163 | * @}
164 | */
165 |
166 |
167 | /** @addtogroup HSEM_Exported_Functions_Group3
168 | * @brief HSEM Notification functions
169 | * @{
170 | */
171 | /* HSEM Activate HSEM Notification (When a semaphore is released) ) *****************/
172 | void HAL_HSEM_ActivateNotification(uint32_t SemMask);
173 | /* HSEM Deactivate HSEM Notification (When a semaphore is released) ****************/
174 | void HAL_HSEM_DeactivateNotification(uint32_t SemMask);
175 | /* HSEM Free Callback (When a semaphore is released) *******************************/
176 | void HAL_HSEM_FreeCallback(uint32_t SemMask);
177 | /* HSEM IRQ Handler **********************************************************/
178 | void HAL_HSEM_IRQHandler(void);
179 |
180 |
181 | /**
182 | * @}
183 | */
184 |
185 |
186 | /**
187 | * @}
188 | */
189 |
190 | /* Private types -------------------------------------------------------------*/
191 | /** @defgroup HSEM_Private_Types HSEM Private Types
192 | * @{
193 | */
194 |
195 | /**
196 | * @}
197 | */
198 |
199 | /* Private variables ---------------------------------------------------------*/
200 | /** @defgroup HSEM_Private_Variables HSEM Private Variables
201 | * @{
202 | */
203 |
204 | /**
205 | * @}
206 | */
207 |
208 | /* Private constants ---------------------------------------------------------*/
209 | /** @defgroup HSEM_Private_Constants HSEM Private Constants
210 | * @{
211 | */
212 |
213 | /**
214 | * @}
215 | */
216 |
217 | /* Private macros ------------------------------------------------------------*/
218 | /** @defgroup HSEM_Private_Macros HSEM Private Macros
219 | * @{
220 | */
221 |
222 | #define IS_HSEM_SEMID(__SEMID__) ((__SEMID__) <= HSEM_SEMID_MAX )
223 |
224 | #define IS_HSEM_PROCESSID(__PROCESSID__) ((__PROCESSID__) <= HSEM_PROCESSID_MAX )
225 |
226 | #define IS_HSEM_KEY(__KEY__) ((__KEY__) <= HSEM_CLEAR_KEY_MAX )
227 |
228 | #define IS_HSEM_MASTERID(__MASTERID__) (((__MASTERID__) == HSEM_CM7_MASTERID))
229 | /**
230 | * @}
231 | */
232 |
233 | /**
234 | * @}
235 | */
236 |
237 | /**
238 | * @}
239 | */
240 |
241 | #ifdef __cplusplus
242 | }
243 | #endif
244 |
245 | #endif /* __STM32H7xx_HAL_HSEM_H */
246 |
247 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
248 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_def.h
4 | * @author MCD Application Team
5 | * @brief This file contains HAL common defines, enumeration, macros and
6 | * structures definitions.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © COPYRIGHT(c) 2017 STMicroelectronics
11 | *
12 | * Redistribution and use in source and binary forms, with or without modification,
13 | * are permitted provided that the following conditions are met:
14 | * 1. Redistributions of source code must retain the above copyright notice,
15 | * this list of conditions and the following disclaimer.
16 | * 2. Redistributions in binary form must reproduce the above copyright notice,
17 | * this list of conditions and the following disclaimer in the documentation
18 | * and/or other materials provided with the distribution.
19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
20 | * may be used to endorse or promote products derived from this software
21 | * without specific prior written permission.
22 | *
23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 | *
34 | ******************************************************************************
35 | */
36 |
37 | /* Define to prevent recursive inclusion -------------------------------------*/
38 | #ifndef __STM32H7xx_HAL_DEF
39 | #define __STM32H7xx_HAL_DEF
40 |
41 | #ifdef __cplusplus
42 | extern "C" {
43 | #endif
44 |
45 | /* Includes ------------------------------------------------------------------*/
46 | #include "stm32h7xx.h"
47 | #include "Legacy/stm32_hal_legacy.h"
48 | #include
49 |
50 | /* Exported types ------------------------------------------------------------*/
51 |
52 | /**
53 | * @brief HAL Status structures definition
54 | */
55 | typedef enum
56 | {
57 | HAL_OK = 0x00,
58 | HAL_ERROR = 0x01,
59 | HAL_BUSY = 0x02,
60 | HAL_TIMEOUT = 0x03
61 | } HAL_StatusTypeDef;
62 |
63 | /**
64 | * @brief HAL Lock structures definition
65 | */
66 | typedef enum
67 | {
68 | HAL_UNLOCKED = 0x00,
69 | HAL_LOCKED = 0x01
70 | } HAL_LockTypeDef;
71 |
72 | /* Exported macro ------------------------------------------------------------*/
73 | #ifndef NULL
74 | #define NULL (void *) 0
75 | #endif
76 |
77 | #define HAL_MAX_DELAY 0xFFFFFFFF
78 |
79 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET)
80 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET)
81 |
82 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
83 | do{ \
84 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
85 | (__DMA_HANDLE__).Parent = (__HANDLE__); \
86 | } while(0)
87 |
88 | #define UNUSED(x) ((void)(x))
89 |
90 | /** @brief Reset the Handle's State field.
91 | * @param __HANDLE__: specifies the Peripheral Handle.
92 | * @note This macro can be used for the following purpose:
93 | * - When the Handle is declared as local variable; before passing it as parameter
94 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
95 | * to set to 0 the Handle's "State" field.
96 | * Otherwise, "State" field may have any random value and the first time the function
97 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
98 | * (i.e. HAL_PPP_MspInit() will not be executed).
99 | * - When there is a need to reconfigure the low level hardware: instead of calling
100 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
101 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
102 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
103 | * @retval None
104 | */
105 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
106 |
107 | #if (USE_RTOS == 1)
108 | #error " USE_RTOS should be 0 in the current HAL release "
109 | #else
110 | #define __HAL_LOCK(__HANDLE__) \
111 | do{ \
112 | if((__HANDLE__)->Lock == HAL_LOCKED) \
113 | { \
114 | return HAL_BUSY; \
115 | } \
116 | else \
117 | { \
118 | (__HANDLE__)->Lock = HAL_LOCKED; \
119 | } \
120 | }while (0)
121 |
122 | #define __HAL_UNLOCK(__HANDLE__) \
123 | do{ \
124 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
125 | }while (0)
126 | #endif /* USE_RTOS */
127 |
128 | #if defined ( __GNUC__ )
129 | #ifndef __weak
130 | #define __weak __attribute__((weak))
131 | #endif /* __weak */
132 | #ifndef __packed
133 | #define __packed __attribute__((__packed__))
134 | #endif /* __packed */
135 | #endif /* __GNUC__ */
136 |
137 |
138 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
139 | #if defined (__GNUC__) /* GNU Compiler */
140 | #ifndef __ALIGN_END
141 | #define __ALIGN_END __attribute__ ((aligned (4)))
142 | #endif /* __ALIGN_END */
143 | #ifndef __ALIGN_BEGIN
144 | #define __ALIGN_BEGIN
145 | #endif /* __ALIGN_BEGIN */
146 | #else
147 | #ifndef __ALIGN_END
148 | #define __ALIGN_END
149 | #endif /* __ALIGN_END */
150 | #ifndef __ALIGN_BEGIN
151 | #if defined (__CC_ARM) /* ARM Compiler */
152 | #define __ALIGN_BEGIN __align(4)
153 | #elif defined (__ICCARM__) /* IAR Compiler */
154 | #define __ALIGN_BEGIN
155 | #endif /* __CC_ARM */
156 | #endif /* __ALIGN_BEGIN */
157 | #endif /* __GNUC__ */
158 |
159 | /* Macro to get variable aligned on 32-bytes,needed for cache maintenance purpose */
160 | #if defined (__GNUC__) /* GNU Compiler */
161 | #define ALIGN_32BYTES(buf) buf __attribute__ ((aligned (32)))
162 | #elif defined (__ICCARM__) /* IAR Compiler */
163 | #define ALIGN_32BYTES(buf) _Pragma("data_alignment=32") buf
164 | #elif defined (__CC_ARM) /* ARM Compiler */
165 | #define ALIGN_32BYTES(buf) __align(32) buf
166 | #endif
167 |
168 | /**
169 | * @brief __RAM_FUNC definition
170 | */
171 | #if defined ( __CC_ARM )
172 | /* ARM Compiler
173 | ------------
174 | RAM functions are defined using the toolchain options.
175 | Functions that are executed in RAM should reside in a separate source module.
176 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
177 | area of a module to a memory space in physical RAM.
178 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
179 | dialog.
180 | */
181 | #define __RAM_FUNC HAL_StatusTypeDef
182 |
183 | #elif defined ( __ICCARM__ )
184 | /* ICCARM Compiler
185 | ---------------
186 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
187 | */
188 | #define __RAM_FUNC __ramfunc HAL_StatusTypeDef
189 |
190 | #elif defined ( __GNUC__ )
191 | /* GNU Compiler
192 | ------------
193 | RAM functions are defined using a specific toolchain attribute
194 | "__attribute__((section(".RamFunc")))".
195 | */
196 | #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc")))
197 |
198 | #endif
199 |
200 | #ifdef __cplusplus
201 | }
202 | #endif
203 |
204 | #endif /* ___STM32H7xx_HAL_DEF */
205 |
206 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
207 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_i2c_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_i2c_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of I2C HAL Extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_I2C_EX_H
38 | #define __STM32H7xx_HAL_I2C_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup I2CEx I2CEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /* Exported constants --------------------------------------------------------*/
57 |
58 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
59 | * @{
60 | */
61 |
62 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
63 | * @{
64 | */
65 | #define I2C_ANALOGFILTER_ENABLE ((uint32_t)0x00000000U)
66 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
72 | * @{
73 | */
74 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP
75 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP
76 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP
77 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP
78 |
79 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_PMCR_I2C1_FMP
80 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_PMCR_I2C2_FMP
81 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_PMCR_I2C3_FMP
82 | #define I2C_FASTMODEPLUS_I2C4 SYSCFG_PMCR_I2C4_FMP
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /* Exported macro ------------------------------------------------------------*/
92 | /* Exported functions --------------------------------------------------------*/
93 |
94 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
95 | * @{
96 | */
97 |
98 | /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
99 | * @brief Extended features functions
100 | * @{
101 | */
102 |
103 | /* Peripheral Control functions ************************************************/
104 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
105 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
106 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
107 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
108 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
109 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
110 |
111 | /* Private constants ---------------------------------------------------------*/
112 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
113 | * @{
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /* Private macros ------------------------------------------------------------*/
121 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
122 | * @{
123 | */
124 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
125 | ((FILTER) == I2C_ANALOGFILTER_DISABLE))
126 |
127 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
128 |
129 | #if defined(SYSCFG_PMCR_I2C1_FMP) && defined(SYSCFG_PMCR_I2C2_FMP) && defined(SYSCFG_PMCR_I2C3_FMP) && defined(SYSCFG_PMCR_I2C4_FMP)
130 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FASTMODEPLUS_PB6) == I2C_FASTMODEPLUS_PB6) || \
131 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB7) == I2C_FASTMODEPLUS_PB7) || \
132 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB8) == I2C_FASTMODEPLUS_PB8) || \
133 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \
134 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1) || \
135 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C2) == I2C_FASTMODEPLUS_I2C2) || \
136 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C3) == I2C_FASTMODEPLUS_I2C3) || \
137 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C4) == I2C_FASTMODEPLUS_I2C4))
138 | #elif defined(SYSCFG_PMCR_I2C1_FMP) && defined(SYSCFG_PMCR_I2C2_FMP) && defined(SYSCFG_PMCR_I2C3_FMP)
139 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FASTMODEPLUS_PB6) == I2C_FASTMODEPLUS_PB6) || \
140 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB7) == I2C_FASTMODEPLUS_PB7) || \
141 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB8) == I2C_FASTMODEPLUS_PB8) || \
142 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \
143 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1) || \
144 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C2) == I2C_FASTMODEPLUS_I2C2) || \
145 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C3) == I2C_FASTMODEPLUS_I2C3))
146 | #elif defined(SYSCFG_PMCR_I2C1_FMP) && defined(SYSCFG_PMCR_I2C2_FMP)
147 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FASTMODEPLUS_PB6) == I2C_FASTMODEPLUS_PB6) || \
148 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB7) == I2C_FASTMODEPLUS_PB7) || \
149 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB8) == I2C_FASTMODEPLUS_PB8) || \
150 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \
151 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1) || \
152 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C2) == I2C_FASTMODEPLUS_I2C2))
153 | #elif defined(SYSCFG_PMCR_I2C1_FMP)
154 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FASTMODEPLUS_PB6) == I2C_FASTMODEPLUS_PB6) || \
155 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB7) == I2C_FASTMODEPLUS_PB7) || \
156 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB8) == I2C_FASTMODEPLUS_PB8) || \
157 | (((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \
158 | (((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1))
159 | #endif /* SYSCFG_PMCR_I2C1_FMP && SYSCFG_PMCR_I2C2_FMP && SYSCFG_PMCR_I2C3_FMP && SYSCFG_PMCR_I2C4_FMP */
160 | /**
161 | * @}
162 | */
163 |
164 | /* Private Functions ---------------------------------------------------------*/
165 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
166 | * @{
167 | */
168 | /* Private functions are defined in stm32h7xx_hal_i2c_ex.c file */
169 | /**
170 | * @}
171 | */
172 |
173 | /**
174 | * @}
175 | */
176 |
177 | /**
178 | * @}
179 | */
180 |
181 | /**
182 | * @}
183 | */
184 |
185 | /**
186 | * @}
187 | */
188 |
189 | #ifdef __cplusplus
190 | }
191 | #endif
192 |
193 | #endif /* __STM32H7xx_HAL_I2C_EX_H */
194 |
195 |
196 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
197 |
--------------------------------------------------------------------------------
/intq-mobilenet-v1.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | CORTEX_M7.CPU_DCache=Enabled
3 | CORTEX_M7.CPU_ICache=Enabled
4 | CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache
5 | File.Version=6
6 | KeepUserPlacement=true
7 | Mcu.Family=STM32H7
8 | Mcu.IP0=CORTEX_M7
9 | Mcu.IP1=NVIC
10 | Mcu.IP2=RCC
11 | Mcu.IP3=SYS
12 | Mcu.IPNb=4
13 | Mcu.Name=STM32H743ZITx
14 | Mcu.Package=LQFP144
15 | Mcu.Pin0=PA13 (JTMS/SWDIO)
16 | Mcu.Pin1=PA14 (JTCK/SWCLK)
17 | Mcu.Pin2=VP_SYS_VS_Systick
18 | Mcu.PinsNb=3
19 | Mcu.ThirdPartyNb=0
20 | Mcu.UserConstants=
21 | Mcu.UserName=STM32H743ZITx
22 | MxCube.Version=5.1.0
23 | MxDb.Version=DB.5.0.10
24 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false
25 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false
26 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false
27 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false
28 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false
29 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false
30 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
31 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false
32 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true
33 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false
34 | PA13\ (JTMS/SWDIO).Mode=Serial_Wire
35 | PA13\ (JTMS/SWDIO).Signal=SYS_JTMS-SWDIO
36 | PA14\ (JTCK/SWCLK).Mode=Serial_Wire
37 | PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK
38 | PCC.Checker=false
39 | PCC.Line=STM32H743/753
40 | PCC.MCU=STM32H743ZITx
41 | PCC.PartNumber=STM32H743ZITx
42 | PCC.Seq0=0
43 | PCC.Series=STM32H7
44 | PCC.Temperature=25
45 | PCC.Vdd=3.0
46 | PinOutPanel.RotationAngle=0
47 | ProjectManager.AskForMigrate=true
48 | ProjectManager.BackupPrevious=false
49 | ProjectManager.CompilerOptimize=2
50 | ProjectManager.ComputerToolchain=false
51 | ProjectManager.CoupleFile=false
52 | ProjectManager.CustomerFirmwarePackage=
53 | ProjectManager.DefaultFWLocation=true
54 | ProjectManager.DeletePrevious=true
55 | ProjectManager.DeviceId=STM32H743ZITx
56 | ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.3.2
57 | ProjectManager.FreePins=true
58 | ProjectManager.HalAssertFull=false
59 | ProjectManager.HeapSize=0x0
60 | ProjectManager.KeepUserCode=true
61 | ProjectManager.LastFirmware=true
62 | ProjectManager.LibraryCopy=1
63 | ProjectManager.MainLocation=Src
64 | ProjectManager.NoMain=false
65 | ProjectManager.PreviousToolchain=SW4STM32
66 | ProjectManager.ProjectBuild=false
67 | ProjectManager.ProjectFileName=intq-mobilenet-v1.ioc
68 | ProjectManager.ProjectName=intq-mobilenet-v1
69 | ProjectManager.StackSize=0x400
70 | ProjectManager.TargetToolchain=SW4STM32
71 | ProjectManager.ToolChainLocation=
72 | ProjectManager.UnderRoot=true
73 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-true,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
74 | RCC.48MHZClocksFreq_Value=24000000
75 | RCC.ADC12outputFreq_Value=72000000
76 | RCC.ADC34outputFreq_Value=72000000
77 | RCC.ADCFreq_Value=129000000
78 | RCC.AHB12Freq_Value=200000000
79 | RCC.AHB4Freq_Value=200000000
80 | RCC.AHBFreq_Value=216000000
81 | RCC.APB1CLKDivider=RCC_HCLK_DIV4
82 | RCC.APB1Freq_Value=100000000
83 | RCC.APB1TimFreq_Value=108000000
84 | RCC.APB2CLKDivider=RCC_HCLK_DIV2
85 | RCC.APB2Freq_Value=100000000
86 | RCC.APB2TimFreq_Value=216000000
87 | RCC.APB3Freq_Value=100000000
88 | RCC.APB4Freq_Value=100000000
89 | RCC.AXIClockFreq_Value=200000000
90 | RCC.CECFreq_Value=32000
91 | RCC.CKPERFreq_Value=64000000
92 | RCC.CortexFreq_Value=400000000
93 | RCC.CpuClockFreq_Value=400000000
94 | RCC.D1CPREFreq_Value=400000000
95 | RCC.D1PPRE=RCC_APB3_DIV2
96 | RCC.D2PPRE1=RCC_APB1_DIV2
97 | RCC.D2PPRE2=RCC_APB2_DIV2
98 | RCC.D3PPRE=RCC_APB4_DIV2
99 | RCC.DFSDMACLkFreq_Value=200000000
100 | RCC.DFSDMAudioFreq_Value=48000000
101 | RCC.DFSDMFreq_Value=100000000
102 | RCC.DIVM1=4
103 | RCC.DIVN1=50
104 | RCC.DIVP1Freq_Value=400000000
105 | RCC.DIVP2Freq_Value=129000000
106 | RCC.DIVP3Freq_Value=129000000
107 | RCC.DIVQ1=4
108 | RCC.DIVQ1Freq_Value=200000000
109 | RCC.DIVQ2Freq_Value=129000000
110 | RCC.DIVQ3Freq_Value=129000000
111 | RCC.DIVR1Freq_Value=400000000
112 | RCC.DIVR2Freq_Value=129000000
113 | RCC.DIVR3Freq_Value=129000000
114 | RCC.EthernetFreq_Value=8000000
115 | RCC.FCLKCortexFreq_Value=216000000
116 | RCC.FDCANFreq_Value=200000000
117 | RCC.FMCFreq_Value=200000000
118 | RCC.FMPI2C1Freq_Value=48000000
119 | RCC.FamilyName=M
120 | RCC.HCLK3ClockFreq_Value=200000000
121 | RCC.HCLKFreq_Value=200000000
122 | RCC.HPRE=RCC_HCLK_DIV2
123 | RCC.HPREFreq_Value=96000000
124 | RCC.HRTIMFreq_Value=200000000
125 | RCC.HSE_VALUE=8000000
126 | RCC.HSI_VALUE=64000000
127 | RCC.I2C123Freq_Value=100000000
128 | RCC.I2C1Freq_Value=54000000
129 | RCC.I2C2Freq_Value=54000000
130 | RCC.I2C3Freq_Value=54000000
131 | RCC.I2C4Freq_Value=100000000
132 | RCC.I2S1Freq_Value=48000000
133 | RCC.I2S2Freq_Value=48000000
134 | RCC.I2SClocksFreq_Value=48000000
135 | RCC.I2SFreq_Value=96000000
136 | RCC.IPParameters=48MHZClocksFreq_Value,ADC12outputFreq_Value,ADC34outputFreq_Value,ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FDCANFreq_Value,FMCFreq_Value,FMPI2C1Freq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HPREFreq_Value,HRTIMFreq_Value,HSE_VALUE,HSI_VALUE,I2C123Freq_Value,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2S1Freq_Value,I2S2Freq_Value,I2SClocksFreq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLFRACN,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SQoutputFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLI2SoutputFreq_Value,PLLM,PLLMCOFreq_Value,PLLMUL,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLRoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIoutputFreq_Value,PRESCALERUSB,PWRFreq_Value,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI2Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDIOFreq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,SYSCLKSourceVirtual,TIM15Freq_Value,TIM16Freq_Value,TIM17Freq_Value,TIM1Freq_Value,TIM20Freq_Value,TIM2Freq_Value,TIM3Freq_Value,TIM8Freq_Value,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART16Freq_Value,USART1Freq_Value,USART234578Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOI2SInputFreq_Value,VCOI2SOutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutput2Freq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S,WatchDogFreq_Value
137 | RCC.LPTIM1Freq_Value=100000000
138 | RCC.LPTIM2Freq_Value=100000000
139 | RCC.LPTIM345Freq_Value=100000000
140 | RCC.LPUART1Freq_Value=100000000
141 | RCC.LSI_VALUE=32000
142 | RCC.LTDCFreq_Value=129000000
143 | RCC.MCO1PinFreq_Value=64000000
144 | RCC.MCO2PinFreq_Value=400000000
145 | RCC.MCOFreq_Value=72000000
146 | RCC.PLLCLKFreq_Value=216000000
147 | RCC.PLLFRACN=0
148 | RCC.PLLI2SPCLKFreq_Value=48000000
149 | RCC.PLLI2SQCLKFreq_Value=96000000
150 | RCC.PLLI2SQoutputFreq_Value=48000000
151 | RCC.PLLI2SRCLKFreq_Value=96000000
152 | RCC.PLLI2SRoutputFreq_Value=96000000
153 | RCC.PLLI2SoutputFreq_Value=48000000
154 | RCC.PLLM=25
155 | RCC.PLLMCOFreq_Value=72000000
156 | RCC.PLLMUL=RCC_PLL_MUL9
157 | RCC.PLLN=432
158 | RCC.PLLQ=9
159 | RCC.PLLQCLKFreq_Value=48000000
160 | RCC.PLLQoutputFreq_Value=48000000
161 | RCC.PLLRCLKFreq_Value=192000000
162 | RCC.PLLRoutputFreq_Value=192000000
163 | RCC.PLLSAIPCLKFreq_Value=96000000
164 | RCC.PLLSAIQCLKFreq_Value=96000000
165 | RCC.PLLSAIoutputFreq_Value=96000000
166 | RCC.PRESCALERUSB=RCC_USBCLKSOURCE_PLL_DIV1_5
167 | RCC.PWRFreq_Value=96000000
168 | RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE1
169 | RCC.QSPIFreq_Value=200000000
170 | RCC.RNGFreq_Value=48000000
171 | RCC.RTCFreq_Value=32000
172 | RCC.RTCHSEDivFreq_Value=4000000
173 | RCC.SAI1Freq_Value=200000000
174 | RCC.SAI23Freq_Value=200000000
175 | RCC.SAI2Freq_Value=96000000
176 | RCC.SAI4AFreq_Value=200000000
177 | RCC.SAI4BFreq_Value=200000000
178 | RCC.SDIOFreq_Value=48000000
179 | RCC.SDMMC2Freq_Value=216000000
180 | RCC.SDMMCFreq_Value=200000000
181 | RCC.SPDIFRXFreq_Value=200000000
182 | RCC.SPI123Freq_Value=200000000
183 | RCC.SPI45Freq_Value=100000000
184 | RCC.SPI6Freq_Value=100000000
185 | RCC.SWPMI1Freq_Value=100000000
186 | RCC.SYSCLKFreq_VALUE=400000000
187 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
188 | RCC.SYSCLKSourceVirtual=RCC_SYSCLKSOURCE_PLLCLK
189 | RCC.TIM15Freq_Value=72000000
190 | RCC.TIM16Freq_Value=72000000
191 | RCC.TIM17Freq_Value=72000000
192 | RCC.TIM1Freq_Value=72000000
193 | RCC.TIM20Freq_Value=72000000
194 | RCC.TIM2Freq_Value=72000000
195 | RCC.TIM3Freq_Value=72000000
196 | RCC.TIM8Freq_Value=72000000
197 | RCC.Tim1OutputFreq_Value=200000000
198 | RCC.Tim2OutputFreq_Value=200000000
199 | RCC.TraceFreq_Value=400000000
200 | RCC.UART4Freq_Value=54000000
201 | RCC.UART5Freq_Value=54000000
202 | RCC.UART7Freq_Value=54000000
203 | RCC.UART8Freq_Value=54000000
204 | RCC.USART16Freq_Value=100000000
205 | RCC.USART1Freq_Value=108000000
206 | RCC.USART234578Freq_Value=100000000
207 | RCC.USART2Freq_Value=54000000
208 | RCC.USART3Freq_Value=54000000
209 | RCC.USART6Freq_Value=108000000
210 | RCC.USBFreq_Value=200000000
211 | RCC.VCO1OutputFreq_Value=800000000
212 | RCC.VCO2OutputFreq_Value=258000000
213 | RCC.VCO3OutputFreq_Value=258000000
214 | RCC.VCOI2SInputFreq_Value=500000
215 | RCC.VCOI2SOutputFreq_Value=192000000
216 | RCC.VCOInput1Freq_Value=16000000
217 | RCC.VCOInput2Freq_Value=2000000
218 | RCC.VCOInput3Freq_Value=2000000
219 | RCC.VCOInputFreq_Value=1000000
220 | RCC.VCOInputMFreq_Value=500000
221 | RCC.VCOOutput2Freq_Value=8000000
222 | RCC.VCOOutputFreq_Value=432000000
223 | RCC.VCOSAIOutputFreq_Value=192000000
224 | RCC.VcooutputI2S=48000000
225 | RCC.WatchDogFreq_Value=32000
226 | VP_SYS_VS_Systick.Mode=SysTick
227 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick
228 | board=NUCLEO-H743ZI
229 | boardIOC=true
230 |
--------------------------------------------------------------------------------
/Inc/intq-mobilenet-v1-models/160_0_25_parameters.h:
--------------------------------------------------------------------------------
1 | #ifndef __160_0_25_PARAMETERS_H__
2 | #define __160_0_25_PARAMETERS_H__
3 |
4 |
5 | /* Layer 1 Topology Parameters */
6 | #define CONV1_IM_DIM (160)
7 | #define CONV1_IM_CH (4)
8 | #define CONV1_KER_DIM (3)
9 | #define CONV1_L_PADDING (0)
10 | #define CONV1_R_PADDING (1)
11 | #define CONV1_T_PADDING (0)
12 | #define CONV1_B_PADDING (1)
13 | #define CONV1_STRIDE (2)
14 | #define CONV1_OUT_CH (8)
15 | #define CONV1_OUT_DIM (80)
16 |
17 |
18 | /* Layer 2 Topology Parameters */
19 | #define CONV2_IM_DIM (80)
20 | #define CONV2_IM_CH (8)
21 | #define CONV2_KER_DIM (3)
22 | #define CONV2_L_PADDING (1)
23 | #define CONV2_R_PADDING (1)
24 | #define CONV2_T_PADDING (1)
25 | #define CONV2_B_PADDING (1)
26 | #define CONV2_STRIDE (1)
27 | #define CONV2_OUT_CH (8)
28 | #define CONV2_OUT_DIM (80)
29 |
30 |
31 | /* Layer 3 Topology Parameters */
32 | #define CONV3_IM_DIM (80)
33 | #define CONV3_IM_CH (8)
34 | #define CONV3_KER_DIM (1)
35 | #define CONV3_L_PADDING (0)
36 | #define CONV3_R_PADDING (0)
37 | #define CONV3_T_PADDING (0)
38 | #define CONV3_B_PADDING (0)
39 | #define CONV3_STRIDE (1)
40 | #define CONV3_OUT_CH (16)
41 | #define CONV3_OUT_DIM (80)
42 |
43 |
44 | /* Layer 4 Topology Parameters */
45 | #define CONV4_IM_DIM (80)
46 | #define CONV4_IM_CH (16)
47 | #define CONV4_KER_DIM (3)
48 | #define CONV4_L_PADDING (0)
49 | #define CONV4_R_PADDING (1)
50 | #define CONV4_T_PADDING (0)
51 | #define CONV4_B_PADDING (1)
52 | #define CONV4_STRIDE (2)
53 | #define CONV4_OUT_CH (16)
54 | #define CONV4_OUT_DIM (40)
55 |
56 |
57 | /* Layer 5 Topology Parameters */
58 | #define CONV5_IM_DIM (40)
59 | #define CONV5_IM_CH (16)
60 | #define CONV5_KER_DIM (1)
61 | #define CONV5_L_PADDING (0)
62 | #define CONV5_R_PADDING (0)
63 | #define CONV5_T_PADDING (0)
64 | #define CONV5_B_PADDING (0)
65 | #define CONV5_STRIDE (1)
66 | #define CONV5_OUT_CH (32)
67 | #define CONV5_OUT_DIM (40)
68 |
69 |
70 | /* Layer 6 Topology Parameters */
71 | #define CONV6_IM_DIM (40)
72 | #define CONV6_IM_CH (32)
73 | #define CONV6_KER_DIM (3)
74 | #define CONV6_L_PADDING (1)
75 | #define CONV6_R_PADDING (1)
76 | #define CONV6_T_PADDING (1)
77 | #define CONV6_B_PADDING (1)
78 | #define CONV6_STRIDE (1)
79 | #define CONV6_OUT_CH (32)
80 | #define CONV6_OUT_DIM (40)
81 |
82 |
83 | /* Layer 7 Topology Parameters */
84 | #define CONV7_IM_DIM (40)
85 | #define CONV7_IM_CH (32)
86 | #define CONV7_KER_DIM (1)
87 | #define CONV7_L_PADDING (0)
88 | #define CONV7_R_PADDING (0)
89 | #define CONV7_T_PADDING (0)
90 | #define CONV7_B_PADDING (0)
91 | #define CONV7_STRIDE (1)
92 | #define CONV7_OUT_CH (32)
93 | #define CONV7_OUT_DIM (40)
94 |
95 |
96 | /* Layer 8 Topology Parameters */
97 | #define CONV8_IM_DIM (40)
98 | #define CONV8_IM_CH (32)
99 | #define CONV8_KER_DIM (3)
100 | #define CONV8_L_PADDING (0)
101 | #define CONV8_R_PADDING (1)
102 | #define CONV8_T_PADDING (0)
103 | #define CONV8_B_PADDING (1)
104 | #define CONV8_STRIDE (2)
105 | #define CONV8_OUT_CH (32)
106 | #define CONV8_OUT_DIM (20)
107 |
108 |
109 | /* Layer 9 Topology Parameters */
110 | #define CONV9_IM_DIM (20)
111 | #define CONV9_IM_CH (32)
112 | #define CONV9_KER_DIM (1)
113 | #define CONV9_L_PADDING (0)
114 | #define CONV9_R_PADDING (0)
115 | #define CONV9_T_PADDING (0)
116 | #define CONV9_B_PADDING (0)
117 | #define CONV9_STRIDE (1)
118 | #define CONV9_OUT_CH (64)
119 | #define CONV9_OUT_DIM (20)
120 |
121 |
122 | /* Layer 10 Topology Parameters */
123 | #define CONV10_IM_DIM (20)
124 | #define CONV10_IM_CH (64)
125 | #define CONV10_KER_DIM (3)
126 | #define CONV10_L_PADDING (1)
127 | #define CONV10_R_PADDING (1)
128 | #define CONV10_T_PADDING (1)
129 | #define CONV10_B_PADDING (1)
130 | #define CONV10_STRIDE (1)
131 | #define CONV10_OUT_CH (64)
132 | #define CONV10_OUT_DIM (20)
133 |
134 |
135 | /* Layer 11 Topology Parameters */
136 | #define CONV11_IM_DIM (20)
137 | #define CONV11_IM_CH (64)
138 | #define CONV11_KER_DIM (1)
139 | #define CONV11_L_PADDING (0)
140 | #define CONV11_R_PADDING (0)
141 | #define CONV11_T_PADDING (0)
142 | #define CONV11_B_PADDING (0)
143 | #define CONV11_STRIDE (1)
144 | #define CONV11_OUT_CH (64)
145 | #define CONV11_OUT_DIM (20)
146 |
147 |
148 | /* Layer 12 Topology Parameters */
149 | #define CONV12_IM_DIM (20)
150 | #define CONV12_IM_CH (64)
151 | #define CONV12_KER_DIM (3)
152 | #define CONV12_L_PADDING (0)
153 | #define CONV12_R_PADDING (1)
154 | #define CONV12_T_PADDING (0)
155 | #define CONV12_B_PADDING (1)
156 | #define CONV12_STRIDE (2)
157 | #define CONV12_OUT_CH (64)
158 | #define CONV12_OUT_DIM (10)
159 |
160 |
161 | /* Layer 13 Topology Parameters */
162 | #define CONV13_IM_DIM (10)
163 | #define CONV13_IM_CH (64)
164 | #define CONV13_KER_DIM (1)
165 | #define CONV13_L_PADDING (0)
166 | #define CONV13_R_PADDING (0)
167 | #define CONV13_T_PADDING (0)
168 | #define CONV13_B_PADDING (0)
169 | #define CONV13_STRIDE (1)
170 | #define CONV13_OUT_CH (128)
171 | #define CONV13_OUT_DIM (10)
172 |
173 |
174 | /* Layer 14 Topology Parameters */
175 | #define CONV14_IM_DIM (10)
176 | #define CONV14_IM_CH (128)
177 | #define CONV14_KER_DIM (3)
178 | #define CONV14_L_PADDING (1)
179 | #define CONV14_R_PADDING (1)
180 | #define CONV14_T_PADDING (1)
181 | #define CONV14_B_PADDING (1)
182 | #define CONV14_STRIDE (1)
183 | #define CONV14_OUT_CH (128)
184 | #define CONV14_OUT_DIM (10)
185 |
186 |
187 | /* Layer 15 Topology Parameters */
188 | #define CONV15_IM_DIM (10)
189 | #define CONV15_IM_CH (128)
190 | #define CONV15_KER_DIM (1)
191 | #define CONV15_L_PADDING (0)
192 | #define CONV15_R_PADDING (0)
193 | #define CONV15_T_PADDING (0)
194 | #define CONV15_B_PADDING (0)
195 | #define CONV15_STRIDE (1)
196 | #define CONV15_OUT_CH (128)
197 | #define CONV15_OUT_DIM (10)
198 |
199 |
200 | /* Layer 16 Topology Parameters */
201 | #define CONV16_IM_DIM (10)
202 | #define CONV16_IM_CH (128)
203 | #define CONV16_KER_DIM (3)
204 | #define CONV16_L_PADDING (1)
205 | #define CONV16_R_PADDING (1)
206 | #define CONV16_T_PADDING (1)
207 | #define CONV16_B_PADDING (1)
208 | #define CONV16_STRIDE (1)
209 | #define CONV16_OUT_CH (128)
210 | #define CONV16_OUT_DIM (10)
211 |
212 |
213 | /* Layer 17 Topology Parameters */
214 | #define CONV17_IM_DIM (10)
215 | #define CONV17_IM_CH (128)
216 | #define CONV17_KER_DIM (1)
217 | #define CONV17_L_PADDING (0)
218 | #define CONV17_R_PADDING (0)
219 | #define CONV17_T_PADDING (0)
220 | #define CONV17_B_PADDING (0)
221 | #define CONV17_STRIDE (1)
222 | #define CONV17_OUT_CH (128)
223 | #define CONV17_OUT_DIM (10)
224 |
225 |
226 | /* Layer 18 Topology Parameters */
227 | #define CONV18_IM_DIM (10)
228 | #define CONV18_IM_CH (128)
229 | #define CONV18_KER_DIM (3)
230 | #define CONV18_L_PADDING (1)
231 | #define CONV18_R_PADDING (1)
232 | #define CONV18_T_PADDING (1)
233 | #define CONV18_B_PADDING (1)
234 | #define CONV18_STRIDE (1)
235 | #define CONV18_OUT_CH (128)
236 | #define CONV18_OUT_DIM (10)
237 |
238 |
239 | /* Layer 19 Topology Parameters */
240 | #define CONV19_IM_DIM (10)
241 | #define CONV19_IM_CH (128)
242 | #define CONV19_KER_DIM (1)
243 | #define CONV19_L_PADDING (0)
244 | #define CONV19_R_PADDING (0)
245 | #define CONV19_T_PADDING (0)
246 | #define CONV19_B_PADDING (0)
247 | #define CONV19_STRIDE (1)
248 | #define CONV19_OUT_CH (128)
249 | #define CONV19_OUT_DIM (10)
250 |
251 |
252 | /* Layer 20 Topology Parameters */
253 | #define CONV20_IM_DIM (10)
254 | #define CONV20_IM_CH (128)
255 | #define CONV20_KER_DIM (3)
256 | #define CONV20_L_PADDING (1)
257 | #define CONV20_R_PADDING (1)
258 | #define CONV20_T_PADDING (1)
259 | #define CONV20_B_PADDING (1)
260 | #define CONV20_STRIDE (1)
261 | #define CONV20_OUT_CH (128)
262 | #define CONV20_OUT_DIM (10)
263 |
264 |
265 | /* Layer 21 Topology Parameters */
266 | #define CONV21_IM_DIM (10)
267 | #define CONV21_IM_CH (128)
268 | #define CONV21_KER_DIM (1)
269 | #define CONV21_L_PADDING (0)
270 | #define CONV21_R_PADDING (0)
271 | #define CONV21_T_PADDING (0)
272 | #define CONV21_B_PADDING (0)
273 | #define CONV21_STRIDE (1)
274 | #define CONV21_OUT_CH (128)
275 | #define CONV21_OUT_DIM (10)
276 |
277 |
278 | /* Layer 22 Topology Parameters */
279 | #define CONV22_IM_DIM (10)
280 | #define CONV22_IM_CH (128)
281 | #define CONV22_KER_DIM (3)
282 | #define CONV22_L_PADDING (1)
283 | #define CONV22_R_PADDING (1)
284 | #define CONV22_T_PADDING (1)
285 | #define CONV22_B_PADDING (1)
286 | #define CONV22_STRIDE (1)
287 | #define CONV22_OUT_CH (128)
288 | #define CONV22_OUT_DIM (10)
289 |
290 |
291 | /* Layer 23 Topology Parameters */
292 | #define CONV23_IM_DIM (10)
293 | #define CONV23_IM_CH (128)
294 | #define CONV23_KER_DIM (1)
295 | #define CONV23_L_PADDING (0)
296 | #define CONV23_R_PADDING (0)
297 | #define CONV23_T_PADDING (0)
298 | #define CONV23_B_PADDING (0)
299 | #define CONV23_STRIDE (1)
300 | #define CONV23_OUT_CH (128)
301 | #define CONV23_OUT_DIM (10)
302 |
303 |
304 | /* Layer 24 Topology Parameters */
305 | #define CONV24_IM_DIM (10)
306 | #define CONV24_IM_CH (128)
307 | #define CONV24_KER_DIM (3)
308 | #define CONV24_L_PADDING (0)
309 | #define CONV24_R_PADDING (1)
310 | #define CONV24_T_PADDING (0)
311 | #define CONV24_B_PADDING (1)
312 | #define CONV24_STRIDE (2)
313 | #define CONV24_OUT_CH (128)
314 | #define CONV24_OUT_DIM (5)
315 |
316 |
317 | /* Layer 25 Topology Parameters */
318 | #define CONV25_IM_DIM (5)
319 | #define CONV25_IM_CH (128)
320 | #define CONV25_KER_DIM (1)
321 | #define CONV25_L_PADDING (0)
322 | #define CONV25_R_PADDING (0)
323 | #define CONV25_T_PADDING (0)
324 | #define CONV25_B_PADDING (0)
325 | #define CONV25_STRIDE (1)
326 | #define CONV25_OUT_CH (256)
327 | #define CONV25_OUT_DIM (5)
328 |
329 |
330 | /* Layer 26 Topology Parameters */
331 | #define CONV26_IM_DIM (5)
332 | #define CONV26_IM_CH (256)
333 | #define CONV26_KER_DIM (3)
334 | #define CONV26_L_PADDING (1)
335 | #define CONV26_R_PADDING (1)
336 | #define CONV26_T_PADDING (1)
337 | #define CONV26_B_PADDING (1)
338 | #define CONV26_STRIDE (1)
339 | #define CONV26_OUT_CH (256)
340 | #define CONV26_OUT_DIM (5)
341 |
342 |
343 | /* Layer 27 Topology Parameters */
344 | #define CONV27_IM_DIM (5)
345 | #define CONV27_IM_CH (256)
346 | #define CONV27_KER_DIM (1)
347 | #define CONV27_L_PADDING (0)
348 | #define CONV27_R_PADDING (0)
349 | #define CONV27_T_PADDING (0)
350 | #define CONV27_B_PADDING (0)
351 | #define CONV27_STRIDE (1)
352 | #define CONV27_OUT_CH (256)
353 | #define CONV27_OUT_DIM (5)
354 |
355 |
356 | /* Layer 28 Topology Parameters */
357 | #define FC28_IM_CH (256)
358 | #define FC28_OUT_CH (1000)
359 |
360 |
361 | #endif /*__160_0_25_PARAMETERS_H__*/
362 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_i2c_ex.c
4 | * @author MCD Application Team
5 | * @brief I2C Extended HAL module driver.
6 | * This file provides firmware functions to manage the following
7 | * functionalities of I2C Extended peripheral:
8 | * + Extended features functions
9 | *
10 | @verbatim
11 | ==============================================================================
12 | ##### I2C peripheral Extended features #####
13 | ==============================================================================
14 |
15 | [..] Comparing to other previous devices, the I2C interface for STM32H7XX
16 | devices contains the following additional features
17 |
18 | (+) Possibility to disable or enable Analog Noise Filter
19 | (+) Use of a configured Digital Noise Filter
20 | (+) Disable or enable wakeup from Stop modes
21 | (+) Disable or enable Fast Mode Plus
22 |
23 | ##### How to use this driver #####
24 | ==============================================================================
25 | [..] This driver provides functions to configure Noise Filter and Wake Up Feature
26 | (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
27 | (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
28 | (#) Configure the enable or disable of I2C Wake Up Mode using the functions :
29 | (++) HAL_I2CEx_EnableWakeUp()
30 | (++) HAL_I2CEx_DisableWakeUp()
31 | (#) Configure the enable or disable of fast mode plus driving capability using the functions :
32 | (++) HAL_I2CEx_EnableFastModePlus()
33 | (++) HAL_I2CEx_DisableFastModePlus()
34 | @endverbatim
35 | ******************************************************************************
36 | * @attention
37 | *
38 | * © COPYRIGHT(c) 2017 STMicroelectronics
39 | *
40 | * Redistribution and use in source and binary forms, with or without modification,
41 | * are permitted provided that the following conditions are met:
42 | * 1. Redistributions of source code must retain the above copyright notice,
43 | * this list of conditions and the following disclaimer.
44 | * 2. Redistributions in binary form must reproduce the above copyright notice,
45 | * this list of conditions and the following disclaimer in the documentation
46 | * and/or other materials provided with the distribution.
47 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
48 | * may be used to endorse or promote products derived from this software
49 | * without specific prior written permission.
50 | *
51 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
52 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
53 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
54 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
55 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
56 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
57 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
58 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
59 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 | *
62 | ******************************************************************************
63 | */
64 |
65 | /* Includes ------------------------------------------------------------------*/
66 | #include "stm32h7xx_hal.h"
67 |
68 | /** @addtogroup STM32H7xx_HAL_Driver
69 | * @{
70 | */
71 |
72 | /** @defgroup I2CEx I2CEx
73 | * @brief I2C Extended HAL module driver
74 | * @{
75 | */
76 |
77 | #ifdef HAL_I2C_MODULE_ENABLED
78 |
79 | /* Private typedef -----------------------------------------------------------*/
80 | /* Private define ------------------------------------------------------------*/
81 | /* Private macro -------------------------------------------------------------*/
82 | /* Private variables ---------------------------------------------------------*/
83 | /* Private function prototypes -----------------------------------------------*/
84 | /* Private functions ---------------------------------------------------------*/
85 |
86 | /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
87 | * @{
88 | */
89 |
90 | /** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
91 | * @brief Extended features functions
92 | *
93 | @verbatim
94 | ===============================================================================
95 | ##### Extended features functions #####
96 | ===============================================================================
97 | [..] This section provides functions allowing to:
98 | (+) Configure Noise Filters
99 | (+) Configure Wake Up Feature
100 | (+) Configure Fast Mode Plus
101 |
102 | @endverbatim
103 | * @{
104 | */
105 |
106 | /**
107 | * @brief Configure I2C Analog noise filter.
108 | * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
109 | * the configuration information for the specified I2Cx peripheral.
110 | * @param AnalogFilter: New state of the Analog filter.
111 | * @retval HAL status
112 | */
113 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
114 | {
115 | /* Check the parameters */
116 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
117 | assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
118 |
119 | if(hi2c->State == HAL_I2C_STATE_READY)
120 | {
121 | /* Process Locked */
122 | __HAL_LOCK(hi2c);
123 |
124 | hi2c->State = HAL_I2C_STATE_BUSY;
125 |
126 | /* Disable the selected I2C peripheral */
127 | __HAL_I2C_DISABLE(hi2c);
128 |
129 | /* Reset I2Cx ANOFF bit */
130 | hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
131 |
132 | /* Set analog filter bit*/
133 | hi2c->Instance->CR1 |= AnalogFilter;
134 |
135 | __HAL_I2C_ENABLE(hi2c);
136 |
137 | hi2c->State = HAL_I2C_STATE_READY;
138 |
139 | /* Process Unlocked */
140 | __HAL_UNLOCK(hi2c);
141 |
142 | return HAL_OK;
143 | }
144 | else
145 | {
146 | return HAL_BUSY;
147 | }
148 | }
149 |
150 | /**
151 | * @brief Configure I2C Digital noise filter.
152 | * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
153 | * the configuration information for the specified I2Cx peripheral.
154 | * @param DigitalFilter: Coefficient of digital noise filter between 0x00 and 0x0F.
155 | * @retval HAL status
156 | */
157 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
158 | {
159 | uint32_t tmpreg = 0U;
160 |
161 | /* Check the parameters */
162 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
163 | assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
164 |
165 | if(hi2c->State == HAL_I2C_STATE_READY)
166 | {
167 | /* Process Locked */
168 | __HAL_LOCK(hi2c);
169 |
170 | hi2c->State = HAL_I2C_STATE_BUSY;
171 |
172 | /* Disable the selected I2C peripheral */
173 | __HAL_I2C_DISABLE(hi2c);
174 |
175 | /* Get the old register value */
176 | tmpreg = hi2c->Instance->CR1;
177 |
178 | /* Reset I2Cx DNF bits [11:8] */
179 | tmpreg &= ~(I2C_CR1_DNF);
180 |
181 | /* Set I2Cx DNF coefficient */
182 | tmpreg |= DigitalFilter << 8U;
183 |
184 | /* Store the new register value */
185 | hi2c->Instance->CR1 = tmpreg;
186 |
187 | __HAL_I2C_ENABLE(hi2c);
188 |
189 | hi2c->State = HAL_I2C_STATE_READY;
190 |
191 | /* Process Unlocked */
192 | __HAL_UNLOCK(hi2c);
193 |
194 | return HAL_OK;
195 | }
196 | else
197 | {
198 | return HAL_BUSY;
199 | }
200 | }
201 |
202 | /**
203 | * @brief Enable I2C wakeup from stop mode.
204 | * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
205 | * the configuration information for the specified I2Cx peripheral.
206 | * @retval HAL status
207 | */
208 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp (I2C_HandleTypeDef *hi2c)
209 | {
210 | /* Check the parameters */
211 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
212 |
213 | if(hi2c->State == HAL_I2C_STATE_READY)
214 | {
215 | /* Process Locked */
216 | __HAL_LOCK(hi2c);
217 |
218 | hi2c->State = HAL_I2C_STATE_BUSY;
219 |
220 | /* Disable the selected I2C peripheral */
221 | __HAL_I2C_DISABLE(hi2c);
222 |
223 | /* Enable wakeup from stop mode */
224 | hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
225 |
226 | __HAL_I2C_ENABLE(hi2c);
227 |
228 | hi2c->State = HAL_I2C_STATE_READY;
229 |
230 | /* Process Unlocked */
231 | __HAL_UNLOCK(hi2c);
232 |
233 | return HAL_OK;
234 | }
235 | else
236 | {
237 | return HAL_BUSY;
238 | }
239 | }
240 |
241 | /**
242 | * @brief Disable I2C wakeup from stop mode.
243 | * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
244 | * the configuration information for the specified I2Cx peripheral.
245 | * @retval HAL status
246 | */
247 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp (I2C_HandleTypeDef *hi2c)
248 | {
249 | /* Check the parameters */
250 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
251 |
252 | if(hi2c->State == HAL_I2C_STATE_READY)
253 | {
254 | /* Process Locked */
255 | __HAL_LOCK(hi2c);
256 |
257 | hi2c->State = HAL_I2C_STATE_BUSY;
258 |
259 | /* Disable the selected I2C peripheral */
260 | __HAL_I2C_DISABLE(hi2c);
261 |
262 | /* Enable wakeup from stop mode */
263 | hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
264 |
265 | __HAL_I2C_ENABLE(hi2c);
266 |
267 | hi2c->State = HAL_I2C_STATE_READY;
268 |
269 | /* Process Unlocked */
270 | __HAL_UNLOCK(hi2c);
271 |
272 | return HAL_OK;
273 | }
274 | else
275 | {
276 | return HAL_BUSY;
277 | }
278 | }
279 |
280 | /**
281 | * @brief Enable the I2C fast mode plus driving capability.
282 | * @param ConfigFastModePlus: Selects the pin.
283 | * This parameter can be one of the @ref I2CEx_FastModePlus values
284 | * @retval None
285 | */
286 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
287 | {
288 | /* Check the parameter */
289 | assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
290 |
291 | /* Enable SYSCFG clock */
292 | __HAL_RCC_SYSCFG_CLK_ENABLE();
293 |
294 | /* Enable fast mode plus driving capability for selected pin */
295 | SET_BIT(SYSCFG->PMCR, (uint32_t)ConfigFastModePlus);
296 | }
297 |
298 | /**
299 | * @brief Disable the I2C fast mode plus driving capability.
300 | * @param ConfigFastModePlus: Selects the pin.
301 | * This parameter can be one of the @ref I2CEx_FastModePlus values
302 | * @retval None
303 | */
304 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
305 | {
306 | /* Check the parameter */
307 | assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
308 |
309 | /* Enable SYSCFG clock */
310 | __HAL_RCC_SYSCFG_CLK_ENABLE();
311 |
312 | /* Disable fast mode plus driving capability for selected pin */
313 | CLEAR_BIT(SYSCFG->PMCR, (uint32_t)ConfigFastModePlus);
314 | }
315 |
316 | /**
317 | * @}
318 | */
319 |
320 | /**
321 | * @}
322 | */
323 |
324 | #endif /* HAL_I2C_MODULE_ENABLED */
325 | /**
326 | * @}
327 | */
328 |
329 | /**
330 | * @}
331 | */
332 |
333 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
334 |
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/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_gpio.h
4 | * @author MCD Application Team
5 | * @brief Header file of GPIO HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_GPIO_H
38 | #define __STM32H7xx_HAL_GPIO_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup GPIO
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /** @defgroup GPIO_Exported_Types GPIO Exported Types
57 | * @{
58 | */
59 |
60 | /**
61 | * @brief GPIO Init structure definition
62 | */
63 | typedef struct
64 | {
65 | uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
66 | This parameter can be any value of @ref GPIO_pins_define */
67 |
68 | uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
69 | This parameter can be a value of @ref GPIO_mode_define */
70 |
71 | uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
72 | This parameter can be a value of @ref GPIO_pull_define */
73 |
74 | uint32_t Speed; /*!< Specifies the speed for the selected pins.
75 | This parameter can be a value of @ref GPIO_speed_define */
76 |
77 | uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
78 | This parameter can be a value of @ref GPIO_Alternate_function_selection */
79 | }GPIO_InitTypeDef;
80 |
81 | /**
82 | * @brief GPIO Bit SET and Bit RESET enumeration
83 | */
84 | typedef enum
85 | {
86 | GPIO_PIN_RESET = 0,
87 | GPIO_PIN_SET
88 | }GPIO_PinState;
89 | /**
90 | * @}
91 | */
92 |
93 | /* Exported constants --------------------------------------------------------*/
94 |
95 | /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
96 | * @{
97 | */
98 |
99 | /** @defgroup GPIO_pins_define GPIO pins define
100 | * @{
101 | */
102 | #define GPIO_PIN_0 ((uint16_t)0x0001U) /* Pin 0 selected */
103 | #define GPIO_PIN_1 ((uint16_t)0x0002U) /* Pin 1 selected */
104 | #define GPIO_PIN_2 ((uint16_t)0x0004U) /* Pin 2 selected */
105 | #define GPIO_PIN_3 ((uint16_t)0x0008U) /* Pin 3 selected */
106 | #define GPIO_PIN_4 ((uint16_t)0x0010U) /* Pin 4 selected */
107 | #define GPIO_PIN_5 ((uint16_t)0x0020U) /* Pin 5 selected */
108 | #define GPIO_PIN_6 ((uint16_t)0x0040U) /* Pin 6 selected */
109 | #define GPIO_PIN_7 ((uint16_t)0x0080U) /* Pin 7 selected */
110 | #define GPIO_PIN_8 ((uint16_t)0x0100U) /* Pin 8 selected */
111 | #define GPIO_PIN_9 ((uint16_t)0x0200U) /* Pin 9 selected */
112 | #define GPIO_PIN_10 ((uint16_t)0x0400U) /* Pin 10 selected */
113 | #define GPIO_PIN_11 ((uint16_t)0x0800U) /* Pin 11 selected */
114 | #define GPIO_PIN_12 ((uint16_t)0x1000U) /* Pin 12 selected */
115 | #define GPIO_PIN_13 ((uint16_t)0x2000U) /* Pin 13 selected */
116 | #define GPIO_PIN_14 ((uint16_t)0x4000U) /* Pin 14 selected */
117 | #define GPIO_PIN_15 ((uint16_t)0x8000U) /* Pin 15 selected */
118 | #define GPIO_PIN_All ((uint16_t)0xFFFFU) /* All pins selected */
119 |
120 | #define GPIO_PIN_MASK ((uint32_t)0x0000FFFFU) /* PIN mask for assert test */
121 | /**
122 | * @}
123 | */
124 |
125 | /** @defgroup GPIO_mode_define GPIO mode define
126 | * @brief GPIO Configuration Mode
127 | * Elements values convention: 0xX0yz00YZ
128 | * - X : GPIO mode or EXTI Mode
129 | * - y : External IT or Event trigger detection
130 | * - z : IO configuration on External IT or Event
131 | * - Y : Output type (Push Pull or Open Drain)
132 | * - Z : IO Direction mode (Input, Output, Alternate or Analog)
133 | * @{
134 | */
135 | #define GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Input Floating Mode */
136 | #define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001U) /*!< Output Push Pull Mode */
137 | #define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011U) /*!< Output Open Drain Mode */
138 | #define GPIO_MODE_AF_PP ((uint32_t)0x00000002U) /*!< Alternate Function Push Pull Mode */
139 | #define GPIO_MODE_AF_OD ((uint32_t)0x00000012U) /*!< Alternate Function Open Drain Mode */
140 |
141 | #define GPIO_MODE_ANALOG ((uint32_t)0x00000003U) /*!< Analog Mode */
142 |
143 | #define GPIO_MODE_IT_RISING ((uint32_t)0x11110000U) /*!< External Interrupt Mode with Rising edge trigger detection */
144 | #define GPIO_MODE_IT_FALLING ((uint32_t)0x11210000U) /*!< External Interrupt Mode with Falling edge trigger detection */
145 | #define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x11310000U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
146 |
147 | #define GPIO_MODE_EVT_RISING ((uint32_t)0x11120000U) /*!< External Event Mode with Rising edge trigger detection */
148 | #define GPIO_MODE_EVT_FALLING ((uint32_t)0x11220000U) /*!< External Event Mode with Falling edge trigger detection */
149 | #define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x11320000U) /*!< External Event Mode with Rising/Falling edge trigger detection */
150 | /**
151 | * @}
152 | */
153 |
154 | /** @defgroup GPIO_speed_define GPIO speed define
155 | * @brief GPIO Output Maximum frequency
156 | * @{
157 | */
158 | #define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Low speed */
159 | #define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001U) /*!< Medium speed */
160 | #define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002U) /*!< Fast speed */
161 | #define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003U) /*!< High speed */
162 | /**
163 | * @}
164 | */
165 |
166 | /** @defgroup GPIO_pull_define GPIO pull define
167 | * @brief GPIO Pull-Up or Pull-Down Activation
168 | * @{
169 | */
170 | #define GPIO_NOPULL ((uint32_t)0x00000000U) /*!< No Pull-up or Pull-down activation */
171 | #define GPIO_PULLUP ((uint32_t)0x00000001U) /*!< Pull-up activation */
172 | #define GPIO_PULLDOWN ((uint32_t)0x00000002U) /*!< Pull-down activation */
173 | /**
174 | * @}
175 | */
176 |
177 | /**
178 | * @}
179 | */
180 |
181 | /* Exported macro ------------------------------------------------------------*/
182 | /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
183 | * @{
184 | */
185 |
186 | /**
187 | * @brief Checks whether the specified EXTI line flag is set or not.
188 | * @param __EXTI_LINE__: specifies the EXTI line flag to check.
189 | * This parameter can be GPIO_PIN_x where x can be(0..15)
190 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
191 | */
192 | #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI_D1->PR1 & (__EXTI_LINE__))
193 |
194 | /**
195 | * @brief Clears the EXTI's line pending flags.
196 | * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
197 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
198 | * @retval None
199 | */
200 | #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI_D1->PR1 = (__EXTI_LINE__))
201 |
202 | /**
203 | * @brief Checks whether the specified EXTI line is asserted or not.
204 | * @param __EXTI_LINE__: specifies the EXTI line to check.
205 | * This parameter can be GPIO_PIN_x where x can be(0..15)
206 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
207 | */
208 | #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI_D1->PR1 & (__EXTI_LINE__))
209 |
210 | /**
211 | * @brief Clears the EXTI's line pending bits.
212 | * @param __EXTI_LINE__: specifies the EXTI lines to clear.
213 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
214 | * @retval None
215 | */
216 | #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI_D1->PR1 = (__EXTI_LINE__))
217 |
218 | /**
219 | * @brief Generates a Software interrupt on selected EXTI line.
220 | * @param __EXTI_LINE__: specifies the EXTI line to check.
221 | * This parameter can be GPIO_PIN_x where x can be(0..15)
222 | * @retval None
223 | */
224 | #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 |= (__EXTI_LINE__))
225 | /**
226 | * @}
227 | */
228 |
229 | /* Include GPIO HAL Extension module */
230 | #include "stm32h7xx_hal_gpio_ex.h"
231 |
232 | /* Exported functions --------------------------------------------------------*/
233 | /** @addtogroup GPIO_Exported_Functions
234 | * @{
235 | */
236 |
237 | /** @addtogroup GPIO_Exported_Functions_Group1
238 | * @{
239 | */
240 | /* Initialization and de-initialization functions *****************************/
241 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
242 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
243 | /**
244 | * @}
245 | */
246 |
247 | /** @addtogroup GPIO_Exported_Functions_Group2
248 | * @{
249 | */
250 | /* IO operation functions *****************************************************/
251 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
252 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
253 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
254 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
255 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
256 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
257 |
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 | /* Private types -------------------------------------------------------------*/
266 | /* Private variables ---------------------------------------------------------*/
267 | /* Private constants ---------------------------------------------------------*/
268 | /** @defgroup GPIO_Private_Constants GPIO Private Constants
269 | * @{
270 | */
271 |
272 | /**
273 | * @}
274 | */
275 |
276 | /* Private macros ------------------------------------------------------------*/
277 | /** @defgroup GPIO_Private_Macros GPIO Private Macros
278 | * @{
279 | */
280 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
281 | #define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK ) != (uint32_t)0x00))
282 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
283 | ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
284 | ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
285 | ((MODE) == GPIO_MODE_AF_PP) ||\
286 | ((MODE) == GPIO_MODE_AF_OD) ||\
287 | ((MODE) == GPIO_MODE_IT_RISING) ||\
288 | ((MODE) == GPIO_MODE_IT_FALLING) ||\
289 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
290 | ((MODE) == GPIO_MODE_EVT_RISING) ||\
291 | ((MODE) == GPIO_MODE_EVT_FALLING) ||\
292 | ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
293 | ((MODE) == GPIO_MODE_ANALOG))
294 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
295 | ((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
296 |
297 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
298 | ((PULL) == GPIO_PULLDOWN))
299 | /**
300 | * @}
301 | */
302 |
303 | /* Private functions ---------------------------------------------------------*/
304 | /** @defgroup GPIO_Private_Functions GPIO Private Functions
305 | * @{
306 | */
307 |
308 | /**
309 | * @}
310 | */
311 |
312 | /**
313 | * @}
314 | */
315 |
316 | /**
317 | * @}
318 | */
319 |
320 | #ifdef __cplusplus
321 | }
322 | #endif
323 |
324 | #endif /* __STM32H7xx_HAL_GPIO_H */
325 |
326 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
327 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hsem.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_hsem.c
4 | * @author MCD Application Team
5 | * @brief HSEM HAL module driver.
6 | * This file provides firmware functions to manage the following
7 | * functionalities of the semaphore peripheral:
8 | * + Semaphore Take function (2-Step Procedure) , non blocking
9 | * + Semaphore FastTake function (1-Step Procedure) , non blocking
10 | * + Semaphore Status check
11 | * + Semaphore Clear Key Set and Get
12 | * + Release and release all functions
13 | * + Semaphore notification enabling and disabling and callnack functions
14 | * + IRQ handler management
15 | *
16 | *
17 | @verbatim
18 | ==============================================================================
19 | ##### How to use this driver #####
20 | ==============================================================================
21 | [..]
22 | (#)Take a semaphore In 2-Step mode Using function HAL_HSEM_Take. This function takes as parameters :
23 | (++) the semaphore ID from 0 to 31
24 | (++) the process ID from 0 to 255
25 | (#) Fast Take semaphore In 1-Step mode Using function HAL_HSEM_FastTake. This function takes as parameter :
26 | (++) the semaphore ID from 0_ID to 31. Note that the process ID value is implicitly assumed as zero
27 | (#) Check if a semaphore is Taken using function HAL_HSEM_IsSemTaken. This function takes as parameter :
28 | (++) the semaphore ID from 0_ID to 31
29 | (++) It returns 1 if the given semaphore is taken otherwise (Free) zero.
30 | (#)Release a semaphore using function with HAL_HSEM_Release. This function takes as parameters :
31 | (++) the semaphore ID from 0 to 31
32 | (++) the process ID from 0 to 255:
33 | (++) Note: If ProcessID and MasterID match, semaphore is freed, and an interrupt
34 | may be generated when enabled (notification activated). If ProcessID or MasterID does not match,
35 | semaphore remains taken (locked).
36 |
37 | (#)Release all semaphores at once taken by a given Master using function HAL_HSEM_Release_All
38 | This function takes as parameters :
39 | (++) the Release Key (value from 0 to 0xFFFF) can be Set or Get respectively by
40 | HAL_HSEM_SetClearKey() or HAL_HSEM_GetClearKey functions
41 | (++) the Master ID:
42 | (++) Note: If the Key and MasterID match, all semaphores taken by the given CPU that corresponds
43 | to MasterID will be freed, and an interrupt may be generated when enabled (notification activated). If the
44 | Key or the MasterID doesn't match, semaphores remains taken (locked).
45 |
46 | (#)Semaphores Release all key functions:
47 | (++) HAL_HSEM_SetClearKey() to set semaphore release all Key
48 | (++) HAL_HSEM_GetClearKey() to get release all Key
49 | (#)Semaphores notification functions :
50 | (++) HAL_HSEM_ActivateNotification to activate a notification callback on
51 | a given semaphores Mask (bitfield). When one or more semaphores defined by the mask are released
52 | the callback HAL_HSEM_FreeCallback will be asserted giving as parameters a mask of the released
53 | semaphores (bitfield).
54 |
55 | (++) HAL_HSEM_DeactivateNotification to deactivate the notification of a given semaphores Mask (bitfield).
56 | (++) See the description of the macro __HAL_HSEM_SEMID_TO_MASK to check how to calculate a semaphore mask
57 | Used by the notification functions
58 | *** HSEM HAL driver macros list ***
59 | =============================================
60 | [..] Below the list of most used macros in HSEM HAL driver.
61 |
62 | (+) __HAL_HSEM_SEMID_TO_MASK: Helper macro to convert a Semaphore ID to a Mask.
63 | [..] Example of use :
64 | [..] mask = __HAL_HSEM_SEMID_TO_MASK(8) | __HAL_HSEM_SEMID_TO_MASK(21) | __HAL_HSEM_SEMID_TO_MASK(25).
65 | [..] All next macros take as parameter a semaphore Mask (bitfiled) that can be constructed using __HAL_HSEM_SEMID_TO_MASK as the above example.
66 | (+) __HAL_HSEM_ENABLE_IT: Enable the specified semaphores Mask interrupts.
67 | (+) __HAL_HSEM_DISABLE_IT: Disable the specified semaphores Mask interrupts.
68 | (+) __HAL_HSEM_GET_IT: Checks whether the specified semaphore interrupt has occurred or not.
69 | (+) __HAL_HSEM_GET_FLAG: Get the semaphores status release flags.
70 | (+) __HAL_HSEM_CLEAR_FLAG: Clear the semaphores status release flags.
71 |
72 | @endverbatim
73 | ******************************************************************************
74 | * @attention
75 | *
76 | * © COPYRIGHT(c) 2017 STMicroelectronics
77 | *
78 | * Redistribution and use in source and binary forms, with or without modification,
79 | * are permitted provided that the following conditions are met:
80 | * 1. Redistributions of source code must retain the above copyright notice,
81 | * this list of conditions and the following disclaimer.
82 | * 2. Redistributions in binary form must reproduce the above copyright notice,
83 | * this list of conditions and the following disclaimer in the documentation
84 | * and/or other materials provided with the distribution.
85 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
86 | * may be used to endorse or promote products derived from this software
87 | * without specific prior written permission.
88 | *
89 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
90 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
91 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
92 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
93 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
94 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
95 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
96 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
97 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
98 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 | *
100 | ******************************************************************************
101 | */
102 |
103 | /* Includes ------------------------------------------------------------------*/
104 | #include "stm32h7xx_hal.h"
105 |
106 | /** @addtogroup STM32H7xx_HAL_Driver
107 | * @{
108 | */
109 |
110 | /** @defgroup HSEM HSEM
111 | * @brief HSEM HAL module driver
112 | * @{
113 | */
114 |
115 | #ifdef HAL_HSEM_MODULE_ENABLED
116 |
117 | /* Private typedef -----------------------------------------------------------*/
118 | /* Private define ------------------------------------------------------------*/
119 | /* Private macro -------------------------------------------------------------*/
120 | /* Private variables ---------------------------------------------------------*/
121 | /* Private function prototypes -----------------------------------------------*/
122 | /* Private functions ---------------------------------------------------------*/
123 | /* Exported functions --------------------------------------------------------*/
124 |
125 | /** @defgroup HSEM_Exported_Functions HSEM Exported Functions
126 | * @{
127 | */
128 |
129 | /** @defgroup HSEM_Exported_Functions_Group1 Take and Release functions
130 | * @brief HSEM Take and Release functions
131 | *
132 | @verbatim
133 | ==============================================================================
134 | ##### HSEM Take and Release functions #####
135 | ==============================================================================
136 | [..] This section provides functions allowing to:
137 | (+) Take a semaphore with 2 Step method
138 | (+) Fast Take a semaphore with 1 Step method
139 | (+) Check semaphore state Taken or not
140 | (+) Release a semaphore
141 | (+) Release all semaphore at once
142 |
143 | @endverbatim
144 | * @{
145 | */
146 |
147 |
148 | /**
149 | * @brief Take a semaphore in 2 Step mode.
150 | * @param SemID: semaphore ID from 0 to 31
151 | * @param ProcessID: Process ID from 0 to 255
152 | * @retval HAL status
153 | */
154 | HAL_StatusTypeDef HAL_HSEM_Take(uint32_t SemID, uint32_t ProcessID)
155 | {
156 | /* Check the parameters */
157 | assert_param(IS_HSEM_SEMID(SemID));
158 | assert_param(IS_HSEM_PROCESSID(ProcessID));
159 |
160 | /* First step write R register with MasterID, processID and take bit=1*/
161 | HSEM->R[SemID] = ((ProcessID & HSEM_R_PROCID) | ((HAL_GetCurrentCPUID() << POSITION_VAL(HSEM_R_MASTERID)) & HSEM_R_MASTERID) | HSEM_R_LOCK);
162 |
163 | /* second step : read the R register . Take achieved if MasterID and processID match and take bit set to 1 */
164 | if(HSEM->R[SemID] == ((ProcessID & HSEM_R_PROCID) | ((HAL_GetCurrentCPUID() << POSITION_VAL(HSEM_R_MASTERID)) & HSEM_R_MASTERID) | HSEM_R_LOCK))
165 | {
166 | /*take success when MasterID and ProcessID match and take bit set*/
167 | return HAL_OK;
168 | }
169 |
170 | /* Semaphore take fails*/
171 | return HAL_ERROR;
172 | }
173 |
174 | /**
175 | * @brief Fast Take a semaphore with 1 Step mode.
176 | * @param SemID: semaphore ID from 0 to 31
177 | * @retval HAL status
178 | */
179 | HAL_StatusTypeDef HAL_HSEM_FastTake(uint32_t SemID)
180 | {
181 | /* Check the parameters */
182 | assert_param(IS_HSEM_SEMID(SemID));
183 |
184 | /* Read the RLR register to take the semaphore */
185 | if(HSEM->RLR[SemID] == (((HAL_GetCurrentCPUID() << POSITION_VAL(HSEM_R_MASTERID)) & HSEM_RLR_MASTERID) | HSEM_RLR_LOCK))
186 | {
187 | /*take success when MasterID match and take bit set*/
188 | return HAL_OK;
189 | }
190 |
191 | /* Semaphore take fails */
192 | return HAL_ERROR;
193 | }
194 |
195 | /**
196 | * @brief Check semaphore state Taken or not.
197 | * @param SemID: semaphore ID
198 | * @retval HAL HSEM state
199 | */
200 | uint32_t HAL_HSEM_IsSemTaken(uint32_t SemID)
201 | {
202 | return ((HSEM->R[SemID] & HSEM_R_LOCK) != 0U);
203 | }
204 |
205 |
206 | /**
207 | * @brief Release a semaphore.
208 | * @param SemID: semaphore ID from 0 to 31
209 | * @param ProcessID: Process ID from 0 to 255
210 | * @retval None
211 | */
212 | void HAL_HSEM_Release(uint32_t SemID, uint32_t ProcessID)
213 | {
214 | /* Check the parameters */
215 | assert_param(IS_HSEM_SEMID(SemID));
216 | assert_param(IS_HSEM_PROCESSID(ProcessID));
217 |
218 | /* Clear the semaphore by writing to the R register : the MasterID , the processID and take bit = 0 */
219 | HSEM->R[SemID] = ((ProcessID & HSEM_R_PROCID) | ((HAL_GetCurrentCPUID() << POSITION_VAL(HSEM_R_MASTERID)) & HSEM_R_MASTERID));
220 |
221 | }
222 |
223 | /**
224 | * @brief Release All semaphore used by a given Master .
225 | * @param Key: Semaphore Key , value from 0 to 0xFFFF
226 | * @param MasterID: MasterID of the CPU that is using semaphores to be Released
227 | * @retval None
228 | */
229 | void HAL_HSEM_ReleaseAll(uint32_t Key, uint32_t MasterID)
230 | {
231 | assert_param(IS_HSEM_KEY(Key));
232 | assert_param(IS_HSEM_MASTERID(MasterID));
233 |
234 | HSEM->CR = (((Key << POSITION_VAL(HSEM_KEYR_KEY)) & HSEM_CR_KEY ) | ((MasterID << POSITION_VAL(HSEM_CR_MASTERID)) & HSEM_CR_MASTERID));
235 | }
236 |
237 | /**
238 | * @}
239 | */
240 |
241 | /** @defgroup HSEM_Exported_Functions_Group2 HSEM Set and Get Key functions
242 | * @brief HSEM Set and Get Key functions.
243 | *
244 | @verbatim
245 | ==============================================================================
246 | ##### HSEM Set and Get Key functions #####
247 | ==============================================================================
248 | [..] This section provides functions allowing to:
249 | (+) Set semaphore Key
250 | (+) Get semaphore Key
251 | @endverbatim
252 |
253 | * @{
254 | */
255 |
256 | /**
257 | * @brief Set semaphore Key .
258 | * @param Key: Semaphore Key , value from 0 to 0xFFFF
259 | * @retval None
260 | */
261 | void HAL_HSEM_SetClearKey(uint32_t Key)
262 | {
263 | assert_param(IS_HSEM_KEY(Key));
264 |
265 | MODIFY_REG(HSEM->KEYR, HSEM_KEYR_KEY, (Key << POSITION_VAL(HSEM_KEYR_KEY)));
266 |
267 | }
268 |
269 | /**
270 | * @brief Get semaphore Key .
271 | * @retval Semaphore Key , value from 0 to 0xFFFF
272 | */
273 | uint32_t HAL_HSEM_GetClearKey(void)
274 | {
275 | return (HSEM->KEYR >> POSITION_VAL(HSEM_KEYR_KEY));
276 | }
277 |
278 | /**
279 | * @}
280 | */
281 |
282 | /** @defgroup HSEM_Exported_Functions_Group3 HSEM IRQ handler management
283 | * @brief HSEM Notification functions.
284 | *
285 | @verbatim
286 | ==============================================================================
287 | ##### HSEM IRQ handler management and Notification functions #####
288 | ==============================================================================
289 | [..] This section provides HSEM IRQ handler and Notification function.
290 |
291 | @endverbatim
292 | * @{
293 | */
294 |
295 | /**
296 | * @brief Activate Semaphore release Notification for a given Semaphores Mask .
297 | * @param SemMask: Mask of Released semaphores
298 | * @retval Semaphore Key
299 | */
300 | void HAL_HSEM_ActivateNotification(uint32_t SemMask)
301 | {
302 | /*Activate interrupt for CM7 Master */
303 | HSEM->IER |= SemMask;
304 | }
305 |
306 | /**
307 | * @brief Deactivate Semaphore release Notification for a given Semaphores Mask .
308 | * @param SemMask: Mask of Released semaphores
309 | * @retval Semaphore Key
310 | */
311 | void HAL_HSEM_DeactivateNotification(uint32_t SemMask)
312 | {
313 |
314 | /*Deactivate interrupt for CM7 Master */
315 | HSEM->IER &= ~SemMask;
316 | }
317 |
318 | /**
319 | * @brief This function handles HSEM interrupt request.
320 | * @retval None
321 | */
322 | void HAL_HSEM_IRQHandler(void)
323 | {
324 | uint32_t statusreg = 0U;
325 |
326 | /* Get the list of masked freed semaphores*/
327 | statusreg = HSEM->MISR;
328 |
329 | /*Disable Interrupts*/
330 | HSEM->IER &= ~((uint32_t)statusreg);
331 |
332 | /*Clear Flags*/
333 | HSEM->ICR |= ((uint32_t)statusreg);
334 |
335 |
336 | /* Call FreeCallback */
337 | HAL_HSEM_FreeCallback(statusreg);
338 | }
339 |
340 | /**
341 | * @brief Semaphore Released Callback.
342 | * @param SemMask: Mask of Released semaphores
343 | * @retval None
344 | */
345 | __weak void HAL_HSEM_FreeCallback(uint32_t SemMask)
346 | {
347 | /* Prevent unused argument(s) compilation warning */
348 | UNUSED(SemMask);
349 |
350 | /* NOTE : This function should not be modified, when the callback is needed,
351 | the HAL_HSEM_FreeCallback can be implemented in the user file
352 | */
353 | }
354 |
355 | /**
356 | * @}
357 | */
358 |
359 | /**
360 | * @}
361 | */
362 |
363 | #endif /* HAL_HSEM_MODULE_ENABLED */
364 | /**
365 | * @}
366 | */
367 |
368 | /**
369 | * @}
370 | */
371 |
372 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
373 |
--------------------------------------------------------------------------------
/Inc/stm32h7xx_hal_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_conf_template.h
4 | * @brief HAL configuration template file.
5 | * This file should be copied to the application folder and renamed
6 | * to stm32h7xx_hal_conf.h.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © COPYRIGHT(c) 2019 STMicroelectronics
11 | *
12 | * Redistribution and use in source and binary forms, with or without modification,
13 | * are permitted provided that the following conditions are met:
14 | * 1. Redistributions of source code must retain the above copyright notice,
15 | * this list of conditions and the following disclaimer.
16 | * 2. Redistributions in binary form must reproduce the above copyright notice,
17 | * this list of conditions and the following disclaimer in the documentation
18 | * and/or other materials provided with the distribution.
19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
20 | * may be used to endorse or promote products derived from this software
21 | * without specific prior written permission.
22 | *
23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 | *
34 | ******************************************************************************
35 | */
36 |
37 | /* Define to prevent recursive inclusion -------------------------------------*/
38 | #ifndef __STM32H7xx_HAL_CONF_H
39 | #define __STM32H7xx_HAL_CONF_H
40 |
41 | #ifdef __cplusplus
42 | extern "C" {
43 | #endif
44 |
45 | /* Exported types ------------------------------------------------------------*/
46 | /* Exported constants --------------------------------------------------------*/
47 |
48 | /* ########################## Module Selection ############################## */
49 | /**
50 | * @brief This is the list of modules to be used in the HAL driver
51 | */
52 | #define HAL_MODULE_ENABLED
53 |
54 | /* #define HAL_ADC_MODULE_ENABLED */
55 | /* #define HAL_FDCAN_MODULE_ENABLED */
56 | /* #define HAL_CEC_MODULE_ENABLED */
57 | /* #define HAL_COMP_MODULE_ENABLED */
58 | /* #define HAL_CRC_MODULE_ENABLED */
59 | /* #define HAL_CRYP_MODULE_ENABLED */
60 | /* #define HAL_DAC_MODULE_ENABLED */
61 | /* #define HAL_DCMI_MODULE_ENABLED */
62 | /* #define HAL_DMA2D_MODULE_ENABLED */
63 | /* #define HAL_ETH_MODULE_ENABLED */
64 | /* #define HAL_NAND_MODULE_ENABLED */
65 | /* #define HAL_NOR_MODULE_ENABLED */
66 | /* #define HAL_SRAM_MODULE_ENABLED */
67 | /* #define HAL_SDRAM_MODULE_ENABLED */
68 | /* #define HAL_HASH_MODULE_ENABLED */
69 | /* #define HAL_HRTIM_MODULE_ENABLED */
70 | /* #define HAL_HSEM_MODULE_ENABLED */
71 | /* #define HAL_JPEG_MODULE_ENABLED */
72 | /* #define HAL_OPAMP_MODULE_ENABLED */
73 | /* #define HAL_I2S_MODULE_ENABLED */
74 | /* #define HAL_SMBUS_MODULE_ENABLED */
75 | /* #define HAL_IWDG_MODULE_ENABLED */
76 | /* #define HAL_LPTIM_MODULE_ENABLED */
77 | /* #define HAL_LTDC_MODULE_ENABLED */
78 | /* #define HAL_QSPI_MODULE_ENABLED */
79 | /* #define HAL_RNG_MODULE_ENABLED */
80 | /* #define HAL_RTC_MODULE_ENABLED */
81 | /* #define HAL_SAI_MODULE_ENABLED */
82 | /* #define HAL_SD_MODULE_ENABLED */
83 | /* #define HAL_MMC_MODULE_ENABLED */
84 | /* #define HAL_SPDIFRX_MODULE_ENABLED */
85 | /* #define HAL_SPI_MODULE_ENABLED */
86 | /* #define HAL_SWPMI_MODULE_ENABLED */
87 | /* #define HAL_TIM_MODULE_ENABLED */
88 | /* #define HAL_UART_MODULE_ENABLED */
89 | /* #define HAL_USART_MODULE_ENABLED */
90 | /* #define HAL_IRDA_MODULE_ENABLED */
91 | /* #define HAL_SMARTCARD_MODULE_ENABLED */
92 | /* #define HAL_WWDG_MODULE_ENABLED */
93 | /* #define HAL_PCD_MODULE_ENABLED */
94 | /* #define HAL_HCD_MODULE_ENABLED */
95 | /* #define HAL_DFSDM_MODULE_ENABLED */
96 | /* #define HAL_DSI_MODULE_ENABLED */
97 | /* #define HAL_JPEG_MODULE_ENABLED */
98 | /* #define HAL_MDIOS_MODULE_ENABLED */
99 | /* #define HAL_EXTI_MODULE_ENABLED */
100 | #define HAL_GPIO_MODULE_ENABLED
101 | #define HAL_DMA_MODULE_ENABLED
102 | #define HAL_MDMA_MODULE_ENABLED
103 | #define HAL_RCC_MODULE_ENABLED
104 | #define HAL_FLASH_MODULE_ENABLED
105 | #define HAL_PWR_MODULE_ENABLED
106 | #define HAL_I2C_MODULE_ENABLED
107 | #define HAL_CORTEX_MODULE_ENABLED
108 | #define HAL_HSEM_MODULE_ENABLED
109 |
110 | /* ########################## Oscillator Values adaptation ####################*/
111 | /**
112 | * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
113 | * This value is used by the RCC HAL module to compute the system frequency
114 | * (when HSE is used as system clock source, directly or through the PLL).
115 | */
116 | #if !defined (HSE_VALUE)
117 | #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
118 | #endif /* HSE_VALUE */
119 |
120 | #if !defined (HSE_STARTUP_TIMEOUT)
121 | #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
122 | #endif /* HSE_STARTUP_TIMEOUT */
123 |
124 | /**
125 | * @brief Internal oscillator (CSI) default value.
126 | * This value is the default CSI value after Reset.
127 | */
128 | #if !defined (CSI_VALUE)
129 | #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
130 | #endif /* CSI_VALUE */
131 |
132 | /**
133 | * @brief Internal High Speed oscillator (HSI) value.
134 | * This value is used by the RCC HAL module to compute the system frequency
135 | * (when HSI is used as system clock source, directly or through the PLL).
136 | */
137 | #if !defined (HSI_VALUE)
138 | #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
139 | #endif /* HSI_VALUE */
140 |
141 | /**
142 | * @brief External Low Speed oscillator (LSE) value.
143 | * This value is used by the UART, RTC HAL module to compute the system frequency
144 | */
145 | #if !defined (LSE_VALUE)
146 | #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
147 | #endif /* LSE_VALUE */
148 |
149 | #if !defined (LSE_STARTUP_TIMEOUT)
150 | #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
151 | #endif /* LSE_STARTUP_TIMEOUT */
152 |
153 | /**
154 | * @brief External clock source for I2S peripheral
155 | * This value is used by the I2S HAL module to compute the I2S clock source
156 | * frequency, this source is inserted directly through I2S_CKIN pad.
157 | */
158 | #if !defined (EXTERNAL_CLOCK_VALUE)
159 | #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
160 | #endif /* EXTERNAL_CLOCK_VALUE */
161 |
162 | /* Tip: To avoid modifying this file each time you need to use different HSE,
163 | === you can define the HSE value in your toolchain compiler preprocessor. */
164 |
165 | /* ########################### System Configuration ######################### */
166 | /**
167 | * @brief This is the HAL system configuration section
168 | */
169 | #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
170 | #define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
171 | #define USE_RTOS 0U
172 | #define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
173 | /* ########################## Assert Selection ############################## */
174 | /**
175 | * @brief Uncomment the line below to expanse the "assert_param" macro in the
176 | * HAL drivers code
177 | */
178 | /* #define USE_FULL_ASSERT 1U */
179 |
180 | /* ################## SPI peripheral configuration ########################## */
181 |
182 | /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
183 | * Activated: CRC code is present inside driver
184 | * Deactivated: CRC code cleaned from driver
185 | */
186 |
187 | #define USE_SPI_CRC 0U
188 |
189 | /* ################## ETH peripheral configuration ########################## */
190 |
191 | #define ETH_TX_DESC_CNT ((uint32_t)4U) /* Tx Descriptor Length */
192 | #define ETH_RX_DESC_CNT ((uint32_t)4U) /* Rx Descriptor Length */
193 |
194 | /* Includes ------------------------------------------------------------------*/
195 | /**
196 | * @brief Include module's header file
197 | */
198 |
199 | #ifdef HAL_RCC_MODULE_ENABLED
200 | #include "stm32h7xx_hal_rcc.h"
201 | #endif /* HAL_RCC_MODULE_ENABLED */
202 |
203 | #ifdef HAL_EXTI_MODULE_ENABLED
204 | #include "stm32h7xx_hal_exti.h"
205 | #endif /* HAL_EXTI_MODULE_ENABLED */
206 |
207 | #ifdef HAL_GPIO_MODULE_ENABLED
208 | #include "stm32h7xx_hal_gpio.h"
209 | #endif /* HAL_GPIO_MODULE_ENABLED */
210 |
211 | #ifdef HAL_DMA_MODULE_ENABLED
212 | #include "stm32h7xx_hal_dma.h"
213 | #endif /* HAL_DMA_MODULE_ENABLED */
214 |
215 | #ifdef HAL_HASH_MODULE_ENABLED
216 | #include "stm32h7xx_hal_hash.h"
217 | #endif /* HAL_HASH_MODULE_ENABLED */
218 |
219 | #ifdef HAL_DCMI_MODULE_ENABLED
220 | #include "stm32h7xx_hal_dcmi.h"
221 | #endif /* HAL_DCMI_MODULE_ENABLED */
222 |
223 | #ifdef HAL_DMA2D_MODULE_ENABLED
224 | #include "stm32h7xx_hal_dma2d.h"
225 | #endif /* HAL_DMA2D_MODULE_ENABLED */
226 |
227 | #ifdef HAL_DFSDM_MODULE_ENABLED
228 | #include "stm32h7xx_hal_dfsdm.h"
229 | #endif /* HAL_DFSDM_MODULE_ENABLED */
230 |
231 | #ifdef HAL_ETH_MODULE_ENABLED
232 | #include "stm32h7xx_hal_eth.h"
233 | #endif /* HAL_ETH_MODULE_ENABLED */
234 |
235 | #ifdef HAL_CORTEX_MODULE_ENABLED
236 | #include "stm32h7xx_hal_cortex.h"
237 | #endif /* HAL_CORTEX_MODULE_ENABLED */
238 |
239 | #ifdef HAL_ADC_MODULE_ENABLED
240 | #include "stm32h7xx_hal_adc.h"
241 | #endif /* HAL_ADC_MODULE_ENABLED */
242 |
243 | #ifdef HAL_FDCAN_MODULE_ENABLED
244 | #include "stm32h7xx_hal_fdcan.h"
245 | #endif /* HAL_FDCAN_MODULE_ENABLED */
246 |
247 | #ifdef HAL_CEC_MODULE_ENABLED
248 | #include "stm32h7xx_hal_cec.h"
249 | #endif /* HAL_CEC_MODULE_ENABLED */
250 |
251 | #ifdef HAL_COMP_MODULE_ENABLED
252 | #include "stm32h7xx_hal_comp.h"
253 | #endif /* HAL_COMP_MODULE_ENABLED */
254 |
255 | #ifdef HAL_CRC_MODULE_ENABLED
256 | #include "stm32h7xx_hal_crc.h"
257 | #endif /* HAL_CRC_MODULE_ENABLED */
258 |
259 | #ifdef HAL_CRYP_MODULE_ENABLED
260 | #include "stm32h7xx_hal_cryp.h"
261 | #endif /* HAL_CRYP_MODULE_ENABLED */
262 |
263 | #ifdef HAL_DAC_MODULE_ENABLED
264 | #include "stm32h7xx_hal_dac.h"
265 | #endif /* HAL_DAC_MODULE_ENABLED */
266 |
267 | #ifdef HAL_FLASH_MODULE_ENABLED
268 | #include "stm32h7xx_hal_flash.h"
269 | #endif /* HAL_FLASH_MODULE_ENABLED */
270 |
271 | #ifdef HAL_HRTIM_MODULE_ENABLED
272 | #include "stm32h7xx_hal_hrtim.h"
273 | #endif /* HAL_HRTIM_MODULE_ENABLED */
274 |
275 | #ifdef HAL_HSEM_MODULE_ENABLED
276 | #include "stm32h7xx_hal_hsem.h"
277 | #endif /* HAL_HSEM_MODULE_ENABLED */
278 |
279 | #ifdef HAL_SRAM_MODULE_ENABLED
280 | #include "stm32h7xx_hal_sram.h"
281 | #endif /* HAL_SRAM_MODULE_ENABLED */
282 |
283 | #ifdef HAL_NOR_MODULE_ENABLED
284 | #include "stm32h7xx_hal_nor.h"
285 | #endif /* HAL_NOR_MODULE_ENABLED */
286 |
287 | #ifdef HAL_NAND_MODULE_ENABLED
288 | #include "stm32h7xx_hal_nand.h"
289 | #endif /* HAL_NAND_MODULE_ENABLED */
290 |
291 | #ifdef HAL_I2C_MODULE_ENABLED
292 | #include "stm32h7xx_hal_i2c.h"
293 | #endif /* HAL_I2C_MODULE_ENABLED */
294 |
295 | #ifdef HAL_I2S_MODULE_ENABLED
296 | #include "stm32h7xx_hal_i2s.h"
297 | #endif /* HAL_I2S_MODULE_ENABLED */
298 |
299 | #ifdef HAL_IWDG_MODULE_ENABLED
300 | #include "stm32h7xx_hal_iwdg.h"
301 | #endif /* HAL_IWDG_MODULE_ENABLED */
302 |
303 | #ifdef HAL_JPEG_MODULE_ENABLED
304 | #include "stm32h7xx_hal_jpeg.h"
305 | #endif /* HAL_JPEG_MODULE_ENABLED */
306 |
307 | #ifdef HAL_MDIOS_MODULE_ENABLED
308 | #include "stm32h7xx_hal_mdios.h"
309 | #endif /* HAL_MDIOS_MODULE_ENABLED */
310 |
311 | #ifdef HAL_MDMA_MODULE_ENABLED
312 | #include "stm32h7xx_hal_mdma.h"
313 | #endif /* HAL_MDMA_MODULE_ENABLED */
314 |
315 | #ifdef HAL_LPTIM_MODULE_ENABLED
316 | #include "stm32h7xx_hal_lptim.h"
317 | #endif /* HAL_LPTIM_MODULE_ENABLED */
318 |
319 | #ifdef HAL_LTDC_MODULE_ENABLED
320 | #include "stm32h7xx_hal_ltdc.h"
321 | #endif /* HAL_LTDC_MODULE_ENABLED */
322 |
323 | #ifdef HAL_OPAMP_MODULE_ENABLED
324 | #include "stm32h7xx_hal_opamp.h"
325 | #endif /* HAL_OPAMP_MODULE_ENABLED */
326 |
327 | #ifdef HAL_PWR_MODULE_ENABLED
328 | #include "stm32h7xx_hal_pwr.h"
329 | #endif /* HAL_PWR_MODULE_ENABLED */
330 |
331 | #ifdef HAL_QSPI_MODULE_ENABLED
332 | #include "stm32h7xx_hal_qspi.h"
333 | #endif /* HAL_QSPI_MODULE_ENABLED */
334 |
335 | #ifdef HAL_RNG_MODULE_ENABLED
336 | #include "stm32h7xx_hal_rng.h"
337 | #endif /* HAL_RNG_MODULE_ENABLED */
338 |
339 | #ifdef HAL_RTC_MODULE_ENABLED
340 | #include "stm32h7xx_hal_rtc.h"
341 | #endif /* HAL_RTC_MODULE_ENABLED */
342 |
343 | #ifdef HAL_SAI_MODULE_ENABLED
344 | #include "stm32h7xx_hal_sai.h"
345 | #endif /* HAL_SAI_MODULE_ENABLED */
346 |
347 | #ifdef HAL_SD_MODULE_ENABLED
348 | #include "stm32h7xx_hal_sd.h"
349 | #endif /* HAL_SD_MODULE_ENABLED */
350 |
351 | #ifdef HAL_MMC_MODULE_ENABLED
352 | #include "stm32h7xx_hal_mmc.h"
353 | #endif /* HAL_MMC_MODULE_ENABLED */
354 |
355 | #ifdef HAL_SDRAM_MODULE_ENABLED
356 | #include "stm32h7xx_hal_sdram.h"
357 | #endif /* HAL_SDRAM_MODULE_ENABLED */
358 |
359 | #ifdef HAL_SPI_MODULE_ENABLED
360 | #include "stm32h7xx_hal_spi.h"
361 | #endif /* HAL_SPI_MODULE_ENABLED */
362 |
363 | #ifdef HAL_SPDIFRX_MODULE_ENABLED
364 | #include "stm32h7xx_hal_spdifrx.h"
365 | #endif /* HAL_SPDIFRX_MODULE_ENABLED */
366 |
367 | #ifdef HAL_SWPMI_MODULE_ENABLED
368 | #include "stm32h7xx_hal_swpmi.h"
369 | #endif /* HAL_SWPMI_MODULE_ENABLED */
370 |
371 | #ifdef HAL_TIM_MODULE_ENABLED
372 | #include "stm32h7xx_hal_tim.h"
373 | #endif /* HAL_TIM_MODULE_ENABLED */
374 |
375 | #ifdef HAL_UART_MODULE_ENABLED
376 | #include "stm32h7xx_hal_uart.h"
377 | #endif /* HAL_UART_MODULE_ENABLED */
378 |
379 | #ifdef HAL_USART_MODULE_ENABLED
380 | #include "stm32h7xx_hal_usart.h"
381 | #endif /* HAL_USART_MODULE_ENABLED */
382 |
383 | #ifdef HAL_IRDA_MODULE_ENABLED
384 | #include "stm32h7xx_hal_irda.h"
385 | #endif /* HAL_IRDA_MODULE_ENABLED */
386 |
387 | #ifdef HAL_SMARTCARD_MODULE_ENABLED
388 | #include "stm32h7xx_hal_smartcard.h"
389 | #endif /* HAL_SMARTCARD_MODULE_ENABLED */
390 |
391 | #ifdef HAL_SMBUS_MODULE_ENABLED
392 | #include "stm32h7xx_hal_smbus.h"
393 | #endif /* HAL_SMBUS_MODULE_ENABLED */
394 |
395 | #ifdef HAL_WWDG_MODULE_ENABLED
396 | #include "stm32h7xx_hal_wwdg.h"
397 | #endif /* HAL_WWDG_MODULE_ENABLED */
398 |
399 | #ifdef HAL_PCD_MODULE_ENABLED
400 | #include "stm32h7xx_hal_pcd.h"
401 | #endif /* HAL_PCD_MODULE_ENABLED */
402 |
403 | #ifdef HAL_HCD_MODULE_ENABLED
404 | #include "stm32h7xx_hal_hcd.h"
405 | #endif /* HAL_HCD_MODULE_ENABLED */
406 |
407 | /* Exported macro ------------------------------------------------------------*/
408 | #ifdef USE_FULL_ASSERT
409 | /**
410 | * @brief The assert_param macro is used for function's parameters check.
411 | * @param expr: If expr is false, it calls assert_failed function
412 | * which reports the name of the source file and the source
413 | * line number of the call that failed.
414 | * If expr is true, it returns no value.
415 | * @retval None
416 | */
417 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
418 | /* Exported functions ------------------------------------------------------- */
419 | void assert_failed(uint8_t* file, uint32_t line);
420 | #else
421 | #define assert_param(expr) ((void)0)
422 | #endif /* USE_FULL_ASSERT */
423 |
424 | #ifdef __cplusplus
425 | }
426 | #endif
427 |
428 | #endif /* __STM32H7xx_HAL_CONF_H */
429 |
430 |
431 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
432 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_dma_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of DMA HAL extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_DMA_EX_H
38 | #define __STM32H7xx_HAL_DMA_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup DMAEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
57 | * @brief DMAEx Exported types
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief HAL DMA Memory definition
63 | */
64 | typedef enum
65 | {
66 | MEMORY0 = 0x00U, /*!< Memory 0 */
67 | MEMORY1 = 0x01U, /*!< Memory 1 */
68 |
69 | }HAL_DMA_MemoryTypeDef;
70 |
71 | /**
72 | * @brief HAL DMAMUX Synchronization configuration structure definition
73 | */
74 | typedef struct
75 | {
76 | uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
77 | This parameter can be a value of @ref DMAEx_MUX_SyncSignalID_selection */
78 |
79 | uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
80 | This parameter can be a value of @ref DMAEx_MUX_SyncPolarity_selection */
81 |
82 | FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
83 | This parameter can take the value ENABLE or DISABLE*/
84 |
85 |
86 | FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
87 | This parameter can take the value ENABLE or DISABLE */
88 |
89 | uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event.
90 | This parameters can be in the range 1 to 32 */
91 |
92 | }HAL_DMA_MuxSyncConfigTypeDef;
93 |
94 |
95 | /**
96 | * @brief HAL DMAMUX request generator parameters structure definition
97 | */
98 | typedef struct
99 | {
100 | uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
101 | This parameter can be a value of @ref DMAEx_MUX_SignalGeneratorID_selection */
102 |
103 | uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
104 | This parameter can be a value of @ref DMAEx_MUX_RequestGeneneratorPolarity_selection */
105 |
106 | uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event.
107 | This parameters can be in the range 1 to 32 */
108 |
109 | }HAL_DMA_MuxRequestGeneratorConfigTypeDef;
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /* Exported constants --------------------------------------------------------*/
116 |
117 | /** @defgroup DMAEx_Exported_Constants DMA Exported Constants
118 | * @brief DMAEx Exported constants
119 | * @{
120 | */
121 |
122 | /** @defgroup DMAEx_MUX_SyncSignalID_selection DMAEx MUX SyncSignalID selection
123 | * @brief DMAEx MUX SyncSignalID selection
124 | * @{
125 | */
126 | #define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 0U /*!< D2 Domain synchronization Signal is DMAMUX1 Channel0 Event */
127 | #define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 1U /*!< D2 Domain synchronization Signal is DMAMUX1 Channel1 Event */
128 | #define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 2U /*!< D2 Domain synchronization Signal is DMAMUX1 Channel2 Event */
129 | #define HAL_DMAMUX1_SYNC_LPTIM1_OUT 3U /*!< D2 Domain synchronization Signal is LPTIM1 OUT */
130 | #define HAL_DMAMUX1_SYNC_LPTIM2_OUT 4U /*!< D2 Domain synchronization Signal is LPTIM2 OUT */
131 | #define HAL_DMAMUX1_SYNC_LPTIM3_OUT 5U /*!< D2 Domain synchronization Signal is LPTIM3 OUT */
132 | #define HAL_DMAMUX1_SYNC_EXTI0 6U /*!< D2 Domain synchronization Signal is EXTI0 IT */
133 | #define HAL_DMAMUX1_SYNC_TIM12_TRGO 7U /*!< D2 Domain synchronization Signal is TIM12 TRGO */
134 |
135 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH0_EVT 0U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel0 Event */
136 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH1_EVT 1U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel1 Event */
137 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH2_EVT 2U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel2 Event */
138 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH3_EVT 3U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel3 Event */
139 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH4_EVT 4U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel4 Event */
140 | #define HAL_DMAMUX2_SYNC_DMAMUX2_CH5_EVT 5U /*!< D3 Domain synchronization Signal is DMAMUX2 Channel5 Event */
141 | #define HAL_DMAMUX2_SYNC_LPUART1_RX_WKUP 6U /*!< D3 Domain synchronization Signal is LPUART1 RX Wakeup */
142 | #define HAL_DMAMUX2_SYNC_LPUART1_TX_WKUP 7U /*!< D3 Domain synchronization Signal is LPUART1 TX Wakeup */
143 | #define HAL_DMAMUX2_SYNC_LPTIM2_OUT 8U /*!< D3 Domain synchronization Signal is LPTIM2 output */
144 | #define HAL_DMAMUX2_SYNC_LPTIM3_OUT 9U /*!< D3 Domain synchronization Signal is LPTIM3 output */
145 | #define HAL_DMAMUX2_SYNC_I2C4_WKUP 10U /*!< D3 Domain synchronization Signal is I2C4 Wakeup */
146 | #define HAL_DMAMUX2_SYNC_SPI6_WKUP 11U /*!< D3 Domain synchronization Signal is SPI6 Wakeup */
147 | #define HAL_DMAMUX2_SYNC_COMP1_OUT 12U /*!< D3 Domain synchronization Signal is Comparator 1 output */
148 | #define HAL_DMAMUX2_SYNC_RTC_WKUP 13U /*!< D3 Domain synchronization Signal is RTC Wakeup */
149 | #define HAL_DMAMUX2_SYNC_EXTI0 14U /*!< D3 Domain synchronization Signal is EXTI0 IT */
150 | #define HAL_DMAMUX2_SYNC_EXTI2 15U /*!< D3 Domain synchronization Signal is EXTI2 IT */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /** @defgroup DMAEx_MUX_SyncPolarity_selection DMAEx MUX SyncPolarity selection
157 | * @brief DMAEx MUX SyncPolarity selection
158 | * @{
159 | */
160 | #define HAL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< block synchronization events */
161 | #define HAL_DMAMUX_SYNC_RISING DMAMUX_CxCR_SPOL_0 /*!< synchronize with rising edge events */
162 | #define HAL_DMAMUX_SYNC_FALLING DMAMUX_CxCR_SPOL_1 /*!< synchronize with falling edge events */
163 | #define HAL_DMAMUX_SYNC_RISING_FALLING DMAMUX_CxCR_SPOL /*!< synchronize with rising and falling edge events */
164 |
165 | /**
166 | * @}
167 | */
168 |
169 |
170 | /** @defgroup DMAEx_MUX_SignalGeneratorID_selection DMAEx MUX SignalGeneratorID selection
171 | * @brief DMAEx MUX SignalGeneratorID selection
172 | * @{
173 | */
174 | #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 0U /*!< D2 domain Request generator Signal is DMAMUX1 Channel0 Event */
175 | #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 1U /*!< D2 domain Request generator Signal is DMAMUX1 Channel1 Event */
176 | #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 2U /*!< D2 domain Request generator Signal is DMAMUX1 Channel2 Event */
177 | #define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 3U /*!< D2 domain Request generator Signal is LPTIM1 OUT */
178 | #define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 4U /*!< D2 domain Request generator Signal is LPTIM2 OUT */
179 | #define HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT 5U /*!< D2 domain Request generator Signal is LPTIM3 OUT */
180 | #define HAL_DMAMUX1_REQ_GEN_EXTI0 6U /*!< D2 domain Request generator Signal is EXTI0 IT */
181 | #define HAL_DMAMUX1_REQ_GEN_TIM12_TRGO 7U /*!< D2 domain Request generator Signal is TIM12 TRGO */
182 |
183 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT 0U /*!< D3 domain Request generator Signal is DMAMUX2 Channel0 Event */
184 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT 1U /*!< D3 domain Request generator Signal is DMAMUX2 Channel1 Event */
185 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT 2U /*!< D3 domain Request generator Signal is DMAMUX2 Channel2 Event */
186 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT 3U /*!< D3 domain Request generator Signal is DMAMUX2 Channel3 Event */
187 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT 4U /*!< D3 domain Request generator Signal is DMAMUX2 Channel4 Event */
188 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT 5U /*!< D3 domain Request generator Signal is DMAMUX2 Channel5 Event */
189 | #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT 6U /*!< D3 domain Request generator Signal is DMAMUX2 Channel6 Event */
190 | #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP 7U /*!< D3 domain Request generator Signal is LPUART1 RX Wakeup */
191 | #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP 8U /*!< D3 domain Request generator Signal is LPUART1 TX Wakeup */
192 | #define HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP 9U /*!< D3 domain Request generator Signal is LPTIM2 Wakeup */
193 | #define HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT 10U /*!< D3 domain Request generator Signal is LPTIM2 OUT */
194 | #define HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP 11U /*!< D3 domain Request generator Signal is LPTIM3 Wakeup */
195 | #define HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT 12U /*!< D3 domain Request generator Signal is LPTIM3 OUT */
196 | #define HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP 13U /*!< D3 domain Request generator Signal is LPTIM4 Wakeup */
197 | #define HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP 14U /*!< D3 domain Request generator Signal is LPTIM5 Wakeup */
198 | #define HAL_DMAMUX2_REQ_GEN_I2C4_WKUP 15U /*!< D3 domain Request generator Signal is I2C4 Wakeup */
199 | #define HAL_DMAMUX2_REQ_GEN_SPI6_WKUP 16U /*!< D3 domain Request generator Signal is SPI6 Wakeup */
200 | #define HAL_DMAMUX2_REQ_GEN_COMP1_OUT 17U /*!< D3 domain Request generator Signal is Comparator 1 output */
201 | #define HAL_DMAMUX2_REQ_GEN_COMP2_OUT 18U /*!< D3 domain Request generator Signal is Comparator 2 output */
202 | #define HAL_DMAMUX2_REQ_GEN_RTC_WKUP 19U /*!< D3 domain Request generator Signal is RTC Wakeup */
203 | #define HAL_DMAMUX2_REQ_GEN_EXTI0 20U /*!< D3 domain Request generator Signal is EXTI0 */
204 | #define HAL_DMAMUX2_REQ_GEN_EXTI2 21U /*!< D3 domain Request generator Signal is EXTI2 */
205 | #define HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT 22U /*!< D3 domain Request generator Signal is I2C4 IT Event */
206 | #define HAL_DMAMUX2_REQ_GEN_SPI6_IT 23U /*!< D3 domain Request generator Signal is SPI6 IT */
207 | #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT 24U /*!< D3 domain Request generator Signal is LPUART1 Tx IT */
208 | #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT 25U /*!< D3 domain Request generator Signal is LPUART1 Rx IT */
209 | #define HAL_DMAMUX2_REQ_GEN_ADC3_IT 26U /*!< D3 domain Request generator Signal is ADC3 IT */
210 | #define HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT 27U /*!< D3 domain Request generator Signal is ADC3 Analog Watchdog 1 output */
211 | #define HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT 28U /*!< D3 domain Request generator Signal is BDMA Channel 0 IT */
212 | #define HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT 29U /*!< D3 domain Request generator Signal is BDMA Channel 1 IT */
213 |
214 |
215 | /**
216 | * @}
217 | */
218 |
219 | /** @defgroup DMAEx_MUX_RequestGeneneratorPolarity_selection DMAEx MUX RequestGeneneratorPolarity selection
220 | * @brief DMAEx MUX RequestGeneneratorPolarity selection
221 | * @{
222 | */
223 | #define HAL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< block request generator events */
224 | #define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
225 | #define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
226 | #define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
227 |
228 | /**
229 | * @}
230 | */
231 |
232 | /**
233 | * @}
234 | */
235 |
236 | /* Exported functions --------------------------------------------------------*/
237 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
238 | * @brief DMAEx Exported functions
239 | * @{
240 | */
241 |
242 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
243 | * @brief Extended features functions
244 | * @{
245 | */
246 |
247 | /* IO operation functions *******************************************************/
248 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
249 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
250 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
251 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
252 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
253 | HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
254 | HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
255 |
256 | void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
257 | /**
258 | * @}
259 | */
260 | /**
261 | * @}
262 | */
263 |
264 | /* Private macros ------------------------------------------------------------*/
265 | /** @defgroup DMAEx_Private_Macros DMA Private Macros
266 | * @brief DMAEx private macros
267 | * @{
268 | */
269 |
270 | #define IS_D2_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_TIM12_TRGO)
271 | #define IS_D3_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_SYNC_EXTI2)
272 |
273 | #define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32))
274 |
275 | #define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
276 | ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
277 | ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
278 | ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
279 |
280 | #define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
281 |
282 | #define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
283 | ((EVENT) == ENABLE))
284 |
285 | #define IS_D2_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_TIM12_TRGO)
286 | #define IS_D3_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT)
287 |
288 | #define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32))
289 |
290 | #define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
291 | ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
292 | ((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
293 | ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /* Private functions ---------------------------------------------------------*/
300 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions
301 | * @brief DMAEx Private functions
302 | * @{
303 | */
304 | /**
305 | * @}
306 | */
307 |
308 | /**
309 | * @}
310 | */
311 |
312 | /**
313 | * @}
314 | */
315 |
316 | #ifdef __cplusplus
317 | }
318 | #endif
319 |
320 | #endif /* __STM32H7xx_HAL_DMA_H */
321 |
322 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
323 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_pwr.h
4 | * @author MCD Application Team
5 | * @brief Header file of PWR HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_PWR_H
38 | #define __STM32H7xx_HAL_PWR_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup PWR
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 |
57 | /** @defgroup PWR_Exported_Types PWR Exported Types
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief PWR PVD configuration structure definition
63 | */
64 | typedef struct
65 | {
66 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
67 | This parameter can be a value of @ref PWR_PVD_detection_level */
68 |
69 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
70 | This parameter can be a value of @ref PWR_PVD_Mode */
71 | }PWR_PVDTypeDef;
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /* Exported constants --------------------------------------------------------*/
78 | /** @defgroup PWR_Exported_Constants PWR Exported Constants
79 | * @{
80 | */
81 |
82 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level
83 | * @{
84 | */
85 | #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0
86 | #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1
87 | #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2
88 | #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3
89 | #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4
90 | #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5
91 | #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6
92 | #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage (Compare internally to VREFINT) */
93 | /**
94 | * @}
95 | */
96 |
97 | /** @defgroup PWR_PVD_Mode PWR PVD Mode
98 | * @{
99 | */
100 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Basic mode is used */
101 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
102 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
103 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
104 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */
105 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */
106 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
107 | /**
108 | * @}
109 | */
110 |
111 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
112 | * @{
113 | */
114 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
115 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS
116 | /**
117 | * @}
118 | */
119 |
120 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
121 | * @{
122 | */
123 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
124 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
125 | /**
126 | * @}
127 | */
128 |
129 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
130 | * @{
131 | */
132 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
133 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
134 | /**
135 | * @}
136 | */
137 |
138 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
139 | * @{
140 | */
141 | #define PWR_REGULATOR_VOLTAGE_SCALE1 (PWR_D3CR_VOS_1 | PWR_D3CR_VOS_0)
142 | #define PWR_REGULATOR_VOLTAGE_SCALE2 (PWR_D3CR_VOS_1)
143 | #define PWR_REGULATOR_VOLTAGE_SCALE3 (PWR_D3CR_VOS_0)
144 | /**
145 | * @}
146 | */
147 |
148 | /** @defgroup PWR_Flag PWR Flag
149 | * @{
150 | */
151 | #define PWR_FLAG_STOP ((uint8_t)0x01U)
152 | #define PWR_FLAG_SB_D1 ((uint8_t)0x02U)
153 | #define PWR_FLAG_SB_D2 ((uint8_t)0x03U)
154 | #define PWR_FLAG_SB ((uint8_t)0x04U)
155 | #define PWR_FLAG_PVDO ((uint8_t)0x07U)
156 | #define PWR_FLAG_AVDO ((uint8_t)0x08U)
157 | #define PWR_FLAG_ACTVOSRDY ((uint8_t)0x09U)
158 | #define PWR_FLAG_ACTVOS ((uint8_t)0x0AU)
159 | #define PWR_FLAG_BRR ((uint8_t)0x0BU)
160 | #define PWR_FLAG_VOSRDY ((uint8_t)0x0CU)
161 | #if defined(SMPS)
162 | #define PWR_FLAG_SMPSEXTRDY ((uint8_t)0x0DU)
163 | #else
164 | #define PWR_FLAG_SCUEN ((uint8_t)0x0DU)
165 | #endif /* SMPS */
166 | /**
167 | * @}
168 | */
169 |
170 | /** @defgroup PWR_ENABLE_WUP_Mask PWR Enable WUP Mask
171 | * @{
172 | */
173 | #define PWR_EWUP_MASK ((uint32_t)0x0FFF3F3FU)
174 | /**
175 | * @}
176 | */
177 |
178 | /**
179 | * @}
180 | */
181 | /* Exported macro ------------------------------------------------------------*/
182 | /** @defgroup PWR_Exported_Macro PWR Exported Macro
183 | * @{
184 | */
185 |
186 | /** @brief macros configure the main internal regulator output voltage.
187 | * @param __REGULATOR__: specifies the regulator output voltage to achieve
188 | * a tradeoff between performance and power consumption when the device does
189 | * not operate at the maximum frequency (refer to the datasheets for more details).
190 | * This parameter can be one of the following values:
191 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
192 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
193 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
194 | * @retval None
195 | */
196 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) \
197 | do { \
198 | __IO uint32_t tmpreg = 0x00; \
199 | MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, (__REGULATOR__)); \
200 | /* Delay after an RCC peripheral clock enabling */ \
201 | tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \
202 | UNUSED(tmpreg); \
203 | } while(0)
204 |
205 | /** @brief Check PWR PVD/AVD and VOSflags are set or not.
206 | * @param __FLAG__: specifies the flag to check.
207 | * This parameter can be one of the following values:
208 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
209 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
210 | * For this reason, this bit is equal to 0 after Standby or reset
211 | * until the PVDE bit is set.
212 | * @arg PWR_FLAG_AVDO: AVD Output. This flag is valid only if AVD is enabled
213 | * by the HAL_PWREx_EnableAVD() function. The AVD is stopped by Standby mode
214 | * For this reason, this bit is equal to 0 after Standby or reset
215 | * until the AVDE bit is set.
216 | * @arg PWR_FLAG_ACTVOSRDY: This flag indicates that the Regulator voltage
217 | * scaling output selection is ready.
218 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
219 | * scaling output selection is ready.
220 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
221 | * when the device wakes up from Standby mode or by a system reset
222 | * or power reset.
223 | * @arg PWR_FLAG_SB: StandBy flag
224 | * @arg PWR_FLAG_STOP: STOP flag
225 | * @arg PWR_FLAG_SB_D1: StandBy D1 flag
226 | * @arg PWR_FLAG_SB_D2: StandBy D2 flag
227 | * @retval The new state of __FLAG__ (TRUE or FALSE).
228 | */
229 | #define __HAL_PWR_GET_FLAG(__FLAG__) ( \
230 | ((__FLAG__) == PWR_FLAG_PVDO)?((PWR->CSR1 & PWR_CSR1_PVDO) == PWR_CSR1_PVDO) : \
231 | ((__FLAG__) == PWR_FLAG_AVDO)?((PWR->CSR1 & PWR_CSR1_AVDO) == PWR_CSR1_AVDO) : \
232 | ((__FLAG__) == PWR_FLAG_ACTVOSRDY)?((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY) : \
233 | ((__FLAG__) == PWR_FLAG_VOSRDY)?((PWR->D3CR & PWR_D3CR_VOSRDY) == PWR_D3CR_VOSRDY) : \
234 | ((__FLAG__) == PWR_FLAG_SCUEN)?((PWR->CR3 & PWR_CR3_SCUEN) == PWR_CR3_SCUEN) : \
235 | ((__FLAG__) == PWR_FLAG_BRR)?((PWR->CR2 & PWR_CR2_BRRDY) == PWR_CR2_BRRDY) : \
236 | ((__FLAG__) == PWR_FLAG_SB)?((PWR->CPUCR & PWR_CPUCR_SBF) == PWR_CPUCR_SBF) : \
237 | ((__FLAG__) == PWR_FLAG_STOP)?((PWR->CPUCR & PWR_CPUCR_STOPF) == PWR_CPUCR_STOPF) : \
238 | ((__FLAG__) == PWR_FLAG_SB_D1)?((PWR->CPUCR & PWR_CPUCR_SBF_D1) == PWR_CPUCR_SBF_D1) : \
239 | ((PWR->CPUCR & PWR_CPUCR_SBF_D2) == PWR_CPUCR_SBF_D2))
240 |
241 |
242 | /** @brief Clear the PWR's flags.
243 | * @param __FLAG__: specifies the flag to clear.
244 | * This parameter can be one of the following values:
245 | * @arg PWR_FLAG_SB: StandBy flag.
246 | * @arg PWR_CPU_FLAGS: Clear STOPF, SBF, SBF_D1, and SBF_D2 CPU flags.
247 | * @retval None.
248 | */
249 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CPUCR, PWR_CPUCR_CSSF)
250 |
251 | /**
252 | * @brief Enable the PVD EXTI Line 16.
253 | * @retval None.
254 | */
255 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI_D1->IMR1, PWR_EXTI_LINE_PVD)
256 |
257 |
258 | /**
259 | * @brief Disable the PVD EXTI Line 16.
260 | * @retval None.
261 | */
262 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI_D1->IMR1, PWR_EXTI_LINE_PVD)
263 |
264 |
265 | /**
266 | * @brief Enable event on PVD EXTI Line 16.
267 | * @retval None.
268 | */
269 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI_D1->EMR1, PWR_EXTI_LINE_PVD)
270 |
271 |
272 | /**
273 | * @brief Disable event on PVD EXTI Line 16.
274 | * @retval None.
275 | */
276 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI_D1->EMR1, PWR_EXTI_LINE_PVD)
277 |
278 |
279 | /**
280 | * @brief Enable the PVD Extended Interrupt Rising Trigger.
281 | * @retval None.
282 | */
283 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
284 |
285 | /**
286 | * @brief Disable the PVD Extended Interrupt Rising Trigger.
287 | * @retval None.
288 | */
289 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
290 |
291 | /**
292 | * @brief Enable the PVD Extended Interrupt Falling Trigger.
293 | * @retval None.
294 | */
295 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
296 |
297 |
298 | /**
299 | * @brief Disable the PVD Extended Interrupt Falling Trigger.
300 | * @retval None.
301 | */
302 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
303 |
304 |
305 | /**
306 | * @brief PVD EXTI line configuration: set rising & falling edge trigger.
307 | * @retval None.
308 | */
309 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
310 | do { \
311 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
312 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
313 | } while(0);
314 |
315 | /**
316 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
317 | * @retval None.
318 | */
319 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
320 | do { \
321 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
322 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
323 | } while(0);
324 |
325 | /**
326 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
327 | * @retval EXTI PVD Line Status.
328 | */
329 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() READ_BIT(EXTI_D1->PR1, PWR_EXTI_LINE_PVD)
330 |
331 |
332 | /**
333 | * @brief Clear the PVD EXTI flag.
334 | * @retval None.
335 | */
336 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() SET_BIT(EXTI_D1->PR1, PWR_EXTI_LINE_PVD)
337 |
338 |
339 | /**
340 | * @brief Generates a Software interrupt on PVD EXTI line.
341 | * @retval None.
342 | */
343 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD)
344 | /**
345 | * @}
346 | */
347 |
348 |
349 | /* Include PWR HAL Extension module */
350 | #include "stm32h7xx_hal_pwr_ex.h"
351 |
352 | /* Exported functions --------------------------------------------------------*/
353 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions
354 | * @{
355 | */
356 |
357 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and De-Initialization functions
358 | * @{
359 | */
360 | /* Initialization and de-initialization functions *****************************/
361 | void HAL_PWR_DeInit(void);
362 | void HAL_PWR_EnableBkUpAccess(void);
363 | void HAL_PWR_DisableBkUpAccess(void);
364 | /**
365 | * @}
366 | */
367 |
368 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
369 | * @{
370 | */
371 | /* Peripheral Control functions **********************************************/
372 | /* PVD configuration */
373 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
374 | void HAL_PWR_EnablePVD(void);
375 | void HAL_PWR_DisablePVD(void);
376 |
377 | /* WakeUp pins configuration */
378 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
379 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
380 |
381 | /* Low Power modes entry */
382 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
383 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
384 | void HAL_PWR_EnterSTANDBYMode(void);
385 |
386 | /* Power PVD IRQ Handler */
387 | void HAL_PWR_PVD_IRQHandler(void);
388 | void HAL_PWR_PVDCallback(void);
389 |
390 | /* Cortex System Control functions *******************************************/
391 | void HAL_PWR_EnableSleepOnExit(void);
392 | void HAL_PWR_DisableSleepOnExit(void);
393 | void HAL_PWR_EnableSEVOnPend(void);
394 | void HAL_PWR_DisableSEVOnPend(void);
395 | /**
396 | * @}
397 | */
398 |
399 | /**
400 | * @}
401 | */
402 |
403 | /* Private types -------------------------------------------------------------*/
404 | /* Private variables ---------------------------------------------------------*/
405 | /* Private constants ---------------------------------------------------------*/
406 | /** @defgroup PWR_Private_Constants PWR Private Constants
407 | * @{
408 | */
409 |
410 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
411 | * @{
412 | */
413 | /*!< External interrupt line 16 Connected to the PVD EXTI Line */
414 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR1_IM16)
415 | /**
416 | * @}
417 | */
418 |
419 | /**
420 | * @}
421 | */
422 | /* Private macros ------------------------------------------------------------*/
423 | /** @defgroup PWR_Private_Macros PWR Private Macros
424 | * @{
425 | */
426 |
427 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
428 | * @{
429 | */
430 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
431 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
432 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
433 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
434 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
435 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
436 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
437 | ((MODE) == PWR_PVD_MODE_NORMAL))
438 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
439 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
440 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
441 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
442 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
443 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
444 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
445 |
446 | /**
447 | * @}
448 | */
449 |
450 | /**
451 | * @}
452 | */
453 |
454 | /**
455 | * @}
456 | */
457 |
458 | /**
459 | * @}
460 | */
461 |
462 | #ifdef __cplusplus
463 | }
464 | #endif
465 |
466 |
467 | #endif /* __STM32H7xx_HAL_PWR_H */
468 |
469 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
470 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_gpio_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of GPIO HAL Extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_GPIO_EX_H
38 | #define __STM32H7xx_HAL_GPIO_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup GPIOEx GPIOEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 |
57 | /* Exported constants --------------------------------------------------------*/
58 | /** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
59 | * @{
60 | */
61 |
62 | /** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
63 | * @{
64 | */
65 | /**
66 | * @brief AF 0 selection
67 | */
68 | #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
69 | #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
70 | #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
71 | #define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */
72 | #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
73 |
74 | /**
75 | * @brief AF 1 selection
76 | */
77 | #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
78 | #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
79 | #define GPIO_AF1_TIM16 ((uint8_t)0x01) /* TIM16 Alternate Function mapping */
80 | #define GPIO_AF1_TIM17 ((uint8_t)0x01) /* TIM17 Alternate Function mapping */
81 | #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
82 | #define GPIO_AF1_HRTIM1 ((uint8_t)0x01) /* HRTIM1 Alternate Function mapping */
83 |
84 | /**
85 | * @brief AF 2 selection
86 | */
87 | #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
88 | #define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
89 | #define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
90 | #define GPIO_AF2_TIM12 ((uint8_t)0x02) /* TIM12 Alternate Function mapping */
91 | #define GPIO_AF2_HRTIM1 ((uint8_t)0x02) /* HRTIM2 Alternate Function mapping */
92 | #define GPIO_AF2_SAI1 ((uint8_t)0x02) /* SAI1 Alternate Function mapping */
93 |
94 | /**
95 | * @brief AF 3 selection
96 | */
97 | #define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
98 | #define GPIO_AF3_LPTIM2 ((uint8_t)0x03) /* LPTIM2 Alternate Function mapping */
99 | #define GPIO_AF3_DFSDM1 ((uint8_t)0x03) /* DFSDM Alternate Function mapping */
100 | #define GPIO_AF3_HRTIM1 ((uint8_t)0x03) /* HRTIM3 Alternate Function mapping */
101 | #define GPIO_AF3_LPTIM3 ((uint8_t)0x03) /* LPTIM3 Alternate Function mapping */
102 | #define GPIO_AF3_LPTIM4 ((uint8_t)0x03) /* LPTIM4 Alternate Function mapping */
103 | #define GPIO_AF3_LPTIM5 ((uint8_t)0x03) /* LPTIM5 Alternate Function mapping */
104 | #define GPIO_AF3_LPUART ((uint8_t)0x03) /* LPUART Alternate Function mapping */
105 |
106 | /**
107 | * @brief AF 4 selection
108 | */
109 | #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
110 | #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
111 | #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
112 | #define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
113 | #define GPIO_AF4_TIM15 ((uint8_t)0x04) /* TIM15 Alternate Function mapping */
114 | #define GPIO_AF4_CEC ((uint8_t)0x04) /* CEC Alternate Function mapping */
115 | #define GPIO_AF4_LPTIM2 ((uint8_t)0x04) /* LPTIM2 Alternate Function mapping */
116 | #define GPIO_AF4_USART1 ((uint8_t)0x04) /* USART1 Alternate Function mapping */
117 | #define GPIO_AF4_DFSDM1 ((uint8_t)0x04) /* DFSDM Alternate Function mapping */
118 |
119 | /**
120 | * @brief AF 5 selection
121 | */
122 | #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
123 | #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
124 | #define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3 Alternate Function mapping */
125 | #define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
126 | #define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
127 | #define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
128 | #define GPIO_AF5_CEC ((uint8_t)0x05) /* CEC Alternate Function mapping */
129 |
130 |
131 | /**
132 | * @brief AF 6 selection
133 | */
134 | #define GPIO_AF6_SPI2 ((uint8_t)0x06) /* SPI2 Alternate Function mapping */
135 | #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
136 | #define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
137 | #define GPIO_AF6_SAI3 ((uint8_t)0x06) /* SAI3 Alternate Function mapping */
138 | #define GPIO_AF6_I2C4 ((uint8_t)0x06) /* I2C4 Alternate Function mapping */
139 | #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM Alternate Function mapping */
140 | #define GPIO_AF6_UART4 ((uint8_t)0x06) /* UART4 Alternate Function mapping */
141 |
142 | /**
143 | * @brief AF 7 selection
144 | */
145 | #define GPIO_AF7_SPI2 ((uint8_t)0x07) /* SPI2 Alternate Function mapping */
146 | #define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3 Alternate Function mapping */
147 | #define GPIO_AF7_SPI6 ((uint8_t)0x07) /* SPI6 Alternate Function mapping */
148 | #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
149 | #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
150 | #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
151 | #define GPIO_AF7_USART6 ((uint8_t)0x07) /* USART6 Alternate Function mapping */
152 | #define GPIO_AF7_UART7 ((uint8_t)0x07) /* UART7 Alternate Function mapping */
153 | #define GPIO_AF7_DFSDM1 ((uint8_t)0x07) /* DFSDM Alternate Function mapping */
154 | #define GPIO_AF7_SDMMC1 ((uint8_t)0x07) /* SDMMC1 Alternate Function mapping */
155 |
156 | /**
157 | * @brief AF 8 selection
158 | */
159 | #define GPIO_AF8_SPI6 ((uint8_t)0x08) /* SPI6 Alternate Function mapping */
160 | #define GPIO_AF8_SAI2 ((uint8_t)0x08) /* SAI2 Alternate Function mapping */
161 | #define GPIO_AF8_SAI4 ((uint8_t)0x08) /* SAI4 Alternate Function mapping */
162 | #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
163 | #define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
164 | #define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
165 | #define GPIO_AF8_SPDIF ((uint8_t)0x08) /* SPDIF Alternate Function mapping */
166 | #define GPIO_AF8_LPUART ((uint8_t)0x08) /* LPUART Alternate Function mapping */
167 | #define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */
168 |
169 | /**
170 | * @brief AF 9 selection
171 | */
172 | #define GPIO_AF9_FDCAN1 ((uint8_t)0x09) /* FDCAN1 Alternate Function mapping */
173 | #define GPIO_AF9_FDCAN2 ((uint8_t)0x09) /* FDCAN2 Alternate Function mapping */
174 | #define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
175 | #define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
176 | #define GPIO_AF9_QUADSPI ((uint8_t)0x09) /* QUADSPI Alternate Function mapping */
177 | #define GPIO_AF9_SDMMC2 ((uint8_t)0x09) /* SDMMC2 Alternate Function mapping */
178 | #define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */
179 | #define GPIO_AF9_SPDIF ((uint8_t)0x09) /* SPDIF Alternate Function mapping */
180 | #define GPIO_AF9_FMC ((uint8_t)0x09) /* FMC Alternate Function mapping */
181 | #define GPIO_AF9_SAI4 ((uint8_t)0x09) /* SAI4 Alternate Function mapping */
182 |
183 | /**
184 | * @brief AF 10 selection
185 | */
186 | #define GPIO_AF10_QUADSPI ((uint8_t)0xA) /* QUADSPI Alternate Function mapping */
187 | #define GPIO_AF10_SAI2 ((uint8_t)0xA) /* SAI2 Alternate Function mapping */
188 | #define GPIO_AF10_SAI4 ((uint8_t)0xA) /* SAI4 Alternate Function mapping */
189 | #define GPIO_AF10_SDMMC2 ((uint8_t)0xA) /* SDMMC2 Alternate Function mapping */
190 | #define GPIO_AF10_OTG2_HS ((uint8_t)0xA) /* OTG2_HS Alternate Function mapping */
191 | #define GPIO_AF10_OTG1_FS ((uint8_t)0xA) /* OTG1_FS Alternate Function mapping */
192 | #define GPIO_AF10_COMP1 ((uint8_t)0xA) /* COMP1 Alternate Function mapping */
193 | #define GPIO_AF10_COMP2 ((uint8_t)0xA) /* COMP2 Alternate Function mapping */
194 | #define GPIO_AF10_LTDC ((uint8_t)0xA) /* LTDC Alternate Function mapping */
195 |
196 | /**
197 | * @brief AF 11 selection
198 | */
199 | #define GPIO_AF11_SWP ((uint8_t)0x0B) /* SWP Alternate Function mapping */
200 | #define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETH Alternate Function mapping */
201 | #define GPIO_AF11_MDIOS ((uint8_t)0x0B) /* MDIOS Alternate Function mapping */
202 | #define GPIO_AF11_OTG1_HS ((uint8_t)0x0B) /* OTG1_HS Alternate Function mapping */
203 | #define GPIO_AF11_UART7 ((uint8_t)0x0B) /* UART7 Alternate Function mapping */
204 | #define GPIO_AF11_SDMMC2 ((uint8_t)0x0B) /* SDMMC2 Alternate Function mapping */
205 | #define GPIO_AF11_DFSDM1 ((uint8_t)0x0B) /* DFSDM Alternate Function mapping */
206 | #define GPIO_AF11_COMP1 ((uint8_t)0x0B) /* COMP1 Alternate Function mapping */
207 | #define GPIO_AF11_COMP2 ((uint8_t)0x0B) /* COMP2 Alternate Function mapping */
208 | #define GPIO_AF11_I2C4 ((uint8_t)0x0B) /* I2C4 Alternate Function mapping */
209 |
210 | /**
211 | * @brief AF 12 selection
212 | */
213 | #define GPIO_AF12_FMC ((uint8_t)0xC) /* FMC Alternate Function mapping */
214 | #define GPIO_AF12_SDMMC1 ((uint8_t)0xC) /* SDMMC1 Alternate Function mapping */
215 | #define GPIO_AF12_MDIOS ((uint8_t)0xC) /* MDIOS Alternate Function mapping */
216 | #define GPIO_AF12_OTG2_FS ((uint8_t)0xC) /* OTG2_FS Alternate Function mapping */
217 | #define GPIO_AF12_COMP1 ((uint8_t)0xC) /* COMP1 Alternate Function mapping */
218 | #define GPIO_AF12_COMP2 ((uint8_t)0xC) /* COMP2 Alternate Function mapping */
219 | #define GPIO_AF12_LTDC ((uint8_t)0xC) /* LTDC Alternate Function mapping */
220 |
221 | /**
222 | * @brief AF 13 selection
223 | */
224 | #define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
225 | #define GPIO_AF13_DSI ((uint8_t)0x0D) /* DSI Alternate Function mapping */
226 | #define GPIO_AF13_COMP1 ((uint8_t)0x0D) /* COMP1 Alternate Function mapping */
227 | #define GPIO_AF13_COMP2 ((uint8_t)0x0D) /* COMP2 Alternate Function mapping */
228 | #define GPIO_AF13_LTDC ((uint8_t)0x0D) /* LTDC Alternate Function mapping */
229 |
230 | /**
231 | * @brief AF 14 selection
232 | */
233 | #define GPIO_AF14_LTDC ((uint8_t)0x0E) /* LTDC Alternate Function mapping */
234 | #define GPIO_AF14_UART5 ((uint8_t)0x0E) /* UART5 Alternate Function mapping */
235 |
236 | /**
237 | * @brief AF 15 selection
238 | */
239 | #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
240 |
241 | #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
242 |
243 |
244 |
245 | /**
246 | * @}
247 | */
248 |
249 | /**
250 | * @}
251 | */
252 |
253 | /* Exported macro ------------------------------------------------------------*/
254 | /** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
255 | * @{
256 | */
257 | /**
258 | * @}
259 | */
260 |
261 | /* Exported functions --------------------------------------------------------*/
262 | /** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
263 | * @{
264 | */
265 | /**
266 | * @}
267 | */
268 | /* Private types -------------------------------------------------------------*/
269 | /* Private variables ---------------------------------------------------------*/
270 | /* Private constants ---------------------------------------------------------*/
271 | /** @defgroup GPIOEx_Private_Constants GPIO Private Constants
272 | * @{
273 | */
274 |
275 | /**
276 | * @brief GPIO pin available on the platform
277 | */
278 | /* Defines the available pins per GPIOs */
279 | #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
280 | #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
281 | #define GPIOC_PIN_AVAILABLE GPIO_PIN_All
282 | #define GPIOD_PIN_AVAILABLE GPIO_PIN_All
283 | #define GPIOE_PIN_AVAILABLE GPIO_PIN_All
284 | #define GPIOF_PIN_AVAILABLE GPIO_PIN_All
285 | #define GPIOG_PIN_AVAILABLE GPIO_PIN_All
286 | #define GPIOI_PIN_AVAILABLE GPIO_PIN_All
287 | #define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
288 | #define GPIOH_PIN_AVAILABLE GPIO_PIN_All
289 | #define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | \
290 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
291 |
292 | /**
293 | * @}
294 | */
295 |
296 | /* Private macros ------------------------------------------------------------*/
297 | /** @defgroup GPIOEx_Private_Macros GPIO Private Macros
298 | * @{
299 | */
300 | /** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
301 | * @{
302 | */
303 | #define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
304 | ((__GPIOx__) == (GPIOB))? 1U :\
305 | ((__GPIOx__) == (GPIOC))? 2U :\
306 | ((__GPIOx__) == (GPIOD))? 3U :\
307 | ((__GPIOx__) == (GPIOE))? 4U :\
308 | ((__GPIOx__) == (GPIOF))? 5U :\
309 | ((__GPIOx__) == (GPIOG))? 6U :\
310 | ((__GPIOx__) == (GPIOH))? 7U :\
311 | ((__GPIOx__) == (GPIOI))? 8U :\
312 | ((__GPIOx__) == (GPIOJ))? 9U : 10U)
313 | /**
314 | * @}
315 | */
316 |
317 | #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
318 | ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
319 | (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
320 | (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
321 | (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
322 | (((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) || \
323 | (((__INSTANCE__) == GPIOF) && (((__PIN__) & (GPIOF_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOF_PIN_AVAILABLE)) == (GPIOF_PIN_AVAILABLE))) || \
324 | (((__INSTANCE__) == GPIOG) && (((__PIN__) & (GPIOG_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOG_PIN_AVAILABLE)) == (GPIOG_PIN_AVAILABLE))) || \
325 | (((__INSTANCE__) == GPIOI) && (((__PIN__) & (GPIOI_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOI_PIN_AVAILABLE)) == (GPIOI_PIN_AVAILABLE))) || \
326 | (((__INSTANCE__) == GPIOJ) && (((__PIN__) & (GPIOJ_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOJ_PIN_AVAILABLE)) == (GPIOJ_PIN_AVAILABLE))) || \
327 | (((__INSTANCE__) == GPIOK) && (((__PIN__) & (GPIOK_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOK_PIN_AVAILABLE)) == (GPIOK_PIN_AVAILABLE))) || \
328 | (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
329 | /** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
330 | * @{
331 | */
332 | /**
333 | * @}
334 | */
335 |
336 | /**
337 | * @}
338 | */
339 |
340 | /* Private functions ---------------------------------------------------------*/
341 | /** @defgroup GPIOEx_Private_Functions GPIO Private Functions
342 | * @{
343 | */
344 |
345 | /**
346 | * @}
347 | */
348 |
349 | /**
350 | * @}
351 | */
352 |
353 | /**
354 | * @}
355 | */
356 |
357 | #ifdef __cplusplus
358 | }
359 | #endif
360 |
361 | #endif /* __STM32H7xx_HAL_GPIO_EX_H */
362 |
363 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
364 |
--------------------------------------------------------------------------------
/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32h7xx_hal_cortex.h
4 | * @author MCD Application Team
5 | * @brief Header file of CORTEX HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32H7xx_HAL_CORTEX_H
38 | #define __STM32H7xx_HAL_CORTEX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32h7xx_hal_def.h"
46 |
47 | /** @addtogroup STM32H7xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup CORTEX
52 | * @{
53 | */
54 | /* Exported types ------------------------------------------------------------*/
55 | /** @defgroup CORTEX_Exported_Types Cortex Exported Types
56 | * @{
57 | */
58 |
59 | #if (__MPU_PRESENT == 1)
60 | /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
61 | * @brief MPU Region initialization structure
62 | * @{
63 | */
64 | typedef struct
65 | {
66 | uint8_t Enable; /*!< Specifies the status of the region.
67 | This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
68 | uint8_t Number; /*!< Specifies the number of the region to protect.
69 | This parameter can be a value of @ref CORTEX_MPU_Region_Number */
70 | uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
71 | uint8_t Size; /*!< Specifies the size of the region to protect.
72 | This parameter can be a value of @ref CORTEX_MPU_Region_Size */
73 | uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
74 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
75 | uint8_t TypeExtField; /*!< Specifies the TEX field level.
76 | This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
77 | uint8_t AccessPermission; /*!< Specifies the region access permission type.
78 | This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
79 | uint8_t DisableExec; /*!< Specifies the instruction access status.
80 | This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
81 | uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
82 | This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
83 | uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
84 | This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
85 | uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
86 | This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
87 | }MPU_Region_InitTypeDef;
88 | /**
89 | * @}
90 | */
91 | #endif /* __MPU_PRESENT */
92 |
93 | /**
94 | * @}
95 | */
96 |
97 | /* Exported constants --------------------------------------------------------*/
98 |
99 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
100 | * @{
101 | */
102 |
103 | /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
104 | * @{
105 | */
106 | #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority
107 | 4 bits for subpriority */
108 | #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bits for pre-emption priority
109 | 3 bits for subpriority */
110 | #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority
111 | 2 bits for subpriority */
112 | #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority
113 | 1 bits for subpriority */
114 | #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority
115 | 0 bits for subpriority */
116 | /**
117 | * @}
118 | */
119 |
120 | /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
121 | * @{
122 | */
123 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
124 | #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
125 |
126 | /**
127 | * @}
128 | */
129 |
130 | #if (__MPU_PRESENT == 1)
131 | /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
132 | * @{
133 | */
134 | #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
135 | #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
136 | #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
137 | #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
138 | /**
139 | * @}
140 | */
141 |
142 | /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
143 | * @{
144 | */
145 | #define MPU_REGION_ENABLE ((uint8_t)0x01)
146 | #define MPU_REGION_DISABLE ((uint8_t)0x00)
147 | /**
148 | * @}
149 | */
150 |
151 | /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
152 | * @{
153 | */
154 | #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
155 | #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
156 | /**
157 | * @}
158 | */
159 |
160 | /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
161 | * @{
162 | */
163 | #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
164 | #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
165 | /**
166 | * @}
167 | */
168 |
169 | /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
170 | * @{
171 | */
172 | #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
173 | #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
174 | /**
175 | * @}
176 | */
177 |
178 | /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
179 | * @{
180 | */
181 | #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
182 | #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
183 | /**
184 | * @}
185 | */
186 |
187 | /** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
188 | * @{
189 | */
190 | #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
191 | #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
192 | #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
193 | /**
194 | * @}
195 | */
196 |
197 | /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
198 | * @{
199 | */
200 | #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
201 | #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
202 | #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
203 | #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
204 | #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
205 | #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
206 | #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
207 | #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
208 | #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
209 | #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
210 | #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
211 | #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
212 | #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
213 | #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
214 | #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
215 | #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
216 | #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
217 | #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
218 | #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
219 | #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
220 | #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
221 | #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
222 | #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
223 | #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
224 | #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
225 | #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
226 | #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
227 | #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
228 | /**
229 | * @}
230 | */
231 |
232 | /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
233 | * @{
234 | */
235 | #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
236 | #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
237 | #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
238 | #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
239 | #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
240 | #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
241 | /**
242 | * @}
243 | */
244 |
245 | /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
246 | * @{
247 | */
248 | #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
249 | #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
250 | #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
251 | #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
252 | #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
253 | #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
254 | #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
255 | #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
256 | #define MPU_REGION_NUMBER8 ((uint8_t)0x08)
257 | #define MPU_REGION_NUMBER9 ((uint8_t)0x09)
258 | #define MPU_REGION_NUMBER10 ((uint8_t)0x0A)
259 | #define MPU_REGION_NUMBER11 ((uint8_t)0x0B)
260 | #define MPU_REGION_NUMBER12 ((uint8_t)0x0C)
261 | #define MPU_REGION_NUMBER13 ((uint8_t)0x0D)
262 | #define MPU_REGION_NUMBER14 ((uint8_t)0x0E)
263 | #define MPU_REGION_NUMBER15 ((uint8_t)0x0F)
264 |
265 | /**
266 | * @}
267 | */
268 | #endif /* __MPU_PRESENT */
269 |
270 | /**
271 | * @}
272 | */
273 |
274 |
275 | /* Exported Macros -----------------------------------------------------------*/
276 | /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
277 | * @{
278 | */
279 |
280 | /**
281 | * @}
282 | */
283 |
284 |
285 |
286 | /** @defgroup CORTEX_CPU_Identifier CORTEX_CPU_Identifier
287 | * @{
288 | */
289 | #define CM7_CPUID (uint32_t)0x00000003
290 |
291 | /**
292 | * @}
293 | */
294 |
295 |
296 | /* Exported functions --------------------------------------------------------*/
297 | /** @addtogroup CORTEX_Exported_Functions
298 | * @{
299 | */
300 |
301 | /** @addtogroup CORTEX_Exported_Functions_Group1
302 | * @{
303 | */
304 | /* Initialization and de-initialization functions *****************************/
305 | void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
306 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
307 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
308 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
309 | void HAL_NVIC_SystemReset(void);
310 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
311 | /**
312 | * @}
313 | */
314 |
315 | /** @addtogroup CORTEX_Exported_Functions_Group2
316 | * @{
317 | */
318 | /* Peripheral Control functions ***********************************************/
319 | #if (__MPU_PRESENT == 1)
320 | void HAL_MPU_Enable(uint32_t MPU_Control);
321 | void HAL_MPU_Disable(void);
322 | void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
323 | #endif /* __MPU_PRESENT */
324 | uint32_t HAL_NVIC_GetPriorityGrouping(void);
325 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
326 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
327 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
328 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
329 | uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
330 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
331 | void HAL_SYSTICK_IRQHandler(void);
332 | void HAL_SYSTICK_Callback(void);
333 | uint32_t HAL_GetCurrentCPUID(void);
334 |
335 |
336 | /**
337 | * @}
338 | */
339 |
340 | /**
341 | * @}
342 | */
343 |
344 | /* Private types -------------------------------------------------------------*/
345 | /* Private variables ---------------------------------------------------------*/
346 | /* Private constants ---------------------------------------------------------*/
347 | /* Private macros ------------------------------------------------------------*/
348 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
349 | * @{
350 | */
351 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
352 | ((GROUP) == NVIC_PRIORITYGROUP_1) || \
353 | ((GROUP) == NVIC_PRIORITYGROUP_2) || \
354 | ((GROUP) == NVIC_PRIORITYGROUP_3) || \
355 | ((GROUP) == NVIC_PRIORITYGROUP_4))
356 |
357 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
358 |
359 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
360 |
361 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
362 |
363 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
364 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
365 |
366 | #if (__MPU_PRESENT == 1)
367 | #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
368 | ((STATE) == MPU_REGION_DISABLE))
369 |
370 | #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
371 | ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
372 |
373 | #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
374 | ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
375 |
376 | #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
377 | ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
378 |
379 | #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
380 | ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
381 |
382 | #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
383 | ((TYPE) == MPU_TEX_LEVEL1) || \
384 | ((TYPE) == MPU_TEX_LEVEL2))
385 |
386 | #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
387 | ((TYPE) == MPU_REGION_PRIV_RW) || \
388 | ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
389 | ((TYPE) == MPU_REGION_FULL_ACCESS) || \
390 | ((TYPE) == MPU_REGION_PRIV_RO) || \
391 | ((TYPE) == MPU_REGION_PRIV_RO_URO))
392 |
393 | #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
394 | ((NUMBER) == MPU_REGION_NUMBER1) || \
395 | ((NUMBER) == MPU_REGION_NUMBER2) || \
396 | ((NUMBER) == MPU_REGION_NUMBER3) || \
397 | ((NUMBER) == MPU_REGION_NUMBER4) || \
398 | ((NUMBER) == MPU_REGION_NUMBER5) || \
399 | ((NUMBER) == MPU_REGION_NUMBER6) || \
400 | ((NUMBER) == MPU_REGION_NUMBER7) || \
401 | ((NUMBER) == MPU_REGION_NUMBER8) || \
402 | ((NUMBER) == MPU_REGION_NUMBER9) || \
403 | ((NUMBER) == MPU_REGION_NUMBER10) || \
404 | ((NUMBER) == MPU_REGION_NUMBER11) || \
405 | ((NUMBER) == MPU_REGION_NUMBER12) || \
406 | ((NUMBER) == MPU_REGION_NUMBER13) || \
407 | ((NUMBER) == MPU_REGION_NUMBER14) || \
408 | ((NUMBER) == MPU_REGION_NUMBER15))
409 |
410 | #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
411 | ((SIZE) == MPU_REGION_SIZE_64B) || \
412 | ((SIZE) == MPU_REGION_SIZE_128B) || \
413 | ((SIZE) == MPU_REGION_SIZE_256B) || \
414 | ((SIZE) == MPU_REGION_SIZE_512B) || \
415 | ((SIZE) == MPU_REGION_SIZE_1KB) || \
416 | ((SIZE) == MPU_REGION_SIZE_2KB) || \
417 | ((SIZE) == MPU_REGION_SIZE_4KB) || \
418 | ((SIZE) == MPU_REGION_SIZE_8KB) || \
419 | ((SIZE) == MPU_REGION_SIZE_16KB) || \
420 | ((SIZE) == MPU_REGION_SIZE_32KB) || \
421 | ((SIZE) == MPU_REGION_SIZE_64KB) || \
422 | ((SIZE) == MPU_REGION_SIZE_128KB) || \
423 | ((SIZE) == MPU_REGION_SIZE_256KB) || \
424 | ((SIZE) == MPU_REGION_SIZE_512KB) || \
425 | ((SIZE) == MPU_REGION_SIZE_1MB) || \
426 | ((SIZE) == MPU_REGION_SIZE_2MB) || \
427 | ((SIZE) == MPU_REGION_SIZE_4MB) || \
428 | ((SIZE) == MPU_REGION_SIZE_8MB) || \
429 | ((SIZE) == MPU_REGION_SIZE_16MB) || \
430 | ((SIZE) == MPU_REGION_SIZE_32MB) || \
431 | ((SIZE) == MPU_REGION_SIZE_64MB) || \
432 | ((SIZE) == MPU_REGION_SIZE_128MB) || \
433 | ((SIZE) == MPU_REGION_SIZE_256MB) || \
434 | ((SIZE) == MPU_REGION_SIZE_512MB) || \
435 | ((SIZE) == MPU_REGION_SIZE_1GB) || \
436 | ((SIZE) == MPU_REGION_SIZE_2GB) || \
437 | ((SIZE) == MPU_REGION_SIZE_4GB))
438 |
439 | #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
440 | #endif /* __MPU_PRESENT */
441 |
442 | /**
443 | * @}
444 | */
445 |
446 | /**
447 | * @}
448 | */
449 |
450 | /**
451 | * @}
452 | */
453 |
454 | #ifdef __cplusplus
455 | }
456 | #endif
457 |
458 | #endif /* __STM32H7xx_HAL_CORTEX_H */
459 |
460 |
461 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
462 |
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