├── docs ├── figures ├── droic.png ├── flow.png ├── logo.png ├── sizes.png ├── soc.png ├── dnasns.png └── 273943 (1).png ├── layouts ├── DROIC.PNG └── dro.PNG ├── SoC DNA Sequencing Design Review.pptx ├── SSCS Chipathon Pin List SeqSoc (1).xlsx ├── README.md └── LICENSE.md /docs: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /figures/droic.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/droic.png -------------------------------------------------------------------------------- /figures/flow.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/flow.png -------------------------------------------------------------------------------- /figures/logo.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/logo.png -------------------------------------------------------------------------------- /figures/sizes.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/sizes.png -------------------------------------------------------------------------------- /figures/soc.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/soc.png -------------------------------------------------------------------------------- /layouts/DROIC.PNG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/layouts/DROIC.PNG -------------------------------------------------------------------------------- /layouts/dro.PNG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/layouts/dro.PNG -------------------------------------------------------------------------------- /figures/dnasns.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/dnasns.png -------------------------------------------------------------------------------- /figures/273943 (1).png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/figures/273943 (1).png -------------------------------------------------------------------------------- /SoC DNA Sequencing Design Review.pptx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/SoC DNA Sequencing Design Review.pptx -------------------------------------------------------------------------------- /SSCS Chipathon Pin List SeqSoc (1).xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/EMIL-YORKU/SensSeq/HEAD/SSCS Chipathon Pin List SeqSoc (1).xlsx -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # SensSeq 2 | 3 | 4 | logo 5 | 6 | A low-power and scalable mixed-signal system on chip for nanopore-based DNA sequencing intended to be integrated for the SSCS Platform for IC Design Outreach (PICO) Open-Source Design Contest.
7 | 8 | Table of contents 9 | ============================== 10 | 11 | * [Summary](#Summary) 12 | * [Motivation](#Motivation) 13 | * [Description](#Description) 14 | * [Layouts](#Layouts) 15 | * [Design Goals](#Design-Goals) 16 | * [Team Members](#Team-Members) 17 | * [References](#References) 18 | 19 | 20 | Summary 21 | ======= 22 | 23 | This design contains a mixed-signal readout array and a Bioinformatics Processing Unit that: 24 | - Amplifies the pico-ampere-range current signals 25 | - Filters high frequecy contents 26 | - Samples the analog input 27 | - Digitizes the samples with SAR ADCs 28 | - Stores the digital data in a memory 29 | - Read the memory and analyse the data to identify the DNA sequence
30 | 31 | In order to test an on-chip circuits will be defined to generate the pico-ampere currents. Also a timing technique will be used to seperate the digital and anlaog circuity opertion time. 32 | 33 | Motivation 34 | ======= 35 | 36 | Nanopore-based DNA sequencing is a unique, scalable technology, utilized to identify nucleotides (i.e., A, C, G, T) according to the pico-ampere-sized current fluctuations induced by the passage of a DNA strand through a like-sized molecular sensor (i.e. a “nanopore”). This approach, a so-called “3rd Generation” sequencing technology, entered the market in 2014, and is, by certain key measures, at least 1000X better than incumbent methods. For example, its main components fit in the palm of one’s hand (a volumetric footprint about 1000X smaller than established machines) and it has demonstrated the ability to process contiguous DNA strands well in excess of 100,000 nucleotides in length. 37 | 38 | Critical to the success and improvement of nanopore-based DNA sequencing machines are improvements in the semiconductor systems that process the pico-ampere-sized currents that they generate. There are at least two key parts to this, i) a multi-channel digital readout integrated circuit (DROIC), that amplifies, filters, and digitizes the current measurements from multitudes of arrayed nanopore sensors, and ii) a bioinformatics processing unit (BPU) that processes the gathered data in order to extract biologically relevant information. 39 | 40 | In this proposal we endeavor to produce a chip that has both a DROIC and BPU in the same substrate. The intent of this effort is to introduce a technology that, by virtue of even more aggressive miniaturization will make DNA sequencing more mobile, cheaper, and more applicable to a broader array of applications. 41 | 42 | 43 | Description 44 | =========== 45 | 46 | This project introduces a system on chip (SOC) including a high-speed, low-power mixed-signal readout array (the DROIC), and a RISC-V microprocessor (the BPU) for analyzing the readout data. The proposed DROIC system consists of an array of channels, capable of simultaneous amplification, filtering, and digitization of pico-ampere range current signals with sufficient accuracy and speed. Figure 1 depicts the general manner of operation of nanopore-based sequencing (i.e., DNA moves through a nanopore protein and thus induces a small current signature indicative of the DNA’s make-up) and the key DROIC and BPU blocks that enable it. The novelty of this design is the use of a new readout method in each channel to reduce power consumption compared to the previous works [1], [2], [3] as well as an in-pixel ADC, shown in Figure.2, to overcome substrate and switching noise. 47 | 48 |

49 | dnasns 50 |

51 |

Figure 1. A block diagram of the Nanopore Sensor, Analog and Digital Components.

52 | 53 | 54 | 55 | 56 |

57 | droic 58 |

59 |

Figure 2. A simplified block diagram of DROIC[4].

60 | 61 | Since the design includes on-chip ADCs for local digitization, this technique not only minimizes the distance over which analog data needs to be transported, but more importantly, makes the design more flexible for scaling up to hundreds of channels. Moreover, by using low-power, simpler design, the consumed area has been dramatically reduced, a step towards highly integrated arrays and, we anticipate, substantially miniaturized DNA sequencers. 62 | For the implementation of the readout channel, the circuit consists of an integrator with an active filter, a Low-Pass Filter (LPF) which uses a Gm-C filter, and an active Correlated Double Sampling (CDS) for further amplification and noise rejection. 63 | 64 | During amplification sequence, the Analog Front-End (AFE)’s output and control signals, have four main phases: 65 | 1) Reset (Resetting the amplifiers) 66 | 2) Noise sample (A time interval to sample the existing noise before the integration) 67 | 3) Integration (A time interval for amplification and noise removal) 68 | 4) Readout sample (A time interval at the end of the integration phase to sample the input current)
69 | 70 | Next, samples are converted to their digital equivalent using the local ADCs and then serially transmitted to a memory before being fetched by the RISC-V BPU (based on the open-source Rocket architecture) to perform a basecalling algorithm (i.e., conversion of gathered samples to their nucleotide/base text equivalent) on them as depicted in Figure 3. 71 | 72 |

73 | soc 74 |

75 |

Figure 3.An overview of the proposed system on chip (with only one measurement channel) for DNA sequencing, including Digital Read-Out circuity, a temporal memory and the RISC-V basecaller.

76 | 77 | 78 | The proposed DROIC, consumes an area of **_3×2 mm_2** with 30 parallel-operated channels. The size of each channel is **_320×220_ μm2** in 130-nm CMOS Technology. Besides, the respective chip size of BPU RISC-V core, I$, and D$ cache is about **_3.36×2.83 mm_2**, **_3.06×2.4 mm_2** and **_3.108×3.06 mm_2** in 130-nm CMOS. The DROIC and BPU share approximately 332 I/O pads that their size is **0.3×0.27 mm2**. Figure. 4 illustrates the detailed sizing of the system, touched upon earlier. 79 | 80 |

81 | sizes 82 |

Figure 4. Layout and sizing of the nanopore array.

83 | 84 | 85 | ### Layouts 86 | 87 | 88 | #### DROIC 89 | ![image](./layouts/dro.PNG) 90 | 91 | #### RISCV-BPU 92 | ![image](./layouts/bpu.png) 93 | 94 | 95 | 96 | Design Goals 97 | ======= 98 | 99 | The ultimate goal of this project is to integrate and fabricate the scalable DROIC and the BPU onto a single die to perform the DNA sequencing. By doing so, the time-consuming and costly arrangements for processing, testing and verifying the readout data would be avoided. This includes several tools and external hardware; hence, there will be a considerable reduction in costs. 100 | 101 | Integrating the RISC-V BPU and the ultra-sensitive discrete-time DROIC amplifiers will be a major contribution to the academia as well as the industry. To achieve this, a semi-sleep processor scheme has been proposed to cope with the noise disturbance of the processor, which will be placed in the far distance from the noise-prone amplifiers. While the channels are sampling, ADCs and any RISC-V chip need to be quiet. Then, once the channels are sampled and stored in a temporal memory, readout sampling will be stopped and immediately, the clock will become online to enable the ADCs to digitize the samples and the RISC-V BPU to determine the order of the four DNA bases, namely, A, C, T and G. The DNA input current sampling step will start again when the processor issues the done signal. This cyclic behavior of the system will be repeated until the complete DNA sequence is identified. Figure. 5. depicts the above process. 102 | 103 | Utilization of this new system will result in immense savings, as the previous methods for off-chip basecalling of the DROIC data requires several intermediate boards and a number of third-party software. In addition to this, due to the integration, there will be a drastic reduction in power dissipation, testing and diagnosing time, compared to the equivalent separate circuits. 104 | The fabrication of the proposed system will open new doors in future development and design of low-power, scalable DNA sequencing systems. 105 | 106 | 107 |

108 | flow 109 |

110 |

Figure 5. The diagram of a semi-sleep RISC-V processor.

111 | 112 | 113 | Team members 114 | ============ 115 | 116 | 1. **Sebastian Magierowski: Team Leader** 117 | • Professor, Dept of EECS, York University 118 | 2. **Amin Savari** 119 | • PhD Student, Dept of EECS, York University 120 | 3. **Sepideh Asgari** 121 | • PhD Student, Dept of EECS, York University 122 | 123 | References 124 | ========== 125 | 126 | 1. Dai, S., et al., A 155-dB dynamic range current measurement front end for electrochemical biosensing. IEEE transactions on biomedical circuits and systems, 2016. 10(5): p. 935-944. 127 | 2. Shekar, S., et al., Measurement of DNA translocation dynamics in a solid-state nanopore at 100 ns temporal resolution. Nano letters, 2016. 16(7): p. 4483-4489. 128 | 3. Taherzadeh-Sani, M., et al., A 170-dB $\Omega $ CMOS TIA With 52-pA Input-Referred Noise and 1-MHz Bandwidth for Very Low Current Sensing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017. 25(5): p. 1756-1766. 129 | 4. Dawji, Y., et al., A Scalable Discrete-Time Integrated CMOS Readout Array for Nanopore Based DNA Sequencing. IEEE Access, 2021. 9: p. 155543-155554. 130 | 131 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. Definitions. 8 | 9 | "License" shall mean the terms and conditions for use, reproduction, 10 | and distribution as defined by Sections 1 through 9 of this document. 11 | 12 | "Licensor" shall mean the copyright owner or entity authorized by 13 | the copyright owner that is granting the License. 14 | 15 | "Legal Entity" shall mean the union of the acting entity and all 16 | other entities that control, are controlled by, or are under common 17 | control with that entity. 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