├── README.md ├── output-doc ├── 1.IDDMM算法模型设计文档.docx ├── 2.IDDMM-MMP硬件设计文档.docx └── 3.算法实现合理性分析文档.docx ├── ppt └── 2020_E-M-T_IDDMM-MMP高性能蒙哥马利域模乘算法硬件实现.pptx ├── sim ├── mm_iddmm_pe_tb │ ├── run_iverilog.bat │ └── wave.gtkw ├── mm_iddmm_sp_tb │ ├── do.do │ ├── run_iverilog.bat │ ├── run_modelsim.bat │ ├── transcript │ └── wave.gtkw ├── mm_iddmm_sub_tb │ ├── a.mem │ ├── m.mem │ ├── run_iverilog.bat │ └── wave.gtkw ├── mm_r2mm_2n_tb │ └── run_iverilog.bat ├── mmp_iddmm_addend_tb │ ├── mmp_iddmm_addend_tb.gtkw │ └── run_iverilog.bat ├── mmp_iddmm_addfirst_tb │ ├── mmp_iddmm_addfirst_tb.gtkw │ └── run_iverilog.bat ├── mmp_iddmm_pe_tb │ ├── run_iverilog.bat │ └── wave.gtkw ├── mmp_iddmm_sp_tb │ ├── do.do │ ├── run_iverilog.bat │ ├── run_modelsim.bat │ ├── transcript │ ├── wave.do │ ├── wave.gtkw │ └── wlft56ca0e ├── simple_cclaa_x4bit_tb │ ├── run_iverilog.bat │ └── simple_cclaa_x4bit_tb.gtkw ├── simple_claa_4bit_tb │ ├── run_iverilog.bat │ └── simple_claa_4bit_tb.gtkw ├── simple_mlclaa_16bit_tb │ ├── run_iverilog.bat │ └── simple_mlclaa_16bit_tb.gtkw ├── simple_vedic_16bit_tb │ ├── run_iverilog.bat │ └── simple_vedic_16bit_tb.gtkw ├── simple_vedic_32bit_tb │ ├── run_iverilog.bat │ └── simple_vedic_32bit_tb.gtkw ├── simple_vedic_4bit_tb │ └── run_iverilog.bat ├── simple_vedic_64bit_tb │ ├── run_iverilog.bat │ └── simple_vedic_64bit_tb.gtkw └── simple_vedic_8bit_tb │ └── run_iverilog.bat ├── src ├── a0.mem ├── bkup │ └── mm_iddmm_sub.v ├── common │ ├── mult32x32 │ │ ├── bk16x16-9 │ │ │ └── mult.v │ │ ├── bk32x32-3 │ │ │ └── mult.v │ │ ├── mult.v │ │ ├── mult_tb.v │ │ ├── mult_tb.vcd │ │ ├── mult_tb.vvp │ │ └── run_iverilog.bat │ ├── simple_cclaa_x4bit.v │ ├── simple_cclaa_x4bit_tb.v │ ├── simple_claa_4bit.v │ ├── simple_claa_4bit_tb.v │ ├── simple_mlclaa_16bit.v │ ├── simple_mlclaa_16bit_tb.v │ ├── simple_mlclaa_x16bit.v │ ├── simple_p12adder256_3_2.v │ ├── simple_p1adder129.v │ ├── simple_ram.v │ ├── simple_vedic_128bit.v │ ├── simple_vedic_16bit.v │ ├── simple_vedic_16bit_tb.v │ ├── simple_vedic_32bit.v │ ├── simple_vedic_32bit_tb.v │ ├── simple_vedic_4bit.v │ ├── simple_vedic_4bit_tb.v │ ├── simple_vedic_64bit.v │ ├── simple_vedic_64bit_tb.v │ ├── simple_vedic_8bit.v │ └── simple_vedic_8bit_tb.v ├── m.mem ├── mm_iddmm_pe.v ├── mm_iddmm_pe_tb.v ├── mm_iddmm_sp.v ├── mm_iddmm_sp_tb.v ├── mm_iddmm_sub.v ├── mm_iddmm_sub_tb.v ├── mm_iddmm_top.v ├── mm_r2mm.v ├── mm_r2mm_2n.v ├── mm_r2mm_2n_tb.v ├── mm_v_sim_model.v ├── mmp_iddmm_addend.v ├── mmp_iddmm_addend_tb.v ├── mmp_iddmm_addfirst.v ├── mmp_iddmm_addfirst_tb.v ├── mmp_iddmm_ctrl.v ├── mmp_iddmm_mul128.v ├── mmp_iddmm_pe.v ├── mmp_iddmm_pe_tb.v ├── mmp_iddmm_shift.v ├── mmp_iddmm_sp.v ├── mmp_iddmm_sp_tb.v ├── mmp_iddmm_top.v ├── montgomery_mul_hd.py ├── src_impl ├── src_sim ├── trash │ ├── mm_iddmm_sub.v │ └── mm_sv_sim_model.sv ├── x.mem └── y.mem ├── vivado-mm ├── fpga.xdc ├── make.bat └── make.tcl └── vivado-mmp ├── fpga.xdc ├── make.bat ├── make.tcl └── 必须使用vivado 2017.4 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