├── .gitignore
├── .packignore
├── i.MX RT 第一部分
├── 01，没有例程 看教程即可
│ └── 该章节没有实验代码 看对应的教程即可.txt
├── 02，没有例程 看教程即可
│ └── 该章节没有实验代码 看对应的教程即可.txt
├── 03，没有例程 看教程即可
│ └── 该章节没有实验代码 看对应的教程即可.txt
├── 04，新建FreeRTOS工程—软件仿真
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── 该章节没有实验代码 看对应的教程即可.txt
├── 05，裸机系统与多线程系统
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── 该章节没有实验代码 看对应的教程即可.txt
├── 06，列表与列表项
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ └── projdefs.h
│ │ └── list.c
├── 07，任务的定义与任务切换的实现
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ ├── projdefs.h
│ │ └── task.h
│ │ ├── list.c
│ │ ├── portable
│ │ └── RVDS
│ │ │ └── ARM_CM3
│ │ │ └── port.c
│ │ └── task.c
├── 08，临界段的保护
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ ├── projdefs.h
│ │ └── task.h
│ │ ├── list.c
│ │ ├── portable
│ │ └── RVDS
│ │ │ └── ARM_CM3
│ │ │ └── port.c
│ │ └── task.c
├── 09，空闲任务与阻塞延时的实现
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ ├── projdefs.h
│ │ └── task.h
│ │ ├── list.c
│ │ ├── portable
│ │ └── RVDS
│ │ │ └── ARM_CM3
│ │ │ └── port.c
│ │ └── task.c
├── 10，支持多优先级
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ ├── projdefs.h
│ │ └── task.h
│ │ ├── list.c
│ │ ├── portable
│ │ └── RVDS
│ │ │ └── ARM_CM3
│ │ │ └── port.c
│ │ └── task.c
├── 11，任务延时列表的实现
│ ├── Doc
│ │ └── readm.txt
│ ├── Project
│ │ ├── Fire_FreeRTOS.Administrator
│ │ ├── Fire_FreeRTOS.uvoptx
│ │ ├── Fire_FreeRTOS.uvprojx
│ │ ├── Objects
│ │ │ └── YH-RT-Thread.sct
│ │ └── RTE
│ │ │ ├── Device
│ │ │ └── ARMCM7
│ │ │ │ ├── startup_ARMCM7.s
│ │ │ │ └── system_ARMCM7.c
│ │ │ └── _Target_1
│ │ │ └── RTE_Components.h
│ ├── User
│ │ └── main.c
│ └── freertos
│ │ ├── include
│ │ ├── FreeRTOS.h
│ │ ├── FreeRTOSConfig.h
│ │ ├── list.h
│ │ ├── portable.h
│ │ ├── portmacro.h
│ │ ├── projdefs.h
│ │ └── task.h
│ │ ├── list.c
│ │ ├── portable
│ │ └── RVDS
│ │ │ └── ARM_CM3
│ │ │ └── port.c
│ │ └── task.c
└── 12，支持时间片
│ ├── Doc
│ └── readm.txt
│ ├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ ├── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── ARMCM7
│ │ │ ├── startup_ARMCM7.s
│ │ │ └── system_ARMCM7.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
│ ├── User
│ └── main.c
│ └── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
└── stm32 第一部分
├── 01，没有例程 看教程即可
└── 该章节没有实验代码 看对应的教程即可.txt
├── 02，没有例程 看教程即可
└── 该章节没有实验代码 看对应的教程即可.txt
├── 03，没有例程 看教程即可
└── 该章节没有实验代码 看对应的教程即可.txt
├── 04，新建FreeRTOS工程—软件仿真
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── 该章节没有实验代码 看对应的教程即可.txt
├── 05，裸机系统与多线程系统
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── 该章节没有实验代码 看对应的教程即可.txt
├── 06，列表与列表项
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ └── projdefs.h
│ └── list.c
├── 07，任务的定义与任务切换的实现
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
├── 08，临界段的保护
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
├── 09，空闲任务与阻塞延时的实现
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
├── 10，支持多优先级
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
├── 11，任务延时列表的实现
├── Doc
│ └── readm.txt
├── Project
│ ├── Fire_FreeRTOS.Administrator
│ ├── Fire_FreeRTOS.uvoptx
│ ├── Fire_FreeRTOS.uvprojx
│ ├── Objects
│ │ └── YH-RT-Thread.sct
│ └── RTE
│ │ ├── Device
│ │ └── ARMCM3
│ │ │ ├── startup_ARMCM3.s
│ │ │ └── system_ARMCM3.c
│ │ └── _Target_1
│ │ └── RTE_Components.h
├── User
│ └── main.c
└── freertos
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig.h
│ ├── list.h
│ ├── portable.h
│ ├── portmacro.h
│ ├── projdefs.h
│ └── task.h
│ ├── list.c
│ ├── portable
│ └── RVDS
│ │ └── ARM_CM3
│ │ └── port.c
│ └── task.c
└── 12，支持时间片
├── Doc
└── readm.txt
├── Project
├── Fire_FreeRTOS.Administrator
├── Fire_FreeRTOS.uvoptx
├── Fire_FreeRTOS.uvprojx
├── Objects
│ └── YH-RT-Thread.sct
└── RTE
│ ├── Device
│ └── ARMCM3
│ │ ├── startup_ARMCM3.s
│ │ └── system_ARMCM3.c
│ └── _Target_1
│ └── RTE_Components.h
├── User
└── main.c
└── freertos
├── include
├── FreeRTOS.h
├── FreeRTOSConfig.h
├── list.h
├── portable.h
├── portmacro.h
├── projdefs.h
└── task.h
├── list.c
├── portable
└── RVDS
│ └── ARM_CM3
│ └── port.c
└── task.c
/.gitignore:
--------------------------------------------------------------------------------
1 | # Private settings
2 | private_settings.py
3 |
4 | # Compiled Object files
5 | *.slo
6 | *.lo
7 | *.o
8 | tmp/
9 |
10 | # Compiled Dynamic libraries
11 | *.so
12 | *.dylib
13 |
14 | # Compiled Static libraries
15 | *.lai
16 | *.la
17 | *.a
18 |
19 | # Python
20 | *.py[cod]
21 |
22 | # Eclipse Project Files
23 | .cproject
24 | .project
25 | .pydevproject
26 |
27 | # uVision generated files
28 | *.uvopt
29 | *.uvgui.*
30 | *.uvguix.*
31 | *.TMP
32 | *.scvd
33 |
34 | *.plg
35 | *.map
36 | *.lst
37 | *.lnp
38 | *.htm
39 | *.dep
40 | *.d
41 | *.crf
42 | *.bak
43 |
44 | *.axf
45 | *.S19
46 | *.bin
47 | *.hex
48 | *.dep
49 | *.FLM
50 | *.iex
51 |
52 | # JLink files
53 | JLink*.*
54 |
55 | # Output directories
56 | Output
57 | Lst
58 | Obj
59 |
60 | # cscope
61 | cscope.*
62 |
63 | # PyCharm project files
64 | .idea
65 |
66 | # ctags
67 | tags
68 |
69 | # Doxygen tags and html output
70 | *.tag
71 | html
72 | debug.txt
73 | /【固件库】STM32F10x_StdPeriph_Lib_V3.5.0
74 | keilkill.bat
75 | settings
76 |
77 | #IAR files
78 |
79 | *.out
80 | *.sim
81 | *.log
82 | *.ld
83 |
84 |
--------------------------------------------------------------------------------
/.packignore:
--------------------------------------------------------------------------------
1 | .git
2 | .gitignore
3 | keilkill.bat
4 |
5 |
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/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/Project/Objects/YH-RT-Thread.sct:
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3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
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10 | .ANY (+XO)
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/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/User/main.c:
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https://raw.githubusercontent.com/Embedfire-freertos/ebf_freertos_tutorial_code_1/d50dfb9ef3bf75e33336e04716409999f6f32589/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/User/main.c
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/i.MX RT 第一部分/04，新建FreeRTOS工程—软件仿真/该章节没有实验代码 看对应的教程即可.txt:
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/i.MX RT 第一部分/05，裸机系统与多线程系统/Doc/readm.txt:
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/i.MX RT 第一部分/05，裸机系统与多线程系统/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/05，裸机系统与多线程系统/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/05，裸机系统与多线程系统/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/05，裸机系统与多线程系统/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/05，裸机系统与多线程系统/User/main.c:
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https://raw.githubusercontent.com/Embedfire-freertos/ebf_freertos_tutorial_code_1/d50dfb9ef3bf75e33336e04716409999f6f32589/i.MX RT 第一部分/05，裸机系统与多线程系统/User/main.c
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/i.MX RT 第一部分/05，裸机系统与多线程系统/该章节没有实验代码 看对应的教程即可.txt:
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/i.MX RT 第一部分/06，列表与列表项/Doc/readm.txt:
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https://raw.githubusercontent.com/Embedfire-freertos/ebf_freertos_tutorial_code_1/d50dfb9ef3bf75e33336e04716409999f6f32589/i.MX RT 第一部分/06，列表与列表项/Doc/readm.txt
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/i.MX RT 第一部分/06，列表与列表项/Project/Objects/YH-RT-Thread.sct:
--------------------------------------------------------------------------------
1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/06，列表与列表项/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
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/i.MX RT 第一部分/06，列表与列表项/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
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/i.MX RT 第一部分/06，列表与列表项/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/06，列表与列表项/freertos/include/FreeRTOS.h:
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1 | #ifndef INC_FREERTOS_H
2 | #define INC_FREERTOS_H
3 |
4 | #include "FreeRTOSConfig.h"
5 | #include "portable.h"
6 |
7 |
8 | #endif /* INC_FREERTOS_H */
9 |
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/i.MX RT 第一部分/06，列表与列表项/freertos/include/FreeRTOSConfig.h:
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1 | #ifndef FREERTOS_CONFIG_H
2 | #define FREERTOS_CONFIG_H
3 |
4 | #define configUSE_16_BIT_TICKS 0
5 |
6 |
7 | #endif /* FREERTOS_CONFIG_H */
8 |
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/i.MX RT 第一部分/06，列表与列表项/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | #endif /* PORTABLE_H */
8 |
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/i.MX RT 第一部分/06，列表与列表项/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | //typedef void (*TaskFunction_t)( void * );
5 |
6 | #endif /* PROJDEFS_H */
7 |
8 |
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/Doc/readm.txt:
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
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1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/07，任务的定义与任务切换的实现/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/i.MX RT 第一部分/07，任务的定义与任务切换的实现/freertos/task.c:
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/i.MX RT 第一部分/08，临界段的保护/Doc/readm.txt:
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/i.MX RT 第一部分/08，临界段的保护/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/08，临界段的保护/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
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1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
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/i.MX RT 第一部分/08，临界段的保护/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/08，临界段的保护/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/08，临界段的保护/User/main.c:
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/i.MX RT 第一部分/08，临界段的保护/freertos/include/FreeRTOS.h:
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/i.MX RT 第一部分/08，临界段的保护/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/i.MX RT 第一部分/08，临界段的保护/freertos/include/portmacro.h:
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/i.MX RT 第一部分/08，临界段的保护/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/i.MX RT 第一部分/08，临界段的保护/freertos/include/task.h:
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1 | #ifndef INC_TASK_H
2 | #define INC_TASK_H
3 |
4 | #include "list.h"
5 |
6 | typedef void * TaskHandle_t;
7 |
8 |
9 | #if( configSUPPORT_STATIC_ALLOCATION == 1 )
10 | TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
11 | const char * const pcName,
12 | const uint32_t ulStackDepth,
13 | void * const pvParameters,
14 | StackType_t * const puxStackBuffer,
15 | TCB_t * const pxTaskBuffer );
16 | #endif /* configSUPPORT_STATIC_ALLOCATION */
17 |
18 | void prvInitialiseTaskLists( void );
19 | void vTaskStartScheduler( void );
20 | void vTaskSwitchContext( void );
21 |
22 | #endif /* INC_TASK_H */
23 |
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/i.MX RT 第一部分/08，临界段的保护/freertos/list.c:
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/i.MX RT 第一部分/08，临界段的保护/freertos/portable/RVDS/ARM_CM3/port.c:
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/i.MX RT 第一部分/08，临界段的保护/freertos/task.c:
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/Doc/readm.txt:
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
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1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/i.MX RT 第一部分/09，空闲任务与阻塞延时的实现/freertos/include/task.h:
--------------------------------------------------------------------------------
1 | #ifndef INC_TASK_H
2 | #define INC_TASK_H
3 |
4 | #include "list.h"
5 |
6 | #define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U )
7 | #define taskYIELD() portYIELD()
8 |
9 | typedef void * TaskHandle_t;
10 |
11 |
12 | #if( configSUPPORT_STATIC_ALLOCATION == 1 )
13 | TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
14 | const char * const pcName,
15 | const uint32_t ulStackDepth,
16 | void * const pvParameters,
17 | StackType_t * const puxStackBuffer,
18 | TCB_t * const pxTaskBuffer );
19 | #endif /* configSUPPORT_STATIC_ALLOCATION */
20 |
21 | void prvInitialiseTaskLists( void );
22 | void vTaskStartScheduler( void );
23 | void vTaskSwitchContext( void );
24 | void vTaskDelay( const TickType_t xTicksToDelay );
25 | void xTaskIncrementTick( void );
26 |
27 |
28 | #endif /* INC_TASK_H */
29 |
30 |
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/i.MX RT 第一部分/10，支持多优先级/Doc/readm.txt:
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/i.MX RT 第一部分/10，支持多优先级/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
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/i.MX RT 第一部分/10，支持多优先级/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
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/i.MX RT 第一部分/10，支持多优先级/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/10，支持多优先级/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/10，支持多优先级/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/i.MX RT 第一部分/10，支持多优先级/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/i.MX RT 第一部分/11，任务延时列表的实现/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/11，任务延时列表的实现/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
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1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/11，任务延时列表的实现/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
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/i.MX RT 第一部分/11，任务延时列表的实现/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/11，任务延时列表的实现/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/i.MX RT 第一部分/11，任务延时列表的实现/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/i.MX RT 第一部分/12，支持时间片/Doc/readm.txt:
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/i.MX RT 第一部分/12，支持时间片/Project/Objects/YH-RT-Thread.sct:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | .ANY (+XO)
11 | }
12 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
13 | .ANY (+RW +ZI)
14 | }
15 | }
16 |
17 |
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/i.MX RT 第一部分/12，支持时间片/Project/RTE/Device/ARMCM3/startup_ARMCM3.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM3.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM3 Device Series
5 | ; * @version V5.00
6 | ; * @date 02. March 2016
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;/*
27 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
28 | ;*/
29 |
30 |
31 | ; Stack Configuration
32 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
33 | ;
34 |
35 | Stack_Size EQU 0x00000400
36 |
37 | AREA STACK, NOINIT, READWRITE, ALIGN=3
38 | Stack_Mem SPACE Stack_Size
39 | __initial_sp
40 |
41 |
42 | ; Heap Configuration
43 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
44 | ;
45 |
46 | Heap_Size EQU 0x00000C00
47 |
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 |
53 |
54 | PRESERVE8
55 | THUMB
56 |
57 |
58 | ; Vector Table Mapped to Address 0 at Reset
59 |
60 | AREA RESET, DATA, READONLY
61 | EXPORT __Vectors
62 | EXPORT __Vectors_End
63 | EXPORT __Vectors_Size
64 |
65 | __Vectors DCD __initial_sp ; Top of Stack
66 | DCD Reset_Handler ; Reset Handler
67 | DCD NMI_Handler ; NMI Handler
68 | DCD HardFault_Handler ; Hard Fault Handler
69 | DCD MemManage_Handler ; MPU Fault Handler
70 | DCD BusFault_Handler ; Bus Fault Handler
71 | DCD UsageFault_Handler ; Usage Fault Handler
72 | DCD 0 ; Reserved
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD SVC_Handler ; SVCall Handler
77 | DCD DebugMon_Handler ; Debug Monitor Handler
78 | DCD 0 ; Reserved
79 | DCD PendSV_Handler ; PendSV Handler
80 | DCD SysTick_Handler ; SysTick Handler
81 |
82 | ; External Interrupts
83 | DCD WDT_IRQHandler ; 0: Watchdog Timer
84 | DCD RTC_IRQHandler ; 1: Real Time Clock
85 | DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
86 | DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
87 | DCD MCIA_IRQHandler ; 4: MCIa
88 | DCD MCIB_IRQHandler ; 5: MCIb
89 | DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
90 | DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
91 | DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
92 | DCD UART4_IRQHandler ; 9: UART4 - not connected
93 | DCD AACI_IRQHandler ; 10: AACI / AC97
94 | DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
95 | DCD ENET_IRQHandler ; 12: Ethernet
96 | DCD USBDC_IRQHandler ; 13: USB Device
97 | DCD USBHC_IRQHandler ; 14: USB Host Controller
98 | DCD CHLCD_IRQHandler ; 15: Character LCD
99 | DCD FLEXRAY_IRQHandler ; 16: Flexray
100 | DCD CAN_IRQHandler ; 17: CAN
101 | DCD LIN_IRQHandler ; 18: LIN
102 | DCD I2C_IRQHandler ; 19: I2C ADC/DAC
103 | DCD 0 ; 20: Reserved
104 | DCD 0 ; 21: Reserved
105 | DCD 0 ; 22: Reserved
106 | DCD 0 ; 23: Reserved
107 | DCD 0 ; 24: Reserved
108 | DCD 0 ; 25: Reserved
109 | DCD 0 ; 26: Reserved
110 | DCD 0 ; 27: Reserved
111 | DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
112 | DCD 0 ; 29: Reserved - CPU FPGA
113 | DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
114 | DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
115 | __Vectors_End
116 |
117 | __Vectors_Size EQU __Vectors_End - __Vectors
118 |
119 | AREA |.text|, CODE, READONLY
120 |
121 |
122 | ; Reset Handler
123 |
124 | Reset_Handler PROC
125 | EXPORT Reset_Handler [WEAK]
126 | IMPORT SystemInit
127 | IMPORT __main
128 | LDR R0, =SystemInit
129 | BLX R0
130 | LDR R0, =__main
131 | BX R0
132 | ENDP
133 |
134 |
135 | ; Dummy Exception Handlers (infinite loops which can be modified)
136 |
137 | NMI_Handler PROC
138 | EXPORT NMI_Handler [WEAK]
139 | B .
140 | ENDP
141 | HardFault_Handler\
142 | PROC
143 | EXPORT HardFault_Handler [WEAK]
144 | B .
145 | ENDP
146 | MemManage_Handler\
147 | PROC
148 | EXPORT MemManage_Handler [WEAK]
149 | B .
150 | ENDP
151 | BusFault_Handler\
152 | PROC
153 | EXPORT BusFault_Handler [WEAK]
154 | B .
155 | ENDP
156 | UsageFault_Handler\
157 | PROC
158 | EXPORT UsageFault_Handler [WEAK]
159 | B .
160 | ENDP
161 | SVC_Handler PROC
162 | EXPORT SVC_Handler [WEAK]
163 | B .
164 | ENDP
165 | DebugMon_Handler\
166 | PROC
167 | EXPORT DebugMon_Handler [WEAK]
168 | B .
169 | ENDP
170 | PendSV_Handler PROC
171 | EXPORT PendSV_Handler [WEAK]
172 | B .
173 | ENDP
174 | SysTick_Handler PROC
175 | EXPORT SysTick_Handler [WEAK]
176 | B .
177 | ENDP
178 |
179 | Default_Handler PROC
180 |
181 | EXPORT WDT_IRQHandler [WEAK]
182 | EXPORT RTC_IRQHandler [WEAK]
183 | EXPORT TIM0_IRQHandler [WEAK]
184 | EXPORT TIM2_IRQHandler [WEAK]
185 | EXPORT MCIA_IRQHandler [WEAK]
186 | EXPORT MCIB_IRQHandler [WEAK]
187 | EXPORT UART0_IRQHandler [WEAK]
188 | EXPORT UART1_IRQHandler [WEAK]
189 | EXPORT UART2_IRQHandler [WEAK]
190 | EXPORT UART3_IRQHandler [WEAK]
191 | EXPORT UART4_IRQHandler [WEAK]
192 | EXPORT AACI_IRQHandler [WEAK]
193 | EXPORT CLCD_IRQHandler [WEAK]
194 | EXPORT ENET_IRQHandler [WEAK]
195 | EXPORT USBDC_IRQHandler [WEAK]
196 | EXPORT USBHC_IRQHandler [WEAK]
197 | EXPORT CHLCD_IRQHandler [WEAK]
198 | EXPORT FLEXRAY_IRQHandler [WEAK]
199 | EXPORT CAN_IRQHandler [WEAK]
200 | EXPORT LIN_IRQHandler [WEAK]
201 | EXPORT I2C_IRQHandler [WEAK]
202 | EXPORT CPU_CLCD_IRQHandler [WEAK]
203 | EXPORT SPI_IRQHandler [WEAK]
204 |
205 | WDT_IRQHandler
206 | RTC_IRQHandler
207 | TIM0_IRQHandler
208 | TIM2_IRQHandler
209 | MCIA_IRQHandler
210 | MCIB_IRQHandler
211 | UART0_IRQHandler
212 | UART1_IRQHandler
213 | UART2_IRQHandler
214 | UART3_IRQHandler
215 | UART4_IRQHandler
216 | AACI_IRQHandler
217 | CLCD_IRQHandler
218 | ENET_IRQHandler
219 | USBDC_IRQHandler
220 | USBHC_IRQHandler
221 | CHLCD_IRQHandler
222 | FLEXRAY_IRQHandler
223 | CAN_IRQHandler
224 | LIN_IRQHandler
225 | I2C_IRQHandler
226 | CPU_CLCD_IRQHandler
227 | SPI_IRQHandler
228 | B .
229 |
230 | ENDP
231 |
232 |
233 | ALIGN
234 |
235 |
236 | ; User Initial Stack & Heap
237 |
238 | IF :DEF:__MICROLIB
239 |
240 | EXPORT __initial_sp
241 | EXPORT __heap_base
242 | EXPORT __heap_limit
243 |
244 | ELSE
245 |
246 | IMPORT __use_two_region_memory
247 | EXPORT __user_initial_stackheap
248 |
249 | __user_initial_stackheap PROC
250 | LDR R0, = Heap_Mem
251 | LDR R1, =(Stack_Mem + Stack_Size)
252 | LDR R2, = (Heap_Mem + Heap_Size)
253 | LDR R3, = Stack_Mem
254 | BX LR
255 | ENDP
256 |
257 | ALIGN
258 |
259 | ENDIF
260 |
261 |
262 | END
263 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/12，支持时间片/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/12，支持时间片/Project/RTE/Device/ARMCM7/startup_ARMCM7.s:
--------------------------------------------------------------------------------
1 | ;/**************************************************************************//**
2 | ; * @file startup_ARMCM7.s
3 | ; * @brief CMSIS Core Device Startup File for
4 | ; * ARMCM7 Device
5 | ; * @version V5.4.0
6 | ; * @date 12. December 2018
7 | ; ******************************************************************************/
8 | ;/*
9 | ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | ; *
11 | ; * SPDX-License-Identifier: Apache-2.0
12 | ; *
13 | ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 | ; * not use this file except in compliance with the License.
15 | ; * You may obtain a copy of the License at
16 | ; *
17 | ; * www.apache.org/licenses/LICENSE-2.0
18 | ; *
19 | ; * Unless required by applicable law or agreed to in writing, software
20 | ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | ; * See the License for the specific language governing permissions and
23 | ; * limitations under the License.
24 | ; */
25 |
26 | ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
27 |
28 |
29 | ; Stack Configuration
30 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31 | ;
32 |
33 | Stack_Size EQU 0x00000400
34 |
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3
36 | __stack_limit
37 | Stack_Mem SPACE Stack_Size
38 | __initial_sp
39 |
40 |
41 | ; Heap Configuration
42 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 | ;
44 |
45 | Heap_Size EQU 0x00000C00
46 |
47 | IF Heap_Size != 0 ; Heap is provided
48 | AREA HEAP, NOINIT, READWRITE, ALIGN=3
49 | __heap_base
50 | Heap_Mem SPACE Heap_Size
51 | __heap_limit
52 | ENDIF
53 |
54 |
55 | PRESERVE8
56 | THUMB
57 |
58 |
59 | ; Vector Table Mapped to Address 0 at Reset
60 |
61 | AREA RESET, DATA, READONLY
62 | EXPORT __Vectors
63 | EXPORT __Vectors_End
64 | EXPORT __Vectors_Size
65 |
66 | __Vectors DCD __initial_sp ; Top of Stack
67 | DCD Reset_Handler ; Reset Handler
68 | DCD NMI_Handler ; -14 NMI Handler
69 | DCD HardFault_Handler ; -13 Hard Fault Handler
70 | DCD MemManage_Handler ; -12 MPU Fault Handler
71 | DCD BusFault_Handler ; -11 Bus Fault Handler
72 | DCD UsageFault_Handler ; -10 Usage Fault Handler
73 | DCD 0 ; Reserved
74 | DCD 0 ; Reserved
75 | DCD 0 ; Reserved
76 | DCD 0 ; Reserved
77 | DCD SVC_Handler ; -5 SVCall Handler
78 | DCD DebugMon_Handler ; -4 Debug Monitor Handler
79 | DCD 0 ; Reserved
80 | DCD PendSV_Handler ; -2 PendSV Handler
81 | DCD SysTick_Handler ; -1 SysTick Handler
82 |
83 | ; Interrupts
84 | DCD Interrupt0_Handler ; 0 Interrupt 0
85 | DCD Interrupt1_Handler ; 1 Interrupt 1
86 | DCD Interrupt2_Handler ; 2 Interrupt 2
87 | DCD Interrupt3_Handler ; 3 Interrupt 3
88 | DCD Interrupt4_Handler ; 4 Interrupt 4
89 | DCD Interrupt5_Handler ; 5 Interrupt 5
90 | DCD Interrupt6_Handler ; 6 Interrupt 6
91 | DCD Interrupt7_Handler ; 7 Interrupt 7
92 | DCD Interrupt8_Handler ; 8 Interrupt 8
93 | DCD Interrupt9_Handler ; 9 Interrupt 9
94 |
95 | SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
96 | __Vectors_End
97 | __Vectors_Size EQU __Vectors_End - __Vectors
98 |
99 |
100 | AREA |.text|, CODE, READONLY
101 |
102 | ; Reset Handler
103 |
104 | Reset_Handler PROC
105 | EXPORT Reset_Handler [WEAK]
106 | IMPORT SystemInit
107 | IMPORT __main
108 |
109 | LDR R0, =SystemInit
110 | BLX R0
111 | LDR R0, =__main
112 | BX R0
113 | ENDP
114 |
115 |
116 | ; Macro to define default exception/interrupt handlers.
117 | ; Default handler are weak symbols with an endless loop.
118 | ; They can be overwritten by real handlers.
119 | MACRO
120 | Set_Default_Handler $Handler_Name
121 | $Handler_Name PROC
122 | EXPORT $Handler_Name [WEAK]
123 | B .
124 | ENDP
125 | MEND
126 |
127 |
128 | ; Default exception/interrupt handler
129 |
130 | Set_Default_Handler NMI_Handler
131 | Set_Default_Handler HardFault_Handler
132 | Set_Default_Handler MemManage_Handler
133 | Set_Default_Handler BusFault_Handler
134 | Set_Default_Handler UsageFault_Handler
135 | Set_Default_Handler SVC_Handler
136 | Set_Default_Handler DebugMon_Handler
137 | Set_Default_Handler PendSV_Handler
138 | Set_Default_Handler SysTick_Handler
139 |
140 | Set_Default_Handler Interrupt0_Handler
141 | Set_Default_Handler Interrupt1_Handler
142 | Set_Default_Handler Interrupt2_Handler
143 | Set_Default_Handler Interrupt3_Handler
144 | Set_Default_Handler Interrupt4_Handler
145 | Set_Default_Handler Interrupt5_Handler
146 | Set_Default_Handler Interrupt6_Handler
147 | Set_Default_Handler Interrupt7_Handler
148 | Set_Default_Handler Interrupt8_Handler
149 | Set_Default_Handler Interrupt9_Handler
150 |
151 | ALIGN
152 |
153 |
154 | ; User setup Stack & Heap
155 |
156 | IF :LNOT::DEF:__MICROLIB
157 | IMPORT __use_two_region_memory
158 | ENDIF
159 |
160 | EXPORT __stack_limit
161 | EXPORT __initial_sp
162 | IF Heap_Size != 0 ; Heap is provided
163 | EXPORT __heap_base
164 | EXPORT __heap_limit
165 | ENDIF
166 |
167 | END
168 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/12，支持时间片/Project/RTE/Device/ARMCM7/system_ARMCM7.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM7.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM7 Device
5 | * @version V5.3.1
6 | * @date 09. July 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #if defined (ARMCM7)
27 | #include "ARMCM7.h"
28 | #elif defined (ARMCM7_SP)
29 | #include "ARMCM7_SP.h"
30 | #elif defined (ARMCM7_DP)
31 | #include "ARMCM7_DP.h"
32 | #else
33 | #error device not specified!
34 | #endif
35 |
36 | /*----------------------------------------------------------------------------
37 | Define clocks
38 | *----------------------------------------------------------------------------*/
39 | #define XTAL (50000000UL) /* Oscillator frequency */
40 |
41 | #define SYSTEM_CLOCK (XTAL / 2U)
42 |
43 |
44 | /*----------------------------------------------------------------------------
45 | Externals
46 | *----------------------------------------------------------------------------*/
47 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
48 | extern uint32_t __Vectors;
49 | #endif
50 |
51 | /*----------------------------------------------------------------------------
52 | System Core Clock Variable
53 | *----------------------------------------------------------------------------*/
54 | uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
55 |
56 |
57 | /*----------------------------------------------------------------------------
58 | System Core Clock update function
59 | *----------------------------------------------------------------------------*/
60 | void SystemCoreClockUpdate (void)
61 | {
62 | SystemCoreClock = SYSTEM_CLOCK;
63 | }
64 |
65 | /*----------------------------------------------------------------------------
66 | System initialization function
67 | *----------------------------------------------------------------------------*/
68 | void SystemInit (void)
69 | {
70 |
71 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
72 | SCB->VTOR = (uint32_t) &__Vectors;
73 | #endif
74 |
75 | #if defined (__FPU_USED) && (__FPU_USED == 1U)
76 | SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
77 | (3U << 11U*2U) ); /* enable CP11 Full Access */
78 | #endif
79 |
80 | #ifdef UNALIGNED_SUPPORT_DISABLE
81 | SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
82 | #endif
83 |
84 | SystemCoreClock = SYSTEM_CLOCK;
85 | }
86 |
--------------------------------------------------------------------------------
/i.MX RT 第一部分/12，支持时间片/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM7.h"
18 |
19 |
20 |
21 | #endif /* RTE_COMPONENTS_H */
22 |
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/i.MX RT 第一部分/12，支持时间片/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/i.MX RT 第一部分/12，支持时间片/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
--------------------------------------------------------------------------------
/stm32 第一部分/04，新建FreeRTOS工程—软件仿真/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/04，新建FreeRTOS工程—软件仿真/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/05，裸机系统与多线程系统/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/05，裸机系统与多线程系统/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/06，列表与列表项/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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/stm32 第一部分/06，列表与列表项/freertos/include/FreeRTOS.h:
--------------------------------------------------------------------------------
1 | #ifndef INC_FREERTOS_H
2 | #define INC_FREERTOS_H
3 |
4 | #include "FreeRTOSConfig.h"
5 | #include "portable.h"
6 |
7 |
8 | #endif /* INC_FREERTOS_H */
9 |
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/stm32 第一部分/06，列表与列表项/freertos/include/FreeRTOSConfig.h:
--------------------------------------------------------------------------------
1 | #ifndef FREERTOS_CONFIG_H
2 | #define FREERTOS_CONFIG_H
3 |
4 | #define configUSE_16_BIT_TICKS 0
5 |
6 |
7 | #endif /* FREERTOS_CONFIG_H */
8 |
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | #endif /* PORTABLE_H */
8 |
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | //typedef void (*TaskFunction_t)( void * );
5 |
6 | #endif /* PROJDEFS_H */
7 |
8 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/07，任务的定义与任务切换的实现/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/07，任务的定义与任务切换的实现/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/08，临界段的保护/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/08，临界段的保护/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/stm32 第一部分/08，临界段的保护/freertos/include/task.h:
--------------------------------------------------------------------------------
1 | #ifndef INC_TASK_H
2 | #define INC_TASK_H
3 |
4 | #include "list.h"
5 |
6 | typedef void * TaskHandle_t;
7 |
8 |
9 | #if( configSUPPORT_STATIC_ALLOCATION == 1 )
10 | TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
11 | const char * const pcName,
12 | const uint32_t ulStackDepth,
13 | void * const pvParameters,
14 | StackType_t * const puxStackBuffer,
15 | TCB_t * const pxTaskBuffer );
16 | #endif /* configSUPPORT_STATIC_ALLOCATION */
17 |
18 | void prvInitialiseTaskLists( void );
19 | void vTaskStartScheduler( void );
20 | void vTaskSwitchContext( void );
21 |
22 | #endif /* INC_TASK_H */
23 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/09，空闲任务与阻塞延时的实现/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/09，空闲任务与阻塞延时的实现/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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--------------------------------------------------------------------------------
1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
--------------------------------------------------------------------------------
/stm32 第一部分/09，空闲任务与阻塞延时的实现/freertos/include/task.h:
--------------------------------------------------------------------------------
1 | #ifndef INC_TASK_H
2 | #define INC_TASK_H
3 |
4 | #include "list.h"
5 |
6 | #define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U )
7 | #define taskYIELD() portYIELD()
8 |
9 | typedef void * TaskHandle_t;
10 |
11 |
12 | #if( configSUPPORT_STATIC_ALLOCATION == 1 )
13 | TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
14 | const char * const pcName,
15 | const uint32_t ulStackDepth,
16 | void * const pvParameters,
17 | StackType_t * const puxStackBuffer,
18 | TCB_t * const pxTaskBuffer );
19 | #endif /* configSUPPORT_STATIC_ALLOCATION */
20 |
21 | void prvInitialiseTaskLists( void );
22 | void vTaskStartScheduler( void );
23 | void vTaskSwitchContext( void );
24 | void vTaskDelay( const TickType_t xTicksToDelay );
25 | void xTaskIncrementTick( void );
26 |
27 |
28 | #endif /* INC_TASK_H */
29 |
30 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
--------------------------------------------------------------------------------
/stm32 第一部分/10，支持多优先级/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/10，支持多优先级/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
--------------------------------------------------------------------------------
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/stm32 第一部分/10，支持多优先级/freertos/include/portable.h:
--------------------------------------------------------------------------------
1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/stm32 第一部分/10，支持多优先级/freertos/include/projdefs.h:
--------------------------------------------------------------------------------
1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
--------------------------------------------------------------------------------
/stm32 第一部分/11，任务延时列表的实现/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
--------------------------------------------------------------------------------
/stm32 第一部分/11，任务延时列表的实现/Project/RTE/_Target_1/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/stm32 第一部分/12，支持时间片/Doc/readm.txt:
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1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x00000000 0x00040000 { ; load region size_region
6 | ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
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/stm32 第一部分/12，支持时间片/Project/RTE/Device/ARMCM3/system_ARMCM3.c:
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1 | /**************************************************************************//**
2 | * @file system_ARMCM3.c
3 | * @brief CMSIS Device System Source File for
4 | * ARMCM3 Device Series
5 | * @version V5.00
6 | * @date 10. January 2018
7 | ******************************************************************************/
8 | /*
9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10 | *
11 | * SPDX-License-Identifier: Apache-2.0
12 | *
13 | * Licensed under the Apache License, Version 2.0 (the License); you may
14 | * not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at
16 | *
17 | * www.apache.org/licenses/LICENSE-2.0
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | */
25 |
26 | #include "ARMCM3.h"
27 |
28 | /*----------------------------------------------------------------------------
29 | Define clocks
30 | *----------------------------------------------------------------------------*/
31 | #define XTAL ( 5000000UL) /* Oscillator frequency */
32 |
33 | #define SYSTEM_CLOCK (5U * XTAL)
34 |
35 |
36 | /*----------------------------------------------------------------------------
37 | Externals
38 | *----------------------------------------------------------------------------*/
39 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
40 | extern uint32_t __Vectors;
41 | #endif
42 |
43 | /*----------------------------------------------------------------------------
44 | System Core Clock Variable
45 | *----------------------------------------------------------------------------*/
46 | uint32_t SystemCoreClock = SYSTEM_CLOCK;
47 |
48 |
49 | /*----------------------------------------------------------------------------
50 | System Core Clock update function
51 | *----------------------------------------------------------------------------*/
52 | void SystemCoreClockUpdate (void)
53 | {
54 | SystemCoreClock = SYSTEM_CLOCK;
55 | }
56 |
57 | /*----------------------------------------------------------------------------
58 | System initialization function
59 | *----------------------------------------------------------------------------*/
60 | void SystemInit (void)
61 | {
62 |
63 | #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
64 | SCB->VTOR = (uint32_t) &__Vectors;
65 | #endif
66 |
67 | SystemCoreClock = SYSTEM_CLOCK;
68 | }
69 |
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/stm32 第一部分/12，支持时间片/Project/RTE/_Target_1/RTE_Components.h:
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1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'Fire_FreeRTOS'
7 | * Target: 'Target 1'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | /*
15 | * Define the Device Header File:
16 | */
17 | #define CMSIS_device_header "ARMCM3.h"
18 |
19 |
20 | #endif /* RTE_COMPONENTS_H */
21 |
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/stm32 第一部分/12，支持时间片/User/main.c:
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/stm32 第一部分/12，支持时间片/freertos/include/portable.h:
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1 | #ifndef PORTABLE_H
2 | #define PORTABLE_H
3 |
4 | #include "portmacro.h"
5 |
6 |
7 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
8 | BaseType_t xPortStartScheduler( void );
9 |
10 |
11 |
12 | #endif /* PORTABLE_H */
13 |
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/stm32 第一部分/12，支持时间片/freertos/include/portmacro.h:
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/stm32 第一部分/12，支持时间片/freertos/include/projdefs.h:
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1 | #ifndef PROJDEFS_H
2 | #define PROJDEFS_H
3 |
4 | typedef void (*TaskFunction_t)( void * );
5 |
6 | #define pdFALSE ( ( BaseType_t ) 0 )
7 | #define pdTRUE ( ( BaseType_t ) 1 )
8 |
9 | #define pdPASS ( pdTRUE )
10 | #define pdFAIL ( pdFALSE )
11 |
12 |
13 | #endif /* PROJDEFS_H */
14 |
15 |
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/stm32 第一部分/12，支持时间片/freertos/include/task.h:
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