TXD
16 | )
17 | {
18 | SnakeDBG dbg = new SnakeDBG();
19 | dbg.C1 = controlsState.adcChannel1;
20 | dbg.C2 = controlsState.adcChannel2;
21 |
22 | dbg.KD = nextDirectionFromKeypad;
23 | dbg.JD = nextDirectionFromJoystick;
24 | dbg.ND = nextDirection;
25 |
26 | JSON.SerializeToUART(ref dbg, TXD);
27 | }
28 | }
29 | }
30 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/server/ROT2UServer.csproj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | netcoreapp3.1
5 | true
6 | Latest
7 | false
8 |
9 |
10 |
11 |
15 |
16 |
17 |
19 |
20 |
21 |
23 |
24 |
25 |
--------------------------------------------------------------------------------
/BumperHero/BHMobile/BHMobile.Android/MainActivity.cs:
--------------------------------------------------------------------------------
1 | using System;
2 |
3 | using Android.App;
4 | using Android.Content.PM;
5 | using Android.Runtime;
6 | using Android.Views;
7 | using Android.Widget;
8 | using Android.OS;
9 |
10 | namespace BHMobile.Droid
11 | {
12 | [Activity(Label = "BHMobile", Icon = "@mipmap/icon", Theme = "@style/MainTheme", MainLauncher = true, ConfigurationChanges = ConfigChanges.ScreenSize | ConfigChanges.Orientation)]
13 | public class MainActivity : global::Xamarin.Forms.Platform.Android.FormsAppCompatActivity
14 | {
15 | protected override void OnCreate(Bundle bundle)
16 | {
17 | TabLayoutResource = Resource.Layout.Tabbar;
18 | ToolbarResource = Resource.Layout.Toolbar;
19 |
20 | base.OnCreate(bundle);
21 |
22 | global::Xamarin.Forms.Forms.Init(this, bundle);
23 | LoadApplication(new App());
24 | }
25 | }
26 | }
27 |
28 |
--------------------------------------------------------------------------------
/Trigonometry/FPGA.Trigonometry.Tests/TestConverters.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.IO;
4 | using System.Linq;
5 | using System.Text;
6 | using System.Threading.Tasks;
7 |
8 | namespace TestTools
9 | {
10 | // TODO: move to public library
11 | public static class TestConverters
12 | {
13 | public static string ToHexFloat(byte[] data)
14 | {
15 | return string.Join("", data.Reverse().Select(v => v.ToString("X02")));
16 | }
17 |
18 | public static byte[] ToByteArray(float f)
19 | {
20 | return BitConverter.GetBytes(f);
21 | }
22 |
23 | public static float FloatFromByteArray(byte[] data)
24 | {
25 | return BitConverter.ToSingle(data);
26 | }
27 |
28 | public static int Int32FromByteArray(byte[] data)
29 | {
30 | return BitConverter.ToInt32(data);
31 | }
32 | }
33 | }
34 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/server/Views/Shared/Error.cshtml:
--------------------------------------------------------------------------------
1 | @{
2 | ViewData["Title"] = "Error";
3 | }
4 |
5 | Error.
6 | An error occurred while processing your request.
7 |
8 | @if (!string.IsNullOrEmpty((string)ViewData["RequestId"]))
9 | {
10 |
11 | Request ID: @ViewData["RequestId"]
12 |
13 | }
14 |
15 | Development Mode
16 |
17 | Swapping to Development environment will display more detailed information about the error that occurred.
18 |
19 |
20 | Development environment should not be enabled in deployed applications , as it can result in sensitive information from exceptions being displayed to end users. For local debugging, development environment can be enabled by setting the ASPNETCORE_ENVIRONMENT environment variable to Development , and restarting the application.
21 |
22 |
--------------------------------------------------------------------------------
/SunTracker/SunTracker.Web/Pages/Error.cshtml.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.Diagnostics;
4 | using System.Linq;
5 | using System.Threading.Tasks;
6 | using Microsoft.AspNetCore.Mvc;
7 | using Microsoft.AspNetCore.Mvc.RazorPages;
8 | using Microsoft.Extensions.Logging;
9 |
10 | namespace SunTracker.Web.Pages
11 | {
12 | [ResponseCache(Duration = 0, Location = ResponseCacheLocation.None, NoStore = true)]
13 | public class ErrorModel : PageModel
14 | {
15 | private readonly ILogger _logger;
16 |
17 | public ErrorModel(ILogger logger)
18 | {
19 | _logger = logger;
20 | }
21 |
22 | public string RequestId { get; set; }
23 |
24 | public bool ShowRequestId => !string.IsNullOrEmpty(RequestId);
25 |
26 | public void OnGet()
27 | {
28 | RequestId = Activity.Current?.Id ?? HttpContext.TraceIdentifier;
29 | }
30 | }
31 | }
32 |
--------------------------------------------------------------------------------
/SunTracker/SunTracker.Web/Pages/Error.cshtml:
--------------------------------------------------------------------------------
1 | @page
2 | @model ErrorModel
3 | @{
4 | ViewData["Title"] = "Error";
5 | }
6 |
7 | Error.
8 | An error occurred while processing your request.
9 |
10 | @if (Model.ShowRequestId)
11 | {
12 |
13 | Request ID: @Model.RequestId
14 |
15 | }
16 |
17 | Development Mode
18 |
19 | Swapping to the Development environment displays detailed information about the error that occurred.
20 |
21 |
22 | The Development environment shouldn't be enabled for deployed applications.
23 | It can result in displaying sensitive information from exceptions to end users.
24 | For local debugging, enable the Development environment by setting the ASPNETCORE_ENVIRONMENT environment variable to Development
25 | and restarting the app.
26 |
27 |
--------------------------------------------------------------------------------
/SnakeGame/RandomValueGenerator.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.Text;
4 |
5 | namespace SnakeGame
6 | {
7 | public static class RandomValueGenerator
8 | {
9 | public static void MakeRandomValue(
10 | GameControlsState controlsState,
11 | FPGA.Register randomValue)
12 | {
13 | FPGA.Register tickCounter = 0;
14 | Func nextTickCounter = () => (byte)(tickCounter + 1);
15 | Func tickCounterWE = () => controlsState.keyCode != Drivers.KeypadKeyCode.None;
16 |
17 | FPGA.Config.RegisterOverride(tickCounter, nextTickCounter, tickCounterWE);
18 |
19 | FPGA.Register randomCounterWE = true;
20 |
21 | Func nextRandomCounter = () => tickCounter + randomValue + controlsState.adcChannel1 + controlsState.adcChannel2;
22 | FPGA.Config.RegisterOverride(randomValue, nextRandomCounter, randomCounterWE);
23 | }
24 | }
25 | }
26 |
--------------------------------------------------------------------------------
/FPGAConf/arty/Verilog/generated/Conf/acronyms.txt:
--------------------------------------------------------------------------------
1 | MC: C:\code\QuokkaEvaluation\FPGAConf\ConfDevice\MainController.cs
2 | ADCS: C:\code\QuokkaEvaluation\Drivers\ADC102S021.cs
3 | HCSR: C:\code\QuokkaEvaluation\Drivers\HCSR04.cs
4 | IA: C:\code\QuokkaEvaluation\Drivers\IsAlive.cs
5 | JSON: C:\code\QuokkaEvaluation\Drivers\JSON.cs
6 | K: C:\code\QuokkaEvaluation\Drivers\Keypad4x4.cs
7 | L: C:\code\QuokkaEvaluation\Drivers\L298.cs
8 | MCPX: C:\code\QuokkaEvaluation\Drivers\MCP49X2.cs
9 | MGR: C:\code\QuokkaEvaluation\Drivers\MG996R.cs
10 | QB: C:\code\QuokkaEvaluation\Drivers\QuokkaBoard.cs
11 | SM: C:\code\QuokkaEvaluation\Drivers\SequentialMath.cs
12 | SS: C:\code\QuokkaEvaluation\Drivers\SevenSegment.cs
13 | SPI: C:\code\QuokkaEvaluation\Drivers\SPI.cs
14 | UART: C:\code\QuokkaEvaluation\Drivers\UART.cs
15 | WSB: C:\code\QuokkaEvaluation\Drivers\WS2812B.cs
16 | FPU: C:\code\QuokkaEvaluation\Drivers\FPU\FPU.cs
17 | FPUI: C:\code\QuokkaEvaluation\Drivers\FPU\FPUInterface.cs
18 | QP: C:\code\QuokkaEvaluation\Drivers\Protobuf\QProtobuf.cs
19 |
--------------------------------------------------------------------------------
/FPGAConf/fpga/Verilog/generated/Conf/acronyms.txt:
--------------------------------------------------------------------------------
1 | MC: C:\code\QuokkaEvaluation\FPGAConf\ConfDevice\MainController.cs
2 | ADCS: C:\code\QuokkaEvaluation\Drivers\ADC102S021.cs
3 | HCSR: C:\code\QuokkaEvaluation\Drivers\HCSR04.cs
4 | IA: C:\code\QuokkaEvaluation\Drivers\IsAlive.cs
5 | JSON: C:\code\QuokkaEvaluation\Drivers\JSON.cs
6 | K: C:\code\QuokkaEvaluation\Drivers\Keypad4x4.cs
7 | L: C:\code\QuokkaEvaluation\Drivers\L298.cs
8 | MCPX: C:\code\QuokkaEvaluation\Drivers\MCP49X2.cs
9 | MGR: C:\code\QuokkaEvaluation\Drivers\MG996R.cs
10 | QB: C:\code\QuokkaEvaluation\Drivers\QuokkaBoard.cs
11 | SM: C:\code\QuokkaEvaluation\Drivers\SequentialMath.cs
12 | SS: C:\code\QuokkaEvaluation\Drivers\SevenSegment.cs
13 | SPI: C:\code\QuokkaEvaluation\Drivers\SPI.cs
14 | UART: C:\code\QuokkaEvaluation\Drivers\UART.cs
15 | WSB: C:\code\QuokkaEvaluation\Drivers\WS2812B.cs
16 | FPU: C:\code\QuokkaEvaluation\Drivers\FPU\FPU.cs
17 | FPUI: C:\code\QuokkaEvaluation\Drivers\FPU\FPUInterface.cs
18 | QP: C:\code\QuokkaEvaluation\Drivers\Protobuf\QProtobuf.cs
19 |
--------------------------------------------------------------------------------
/FPGAConf/artyA35/Verilog/generated/Conf/acronyms.txt:
--------------------------------------------------------------------------------
1 | MC: C:\code\QuokkaEvaluation\FPGAConf\ConfDevice\MainController.cs
2 | ADCS: C:\code\QuokkaEvaluation\Drivers\ADC102S021.cs
3 | HCSR: C:\code\QuokkaEvaluation\Drivers\HCSR04.cs
4 | IA: C:\code\QuokkaEvaluation\Drivers\IsAlive.cs
5 | JSON: C:\code\QuokkaEvaluation\Drivers\JSON.cs
6 | K: C:\code\QuokkaEvaluation\Drivers\Keypad4x4.cs
7 | L: C:\code\QuokkaEvaluation\Drivers\L298.cs
8 | MCPX: C:\code\QuokkaEvaluation\Drivers\MCP49X2.cs
9 | MGR: C:\code\QuokkaEvaluation\Drivers\MG996R.cs
10 | QB: C:\code\QuokkaEvaluation\Drivers\QuokkaBoard.cs
11 | SM: C:\code\QuokkaEvaluation\Drivers\SequentialMath.cs
12 | SS: C:\code\QuokkaEvaluation\Drivers\SevenSegment.cs
13 | SPI: C:\code\QuokkaEvaluation\Drivers\SPI.cs
14 | UART: C:\code\QuokkaEvaluation\Drivers\UART.cs
15 | WSB: C:\code\QuokkaEvaluation\Drivers\WS2812B.cs
16 | FPU: C:\code\QuokkaEvaluation\Drivers\FPU\FPU.cs
17 | FPUI: C:\code\QuokkaEvaluation\Drivers\FPU\FPUInterface.cs
18 | QP: C:\code\QuokkaEvaluation\Drivers\Protobuf\QProtobuf.cs
19 |
--------------------------------------------------------------------------------
/run-all.cmd:
--------------------------------------------------------------------------------
1 | cd QuokkaCLI
2 | dotnet run -s "../FunctionalTest/vhdl.json"
3 | dotnet run -s "../FunctionalTest/verilog.json"
4 | dotnet run -s "../KeccakTest/vhdl.json"
5 | dotnet run -s "../KeccakTest/verilog.json"
6 | dotnet run -s "../SnakeGame/vhdl.json"
7 | dotnet run -s "../SnakeGame/verilog.json"
8 | dotnet run -s "../SensorsBoard/Device/vhdl.json"
9 | dotnet run -s "../SensorsBoard/Device/verilog.json"
10 | dotnet run -s "../BumperHero/BHDevice/vhdl.json"
11 | dotnet run -s "../BumperHero/BHDevice/verilog.json"
12 | dotnet run -s "../SunTracker/SunTrackerDevice/vhdl.json"
13 | dotnet run -s "../SunTracker/SunTrackerDevice/verilog.json"
14 | dotnet run -s "../Fourier/vhdl.json"
15 | dotnet run -s "../Fourier/verilog.json"
16 | dotnet run -s "../OrbitalCalc/FPGA.OrbitalCalc.Controllers/vhdl.json"
17 | dotnet run -s "../OrbitalCalc/FPGA.OrbitalCalc.Controllers/verilog.json"
18 | dotnet run -s "../Trigonometry/FPGA.Trigonometry.Controllers/vhdl.json"
19 | dotnet run -s "../Trigonometry/FPGA.Trigonometry.Controllers/verilog.json"
20 | cd ..
21 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/server/Services/BufferService.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Concurrent;
3 | using System.Collections.Generic;
4 | using System.Linq;
5 | using System.Threading.Tasks;
6 |
7 | namespace server.Services
8 | {
9 | public class BufferService
10 | {
11 | ConcurrentDictionary Outgoing = new ConcurrentDictionary();
12 |
13 | public BufferService()
14 | {
15 | //LED
16 | SetData(1, Enumerable.Range(0, 256).Select(i => (byte)0).ToArray());
17 | // SERVOS
18 | SetData(2, Enumerable.Range(0, 5).Select(i => (byte)0).ToArray());
19 | }
20 |
21 | public void SetData(byte address, byte[] data)
22 | {
23 | Outgoing.AddOrUpdate(address, data, (key, value) => data);
24 | }
25 |
26 | public byte[] GetData(byte address)
27 | {
28 | Outgoing.TryGetValue(address, out byte[] data);
29 | return data ?? Array.Empty();
30 | }
31 | }
32 | }
33 |
--------------------------------------------------------------------------------
/tutorials/controllers/T01UART.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System;
5 | using System.Threading.Tasks;
6 |
7 | namespace Tutorials
8 | {
9 | [BoardConfig(Name = "Quokka")]
10 | public static class T01UARTController
11 | {
12 | public static async Task Aggregator(
13 | OutputSignal LED1,
14 | OutputSignal TXD)
15 | {
16 | IsAlive.Blink(LED1);
17 |
18 | Sequential handler = () =>
19 | {
20 | byte[] data = TutorialsDataSource.HelloWorldBytes();
21 |
22 | while (true)
23 | {
24 | for (byte i = 0; i < data.Length; i++)
25 | {
26 | byte b = data[i];
27 | UART.Write(115200, b, TXD);
28 | }
29 | Runtime.Delay(TimeSpan.FromSeconds(1));
30 | }
31 | };
32 |
33 | Config.OnStartup(handler);
34 | }
35 | }
36 | }
37 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_Cast_FloatToInt.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/
9 | [BoardConfig(Name = "Quokka")]
10 | public static class FloatControllers_Cast_FloatToInt
11 | {
12 | public static async Task Aggregator(
13 | FPGA.InputSignal RXD,
14 | FPGA.OutputSignal TXD
15 | )
16 | {
17 | const uint baud = 115200;
18 |
19 | Sequential handler = () =>
20 | {
21 | FPU.FPUCastNoSync();
22 |
23 | while (true)
24 | {
25 | float data = 0;
26 | UART.ReadFloat(baud, RXD, out data);
27 |
28 | var floatCast = (long)data;
29 |
30 | UART.WriteUnsigned64(baud, (ulong)floatCast, TXD);
31 | }
32 | };
33 |
34 | FPGA.Config.OnStartup(handler);
35 | }
36 | }
37 | }
38 |
--------------------------------------------------------------------------------
/Fourier.Tests/Boilerplate.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Fourier;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Linq;
5 | using System.Text;
6 |
7 | namespace Fourier.Tests
8 | {
9 | public class Boilerplate
10 | {
11 | public uint Bits = 10;
12 | public uint ArrayLength => GeneratorTools.ArrayLength(Bits);
13 | public uint NumberOfSamples => ArrayLength;
14 | public IEnumerable Range => Enumerable.Range(0, (int)ArrayLength).Select(i => (uint)i);
15 |
16 |
17 | public ComplexFloat[] ZeroSignal => SignalTools.ZeroComplex(NumberOfSamples);
18 |
19 | public ComplexFloat[] TestSignal()
20 | {
21 | var freq30 = SignalTools.PeriodicComplex(30, ArrayLength, NumberOfSamples);
22 | var freq40 = SignalTools.PeriodicComplex(40, ArrayLength, NumberOfSamples);
23 | var freq50 = SignalTools.PeriodicComplex(50, ArrayLength, NumberOfSamples);
24 |
25 | var sourceSignal = SignalTools.Combine(freq30, freq40, freq50);
26 |
27 | return sourceSignal;
28 | }
29 | }
30 | }
31 |
--------------------------------------------------------------------------------
/AES/AES/ShiftModule.cs:
--------------------------------------------------------------------------------
1 | using Quokka.RTL;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Reflection.Metadata.Ecma335;
5 | using System.Text;
6 |
7 | namespace AES
8 | {
9 | public class ShiftModuleInputs
10 | {
11 | public RTLBitArray Value = new RTLBitArray().Resized(128);
12 | }
13 |
14 | public class ShiftModule : RTLCombinationalModule
15 | {
16 | public RTLBitArray Result
17 | {
18 | get
19 | {
20 | var row3 = Inputs.Value[127, 96];
21 | var row2 = Inputs.Value[95, 64];
22 | var row1 = Inputs.Value[63, 32];
23 | var row0 = Inputs.Value[31, 0];
24 |
25 | return new RTLBitArray(
26 | new RTLBitArray(row3[7, 0], row3[31, 8]),
27 | new RTLBitArray(row2[7, 0], row2[31, 8]),
28 | new RTLBitArray(row1[7, 0], row1[31, 8]),
29 | new RTLBitArray(row0[7, 0], row0[31, 8])
30 | );
31 | }
32 | }
33 | }
34 | }
35 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_Cast_IntToFloat.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/
9 | [BoardConfig(Name = "Quokka")]
10 | public static class FloatControllers_Cast_IntToFloat
11 | {
12 | public static async Task Aggregator(
13 | FPGA.InputSignal RXD,
14 | FPGA.OutputSignal TXD
15 | )
16 | {
17 | const uint baud = 115200;
18 |
19 | Sequential handler = () =>
20 | {
21 | FPU.FPUCastNoSync();
22 |
23 | while (true)
24 | {
25 | ulong data = 0;
26 | UART.ReadUnsigned64(baud, RXD, ref data);
27 |
28 | var floatCast = (float)(long)data;
29 | UART.WriteFloat(baud, floatCast, TXD);
30 | }
31 | };
32 |
33 | FPGA.Config.OnStartup(handler);
34 | }
35 | }
36 | }
37 |
--------------------------------------------------------------------------------
/QuokkaCLI/Program.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.IO;
3 | using System.Runtime.InteropServices;
4 | using Quokka.Core.Bootstrap;
5 | using Quokka.RTL;
6 |
7 | namespace QuokkaCLI
8 | {
9 | class Program
10 | {
11 | static void Main(string[] args)
12 | {
13 | Console.WriteLine($"Environment: {RuntimeInformation.OSDescription}, {RuntimeInformation.OSArchitecture}, {RuntimeInformation.FrameworkDescription}, {RuntimeInformation.ProcessArchitecture}");
14 | Console.WriteLine($"Current location: {Directory.GetCurrentDirectory()}");
15 | Console.WriteLine($"Quokka.FPGA version: {typeof(QuokkaRunner).Assembly.GetName().Version}");
16 | Console.WriteLine($"Quokka.RTL version: {typeof(RTLBitArray).Assembly.GetName().Version}");
17 |
18 |
19 | Console.WriteLine("Cleaning up ...");
20 |
21 | var tempFolder = Path.Combine(Path.GetTempPath(), "quokka");
22 | if (Directory.Exists(tempFolder))
23 | Directory.Delete(tempFolder, true);
24 |
25 | QuokkaRunner.Default(args);
26 | }
27 | }
28 | }
29 |
--------------------------------------------------------------------------------
/Drivers/MG996R.cs:
--------------------------------------------------------------------------------
1 | using FPGA;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Text;
5 |
6 | namespace Drivers
7 | {
8 | public static class MG996R
9 | {
10 | public static void Write(byte value, out bool dout)
11 | {
12 | const byte maxValue = 180;
13 | byte current = value < maxValue ? (byte)value : maxValue;
14 |
15 | dout = true;
16 | FPGA.Runtime.Delay(TimeSpanEx.FromMicroseconds(544));
17 | for (ushort i = 0; i < 1945; i++)
18 | {
19 | // wait for 10 microseconds for each degree
20 | FPGA.Runtime.Delay(TimeSpanEx.FromMicroseconds(10));
21 | if (i == current)
22 | {
23 | dout = false;
24 | }
25 | }
26 | }
27 |
28 | public static void Continuous(FPGA.Register value, FPGA.Signal DOUT)
29 | {
30 | bool internalDOUT = false;
31 | FPGA.Config.Link(internalDOUT, out DOUT);
32 |
33 | Sequential worker = () =>
34 | {
35 | while(true)
36 | {
37 | Write(value, out internalDOUT);
38 | }
39 | };
40 | FPGA.Config.OnStartup(worker);
41 | }
42 | }
43 | }
44 |
--------------------------------------------------------------------------------
/FunctionalTest/BidirController.cs:
--------------------------------------------------------------------------------
1 | using FPGA;
2 | using FPGA.Attributes;
3 | using System;
4 | using System.Collections.Generic;
5 | using System.Text;
6 | using System.Threading.Tasks;
7 |
8 | namespace Controllers
9 | {
10 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
11 | public static class Runtime_BidirController
12 | {
13 | public static async Task Aggregator(
14 | FPGA.BidirSignal bidir1,
15 | FPGA.BidirSignal bidir2
16 | )
17 | {
18 | const bool trigger = true;
19 | Sequential handler = () =>
20 | {
21 | bidir1 = false;
22 | bidir2 = false;
23 |
24 | FPGA.Runtime.SetBidirAsOutput(bidir1);
25 | FPGA.Runtime.SetBidirAsInput(bidir2);
26 |
27 | bidir1 = true;
28 | bidir1 = false;
29 | bidir1 = bidir2;
30 |
31 | FPGA.Runtime.SetBidirAsInput(bidir1);
32 | FPGA.Runtime.SetBidirAsInput(bidir2);
33 | };
34 | FPGA.Config.OnSignal(trigger, handler);
35 | }
36 | }
37 | }
38 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/client/boot-client.tsx:
--------------------------------------------------------------------------------
1 | import './css/site.css';
2 | import * as React from 'react';
3 | import * as ReactDOM from 'react-dom';
4 | import { AppContainer } from 'react-hot-loader';
5 | import { Provider } from 'react-redux';
6 | import { ConnectedRouter } from 'react-router-redux';
7 | import { createBrowserHistory } from 'history';
8 | import configureStore from './configureStore';
9 | import { ApplicationState } from './store';
10 | import * as RoutesModule from './routes';
11 | let routes = RoutesModule.routes;
12 |
13 | // Create browser history to use in the Redux store
14 | //const baseUrl = document.getElementsByTagName('base')[0].getAttribute('href')!;
15 | const history = createBrowserHistory(/*{ basename: baseUrl }*/);
16 |
17 | // Get the application-wide store instance, prepopulating with state from the server where available.
18 | //const initialState = (window as any).initialReduxState as ApplicationState;
19 | const store = configureStore(history/*, initialState*/);
20 |
21 | ReactDOM.render(
22 |
23 | ,
25 | document.getElementById('react-app')
26 | );
--------------------------------------------------------------------------------
/Fourier/Fourier/GeneratorTools.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Attributes;
2 | using System;
3 | using System.Linq;
4 |
5 | namespace FPGA.Fourier
6 | {
7 | ///
8 | /// Non-synthesizable, evaluated at translation time
9 | ///
10 | [OnTranslation]
11 | public static class GeneratorTools
12 | {
13 | public static float[] CosArray(uint arrayLength, Direction direction)
14 | {
15 | return Enumerable
16 | .Range(0, (int)arrayLength)
17 | .Select(v => (float)Math.Cos(-(int)direction * 2.0 * Math.PI * v / arrayLength))
18 | .ToArray();
19 | }
20 |
21 | public static uint ArrayLength(uint bits)
22 | {
23 | if (bits == 0)
24 | throw new ArgumentOutOfRangeException(nameof(bits), bits, "should be positive");
25 |
26 | return (uint)(1 << (int)bits);
27 | }
28 |
29 | public static uint Mask(uint bits)
30 | {
31 | return (uint)((1 << (int)bits) - 1);
32 | }
33 |
34 | public static float FloatArrayLength(uint bits)
35 | {
36 | return ArrayLength(bits);
37 | }
38 | }
39 | }
40 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_FloatRoundTrip.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_FloatRoundTrip
10 | {
11 | public static async Task Aggregator(
12 | FPGA.InputSignal RXD,
13 | FPGA.OutputSignal TXD
14 | )
15 | {
16 | const uint baud = 115200;
17 |
18 | var stream = new FPGA.SyncStream();
19 |
20 | Sequential streamHandler = (data) =>
21 | {
22 | UART.WriteFloat(baud, data, TXD);
23 | };
24 | FPGA.Config.OnStream(stream, streamHandler);
25 |
26 | Sequential handler = () =>
27 | {
28 | float f1 = 0, f2 = 1.234f;
29 |
30 | UART.ReadFloat(baud, RXD, out f1);
31 | stream.Write(f1);
32 | stream.Write(f2);
33 | };
34 |
35 | FPGA.Config.OnStartup(handler);
36 | }
37 | }
38 | }
39 |
--------------------------------------------------------------------------------
/Trigonometry/FPGA.Trigonometry/Lib.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Attributes;
2 | namespace FPGA.Trigonometry
3 | {
4 | [CanOptimize]
5 | public static class FPGATrigonometry
6 | {
7 | public static float Sin(float rad)
8 | {
9 | var result = FPGATrigonometryTools.Normalize(rad);
10 |
11 | bool negative = result > FPGATrigonometryConstants.PI;
12 |
13 | result = FPGATrigonometryTools.Q1Project(result);
14 |
15 | result = FPGATrigonometryTools.TaylorSin(result);
16 |
17 | if (negative)
18 | return -result;
19 |
20 | return result;
21 | }
22 |
23 | public static float Cos(float rad)
24 | {
25 | var result = FPGATrigonometryTools.Normalize(rad);
26 |
27 | bool negative = result > FPGATrigonometryConstants.HalfPI && result < FPGATrigonometryConstants.ThreeHalfPI;
28 |
29 | result = FPGATrigonometryTools.Q1Project(result);
30 |
31 | result = FPGATrigonometryTools.TaylorCos(result);
32 |
33 | if (negative)
34 | return -result;
35 |
36 | return result;
37 | }
38 | }
39 | }
40 |
--------------------------------------------------------------------------------
/BumperHero/BHMobile/BHMobile/MainPage.xaml:
--------------------------------------------------------------------------------
1 |
2 |
6 |
7 |
8 |
9 |
14 |
15 |
16 |
17 |
19 |
20 |
21 |
22 |
27 |
28 |
29 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_FloatRoundTrip_Stream.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_FloatRoundTrip_Stream
10 | {
11 | public static async Task Aggregator(
12 | FPGA.InputSignal RXD,
13 | FPGA.OutputSignal TXD
14 | )
15 | {
16 | const uint baud = 115200;
17 |
18 | var stream = new FPGA.SyncStream();
19 |
20 | Sequential streamHandler = (data) =>
21 | {
22 | UART.WriteFloat(baud, data, TXD);
23 | };
24 | FPGA.Config.OnStream(stream, streamHandler);
25 |
26 | Sequential handler = () =>
27 | {
28 | float f1 = 0, f2 = 1.234f;
29 |
30 | UART.ReadFloat(baud, RXD, out f1);
31 | stream.Write(f1);
32 | stream.Write(f2);
33 | };
34 |
35 | FPGA.Config.OnStartup(handler);
36 | }
37 | }
38 | }
39 |
--------------------------------------------------------------------------------
/Indicators/Peripherals.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using System;
4 | using System.Collections.Generic;
5 | using System.Text;
6 |
7 | namespace Indicators
8 | {
9 | static class Peripherals
10 | {
11 | public static void IndicatorsControls(
12 | // keypad
13 | FPGA.OutputSignal K7,
14 | FPGA.OutputSignal K6,
15 | FPGA.OutputSignal K5,
16 | FPGA.OutputSignal K4,
17 | FPGA.InputSignal K3,
18 | FPGA.InputSignal K2,
19 | FPGA.InputSignal K1,
20 | FPGA.InputSignal K0,
21 | IndicatorsControlsState controlsState)
22 | {
23 | Sequential keypadHandler = () =>
24 | {
25 | Keypad4x4.ReadASCIICode(K7, K6, K5, K4, K3, K2, K1, K0, out controlsState.keyCode);
26 | };
27 | FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(20), keypadHandler);
28 |
29 | Sequential tickHandler = () =>
30 | {
31 | controlsState.counterMs++;
32 | };
33 | FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(1), tickHandler);
34 | }
35 | }
36 | }
37 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_Cast_Return_Expression.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/
9 | [BoardConfig(Name = "Quokka")]
10 | public static class FloatControllers_Cast_Return_Expression
11 | {
12 | public static float ReturnExpression(float value)
13 | {
14 | return value * 5;
15 | }
16 |
17 | public static async Task Aggregator(
18 | FPGA.InputSignal RXD,
19 | FPGA.OutputSignal TXD
20 | )
21 | {
22 | const uint baud = 115200;
23 |
24 | Sequential handler = () =>
25 | {
26 | FPU.FPUScopeNoSync();
27 |
28 | while (true)
29 | {
30 | float data = 0;
31 | UART.ReadFloat(baud, RXD, out data);
32 |
33 | var result = (long)ReturnExpression(data);
34 | UART.WriteUnsigned64(baud, (ulong)result, TXD);
35 | }
36 | };
37 |
38 | FPGA.Config.OnStartup(handler);
39 | }
40 | }
41 | }
42 |
--------------------------------------------------------------------------------
/tutorials/hdl/verilog/generated/Tutorials/acronyms.txt:
--------------------------------------------------------------------------------
1 | TB: C:\code\QuokkaEvaluation\tutorials\controllers\T00Blinky.cs
2 | TUART: C:\code\QuokkaEvaluation\tutorials\controllers\T01UART.cs
3 | TSUART: C:\code\QuokkaEvaluation\tutorials\controllers\T02SharedUART.cs
4 | TDS: C:\code\QuokkaEvaluation\tutorials\controllers\TutorialsDataSource.cs
5 | ADCS: C:\code\QuokkaEvaluation\Drivers\ADC102S021.cs
6 | HCSR: C:\code\QuokkaEvaluation\Drivers\HCSR04.cs
7 | IA: C:\code\QuokkaEvaluation\Drivers\IsAlive.cs
8 | JSON: C:\code\QuokkaEvaluation\Drivers\JSON.cs
9 | K: C:\code\QuokkaEvaluation\Drivers\Keypad4x4.cs
10 | L: C:\code\QuokkaEvaluation\Drivers\L298.cs
11 | MCPX: C:\code\QuokkaEvaluation\Drivers\MCP49X2.cs
12 | MGR: C:\code\QuokkaEvaluation\Drivers\MG996R.cs
13 | QB: C:\code\QuokkaEvaluation\Drivers\QuokkaBoard.cs
14 | SM: C:\code\QuokkaEvaluation\Drivers\SequentialMath.cs
15 | SS: C:\code\QuokkaEvaluation\Drivers\SevenSegment.cs
16 | SPI: C:\code\QuokkaEvaluation\Drivers\SPI.cs
17 | UART: C:\code\QuokkaEvaluation\Drivers\UART.cs
18 | WSB: C:\code\QuokkaEvaluation\Drivers\WS2812B.cs
19 | FPU: C:\code\QuokkaEvaluation\Drivers\FPU\FPU.cs
20 | FPUI: C:\code\QuokkaEvaluation\Drivers\FPU\FPUInterface.cs
21 | QP: C:\code\QuokkaEvaluation\Drivers\Protobuf\QProtobuf.cs
22 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_InferredFPU.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_InferredFPU
10 | {
11 | public static async Task Aggregator(
12 | FPGA.InputSignal RXD,
13 | FPGA.OutputSignal TXD
14 | )
15 | {
16 | Sequential handler = () =>
17 | {
18 | FPU.FPUScope();
19 |
20 | const int baud = 115200;
21 | byte command = 0;
22 |
23 | float op1, op2, res = 0;
24 |
25 | while(true)
26 | {
27 | UART.ReadFloat(baud, RXD, out op1);
28 | UART.ReadFloat(baud, RXD, out op2);
29 | command = UART.Read(baud, RXD);
30 |
31 | FloatControllersOps.TestHandler(op1, op2, command, out res);
32 |
33 | UART.WriteFloat(baud, res, TXD);
34 | }
35 | };
36 |
37 | FPGA.Config.OnStartup(handler);
38 | }
39 | }
40 | }
41 |
--------------------------------------------------------------------------------
/SnakeGame/DataTypes.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Text;
5 |
6 | namespace SnakeGame
7 | {
8 | public enum eGameMode : byte
9 | {
10 | Setup,
11 | Play,
12 | Failed,
13 | Completed
14 | }
15 |
16 | public enum eDirectionType : byte
17 | {
18 | None,
19 | Up,
20 | Down,
21 | Left,
22 | Right
23 | }
24 |
25 | public enum eCellType : byte
26 | {
27 | None,
28 | NextPart,
29 | SnakeHead,
30 | SnakeUp,
31 | SnakeDown,
32 | SnakeLeft,
33 | SnakeRight,
34 | RedCross,
35 | GreenCross,
36 | }
37 |
38 | public class Position
39 | {
40 | public byte row;
41 | public byte col;
42 | }
43 |
44 | public class GameControlsState
45 | {
46 | public KeypadKeyCode keyCode;
47 | public ushort adcChannel1;
48 | public ushort adcChannel2;
49 | }
50 |
51 | public struct SnakeDBG
52 | {
53 | public ushort C1;
54 | public ushort C2;
55 | public eDirectionType KD;
56 | public eDirectionType JD;
57 | public eDirectionType ND;
58 | }
59 | }
60 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_Sim.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_Sim
10 | {
11 | public static async Task Aggregator(
12 | FPGA.OutputSignal OutResult,
13 | FPGA.OutputSignal Completed
14 | )
15 | {
16 | FPGA.Config.Suppress("W0007", OutResult);
17 | float f1 = 0, f2 = 0;
18 | FPGA.Signal result = 0;
19 | byte fpuOp = 0;
20 | FPGA.Signal fpuTrigger = false, fpuCompleted = false;
21 | FPGA.Config.Entity().Op(fpuTrigger, fpuCompleted, f1, f2, fpuOp, result);
22 |
23 | FPGA.Config.Link(result, OutResult);
24 |
25 | Sequential handler = () =>
26 | {
27 | f1 = 20;
28 | f2 = 10;
29 | fpuTrigger = true;
30 | FPGA.Runtime.WaitForAllConditions(fpuCompleted);
31 | Completed = true;
32 | };
33 |
34 | FPGA.Config.OnStartup(handler);
35 | }
36 | }
37 | }
38 |
--------------------------------------------------------------------------------
/Indicators/DataTypes.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Text;
5 |
6 | namespace Indicators
7 | {
8 | public enum eIndicatorType
9 | {
10 | None,
11 | Left,
12 | Right,
13 | Break
14 | }
15 |
16 | public enum eIndicatorMode
17 | {
18 | Solid,
19 | Blinking,
20 | Sliding
21 | }
22 |
23 | public class IndicatorsControlsState
24 | {
25 | public KeypadKeyCode keyCode;
26 | public uint counterMs;
27 | public uint dim = 1;
28 | public uint flashSpeedMs = 500;
29 |
30 | // indicator data
31 | public eIndicatorMode mode = eIndicatorMode.Blinking;
32 | public eIndicatorType nextIndicator;
33 | public uint nextIndicatorKeyEventTimeStamp;
34 |
35 | public eIndicatorType lastIndicator;
36 | public uint lastIndicatorTimeStamp;
37 |
38 | public uint flashIndicatorTimeStamp;
39 | public bool isIndicatorActive;
40 |
41 | public int slideValue = 0;
42 |
43 | // auto indicator
44 | public uint autoIndicatorTimeStamp;
45 | }
46 |
47 | public struct IndicatorsDBG
48 | {
49 | public ushort C1;
50 | public ushort C2;
51 | }
52 | }
53 |
--------------------------------------------------------------------------------
/FunctionalTest/SequentialMathControllers/FibonacciController.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System;
5 | using System.Collections.Generic;
6 | using System.Text;
7 | using System.Threading.Tasks;
8 |
9 | namespace Controllers
10 | {
11 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
12 | public static class Math_Fibonacci
13 | {
14 | public static async Task Aggregator(
15 | FPGA.InputSignal RXD,
16 | FPGA.OutputSignal TXD
17 | )
18 | {
19 | Sequential handler = () =>
20 | {
21 | while (true)
22 | {
23 | byte start = UART.Read(115200, RXD);
24 |
25 | ulong result = 0;
26 | SequentialMath.Fibonacci(start, out result);
27 |
28 | for(byte i = 0; i < 8; i++ )
29 | {
30 | byte data = (byte)result;
31 | UART.Write(115200, data, TXD);
32 | result = result >> 8;
33 | }
34 | }
35 | };
36 |
37 | const bool trigger = true;
38 | FPGA.Config.OnSignal(trigger, handler);
39 | }
40 | }
41 | }
42 |
--------------------------------------------------------------------------------
/Drivers/MCP49X2.cs:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright: Evgeny Muryshkin evmuryshkin@gmail.com
3 | */
4 | using System;
5 | using System.Collections.Generic;
6 | using System.Text;
7 |
8 | namespace Drivers
9 | {
10 | public static class MCP49X2
11 | {
12 | public static void Write(
13 | ushort ChannelA,
14 | ushort ChannelB,
15 | FPGA.OutputSignal NCS,
16 | FPGA.OutputSignal SCK,
17 | FPGA.OutputSignal SDI
18 | )
19 | {
20 | ushort[] buff = new ushort[2];
21 | ushort[] words = new ushort[2];
22 |
23 | buff[0] = ChannelA;
24 | buff[1] = ChannelB;
25 |
26 | for (int i = 0; i < 2; i++)
27 | {
28 | byte cmd = (byte)((i << 3) | 3); // channel | unbuffered | no gain | no shutdown
29 | ushort val = 0;
30 | val = buff[i];
31 | ushort channelWord = (ushort)((cmd << 12) | (val >> 4));
32 | words[i] = channelWord;
33 | }
34 |
35 | for (int j = 0; j < 2; j++)
36 | {
37 | ushort channelData = 0;
38 | channelData = buff[j];
39 | SPI.Write(channelData, NCS, SCK, SDI);
40 | }
41 | }
42 | }
43 | }
44 |
--------------------------------------------------------------------------------
/Fourier/Fourier/DFT.cs:
--------------------------------------------------------------------------------
1 | namespace FPGA.Fourier
2 | {
3 | public static class DFT
4 | {
5 | public static void Transform(uint bits, ComplexFloat[] data, Direction direction)
6 | {
7 | FPGA.Const n = GeneratorTools.ArrayLength(bits);
8 | FPGA.Const nFloat = GeneratorTools.FloatArrayLength(bits);
9 |
10 | uint mask = GeneratorTools.Mask(bits);
11 |
12 | ComplexFloat[] transformed = new ComplexFloat[data.Length];
13 | float[] cosMap = GeneratorTools.CosArray(n, direction);
14 |
15 | var tmp = new ComplexFloat();
16 |
17 | // for each destination element
18 | for (uint i = 0; i < n; i++)
19 | {
20 | tmp.Re = 0.0f;
21 | tmp.Im = 0.0f;
22 |
23 | // sum source elements
24 | for (uint j = 0; j < n; j++)
25 | {
26 | ComplexFloat source = new ComplexFloat();
27 | source = data[j];
28 |
29 | FTTools.RotateAndAdd(cosMap, bits, ref source, ref tmp, i * j);
30 | }
31 |
32 | transformed[i] = tmp;
33 | }
34 |
35 | FTTools.CopyAndNormalize(bits, transformed, data, direction, ref tmp);
36 | }
37 | }
38 | }
39 |
--------------------------------------------------------------------------------
/VHDL/IFPU_OP.vhd:
--------------------------------------------------------------------------------
1 | library ieee;
2 | use ieee.std_logic_1164.all;
3 | use ieee.numeric_std.all;
4 |
5 | entity IFPU_OP is
6 | port(
7 | Clock: in std_logic;
8 | Reset: in std_logic;
9 | Trigger: in std_logic;
10 | Completed: out std_logic;
11 | Lhs: in signed(32 downto 1);
12 | Rhs: in signed(32 downto 1);
13 | Op: in unsigned(8 downto 1);
14 | Result: out signed(32 downto 1)
15 | );
16 | end entity IFPU_OP;
17 |
18 | architecture rtl of IFPU_OP is
19 | signal opa : std_logic_vector(32 downto 1);
20 | signal opb : std_logic_vector(32 downto 1);
21 | signal res : std_logic_vector(32 downto 1);
22 | signal fpuOp: std_logic_vector(3 downto 1);
23 | begin
24 | opa <= std_logic_vector(Lhs);
25 | opb <= std_logic_vector(Rhs);
26 | fpuOp <= std_logic_vector(Op(3 downto 1));
27 | Result <= signed(res);
28 |
29 | --Existing FPU integration is done for FPU100, please clone and include FPU related files into your project
30 | --Repository is available here: https://github.com/freecores/fpu100.git
31 | --Integration commit: bab960a0e8c98eb217664d187208d7ede277248d
32 |
33 | fpu: entity work.fpu port map
34 | (
35 | clk_i => Clock,
36 | opa_i => opa,
37 | opb_i => opb,
38 | fpu_op_i => fpuOp,
39 | rmode_i => "00",
40 | output_o => res,
41 | start_i => Trigger,
42 | ready_o => Completed
43 | );
44 |
45 | end architecture rtl;
--------------------------------------------------------------------------------
/Fourier.Tests/DFTTests.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Fourier;
2 | using Microsoft.VisualStudio.TestTools.UnitTesting;
3 | using System;
4 | using System.Linq;
5 |
6 | namespace Fourier.Tests
7 | {
8 | [TestClass]
9 | public class DFTTests
10 | {
11 | Boilerplate _bp = new Boilerplate();
12 |
13 | [TestMethod]
14 | public void ForwardReferenceDFT()
15 | {
16 | var sourceSignal = _bp.TestSignal();
17 |
18 | var referenceDFT = sourceSignal.ToArray();
19 | Reference.DFT(referenceDFT, Direction.Forward);
20 |
21 | var expected = _bp.ZeroSignal;
22 | expected[30].Re = 1;
23 | expected[40].Re = 1;
24 | expected[50].Re = 1;
25 |
26 | Validation.AssertSpectres(expected, referenceDFT, true, false);
27 | }
28 |
29 | [TestMethod]
30 | public void ForwardQuokkaDFT()
31 | {
32 | var sourceSignal = _bp.TestSignal();
33 |
34 | var referenceDFT = sourceSignal.ToArray();
35 | Reference.DFT(referenceDFT, Direction.Forward);
36 |
37 | var quokkaDFT = sourceSignal.ToArray();
38 | FPGA.Fourier.DFT.Transform(_bp.Bits, quokkaDFT, Direction.Forward);
39 |
40 | Validation.AssertSpectres(referenceDFT, quokkaDFT, true, false);
41 | }
42 | }
43 | }
44 |
--------------------------------------------------------------------------------
/SunTracker/SunTracker.Web/Controllers/WeatherForecastController.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.Linq;
4 | using System.Threading.Tasks;
5 | using Microsoft.AspNetCore.Mvc;
6 | using Microsoft.Extensions.Logging;
7 |
8 | namespace SunTracker.Web.Controllers
9 | {
10 | [ApiController]
11 | [Route("[controller]")]
12 | public class WeatherForecastController : ControllerBase
13 | {
14 | private static readonly string[] Summaries = new[]
15 | {
16 | "Freezing", "Bracing", "Chilly", "Cool", "Mild", "Warm", "Balmy", "Hot", "Sweltering", "Scorching"
17 | };
18 |
19 | private readonly ILogger _logger;
20 |
21 | public WeatherForecastController(ILogger logger)
22 | {
23 | _logger = logger;
24 | }
25 |
26 | [HttpGet]
27 | public IEnumerable Get()
28 | {
29 | var rng = new Random();
30 | return Enumerable.Range(1, 5).Select(index => new WeatherForecast
31 | {
32 | Date = DateTime.Now.AddDays(index),
33 | TemperatureC = rng.Next(-20, 55),
34 | Summary = Summaries[rng.Next(Summaries.Length)]
35 | })
36 | .ToArray();
37 | }
38 | }
39 | }
40 |
--------------------------------------------------------------------------------
/AES/AES.HDL/VHDL.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 20:45:17 June 07, 2019
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "20:45:17 June 07, 2019"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "VHDL"
31 |
--------------------------------------------------------------------------------
/VHDL/Quokka.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 20:13:14 August 01, 2018
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "20:13:14 August 01, 2018"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "Quokka"
31 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Verilog.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 20:45:17 June 07, 2019
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "20:45:17 June 07, 2019"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "Verilog"
31 |
--------------------------------------------------------------------------------
/FPGAConf/fpga/Quokka.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 20:13:14 August 01, 2018
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "20:13:14 August 01, 2018"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "Quokka"
31 |
--------------------------------------------------------------------------------
/SensorsBoard/Quartus/SensorsBoard/Quokka.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 20:50:41 May 27, 2018
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "20:50:41 May 27, 2018"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "Quokka"
31 |
--------------------------------------------------------------------------------
/BumperHero/Quartus/BumperHero/BumperHero.qpf:
--------------------------------------------------------------------------------
1 | # -------------------------------------------------------------------------- #
2 | #
3 | # Copyright (C) 1991-2010 Altera Corporation
4 | # Your use of Altera Corporation's design tools, logic functions
5 | # and other software and tools, and its AMPP partner logic
6 | # functions, and any output files from any of the foregoing
7 | # (including device programming or simulation files), and any
8 | # associated documentation or information are expressly subject
9 | # to the terms and conditions of the Altera Program License
10 | # Subscription Agreement, Altera MegaCore Function License
11 | # Agreement, or other applicable license agreement, including,
12 | # without limitation, that your use is for the sole purpose of
13 | # programming logic devices manufactured by Altera and sold by
14 | # Altera or its authorized distributors. Please refer to the
15 | # applicable agreement for further details.
16 | #
17 | # -------------------------------------------------------------------------- #
18 | #
19 | # Quartus II
20 | # Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
21 | # Date created = 19:49:05 May 06, 2018
22 | #
23 | # -------------------------------------------------------------------------- #
24 |
25 | QUARTUS_VERSION = "9.1"
26 | DATE = "19:49:05 May 06, 2018"
27 |
28 | # Revisions
29 |
30 | PROJECT_REVISION = "Quokka_Device_TopLevel"
31 |
--------------------------------------------------------------------------------
/FunctionalTest/DividerController.cs:
--------------------------------------------------------------------------------
1 | using FPGA;
2 | using FPGA.Attributes;
3 | using System;
4 | using System.Collections.Generic;
5 | using System.Text;
6 | using System.Threading.Tasks;
7 |
8 | namespace Controllers
9 | {
10 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
11 | public static class Math_Divider
12 | {
13 | public static async Task Aggregator(
14 | FPGA.InputSignal RXD,
15 | FPGA.OutputSignal TXD
16 | )
17 | {
18 | DTOs.DividerRequest request = new DTOs.DividerRequest();
19 | FPGA.Signal deserialized = new FPGA.Signal();
20 |
21 | Drivers.JSON.DeserializeFromUART(ref request, RXD, deserialized);
22 |
23 | Sequential processingHandler = () =>
24 | {
25 | ulong result, remainder;
26 | SequentialMath.DivideUnsigned(request.Numerator, request.Denominator, out result, out remainder);
27 | DTOs.DividerResponse response = new DTOs.DividerResponse();
28 | response.Result = result;
29 | response.Remainder = remainder;
30 | Drivers.JSON.SerializeToUART(ref response, TXD);
31 | };
32 |
33 | FPGA.Config.OnSignal(deserialized, processingHandler);
34 | }
35 | }
36 | }
37 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_FloatOp.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_FloatOp
10 | {
11 | public static async Task Aggregator(
12 | FPGA.InputSignal RXD,
13 | FPGA.OutputSignal TXD
14 | )
15 | {
16 | float f1 = 0, f2 = 0;
17 | FPGA.Signal result = 0;
18 | byte fpuOp = 0;
19 | FPGA.Signal fpuTrigger = false, fpuCompleted = false;
20 | FPGA.Config.Entity().Op(fpuTrigger, fpuCompleted, f1, f2, fpuOp, result);
21 |
22 | Sequential handler = () =>
23 | {
24 | const int baud = 115200;
25 |
26 | UART.ReadFloat(baud, RXD, out f1);
27 | UART.ReadFloat(baud, RXD, out f2);
28 | fpuOp = UART.Read(baud, RXD);
29 |
30 | fpuTrigger = true;
31 |
32 | FPGA.Runtime.WaitForAllConditions(fpuCompleted);
33 |
34 | UART.WriteFloat(baud, result, TXD);
35 | };
36 |
37 | const bool trigger = true;
38 | FPGA.Config.OnSignal(trigger, handler);
39 | }
40 | }
41 | }
42 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_InferredFPU_Sim.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
9 | public static class FloatControllers_InferredFPU_Sim
10 | {
11 | public static async Task Aggregator(
12 | FPGA.OutputSignal OutWithDefault,
13 | FPGA.OutputSignal OutOperation,
14 | FPGA.OutputSignal OutTrigger,
15 | FPGA.OutputSignal OutResult,
16 | FPGA.OutputSignal OutCompleted)
17 | {
18 | byte value = 100;
19 | FPGA.Config.Link(value, OutWithDefault);
20 |
21 | Sequential handler = () =>
22 | {
23 | FPU.FPUScope();
24 |
25 | float op1 = 1.23f, op2 = 10f, res = 0;
26 | FPGA.Config.Link(res, OutResult);
27 |
28 | for(byte op = 0; op < 10; op++)
29 | {
30 | FPGA.Config.Link(op, OutOperation);
31 | OutTrigger = true;
32 | FloatControllersOps.TestHandler(op1, op2, op, out res);
33 | OutCompleted = true;
34 | }
35 | };
36 |
37 | FPGA.Config.OnStartup(handler);
38 | }
39 | }
40 | }
41 |
--------------------------------------------------------------------------------
/FunctionalTest/DictionaryController.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System;
5 | using System.Collections.Generic;
6 | using System.Text;
7 | using System.Threading.Tasks;
8 |
9 | namespace Controllers
10 | {
11 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
12 | public static class Runtime_DictionaryController
13 | {
14 | public static void Lookup(byte key, out byte value)
15 | {
16 | FPGA.Collections.ReadOnlyDictionary items = new FPGA.Collections.ReadOnlyDictionary()
17 | {
18 | { 0, 1 },
19 | { 1, 2 },
20 | { 2, 4 },
21 | { 3, 10 },
22 | { 4, 15 }
23 | };
24 |
25 | value = items[key];
26 | }
27 |
28 | public static async Task Aggregator(
29 | FPGA.InputSignal RXD,
30 | FPGA.OutputSignal TXD
31 | )
32 | {
33 | const bool trigger = true;
34 |
35 | Sequential handler = () =>
36 | {
37 | byte data = UART.Read(115200, RXD);
38 |
39 | byte result = 0;
40 | Lookup(data, out result);
41 |
42 | UART.Write(115200, result, TXD);
43 | };
44 | FPGA.Config.OnSignal(trigger, handler);
45 | }
46 | }
47 | }
48 |
--------------------------------------------------------------------------------
/FunctionalTest/SupportedFeaturesControllers.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System;
5 | using System.Collections.Generic;
6 | using System.Text;
7 | using System.Threading.Tasks;
8 |
9 | namespace Controllers
10 | {
11 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
12 | public static class SFC_FunctionCallController
13 | {
14 | static byte Increment(byte input)
15 | {
16 | return (byte)(input + 1);
17 | }
18 |
19 | public static async Task Aggregator(
20 | FPGA.InputSignal RXD,
21 | FPGA.OutputSignal TXD
22 | )
23 | {
24 | Sequential handler = () =>
25 | {
26 | while(true)
27 | {
28 | byte data = UART.Read(115200, RXD);
29 | switch (data)
30 | {
31 | case 0:
32 | data = Increment(data);
33 | break;
34 | case 1:
35 | var result = Increment(data);
36 | data = result;
37 | break;
38 | }
39 | UART.Write(115200, data, TXD);
40 | }
41 | };
42 | FPGA.Config.OnStartup(handler);
43 | }
44 | }
45 | }
46 |
--------------------------------------------------------------------------------
/tutorials/controllers/T02SharedUART.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System;
5 | using System.Threading.Tasks;
6 |
7 | namespace Tutorials
8 | {
9 | [BoardConfig(Name = "Quokka")]
10 | public static class T01SharedUARTController
11 | {
12 | public static async Task Aggregator(
13 | OutputSignal LED1,
14 | OutputSignal TXD)
15 | {
16 | IsAlive.Blink(LED1);
17 |
18 | bool internalTXD = true;
19 | Config.Link(internalTXD, TXD);
20 | object txdLock = new object();
21 |
22 | Sequential handler = () =>
23 | {
24 | Const instanceId = Config.InstanceId();
25 | byte[] data = TutorialsDataSource.HelloWorldBytesFromHandler(instanceId);
26 |
27 | while (true)
28 | {
29 | lock (txdLock)
30 | {
31 | for (byte i = 0; i < data.Length; i++)
32 | {
33 | byte b = data[i];
34 | UART.RegisteredWrite(115200, b, out internalTXD);
35 | }
36 | }
37 |
38 | Runtime.Delay(TimeSpan.FromSeconds(1));
39 | }
40 | };
41 |
42 | Config.OnStartup(handler, 3);
43 | }
44 | }
45 | }
46 |
--------------------------------------------------------------------------------
/BumperHero/BHMobile/BHMobile.Android/Properties/AssemblyInfo.cs:
--------------------------------------------------------------------------------
1 | using System.Reflection;
2 | using System.Runtime.CompilerServices;
3 | using System.Runtime.InteropServices;
4 | using Android.App;
5 |
6 | // General Information about an assembly is controlled through the following
7 | // set of attributes. Change these attribute values to modify the information
8 | // associated with an assembly.
9 | [assembly: AssemblyTitle("BHMobile.Android")]
10 | [assembly: AssemblyDescription("")]
11 | [assembly: AssemblyConfiguration("")]
12 | [assembly: AssemblyCompany("")]
13 | [assembly: AssemblyProduct("BHMobile.Android")]
14 | [assembly: AssemblyCopyright("Copyright © 2014")]
15 | [assembly: AssemblyTrademark("")]
16 | [assembly: AssemblyCulture("")]
17 | [assembly: ComVisible(false)]
18 |
19 | // Version information for an assembly consists of the following four values:
20 | //
21 | // Major Version
22 | // Minor Version
23 | // Build Number
24 | // Revision
25 | //
26 | // You can specify all the values or you can default the Build and Revision Numbers
27 | // by using the '*' as shown below:
28 | // [assembly: AssemblyVersion("1.0.*")]
29 | [assembly: AssemblyVersion("1.0.0.0")]
30 | [assembly: AssemblyFileVersion("1.0.0.0")]
31 |
32 | // Add some common permissions, these can be removed if not needed
33 | [assembly: UsesPermission(Android.Manifest.Permission.Internet)]
34 | [assembly: UsesPermission(Android.Manifest.Permission.WriteExternalStorage)]
35 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_Cast_Inline.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using System.Threading.Tasks;
5 |
6 | namespace FloatControllers
7 | {
8 | /*[BoardConfig(Name = "NEB")]*/
9 | [BoardConfig(Name = "Quokka")]
10 | public static class FloatControllers_Cast_Inline
11 | {
12 | public static async Task Aggregator(
13 | FPGA.InputSignal RXD,
14 | FPGA.OutputSignal TXD
15 | )
16 | {
17 | const uint baud = 115200;
18 |
19 | Sequential handler = () =>
20 | {
21 | FPU.FPUScopeNoSync();
22 |
23 | while (true)
24 | {
25 | float data = 0;
26 | UART.ReadFloat(baud, RXD, out data);
27 |
28 | float[] buff = new float[2];
29 |
30 | for (sbyte idx = -10; idx <= 10; idx++)
31 | {
32 | buff[0] = data * idx;
33 | buff[1] = idx * data;
34 |
35 | for (var i = 0; i < buff.Length; i++)
36 | {
37 | var tmp = buff[i];
38 | UART.WriteFloat(baud, tmp, TXD);
39 | }
40 | }
41 | }
42 | };
43 |
44 | FPGA.Config.OnStartup(handler);
45 | }
46 | }
47 | }
48 |
--------------------------------------------------------------------------------
/FunctionalTest/SequentialMathControllers/IsPrimeController.cs:
--------------------------------------------------------------------------------
1 | using FPGA;
2 | using FPGA.Attributes;
3 | using System;
4 | using System.Collections.Generic;
5 | using System.Text;
6 | using System.Threading.Tasks;
7 |
8 | namespace Controllers
9 | {
10 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
11 | public static class Math_IsPrime
12 | {
13 | public static async Task Aggregator(
14 | FPGA.InputSignal RXD,
15 | FPGA.OutputSignal TXD
16 | )
17 | {
18 | DTOs.IsPrimeRequest request = new DTOs.IsPrimeRequest();
19 | FPGA.Signal deserialized = new FPGA.Signal();
20 | Drivers.JSON.DeserializeFromUART(ref request, RXD, deserialized);
21 |
22 | Sequential handler = () =>
23 | {
24 | bool result = false;
25 | uint source = request.value;
26 | // TODO: member access is not supported in function call
27 | SequentialMath.IsPrime((uint)source, out result);
28 |
29 | DTOs.IsPrimeResponse response = new DTOs.IsPrimeResponse();
30 | response.value = request.value;
31 | response.result = (byte)((result == true) ? 1 : 0);
32 |
33 | Drivers.JSON.SerializeToUART(ref response, TXD);
34 | };
35 |
36 | FPGA.Config.OnSignal(deserialized, handler);
37 | }
38 | }
39 | }
40 |
--------------------------------------------------------------------------------
/VHDL/IConcreteExternalPackage2_ExternalEntity.vhd:
--------------------------------------------------------------------------------
1 | -- second implementation
2 | library ieee;
3 | use ieee.std_logic_1164.all;
4 | use ieee.numeric_std.all;
5 |
6 | entity IConcreteExternalPackage2_ExternalEntity is
7 | port(
8 | Clock: in std_logic;
9 | Reset: in std_logic;
10 | InSignal: in unsigned(8 downto 1);
11 | OutSignal: out unsigned(8 downto 1);
12 | InTrigger: in std_logic;
13 | OutReady: out std_logic
14 | );
15 | end entity IConcreteExternalPackage2_ExternalEntity;
16 |
17 | architecture rtl of IConcreteExternalPackage2_ExternalEntity is
18 | signal counter: unsigned(8 downto 1) := (others => '0');
19 | type FSM is (Ready,Counting);
20 | signal currentState: FSM := Ready;
21 | begin
22 |
23 | process(Clock,Reset,InSignal,InTrigger) is
24 | begin
25 | if( rising_edge(Clock) ) then
26 | if Reset = '1' then
27 | currentState <= Ready;
28 | counter <= (others => '0');
29 | else
30 | case currentState is
31 | when Ready =>
32 | if( InTrigger = '1') then
33 | counter <= (others => '0');
34 | currentState <= Counting;
35 | end if;
36 | when Counting =>
37 | if counter = 10 then
38 | currentState <= Ready;
39 | else
40 | counter <= counter + 1;
41 | end if;
42 | when others =>
43 | currentState <= Ready;
44 | end case;
45 | end if;
46 | end if;
47 | end process;
48 |
49 | OutSignal <= InSignal + counter;
50 | OutReady <= '1' when currentState = Ready else '0';
51 |
52 | end architecture rtl;
--------------------------------------------------------------------------------
/Drivers/SPI.cs:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright: Evgeny Muryshkin evmuryshkin@gmail.com
3 | */
4 | using System;
5 | using System.Collections.Generic;
6 | using System.Text;
7 |
8 | namespace Drivers
9 | {
10 | public static class SPI
11 | {
12 | public static void Write(
13 | T data,
14 | FPGA.OutputSignal NCS,
15 | FPGA.OutputSignal SCK,
16 | FPGA.OutputSignal SDI
17 | ) where T : struct
18 | {
19 | T buff = data;
20 | FPGA.Config.Default(out NCS, true);
21 | bool internalNCS = true, internalCSK = false, internalSDI = false;
22 |
23 | FPGA.Config.Link(internalNCS, NCS);
24 | FPGA.Config.Link(internalCSK, SCK);
25 | FPGA.Config.Link(internalSDI, SDI);
26 |
27 | internalNCS = false;
28 | FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(1));
29 | byte sizeOfData = FPGA.Config.SizeOf(data);
30 | for (int c = 0; c < sizeOfData; c++)
31 | {
32 | internalSDI = FPGA.Config.HighBit(buff);
33 | FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(1));
34 | internalCSK = true;
35 | FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(1));
36 | internalCSK = false;
37 | buff = FPGA.Config.LShift(buff, 1);
38 | }
39 |
40 | FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(1));
41 | internalNCS = true;
42 | }
43 | }
44 | }
45 |
--------------------------------------------------------------------------------
/Fourier.Tests/SignalTools.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Fourier;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Linq;
5 | using System.Text;
6 |
7 | namespace Fourier.Tests
8 | {
9 | class SignalTools
10 | {
11 | public static ComplexFloat[] ZeroComplex(uint numSamles)
12 | {
13 | return Enumerable.Range(0, (int)numSamles).Select(s => new ComplexFloat()).ToArray();
14 | }
15 |
16 | public static ComplexFloat[] PeriodicComplex(float freq, uint samplingRate, uint numSamles)
17 | {
18 | float step = (float)(2 * Math.PI * freq / samplingRate);
19 |
20 | return Enumerable.Range(0, (int)numSamles).Select(s => new ComplexFloat()
21 | {
22 | Re = (float)Math.Cos(step * s),
23 | Im = (float)Math.Sin(step * s),
24 | }).ToArray();
25 | }
26 |
27 | public static ComplexFloat[] Combine(params ComplexFloat[][] data)
28 | {
29 | switch (data.Length)
30 | {
31 | case 0:
32 | return new ComplexFloat[0];
33 | case 1:
34 | return data[0];
35 | default:
36 | return data[0]
37 | .Zip(
38 | Combine(data.Skip(1).ToArray()),
39 | (l, r) => new ComplexFloat() { Re = l.Re + r.Re, Im = l.Im + r.Im })
40 | .ToArray();
41 | }
42 | }
43 | }
44 | }
45 |
--------------------------------------------------------------------------------
/FunctionalTest/FloatControllers/FloatControllers_FloatRoundTrip_Loop.cs:
--------------------------------------------------------------------------------
1 | using Drivers;
2 | using FPGA;
3 | using FPGA.Attributes;
4 | using FPGA.Optimizers; using Quokka.Schema.HLS;
5 | using System.Threading.Tasks;
6 |
7 | namespace FloatControllers
8 | {
9 | /*[BoardConfig(Name = "NEB")]*/[BoardConfig(Name = "Quokka")]
10 | public static class FloatControllers_FloatRoundTrip_Loop
11 | {
12 | public static async Task Aggregator(
13 | FPGA.InputSignal RXD,
14 | FPGA.OutputSignal TXD
15 | )
16 | {
17 | const uint baud = 115200;
18 |
19 | Sequential handler = () =>
20 | {
21 | FPGA.Optimizations.AddOptimizer();
22 |
23 | float f1 = 0, f2 = 1.234f;
24 |
25 | bool internalTXD = true;
26 |
27 | // hardlink from register to output signal, it has to hold its value
28 | FPGA.Config.Link(internalTXD, TXD);
29 |
30 | while (true)
31 | {
32 | UART.ReadFloat(baud, RXD, out f1);
33 | UART.RegisteredWriteFloat(baud, f1, out internalTXD);
34 | //UART.RegisteredWriteFloat(baud, f2, out internalTXD);
35 | }
36 | };
37 |
38 | FPGA.Config.OnStartup(handler);
39 | }
40 | }
41 |
42 | public class TestOptimizer : DefaultOptimizer
43 | {
44 | public override bool? ShouldRecycle(Data data) => true;
45 | }
46 | }
47 |
--------------------------------------------------------------------------------
/AES/AES/AESModule.cs:
--------------------------------------------------------------------------------
1 | /*
2 | This is a port of AES implementation to low-level Quokka
3 | https://github.com/kokke/tiny-AES-c/blob/master/aes.c
4 |
5 | Work in progress.
6 | */
7 | using Quokka.RTL;
8 | using System;
9 | using System.Collections.Generic;
10 | using System.Linq;
11 | using System.Text;
12 |
13 |
14 | namespace AES
15 | {
16 | public class AESModuleInputs
17 | {
18 |
19 | }
20 |
21 | public class AESModuleState
22 | {
23 | public RTLBitArray Value = new RTLBitArray().Resized(128);
24 | }
25 |
26 | /*
27 | #define Nb 4 // The number of columns comprising a state in AES. This is a constant in AES. Value=4
28 | #define Nk 4 // The number of 32 bit words in a key.
29 | #define Nr 10 // The number of rounds in AES Cipher.
30 | */
31 |
32 | public class AESModule : RTLSynchronousModule
33 | {
34 | SBoxModule sbox = new SBoxModule();
35 | BoxModule box = new BoxModule();
36 | byte SBoxAddress => 0;
37 | byte RBoxAddress => 0;
38 |
39 | protected override void OnSchedule(Func inputsFactory)
40 | {
41 | base.OnSchedule(inputsFactory);
42 |
43 | box.Schedule(() => new BoxModuleInputs() { SBoxAddress = SBoxAddress, RBoxAddress = RBoxAddress });
44 | sbox.Schedule(() => new SBoxModuleInputs() { Value = State.Value });
45 | }
46 |
47 | protected override void OnStage()
48 | {
49 | }
50 | }
51 | }
52 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/server/Controllers/SampleDataController.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.Linq;
4 | using System.Threading.Tasks;
5 | using LEDDto;
6 | using Microsoft.AspNetCore.Mvc;
7 |
8 | namespace Server.Controllers
9 | {
10 | [Route("api/[controller]")]
11 | public class SampleDataController : Controller
12 | {
13 | private static string[] Summaries = new[]
14 | {
15 | "Freezing", "Bracing", "Chilly", "Cool", "Mild", "Warm", "Balmy", "Hot", "Sweltering", "Scorching"
16 | };
17 |
18 | [HttpGet("[action]")]
19 | public IEnumerable WeatherForecasts(int startDateIndex)
20 | {
21 | var rng = new Random();
22 | return Enumerable.Range(1, 5).Select(index => new WeatherForecast
23 | {
24 | DateFormatted = DateTime.Now.AddDays(index + startDateIndex).ToString("d"),
25 | TemperatureC = rng.Next(-20, 55),
26 | Summary = Summaries[rng.Next(Summaries.Length)]
27 | });
28 | }
29 |
30 | public class WeatherForecast
31 | {
32 | public string DateFormatted { get; set; }
33 | public int TemperatureC { get; set; }
34 | public string Summary { get; set; }
35 |
36 | public int TemperatureF
37 | {
38 | get
39 | {
40 | return 32 + (int)(TemperatureC / 0.5556);
41 | }
42 | }
43 | }
44 | }
45 | }
46 |
--------------------------------------------------------------------------------
/Orbiter/OrbiterHost/Properties/AssemblyInfo.cs:
--------------------------------------------------------------------------------
1 | using System.Reflection;
2 | using System.Runtime.CompilerServices;
3 | using System.Runtime.InteropServices;
4 |
5 | // General Information about an assembly is controlled through the following
6 | // set of attributes. Change these attribute values to modify the information
7 | // associated with an assembly.
8 | [assembly: AssemblyTitle("OrbiterHost")]
9 | [assembly: AssemblyDescription("")]
10 | [assembly: AssemblyConfiguration("")]
11 | [assembly: AssemblyCompany("")]
12 | [assembly: AssemblyProduct("OrbiterHost")]
13 | [assembly: AssemblyCopyright("Copyright © 2018")]
14 | [assembly: AssemblyTrademark("")]
15 | [assembly: AssemblyCulture("")]
16 |
17 | // Setting ComVisible to false makes the types in this assembly not visible
18 | // to COM components. If you need to access a type in this assembly from
19 | // COM, set the ComVisible attribute to true on that type.
20 | [assembly: ComVisible(false)]
21 |
22 | // The following GUID is for the ID of the typelib if this project is exposed to COM
23 | [assembly: Guid("1f6c2c9f-9988-4898-b1dc-92cb0095730a")]
24 |
25 | // Version information for an assembly consists of the following four values:
26 | //
27 | // Major Version
28 | // Minor Version
29 | // Build Number
30 | // Revision
31 | //
32 | // You can specify all the values or you can default the Build and Revision Numbers
33 | // by using the '*' as shown below:
34 | // [assembly: AssemblyVersion("1.0.*")]
35 | [assembly: AssemblyVersion("1.0.0.0")]
36 | [assembly: AssemblyFileVersion("1.0.0.0")]
37 |
--------------------------------------------------------------------------------
/BumperHero/BHMobile/BHMobile.Android/Resources/values/styles.xml:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
6 |
7 |
26 |
27 |
30 |
31 |
--------------------------------------------------------------------------------
/Drivers/FPU/FPUInterface.cs:
--------------------------------------------------------------------------------
1 | using FPGA.Attributes;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Text;
5 |
6 | namespace Drivers
7 | {
8 | public enum eFPUOp : byte
9 | {
10 | Add,
11 | Subtract,
12 | Multiply,
13 | Divide,
14 | // Sqrt // not supported by verilog FPU
15 | }
16 |
17 | public interface IFPU
18 | {
19 | void Op(
20 | [ModuleInput]
21 | FPGA.Signal Trigger,
22 | [ModuleOutput]
23 | FPGA.Signal Completed,
24 | [ModuleInput]
25 | float Lhs,
26 | [ModuleInput]
27 | float Rhs,
28 | [ModuleInput]
29 | byte Op,
30 | [ModuleOutput]
31 | FPGA.Signal Result
32 | );
33 | }
34 |
35 | public interface IFloatToIntCast
36 | {
37 | void Op(
38 | [ModuleInput] FPGA.Signal Trigger,
39 | [ModuleOutput] FPGA.Signal Completed,
40 | [ModuleInput] float Source,
41 | [ModuleOutput] FPGA.Signal Result
42 | );
43 | }
44 |
45 | public interface IIntToFloatCast
46 | {
47 | void Op(
48 | [ModuleInput] FPGA.Signal Trigger,
49 | [ModuleInput] FPGA.Signal IsSigned,
50 | [ModuleOutput] FPGA.Signal Completed,
51 | [ModuleInput] ulong Source,
52 | [ModuleOutput] FPGA.Signal Result
53 | );
54 | }
55 | }
56 |
--------------------------------------------------------------------------------
/Drivers/JSON.cs:
--------------------------------------------------------------------------------
1 | using FPGA;
2 | using System;
3 | using System.Collections.Generic;
4 | using System.Text;
5 |
6 | namespace Drivers
7 | {
8 | public static class JSON
9 | {
10 | public static void DeserializeFromUART(
11 | ref T obj,
12 | FPGA.InputSignal RXD,
13 | FPGA.Signal deserialized) where T : new()
14 | {
15 | byte data = 0;
16 | FPGA.Config.JSONDeserializer(obj, data, deserialized);
17 |
18 | const bool trigger = true;
19 | Sequential uartHandler = () =>
20 | {
21 | while(true)
22 | {
23 | data = UART.Read(115200, RXD);
24 | }
25 | };
26 |
27 | FPGA.Config.OnSignal(trigger, uartHandler);
28 | }
29 |
30 | public static void SerializeToUART(ref T data, FPGA.Signal TXD)
31 | {
32 | FPGA.Signal hasMoreData, triggerDequeue, dataDequeued;
33 | FPGA.Signal currentByte;
34 |
35 | FPGA.Config.JSONSerializer(
36 | data,
37 | out hasMoreData,
38 | out triggerDequeue,
39 | out dataDequeued,
40 | out currentByte);
41 |
42 | while (hasMoreData)
43 | {
44 | triggerDequeue = true;
45 | FPGA.Runtime.WaitForAllConditions(dataDequeued);
46 | UART.Write(115200, currentByte, TXD);
47 | }
48 | }
49 | }
50 | }
51 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/client/components/storyboard.ts:
--------------------------------------------------------------------------------
1 | import * as Rx from "rxjs";
2 |
3 | export interface IStoryboardItem {
4 | servos: number[]
5 | }
6 |
7 | export interface IStoryboard {
8 | name: string;
9 | Items: IStoryboardItem[]
10 | }
11 |
12 | export class Storyboard {
13 | async delay(ms: number) {
14 | await Rx.timer(ms).toPromise();
15 | }
16 |
17 | public async run(
18 | storyboard: IStoryboard,
19 | getter: () => number[],
20 | setter: (data: number[]) => void
21 | ) {
22 | // validate
23 | const current = getter();
24 | const fault = storyboard.Items.find(i => i.servos.length != current.length || !!i.servos.find(v => v < 0 || v > 180))
25 | if (fault) {
26 | alert("Servos length mismatch in storyboard");
27 | return;
28 | }
29 |
30 | //run
31 | for(const item of storyboard.Items) {
32 | while(true) {
33 | const current = [...getter()];
34 |
35 | if (JSON.stringify(current) === JSON.stringify(item.servos)) {
36 | // done with current item
37 | break;
38 | }
39 |
40 | for(let idx = 0; idx < current.length; idx++) {
41 | const delta = Math.sign(item.servos[idx] - current[idx]);
42 |
43 | current[idx] = current[idx] + delta;
44 | }
45 |
46 | setter(current);
47 |
48 | await this.delay(20);
49 | }
50 | }
51 | }
52 | }
--------------------------------------------------------------------------------
/AES/AES.Tests/ShiftTest.cs:
--------------------------------------------------------------------------------
1 | using Microsoft.VisualStudio.TestTools.UnitTesting;
2 | using Quokka.Core.Tools;
3 | using Quokka.RTL.Simulator;
4 | using System;
5 | using System.Collections.Generic;
6 | using System.ComponentModel.DataAnnotations;
7 | using System.Linq;
8 |
9 | namespace AES.Tests
10 | {
11 | [TestClass]
12 | public class ShiftTest
13 | {
14 | [TestMethod]
15 | public void Test()
16 | {
17 | var sim = new RTLSimulator();
18 | sim.ClockCycle();
19 | sim.ClockCycle(new ShiftTestModuleInputs() { LSBData = 0x03020100, LSBDataReady = true });
20 | sim.ClockCycle(new ShiftTestModuleInputs() { LSBData = 0x07060504, LSBDataReady = true });
21 | sim.ClockCycle(new ShiftTestModuleInputs() { LSBData = 0x0B0A0908, LSBDataReady = true });
22 | sim.ClockCycle(new ShiftTestModuleInputs() { LSBData = 0x0F0E0D0C, LSBDataReady = true });
23 | Assert.IsFalse(sim.TopLevel.LBSResultReady);
24 |
25 | var parts = new List();
26 | for (var i = 0; i < 4; i++)
27 | {
28 | sim.ClockCycle();
29 | Assert.IsTrue(sim.TopLevel.LBSResultReady);
30 | parts.Add(sim.TopLevel.LSBResult);
31 | }
32 |
33 | Assert.AreEqual(0x00030201U, parts[0]);
34 | Assert.AreEqual(0x04070605U, parts[1]);
35 | Assert.AreEqual(0x080B0A09U, parts[2]);
36 | Assert.AreEqual(0x0C0F0E0DU, parts[3]);
37 | }
38 | }
39 | }
40 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/server/Services/CommsService.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Collections.Generic;
3 | using System.IO.Ports;
4 | using System.Linq;
5 | using System.Threading;
6 | using System.Threading.Tasks;
7 |
8 | namespace server.Services
9 | {
10 | public class CommsService
11 | {
12 | private readonly BufferService _bufferService;
13 | public CommsService(BufferService bufferService)
14 | {
15 | _bufferService = bufferService;
16 | }
17 |
18 | public Task Run(CancellationToken ct)
19 | {
20 | return Task.Factory.StartNew(() =>
21 | {
22 | var portName = "COM5";
23 | Console.WriteLine($"Listening on {portName}");
24 |
25 | var port = new SerialPort();
26 | port.PortName = portName;
27 | port.BaudRate = 115200;// 9600;
28 | port.Parity = Parity.None;
29 | port.DataBits = 8;
30 | port.StopBits = StopBits.Two;
31 | port.Handshake = Handshake.None;
32 |
33 | port.Open();
34 | while (!ct.IsCancellationRequested)
35 | {
36 | var address = (byte)port.ReadByte();
37 | var data = _bufferService.GetData(address);
38 | Console.WriteLine($"{DateTime.UtcNow}: Requested address: {address}, writing {data.Length}");
39 |
40 | port.Write(data, 0, data.Length);
41 | }
42 |
43 | port.Close();
44 | });
45 | }
46 | }
47 | }
48 |
--------------------------------------------------------------------------------
/ROT2U/ROT2UFE/webpack.config.js:
--------------------------------------------------------------------------------
1 | var path = require('path');
2 | var webpack = require('webpack');
3 |
4 | var ForkTsCheckerWebpackPlugin = require('fork-ts-checker-webpack-plugin');
5 |
6 | module.exports = {
7 | stats: "errors-only",
8 | watchOptions: {
9 | ignored: /node_modules/
10 | },
11 | //devtool: "eval-source-map",
12 | entry: {
13 | client: ['babel-polyfill', "./client/boot-client.tsx"],
14 | },
15 | output: {
16 | publicPath: path.resolve(__dirname,"./wwwroot/dist"),
17 | path: path.resolve(__dirname,"./wwwroot/dist"),
18 | filename: "[name].js"
19 | },
20 | module: {
21 | rules: [
22 | {
23 | test: /\.tsx?$/,
24 | include: [path.resolve(__dirname, "client")],
25 | use: [
26 | { loader: 'babel-loader?presets[]=es2015'},
27 | { loader: 'ts-loader',
28 | options: {
29 | transpileOnly: true // IMPORTANT! use transpileOnly mode to speed-up compilation
30 | }
31 | }
32 | ],
33 | },
34 | {
35 | test: /\.css$/,
36 | use: [ 'style-loader', 'css-loader' ]
37 | },
38 | {
39 | test: /\.scss$/,
40 | use: [ 'style-loader', 'css-loader', 'sass-loader' ]
41 | }
42 | ]
43 | },
44 | resolve: {
45 | modules: [
46 | "node_modules",
47 | path.resolve(__dirname, './client')
48 | ],
49 | extensions: ['.jsx', '.js', '.tsx', '.ts']
50 | },
51 | // TS Checker in a separate thread: TODO: replace with the NON-FORK version as soon as it is available
52 | plugins: [
53 | new webpack.ProvidePlugin({
54 | THREE: 'three'
55 | }),
56 | new ForkTsCheckerWebpackPlugin(),
57 | ]
58 | };
59 |
--------------------------------------------------------------------------------
/FPGAConf/arty/Verilog/generated/Conf/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/FPGAConf/fpga/Verilog/generated/Conf/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Verilog/generated/AESModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Verilog/generated/BoxModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Verilog/generated/SBoxModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/AES/AES.HDL/Verilog/generated/ShiftModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
--------------------------------------------------------------------------------
/FPGAConf/artyA35/Verilog/generated/Conf/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
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/tutorials/hdl/verilog/generated/Tutorials/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
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/AES/AES.HDL/Verilog/generated/SBoxTestModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
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/AES/AES.HDL/Verilog/generated/ShiftTestModule/Quokka.v:
--------------------------------------------------------------------------------
1 | module work_Quokka_BoardSignalsProc (
2 | BoardSignals_Clock,
3 | BoardSignals_Reset,
4 | BoardSignals_Running,
5 | BoardSignals_Starting,
6 | BoardSignals_Started,
7 | Clock,
8 | Reset,
9 | InternalReset
10 | );
11 |
12 | input wire Clock;
13 | inout wire Reset;
14 | input wire InternalReset;
15 |
16 | output wire BoardSignals_Clock;
17 | output wire BoardSignals_Reset;
18 | output wire BoardSignals_Running;
19 | output wire BoardSignals_Starting;
20 | output wire BoardSignals_Started;
21 |
22 | reg internalRunning = 0;
23 | reg internalStarted = 0;
24 |
25 | assign BoardSignals_Clock = Clock;
26 | assign BoardSignals_Reset = Reset | InternalReset;
27 | assign BoardSignals_Running = internalRunning;
28 | assign BoardSignals_Started = internalStarted;
29 | assign BoardSignals_Starting = internalRunning & !internalStarted;
30 |
31 |
32 | always @ (posedge BoardSignals_Clock)
33 | begin
34 | if (BoardSignals_Reset) begin
35 | internalRunning <= 0;
36 | internalStarted <= 0;
37 | end
38 | else begin
39 | if ( BoardSignals_Running ) begin
40 | internalStarted <= 1;
41 | end
42 |
43 | internalRunning <= 1;
44 | end
45 | end
46 | endmodule
47 |
48 | module work_Quokka_Metastability(Clock, Reset, in, out);
49 | input Clock;
50 | input Reset;
51 | input in;
52 | output out;
53 | reg [2:1] buff = 2'b00;
54 |
55 | always @(posedge Clock)
56 | begin
57 | if (Reset)
58 | begin
59 | buff <= 2'b00;
60 | end
61 | else
62 | begin
63 | buff <= {buff[1], in};
64 | end;
65 | end
66 |
67 | assign out = buff[2];
68 |
69 | endmodule
70 |
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