├── .gitignore ├── LICENSE ├── README.md ├── firmware ├── smu_raven_1.bin └── smu_raven_2.bin ├── pp_kmod ├── Makefile ├── nb_smu_ops.c ├── nb_smu_ops.h ├── ryzen_nb_pp.c └── ryzen_pptable.h └── smu-tool ├── CMakeLists.txt ├── argparse.cpp ├── inc ├── OlsApi.h ├── OlsDef.h ├── argparse.h └── nb_smu_ops.h ├── libpci.cpp ├── main.cpp ├── nb_smu_ops.cpp ├── prebuilt └── WinRing0x64.sys └── winring0.cpp /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Object files 5 | *.o 6 | *.ko 7 | *.obj 8 | *.elf 9 | 10 | # Linker output 11 | *.ilk 12 | *.map 13 | *.exp 14 | 15 | # Precompiled Headers 16 | *.gch 17 | *.pch 18 | 19 | # Libraries 20 | *.lib 21 | *.a 22 | *.la 23 | *.lo 24 | 25 | # Shared objects (inc. Windows DLLs) 26 | *.dll 27 | *.so 28 | *.so.* 29 | *.dylib 30 | 31 | # Executables 32 | *.exe 33 | *.out 34 | *.app 35 | *.i*86 36 | *.x86_64 37 | *.hex 38 | 39 | # Debug files 40 | *.dSYM/ 41 | *.su 42 | *.idb 43 | *.pdb 44 | 45 | # Kernel Module Compile Results 46 | *.mod* 47 | *.cmd 48 | .tmp_versions/ 49 | modules.order 50 | Module.symvers 51 | Mkfile.old 52 | dkms.conf 53 | 54 | # VSCode 55 | .vscode 56 | */.vscode 57 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 2, June 1991 3 | 4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc., 5 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The licenses for most software are designed to take away your 12 | freedom to share and change it. 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If this is what you want to do, use the GNU Lesser General 339 | Public License instead of this License. 340 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # ryzen_nb_smu 2 | A fight against Ryzen NorthBridge SMU 3 | 4 | Further usage and other information is still under research. 5 | 6 | PR and discussions are welcomed. 7 | 8 | # Background 9 | Some how, I deterimined the method of commiunication between processor and SMU on northbridge of Ryzen processor, so it would be possible to change some power and frequency related settings in OS. Especially for Mobile Raven Ridge platform. 10 | 11 | # Utils 12 | ## kmod_pp 13 | Kernel Module to dump and modify pptable. 14 | 15 | (Not working, under research) 16 | 17 | TODO: Determine why we can't dump pptable 18 | ## smu_test.c 19 | A userspace tool to make smu service request 20 | 21 | # Communication Protcol 22 | The registers, RAM and ROM of SMU is wrapped by a couple of register in NorthBridge PCI Config Space. 23 | 24 | To communicate with SMU, the procossor need send a service request to SMU by write values to SMU registers. 25 | 26 | There are 8 32-bit registers related with service register, MSG, 6×ARG and REP. 27 | 28 | MSG is the ID of service request, 6*ARGS are arguments, REP is respond of service request. 29 | 30 | ## Progress of a service request 31 | - Clear the REP register 32 | - Write the ARGs 33 | - Write the MSG 34 | - Poll the REP until it changed, means the request is proceeded 35 | - Read back ARGs 36 | - Check the REP if the request proceeded sucessfuly 37 | 38 | ## A table of request ID for MP1 39 | | Name | ID | Note | 40 | | :------| :------ | :------ | 41 | | TestMessage | 0x1 | | 42 | | GetSmuVersion | 0x2 | | 43 | | GetBiosIfVersion | 0x3 | | 44 | | GetNameString | 0x4 | | 45 | | EnableSmuFeatures | 0x5 | | 46 | | DisableSmuFeatures | 0x6 | | 47 | | DramLogSetDramAddrHigh | 0x7 | | 48 | | DramLogSetDramAddrLow | 0x8 | | 49 | | DramLogSetDramSize | 0x9 | | 50 | | DxioTestMessage | 0xA | | 51 | | ReadCoreCacWeightRegister | 0xB | | 52 | | SleepEntry | 0xC | | 53 | | SetGbeStatus | 0xD | | 54 | | PowerUpGfx | 0xE | | 55 | | PowerUpSata | 0xF | | 56 | | PowerDownSata | 0x10 | | 57 | | DisableSataController | 0x11 | | 58 | | SetBiosDramAddrHigh | 0x12 | | 59 | | SetBiosDramAddrLow | 0x13 | | 60 | | SetToolsDramAddrHigh | 0x14 | | 61 | | SetToolsDramAddrLow | 0x15 | | 62 | | TransferTableSmu2Dram | 0x16 | | 63 | | TransferTableDram2Smu | 0x17 | | 64 | | PowerSourceAC | 0x18 | | 65 | | PowerSourceDC | 0x19 | | 66 | | SetSustainedPowerLimit | 0x1A | | 67 | | SetFastPPTLimit | 0x1B | | 68 | | SetSlowPPTLimit | 0x1C | | 69 | | SetSlowPPTTimeConstant | 0x1D | | 70 | | SetStapmTimeConstant | 0x1E | | 71 | | SetTctlMax | 0x1F | | 72 | | SetVrmCurrentLimit | 0x20 | | 73 | | SetVrmSocCurrentLimit | 0x21 | | 74 | | SetVrmMaximumCurrentLimit | 0x22 | | 75 | | SetVrmSocMaximumCurrentLimit | 0x23 | | 76 | | SetPSI0CurrentLimit | 0x24 | | 77 | | SetPSI0SocCurrentLimit | 0x25 | | 78 | | SetProchotDeassertionRampTime | 0x26 | | 79 | | UpdateSkinTempError | 0x27 | | 80 | | SetGpuApertureLow | 0x28 | | 81 | | SetGpuApertureHigh | 0x29 | | 82 | | StartGpuLink | 0x2A | | 83 | | StopGpuLink | 0x2B | | 84 | | UsbD3Entry | 0x2C | | 85 | | UsbD3Exit | 0x2D | | 86 | | UsbInit | 0x2E | | 87 | | AcBtcStartCal | 0x2F | | 88 | | AcBtcStopCal | 0x30 | | 89 | | AcBtcEndCal | 0x31 | | 90 | | DcBtc | 0x32 | | 91 | | BtcRestoreOnS3Resume | 0x33 | | 92 | | SetGpuDeviceId | 0x34 | | 93 | | SetUlvVidOffset | 0x35 | | 94 | | DisablePSI | 0x36 | | 95 | | EnablePostCode | 0x37 | | 96 | | UsbConfigUpdate | 0x38 | | 97 | | SetupUSB31ControllerTrap | 0x39 | | 98 | | SetVddOffVid | 0x3A | | 99 | | SetVminFrequency | 0x3B | | 100 | | SetFrequencyMax | 0x3C | | 101 | | SetGfxclkOverdriveByFreqVid | 0x3D | | 102 | | PowerGateXgbe | 0x3E | | 103 | | OC_Disable | 0x3F | | 104 | | OC_VoltageMax | 0x40 | | 105 | | OC_FrequencyMax | 0x41 | | 106 | | EnableCC6Filter | 0x42 | | 107 | | GetSustainedPowerAndThmLimit | 0x43 | | 108 | | SetSoftMaxCCLK | 0x44 | | 109 | | SetSoftMinCCLK | 0x45 | | 110 | | SetSoftMaxGfxClk | 0x46 | | 111 | | SetSoftMinGfxClk | 0x47 | | 112 | | SetSoftMaxSocclkByFreq | 0x48 | | 113 | | SetSoftMinSocclkByFreq | 0x49 | | 114 | | SetSoftMaxFclkByFreq | 0x4A | | 115 | | SetSoftMinFclkByFreq | 0x4B | | 116 | | SetSoftMaxVcn | 0x4C | | 117 | | SetSoftMinVcn | 0x4D | | 118 | | SetSoftMaxLclk | 0x4E | | 119 | | SetSoftMinLclk | 0x4F | | 120 | | Message_Count | 0x50 | | 121 | 122 | ## About "Get" Commands 123 | You can get SMU answer from reading arguments after command. Then decode them or it will be clear result 124 | 125 | # A table of REP code 126 | | Name | ID | 127 | | :------| :------ | 128 | | OK | 0x1 | 129 | | Failed | 0xFF | 130 | | UnknownCmd | 0xFE | 131 | | CmdRejectedPrereq | 0xFD | 132 | | CmdRejectedBusy | 0xFC | 133 | 134 | # A table of SMU Feature ID 135 | | Name | Bit = args | Note | 136 | | ---------------- | ------------- | ---------------------------------------------------------------------------------------------------- | 137 | | CCLK_CONTROLLER | 0 = 1 | CPU Clock controller - CPU will always work at 1600MHz | 138 | | FAN_CONTROLLER | 1 = 2 | Fan will be always 4400 RPM or more | 139 | | DATA_CALCULATION | 2 = 4 | Disable or Enable CPU power states. No more changing powers (besides STAPM) and voltages are static | 140 | | PPT | 3 = 8 | Disable or Enable Slow and Fast Power Limits | 141 | | TDC | 4 = 10 | Disable or Enable TDC Current limits | 142 | | THERMAL | 5 = 20 | CPU, SoC and iGPU temperature controller disabling | 143 | | FIT | 6 = 40 | Monitors reliability and failure predictions | 144 | | EDC | 7 = 80 | Nothing happens | 145 | | PLL_POWER_DOWN | 8 = 100 | Power down state of phase-locked loops to save power | 146 | | ULV | 9 = 200 | ULV voltage for power saving mode enablement | 147 | | VDDOFF | 10 = 400 | Voltage rail off DEBUG PStates voltage control | 148 | | VCN_DPM | 11 = 800 | Locking max VCN clock to 400 MHz while disabled | 149 | | ACP_DPM | 12 = 1000 | Locking NB-Azalia (audio over iGPU) to 400 MHz wh disabl | 150 | | ISP_DPM | 13 = 2000 | Locking Image Signal Processor to 100 MHz if disabled | 151 | | FCLK_DPM | 14 = 4000 | FCLK clock locking? After disabling | 152 | | SOCCLK_DPM | 15 = 8000 | Locking max SoC clock to 200 MHz while disabled | 153 | | MP0CLK_DPM | 16 = 10000 | MP0 clocks group clock locking? After disabling | 154 | | LCLK_DPM | 17 = 20000 | Data Latch clock locking? After disabling | 155 | | SHUBCLK_DPM | 18 = 40000 | System hub clock locking? After disabling | 156 | | DCEFCLK_DPM | 19 = 80000 | Nothing happens | 157 | | GFX_DPM | 20 = 100000 | Locking max iGPU clock to 400 MHz while disabled | 158 | | DS_GFXCLK | 21 = 200000 | Allow change GFX_CLK from SMU | 159 | | DS_SOCCLK | 22 = 400000 | Allow change SOC_CLK from SMU | 160 | | DS_LCLK | 23 = 800000 | Allow change LCLK from SMU | 161 | | DS_DCEFCLK | 24 = 1000000 | Allow change DCEFCLK from SMU | 162 | | DS_SHUBCLK | 25 = 2000000 | Allow change SystemHUB_CLK from SMU | 163 | | RM | 26 = 4000000 | Resource management engine? | 164 | | S0i2 | 27 = 8000000 | Pstate S0i2 for low power idle | 165 | | WHISPER_MODE | 28 = 10000000 | Whisper event start-stop | 166 | | DS_FCLK | 29 = 20000000 | Allow change FCLK from SMU | 167 | | DS_SMNCLK | 30 = 40000000 | Allow change SystemManagementNetworkCLK from SMU | 168 | | DS_MP1CLK | 31 = 80000000 | Allow change MP1 Clocks group from SMU | 169 | | DS_MP0CLK | 32 = 0,1 | Allow change MP0 Clocks group from SMU | 170 | | MGCG | 33 = 0,2 | MemoryGenericClockGating? | 171 | | DS_FUSE_SRAM | 34 = 0,4 | Deep sleep strate for fuse SRAM from SMU | 172 | | GFX_CKS | 35 = 0,8 | DISABLING WILL DISABLE THE GPU! | 173 | | PSI0 | 36 = 0,10 | PSI0 Currents group | 174 | | PROCHOT | 37 = 0,20 | Disabling will disable PROCHOT and CPU CAN WORK ON 400 MHZ! | 175 | | CPUOFF | 38 = 0,40 | Disabling will disable C-States | 176 | | STAPM | 39 = 0,80 | Disabling will disable STAPM | 177 | | CORE_CSTATES | 40 = 0,100 | Disabling will disable C-States | 178 | | GFX_DUTY_CYCLE | 41 = 0,200 | Duty Cycle for iGPU control | 179 | | AA_MODE | 42 = 0,400 | Enabling will give some performance boost | 180 | | LIVMIN | 43 = 0,800 | Minimum live voltage for RV2 | 181 | | RLC_PACE | 44 = 0,1000 | RLC (Run Length Coding) pacing for RV2 | 182 | 183 | -These can be enabled with EnableSmuFeatures (0x5) or disabled with DisableSmuFeatures (0x6) 184 | 185 | ## Example 186 | To enable feature set command to 0x5 and in arguments send value from table args (after "="). For examle to enable STAPM feature you need to send MP1 command 0x5 with arguments 0,80 (send 0 to zero argument and 80 to first, "," is a separator beetwen arguments 187 | 188 | # PPtable 189 | PowerPlay Table 190 | 191 | A table to storage power management information 192 | 193 | See AMDGPU Powerplay for more information 194 | 195 | Now no way to get RX Vega Mobile Power Play from system 196 | 197 | # Firmware 198 | Grab from BIOS, reverse engineering in progesss.(Help wanted) 199 | 200 | # Credit 201 | - [zamaudio/smutool](https://github.com/zamaudio/smutool) 202 | - Linux Kernel - amdgpu 203 | - Internet 204 | - My ThinkPad E485 with R7-2700U 205 | -------------------------------------------------------------------------------- /firmware/smu_raven_1.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/FlyGoat/ryzen_nb_smu/88fc506ab5775ed736438d094bb688e024185284/firmware/smu_raven_1.bin -------------------------------------------------------------------------------- /firmware/smu_raven_2.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/FlyGoat/ryzen_nb_smu/88fc506ab5775ed736438d094bb688e024185284/firmware/smu_raven_2.bin -------------------------------------------------------------------------------- /pp_kmod/Makefile: -------------------------------------------------------------------------------- 1 | obj-m += ry_nb_pp.o 2 | ry_nb_pp-objs = ryzen_nb_pp.o nb_smu_ops.o 3 | 4 | all: 5 | make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules 6 | 7 | clean: 8 | make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean -------------------------------------------------------------------------------- /pp_kmod/nb_smu_ops.c: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0 */ 2 | /* Copyright (C) 2018 Jiaxun Yang */ 3 | /* Ryzen NB SMU Service Request Opreations */ 4 | 5 | #include 6 | #include 7 | #include "nb_smu_ops.h" 8 | 9 | u32 nb_reg_read(struct pci_dev *nb, u32 addr) 10 | { 11 | u32 val; 12 | pci_write_config_dword(nb, NB_PCI_REG_ADDR_ADDR, (addr & (~0x3))); 13 | pci_read_config_dword(nb, NB_PCI_REG_DATA_ADDR, &val); 14 | return val; 15 | } 16 | 17 | void nb_reg_write(struct pci_dev *nb, u32 addr, u32 data) 18 | { 19 | pci_write_config_dword(nb, NB_PCI_REG_ADDR_ADDR, addr); 20 | pci_write_config_dword(nb, NB_PCI_REG_DATA_ADDR, data); 21 | } 22 | 23 | u32 smu_service_req(struct pci_dev *nb ,u32 id ,smu_service_args_t *args) 24 | { 25 | u32 response = 0x0; 26 | DBG("SMU_SERVICE REQ_ID:0x%x\n", id); 27 | DBG("SMU_SERVICE REQ: arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n", \ 28 | args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5); 29 | 30 | /* Clear the response */ 31 | nb_reg_write(nb, MP1_C2PMSG_RESPONSE_ADDR, 0x0); 32 | /* Pass arguments */ 33 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(0), args->arg0); 34 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(1), args->arg1); 35 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(2), args->arg2); 36 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(3), args->arg3); 37 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(4), args->arg4); 38 | nb_reg_write(nb, MP1_C2PMSG_ARGx_ADDR(5), args->arg5); 39 | /* Send message ID */ 40 | nb_reg_write(nb, MP1_C2PMSG_MESSAGE_ADDR, id); 41 | /* Wait until reponse changed */ 42 | while(response == 0x0) { 43 | response = nb_reg_read(nb, MP1_C2PMSG_RESPONSE_ADDR); 44 | } 45 | /* Read back arguments */ 46 | args->arg0 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(0)); 47 | args->arg1 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(1)); 48 | args->arg2 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(2)); 49 | args->arg3 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(3)); 50 | args->arg4 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(4)); 51 | args->arg5 = nb_reg_read(nb, MP1_C2PMSG_ARGx_ADDR(5)); 52 | 53 | DBG("SMU_SERVICE REP: REP: 0x%x, arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n", \ 54 | response, args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5); 55 | 56 | return response; 57 | } -------------------------------------------------------------------------------- /pp_kmod/nb_smu_ops.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0 */ 2 | /* Copyright (C) 2018 Jiaxun Yang */ 3 | /* Ryzen NB SMU Service Request Opreations */ 4 | 5 | #ifndef NB_SMU_OPS_H 6 | #define NB_SMU_OPS_H 7 | 8 | #include 9 | #include 10 | #include 11 | 12 | #define DBG(...) pr_info(__VA_ARGS__) 13 | 14 | #define NB_PCI_REG_ADDR_ADDR 0xB8 15 | #define NB_PCI_REG_DATA_ADDR 0xBC 16 | 17 | #define MP1_C2PMSG_MESSAGE_ADDR 0x3B10528 18 | #define MP1_C2PMSG_RESPONSE_ADDR 0x3B10564 19 | #define MP1_C2PMSG_ARG_BASE 0x3B10998 20 | #define MP1_C2PMSG_ARGx_ADDR(x) (MP1_C2PMSG_ARG_BASE + 4 * x) 21 | 22 | 23 | #define REP_MSG_OK 0x1 24 | #define REP_MSG_Failed 0xFF 25 | #define REP_MSG_UnknownCmd 0xFE 26 | #define REP_MSG_CmdRejectedPrereq 0xFD 27 | #define REP_MSG_CmdRejectedBusy 0xFC 28 | 29 | #define MSG_GetBiosIfVersion 0x3 30 | #define MSG_SetPPTABLEADDRLow 0x12 31 | #define MSG_SetPPTABLEAddrHigh 0x13 32 | #define MSG_GetPPTABLE 0x16 33 | #define MSG_SetPPTABLE 0x17 34 | 35 | typedef struct { 36 | u32 arg0; 37 | u32 arg1; 38 | u32 arg2; 39 | u32 arg3; 40 | u32 arg4; 41 | u32 arg5; 42 | } smu_service_args_t; 43 | 44 | u32 smu_service_req(struct pci_dev *nb ,u32 id ,smu_service_args_t *args); 45 | 46 | 47 | #endif -------------------------------------------------------------------------------- /pp_kmod/ryzen_nb_pp.c: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0 */ 2 | /* Copyright (C) 2018 Jiaxun Yang */ 3 | /* Ryzen NB SMU Powerplay Driver */ 4 | 5 | #include 6 | #include 7 | #include 8 | #include 9 | #include "nb_smu_ops.h" 10 | #include "ryzen_pptable.h" 11 | #include 12 | #include 13 | #include 14 | #include 15 | 16 | #define DEV_NAME "ryzen_nb_smu" 17 | #define NB_DEVICE_ID 0x15d0 18 | #define AMD_VENDOR_ID 0x1022 19 | 20 | smu_service_args_t args = {0, 0, 0, 0, 0, 0}; 21 | 22 | static DEFINE_SPINLOCK(smu_lock); 23 | 24 | static struct pci_device_id id_table[] = { 25 | { PCI_DEVICE(AMD_VENDOR_ID, NB_DEVICE_ID), }, 26 | { 0, } 27 | }; 28 | MODULE_DEVICE_TABLE(pci, id_table); 29 | static struct pci_dev *nb; 30 | pptable_t *pptable; 31 | 32 | phys_addr_t pptable_phy_addr; 33 | 34 | static void clear_args(smu_service_args_t *args){ 35 | args->arg0 = 0; 36 | args->arg1 = 0; 37 | args->arg2 = 0; 38 | args->arg3 = 0; 39 | args->arg4 = 0; 40 | args->arg5 = 0; 41 | } 42 | 43 | 44 | static int pp_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 45 | { 46 | u32 smu_biosif_ver; 47 | 48 | pr_warn("ryzen_nb_pp: Probe\n"); 49 | nb = dev; 50 | if (pci_enable_device(dev) < 0) { 51 | return -ENODEV; 52 | } 53 | 54 | spin_lock(&smu_lock); 55 | smu_service_req(nb, MSG_GetBiosIfVersion, &args); 56 | smu_biosif_ver = args.arg0; 57 | spin_unlock(&smu_lock); 58 | 59 | pr_warn("SMU BIOS Interface Ver: 0x%x\n", smu_biosif_ver); 60 | if(smu_biosif_ver != BIOS_INTERFACE_VER){ 61 | pr_warn("SMU BIOS Interface Ver not match\n"); 62 | return -ENODEV; 63 | } 64 | clear_args(&args); 65 | 66 | pptable = (pptable_t*)kzalloc(sizeof(pptable_t), __GFP_DMA); 67 | pptable_phy_addr = virt_to_phys((void*)pptable); 68 | 69 | DBG("pptable_phy_addr: 0x%llx",pptable_phy_addr); 70 | 71 | /* Set pptable phys addr in smu */ 72 | spin_lock(&smu_lock); 73 | args.arg0 = lower_32_bits(pptable_phy_addr); 74 | smu_service_req(nb, MSG_SetPPTABLEADDRLow, &args); 75 | clear_args(&args); 76 | args.arg0 = upper_32_bits(pptable_phy_addr); 77 | smu_service_req(nb, MSG_SetPPTABLEAddrHigh, &args); 78 | clear_args(&args); 79 | spin_unlock(&smu_lock); 80 | 81 | /* Dump pptable to memory */ 82 | spin_lock(&smu_lock); 83 | args.arg0 = TABLE_PPTABLE; 84 | smu_service_req(nb, MSG_GetPPTABLE, &args); 85 | spin_unlock(&smu_lock); 86 | 87 | pr_warn("PPTable Ver: %x, Current cTDP Configure: %x", pptable->Version, pptable->systemconfig); 88 | return 0; 89 | 90 | } 91 | 92 | static void pp_pci_remove(struct pci_dev *dev) 93 | { 94 | pr_info("ryzen_nb_pp: remove\n"); 95 | kfree(pptable); 96 | } 97 | 98 | static struct pci_driver pci_driver = { 99 | .name = DEV_NAME, 100 | .id_table = id_table, 101 | .probe = pp_pci_probe, 102 | .remove = pp_pci_remove, 103 | }; 104 | 105 | static int pp_driver_init(void) 106 | { 107 | if (pci_register_driver(&pci_driver) < 0) { 108 | return 1; 109 | } 110 | return 0; 111 | } 112 | 113 | static void pp_driver_exit(void) 114 | { 115 | pci_unregister_driver(&pci_driver); 116 | } 117 | 118 | module_init(pp_driver_init); 119 | module_exit(pp_driver_exit); 120 | MODULE_LICENSE("GPL"); -------------------------------------------------------------------------------- /pp_kmod/ryzen_pptable.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0 */ 2 | /* Copyright (C) 2018 Jiaxun Yang */ 3 | /* Ryzen NB SMU Powerplay Table */ 4 | 5 | #ifndef RYZEN_PPTABLE_H 6 | #define RYZEN_PPTABLE_H 7 | #include 8 | 9 | #define TABLE_PPTABLE 0 10 | 11 | #define BIOS_INTERFACE_VER 0x5 12 | 13 | typedef struct { 14 | u32 Version; 15 | 16 | /* PCD infrastructure limits */ 17 | u32 SUSTAINED_POWER_LIMIT; //Power [mWatts] (STAPM) 18 | u32 FAST_PPT_LIMIT; //Power [mWatts] (fPPT) 19 | u32 SLOW_PPT_LIMIT; //Power [mWatts] (sPPT) 20 | u32 SLOW_PPT_TIME_CONSTANT; //Time constant (seconds) 21 | u8 SYSTEM_TEMPERATURE_TRACKING; //Tskin feedback from EC; 1 = enabled; 0 = disabled 22 | u8 STAPM_BOOST_OVERRIDE; //1 = use value in STAPM_BOOST; 0 = use SMU FW default 23 | u8 STAPM_BOOST; //1 = enabled; 0 = disabled 24 | u8 AA_MODE_EN; //A+A power/thermal sharing algorithm; 1 = enable; 0 = disable 25 | u32 STAPM_TIME_CONSTANT; //Time constant (seconds) 26 | u32 THERMCTL_LIMIT; //Tctrl (THM) 27 | u32 VRM_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD TDC) 28 | u32 VRM_MAXIMUM_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD EDC) 29 | u32 VRM_SOC_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC TDC) 30 | u32 VRM_SOC_MAXIMUM_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC EDC) 31 | u32 PSI0_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD PSI0) 32 | u32 PSI0_SOC_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC PSI0) 33 | u32 PROCHOT_L_DEASSERTION_RAMP_TIME; //Time [ms] (PROCHOT) 34 | u8 systemconfig; //0 = use fused default; >0 = user specified value 35 | u8 spare[3]; 36 | 37 | /* PCD/CBS fan table */ 38 | u8 FanTable_Override; //[1 means use the full set of data specified below; 0 means use default fan table] 39 | u8 FanTable_Hysteresis; 40 | u8 FanTable_TempLow; 41 | u8 FanTable_TempMed; 42 | u8 FanTable_TempHigh; 43 | u8 FanTable_TempCritical; 44 | u8 FanTable_PwmLow; 45 | u8 FanTable_PwmMed; 46 | u8 FanTable_PwmHigh; 47 | u8 FanTable_PwmFreq; //[0 = 25kHz; 1 = 100Hz] 48 | u8 FanTable_Polarity; //[0 = negative; 1 = positive] 49 | u8 FanTable_spare; 50 | 51 | /* CBS debug options */ 52 | u8 CoreDldoPsmMargin; //[PSM count 1 ~ 1.8mV] 53 | u8 GfxDldoPsmMargin; //[PSM count 1 ~ 1.8mV] 54 | u8 ForceFanPwmEn; //[1 means use the ForceFanPwm value below] 55 | u8 ForceFanPwm; //[% 0-100] 56 | u8 CoreStretchThreshEn; //[1 means use the CoreStretchThresh value below] 57 | u8 CoreStretchThresh; //[1 = 2.5%] 58 | u8 L3StretchThreshEn; //[1 means use the L3StretchThresh value below] 59 | u8 L3StretchThresh; //[1 = 2.5%] 60 | u8 GfxStretchThreshEn; //[1 means use the GfxStretchThresh value below] 61 | u8 GfxStretchThresh; //[1 = 2.5%] 62 | u8 GfxStretchAmountEn; 63 | u8 GfxStretchAmount; 64 | u8 CoreDldoBypass; //[1 means bypass] 65 | u8 GfxDldoBypass; //[1 means bypass] 66 | u8 XiSeparationEn; //[1 means use the XiSeparation value below] 67 | u8 XiSeparationHigh; //[0 = async mode; 3 = 2 cycle; 4 = 2.5 cycle; 5 = 3 cycle; 6 = 3.5 cycle; 7 = 4 cycle] 68 | u8 XiSeparationLow; //[0 = async mode; 3 = 2 cycle; 4 = 2.5 cycle; 5 = 3 cycle; 6 = 3.5 cycle; 7 = 4 cycle] 69 | u8 AvfsCoeffTable_Override; //[1 = override; 0 = use defaults] 70 | u8 spare35[2]; 71 | s32 VddcrVddVoltageMargin; //[mV] 72 | s32 VddcrSocVoltageMargin; //[mV] 73 | u16 FcwSlewFrac_L3FidTotalSteps; 74 | u8 FcwSlewFrac_L3FidTotalStepsEn; 75 | u8 WaitVidCompDis; //[0 = use VOTF feedback from VR; 1 = use internal timer] 76 | u8 UseCcxFreqCurveFuses; 77 | u8 UseGfxFreqCurveFuses; 78 | u8 UseCacSiddFuses; 79 | u8 spare2; 80 | 81 | /* CBS debug options [AVFS coeffients - signed 2's complement with 24 fractional bits] */ 82 | s32 CorePsfFreq2; 83 | s32 CorePsfFreq; 84 | s32 CorePsfGfxActive; 85 | s32 CorePsfTemp; 86 | s32 CorePsfSidd; 87 | s32 CorePsfCac; 88 | s32 CorePsfNumActiveCores; 89 | s32 CorePsfSigma; 90 | s32 CorePsfAcBtc; 91 | s32 L3PsfFreq2; 92 | s32 L3PsfFreq; 93 | s32 L3PsfGfxActive; 94 | s32 L3PsfTemp; 95 | s32 L3PsfSidd; 96 | s32 L3PsfCac; 97 | s32 L3PsfNumActiveCores; 98 | s32 L3PsfSigma; 99 | s32 L3PsfAcBtc; 100 | s32 GfxPsfFreq2; 101 | s32 GfxPsfFreq; 102 | s32 GfxPsfGfxActive; 103 | s32 GfxPsfTemp; 104 | s32 GfxPsfSidd; 105 | s32 GfxPsfCac; 106 | s32 GfxPsfNumActiveCores; 107 | s32 GfxPsfSigma; 108 | s32 GfxPsfAcBtc; 109 | 110 | /* PCD/CBS Telemetry setup */ 111 | u32 Telemetry_VddcrVddSlope; 112 | s32 Telemetry_VddcrVddOffset; 113 | u32 Telemetry_VddcrSocSlope; 114 | s32 Telemetry_VddcrSocOffset; 115 | 116 | /* LIVmin Entry voltage */ 117 | u8 LivMinEntryVID; 118 | u8 spare3[3]; 119 | 120 | } pptable_t; 121 | 122 | #endif -------------------------------------------------------------------------------- /smu-tool/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | #cmake version 2 | CMAKE_MINIMUM_REQUIRED(VERSION 3.0) 3 | 4 | #define project name 5 | PROJECT(smu-tool) 6 | 7 | SET(CMAKE_CXX_FLAGS "-std=c++11") 8 | 9 | SET(CMAKE_BUILD_TYPE "Debug") 10 | SET(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb") 11 | SET(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall") 12 | 13 | SET(INC_DIR ./inc) 14 | SET(LINK_DIR ./prebuilt) 15 | 16 | INCLUDE_DIRECTORIES(${INC_DIR}) 17 | LINK_DIRECTORIES(${LINK_DIR}) 18 | 19 | AUX_SOURCE_DIRECTORY(./ SRC_DIR) 20 | 21 | if(WIN32) 22 | ADD_EXECUTABLE(${PROJECT_NAME} winring0.cpp nb_smu_ops.cpp argparse.cpp main.cpp) 23 | target_link_libraries(${PROJECT_NAME} WinRing0x64) 24 | else() 25 | ADD_EXECUTABLE(${PROJECT_NAME} libpci.cpp nb_smu_ops.cpp argparse.cpp main.cpp) 26 | target_link_libraries(${PROJECT_NAME} pci) 27 | endif() 28 | -------------------------------------------------------------------------------- /smu-tool/argparse.cpp: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (C) 2012-2015 Yecheng Fu 3 | * All rights reserved. 4 | * 5 | * Use of this source code is governed by a MIT-style license that can be found 6 | * in the LICENSE file. 7 | */ 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include "argparse.h" 14 | 15 | #define OPT_UNSET 1 16 | #define OPT_LONG (1 << 1) 17 | 18 | static const char * 19 | prefix_skip(const char *str, const char *prefix) 20 | { 21 | size_t len = strlen(prefix); 22 | return strncmp(str, prefix, len) ? NULL : str + len; 23 | } 24 | 25 | static int 26 | prefix_cmp(const char *str, const char *prefix) 27 | { 28 | for (;; str++, prefix++) 29 | if (!*prefix) { 30 | return 0; 31 | } else if (*str != *prefix) { 32 | return (unsigned char)*prefix - (unsigned char)*str; 33 | } 34 | } 35 | 36 | static void 37 | argparse_error(struct argparse *self, const struct argparse_option *opt, 38 | const char *reason, int flags) 39 | { 40 | (void)self; 41 | if (flags & OPT_LONG) { 42 | fprintf(stderr, "error: option `--%s` %s\n", opt->long_name, reason); 43 | } else { 44 | fprintf(stderr, "error: option `-%c` %s\n", opt->short_name, reason); 45 | } 46 | exit(1); 47 | } 48 | 49 | static int 50 | argparse_getvalue(struct argparse *self, const struct argparse_option *opt, 51 | int flags) 52 | { 53 | const char *s = NULL; 54 | if (!opt->value) 55 | goto skipped; 56 | switch (opt->type) { 57 | case ARGPARSE_OPT_BOOLEAN: 58 | if (flags & OPT_UNSET) { 59 | *(int *)opt->value = *(int *)opt->value - 1; 60 | } else { 61 | *(int *)opt->value = *(int *)opt->value + 1; 62 | } 63 | if (*(int *)opt->value < 0) { 64 | *(int *)opt->value = 0; 65 | } 66 | break; 67 | case ARGPARSE_OPT_BIT: 68 | if (flags & OPT_UNSET) { 69 | *(int *)opt->value &= ~opt->data; 70 | } else { 71 | *(int *)opt->value |= opt->data; 72 | } 73 | break; 74 | case ARGPARSE_OPT_STRING: 75 | if (self->optvalue) { 76 | *(const char **)opt->value = self->optvalue; 77 | self->optvalue = NULL; 78 | } else if (self->argc > 1) { 79 | self->argc--; 80 | *(const char **)opt->value = *++self->argv; 81 | } else { 82 | argparse_error(self, opt, "requires a value", flags); 83 | } 84 | break; 85 | case ARGPARSE_OPT_INTEGER: 86 | errno = 0; 87 | if (self->optvalue) { 88 | *(int *)opt->value = strtol(self->optvalue, (char **)&s, 0); 89 | self->optvalue = NULL; 90 | } else if (self->argc > 1) { 91 | self->argc--; 92 | *(int *)opt->value = strtol(*++self->argv, (char **)&s, 0); 93 | } else { 94 | argparse_error(self, opt, "requires a value", flags); 95 | } 96 | if (errno) 97 | argparse_error(self, opt, strerror(errno), flags); 98 | if (s[0] != '\0') 99 | argparse_error(self, opt, "expects an integer value", flags); 100 | break; 101 | case ARGPARSE_OPT_U32: 102 | errno = 0; 103 | if (self->optvalue) { 104 | *(uint32_t *)opt->value = strtoul(self->optvalue, (char **)&s, 0); 105 | self->optvalue = NULL; 106 | } else if (self->argc > 1) { 107 | self->argc--; 108 | *(uint32_t *)opt->value = strtoul(*++self->argv, (char **)&s, 0); 109 | } else { 110 | argparse_error(self, opt, "requires a value", flags); 111 | } 112 | if (errno) 113 | argparse_error(self, opt, strerror(errno), flags); 114 | if (s[0] != '\0') 115 | argparse_error(self, opt, "expects an unsigned 32-bit integer value", flags); 116 | break; 117 | case ARGPARSE_OPT_FLOAT: 118 | errno = 0; 119 | if (self->optvalue) { 120 | *(float *)opt->value = strtof(self->optvalue, (char **)&s); 121 | self->optvalue = NULL; 122 | } else if (self->argc > 1) { 123 | self->argc--; 124 | *(float *)opt->value = strtof(*++self->argv, (char **)&s); 125 | } else { 126 | argparse_error(self, opt, "requires a value", flags); 127 | } 128 | if (errno) 129 | argparse_error(self, opt, strerror(errno), flags); 130 | if (s[0] != '\0') 131 | argparse_error(self, opt, "expects a numerical value", flags); 132 | break; 133 | default: 134 | assert(0); 135 | } 136 | 137 | skipped: 138 | if (opt->callback) { 139 | return opt->callback(self, opt); 140 | } 141 | 142 | return 0; 143 | } 144 | 145 | static void 146 | argparse_options_check(const struct argparse_option *options) 147 | { 148 | for (; options->type != ARGPARSE_OPT_END; options++) { 149 | switch (options->type) { 150 | case ARGPARSE_OPT_END: 151 | case ARGPARSE_OPT_BOOLEAN: 152 | case ARGPARSE_OPT_BIT: 153 | case ARGPARSE_OPT_INTEGER: 154 | case ARGPARSE_OPT_U32: 155 | case ARGPARSE_OPT_FLOAT: 156 | case ARGPARSE_OPT_STRING: 157 | case ARGPARSE_OPT_GROUP: 158 | continue; 159 | default: 160 | fprintf(stderr, "wrong option type: %d", options->type); 161 | break; 162 | } 163 | } 164 | } 165 | 166 | static int 167 | argparse_short_opt(struct argparse *self, const struct argparse_option *options) 168 | { 169 | for (; options->type != ARGPARSE_OPT_END; options++) { 170 | if (options->short_name == *self->optvalue) { 171 | self->optvalue = self->optvalue[1] ? self->optvalue + 1 : NULL; 172 | return argparse_getvalue(self, options, 0); 173 | } 174 | } 175 | return -2; 176 | } 177 | 178 | static int 179 | argparse_long_opt(struct argparse *self, const struct argparse_option *options) 180 | { 181 | for (; options->type != ARGPARSE_OPT_END; options++) { 182 | const char *rest; 183 | int opt_flags = 0; 184 | if (!options->long_name) 185 | continue; 186 | 187 | rest = prefix_skip(self->argv[0] + 2, options->long_name); 188 | if (!rest) { 189 | // negation disabled? 190 | if (options->flags & OPT_NONEG) { 191 | continue; 192 | } 193 | // only OPT_BOOLEAN/OPT_BIT supports negation 194 | if (options->type != ARGPARSE_OPT_BOOLEAN && options->type != 195 | ARGPARSE_OPT_BIT) { 196 | continue; 197 | } 198 | 199 | if (prefix_cmp(self->argv[0] + 2, "no-")) { 200 | continue; 201 | } 202 | rest = prefix_skip(self->argv[0] + 2 + 3, options->long_name); 203 | if (!rest) 204 | continue; 205 | opt_flags |= OPT_UNSET; 206 | } 207 | if (*rest) { 208 | if (*rest != '=') 209 | continue; 210 | self->optvalue = rest + 1; 211 | } 212 | return argparse_getvalue(self, options, opt_flags | OPT_LONG); 213 | } 214 | return -2; 215 | } 216 | 217 | int 218 | argparse_init(struct argparse *self, struct argparse_option *options, 219 | const char *const *usages, int flags) 220 | { 221 | memset(self, 0, sizeof(*self)); 222 | self->options = options; 223 | self->usages = usages; 224 | self->flags = flags; 225 | self->description = NULL; 226 | self->epilog = NULL; 227 | return 0; 228 | } 229 | 230 | void 231 | argparse_describe(struct argparse *self, const char *description, 232 | const char *epilog) 233 | { 234 | self->description = description; 235 | self->epilog = epilog; 236 | } 237 | 238 | int 239 | argparse_parse(struct argparse *self, int argc, const char **argv) 240 | { 241 | self->argc = argc - 1; 242 | self->argv = argv + 1; 243 | self->out = argv; 244 | 245 | argparse_options_check(self->options); 246 | 247 | for (; self->argc; self->argc--, self->argv++) { 248 | const char *arg = self->argv[0]; 249 | if (arg[0] != '-' || !arg[1]) { 250 | if (self->flags & ARGPARSE_STOP_AT_NON_OPTION) { 251 | goto end; 252 | } 253 | // if it's not option or is a single char '-', copy verbatim 254 | self->out[self->cpidx++] = self->argv[0]; 255 | continue; 256 | } 257 | // short option 258 | if (arg[1] != '-') { 259 | self->optvalue = arg + 1; 260 | switch (argparse_short_opt(self, self->options)) { 261 | case -1: 262 | break; 263 | case -2: 264 | goto unknown; 265 | } 266 | while (self->optvalue) { 267 | switch (argparse_short_opt(self, self->options)) { 268 | case -1: 269 | break; 270 | case -2: 271 | goto unknown; 272 | } 273 | } 274 | continue; 275 | } 276 | // if '--' presents 277 | if (!arg[2]) { 278 | self->argc--; 279 | self->argv++; 280 | break; 281 | } 282 | // long option 283 | switch (argparse_long_opt(self, self->options)) { 284 | case -1: 285 | break; 286 | case -2: 287 | goto unknown; 288 | } 289 | continue; 290 | 291 | unknown: 292 | fprintf(stderr, "error: unknown option `%s`\n", self->argv[0]); 293 | argparse_usage(self); 294 | exit(1); 295 | } 296 | 297 | end: 298 | memmove(self->out + self->cpidx, self->argv, 299 | self->argc * sizeof(*self->out)); 300 | self->out[self->cpidx + self->argc] = NULL; 301 | 302 | return self->cpidx + self->argc; 303 | } 304 | 305 | void 306 | argparse_usage(struct argparse *self) 307 | { 308 | if (self->usages) { 309 | fprintf(stdout, "Usage: %s\n", *self->usages++); 310 | while (*self->usages && **self->usages) 311 | fprintf(stdout, " or: %s\n", *self->usages++); 312 | } else { 313 | fprintf(stdout, "Usage:\n"); 314 | } 315 | 316 | // print description 317 | if (self->description) 318 | fprintf(stdout, "%s\n", self->description); 319 | 320 | fputc('\n', stdout); 321 | 322 | const struct argparse_option *options; 323 | 324 | // figure out best width 325 | size_t usage_opts_width = 0; 326 | size_t len; 327 | options = self->options; 328 | for (; options->type != ARGPARSE_OPT_END; options++) { 329 | len = 0; 330 | if ((options)->short_name) { 331 | len += 2; 332 | } 333 | if ((options)->short_name && (options)->long_name) { 334 | len += 2; // separator ", " 335 | } 336 | if ((options)->long_name) { 337 | len += strlen((options)->long_name) + 2; 338 | } 339 | if (options->type == ARGPARSE_OPT_INTEGER) { 340 | len += strlen("="); 341 | } 342 | if (options->type == ARGPARSE_OPT_U32) { 343 | len += strlen("="); 344 | } 345 | if (options->type == ARGPARSE_OPT_FLOAT) { 346 | len += strlen("="); 347 | } else if (options->type == ARGPARSE_OPT_STRING) { 348 | len += strlen("="); 349 | } 350 | len = (len + 3) - ((len + 3) & 3); 351 | if (usage_opts_width < len) { 352 | usage_opts_width = len; 353 | } 354 | } 355 | usage_opts_width += 4; // 4 spaces prefix 356 | 357 | options = self->options; 358 | for (; options->type != ARGPARSE_OPT_END; options++) { 359 | size_t pos = 0; 360 | int pad = 0; 361 | if (options->type == ARGPARSE_OPT_GROUP) { 362 | fputc('\n', stdout); 363 | fprintf(stdout, "%s", options->help); 364 | fputc('\n', stdout); 365 | continue; 366 | } 367 | pos = fprintf(stdout, " "); 368 | if (options->short_name) { 369 | pos += fprintf(stdout, "-%c", options->short_name); 370 | } 371 | if (options->long_name && options->short_name) { 372 | pos += fprintf(stdout, ", "); 373 | } 374 | if (options->long_name) { 375 | pos += fprintf(stdout, "--%s", options->long_name); 376 | } 377 | if (options->type == ARGPARSE_OPT_INTEGER) { 378 | pos += fprintf(stdout, "="); 379 | } else if (options->type == ARGPARSE_OPT_U32) { 380 | pos += fprintf(stdout, "="); 381 | } else if (options->type == ARGPARSE_OPT_FLOAT) { 382 | pos += fprintf(stdout, "="); 383 | } else if (options->type == ARGPARSE_OPT_STRING) { 384 | pos += fprintf(stdout, "="); 385 | } 386 | if (pos <= usage_opts_width) { 387 | pad = usage_opts_width - pos; 388 | } else { 389 | fputc('\n', stdout); 390 | pad = usage_opts_width; 391 | } 392 | fprintf(stdout, "%*s%s\n", pad + 2, "", options->help); 393 | } 394 | 395 | // print epilog 396 | if (self->epilog) 397 | fprintf(stdout, "%s\n", self->epilog); 398 | } 399 | 400 | int 401 | argparse_help_cb(struct argparse *self, const struct argparse_option *option) 402 | { 403 | (void)option; 404 | argparse_usage(self); 405 | exit(0); 406 | } 407 | -------------------------------------------------------------------------------- /smu-tool/inc/OlsApi.h: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------------------- 2 | // Author : hiyohiyo 3 | // Mail : hiyohiyo@crystalmark.info 4 | // Web : http://openlibsys.org/ 5 | // License : The modified BSD license 6 | // 7 | // Copyright 2007-2009 OpenLibSys.org. All rights reserved. 8 | //----------------------------------------------------------------------------- 9 | // for WinRing0 1.3.x 10 | 11 | #pragma once 12 | 13 | /****************************************************************************** 14 | ** 15 | ** DLL Information 16 | ** 17 | ******************************************************************************/ 18 | 19 | //----------------------------------------------------------------------------- 20 | // GetDllStatus 21 | //----------------------------------------------------------------------------- 22 | DWORD // DLL Status, defined OLS_DLL_**** 23 | WINAPI GetDllStatus(); 24 | 25 | //----------------------------------------------------------------------------- 26 | // GetDllVersion 27 | //----------------------------------------------------------------------------- 28 | DWORD // DLL Version, defined OLS_VERSION 29 | WINAPI GetDllVersion( 30 | PBYTE major, // major version 31 | PBYTE minor, // minor version 32 | PBYTE revision, // revision 33 | PBYTE release // release/build 34 | ); 35 | 36 | //----------------------------------------------------------------------------- 37 | // GetDriverVersion 38 | //----------------------------------------------------------------------------- 39 | DWORD // Device Driver Version, defined OLS_DRIVER_VERSION 40 | WINAPI GetDriverVersion( 41 | PBYTE major, // major version 42 | PBYTE minor, // minor version 43 | PBYTE revision, // revision 44 | PBYTE release // release/build 45 | ); 46 | 47 | //----------------------------------------------------------------------------- 48 | // GetDriverType 49 | //----------------------------------------------------------------------------- 50 | DWORD // Device Driver Type, defined OLS_DRIVER_TYPE_**** 51 | WINAPI GetDriverType(); 52 | 53 | //----------------------------------------------------------------------------- 54 | // InitializeOls 55 | //----------------------------------------------------------------------------- 56 | BOOL // TRUE: success, FALSE: failure 57 | WINAPI InitializeOls(); 58 | 59 | //----------------------------------------------------------------------------- 60 | // DeinitializeOls 61 | //----------------------------------------------------------------------------- 62 | VOID WINAPI DeinitializeOls(); 63 | 64 | /****************************************************************************** 65 | ** 66 | ** CPU 67 | ** 68 | ******************************************************************************/ 69 | 70 | //----------------------------------------------------------------------------- 71 | // IsCpuid 72 | //----------------------------------------------------------------------------- 73 | BOOL // TRUE: support CPUID instruction, FALSE: not support CPUID instruction 74 | WINAPI IsCpuid(); 75 | 76 | //----------------------------------------------------------------------------- 77 | // IsMsr 78 | //----------------------------------------------------------------------------- 79 | BOOL // TRUE: support MSR(Model-Specific Register), FALSE: not support MSR 80 | WINAPI IsMsr(); 81 | 82 | //----------------------------------------------------------------------------- 83 | // IsTsc 84 | //----------------------------------------------------------------------------- 85 | BOOL // TRUE: support TSC(Time Stamp Counter), FALSE: not support TSC 86 | WINAPI IsTsc(); 87 | 88 | //----------------------------------------------------------------------------- 89 | // Rdmsr 90 | //----------------------------------------------------------------------------- 91 | BOOL // TRUE: success, FALSE: failure 92 | WINAPI Rdmsr( 93 | DWORD index, // MSR index 94 | PDWORD eax, // bit 0-31 95 | PDWORD edx // bit 32-63 96 | ); 97 | 98 | //----------------------------------------------------------------------------- 99 | // RdmsrTx 100 | //----------------------------------------------------------------------------- 101 | BOOL // TRUE: success, FALSE: failure 102 | WINAPI RdmsrTx( 103 | DWORD index, // MSR index 104 | PDWORD eax, // bit 0-31 105 | PDWORD edx, // bit 32-63 106 | DWORD_PTR threadAffinityMask 107 | ); 108 | 109 | //----------------------------------------------------------------------------- 110 | // RdmsrPx 111 | //----------------------------------------------------------------------------- 112 | BOOL // TRUE: success, FALSE: failure 113 | WINAPI RdmsrPx( 114 | DWORD index, // MSR index 115 | PDWORD eax, // bit 0-31 116 | PDWORD edx, // bit 32-63 117 | DWORD_PTR processAffinityMask 118 | ); 119 | 120 | //----------------------------------------------------------------------------- 121 | // Wrmsr 122 | //----------------------------------------------------------------------------- 123 | BOOL // TRUE: success, FALSE: failure 124 | WINAPI Wrmsr( 125 | DWORD index, // MSR index 126 | DWORD eax, // bit 0-31 127 | DWORD edx // bit 32-63 128 | ); 129 | 130 | //----------------------------------------------------------------------------- 131 | // WrmsrTx 132 | //----------------------------------------------------------------------------- 133 | BOOL // TRUE: success, FALSE: failure 134 | WINAPI WrmsrTx( 135 | DWORD index, // MSR index 136 | DWORD eax, // bit 0-31 137 | DWORD edx, // bit 32-63 138 | DWORD_PTR threadAffinityMask 139 | ); 140 | 141 | //----------------------------------------------------------------------------- 142 | // WrmsrPx 143 | //----------------------------------------------------------------------------- 144 | BOOL // TRUE: success, FALSE: failure 145 | WINAPI WrmsrPx( 146 | DWORD index, // MSR index 147 | DWORD eax, // bit 0-31 148 | DWORD edx, // bit 32-63 149 | DWORD_PTR processAffinityMask 150 | ); 151 | 152 | //----------------------------------------------------------------------------- 153 | // Rdpmc 154 | //----------------------------------------------------------------------------- 155 | BOOL // TRUE: success, FALSE: failure 156 | WINAPI Rdpmc( 157 | DWORD index, // PMC index 158 | PDWORD eax, // bit 0-31 159 | PDWORD edx // bit 32-63 160 | ); 161 | 162 | //----------------------------------------------------------------------------- 163 | // RdmsrTx 164 | //----------------------------------------------------------------------------- 165 | BOOL // TRUE: success, FALSE: failure 166 | WINAPI RdpmcTx( 167 | DWORD index, // PMC index 168 | PDWORD eax, // bit 0-31 169 | PDWORD edx, // bit 32-63 170 | DWORD_PTR threadAffinityMask 171 | ); 172 | 173 | //----------------------------------------------------------------------------- 174 | // RdmsrPx 175 | //----------------------------------------------------------------------------- 176 | BOOL // TRUE: success, FALSE: failure 177 | WINAPI RdpmcPx( 178 | DWORD index, // PMC index 179 | PDWORD eax, // bit 0-31 180 | PDWORD edx, // bit 32-63 181 | DWORD_PTR processAffinityMask 182 | ); 183 | 184 | //----------------------------------------------------------------------------- 185 | // Cpuid 186 | //----------------------------------------------------------------------------- 187 | BOOL // TRUE: success, FALSE: failure 188 | WINAPI Cpuid( 189 | DWORD index, // CPUID index 190 | PDWORD eax, 191 | PDWORD ebx, 192 | PDWORD ecx, 193 | PDWORD edx 194 | ); 195 | 196 | //----------------------------------------------------------------------------- 197 | // CpuidTx 198 | //----------------------------------------------------------------------------- 199 | BOOL // TRUE: success, FALSE: failure 200 | WINAPI CpuidTx( 201 | DWORD index, // CPUID index 202 | PDWORD eax, 203 | PDWORD ebx, 204 | PDWORD ecx, 205 | PDWORD edx, 206 | DWORD_PTR threadAffinityMask 207 | ); 208 | 209 | //----------------------------------------------------------------------------- 210 | // CpuidPx 211 | //----------------------------------------------------------------------------- 212 | BOOL // TRUE: success, FALSE: failure 213 | WINAPI CpuidPx( 214 | DWORD index, // CPUID index 215 | PDWORD eax, 216 | PDWORD ebx, 217 | PDWORD ecx, 218 | PDWORD edx, 219 | DWORD_PTR processAffinityMask 220 | ); 221 | 222 | //----------------------------------------------------------------------------- 223 | // Rdtsc 224 | //----------------------------------------------------------------------------- 225 | BOOL // TRUE: success, FALSE: failure 226 | WINAPI Rdtsc( 227 | PDWORD eax, // bit 0-31 228 | PDWORD edx // bit 32-63 229 | ); 230 | 231 | //----------------------------------------------------------------------------- 232 | // RdmsrTx 233 | //----------------------------------------------------------------------------- 234 | BOOL // TRUE: success, FALSE: failure 235 | WINAPI RdtscTx( 236 | PDWORD eax, // bit 0-31 237 | PDWORD edx, // bit 32-63 238 | DWORD_PTR threadAffinityMask 239 | ); 240 | 241 | //----------------------------------------------------------------------------- 242 | // RdmsrPx 243 | //----------------------------------------------------------------------------- 244 | BOOL // TRUE: success, FALSE: failure 245 | WINAPI RdtscPx( 246 | PDWORD eax, // bit 0-31 247 | PDWORD edx, // bit 32-63 248 | DWORD_PTR processAffinityMask 249 | ); 250 | 251 | //----------------------------------------------------------------------------- 252 | // Hlt 253 | //----------------------------------------------------------------------------- 254 | BOOL // TRUE: success, FALSE: failure 255 | WINAPI Hlt(); 256 | 257 | //----------------------------------------------------------------------------- 258 | // HltTx 259 | //----------------------------------------------------------------------------- 260 | BOOL // TRUE: success, FALSE: failure 261 | WINAPI HltTx( 262 | DWORD_PTR threadAffinityMask 263 | ); 264 | 265 | //----------------------------------------------------------------------------- 266 | // HltPx 267 | //----------------------------------------------------------------------------- 268 | BOOL // TRUE: success, FALSE: failure 269 | WINAPI HltTx( 270 | DWORD_PTR processAffinityMask 271 | ); 272 | 273 | /****************************************************************************** 274 | ** 275 | ** I/O 276 | ** 277 | ******************************************************************************/ 278 | 279 | //----------------------------------------------------------------------------- 280 | // ReadIoPortByte 281 | //----------------------------------------------------------------------------- 282 | BYTE // Read Value 283 | WINAPI ReadIoPortByte( 284 | WORD port // I/O port address 285 | ); 286 | 287 | //----------------------------------------------------------------------------- 288 | // ReadIoPortWord 289 | //----------------------------------------------------------------------------- 290 | WORD // Read Value 291 | WINAPI ReadIoPortWord( 292 | WORD port // I/O port address 293 | ); 294 | 295 | //----------------------------------------------------------------------------- 296 | // ReadIoPortDword 297 | //----------------------------------------------------------------------------- 298 | DWORD // Read Value 299 | WINAPI ReadIoPortDword( 300 | WORD port // I/O port address 301 | ); 302 | 303 | //----------------------------------------------------------------------------- 304 | // ReadIoPortByteEx 305 | //----------------------------------------------------------------------------- 306 | BOOL // TRUE: success, FALSE: failure 307 | WINAPI ReadIoPortByteEx( 308 | WORD port, // I/O port address 309 | PBYTE value // Read Value 310 | ); 311 | //----------------------------------------------------------------------------- 312 | // ReadIoPortWordEx 313 | //----------------------------------------------------------------------------- 314 | BOOL // TRUE: success, FALSE: failure 315 | WINAPI ReadIoPortWordEx( 316 | WORD port, // I/O port address 317 | PWORD value // Read Value 318 | ); 319 | //----------------------------------------------------------------------------- 320 | // ReadIoPortDwordEx 321 | //----------------------------------------------------------------------------- 322 | BOOL // TRUE: success, FALSE: failure 323 | WINAPI ReadIoPortDwordEx( 324 | WORD port, // I/O port address 325 | PDWORD value // Read Value 326 | ); 327 | 328 | //----------------------------------------------------------------------------- 329 | // WriteIoPortByte 330 | //----------------------------------------------------------------------------- 331 | VOID 332 | WINAPI WriteIoPortByte( 333 | WORD port, // I/O port address 334 | BYTE value // Write Value 335 | ); 336 | 337 | //----------------------------------------------------------------------------- 338 | // WriteIoPortDword 339 | //----------------------------------------------------------------------------- 340 | VOID 341 | WINAPI WriteIoPortDword( 342 | WORD port, // I/O port address 343 | DWORD value // Write Value 344 | ); 345 | 346 | 347 | //----------------------------------------------------------------------------- 348 | // WriteIoPortWord 349 | //----------------------------------------------------------------------------- 350 | VOID 351 | WINAPI WriteIoPortWord( 352 | WORD port, // I/O port address 353 | WORD value // Write Value 354 | ); 355 | 356 | //----------------------------------------------------------------------------- 357 | // WriteIoPortByteEx 358 | //----------------------------------------------------------------------------- 359 | BOOL // TRUE: success, FALSE: failure 360 | WINAPI WriteIoPortByteEx( 361 | WORD port, // I/O port address 362 | BYTE value // Write Value 363 | ); 364 | 365 | //----------------------------------------------------------------------------- 366 | // WriteIoPortWordEx 367 | //----------------------------------------------------------------------------- 368 | BOOL // TRUE: success, FALSE: failure 369 | WINAPI WriteIoPortWordEx( 370 | WORD port, // I/O port address 371 | WORD value // Write Value 372 | ); 373 | 374 | 375 | //----------------------------------------------------------------------------- 376 | // WriteIoPortDwordEx 377 | //----------------------------------------------------------------------------- 378 | BOOL // TRUE: success, FALSE: failure 379 | WINAPI WriteIoPortDwordEx( 380 | WORD port, // I/O port address 381 | DWORD value // Write Value 382 | ); 383 | 384 | /****************************************************************************** 385 | ** 386 | ** PCI 387 | ** 388 | ******************************************************************************/ 389 | // pciAddress 390 | // 0- 2: Function Number 391 | // 3- 7: Device Number 392 | // 8-15: PCI Bus Number 393 | // 16-31: Reserved 394 | // 0xFFFFFFFF : Error 395 | 396 | //----------------------------------------------------------------------------- 397 | // SetPciMaxBusNo 398 | //----------------------------------------------------------------------------- 399 | VOID 400 | WINAPI SetPciMaxBusIndex( 401 | BYTE max // Max PCI Bus to Scan 402 | ); 403 | 404 | //----------------------------------------------------------------------------- 405 | // ReadPciConfigByte 406 | //----------------------------------------------------------------------------- 407 | BYTE // Read Value 408 | WINAPI ReadPciConfigByte( 409 | DWORD pciAddress, // PCI Device Address 410 | BYTE regAddress // Configuration Address 0-255 411 | ); 412 | 413 | //----------------------------------------------------------------------------- 414 | // ReadPciConfigWord 415 | //----------------------------------------------------------------------------- 416 | WORD // Read Value 417 | WINAPI ReadPciConfigWord( 418 | DWORD pciAddress, // PCI Device Address 419 | BYTE regAddress // Configuration Address 0-255 420 | ); 421 | 422 | //----------------------------------------------------------------------------- 423 | // ReadPciConfigDword 424 | //----------------------------------------------------------------------------- 425 | DWORD // Read Value 426 | WINAPI ReadPciConfigDword( 427 | DWORD pciAddress, // PCI Device Address 428 | BYTE regAddress // Configuration Address 0-255 429 | ); 430 | 431 | //----------------------------------------------------------------------------- 432 | // ReadPciConfigByteEx 433 | //----------------------------------------------------------------------------- 434 | BOOL // TRUE: success, FALSE: failure 435 | WINAPI ReadPciConfigByteEx( 436 | DWORD pciAddress, // PCI Device Address 437 | DWORD regAddress, // Configuration Address 0-whatever 438 | PBYTE value // Read Value 439 | ); 440 | 441 | //----------------------------------------------------------------------------- 442 | // ReadPciConfigWordEx 443 | //----------------------------------------------------------------------------- 444 | BOOL // TRUE: success, FALSE: failure 445 | WINAPI ReadPciConfigWordEx( 446 | DWORD pciAddress, // PCI Device Address 447 | DWORD regAddress, // Configuration Address 0-whatever 448 | PWORD value // Read Value 449 | ); 450 | 451 | //----------------------------------------------------------------------------- 452 | // ReadPciConfigDwordEx 453 | //----------------------------------------------------------------------------- 454 | BOOL // TRUE: success, FALSE: failure 455 | WINAPI ReadPciConfigDwordEx( 456 | DWORD pciAddress, // PCI Device Address 457 | DWORD regAddress, // Configuration Address 0-whatever 458 | PDWORD value // Read Value 459 | ); 460 | 461 | //----------------------------------------------------------------------------- 462 | // WritePciConfigByte 463 | //----------------------------------------------------------------------------- 464 | VOID 465 | WINAPI WritePciConfigByte( 466 | DWORD pciAddress, // PCI Device Address 467 | BYTE regAddress, // Configuration Address 0-255 468 | BYTE value // Write Value 469 | ); 470 | 471 | //----------------------------------------------------------------------------- 472 | // WritePciConfigWord 473 | //----------------------------------------------------------------------------- 474 | VOID 475 | WINAPI WritePciConfigWord( 476 | DWORD pciAddress, // PCI Device Address 477 | BYTE regAddress, // Configuration Address 0-255 478 | WORD value // Write Value 479 | ); 480 | 481 | //----------------------------------------------------------------------------- 482 | // WritePciConfigDword 483 | //----------------------------------------------------------------------------- 484 | VOID 485 | WINAPI WritePciConfigDword( 486 | DWORD pciAddress, // PCI Device Address 487 | BYTE regAddress, // Configuration Address 0-255 488 | DWORD value // Write Value 489 | ); 490 | 491 | //----------------------------------------------------------------------------- 492 | // WritePciConfigByteEx 493 | //----------------------------------------------------------------------------- 494 | BOOL // TRUE: success, FALSE: failure 495 | WINAPI WritePciConfigByteEx( 496 | DWORD pciAddress, // PCI Device Address 497 | DWORD regAddress, // Configuration Address 0-whatever 498 | BYTE value // Write Value 499 | ); 500 | 501 | //----------------------------------------------------------------------------- 502 | // WritePciConfigWordEx 503 | //----------------------------------------------------------------------------- 504 | BOOL // TRUE: success, FALSE: failure 505 | WINAPI WritePciConfigWordEx( 506 | DWORD pciAddress, // PCI Device Address 507 | DWORD regAddress, // Configuration Address 0-whatever 508 | WORD value // Write Value 509 | ); 510 | 511 | //----------------------------------------------------------------------------- 512 | // WritePciConfigDwordEx 513 | //----------------------------------------------------------------------------- 514 | BOOL // TRUE: success, FALSE: failure 515 | WINAPI WritePciConfigDwordEx( 516 | DWORD pciAddress, // PCI Device Address 517 | DWORD regAddress, // Configuration Address 0-whatever 518 | DWORD value // Write Value 519 | ); 520 | 521 | //----------------------------------------------------------------------------- 522 | // FindPciDeviceById 523 | //----------------------------------------------------------------------------- 524 | DWORD // pciAddress, 0xFFFFFFFF: failure 525 | WINAPI FindPciDeviceById( 526 | WORD vendorId, // Vendor ID 527 | WORD deviceId, // Device ID 528 | BYTE index // Index 529 | ); 530 | 531 | //----------------------------------------------------------------------------- 532 | // FindPciDeviceByClass 533 | //----------------------------------------------------------------------------- 534 | DWORD // pciAddress, 0xFFFFFFFF: failure 535 | WINAPI FindPciDeviceByClass( 536 | BYTE baseClass, // Base Class 537 | BYTE subClass, // Sub Class 538 | BYTE programIf, // Program Interface 539 | BYTE index // Index 540 | ); 541 | 542 | /****************************************************************************** 543 | ** 544 | ** Memory (Special API) 545 | ** 546 | ******************************************************************************/ 547 | 548 | #ifdef _PHYSICAL_MEMORY_SUPPORT 549 | //----------------------------------------------------------------------------- 550 | // ReadDmiMemory 551 | //----------------------------------------------------------------------------- 552 | DWORD // Read size(byte), 0: failure 553 | WINAPI ReadDmiMemory( 554 | PBYTE buffer, // Buffer 555 | DWORD count, // Count 556 | DWORD unitSize // Unit Size (BYTE, WORD, DWORD) 557 | ); 558 | 559 | //----------------------------------------------------------------------------- 560 | // ReadPhysicalMemory 561 | //----------------------------------------------------------------------------- 562 | DWORD // Read size(byte), 0: failure 563 | WINAPI ReadPhysicalMemory( 564 | DWORD_PTR address, // Physical Memory Address 565 | PBYTE buffer, // Buffer 566 | DWORD count, // Count 567 | DWORD unitSize // Unit Size (BYTE, WORD, DWORD) 568 | ); 569 | 570 | //----------------------------------------------------------------------------- 571 | // WritePhysicalMemory 572 | //----------------------------------------------------------------------------- 573 | DWORD // Write size(byte), 0: failure 574 | WINAPI WritePhysicalMemory( 575 | DWORD_PTR address, // Physical Memory Address 576 | PBYTE buffer, // Buffer 577 | DWORD count, // Count 578 | DWORD unitSize // Unit Size (BYTE, WORD, DWORD) 579 | ); 580 | #endif -------------------------------------------------------------------------------- /smu-tool/inc/OlsDef.h: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------------------- 2 | // Author : hiyohiyo 3 | // Mail : hiyohiyo@crystalmark.info 4 | // Web : http://openlibsys.org/ 5 | // License : The modified BSD license 6 | // 7 | // Copyright 2007 OpenLibSys.org. All rights reserved. 8 | //----------------------------------------------------------------------------- 9 | 10 | #pragma once 11 | 12 | //----------------------------------------------------------------------------- 13 | // 14 | // DLL Status Code 15 | // 16 | //----------------------------------------------------------------------------- 17 | 18 | #define OLS_DLL_NO_ERROR 0 19 | #define OLS_DLL_UNSUPPORTED_PLATFORM 1 20 | #define OLS_DLL_DRIVER_NOT_LOADED 2 21 | #define OLS_DLL_DRIVER_NOT_FOUND 3 22 | #define OLS_DLL_DRIVER_UNLOADED 4 23 | #define OLS_DLL_DRIVER_NOT_LOADED_ON_NETWORK 5 24 | #define OLS_DLL_UNKNOWN_ERROR 9 25 | 26 | //----------------------------------------------------------------------------- 27 | // 28 | // Driver Type 29 | // 30 | //----------------------------------------------------------------------------- 31 | 32 | #define OLS_DRIVER_TYPE_UNKNOWN 0 33 | #define OLS_DRIVER_TYPE_WIN_9X 1 34 | #define OLS_DRIVER_TYPE_WIN_NT 2 35 | #define OLS_DRIVER_TYPE_WIN_NT4 3 // Obsolete 36 | #define OLS_DRIVER_TYPE_WIN_NT_X64 4 37 | #define OLS_DRIVER_TYPE_WIN_NT_IA64 5 // Reseved 38 | 39 | //----------------------------------------------------------------------------- 40 | // 41 | // PCI Error Code 42 | // 43 | //----------------------------------------------------------------------------- 44 | 45 | #define OLS_ERROR_PCI_BUS_NOT_EXIST (0xE0000001L) 46 | #define OLS_ERROR_PCI_NO_DEVICE (0xE0000002L) 47 | #define OLS_ERROR_PCI_WRITE_CONFIG (0xE0000003L) 48 | #define OLS_ERROR_PCI_READ_CONFIG (0xE0000004L) 49 | 50 | //----------------------------------------------------------------------------- 51 | // 52 | // Support Macros 53 | // 54 | //----------------------------------------------------------------------------- 55 | 56 | // Bus Number, Device Number and Function Number to PCI Device Address 57 | #define PciBusDevFunc(Bus, Dev, Func) ((Bus&0xFF)<<8) | ((Dev&0x1F)<<3) | (Func&7) 58 | // PCI Device Address to Bus Number 59 | #define PciGetBus(address) ((address>>8) & 0xFF) 60 | // PCI Device Address to Device Number 61 | #define PciGetDev(address) ((address>>3) & 0x1F) 62 | // PCI Device Address to Function Number 63 | #define PciGetFunc(address) (address&7) 64 | -------------------------------------------------------------------------------- /smu-tool/inc/argparse.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (C) 2012-2015 Yecheng Fu 3 | * All rights reserved. 4 | * 5 | * Use of this source code is governed by a MIT-style license that can be found 6 | * in the LICENSE file. 7 | */ 8 | #ifndef ARGPARSE_H 9 | #define ARGPARSE_H 10 | 11 | /* For c++ compatibility */ 12 | #ifdef __cplusplus 13 | extern "C" { 14 | #endif 15 | 16 | #include 17 | 18 | struct argparse; 19 | struct argparse_option; 20 | 21 | typedef int argparse_callback (struct argparse *self, 22 | const struct argparse_option *option); 23 | 24 | enum argparse_flag { 25 | ARGPARSE_STOP_AT_NON_OPTION = 1, 26 | }; 27 | 28 | enum argparse_option_type { 29 | /* special */ 30 | ARGPARSE_OPT_END, 31 | ARGPARSE_OPT_GROUP, 32 | /* options with no arguments */ 33 | ARGPARSE_OPT_BOOLEAN, 34 | ARGPARSE_OPT_BIT, 35 | /* options with arguments (optional or required) */ 36 | ARGPARSE_OPT_INTEGER, 37 | ARGPARSE_OPT_U32, 38 | ARGPARSE_OPT_FLOAT, 39 | ARGPARSE_OPT_STRING, 40 | }; 41 | 42 | enum argparse_option_flags { 43 | OPT_NONEG = 1, /* disable negation */ 44 | }; 45 | 46 | /** 47 | * argparse option 48 | * 49 | * `type`: 50 | * holds the type of the option, you must have an ARGPARSE_OPT_END last in your 51 | * array. 52 | * 53 | * `short_name`: 54 | * the character to use as a short option name, '\0' if none. 55 | * 56 | * `long_name`: 57 | * the long option name, without the leading dash, NULL if none. 58 | * 59 | * `value`: 60 | * stores pointer to the value to be filled. 61 | * 62 | * `help`: 63 | * the short help message associated to what the option does. 64 | * Must never be NULL (except for ARGPARSE_OPT_END). 65 | * 66 | * `callback`: 67 | * function is called when corresponding argument is parsed. 68 | * 69 | * `data`: 70 | * associated data. Callbacks can use it like they want. 71 | * 72 | * `flags`: 73 | * option flags. 74 | */ 75 | struct argparse_option { 76 | enum argparse_option_type type; 77 | const char short_name; 78 | const char *long_name; 79 | void *value; 80 | const char *help; 81 | argparse_callback *callback; 82 | intptr_t data; 83 | int flags; 84 | }; 85 | 86 | /** 87 | * argpparse 88 | */ 89 | struct argparse { 90 | // user supplied 91 | const struct argparse_option *options; 92 | const char *const *usages; 93 | int flags; 94 | const char *description; // a description after usage 95 | const char *epilog; // a description at the end 96 | // internal context 97 | int argc; 98 | const char **argv; 99 | const char **out; 100 | int cpidx; 101 | const char *optvalue; // current option value 102 | }; 103 | 104 | // built-in callbacks 105 | int argparse_help_cb(struct argparse *self, 106 | const struct argparse_option *option); 107 | 108 | // built-in option macros 109 | #define OPT_END() { ARGPARSE_OPT_END, 0, NULL, NULL, 0, NULL, 0, 0 } 110 | #define OPT_BOOLEAN(...) { ARGPARSE_OPT_BOOLEAN, __VA_ARGS__ } 111 | #define OPT_BIT(...) { ARGPARSE_OPT_BIT, __VA_ARGS__ } 112 | #define OPT_INTEGER(...) { ARGPARSE_OPT_INTEGER, __VA_ARGS__ } 113 | #define OPT_U32(...) { ARGPARSE_OPT_U32, __VA_ARGS__ } 114 | #define OPT_FLOAT(...) { ARGPARSE_OPT_FLOAT, __VA_ARGS__ } 115 | #define OPT_STRING(...) { ARGPARSE_OPT_STRING, __VA_ARGS__ } 116 | #define OPT_GROUP(h) { ARGPARSE_OPT_GROUP, 0, NULL, NULL, h, NULL, 0, 0 } 117 | #define OPT_HELP() OPT_BOOLEAN('h', "help", NULL, \ 118 | "show this help message and exit", \ 119 | argparse_help_cb, 0, OPT_NONEG) 120 | 121 | int argparse_init(struct argparse *self, struct argparse_option *options, 122 | const char *const *usages, int flags); 123 | void argparse_describe(struct argparse *self, const char *description, 124 | const char *epilog); 125 | int argparse_parse(struct argparse *self, int argc, const char **argv); 126 | void argparse_usage(struct argparse *self); 127 | 128 | #ifdef __cplusplus 129 | } 130 | #endif 131 | 132 | #endif 133 | -------------------------------------------------------------------------------- /smu-tool/inc/nb_smu_ops.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: LGPL */ 2 | /* Copyright (C) 2018-2019 Jiaxun Yang */ 3 | /* Ryzen NB SMU Service Request Opreations */ 4 | 5 | #ifndef NB_SMU_OPS_H 6 | #define NB_SMU_OPS_H 7 | 8 | #include 9 | #include 10 | #include 11 | #include 12 | 13 | typedef uint8_t u8; 14 | typedef uint16_t u16; 15 | typedef uint32_t u32; 16 | typedef uint8_t u8; 17 | typedef uint16_t u16; 18 | typedef uint64_t u64; 19 | 20 | #define DBG(...) 21 | 22 | #define AMD_VENDOR_ID 0x1022 23 | #define NB_DEVICE_ID 0x15d0 24 | 25 | #define NB_PCI_REG_ADDR_ADDR 0xB8 26 | #define NB_PCI_REG_DATA_ADDR 0xBC 27 | 28 | #define C2PMSG_ARGx_ADDR(y, x) (y + 4 * x) 29 | 30 | enum SMU_TYPE{ 31 | TYPE_MP1, 32 | TYPE_PSMU, 33 | TYPE_COUNT, 34 | }; 35 | 36 | #define MP1_C2PMSG_MESSAGE_ADDR 0x3B10528 37 | #define MP1_C2PMSG_RESPONSE_ADDR 0x3B10564 38 | #define MP1_C2PMSG_ARG_BASE 0x3B10998 39 | 40 | #define PSMU_C2PMSG_MESSAGE_ADDR 0x3B10a20 41 | #define PSMU_C2PMSG_RESPONSE_ADDR 0x3B10a80 42 | #define PSMU_C2PMSG_ARG_BASE 0x3B10a88 43 | 44 | #define REP_MSG_OK 0x1 45 | #define REP_MSG_Failed 0xFF 46 | #define REP_MSG_UnknownCmd 0xFE 47 | #define REP_MSG_CmdRejectedPrereq 0xFD 48 | #define REP_MSG_CmdRejectedBusy 0xFC 49 | 50 | /* 51 | * All the SMU have the same TestMessage as for now 52 | * Correct me if they don't 53 | */ 54 | #define SMU_TEST_MSG 0x1 55 | 56 | typedef struct { 57 | u32 arg0; 58 | u32 arg1; 59 | u32 arg2; 60 | u32 arg3; 61 | u32 arg4; 62 | u32 arg5; 63 | } smu_service_args_t; 64 | 65 | 66 | /* OS depdent part*/ 67 | #if defined _WIN32 68 | typedef uint32_t *nb_t; 69 | typedef bool *pci_obj_t; 70 | #else 71 | extern "C" 72 | { 73 | #include 74 | } 75 | typedef struct pci_dev *nb_t; 76 | typedef struct pci_access *pci_obj_t; 77 | #endif 78 | 79 | typedef struct { 80 | nb_t nb; 81 | u32 msg; 82 | u32 rep; 83 | u32 arg_base; 84 | } smu_t; 85 | 86 | 87 | pci_obj_t init_pci_obj(); 88 | 89 | void free_pci_obj(pci_obj_t obj); 90 | 91 | nb_t get_nb(pci_obj_t obj); 92 | 93 | void free_nb(nb_t nb); 94 | 95 | u32 smn_reg_read(nb_t nb, u32 addr); 96 | 97 | void smn_reg_write(nb_t nb, u32 addr, u32 data); 98 | 99 | 100 | smu_t *get_smu(nb_t nb, int smu_type); 101 | void free_smu(smu_t *smu); 102 | u32 smu_service_req(smu_t *smu ,u32 id ,smu_service_args_t *args); 103 | 104 | 105 | #endif -------------------------------------------------------------------------------- /smu-tool/libpci.cpp: -------------------------------------------------------------------------------- 1 | // SPDX-License-Identifier: LGPL 2 | /* Copyright (C) 2018-2019 Jiaxun Yang */ 3 | /* Access PCI Config Space - libpci */ 4 | 5 | #include "nb_smu_ops.h" 6 | 7 | pci_obj_t init_pci_obj(){ 8 | pci_obj_t obj; 9 | obj = pci_alloc(); 10 | pci_init(obj); 11 | return obj; 12 | } 13 | 14 | nb_t get_nb(pci_obj_t obj){ 15 | nb_t nb; 16 | nb = pci_get_dev(obj, 0, 0, 0, 0); 17 | pci_fill_info(nb, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_CLASS); 18 | return nb; 19 | } 20 | 21 | void free_nb(nb_t nb){ 22 | pci_free_dev(nb); 23 | } 24 | 25 | 26 | void free_pci_obj(pci_obj_t obj){ 27 | pci_cleanup(obj); 28 | } 29 | 30 | u32 smn_reg_read(nb_t nb, u32 addr) 31 | { 32 | pci_write_long(nb, NB_PCI_REG_ADDR_ADDR, (addr & (~0x3))); 33 | return pci_read_long(nb, NB_PCI_REG_DATA_ADDR); 34 | } 35 | 36 | void smn_reg_write(nb_t nb, u32 addr, u32 data) 37 | { 38 | pci_write_long(nb, NB_PCI_REG_ADDR_ADDR, addr); 39 | pci_write_long(nb, NB_PCI_REG_DATA_ADDR, data); 40 | } 41 | -------------------------------------------------------------------------------- /smu-tool/main.cpp: -------------------------------------------------------------------------------- 1 | // SPDX-License-Identifier: LGPL 2 | /* Copyright (C) 2018-2019 Jiaxun Yang */ 3 | /* Ryzen NB SMU Service Request Tool */ 4 | 5 | #include 6 | #include "nb_smu_ops.h" 7 | #include "argparse.h" 8 | 9 | 10 | static const char *const usage[] = { 11 | "smu-tool [options] [[--] args]", 12 | "smu-tool [options]", 13 | NULL, 14 | }; 15 | 16 | int main(int argc, const char **argv) 17 | { 18 | /* Input args */ 19 | uint32_t message = 0, iarg0 = 0, iarg1 = 0; 20 | uint32_t iarg2 = 0, iarg3 = 0, iarg4 = 0, iarg5 = 0; 21 | int mp1 = 0, psmu = 0; 22 | 23 | /* Objects */ 24 | pci_obj_t pci_obj; 25 | nb_t nb; 26 | smu_t *smu; 27 | smu_service_args_t *args; 28 | int err = 0; 29 | 30 | struct argparse_option options[] = { 31 | OPT_HELP(), 32 | OPT_GROUP("SMU Type"), 33 | OPT_BOOLEAN('m',"mp1", &mp1, "MP1 SMU"), 34 | OPT_BOOLEAN('p',"psmu", &psmu, "Pwr SMU"), 35 | OPT_GROUP("Arguments"), 36 | OPT_U32('n', "message", &message, "The reqeust message"), 37 | OPT_U32('a', "arg0", &iarg0, "The first argument"), 38 | OPT_U32('b', "arg1", &iarg1, "The second argument"), 39 | OPT_U32('c', "arg2", &iarg1, "The third argument"), 40 | OPT_U32('d', "arg3", &iarg1, "The forth argument"), 41 | OPT_U32('e', "arg4", &iarg1, "The fifth argument"), 42 | OPT_U32('f', "arg5", &iarg1, "The sixth argument"), 43 | OPT_END(), 44 | }; 45 | 46 | 47 | struct argparse argparse; 48 | argparse_init(&argparse, options, usage, 0); 49 | argparse_describe(&argparse, "\n Ryzen NB SMU Service Request tool.", "\nWARNING: Use at your own risk!\nBy Jiaxun Yang , Under LGPL."); 50 | argc = argparse_parse(&argparse, argc, argv); 51 | 52 | pci_obj = init_pci_obj(); 53 | if (!pci_obj){ 54 | printf("Unable to get PCI Obj\n"); 55 | return -1; 56 | } 57 | 58 | nb = get_nb(pci_obj); 59 | if (!nb){ 60 | printf("Unable to get NB Obj\n"); 61 | err = -1; 62 | goto out_free_pci_obj; 63 | } 64 | 65 | if (mp1){ 66 | smu = get_smu(nb, TYPE_MP1); 67 | } else if (psmu){ 68 | smu = get_smu(nb, TYPE_PSMU); 69 | } else { 70 | smu = get_smu(nb, TYPE_MP1); 71 | } 72 | 73 | if(!smu){ 74 | printf("Unable to get SMU\n"); 75 | err = -1; 76 | goto out_free_nb; 77 | } 78 | 79 | args = (smu_service_args_t *)malloc(sizeof(*args)); 80 | memset(args, 0, sizeof(*args)); 81 | 82 | args->arg0 = iarg0; 83 | args->arg1 = iarg1; 84 | args->arg2 = iarg2; 85 | args->arg3 = iarg3; 86 | args->arg4 = iarg4; 87 | args->arg5 = iarg5; 88 | 89 | switch(smu_service_req(smu, message, args)){ 90 | case REP_MSG_OK: 91 | printf("Service Request OK\n"); 92 | break; 93 | case REP_MSG_CmdRejectedBusy: 94 | printf("Command Rejected - Busy\n"); 95 | err = -1; 96 | break; 97 | case REP_MSG_CmdRejectedPrereq: 98 | printf("Command Rejected - Have Pre Req\n"); 99 | err = -1; 100 | break; 101 | case REP_MSG_Failed: 102 | printf("Faild to compelet service request\n"); 103 | err = -1; 104 | break; 105 | case REP_MSG_UnknownCmd: 106 | printf("Unknown message\n"); 107 | err = -1; 108 | break; 109 | default: 110 | printf("Unknown Error\n"); 111 | err = -1; 112 | } 113 | 114 | if(!err){ 115 | printf("Result arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n", \ 116 | args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5); 117 | } 118 | 119 | free(args); 120 | free_smu(smu); 121 | out_free_nb: 122 | free_nb(nb); 123 | out_free_pci_obj: 124 | free_pci_obj(pci_obj); 125 | return err; 126 | } 127 | -------------------------------------------------------------------------------- /smu-tool/nb_smu_ops.cpp: -------------------------------------------------------------------------------- 1 | // SPDX-License-Identifier: LGPL 2 | /* Copyright (C) 2018-2019 Jiaxun Yang */ 3 | /* Ryzen NB SMU Service Request Opreations */ 4 | 5 | #include "nb_smu_ops.h" 6 | 7 | u32 smu_service_req(smu_t *smu ,u32 id ,smu_service_args_t *args) 8 | { 9 | u32 response = 0x0; 10 | DBG("SMU_SERVICE REQ_ID:0x%x\n", id); 11 | DBG("SMU_SERVICE REQ: arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n", \ 12 | args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5); 13 | 14 | /* Clear the response */ 15 | smn_reg_write(smu->nb, smu->rep, 0x0); 16 | /* Pass arguments */ 17 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 0), args->arg0); 18 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 1), args->arg1); 19 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 2), args->arg2); 20 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 3), args->arg3); 21 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 4), args->arg4); 22 | smn_reg_write(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 5), args->arg5); 23 | /* Send message ID */ 24 | smn_reg_write(smu->nb, smu->msg, id); 25 | /* Wait until reponse changed */ 26 | while(response == 0x0) { 27 | response = smn_reg_read(smu->nb, smu->rep); 28 | } 29 | /* Read back arguments */ 30 | args->arg0 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 0)); 31 | args->arg1 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 1)); 32 | args->arg2 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 2)); 33 | args->arg3 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 3)); 34 | args->arg4 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 4)); 35 | args->arg5 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 5)); 36 | 37 | DBG("SMU_SERVICE REP: REP: 0x%x, arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n", \ 38 | response, args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5); 39 | 40 | return response; 41 | } 42 | 43 | smu_t *get_smu(nb_t nb, int smu_type) { 44 | smu_t *smu; 45 | uint32_t rep; /* REP of test message */ 46 | smu_service_args_t arg = {0, 0, 0, 0, 0, 0}; /* Test message shuld have no arguments */ 47 | 48 | smu = (smu_t *)malloc((sizeof(smu_t))); 49 | smu->nb = nb; 50 | /* Fill SMU information */ 51 | switch(smu_type){ 52 | case TYPE_MP1: 53 | smu->msg = MP1_C2PMSG_MESSAGE_ADDR; 54 | smu->rep = MP1_C2PMSG_RESPONSE_ADDR; 55 | smu->arg_base = MP1_C2PMSG_ARG_BASE; 56 | break; 57 | case TYPE_PSMU: 58 | smu->msg = PSMU_C2PMSG_MESSAGE_ADDR; 59 | smu->rep = PSMU_C2PMSG_RESPONSE_ADDR; 60 | smu->arg_base = PSMU_C2PMSG_ARG_BASE; 61 | break; 62 | default: 63 | DBG("Failed to get SMU, unknown SMU_TYPE: %s\n", smu_type); 64 | goto err; 65 | break; 66 | } 67 | /* Try to send a test message*/ 68 | rep = smu_service_req(smu, SMU_TEST_MSG, &arg); 69 | if(rep == REP_MSG_OK){ 70 | return smu; 71 | } else { 72 | DBG("Faild to get SMU: %s, test message REP: %x\n", smu_type, rep); 73 | goto err; 74 | } 75 | err: 76 | free_smu(smu); 77 | return NULL; 78 | } 79 | 80 | void free_smu(smu_t *smu) { 81 | free((void *)smu); 82 | } -------------------------------------------------------------------------------- /smu-tool/prebuilt/WinRing0x64.sys: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/FlyGoat/ryzen_nb_smu/88fc506ab5775ed736438d094bb688e024185284/smu-tool/prebuilt/WinRing0x64.sys -------------------------------------------------------------------------------- /smu-tool/winring0.cpp: -------------------------------------------------------------------------------- 1 | // SPDX-License-Identifier: LGPL 2 | /* Copyright (C) 2018-2019 Jiaxun Yang */ 3 | /* Access PCI Config Space - winring0 */ 4 | 5 | #include "nb_smu_ops.h" 6 | #include "Windows.h" 7 | #include "OlsApi.h" 8 | #include "OlsDef.h" 9 | 10 | 11 | bool nb_pci_obj = true; 12 | uint32_t nb_pci_address = 0x0; 13 | 14 | pci_obj_t init_pci_obj(){ 15 | InitializeOls(); 16 | if(GetDllStatus() == 0) 17 | return &nb_pci_obj; 18 | printf("WinRing0 Err: 0x%x",GetDllStatus()); 19 | return NULL; 20 | } 21 | 22 | nb_t get_nb(pci_obj_t obj){ 23 | return &nb_pci_address; 24 | } 25 | 26 | void free_nb(nb_t){ 27 | return; 28 | } 29 | 30 | void free_pci_obj(pci_obj_t obj){ 31 | DeinitializeOls(); 32 | } 33 | 34 | u32 smn_reg_read(nb_t nb, u32 addr) 35 | { 36 | WritePciConfigDword(*nb, NB_PCI_REG_ADDR_ADDR, (addr & (~0x3))); 37 | return ReadPciConfigDword(*nb, NB_PCI_REG_DATA_ADDR); 38 | } 39 | 40 | void smn_reg_write(nb_t nb, u32 addr, u32 data) 41 | { 42 | WritePciConfigDword(*nb, NB_PCI_REG_ADDR_ADDR, addr); 43 | WritePciConfigDword(*nb, NB_PCI_REG_DATA_ADDR, data); 44 | } 45 | --------------------------------------------------------------------------------