├── README └── mt76x8_gpio.c /README: -------------------------------------------------------------------------------- 1 | 2 | 3 | This is a C library for Widora MT7628 Board. It provides access to GPIO and other IO functions on the MTK MT7628/MT7688 chip, allowing access to the GPIO pins so you can control and interface with various external devices. 4 | 5 | It provides functions for reading digital inputs and setting digital outputs, using SPI and I2C, and for accessing the system timers. Pin event detection is supported by polling (interrupts are not supported). 6 | 7 | It is C++ compatible, and installs as a header file and non-shared library on any Linux-based distro. 8 | 9 | 10 | Several example programs are provided. If you have any question please mailto forgotfun@qq.com. 11 | -------------------------------------------------------------------------------- /mt76x8_gpio.c: -------------------------------------------------------------------------------- 1 | /* forgotfun.org forgotfun(佐须之男) */ 2 | 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | 13 | 14 | #define MMAP_PATH "/dev/mem" 15 | 16 | 17 | #define RALINK_GPIO_DIR_IN 0 18 | #define RALINK_GPIO_DIR_OUT 1 19 | 20 | #define RALINK_REG_PIOINT 0x690 21 | #define RALINK_REG_PIOEDGE 0x6A0 22 | #define RALINK_REG_PIORENA 0x650 23 | #define RALINK_REG_PIOFENA 0x660 24 | #define RALINK_REG_PIODATA 0x620 25 | #define RALINK_REG_PIODIR 0x600 26 | #define RALINK_REG_PIOSET 0x630 27 | #define RALINK_REG_PIORESET 0x640 28 | 29 | #define RALINK_REG_PIO6332INT 0x694 30 | #define RALINK_REG_PIO6332EDGE 0x6A4 31 | #define RALINK_REG_PIO6332RENA 0x654 32 | #define RALINK_REG_PIO6332FENA 0x664 33 | #define RALINK_REG_PIO6332DATA 0x624 34 | #define RALINK_REG_PIO6332DIR 0x604 35 | #define RALINK_REG_PIO6332SET 0x634 36 | #define RALINK_REG_PIO6332RESET 0x644 37 | 38 | #define RALINK_REG_PIO9564INT 0x698 39 | #define RALINK_REG_PIO9564EDGE 0x6A8 40 | #define RALINK_REG_PIO9564RENA 0x658 41 | #define RALINK_REG_PIO9564FENA 0x668 42 | #define RALINK_REG_PIO9564DATA 0x628 43 | #define RALINK_REG_PIO9564DIR 0x608 44 | #define RALINK_REG_PIO9564SET 0x638 45 | #define RALINK_REG_PIO9564RESET 0x648 46 | 47 | 48 | static uint8_t* gpio_mmap_reg = NULL; 49 | static int gpio_mmap_fd = 0; 50 | 51 | static int gpio_mmap(void) 52 | { 53 | if ((gpio_mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) { 54 | fprintf(stderr, "unable to open mmap file"); 55 | return -1; 56 | } 57 | 58 | gpio_mmap_reg = (uint8_t*) mmap(NULL, 1024, PROT_READ | PROT_WRITE, 59 | MAP_FILE | MAP_SHARED, gpio_mmap_fd, 0x10000000); 60 | if (gpio_mmap_reg == MAP_FAILED) { 61 | perror("foo"); 62 | fprintf(stderr, "failed to mmap"); 63 | gpio_mmap_reg = NULL; 64 | close(gpio_mmap_fd); 65 | return -1; 66 | } 67 | 68 | return 0; 69 | } 70 | 71 | int mt76x8_gpio_get_pin(int pin) 72 | { 73 | uint32_t tmp = 0; 74 | 75 | /* MT7621, MT7628 */ 76 | if (pin <= 31) { 77 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIODATA); 78 | tmp = (tmp >> pin) & 1u; 79 | } else if (pin <= 63) { 80 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO6332DATA); 81 | tmp = (tmp >> (pin-32)) & 1u; 82 | } else if (pin <= 95) { 83 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO9564DATA); 84 | tmp = (tmp >> (pin-64)) & 1u; 85 | tmp = (tmp >> (pin-24)) & 1u; 86 | } 87 | return tmp; 88 | 89 | } 90 | 91 | void mt76x8_gpio_set_pin_direction(int pin, int is_output) 92 | { 93 | uint32_t tmp; 94 | 95 | /* MT7621, MT7628 */ 96 | if (pin <= 31) { 97 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIODIR); 98 | if (is_output) 99 | tmp |= (1u << pin); 100 | else 101 | tmp &= ~(1u << pin); 102 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIODIR) = tmp; 103 | } else if (pin <= 63) { 104 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO6332DIR); 105 | if (is_output) 106 | tmp |= (1u << (pin-32)); 107 | else 108 | tmp &= ~(1u << (pin-32)); 109 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO6332DIR) = tmp; 110 | } else if (pin <= 95) { 111 | tmp = *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO9564DIR); 112 | if (is_output) 113 | tmp |= (1u << (pin-64)); 114 | else 115 | tmp &= ~(1u << (pin-64)); 116 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO9564DIR) = tmp; 117 | } 118 | } 119 | 120 | void mt76x8_gpio_set_pin_value(int pin, int value) 121 | { 122 | uint32_t tmp; 123 | 124 | /* MT7621, MT7628 */ 125 | if (pin <= 31) { 126 | tmp = (1u << pin); 127 | if (value) 128 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIOSET) = tmp; 129 | else 130 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIORESET) = tmp; 131 | } else if (pin <= 63) { 132 | tmp = (1u << (pin-32)); 133 | if (value) 134 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO6332SET) = tmp; 135 | else 136 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO6332RESET) = tmp; 137 | } else if (pin <= 95) { 138 | tmp = (1u << (pin-64)); 139 | if (value) 140 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO9564SET) = tmp; 141 | else 142 | *(volatile uint32_t *)(gpio_mmap_reg + RALINK_REG_PIO9564RESET) = tmp; 143 | } 144 | } 145 | 146 | int main(int argc, char **argv) 147 | { 148 | int ret = -1; 149 | 150 | if (gpio_mmap()) 151 | return -1; 152 | 153 | printf("get pin 39 input %d\n", mt76x8_gpio_get_pin(39)); 154 | printf("get pin 40 input %d\n", mt76x8_gpio_get_pin(40)); 155 | printf("get pin 41 input %d\n", mt76x8_gpio_get_pin(41)); 156 | printf("get pin 42 input %d\n", mt76x8_gpio_get_pin(42)); 157 | 158 | 159 | printf("set pin 39 output 1\n"); 160 | mt76x8_gpio_set_pin_direction(39, 1); 161 | mt76x8_gpio_set_pin_value(39, 1); 162 | printf("set pin 40 output 0\n"); 163 | mt76x8_gpio_set_pin_direction(40, 1); 164 | mt76x8_gpio_set_pin_value(40, 0); 165 | printf("set pin 41 output 1\n"); 166 | mt76x8_gpio_set_pin_direction(41, 1); 167 | mt76x8_gpio_set_pin_value(41, 1); 168 | printf("set pin 42 output 0\n"); 169 | mt76x8_gpio_set_pin_direction(42, 1); 170 | mt76x8_gpio_set_pin_value(42, 0); 171 | 172 | while (1) 173 | { 174 | mt76x8_gpio_set_pin_value(42, 0); 175 | mt76x8_gpio_set_pin_value(42, 1); 176 | } 177 | close(gpio_mmap_fd); 178 | 179 | return ret; 180 | } 181 | 182 | 183 | --------------------------------------------------------------------------------