└── STM32
├── D3项目Bootloader需求规范V0.1_20151225 .pdf
├── Libraries
├── CMSIS
│ ├── CMSIS END USER LICENCE AGREEMENT.pdf
│ ├── Device
│ │ └── ST
│ │ │ ├── STM32F10x
│ │ │ ├── Include
│ │ │ │ ├── stm32f10x.h
│ │ │ │ └── system_stm32f10x.h
│ │ │ ├── Release_Notes.html
│ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ │ ├── TASKING
│ │ │ │ └── cstart_thumb2.asm
│ │ │ │ ├── TrueSTUDIO
│ │ │ │ ├── startup_stm32f10x_cl.s
│ │ │ │ ├── startup_stm32f10x_hd.s
│ │ │ │ ├── startup_stm32f10x_hd_vl.s
│ │ │ │ ├── startup_stm32f10x_ld.s
│ │ │ │ ├── startup_stm32f10x_ld_vl.s
│ │ │ │ ├── startup_stm32f10x_md.s
│ │ │ │ ├── startup_stm32f10x_md_vl.s
│ │ │ │ └── startup_stm32f10x_xl.s
│ │ │ │ ├── arm
│ │ │ │ ├── startup_stm32f10x_cl.s
│ │ │ │ ├── startup_stm32f10x_hd.s
│ │ │ │ ├── startup_stm32f10x_hd_vl.s
│ │ │ │ ├── startup_stm32f10x_ld.s
│ │ │ │ ├── startup_stm32f10x_ld_vl.s
│ │ │ │ ├── startup_stm32f10x_md.s
│ │ │ │ ├── startup_stm32f10x_md_vl.s
│ │ │ │ └── startup_stm32f10x_xl.s
│ │ │ │ ├── gcc_ride7
│ │ │ │ ├── startup_stm32f10x_cl.s
│ │ │ │ ├── startup_stm32f10x_hd.s
│ │ │ │ ├── startup_stm32f10x_hd_vl.s
│ │ │ │ ├── startup_stm32f10x_ld.s
│ │ │ │ ├── startup_stm32f10x_ld_vl.s
│ │ │ │ ├── startup_stm32f10x_md.s
│ │ │ │ ├── startup_stm32f10x_md_vl.s
│ │ │ │ └── startup_stm32f10x_xl.s
│ │ │ │ ├── iar
│ │ │ │ ├── startup_stm32f10x_cl.s
│ │ │ │ ├── startup_stm32f10x_hd.s
│ │ │ │ ├── startup_stm32f10x_hd_vl.s
│ │ │ │ ├── startup_stm32f10x_ld.s
│ │ │ │ ├── startup_stm32f10x_ld_vl.s
│ │ │ │ ├── startup_stm32f10x_md.s
│ │ │ │ ├── startup_stm32f10x_md_vl.s
│ │ │ │ └── startup_stm32f10x_xl.s
│ │ │ │ └── system_stm32f10x.c
│ │ │ ├── STM32F2xx
│ │ │ ├── Include
│ │ │ │ ├── stm32f2xx.h
│ │ │ │ └── system_stm32f2xx.h
│ │ │ ├── Release_Notes.html
│ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ │ ├── TASKING
│ │ │ │ └── cstart_thumb2.asm
│ │ │ │ ├── TrueSTUDIO
│ │ │ │ └── startup_stm32f2xx.s
│ │ │ │ ├── arm
│ │ │ │ └── startup_stm32f2xx.s
│ │ │ │ ├── gcc_ride7
│ │ │ │ └── startup_stm32f2xx.s
│ │ │ │ ├── iar
│ │ │ │ └── startup_stm32f2xx.s
│ │ │ │ └── system_stm32f2xx.c
│ │ │ └── STM32F4xx
│ │ │ ├── Include
│ │ │ ├── stm32f4xx.h
│ │ │ └── system_stm32f4xx.h
│ │ │ ├── Release_Notes.html
│ │ │ └── Source
│ │ │ └── Templates
│ │ │ ├── TASKING
│ │ │ └── cstart_thumb2.asm
│ │ │ ├── TrueSTUDIO
│ │ │ └── startup_stm32f4xx.s
│ │ │ ├── arm
│ │ │ └── startup_stm32f4xx.s
│ │ │ ├── gcc_ride7
│ │ │ └── startup_stm32f4xx.s
│ │ │ ├── iar
│ │ │ └── startup_stm32f4xx.s
│ │ │ └── system_stm32f4xx.c
│ ├── Documentation
│ │ ├── CMSIS-SVD_Schema_1_0.xsd
│ │ ├── CMSIS_CM4_SIMD.htm
│ │ ├── CMSIS_Core.htm
│ │ ├── CMSIS_DebugSupport.htm
│ │ ├── CMSIS_History.htm
│ │ ├── CMSIS_Logo_Final.jpg
│ │ └── CMSIS_System_View_Description.htm
│ ├── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_math.h
│ │ ├── core_cm0.h
│ │ ├── core_cm3.h
│ │ ├── core_cm4.h
│ │ ├── core_cm4_simd.h
│ │ ├── core_cmFunc.h
│ │ └── core_cmInstr.h
│ ├── README.txt
│ └── index.htm
├── STM32F10x_StdPeriph_Driver
│ ├── Release_Notes.html
│ ├── inc
│ │ ├── misc.h
│ │ ├── stm32f10x_adc.h
│ │ ├── stm32f10x_bkp.h
│ │ ├── stm32f10x_can.h
│ │ ├── stm32f10x_cec.h
│ │ ├── stm32f10x_crc.h
│ │ ├── stm32f10x_dac.h
│ │ ├── stm32f10x_dbgmcu.h
│ │ ├── stm32f10x_dma.h
│ │ ├── stm32f10x_exti.h
│ │ ├── stm32f10x_flash.h
│ │ ├── stm32f10x_fsmc.h
│ │ ├── stm32f10x_gpio.h
│ │ ├── stm32f10x_i2c.h
│ │ ├── stm32f10x_iwdg.h
│ │ ├── stm32f10x_pwr.h
│ │ ├── stm32f10x_rcc.h
│ │ ├── stm32f10x_rtc.h
│ │ ├── stm32f10x_sdio.h
│ │ ├── stm32f10x_spi.h
│ │ ├── stm32f10x_tim.h
│ │ ├── stm32f10x_usart.h
│ │ └── stm32f10x_wwdg.h
│ └── src
│ │ ├── misc.c
│ │ ├── stm32f10x_adc.c
│ │ ├── stm32f10x_bkp.c
│ │ ├── stm32f10x_can.c
│ │ ├── stm32f10x_cec.c
│ │ ├── stm32f10x_crc.c
│ │ ├── stm32f10x_dac.c
│ │ ├── stm32f10x_dbgmcu.c
│ │ ├── stm32f10x_dma.c
│ │ ├── stm32f10x_exti.c
│ │ ├── stm32f10x_flash.c
│ │ ├── stm32f10x_fsmc.c
│ │ ├── stm32f10x_gpio.c
│ │ ├── stm32f10x_i2c.c
│ │ ├── stm32f10x_iwdg.c
│ │ ├── stm32f10x_pwr.c
│ │ ├── stm32f10x_rcc.c
│ │ ├── stm32f10x_rtc.c
│ │ ├── stm32f10x_sdio.c
│ │ ├── stm32f10x_spi.c
│ │ ├── stm32f10x_tim.c
│ │ ├── stm32f10x_usart.c
│ │ └── stm32f10x_wwdg.c
├── STM32F2xx_StdPeriph_Driver
│ ├── Release_Notes.html
│ ├── inc
│ │ ├── misc.h
│ │ ├── stm32f2xx_adc.h
│ │ ├── stm32f2xx_can.h
│ │ ├── stm32f2xx_crc.h
│ │ ├── stm32f2xx_cryp.h
│ │ ├── stm32f2xx_dac.h
│ │ ├── stm32f2xx_dbgmcu.h
│ │ ├── stm32f2xx_dcmi.h
│ │ ├── stm32f2xx_dma.h
│ │ ├── stm32f2xx_exti.h
│ │ ├── stm32f2xx_flash.h
│ │ ├── stm32f2xx_fsmc.h
│ │ ├── stm32f2xx_gpio.h
│ │ ├── stm32f2xx_hash.h
│ │ ├── stm32f2xx_i2c.h
│ │ ├── stm32f2xx_iwdg.h
│ │ ├── stm32f2xx_pwr.h
│ │ ├── stm32f2xx_rcc.h
│ │ ├── stm32f2xx_rng.h
│ │ ├── stm32f2xx_rtc.h
│ │ ├── stm32f2xx_sdio.h
│ │ ├── stm32f2xx_spi.h
│ │ ├── stm32f2xx_syscfg.h
│ │ ├── stm32f2xx_tim.h
│ │ ├── stm32f2xx_usart.h
│ │ └── stm32f2xx_wwdg.h
│ └── src
│ │ ├── misc.c
│ │ ├── stm32f2xx_adc.c
│ │ ├── stm32f2xx_can.c
│ │ ├── stm32f2xx_crc.c
│ │ ├── stm32f2xx_cryp.c
│ │ ├── stm32f2xx_cryp_aes.c
│ │ ├── stm32f2xx_cryp_des.c
│ │ ├── stm32f2xx_cryp_tdes.c
│ │ ├── stm32f2xx_dac.c
│ │ ├── stm32f2xx_dbgmcu.c
│ │ ├── stm32f2xx_dcmi.c
│ │ ├── stm32f2xx_dma.c
│ │ ├── stm32f2xx_exti.c
│ │ ├── stm32f2xx_flash.c
│ │ ├── stm32f2xx_fsmc.c
│ │ ├── stm32f2xx_gpio.c
│ │ ├── stm32f2xx_hash.c
│ │ ├── stm32f2xx_hash_md5.c
│ │ ├── stm32f2xx_hash_sha1.c
│ │ ├── stm32f2xx_i2c.c
│ │ ├── stm32f2xx_iwdg.c
│ │ ├── stm32f2xx_pwr.c
│ │ ├── stm32f2xx_rcc.c
│ │ ├── stm32f2xx_rng.c
│ │ ├── stm32f2xx_rtc.c
│ │ ├── stm32f2xx_sdio.c
│ │ ├── stm32f2xx_spi.c
│ │ ├── stm32f2xx_syscfg.c
│ │ ├── stm32f2xx_tim.c
│ │ ├── stm32f2xx_usart.c
│ │ └── stm32f2xx_wwdg.c
├── STM32F4xx_StdPeriph_Driver
│ ├── Release_Notes.html
│ ├── inc
│ │ ├── misc.h
│ │ ├── stm32f4xx_adc.h
│ │ ├── stm32f4xx_can.h
│ │ ├── stm32f4xx_crc.h
│ │ ├── stm32f4xx_cryp.h
│ │ ├── stm32f4xx_dac.h
│ │ ├── stm32f4xx_dbgmcu.h
│ │ ├── stm32f4xx_dcmi.h
│ │ ├── stm32f4xx_dma.h
│ │ ├── stm32f4xx_exti.h
│ │ ├── stm32f4xx_flash.h
│ │ ├── stm32f4xx_fsmc.h
│ │ ├── stm32f4xx_gpio.h
│ │ ├── stm32f4xx_hash.h
│ │ ├── stm32f4xx_i2c.h
│ │ ├── stm32f4xx_iwdg.h
│ │ ├── stm32f4xx_pwr.h
│ │ ├── stm32f4xx_rcc.h
│ │ ├── stm32f4xx_rng.h
│ │ ├── stm32f4xx_rtc.h
│ │ ├── stm32f4xx_sdio.h
│ │ ├── stm32f4xx_spi.h
│ │ ├── stm32f4xx_syscfg.h
│ │ ├── stm32f4xx_tim.h
│ │ ├── stm32f4xx_usart.h
│ │ └── stm32f4xx_wwdg.h
│ └── src
│ │ ├── misc.c
│ │ ├── stm32f4xx_adc.c
│ │ ├── stm32f4xx_can.c
│ │ ├── stm32f4xx_crc.c
│ │ ├── stm32f4xx_cryp.c
│ │ ├── stm32f4xx_cryp_aes.c
│ │ ├── stm32f4xx_cryp_des.c
│ │ ├── stm32f4xx_cryp_tdes.c
│ │ ├── stm32f4xx_dac.c
│ │ ├── stm32f4xx_dbgmcu.c
│ │ ├── stm32f4xx_dcmi.c
│ │ ├── stm32f4xx_dma.c
│ │ ├── stm32f4xx_exti.c
│ │ ├── stm32f4xx_flash.c
│ │ ├── stm32f4xx_fsmc.c
│ │ ├── stm32f4xx_gpio.c
│ │ ├── stm32f4xx_hash.c
│ │ ├── stm32f4xx_hash_md5.c
│ │ ├── stm32f4xx_hash_sha1.c
│ │ ├── stm32f4xx_i2c.c
│ │ ├── stm32f4xx_iwdg.c
│ │ ├── stm32f4xx_pwr.c
│ │ ├── stm32f4xx_rcc.c
│ │ ├── stm32f4xx_rng.c
│ │ ├── stm32f4xx_rtc.c
│ │ ├── stm32f4xx_sdio.c
│ │ ├── stm32f4xx_spi.c
│ │ ├── stm32f4xx_syscfg.c
│ │ ├── stm32f4xx_tim.c
│ │ ├── stm32f4xx_usart.c
│ │ └── stm32f4xx_wwdg.c
├── STM32_ETH_Driver
│ ├── inc
│ │ └── stm32_eth.h
│ └── src
│ │ └── stm32_eth.c
├── STM32_USB-FS-Device_Driver
│ ├── Release_Notes.html
│ ├── desktop.ini
│ ├── inc
│ │ ├── desktop.ini
│ │ ├── usb_core.h
│ │ ├── usb_def.h
│ │ ├── usb_init.h
│ │ ├── usb_int.h
│ │ ├── usb_lib.h
│ │ ├── usb_mem.h
│ │ ├── usb_regs.h
│ │ ├── usb_sil.h
│ │ └── usb_type.h
│ └── src
│ │ ├── usb_core.c
│ │ ├── usb_init.c
│ │ ├── usb_int.c
│ │ ├── usb_mem.c
│ │ ├── usb_regs.c
│ │ └── usb_sil.c
├── STM32_USB_Device_Library
│ ├── Class
│ │ ├── audio
│ │ │ ├── inc
│ │ │ │ ├── usbd_audio_core.h
│ │ │ │ └── usbd_audio_out_if.h
│ │ │ └── src
│ │ │ │ ├── usbd_audio_core.c
│ │ │ │ └── usbd_audio_out_if.c
│ │ ├── cdc
│ │ │ ├── inc
│ │ │ │ ├── usbd_cdc_core.h
│ │ │ │ └── usbd_cdc_if_template.h
│ │ │ └── src
│ │ │ │ ├── usbd_cdc_core.c
│ │ │ │ └── usbd_cdc_if_template.c
│ │ ├── dfu
│ │ │ ├── inc
│ │ │ │ ├── usbd_dfu_core.h
│ │ │ │ ├── usbd_dfu_mal.h
│ │ │ │ ├── usbd_flash_if.h
│ │ │ │ ├── usbd_mem_if_template.h
│ │ │ │ └── usbd_otp_if.h
│ │ │ └── src
│ │ │ │ ├── usbd_dfu_core.c
│ │ │ │ ├── usbd_dfu_mal.c
│ │ │ │ ├── usbd_flash_if.c
│ │ │ │ ├── usbd_mem_if_template.c
│ │ │ │ └── usbd_otp_if.c
│ │ ├── hid
│ │ │ ├── inc
│ │ │ │ └── usbd_hid_core.h
│ │ │ └── src
│ │ │ │ └── usbd_hid_core.c
│ │ └── msc
│ │ │ ├── inc
│ │ │ ├── usbd_msc_bot.h
│ │ │ ├── usbd_msc_core.h
│ │ │ ├── usbd_msc_data.h
│ │ │ ├── usbd_msc_mem.h
│ │ │ └── usbd_msc_scsi.h
│ │ │ └── src
│ │ │ ├── usbd_msc_bot.c
│ │ │ ├── usbd_msc_core.c
│ │ │ ├── usbd_msc_data.c
│ │ │ ├── usbd_msc_scsi.c
│ │ │ └── usbd_storage_template.c
│ ├── Core
│ │ ├── inc
│ │ │ ├── usbd_conf_template.h
│ │ │ ├── usbd_core.h
│ │ │ ├── usbd_def.h
│ │ │ ├── usbd_ioreq.h
│ │ │ ├── usbd_req.h
│ │ │ └── usbd_usr.h
│ │ └── src
│ │ │ ├── usbd_core.c
│ │ │ ├── usbd_ioreq.c
│ │ │ └── usbd_req.c
│ └── Release_Notes.html
├── STM32_USB_HOST_Library
│ ├── Class
│ │ ├── HID
│ │ │ ├── inc
│ │ │ │ ├── usbh_hid_core.h
│ │ │ │ ├── usbh_hid_keybd.h
│ │ │ │ └── usbh_hid_mouse.h
│ │ │ └── src
│ │ │ │ ├── usbh_hid_core.c
│ │ │ │ ├── usbh_hid_keybd.c
│ │ │ │ └── usbh_hid_mouse.c
│ │ └── MSC
│ │ │ ├── inc
│ │ │ ├── usbh_msc_bot.h
│ │ │ ├── usbh_msc_core.h
│ │ │ └── usbh_msc_scsi.h
│ │ │ └── src
│ │ │ ├── usbh_msc_bot.c
│ │ │ ├── usbh_msc_core.c
│ │ │ ├── usbh_msc_fatfs.c
│ │ │ └── usbh_msc_scsi.c
│ ├── Core
│ │ ├── inc
│ │ │ ├── usbh_conf_template.h
│ │ │ ├── usbh_core.h
│ │ │ ├── usbh_def.h
│ │ │ ├── usbh_hcs.h
│ │ │ ├── usbh_ioreq.h
│ │ │ └── usbh_stdreq.h
│ │ └── src
│ │ │ ├── usbh_core.c
│ │ │ ├── usbh_hcs.c
│ │ │ ├── usbh_ioreq.c
│ │ │ └── usbh_stdreq.c
│ └── Release_Notes.html
└── STM32_USB_OTG_Driver
│ ├── Release_Notes.html
│ ├── inc
│ ├── usb_bsp.h
│ ├── usb_conf_template.h
│ ├── usb_core.h
│ ├── usb_dcd.h
│ ├── usb_dcd_int.h
│ ├── usb_defines.h
│ ├── usb_hcd.h
│ ├── usb_hcd_int.h
│ ├── usb_otg.h
│ └── usb_regs.h
│ └── src
│ ├── usb_bsp_template.c
│ ├── usb_core.c
│ ├── usb_dcd.c
│ ├── usb_dcd_int.c
│ ├── usb_hcd.c
│ ├── usb_hcd_int.c
│ └── usb_otg.c
├── Project_UDSAPP_V1
└── 20170328
│ ├── BSP
│ ├── bsp.c
│ └── bsp.h
│ ├── CAN
│ ├── CAN_Prg.c
│ ├── CAN_Pub.h
│ ├── CAN_Types.h
│ └── SDF_Types.h
│ ├── CRC32.c
│ ├── CRC32.h
│ ├── EWARM
│ ├── Backup (2) of Project.ewd
│ ├── Backup (2) of Project.ewp
│ ├── Backup (2) of Project.ewt
│ ├── Backup of Project.ewd
│ ├── Backup of Project.ewp
│ ├── EW4A4.tmp
│ ├── EW4E.tmp
│ ├── EW6F48.tmp
│ ├── EW7009.tmp
│ ├── EW8F85.tmp
│ ├── EW93A6.tmp
│ ├── EWA7F1.tmp
│ ├── EWA8C6.tmp
│ ├── EWC8A6.tmp
│ ├── EWC982.tmp
│ ├── EWFBA3.tmp
│ ├── EWFD62.tmp
│ ├── Project.dep
│ ├── Project.ewd
│ ├── Project.ewp
│ ├── Project.ewt
│ ├── UDSAPP_V1_20170328.eww
│ ├── readme.txt
│ ├── settings
│ │ ├── ACCharger1.wsdt
│ │ ├── ACCharger1.wspos
│ │ ├── CAN_IAP.wsdt
│ │ ├── CAN_IAP.wspos
│ │ ├── CONTROLLER_SELFTESTXDY.wsdt
│ │ ├── Project.1_0.cspy.bat
│ │ ├── Project.1_0D.cspy.bat
│ │ ├── Project.1_0D.driver.xcl
│ │ ├── Project.1_0D.general.xcl
│ │ ├── Project.1_0R.cspy.bat
│ │ ├── Project.1_0R.driver.xcl
│ │ ├── Project.1_0R.general.xcl
│ │ ├── Project.1_1D.cspy.bat
│ │ ├── Project.1_1D.driver.xcl
│ │ ├── Project.1_1D.general.xcl
│ │ ├── Project.1_1R.cspy.bat
│ │ ├── Project.1_1R.driver.xcl
│ │ ├── Project.1_1R.general.xcl
│ │ ├── Project.ACCHARGER1D.cspy.bat
│ │ ├── Project.ACCHARGER1R.cspy.bat
│ │ ├── Project.ZXCTERM.cspy.bat
│ │ ├── Project.ZXCTERMD.cspy.bat
│ │ ├── Project.ZXCTERMR.cspy.bat
│ │ ├── Project.crun
│ │ ├── Project.cspy.bat
│ │ ├── Project.dbgdt
│ │ ├── Project.dni
│ │ ├── Project.wsdt
│ │ ├── Project_1_0.jlink
│ │ ├── Project_1_0D.jlink
│ │ ├── Project_1_0R.jlink
│ │ ├── Project_1_1D.jlink
│ │ ├── Project_1_1R.jlink
│ │ ├── Project_ACCHARGER1.jlink
│ │ ├── Project_ACCHARGER1D.jlink
│ │ ├── Project_ACCHARGER1R.jlink
│ │ ├── Project_CONTROLLER2_6_BSP.jlink
│ │ ├── Project_CONTROLLER2_6_BSP_OFFSET.jlink
│ │ ├── Project_PORT103V-BSP.jlink
│ │ ├── Project_STM3210E-EVAL.jlink
│ │ ├── Project_ZXCTERM.jlink
│ │ ├── Project_ZXCTERMD.jlink
│ │ ├── Project_ZXCTERMR.jlink
│ │ ├── Project_aaa.jlink
│ │ ├── UDSAPP_V1_20170320.wsdt
│ │ ├── UDSAPP_V1_20170320.wspos
│ │ ├── UDSAPP_V1_20170328.wsdt
│ │ ├── UDSAPP_V1_20170328.wspos
│ │ ├── UDSBL_V1_20161217.wsdt
│ │ ├── UDSBL_V1_20161217.wspos
│ │ ├── UDSBL_V1_20170124.wsdt
│ │ ├── UDSBL_V1_20170124.wspos
│ │ ├── UDSBL_V1_20170209.wsdt
│ │ ├── UDSBL_V1_20170209.wspos
│ │ ├── UDSBL_V1_20170216.wsdt
│ │ ├── UDSBL_V1_20170216.wspos
│ │ ├── UDSBL_V1_20170301.wsdt
│ │ ├── UDSBL_V1_20170301.wspos
│ │ ├── ZXCTERM.wsdt
│ │ └── ZXCTERM.wspos
│ ├── stm32f10x_flash.icf
│ ├── stm32f10x_flash_extsram.icf
│ ├── stm32f10x_flash_offset.icf
│ ├── stm32f10x_nor.icf
│ └── stm32f10x_ram.icf
│ ├── TP
│ ├── TP_Cbk.h
│ ├── TP_Cfg.c
│ ├── TP_Cfg.h
│ ├── TP_Prg.c
│ ├── TP_Pub.h
│ └── TP_Types.h
│ ├── UDS
│ ├── EncryptAlg1.c
│ ├── EncryptAlg1.h
│ ├── UDS_APP.c
│ ├── UDS_Callback.c
│ ├── UDS_Callback.h
│ ├── UDS_Config.c
│ ├── UDS_Config.h
│ ├── UDS_Const.h
│ ├── UDS_DSI.c
│ ├── UDS_Driver.c
│ ├── UDS_Driver.h
│ ├── UDS_Primitive.h
│ ├── UDS_RDBI.c
│ ├── UDS_Routine.c
│ └── UDS_WDBI.c
│ ├── app.c
│ ├── app.h
│ ├── d3des.c
│ ├── d3des.h
│ ├── eeprom.c
│ ├── eeprom.h
│ ├── eeprom_table.h
│ ├── flash.c
│ ├── flash.h
│ ├── stm32f10x_conf.h
│ ├── stm32f10x_it.c
│ ├── stm32f10x_it.h
│ └── system_stm32f10x.c
├── Project_UDSBL_V1-待完善说明.txt
├── Project_UDSBL_V1
├── 20170328
│ ├── BSP
│ │ ├── bsp.c
│ │ └── bsp.h
│ ├── CAN
│ │ ├── CAN_Prg.c
│ │ ├── CAN_Pub.h
│ │ ├── CAN_Types.h
│ │ └── SDF_Types.h
│ ├── CRC32.c
│ ├── CRC32.h
│ ├── EWARM
│ │ ├── 1_0R
│ │ │ └── Obj
│ │ │ │ ├── app.pbi
│ │ │ │ └── app.pbi.xcl
│ │ ├── 20170328.eww
│ │ ├── Backup (2) of Project.ewd
│ │ ├── Backup (2) of Project.ewp
│ │ ├── Backup (2) of Project.ewt
│ │ ├── Backup of Project.ewd
│ │ ├── Backup of Project.ewp
│ │ ├── EW4A4.tmp
│ │ ├── EW4E.tmp
│ │ ├── EW6F48.tmp
│ │ ├── EW7009.tmp
│ │ ├── EW8F85.tmp
│ │ ├── EW93A6.tmp
│ │ ├── EWA7F1.tmp
│ │ ├── EWA8C6.tmp
│ │ ├── EWC8A6.tmp
│ │ ├── EWC982.tmp
│ │ ├── EWFBA3.tmp
│ │ ├── EWFD62.tmp
│ │ ├── Project.dep
│ │ ├── Project.ewd
│ │ ├── Project.ewp
│ │ ├── Project.ewt
│ │ ├── readme.txt
│ │ ├── settings
│ │ │ ├── 20170322_ZB1000_Beta1_0.wsdt
│ │ │ ├── 20170322_ZB1000_Beta1_0.wspos
│ │ │ ├── 20170328.wsdt
│ │ │ ├── 20170328.wspos
│ │ │ ├── ACCharger1.wsdt
│ │ │ ├── ACCharger1.wspos
│ │ │ ├── CAN_IAP.wsdt
│ │ │ ├── CAN_IAP.wspos
│ │ │ ├── CONTROLLER_SELFTESTXDY.wsdt
│ │ │ ├── Project.1_0.cspy.bat
│ │ │ ├── Project.1_0D.cspy.bat
│ │ │ ├── Project.1_0D.driver.xcl
│ │ │ ├── Project.1_0D.general.xcl
│ │ │ ├── Project.1_0R.cspy.bat
│ │ │ ├── Project.1_0R.driver.xcl
│ │ │ ├── Project.1_0R.general.xcl
│ │ │ ├── Project.1_1D.cspy.bat
│ │ │ ├── Project.1_1D.driver.xcl
│ │ │ ├── Project.1_1D.general.xcl
│ │ │ ├── Project.1_1R.cspy.bat
│ │ │ ├── Project.1_1R.driver.xcl
│ │ │ ├── Project.1_1R.general.xcl
│ │ │ ├── Project.ACCHARGER1D.cspy.bat
│ │ │ ├── Project.ACCHARGER1R.cspy.bat
│ │ │ ├── Project.ZXCTERM.cspy.bat
│ │ │ ├── Project.ZXCTERMD.cspy.bat
│ │ │ ├── Project.ZXCTERMR.cspy.bat
│ │ │ ├── Project.crun
│ │ │ ├── Project.cspy.bat
│ │ │ ├── Project.dbgdt
│ │ │ ├── Project.dni
│ │ │ ├── Project.wsdt
│ │ │ ├── Project_1_0.jlink
│ │ │ ├── Project_1_0D.jlink
│ │ │ ├── Project_1_0R.jlink
│ │ │ ├── Project_1_1D.jlink
│ │ │ ├── Project_1_1R.jlink
│ │ │ ├── Project_ACCHARGER1.jlink
│ │ │ ├── Project_ACCHARGER1D.jlink
│ │ │ ├── Project_ACCHARGER1R.jlink
│ │ │ ├── Project_CONTROLLER2_6_BSP.jlink
│ │ │ ├── Project_CONTROLLER2_6_BSP_OFFSET.jlink
│ │ │ ├── Project_PORT103V-BSP.jlink
│ │ │ ├── Project_STM3210E-EVAL.jlink
│ │ │ ├── Project_ZXCTERM.jlink
│ │ │ ├── Project_ZXCTERMD.jlink
│ │ │ ├── Project_ZXCTERMR.jlink
│ │ │ ├── Project_aaa.jlink
│ │ │ ├── UDSBL_V1_20161217.wsdt
│ │ │ ├── UDSBL_V1_20161217.wspos
│ │ │ ├── UDSBL_V1_20170124.wsdt
│ │ │ ├── UDSBL_V1_20170124.wspos
│ │ │ ├── UDSBL_V1_20170209.wsdt
│ │ │ ├── UDSBL_V1_20170209.wspos
│ │ │ ├── UDSBL_V1_20170216.wsdt
│ │ │ ├── UDSBL_V1_20170216.wspos
│ │ │ ├── UDSBL_V1_20170301.wsdt
│ │ │ ├── UDSBL_V1_20170301.wspos
│ │ │ ├── ZXCTERM.wsdt
│ │ │ └── ZXCTERM.wspos
│ │ ├── stm32f10x_flash.icf
│ │ ├── stm32f10x_flash_extsram.icf
│ │ ├── stm32f10x_flash_offset.icf
│ │ ├── stm32f10x_nor.icf
│ │ └── stm32f10x_ram.icf
│ ├── TP
│ │ ├── TP_Cbk.h
│ │ ├── TP_Cfg.c
│ │ ├── TP_Cfg.h
│ │ ├── TP_Prg.c
│ │ ├── TP_Pub.h
│ │ └── TP_Types.h
│ ├── UDS
│ │ ├── EncryptAlg1.c
│ │ ├── EncryptAlg1.h
│ │ ├── UDS_APP.c
│ │ ├── UDS_Callback.c
│ │ ├── UDS_Callback.h
│ │ ├── UDS_Config.c
│ │ ├── UDS_Config.h
│ │ ├── UDS_Const.h
│ │ ├── UDS_DSI.c
│ │ ├── UDS_Driver.c
│ │ ├── UDS_Driver.h
│ │ ├── UDS_Primitive.h
│ │ ├── UDS_RDBI.c
│ │ ├── UDS_Routine.c
│ │ └── UDS_WDBI.c
│ ├── app.c
│ ├── app.h
│ ├── d3des.c
│ ├── d3des.h
│ ├── eeprom.c
│ ├── eeprom.h
│ ├── eeprom_table.h
│ ├── flash.c
│ ├── flash.h
│ ├── stm32f10x_conf.h
│ ├── stm32f10x_it.c
│ ├── stm32f10x_it.h
│ └── system_stm32f10x.c
└── readme.txt
└── Utilities
└── Dunen_Lib
└── UDS_V1.00
├── UDS.c
├── UDS.h
├── UDS_NWS.c
├── UDS_NWS.h
└── UDS_Types.h
/STM32/D3项目Bootloader需求规范V0.1_20151225 .pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/D3项目Bootloader需求规范V0.1_20151225 .pdf
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F10x/Include/stm32f10x.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Device/ST/STM32F10x/Include/stm32f10x.h
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F10x/Include/system_stm32f10x.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V3.6.1
6 | * @date 05-March-2012
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f10x_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F10X_H
40 | #define __SYSTEM_STM32F10X_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F10x_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F10x_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | /** @addtogroup STM32F10x_System_Exported_Constants
66 | * @{
67 | */
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /** @addtogroup STM32F10x_System_Exported_Macros
74 | * @{
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /** @addtogroup STM32F10x_System_Exported_Functions
82 | * @{
83 | */
84 |
85 | extern void SystemInit(void);
86 | extern void SystemCoreClockUpdate(void);
87 | /**
88 | * @}
89 | */
90 |
91 | #ifdef __cplusplus
92 | }
93 | #endif
94 |
95 | #endif /*__SYSTEM_STM32F10X_H */
96 |
97 | /**
98 | * @}
99 | */
100 |
101 | /**
102 | * @}
103 | */
104 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
105 |
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F2xx/Include/system_stm32f2xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f2xx.h
4 | * @author MCD Application Team
5 | * @version V1.1.3
6 | * @date 05-March-2012
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f2xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F2XX_H
40 | #define __SYSTEM_STM32F2XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F2xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F2xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F2xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F2xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F2xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F2XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.0.2
6 | * @date 05-March-2012
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f4xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F4XX_H
40 | #define __SYSTEM_STM32F4XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F4xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F4xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F4xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F4xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F4xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F4XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_CM4_SIMD.htm
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_Core.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_Core.htm
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_DebugSupport.htm
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_History.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_History.htm
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_Logo_Final.jpg:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_Logo_Final.jpg
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/Documentation/CMSIS_System_View_Description.htm
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/Include/arm_common_tables.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 11. November 2010
5 | * $Revision: V1.0.2
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_common_tables.h
9 | *
10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3
13 | *
14 | * Version 1.0.2 2010/11/11
15 | * Documentation updated.
16 | *
17 | * Version 1.0.1 2010/10/05
18 | * Production release and review comments incorporated.
19 | *
20 | * Version 1.0.0 2010/09/20
21 | * Production release and review comments incorporated.
22 | * -------------------------------------------------------------------- */
23 |
24 | #ifndef _ARM_COMMON_TABLES_H
25 | #define _ARM_COMMON_TABLES_H
26 |
27 | #include "arm_math.h"
28 |
29 | extern uint16_t armBitRevTable[256];
30 | extern q15_t armRecipTableQ15[64];
31 | extern q31_t armRecipTableQ31[64];
32 | extern const q31_t realCoefAQ31[1024];
33 | extern const q31_t realCoefBQ31[1024];
34 |
35 | #endif /* ARM_COMMON_TABLES_H */
36 |
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/README.txt:
--------------------------------------------------------------------------------
1 | * -------------------------------------------------------------------
2 | * Copyright (C) 2011 ARM Limited. All rights reserved.
3 | *
4 | * Date: 25 July 2011
5 | * Revision: V2.10
6 | *
7 | * Project: Cortex Microcontroller Software Interface Standard (CMSIS)
8 | * Title: Release Note for CMSIS
9 | *
10 | * -------------------------------------------------------------------
11 |
12 |
13 | NOTE - Open the index.html file to access CMSIS documentation
14 |
15 |
16 | The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all
17 | Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects
18 | and reduces time-to-market for new embedded applications.
19 |
20 | CMSIS is released under the terms of the end user license agreement ("CMSIS END USER LICENCE AGREEMENT.pdf").
21 | Any user of the software package is bound to the terms and conditions of the end user license agreement.
22 |
23 |
24 | You will find the following sub-directories:
25 |
26 | Documentation - Contains CMSIS documentation.
27 |
28 | DSP_Lib - MDK project files, Examples and source files etc.. to build the
29 | CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors.
30 |
31 | Include - CMSIS Core Support and CMSIS DSP Include Files.
32 |
33 | Lib - CMSIS DSP Binaries
34 | ---
--------------------------------------------------------------------------------
/STM32/Libraries/CMSIS/index.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/CMSIS/index.htm
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_crc.h
4 | * @author MCD Application Team
5 | * @version V3.6.1
6 | * @date 05-March-2012
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2012 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F10x_CRC_H
31 | #define __STM32F10x_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f10x.h"
39 |
40 | /** @addtogroup STM32F10x_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /** @defgroup CRC_Exported_Types
49 | * @{
50 | */
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup CRC_Exported_Constants
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /** @defgroup CRC_Exported_Macros
65 | * @{
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /** @defgroup CRC_Exported_Functions
73 | * @{
74 | */
75 |
76 | void CRC_ResetDR(void);
77 | uint32_t CRC_CalcCRC(uint32_t Data);
78 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
79 | uint32_t CRC_GetCRC(void);
80 | void CRC_SetIDRegister(uint8_t IDValue);
81 | uint8_t CRC_GetIDRegister(void);
82 |
83 | #ifdef __cplusplus
84 | }
85 | #endif
86 |
87 | #endif /* __STM32F10x_CRC_H */
88 | /**
89 | * @}
90 | */
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /**
97 | * @}
98 | */
99 |
100 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
101 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f2xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.1.2
6 | * @date 05-March-2012
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2012 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F2xx_CRC_H
31 | #define __STM32F2xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f2xx.h"
39 |
40 | /** @addtogroup STM32F2xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F2xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F4xx_StdPeriph_Driver/Release_Notes.html:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F4xx_StdPeriph_Driver/Release_Notes.html
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.0.2
6 | * @date 05-March-2012
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2012 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F4xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_ETH_Driver/inc/stm32_eth.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32_ETH_Driver/inc/stm32_eth.h
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_ETH_Driver/src/stm32_eth.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Libraries/STM32_ETH_Driver/src/stm32_eth.c
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/desktop.ini:
--------------------------------------------------------------------------------
1 | [.ShellClassInfo]
2 | InfoTip=Ce dossier est partagé en ligne.
3 | IconFile=C:\Program Files (x86)\Google\Drive\googledrivesync.exe
4 | IconIndex=12
5 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/desktop.ini:
--------------------------------------------------------------------------------
1 | [.ShellClassInfo]
2 | InfoTip=Ce dossier est partagé en ligne.
3 | IconFile=C:\Program Files (x86)\Google\Drive\googledrivesync.exe
4 | IconIndex=12
5 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/usb_int.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_int.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Endpoint CTR (Low and High) interrupt's service routines prototypes
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_INT_H
31 | #define __USB_INT_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | void CTR_LP(void);
39 | void CTR_HP(void);
40 |
41 | /* External variables --------------------------------------------------------*/
42 |
43 | #endif /* __USB_INT_H */
44 |
45 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
46 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/usb_lib.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_lib.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief USB library include files
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_LIB_H
31 | #define __USB_LIB_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usbcan_bsp.h"
35 | #include "usb_type.h"
36 | #include "usb_regs.h"
37 | #include "usb_def.h"
38 | #include "usb_core.h"
39 | #include "usb_init.h"
40 | #include "usb_sil.h"
41 | #include "usb_mem.h"
42 | #include "usb_int.h"
43 |
44 | /* Exported types ------------------------------------------------------------*/
45 | /* Exported constants --------------------------------------------------------*/
46 | /* Exported macro ------------------------------------------------------------*/
47 | /* Exported functions ------------------------------------------------------- */
48 | /* External variables --------------------------------------------------------*/
49 |
50 | #endif /* __USB_LIB_H */
51 |
52 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
53 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/usb_mem.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_mem.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Utility prototypes functions for memory/PMA transfers
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_MEM_H
31 | #define __USB_MEM_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 | void UserToPMABufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
39 | void PMAToUserBufferCopy(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
40 |
41 | /* External variables --------------------------------------------------------*/
42 |
43 | #endif /*__USB_MEM_H*/
44 |
45 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
46 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/usb_sil.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_sil.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Simplified Interface Layer function prototypes.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_SIL_H
31 | #define __USB_SIL_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | /* Exported types ------------------------------------------------------------*/
35 | /* Exported constants --------------------------------------------------------*/
36 | /* Exported macro ------------------------------------------------------------*/
37 | /* Exported functions ------------------------------------------------------- */
38 |
39 | uint32_t USB_SIL_Init(void);
40 | uint32_t USB_SIL_Write(uint8_t bEpAddr, uint8_t* pBufferPointer, uint32_t wBufferSize);
41 | uint32_t USB_SIL_Read(uint8_t bEpAddr, uint8_t* pBufferPointer);
42 |
43 | /* External variables --------------------------------------------------------*/
44 |
45 | #endif /* __USB_SIL_H */
46 |
47 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
48 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB-FS-Device_Driver/inc/usb_type.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_type.h
4 | * @author MCD Application Team
5 | * @version V4.0.0
6 | * @date 28-August-2012
7 | * @brief Type definitions used by the USB Library
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __USB_TYPE_H
31 | #define __USB_TYPE_H
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usb_conf.h"
35 |
36 | /* Exported types ------------------------------------------------------------*/
37 | /* Exported constants --------------------------------------------------------*/
38 | #ifndef NULL
39 | #define NULL ((void *)0)
40 | #endif
41 |
42 | typedef enum
43 | {
44 | FALSE = 0, TRUE = !FALSE
45 | }
46 | bool;
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* Exported functions ------------------------------------------------------- */
50 | /* External variables --------------------------------------------------------*/
51 |
52 | #endif /* __USB_TYPE_H */
53 |
54 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/cdc/inc/usbd_cdc_if_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_cdc_if_template.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief Header for dfu_mal.c file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __USBD_CDC_IF_TEMPLATE_H
30 | #define __USBD_CDC_IF_TEMPLATE_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | #include "usb_conf.h"
34 | #include "usbd_conf.h"
35 | #include "usbd_cdc_core.h"
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 | /* Exported constants --------------------------------------------------------*/
39 |
40 | extern CDC_IF_Prop_TypeDef TEMPLATE_fops;
41 |
42 | /* Exported macro ------------------------------------------------------------*/
43 | /* Exported functions ------------------------------------------------------- */
44 | #endif /* __USBD_CDC_IF_TEMPLATE_H */
45 |
46 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
47 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/dfu/inc/usbd_flash_if.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_flash_if.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief Header for usbd_flash_if.c file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __FLASH_IF_MAL_H
30 | #define __FLASH_IF_MAL_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | #include "usbd_dfu_mal.h"
34 |
35 | /* Exported types ------------------------------------------------------------*/
36 | /* Exported constants --------------------------------------------------------*/
37 | #define FLASH_START_ADD 0x08000000
38 |
39 | #ifdef STM32F2XX
40 | #define FLASH_END_ADD 0x08100000
41 | #define FLASH_IF_STRING "@Internal Flash /0x08000000/03*016Ka,01*016Kg,01*064Kg,07*128Kg"
42 | #elif defined(STM32F4XX)
43 | #define FLASH_END_ADD 0x08100000
44 | #define FLASH_IF_STRING "@Internal Flash /0x08000000/03*016Ka,01*016Kg,01*064Kg,07*128Kg"
45 | #elif defined(STM32F10X_CL)
46 | #define FLASH_END_ADD 0x08040000
47 | #define FLASH_IF_STRING "@Internal Flash /0x08000000/06*002Ka,122*002Kg"
48 | #endif /* STM32F2XX */
49 |
50 |
51 | extern DFU_MAL_Prop_TypeDef DFU_Flash_cb;
52 |
53 | /* Exported macro ------------------------------------------------------------*/
54 | /* Exported functions ------------------------------------------------------- */
55 |
56 | #endif /* __FLASH_IF_MAL_H */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/dfu/inc/usbd_mem_if_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_mem_if_template.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief Header for usbd_mem_if_template.c file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __MEM_IF_MAL_H
30 | #define __MEM_IF_MAL_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | #include "usb_conf.h"
34 |
35 | #include "usbd_dfu_mal.h"
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 | /* Exported constants --------------------------------------------------------*/
39 | #define MEM_START_ADD 0x00000000 /* Dummy start address */
40 | #define MEM_END_ADD (uint32_t)(MEM_START_ADD + (5 * 1024)) /* Dummy Size = 5KB */
41 |
42 | #define MEM_IF_STRING "@Dummy Memory /0x00000000/01*002Kg,03*001Kg"
43 |
44 | extern DFU_MAL_Prop_TypeDef DFU_Mem_cb;
45 |
46 | /* Exported macro ------------------------------------------------------------*/
47 | /* Exported functions ------------------------------------------------------- */
48 |
49 | #endif /* __MEM_IF_MAL_H */
50 |
51 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
52 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/dfu/inc/usbd_otp_if.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_otp_if.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief Header for usbd_otp_if.c file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __OTP_IF_MAL_H
30 | #define __OTP_IF_MAL_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | #include "usbd_dfu_mal.h"
34 |
35 | /* Exported types ------------------------------------------------------------*/
36 | /* Exported constants --------------------------------------------------------*/
37 | #define OTP_START_ADD 0x1FFF7800
38 | #define OTP_END_ADD (uint32_t)(OTP_START_ADD + 528)
39 |
40 | #define OTP_IF_STRING "@OTP Area /0x1FFF7800/01*512 g,01*016 g"
41 |
42 | extern DFU_MAL_Prop_TypeDef DFU_Otp_cb;
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* Exported functions ------------------------------------------------------- */
46 |
47 | #endif /* __OTP_IF_MAL_H */
48 |
49 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
50 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/msc/inc/usbd_msc_core.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_msc_core.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief header for the usbd_msc_core.c file
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef _USB_MSC_CORE_H_
30 | #define _USB_MSC_CORE_H_
31 |
32 | #include "usbd_ioreq.h"
33 |
34 | /** @addtogroup USBD_MSC_BOT
35 | * @{
36 | */
37 |
38 | /** @defgroup USBD_MSC
39 | * @brief This file is the Header file for USBD_msc.c
40 | * @{
41 | */
42 |
43 |
44 | /** @defgroup USBD_BOT_Exported_Defines
45 | * @{
46 | */
47 |
48 |
49 | #define BOT_GET_MAX_LUN 0xFE
50 | #define BOT_RESET 0xFF
51 | #define USB_MSC_CONFIG_DESC_SIZ 32
52 |
53 | #define MSC_EPIN_SIZE MSC_MAX_PACKET
54 | #define MSC_EPOUT_SIZE MSC_MAX_PACKET
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup USB_CORE_Exported_Types
61 | * @{
62 | */
63 |
64 | extern USBD_Class_cb_TypeDef USBD_MSC_cb;
65 | /**
66 | * @}
67 | */
68 |
69 | /**
70 | * @}
71 | */
72 | #endif // _USB_MSC_CORE_H_
73 | /**
74 | * @}
75 | */
76 |
77 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
78 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Class/msc/inc/usbd_msc_data.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_msc_data.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief header for the usbd_msc_data.c file
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 |
30 | #ifndef _USBD_MSC_DATA_H_
31 | #define _USBD_MSC_DATA_H_
32 |
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "usbd_conf.h"
35 |
36 | /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
37 | * @{
38 | */
39 |
40 | /** @defgroup USB_INFO
41 | * @brief general defines for the usb device library file
42 | * @{
43 | */
44 |
45 | /** @defgroup USB_INFO_Exported_Defines
46 | * @{
47 | */
48 | #define MODE_SENSE6_LEN 8
49 | #define MODE_SENSE10_LEN 8
50 | #define LENGTH_INQUIRY_PAGE00 7
51 | #define LENGTH_FORMAT_CAPACITIES 20
52 |
53 | /**
54 | * @}
55 | */
56 |
57 |
58 | /** @defgroup USBD_INFO_Exported_TypesDefinitions
59 | * @{
60 | */
61 | /**
62 | * @}
63 | */
64 |
65 |
66 |
67 | /** @defgroup USBD_INFO_Exported_Macros
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup USBD_INFO_Exported_Variables
76 | * @{
77 | */
78 | extern const uint8_t MSC_Page00_Inquiry_Data[];
79 | extern const uint8_t MSC_Mode_Sense6_data[];
80 | extern const uint8_t MSC_Mode_Sense10_data[] ;
81 |
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup USBD_INFO_Exported_FunctionsPrototype
87 | * @{
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | #endif /* _USBD_MSC_DATA_H_ */
95 |
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
105 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_Device_Library/Core/inc/usbd_conf_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbd_conf_template.h
4 | * @author MCD Application Team
5 | * @version V1.1.0
6 | * @date 19-March-2012
7 | * @brief usb device configuration template file
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __USBD_CONF__H__
30 | #define __USBD_CONF__H__
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | #include "usb_conf.h"
34 |
35 | /** @defgroup USB_CONF_Exported_Defines
36 | * @{
37 | */
38 | #define USE_USB_OTG_HS
39 |
40 | #define USBD_CFG_MAX_NUM 1
41 | #define USB_MAX_STR_DESC_SIZ 64
42 | #define USBD_EP0_MAX_PACKET_SIZE 64
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @defgroup USB_CONF_Exported_Types
50 | * @{
51 | */
52 | /**
53 | * @}
54 | */
55 |
56 |
57 | /** @defgroup USB_CONF_Exported_Macros
58 | * @{
59 | */
60 | /**
61 | * @}
62 | */
63 |
64 | /** @defgroup USB_CONF_Exported_Variables
65 | * @{
66 | */
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup USB_CONF_Exported_FunctionsPrototype
72 | * @{
73 | */
74 | /**
75 | * @}
76 | */
77 |
78 |
79 | #endif //__USBD_CONF__H__
80 |
81 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
82 |
83 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_HOST_Library/Core/inc/usbh_conf_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usbh_conf_template
4 | * @author MCD Application Team
5 | * @version V2.1.0
6 | * @date 19-March-2012
7 | * @brief General USB Host library configuration
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __USBH_CONF__H__
30 | #define __USBH_CONF__H__
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 |
34 | /** @addtogroup USBH_OTG_DRIVER
35 | * @{
36 | */
37 |
38 | /** @defgroup USBH_CONF
39 | * @brief usb otg low level driver configuration file
40 | * @{
41 | */
42 |
43 | /** @defgroup USBH_CONF_Exported_Defines
44 | * @{
45 | */
46 |
47 | #define USBH_MAX_NUM_ENDPOINTS 2
48 | #define USBH_MAX_NUM_INTERFACES 2
49 | #ifdef USE_USB_OTG_FS
50 | #define USBH_MSC_MPS_SIZE 0x40
51 | #else
52 | #define USBH_MSC_MPS_SIZE 0x200
53 | #endif
54 |
55 | /**
56 | * @}
57 | */
58 |
59 |
60 | /** @defgroup USBH_CONF_Exported_Types
61 | * @{
62 | */
63 | /**
64 | * @}
65 | */
66 |
67 |
68 | /** @defgroup USBH_CONF_Exported_Macros
69 | * @{
70 | */
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup USBH_CONF_Exported_Variables
76 | * @{
77 | */
78 | /**
79 | * @}
80 | */
81 |
82 | /** @defgroup USBH_CONF_Exported_FunctionsPrototype
83 | * @{
84 | */
85 | /**
86 | * @}
87 | */
88 |
89 |
90 | #endif //__USBH_CONF__H__
91 |
92 |
93 | /**
94 | * @}
95 | */
96 |
97 | /**
98 | * @}
99 | */
100 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
101 |
102 |
--------------------------------------------------------------------------------
/STM32/Libraries/STM32_USB_OTG_Driver/inc/usb_otg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file usb_otg.h
4 | * @author MCD Application Team
5 | * @version V2.1.0
6 | * @date 19-March-2012
7 | * @brief OTG Core Header
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2012 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __USB_OTG__
30 | #define __USB_OTG__
31 |
32 |
33 | /** @addtogroup USB_OTG_DRIVER
34 | * @{
35 | */
36 |
37 | /** @defgroup USB_OTG
38 | * @brief This file is the
39 | * @{
40 | */
41 |
42 |
43 | /** @defgroup USB_OTG_Exported_Defines
44 | * @{
45 | */
46 |
47 |
48 | void USB_OTG_InitiateSRP(void);
49 | void USB_OTG_InitiateHNP(uint8_t state , uint8_t mode);
50 | void USB_OTG_Switchback (USB_OTG_CORE_DEVICE *pdev);
51 | uint32_t USB_OTG_GetCurrentState (USB_OTG_CORE_DEVICE *pdev);
52 |
53 | /**
54 | * @}
55 | */
56 |
57 |
58 | /** @defgroup USB_OTG_Exported_Types
59 | * @{
60 | */
61 | /**
62 | * @}
63 | */
64 |
65 |
66 | /** @defgroup USB_OTG_Exported_Macros
67 | * @{
68 | */
69 | /**
70 | * @}
71 | */
72 |
73 | /** @defgroup USB_OTG_Exported_Variables
74 | * @{
75 | */
76 | /**
77 | * @}
78 | */
79 |
80 | /** @defgroup USB_OTG_Exported_FunctionsPrototype
81 | * @{
82 | */
83 | /**
84 | * @}
85 | */
86 |
87 |
88 | #endif //__USB_OTG__
89 |
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
99 |
100 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/CAN/CAN_Pub.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - CAN_Pub.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _CAN_PUB_H_
13 | #define _CAN_PUB_H_
14 |
15 | /* Declare the external default value of the m_eComMode variable */
16 | extern const tCanMode m_eCanModeDefaultValue;
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/CAN/SDF_Types.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - SDF_Types.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _SDF_TYPES_H_
13 | #define _SDF_TYPES_H_
14 |
15 | /*SDF 8 bytes variables values*/
16 | #define SDF_U8_VALUE1 0x69U
17 | #define SDF_U8_VALUE2 0x96U
18 | #define SDF_U8_VALUE3 0xC3U
19 | #define SDF_U8_VALUE4 0x3CU
20 | #define SDF_U8_VALUE5 0xAAU
21 | #define SDF_U8_VALUE6 0x55U
22 |
23 | /*SDF 16 bytes variables values*/
24 | #define SDF_U16_VALUE1 0x6969U
25 | #define SDF_U16_VALUE2 0x9669U
26 | #define SDF_U16_VALUE3 0xC369U
27 | #define SDF_U16_VALUE4 0x3C69U
28 | #define SDF_U16_VALUE5 0xAA69U
29 | #define SDF_U16_VALUE6 0x5569U
30 | #define SDF_U16_VALUE7 0x6996U
31 | #define SDF_U16_VALUE8 0x9696U
32 | #define SDF_U16_VALUE9 0xC396U
33 | #define SDF_U16_VALUE10 0x3C96U
34 | #define SDF_U16_VALUE11 0xAA96U
35 | #define SDF_U16_VALUE12 0x5596U
36 | #define SDF_U16_VALUE13 0x69C3U
37 | #define SDF_U16_VALUE14 0x96C3U
38 | #define SDF_U16_VALUE15 0xC3C3U
39 | #define SDF_U16_VALUE16 0x3CC3U
40 | #define SDF_U16_VALUE17 0xAAC3U
41 | #define SDF_U16_VALUE18 0x55C3U
42 | #define SDF_U16_VALUE19 0x693CU
43 | #define SDF_U16_VALUE20 0x963CU
44 | #define SDF_U16_VALUE21 0xC33CU
45 | #define SDF_U16_VALUE22 0x3C3CU
46 | #define SDF_U16_VALUE23 0xAA3CU
47 | #define SDF_U16_VALUE24 0x553CU
48 | #define SDF_U16_VALUE25 0x69AAU
49 | #define SDF_U16_VALUE26 0x96AAU
50 | #define SDF_U16_VALUE27 0xC3AAU
51 | #define SDF_U16_VALUE28 0x3CAAU
52 | #define SDF_U16_VALUE29 0xAAAAU
53 | #define SDF_U16_VALUE30 0x55AAU
54 | #define SDF_U16_VALUE31 0x6955U
55 | #define SDF_U16_VALUE32 0x9655U
56 | #define SDF_U16_VALUE33 0xC355U
57 | #define SDF_U16_VALUE34 0x3C55U
58 | #define SDF_U16_VALUE35 0xAA55U
59 | #define SDF_U16_VALUE36 0x5555U
60 |
61 | #endif
62 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/CRC32.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSAPP_V1/20170328/CRC32.c
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/CRC32.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - CRC32.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _CRC32_H_
13 | #define _CRC32_H_
14 | #include "bsp.h"
15 |
16 | #define CRC32_POLYNOMIAL ((uint32_t)0xEDB88320)
17 | #define RCC_CRC_BIT ((uint32_t)0x00001000)
18 |
19 | #define USE_BIG_ENDIAN 0U
20 |
21 | u32 CRC32_ForBytes(u8 *pData,u32 uLen);
22 |
23 | #endif /* _CRC32_H_ */
24 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/UDSAPP_V1_20170328.eww:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 | $WS_DIR$\Project.ewp
6 |
7 |
8 |
9 |
10 |
11 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/ACCharger1.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 639 192 2079 952 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/CAN_IAP.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 461 169 1541 849 1
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103xB.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103xB" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%~1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\UDS_BootLoader\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0D.general.xcl" --backend -f "D:\GreenBox\UDS_BootLoader\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0D.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\UDS_BootLoader\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0D.general.xcl" "--debug_file=%~1" --backend -f "D:\GreenBox\UDS_BootLoader\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0D.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0D.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\CONFIG\debugger\ST\STM32F103V8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103V8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0D.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armjlink2.dll"
4 |
5 | "D:\GreenBox\UDS_BootLoader\STM32\Project_UDSAPP_V1\20170328\EWARM\1_0D\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%~1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\New folder (2)\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0R.general.xcl" --backend -f "D:\GreenBox\New folder (2)\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0R.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\New folder (2)\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0R.general.xcl" "--debug_file=%~1" --backend -f "D:\GreenBox\New folder (2)\STM32\Project_UDSAPP_V1\20170328\EWARM\settings\Project.1_0R.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0R.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\CONFIG\debugger\ST\STM32F103V8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103V8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_0R.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armjlink2.dll"
4 |
5 | "D:\GreenBox\New folder (2)\STM32\Project_UDSAPP_V1\20170328\EWARM\1_0R\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.general.xcl" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.general.xcl" "--debug_file=%1" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1D.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\CONFIG\debugger\ST\STM32F103x8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103x8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1D.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armjlink.dll"
4 |
5 | "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\1_1D\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.general.xcl" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.general.xcl" "--debug_file=%1" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1R.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\CONFIG\debugger\ST\STM32F103xB.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103xB"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.1_1R.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armjlink.dll"
4 |
5 | "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\1_1R\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.ACCHARGER1D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.ACCHARGER1R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.ZXCTERM.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.ZXCTERMD.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.ZXCTERMR.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\STM32F1xx_XL.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.crun:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 1
5 |
6 |
7 | *
8 | *
9 | *
10 | 0
11 | 1
12 |
13 |
14 |
15 |
16 |
17 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project.dbgdt:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_1_0.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_1_0D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | OverrideMemMap = 0
11 | AllowSimulation = 1
12 | ScriptFile=""
13 | [FLASH]
14 | CacheExcludeSize = 0x00
15 | CacheExcludeAddr = 0x00
16 | MinNumBytesFlashDL = 0
17 | SkipProgOnCRCMatch = 1
18 | VerifyDownload = 1
19 | AllowCaching = 1
20 | EnableFlashDL = 2
21 | Override = 0
22 | Device="UNSPECIFIED"
23 | [GENERAL]
24 | WorkRAMSize = 0x00
25 | WorkRAMAddr = 0x00
26 | RAMUsageLimit = 0x00
27 | [SWO]
28 | SWOLogFile=""
29 | [MEM]
30 | RdOverrideOrMask = 0x00
31 | RdOverrideAndMask = 0xFFFFFFFF
32 | RdOverrideAddr = 0xFFFFFFFF
33 | WrOverrideOrMask = 0x00
34 | WrOverrideAndMask = 0xFFFFFFFF
35 | WrOverrideAddr = 0xFFFFFFFF
36 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_1_0R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_1_1D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_1_1R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ACCHARGER1.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ACCHARGER1D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ACCHARGER1R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_CONTROLLER2_6_BSP.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_CONTROLLER2_6_BSP_OFFSET.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_PORT103V-BSP.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_STM3210E-EVAL.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ZXCTERM.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ZXCTERMD.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_ZXCTERMR.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/Project_aaa.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSAPP_V1_20170320.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 128 356 1568 1115 1
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSAPP_V1_20170328.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 315 184 1755 944 1
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSBL_V1_20161217.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 328 120 1637 995 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSBL_V1_20170124.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 328 120 1637 995 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSBL_V1_20170209.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 234 234 1674 993 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSBL_V1_20170216.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 66 13 1506 772 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/UDSBL_V1_20170301.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 422 149 1862 908 2
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/settings/ZXCTERM.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 240 140 1680 900 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/stm32f10x_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08004000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08004000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x200;
13 | define symbol __ICFEDIT_size_heap__ = 0x0;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/stm32f10x_flash_extsram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x68000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x680FFFFF;
11 |
12 | /*-Sizes-*/
13 | define symbol __ICFEDIT_size_cstack__ = 0x400;
14 | define symbol __ICFEDIT_size_heap__ = 0x200;
15 | /**** End of ICF editor section. ###ICF###*/
16 |
17 |
18 | define memory mem with size = 4G;
19 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
20 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; /* EXTSRAM_region */
21 |
22 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
23 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
24 |
25 | initialize by copy { readwrite };
26 | do not initialize { section .noinit };
27 |
28 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
29 |
30 | place in ROM_region { readonly };
31 | place in RAM_region {readwrite, block CSTACK, block HEAP }; /* EXTSRAM_region */
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/stm32f10x_flash_offset.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08004000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08004000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/stm32f10x_nor.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x64000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x64000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x64FFFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/EWARM/stm32f10x_ram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/TP/TP_Cbk.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cbk.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _TP_CBK_H_
13 | #define _TP_CBK_H_
14 | #include "stm32f10x.h"
15 |
16 | /*******************************************************************************
17 | *
18 | * Public Function Prototypes
19 | *
20 | */
21 |
22 | void TP_TxConf (tTpMsgIdx uMsgIdx, u8 ebStatus);
23 | void TP_RxInd (tTpMsgIdx uMsgIdx, u8 ebStatus);
24 |
25 | void TP_DataBufferEmptyInd (tTpMsgIdx uMsgIdx);
26 | void TP_RxEnableInd (tTpMsgIdx uMsgIdx, tTpRxEnable uRxEnable);
27 |
28 | #endif
29 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/TP/TP_Cfg.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cfg.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 |
13 | #include "TP_Cfg.h"
14 | #include "TP_Pub.h"
15 | #define NCS_PRI_VAR
16 |
17 |
18 | /* COM frames index definition (COM_Cfg.h) */
19 | /**********************************************
20 | * Frames for configuration: 0*
21 | **********************************************/
22 | #define COM_FRAME_IDX_Diag_BCM_RQ_0x722 0U
23 | #define COM_FRAME_IDX_Diag_Fun_0x7DF 1U
24 | #define COM_FRAME_IDX_Diag_BCM_Rsp_0x723 2U
25 |
26 | NCS_PRI_VAR u8 aubDiag1Data[TP_DIAG_MSG_1_DATA_MAX];
27 | NCS_PRI_VAR u8 aubDiag2Data[TP_DIAG_MSG_2_DATA_MAX];
28 |
29 | const tTpMsgCfg m_astTpMsgCfg[TP_MSG_MAX] =
30 | {
31 | {COM_FRAME_IDX_Diag_BCM_Rsp_0x723, COM_FRAME_IDX_Diag_BCM_RQ_0x722, aubDiag1Data, aubDiag1Data, 300U, (150U / TP_MANAGE_PERIOD), (150U / TP_MANAGE_PERIOD), 1U , 0U, (TP_MSG_MODE_HALF_DUPLEX |TP_MSG_STMIN_FULL | TP_MSG_TYPE_DIAG | TP_MSG_RELOAD_FALSE | TP_MSG_PADDING_TRUE | TP_MSG_RETRANSMISSION_FALSE), 10U},
32 | {COM_FRAME_IDX_Diag_BCM_Rsp_0x723, COM_FRAME_IDX_Diag_Fun_0x7DF, aubDiag2Data, aubDiag2Data, 300U, (150U / TP_MANAGE_PERIOD), (150U / TP_MANAGE_PERIOD), 1U , 0U, (TP_MSG_MODE_HALF_DUPLEX |TP_MSG_STMIN_FULL | TP_MSG_TYPE_DIAG | TP_MSG_RELOAD_FALSE | TP_MSG_PADDING_TRUE | TP_MSG_RETRANSMISSION_FALSE), 10U},
33 | };
34 |
35 |
36 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/TP/TP_Cfg.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cfg.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _TP_CFG_H_
13 | #define _TP_CFG_H_
14 | #include "TP_Types.h"
15 |
16 | /*******************************************************************************
17 | *
18 | * Configuration Constants
19 | *
20 | */
21 |
22 | /* used in order to set the CAN type */
23 | #define TP_EB_PSA_CAN_LS_2010 0U
24 | #define TP_EB_PSA_CAN_HS_IS_2010 1U
25 | #define TP_EB_PSA_CAN_HS_M_2010 2U
26 | #define TP_EB_ISO 3U
27 |
28 | #define TP_EB_CAN_TYPE TP_EB_ISO
29 |
30 | /* TP messages number managed by this software layer */
31 | /* Range : (0 .. 2^32) */
32 | #define TP_MSG_MAX 2U
33 |
34 | #ifdef NCS_UNITARY_TEST
35 | /* Transport Protocol messages configuration, stored in Read-Only memory */
36 | extern u16 m_aubRxEnableCnt[TP_MSG_MAX];
37 | #endif
38 | extern const tTpMsgCfg m_astTpMsgCfg[TP_MSG_MAX];
39 |
40 |
41 | #define TP_DIAG_MSG_1_DATA_MAX 300U
42 | #define TP_DIAG_MSG_2_DATA_MAX 300U
43 | /* Communication dynamic frames in reception management authorization */
44 | #ifdef COM_TX_DYNAMIC_FRAME_MAX_RAM
45 | #define TP_COM_TX_DYNAMIC_FRAME_MAX COM_TX_DYNAMIC_FRAME_MAX_RAM
46 | #else
47 | /* For compatibility with previous version of COM module */
48 | #define TP_COM_TX_DYNAMIC_FRAME_MAX COM_TX_DYNAMIC_FRAME_MAX
49 | #endif
50 |
51 | /* TP messages index definition (TP_Cfg.h)*/
52 | #define TP_MSG_IDX_Diag_BCM_Phy_RQ 0U
53 | #define TP_MSG_IDX_Diag_BCM_Fun_RQ 1U
54 |
55 | #endif
56 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/EncryptAlg1.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - EncryptAlg1.c
3 | Encryption algorithm.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 16th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS_Driver.h"
13 | #include "UDS_Config.h"
14 | #include "EncryptAlg1.h"
15 |
16 | /**
17 | * seedToKeyLevel1
18 | *
19 | * @param Seed - random seed
20 | * ECU_MASK - encryption parameters
21 | * @return encryption key
22 | * @date Jan. 18th 2017
23 | */
24 | U32 seedToKeyLevel1(U32 Seed , U32 Mask)
25 | {
26 | U32 Key = 0;
27 | U8 i = 0;
28 | if(Seed != 0)
29 | {
30 | for(i=0; i< 35; i++)
31 | {
32 | if(Seed & 0x80000000)
33 | {
34 | Seed = Seed<<1;
35 | Seed = Seed^Mask;
36 | }
37 | else
38 | {
39 | Seed = Seed<<1;
40 | }
41 | }
42 | Key = Seed;
43 | }
44 | return Key;
45 | }
46 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/EncryptAlg1.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - EncryptAlg1.h
3 | Encryption algorithm.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 16th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _ENCRYPTALG1_H_
13 | #define _ENCRYPTALG1_H_
14 | U32 seedToKeyLevel1(U32 Seed , U32 Mask);
15 | #endif /* _ENCRYPTALG1_H_ */
16 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_Callback.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Callback.c
3 | UDS Configuration.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 23th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS_Driver.h"
13 | #include "UDS_Config.h"
14 | #include "UDS_Primitive.h"
15 | #include "UDS_Callback.h"
16 |
17 | #if USE_ROUTINE_CNTL && USE_RT_ERASEMEM
18 | U8 EraseFlash_Callback(U8 *pData, U16 *uwLen)
19 | {
20 | if(UDS_RAM.FlashEraseFlag)
21 | {
22 | return REQ_CORR_RECV_RSP_PEND;
23 | }
24 | else
25 | {
26 | pData[0] = 0x71;
27 | pData[4] = ROUTINE_CORR_RSLT; /* correctResult */
28 | *uwLen = 5;
29 | return POS_RSP;
30 | }
31 | }
32 | #endif /* USE_RT_ERASEMEM */
33 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_Callback.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Callback.c
3 | UDS Configuration.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 23th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_CALLBACK_H_
13 | #define _UDS_CALLBACK_H_
14 |
15 | #if USE_ROUTINE_CNTL && USE_RT_ERASEMEM
16 | U8 EraseFlash_Callback(U8 *pData, U16 *uwLen);
17 | #endif
18 |
19 | #endif /* _UDS_CALLBACK_H_ */
20 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_Const.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_Const.h
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_DSI.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_DSI.c
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_Driver.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Driver.h
3 | CAN module object for Microchip STM32F10x microcontroller.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_DRIVER_H_
13 | #define _UDS_DRIVER_H_
14 | #include
15 | #include
16 | #include "bsp.h"
17 |
18 | /* stored in ROM */
19 | #define UDS_CONST_STORAGE const
20 |
21 | #include "UDS_Types.h"
22 |
23 | /* CAN receive initialization */
24 | UDS_ReturnError UDS_CANrxInit(UDS_CANrxBuf_t *rxBuffer, U8 idx,
25 | U32 ident, U32 mask, U8 rtr, U8 ide,
26 | void *object,
27 | UDS_ReturnError (*pFunct)(void *object, UDS_CANrxMsg_t *message, U8 idx));
28 | /* CAN receive Interrupt */
29 | void UDS_CAN_Interrupt(CAN_TypeDef* CANx);
30 |
31 | /* Send CAN message */
32 | UDS_ReturnError UDS_CAN_Send(UDS_CANtxBuf_t *buf);
33 |
34 | #endif /* _UDS_DRIVER_H_ */
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_RDBI.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_RDBI.c
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/UDS/UDS_WDBI.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_WDBI.c
3 | UDS write data by ident.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Mar. 20th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS_Driver.h"
13 | #include "UDS_Config.h"
14 | #include "UDS_Primitive.h"
15 | #include "eeprom.h"
16 |
17 | #if USE_WR_DATA_BYID
18 |
19 | /**
20 | * Find_Wdbi
21 | *
22 | * @param WdbiIdent - Wdbi Identifier.
23 | * errCode - Pointer to errCode.
24 | * @return Pointer of type pointing to found object, NULL if not found.
25 | * @date Mar. 20th 2017
26 | */
27 | UDS_CONST_STORAGE WDBI_t *Find_Wdbi(U16 WdbiIdent, U8 *errCode)
28 | {
29 | UDS_CONST_STORAGE WDBI_t *Wdbi = UDS_NULL;
30 | U16 i;
31 | for(i=0; iAccess&ACCS_DFLT))
44 | {
45 | }
46 | else if(UDS_RAM.Session==ECU_PROG_SESSN && (Wdbi->Access&ACCS_PROG))
47 | {
48 | }
49 | else if(UDS_RAM.Session==ECU_EXT_DIAG_SESSN && (Wdbi->Access&ACCS_EXT_DIAG))
50 | {
51 | }
52 | else
53 | {
54 | /* conditionsNotCorrect */
55 | *errCode = FIND_ERR_COND;
56 | return UDS_NULL;
57 | }
58 | }
59 | else
60 | {
61 | *errCode = FIND_ERR_NULL;
62 | }
63 | return Wdbi;
64 | }
65 |
66 | /**
67 | * WdbiFingerprint
68 | *
69 | * @param pData - Pointer to message data buffer.
70 | * uwLen - Message data length.
71 | * @return POS_RSP - positiveResponse
72 | * RSP_TOOLONG - responseTooLong
73 | * @date Mar. 20th 2017
74 | */
75 | #if USE_WDBI_FINGERPRINT
76 | U8 WdbiFingerprint(U8 *pData, U16 *uwLen)
77 | {
78 | U8 i;
79 | /* Unlock the Flash Program Erase controller */
80 | __disable_irq();
81 | FLASH_Unlock();
82 | U16 uwData;
83 | /* #3 - programmingDate Year (BCD-coded)
84 | #4 - programmingDate Month (BCD-coded)
85 | #5 - programmingDate Date (BCD-coded)
86 | #6 - testerSerialNumber (Byte 1, ASCII)
87 | #7 - testerSerialNumber (Byte 2, ASCII)
88 | ...
89 | #21 - testerSerialNumber (Byte 16, ASCII) */
90 | for(i=0;i<10;i++)
91 | {
92 | uwData = ((U16)pData[i*2+3]<<8)+pData[i*2+4];
93 | EE_WriteVariable(0xF011+i, uwData);
94 | }
95 | FLASH_Lock();
96 | __enable_irq();
97 | *uwLen = 3;
98 | return POS_RSP;
99 | }
100 | #endif /* USE_WDBI_FINGERPRINT */
101 |
102 | #endif /* USE_WR_DATA_BYID */
103 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/app.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - app.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _APP_H_
13 | #define _APP_H_
14 |
15 | #include "UDS.h"
16 | #include "flash.h"
17 | #include "d3des.h"
18 | #include "eeprom.h"
19 |
20 |
21 | /* APP STATES */
22 | typedef enum {
23 | CHECK_EXIT_PROG = 0,
24 | RUN_APP,
25 | ENTER_BOOTLOADER,
26 | RUN_BOOTLOADER,
27 | } TASK_STATES;
28 |
29 | extern volatile TASK_STATES task_states;
30 | extern volatile U32 UDS_timer1ms;
31 |
32 | #endif /* _APP_H_ */
33 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/eeprom_table.h:
--------------------------------------------------------------------------------
1 | /************************************************************************************
2 |
3 | Filename : eeprom_table.h
4 | Content : Map of EEPROM data
5 | Created :
6 | Authors : Nirav Patel
7 |
8 | Copyright : Copyright 2013 Oculus VR, Inc. All Rights reserved.
9 |
10 | Use of this software is subject to the terms of the Oculus license
11 | agreement provided at the time of installation or download, or which
12 | otherwise accompanies this software in either electronic or hard copy form.
13 |
14 | *************************************************************************************/
15 |
16 | #ifndef _EEPROM_TABLE_H_
17 | #define _EEPROM_TABLE_H_
18 |
19 | #include
20 |
21 | #define EE_NUM_ADDR ((uint8_t)1)
22 | #define EE_NUM_OFFSET_BIN (7)
23 | #define EE_OFFSET_BIN_SIZE (4*2)
24 | #define EE_SCALE_MATRIX_SIZE (3*3*2)
25 | #define EE_DISPLAY_INFO_SIZE (52/2)
26 | #define EE_SERIAL_NUM_SIZE (12/2)
27 | #define EE_MAX_CONTIGUOUS (EE_CAL_VERSION+1)
28 |
29 | // The virtual EEPROM implementation uses 16 bit values, so union to a float
30 | typedef union
31 | {
32 | float f;
33 | uint16_t s[2];
34 | } float_pack_t;
35 |
36 | enum {
37 | EE_GYRO_OFF_X_L,
38 | EE_GYRO_OFF_X_H,
39 | EE_GYRO_OFF_Y_L,
40 | EE_GYRO_OFF_Y_H,
41 | EE_GYRO_OFF_Z_L,
42 | EE_GYRO_OFF_Z_H,
43 | EE_GYRO_SCALE_START,
44 | EE_GYRO_SCALE_END = EE_GYRO_SCALE_START + EE_SCALE_MATRIX_SIZE - 1,
45 | EE_ACC_OFF_X_L,
46 | EE_ACC_OFF_X_H,
47 | EE_ACC_OFF_Y_L,
48 | EE_ACC_OFF_Y_H,
49 | EE_ACC_OFF_Z_L,
50 | EE_ACC_OFF_Z_H,
51 | EE_ACC_SC_X_L,
52 | EE_ACC_SC_X_H,
53 | EE_ACC_SC_Y_L,
54 | EE_ACC_SC_Y_H,
55 | EE_ACC_SC_Z_L,
56 | EE_ACC_SC_Z_H,
57 | EE_TEMPERATURE_L,
58 | EE_TEMPERATURE_H,
59 | EE_OFFSET_BIN_START,
60 | EE_OFFSET_BIN_END = EE_OFFSET_BIN_START + EE_NUM_OFFSET_BIN * EE_OFFSET_BIN_SIZE - 1,
61 | EE_ACC_SCALE_START,
62 | EE_ACC_SCALE_END = EE_ACC_SCALE_START + EE_SCALE_MATRIX_SIZE - 1,
63 | EE_DISPLAY_INFO_DISTORTION_TYPE,
64 | EE_DISPLAY_INFO_START,
65 | EE_DISPLAY_INFO_END = EE_DISPLAY_INFO_START + EE_DISPLAY_INFO_SIZE - 1,
66 | EE_SERIAL_SET,
67 | EE_SERIAL_NUM_START,
68 | EE_SERIAL_NUM_END = EE_SERIAL_NUM_START + EE_SERIAL_NUM_SIZE - 1,
69 | EE_CAL_VERSION,
70 | EE_DFU_BOOT = 0x0100,
71 | };
72 |
73 | // Only list addresses that aren't contiguous from 0 here
74 | static const uint16_t ee_addr_table[EE_NUM_ADDR] = {
75 | EE_DFU_BOOT,
76 | };
77 |
78 | #endif /* _EEPROM_TABLE_H_ */
79 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/flash.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - flash.c
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 1th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "flash.h"
13 |
14 | u32 JumpAddress;
15 | pFunction Jump_To_Application;
16 |
17 |
18 | u32 FlashDestination = ApplicationAddress; /* Flash user program offset */
19 |
20 | u32 TotalSize = 0;
21 | u16 PageSize = PAGE_SIZE;
22 | u32 EraseCounter = 0x0;
23 | u8 NbrOfSector = 0;
24 |
25 |
26 | /* Calculate the number of pages */
27 | u32 FLASH_PagesMask(vu32 Size)
28 | {
29 | u32 pagenumber = 0x0;
30 | TotalSize = Size;
31 | u32 size = Size;
32 |
33 | if ((size % PAGE_SIZE) != 0)
34 | {
35 | pagenumber = (size / PAGE_SIZE) + 1;
36 | }
37 | else
38 | {
39 | pagenumber = size / PAGE_SIZE;
40 | }
41 | return pagenumber;
42 |
43 | }
44 |
45 | s8 Flash_Erase (u32 addr, u32 size)
46 | {
47 | FLASH_Status status = FLASH_COMPLETE;
48 | /* Test the size of the image to be sent */
49 | /* Image size is greater than Flash size */
50 | if (size > ApplicationMemorySizeMax)
51 | {
52 | /* End session */
53 | return 0;
54 | }
55 | /* Erase the needed pages where the user application will be loaded */
56 | /* Define the number of page to be erased */
57 | NbrOfSector = FLASH_PagesMask(size);
58 | /* Erase the FLASH pages */
59 | for(EraseCounter = 0; (EraseCounter < NbrOfSector) && (status == FLASH_COMPLETE); EraseCounter++)
60 | {
61 | status = FLASH_ErasePage(addr + (PageSize * EraseCounter));
62 | }
63 | return 1;
64 | }
65 |
66 | s8 Flash_Write (u8 *buf, u32 len)
67 | {
68 | u32 i, RamSource=(u32)buf;
69 | for (i = 0;(i < len) && (FlashDestination < ApplicationAddress + TotalSize);i += 4)
70 | {
71 | /* Program the data into Flash */
72 | FLASH_ProgramWord(FlashDestination, *(u32*)RamSource);
73 | if (*(u32*)FlashDestination != *(u32*)RamSource)
74 | {
75 | /* End session */
76 | return 0;
77 | }
78 | FlashDestination += 4;
79 | RamSource += 4;
80 | }
81 | return 1;
82 | }
83 |
84 |
85 |
86 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/flash.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - flash.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 1th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _FLASH_H_
13 | #define _FLASH_H_
14 | #include
15 | #include "bsp.h"
16 | #include "stm32f10x_flash.h"
17 | #define ApplicationAddress 0x08004000
18 | #define ApplicationMemorySizeMax 0x0001B800
19 |
20 | typedef void (*pFunction)(void);
21 | extern u32 JumpAddress;
22 | extern pFunction Jump_To_Application;
23 |
24 |
25 | extern u32 TotalSize;
26 |
27 | s8 Flash_Erase (u32 addr, u32 size);
28 | s8 Flash_Write (u8 *buf, u32 len);
29 |
30 | #endif
31 |
--------------------------------------------------------------------------------
/STM32/Project_UDSAPP_V1/20170328/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_IT_H
24 | #define __STM32F10x_IT_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f10x.h"
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 | /* Exported constants --------------------------------------------------------*/
35 | /* Exported macro ------------------------------------------------------------*/
36 | /* Exported functions ------------------------------------------------------- */
37 |
38 | void NMI_Handler(void);
39 | void HardFault_Handler(void);
40 | void MemManage_Handler(void);
41 | void BusFault_Handler(void);
42 | void UsageFault_Handler(void);
43 | void SVC_Handler(void);
44 | void DebugMon_Handler(void);
45 | void PendSV_Handler(void);
46 | void SysTick_Handler(void);
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32F10x_IT_H */
53 |
54 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1-待完善说明.txt:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1-待完善说明.txt
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/CAN/CAN_Pub.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - CAN_Pub.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _CAN_PUB_H_
13 | #define _CAN_PUB_H_
14 |
15 | /* Declare the external default value of the m_eComMode variable */
16 | extern const tCanMode m_eCanModeDefaultValue;
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/CAN/SDF_Types.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - SDF_Types.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _SDF_TYPES_H_
13 | #define _SDF_TYPES_H_
14 |
15 | /*SDF 8 bytes variables values*/
16 | #define SDF_U8_VALUE1 0x69U
17 | #define SDF_U8_VALUE2 0x96U
18 | #define SDF_U8_VALUE3 0xC3U
19 | #define SDF_U8_VALUE4 0x3CU
20 | #define SDF_U8_VALUE5 0xAAU
21 | #define SDF_U8_VALUE6 0x55U
22 |
23 | /*SDF 16 bytes variables values*/
24 | #define SDF_U16_VALUE1 0x6969U
25 | #define SDF_U16_VALUE2 0x9669U
26 | #define SDF_U16_VALUE3 0xC369U
27 | #define SDF_U16_VALUE4 0x3C69U
28 | #define SDF_U16_VALUE5 0xAA69U
29 | #define SDF_U16_VALUE6 0x5569U
30 | #define SDF_U16_VALUE7 0x6996U
31 | #define SDF_U16_VALUE8 0x9696U
32 | #define SDF_U16_VALUE9 0xC396U
33 | #define SDF_U16_VALUE10 0x3C96U
34 | #define SDF_U16_VALUE11 0xAA96U
35 | #define SDF_U16_VALUE12 0x5596U
36 | #define SDF_U16_VALUE13 0x69C3U
37 | #define SDF_U16_VALUE14 0x96C3U
38 | #define SDF_U16_VALUE15 0xC3C3U
39 | #define SDF_U16_VALUE16 0x3CC3U
40 | #define SDF_U16_VALUE17 0xAAC3U
41 | #define SDF_U16_VALUE18 0x55C3U
42 | #define SDF_U16_VALUE19 0x693CU
43 | #define SDF_U16_VALUE20 0x963CU
44 | #define SDF_U16_VALUE21 0xC33CU
45 | #define SDF_U16_VALUE22 0x3C3CU
46 | #define SDF_U16_VALUE23 0xAA3CU
47 | #define SDF_U16_VALUE24 0x553CU
48 | #define SDF_U16_VALUE25 0x69AAU
49 | #define SDF_U16_VALUE26 0x96AAU
50 | #define SDF_U16_VALUE27 0xC3AAU
51 | #define SDF_U16_VALUE28 0x3CAAU
52 | #define SDF_U16_VALUE29 0xAAAAU
53 | #define SDF_U16_VALUE30 0x55AAU
54 | #define SDF_U16_VALUE31 0x6955U
55 | #define SDF_U16_VALUE32 0x9655U
56 | #define SDF_U16_VALUE33 0xC355U
57 | #define SDF_U16_VALUE34 0x3C55U
58 | #define SDF_U16_VALUE35 0xAA55U
59 | #define SDF_U16_VALUE36 0x5555U
60 |
61 | #endif
62 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/CRC32.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1/20170328/CRC32.c
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/CRC32.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - CRC32.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _CRC32_H_
13 | #define _CRC32_H_
14 | #include "bsp.h"
15 |
16 | #define CRC32_POLYNOMIAL ((uint32_t)0xEDB88320)
17 | #define RCC_CRC_BIT ((uint32_t)0x00001000)
18 |
19 | #define USE_BIG_ENDIAN 0U
20 |
21 | u32 CRC32_ForBytes(u8 *pData,u32 uLen);
22 |
23 | #endif /* _CRC32_H_ */
24 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/1_0R/Obj/app.pbi:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1/20170328/EWARM/1_0R/Obj/app.pbi
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/20170328.eww:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 | $WS_DIR$\Project.ewp
6 |
7 |
8 |
9 |
10 |
11 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/20170322_ZB1000_Beta1_0.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 258 113 1698 975 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/20170328.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 185 67 1625 987 1
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/ACCharger1.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 639 192 2079 952 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/CAN_IAP.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 461 169 1541 849 1
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103xB.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103xB" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0D.general.xcl" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0D.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0D.general.xcl" "--debug_file=%1" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0D.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0D.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\CONFIG\debugger\ST\STM32F103x8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103x8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0D.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armjlink.dll"
4 |
5 | "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20170328\EWARM\1_0D\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%~1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\New folder (2)\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0R.general.xcl" --backend -f "D:\GreenBox\New folder (2)\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0R.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\common\bin\cspybat" -f "D:\GreenBox\New folder (2)\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0R.general.xcl" "--debug_file=%~1" --backend -f "D:\GreenBox\New folder (2)\STM32\Project_UDSBL_V1\20170328\EWARM\settings\Project.1_0R.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0R.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\CONFIG\debugger\ST\STM32F103V8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103V8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_0R.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armjlink2.dll"
4 |
5 | "D:\GreenBox\New folder (2)\STM32\Project_UDSBL_V1\20170328\EWARM\1_0R\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.5\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.general.xcl" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.general.xcl" "--debug_file=%1" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\settings\Project.1_1D.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1D.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\CONFIG\debugger\ST\STM32F103x8.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103x8"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1D.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armjlink.dll"
4 |
5 | "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1\20161217\EWARM\1_1D\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | @echo off
23 |
24 | if not "%1" == "" goto debugFile
25 |
26 | @echo on
27 |
28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.general.xcl" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.driver.xcl"
29 |
30 | @echo off
31 | goto end
32 |
33 | :debugFile
34 |
35 | @echo on
36 |
37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.general.xcl" "--debug_file=%1" --backend -f "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\settings\Project.1_1R.driver.xcl"
38 |
39 | @echo off
40 | :end
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1R.driver.xcl:
--------------------------------------------------------------------------------
1 | "--endian=little"
2 |
3 | "--cpu=Cortex-M3"
4 |
5 | "--fpu=None"
6 |
7 | "-p"
8 |
9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\CONFIG\debugger\ST\STM32F103xB.ddf"
10 |
11 | "--drv_verify_download"
12 |
13 | "--semihosting"
14 |
15 | "--device=STM32F103xB"
16 |
17 | "--drv_communication=USB0"
18 |
19 | "--drv_interface_speed=auto"
20 |
21 | "--jlink_initial_speed=32"
22 |
23 | "--jlink_reset_strategy=0,0"
24 |
25 | "--drv_interface=SWD"
26 |
27 | "--drv_catch_exceptions=0x000"
28 |
29 | "--drv_swo_clock_setup=72000000,0,2000000"
30 |
31 |
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.1_1R.general.xcl:
--------------------------------------------------------------------------------
1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armproc.dll"
2 |
3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armjlink.dll"
4 |
5 | "E:\2017\DUNEN\UDS\code\STM32\Project_UDSBL_V1_20161217\EWARM\1_1R\Exe\Project.out"
6 |
7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\bin\armbat.dll"
8 |
9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.2\arm\config\debugger\ST\STM32F1xx_XL.dmac"
10 |
11 |
12 |
13 |
14 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.ACCHARGER1D.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.ACCHARGER1R.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.ZXCTERM.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.ZXCTERMD.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.ZXCTERMR.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\config\debugger\ST\STM32F1xx_XL.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.crun:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 1
5 |
6 |
7 | *
8 | *
9 | *
10 | 0
11 | 1
12 |
13 |
14 |
15 |
16 |
17 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project.cspy.bat:
--------------------------------------------------------------------------------
1 | @REM This batch file has been generated by the IAR Embedded Workbench
2 | @REM C-SPY Debugger, as an aid to preparing a command line for running
3 | @REM the cspybat command line utility using the appropriate settings.
4 | @REM
5 | @REM Note that this file is generated every time a new debug session
6 | @REM is initialized, so you may want to move or rename the file before
7 | @REM making changes.
8 | @REM
9 | @REM You can launch cspybat by typing the name of this batch file followed
10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
11 | @REM
12 | @REM Read about available command line parameters in the C-SPY Debugging
13 | @REM Guide. Hints about additional command line parameters that may be
14 | @REM useful in specific cases:
15 | @REM --download_only Downloads a code image without starting a debug
16 | @REM session afterwards.
17 | @REM --silent Omits the sign-on message.
18 | @REM --timeout Limits the maximum allowed execution time.
19 | @REM
20 |
21 |
22 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armjlink.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\bin\armbat.dll" --macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\ST\Trace_STM32F1xx.dmac" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 6.5\arm\CONFIG\debugger\ST\STM32F103x8.ddf" "--drv_verify_download" "--semihosting" "--device=STM32F103x8" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
23 |
24 |
25 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_1_0.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_1_0D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ForceImpTypeAny = 0
3 | ShowInfoWin = 1
4 | EnableFlashBP = 2
5 | BPDuringExecution = 0
6 | [CFI]
7 | CFISize = 0x00
8 | CFIAddr = 0x00
9 | [CPU]
10 | OverrideMemMap = 0
11 | AllowSimulation = 1
12 | ScriptFile=""
13 | [FLASH]
14 | CacheExcludeSize = 0x00
15 | CacheExcludeAddr = 0x00
16 | MinNumBytesFlashDL = 0
17 | SkipProgOnCRCMatch = 1
18 | VerifyDownload = 1
19 | AllowCaching = 1
20 | EnableFlashDL = 2
21 | Override = 0
22 | Device="UNSPECIFIED"
23 | [GENERAL]
24 | WorkRAMSize = 0x00
25 | WorkRAMAddr = 0x00
26 | RAMUsageLimit = 0x00
27 | [SWO]
28 | SWOLogFile=""
29 | [MEM]
30 | RdOverrideOrMask = 0x00
31 | RdOverrideAndMask = 0xFFFFFFFF
32 | RdOverrideAddr = 0xFFFFFFFF
33 | WrOverrideOrMask = 0x00
34 | WrOverrideAndMask = 0xFFFFFFFF
35 | WrOverrideAddr = 0xFFFFFFFF
36 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_1_0R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_1_1D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_1_1R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ACCHARGER1.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ACCHARGER1D.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ACCHARGER1R.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_CONTROLLER2_6_BSP.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_CONTROLLER2_6_BSP_OFFSET.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_PORT103V-BSP.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_STM3210E-EVAL.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ZXCTERM.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ZXCTERMD.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_ZXCTERMR.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/Project_aaa.jlink:
--------------------------------------------------------------------------------
1 | [BREAKPOINTS]
2 | ShowInfoWin = 1
3 | EnableFlashBP = 2
4 | BPDuringExecution = 0
5 | [CFI]
6 | CFISize = 0x00
7 | CFIAddr = 0x00
8 | [CPU]
9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | CacheExcludeSize = 0x00
14 | CacheExcludeAddr = 0x00
15 | MinNumBytesFlashDL = 0
16 | SkipProgOnCRCMatch = 1
17 | VerifyDownload = 1
18 | AllowCaching = 1
19 | EnableFlashDL = 2
20 | Override = 0
21 | Device="UNSPECIFIED"
22 | [GENERAL]
23 | WorkRAMSize = 0x00
24 | WorkRAMAddr = 0x00
25 | RAMUsageLimit = 0x00
26 | [SWO]
27 | SWOLogFile=""
28 | [MEM]
29 | RdOverrideOrMask = 0x00
30 | RdOverrideAndMask = 0xFFFFFFFF
31 | RdOverrideAddr = 0xFFFFFFFF
32 | WrOverrideOrMask = 0x00
33 | WrOverrideAndMask = 0xFFFFFFFF
34 | WrOverrideAddr = 0xFFFFFFFF
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/UDSBL_V1_20161217.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 328 120 1637 995 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/UDSBL_V1_20170124.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 328 120 1637 995 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/UDSBL_V1_20170209.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 234 234 1674 993 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/UDSBL_V1_20170216.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 66 13 1506 772 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/UDSBL_V1_20170301.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 218 105 1658 864 2
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/settings/ZXCTERM.wspos:
--------------------------------------------------------------------------------
1 | [MainWindow]
2 | WindowPlacement=_ 240 140 1680 900 3
3 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/stm32f10x_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08003FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x200;
13 | define symbol __ICFEDIT_size_heap__ = 0x0;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/stm32f10x_flash_extsram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x68000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x680FFFFF;
11 |
12 | /*-Sizes-*/
13 | define symbol __ICFEDIT_size_cstack__ = 0x400;
14 | define symbol __ICFEDIT_size_heap__ = 0x200;
15 | /**** End of ICF editor section. ###ICF###*/
16 |
17 |
18 | define memory mem with size = 4G;
19 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
20 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; /* EXTSRAM_region */
21 |
22 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
23 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
24 |
25 | initialize by copy { readwrite };
26 | do not initialize { section .noinit };
27 |
28 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
29 |
30 | place in ROM_region { readonly };
31 | place in RAM_region {readwrite, block CSTACK, block HEAP }; /* EXTSRAM_region */
32 |
33 |
34 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/stm32f10x_flash_offset.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08004000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08004000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/stm32f10x_nor.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x64000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x64000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x64FFFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/EWARM/stm32f10x_ram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/TP/TP_Cbk.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cbk.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _TP_CBK_H_
13 | #define _TP_CBK_H_
14 | #include "stm32f10x.h"
15 |
16 | /*******************************************************************************
17 | *
18 | * Public Function Prototypes
19 | *
20 | */
21 |
22 | void TP_TxConf (tTpMsgIdx uMsgIdx, u8 ebStatus);
23 | void TP_RxInd (tTpMsgIdx uMsgIdx, u8 ebStatus);
24 |
25 | void TP_DataBufferEmptyInd (tTpMsgIdx uMsgIdx);
26 | void TP_RxEnableInd (tTpMsgIdx uMsgIdx, tTpRxEnable uRxEnable);
27 |
28 | #endif
29 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/TP/TP_Cfg.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cfg.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 |
13 | #include "TP_Cfg.h"
14 | #include "TP_Pub.h"
15 | #define NCS_PRI_VAR
16 |
17 |
18 | /* COM frames index definition (COM_Cfg.h) */
19 | /**********************************************
20 | * Frames for configuration: 0*
21 | **********************************************/
22 | #define COM_FRAME_IDX_Diag_BCM_RQ_0x722 0U
23 | #define COM_FRAME_IDX_Diag_Fun_0x7DF 1U
24 | #define COM_FRAME_IDX_Diag_BCM_Rsp_0x723 2U
25 |
26 | NCS_PRI_VAR u8 aubDiag1Data[TP_DIAG_MSG_1_DATA_MAX];
27 | NCS_PRI_VAR u8 aubDiag2Data[TP_DIAG_MSG_2_DATA_MAX];
28 |
29 | const tTpMsgCfg m_astTpMsgCfg[TP_MSG_MAX] =
30 | {
31 | {COM_FRAME_IDX_Diag_BCM_Rsp_0x723, COM_FRAME_IDX_Diag_BCM_RQ_0x722, aubDiag1Data, aubDiag1Data, 300U, (150U / TP_MANAGE_PERIOD), (150U / TP_MANAGE_PERIOD), 1U , 0U, (TP_MSG_MODE_HALF_DUPLEX |TP_MSG_STMIN_FULL | TP_MSG_TYPE_DIAG | TP_MSG_RELOAD_FALSE | TP_MSG_PADDING_TRUE | TP_MSG_RETRANSMISSION_FALSE), 10U},
32 | {COM_FRAME_IDX_Diag_BCM_Rsp_0x723, COM_FRAME_IDX_Diag_Fun_0x7DF, aubDiag2Data, aubDiag2Data, 300U, (150U / TP_MANAGE_PERIOD), (150U / TP_MANAGE_PERIOD), 1U , 0U, (TP_MSG_MODE_HALF_DUPLEX |TP_MSG_STMIN_FULL | TP_MSG_TYPE_DIAG | TP_MSG_RELOAD_FALSE | TP_MSG_PADDING_TRUE | TP_MSG_RETRANSMISSION_FALSE), 10U},
33 | };
34 |
35 |
36 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/TP/TP_Cfg.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - TP_Cfg.h
3 | This is common module for body netword
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: Byron
9 | Date: 2017/01/01
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _TP_CFG_H_
13 | #define _TP_CFG_H_
14 | #include "TP_Types.h"
15 |
16 | /*******************************************************************************
17 | *
18 | * Configuration Constants
19 | *
20 | */
21 |
22 | /* used in order to set the CAN type */
23 | #define TP_EB_PSA_CAN_LS_2010 0U
24 | #define TP_EB_PSA_CAN_HS_IS_2010 1U
25 | #define TP_EB_PSA_CAN_HS_M_2010 2U
26 | #define TP_EB_ISO 3U
27 |
28 | #define TP_EB_CAN_TYPE TP_EB_ISO
29 |
30 | /* TP messages number managed by this software layer */
31 | /* Range : (0 .. 2^32) */
32 | #define TP_MSG_MAX 2U
33 |
34 | #ifdef NCS_UNITARY_TEST
35 | /* Transport Protocol messages configuration, stored in Read-Only memory */
36 | extern u16 m_aubRxEnableCnt[TP_MSG_MAX];
37 | #endif
38 | extern const tTpMsgCfg m_astTpMsgCfg[TP_MSG_MAX];
39 |
40 |
41 | #define TP_DIAG_MSG_1_DATA_MAX 300U
42 | #define TP_DIAG_MSG_2_DATA_MAX 300U
43 | /* Communication dynamic frames in reception management authorization */
44 | #ifdef COM_TX_DYNAMIC_FRAME_MAX_RAM
45 | #define TP_COM_TX_DYNAMIC_FRAME_MAX COM_TX_DYNAMIC_FRAME_MAX_RAM
46 | #else
47 | /* For compatibility with previous version of COM module */
48 | #define TP_COM_TX_DYNAMIC_FRAME_MAX COM_TX_DYNAMIC_FRAME_MAX
49 | #endif
50 |
51 | /* TP messages index definition (TP_Cfg.h)*/
52 | #define TP_MSG_IDX_Diag_BCM_Phy_RQ 0U
53 | #define TP_MSG_IDX_Diag_BCM_Fun_RQ 1U
54 |
55 | #endif
56 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/EncryptAlg1.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - EncryptAlg1.c
3 | Encryption algorithm.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 16th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS_Driver.h"
13 | #include "UDS_Config.h"
14 | #include "EncryptAlg1.h"
15 |
16 | /**
17 | * seedToKeyLevel1
18 | *
19 | * @param Seed - random seed
20 | * ECU_MASK - encryption parameters
21 | * @return encryption key
22 | * @date Jan. 18th 2017
23 | */
24 | U32 seedToKeyLevel1(U32 Seed , U32 Mask)
25 | {
26 | U32 Key = 0;
27 | U8 i = 0;
28 | if(Seed != 0)
29 | {
30 | for(i=0; i< 35; i++)
31 | {
32 | if(Seed & 0x80000000)
33 | {
34 | Seed = Seed<<1;
35 | Seed = Seed^Mask;
36 | }
37 | else
38 | {
39 | Seed = Seed<<1;
40 | }
41 | }
42 | Key = Seed;
43 | }
44 | return Key;
45 | }
46 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/EncryptAlg1.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - EncryptAlg1.h
3 | Encryption algorithm.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 16th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _ENCRYPTALG1_H_
13 | #define _ENCRYPTALG1_H_
14 | U32 seedToKeyLevel1(U32 Seed , U32 Mask);
15 | #endif /* _ENCRYPTALG1_H_ */
16 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/UDS_Callback.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Callback.c
3 | UDS Configuration.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 23th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS_Driver.h"
13 | #include "UDS_Config.h"
14 | #include "UDS_Primitive.h"
15 | #include "UDS_Callback.h"
16 |
17 | #if USE_ROUTINE_CNTL && USE_RT_ERASEMEM
18 | U8 EraseFlash_Callback(U8 *pData, U16 *uwLen)
19 | {
20 | if(UDS_RAM.FlashEraseFlag)
21 | {
22 | return REQ_CORR_RECV_RSP_PEND;
23 | }
24 | else
25 | {
26 | pData[0] = 0x71;
27 | pData[4] = ROUTINE_CORR_RSLT; /* correctResult */
28 | *uwLen = 5;
29 | return POS_RSP;
30 | }
31 | }
32 | #endif /* USE_RT_ERASEMEM */
33 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/UDS_Callback.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Callback.c
3 | UDS Configuration.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Feb. 23th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_CALLBACK_H_
13 | #define _UDS_CALLBACK_H_
14 |
15 | #if USE_ROUTINE_CNTL && USE_RT_ERASEMEM
16 | U8 EraseFlash_Callback(U8 *pData, U16 *uwLen);
17 | #endif
18 |
19 | #endif /* _UDS_CALLBACK_H_ */
20 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/UDS_Const.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1/20170328/UDS/UDS_Const.h
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/UDS_DSI.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1/20170328/UDS/UDS_DSI.c
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/UDS/UDS_Driver.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_Driver.h
3 | CAN module object for Microchip STM32F10x microcontroller.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_DRIVER_H_
13 | #define _UDS_DRIVER_H_
14 | #include
15 | #include
16 | #include "bsp.h"
17 |
18 | /* stored in ROM */
19 | #define UDS_CONST_STORAGE const
20 |
21 | #include "UDS_Types.h"
22 |
23 | /* CAN receive initialization */
24 | UDS_ReturnError UDS_CANrxInit(UDS_CANrxBuf_t *rxBuffer, U8 idx,
25 | U32 ident, U32 mask, U8 rtr, U8 ide,
26 | void *object,
27 | UDS_ReturnError (*pFunct)(void *object, UDS_CANrxMsg_t *message, U8 idx));
28 | /* CAN receive Interrupt */
29 | void UDS_CAN_Interrupt(CAN_TypeDef* CANx);
30 |
31 | /* Send CAN message */
32 | UDS_ReturnError UDS_CAN_Send(UDS_CANtxBuf_t *buf);
33 |
34 | #endif /* _UDS_DRIVER_H_ */
35 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/app.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - app.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _APP_H_
13 | #define _APP_H_
14 |
15 | #include "UDS.h"
16 | #include "UDS_Const.h"
17 | #include "flash.h"
18 | #include "d3des.h"
19 | #include "eeprom.h"
20 |
21 |
22 | /* APP STATES */
23 | typedef enum {
24 | CHECK_EXIT_PROG = 0,
25 | RUN_APP,
26 | ENTER_BOOTLOADER,
27 | RUN_BOOTLOADER,
28 | } TASK_STATES;
29 |
30 | extern volatile TASK_STATES task_states;
31 | extern volatile U32 UDS_timer1ms;
32 |
33 | #define PARTICULAR_CAN_RX_ID 0x602
34 | #define PARTICULAR_CAN_TX_ID 0x6D2
35 |
36 | #endif /* _APP_H_ */
37 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/eeprom_table.h:
--------------------------------------------------------------------------------
1 | /************************************************************************************
2 |
3 | Filename : eeprom_table.h
4 | Content : Map of EEPROM data
5 | Created :
6 | Authors : Nirav Patel
7 |
8 | Copyright : Copyright 2013 Oculus VR, Inc. All Rights reserved.
9 |
10 | Use of this software is subject to the terms of the Oculus license
11 | agreement provided at the time of installation or download, or which
12 | otherwise accompanies this software in either electronic or hard copy form.
13 |
14 | *************************************************************************************/
15 |
16 | #ifndef _EEPROM_TABLE_H_
17 | #define _EEPROM_TABLE_H_
18 |
19 | #include
20 |
21 | #define EE_NUM_ADDR ((uint8_t)1)
22 | #define EE_NUM_OFFSET_BIN (7)
23 | #define EE_OFFSET_BIN_SIZE (4*2)
24 | #define EE_SCALE_MATRIX_SIZE (3*3*2)
25 | #define EE_DISPLAY_INFO_SIZE (52/2)
26 | #define EE_SERIAL_NUM_SIZE (12/2)
27 | #define EE_MAX_CONTIGUOUS (EE_CAL_VERSION+1)
28 |
29 | // The virtual EEPROM implementation uses 16 bit values, so union to a float
30 | typedef union
31 | {
32 | float f;
33 | uint16_t s[2];
34 | } float_pack_t;
35 |
36 | enum {
37 | EE_GYRO_OFF_X_L,
38 | EE_GYRO_OFF_X_H,
39 | EE_GYRO_OFF_Y_L,
40 | EE_GYRO_OFF_Y_H,
41 | EE_GYRO_OFF_Z_L,
42 | EE_GYRO_OFF_Z_H,
43 | EE_GYRO_SCALE_START,
44 | EE_GYRO_SCALE_END = EE_GYRO_SCALE_START + EE_SCALE_MATRIX_SIZE - 1,
45 | EE_ACC_OFF_X_L,
46 | EE_ACC_OFF_X_H,
47 | EE_ACC_OFF_Y_L,
48 | EE_ACC_OFF_Y_H,
49 | EE_ACC_OFF_Z_L,
50 | EE_ACC_OFF_Z_H,
51 | EE_ACC_SC_X_L,
52 | EE_ACC_SC_X_H,
53 | EE_ACC_SC_Y_L,
54 | EE_ACC_SC_Y_H,
55 | EE_ACC_SC_Z_L,
56 | EE_ACC_SC_Z_H,
57 | EE_TEMPERATURE_L,
58 | EE_TEMPERATURE_H,
59 | EE_OFFSET_BIN_START,
60 | EE_OFFSET_BIN_END = EE_OFFSET_BIN_START + EE_NUM_OFFSET_BIN * EE_OFFSET_BIN_SIZE - 1,
61 | EE_ACC_SCALE_START,
62 | EE_ACC_SCALE_END = EE_ACC_SCALE_START + EE_SCALE_MATRIX_SIZE - 1,
63 | EE_DISPLAY_INFO_DISTORTION_TYPE,
64 | EE_DISPLAY_INFO_START,
65 | EE_DISPLAY_INFO_END = EE_DISPLAY_INFO_START + EE_DISPLAY_INFO_SIZE - 1,
66 | EE_SERIAL_SET,
67 | EE_SERIAL_NUM_START,
68 | EE_SERIAL_NUM_END = EE_SERIAL_NUM_START + EE_SERIAL_NUM_SIZE - 1,
69 | EE_CAL_VERSION,
70 | EE_DFU_BOOT = 0x0100,
71 | };
72 |
73 | // Only list addresses that aren't contiguous from 0 here
74 | static const uint16_t ee_addr_table[EE_NUM_ADDR] = {
75 | EE_DFU_BOOT,
76 | };
77 |
78 | #endif /* _EEPROM_TABLE_H_ */
79 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/flash.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - flash.c
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 1th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "flash.h"
13 |
14 | u32 JumpAddress;
15 | pFunction Jump_To_Application;
16 |
17 |
18 | u32 FlashDestination = ApplicationAddress; /* Flash user program offset */
19 |
20 | u32 TotalSize = 0;
21 | u16 PageSize = PAGE_SIZE;
22 | u32 EraseCounter = 0x0;
23 | u8 NbrOfSector = 0;
24 |
25 |
26 | /* Calculate the number of pages */
27 | u32 FLASH_PagesMask(vu32 Size)
28 | {
29 | u32 pagenumber = 0x0;
30 | TotalSize = Size;
31 | u32 size = Size;
32 |
33 | if ((size % PAGE_SIZE) != 0)
34 | {
35 | pagenumber = (size / PAGE_SIZE) + 1;
36 | }
37 | else
38 | {
39 | pagenumber = size / PAGE_SIZE;
40 | }
41 | return pagenumber;
42 |
43 | }
44 |
45 | s8 Flash_Erase (u32 addr, u32 size)
46 | {
47 | FLASH_Status status = FLASH_COMPLETE;
48 | /* Test the size of the image to be sent */
49 | /* Image size is greater than Flash size */
50 | if (size > ApplicationMemorySizeMax)
51 | {
52 | /* End session */
53 | return 0;
54 | }
55 | /* Erase the needed pages where the user application will be loaded */
56 | /* Define the number of page to be erased */
57 | NbrOfSector = FLASH_PagesMask(size);
58 | /* Erase the FLASH pages */
59 | for(EraseCounter = 0; (EraseCounter < NbrOfSector) && (status == FLASH_COMPLETE); EraseCounter++)
60 | {
61 | status = FLASH_ErasePage(addr + (PageSize * EraseCounter));
62 | }
63 | return 1;
64 | }
65 |
66 | s8 Flash_Write (u8 *buf, u32 len)
67 | {
68 | u32 i, RamSource=(u32)buf;
69 | for (i = 0;(i < len) && (FlashDestination < ApplicationAddress + TotalSize);i += 4)
70 | {
71 | /* Program the data into Flash */
72 | FLASH_ProgramWord(FlashDestination, *(u32*)RamSource);
73 | if (*(u32*)FlashDestination != *(u32*)RamSource)
74 | {
75 | /* End session */
76 | return 0;
77 | }
78 | FlashDestination += 4;
79 | RamSource += 4;
80 | }
81 | return 1;
82 | }
83 |
84 |
85 |
86 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/flash.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - flash.h
3 |
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 1th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _FLASH_H_
13 | #define _FLASH_H_
14 | #include
15 | #include "bsp.h"
16 | #include "stm32f10x_flash.h"
17 | #define ApplicationAddress 0x08004000
18 | #define ApplicationMemorySizeMax 0x0001B800
19 |
20 | typedef void (*pFunction)(void);
21 | extern u32 JumpAddress;
22 | extern pFunction Jump_To_Application;
23 |
24 |
25 | extern u32 TotalSize;
26 |
27 | s8 Flash_Erase (u32 addr, u32 size);
28 | s8 Flash_Write (u8 *buf, u32 len);
29 |
30 | #endif
31 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/20170328/stm32f10x_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_IT_H
24 | #define __STM32F10x_IT_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f10x.h"
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 | /* Exported constants --------------------------------------------------------*/
35 | /* Exported macro ------------------------------------------------------------*/
36 | /* Exported functions ------------------------------------------------------- */
37 |
38 | void NMI_Handler(void);
39 | void HardFault_Handler(void);
40 | void MemManage_Handler(void);
41 | void BusFault_Handler(void);
42 | void UsageFault_Handler(void);
43 | void SVC_Handler(void);
44 | void DebugMon_Handler(void);
45 | void PendSV_Handler(void);
46 | void SysTick_Handler(void);
47 |
48 | #ifdef __cplusplus
49 | }
50 | #endif
51 |
52 | #endif /* __STM32F10x_IT_H */
53 |
54 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
55 |
--------------------------------------------------------------------------------
/STM32/Project_UDSBL_V1/readme.txt:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/GreenBoxNewEnergy/UDS_BootLoader/2a68159281beae69d9e1b3931f6aac0bed621d51/STM32/Project_UDSBL_V1/readme.txt
--------------------------------------------------------------------------------
/STM32/Utilities/Dunen_Lib/UDS_V1.00/UDS.c:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS.c
3 | Unified diagnostic services.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #include "UDS.h"
13 |
14 | UDS_t UDS_handles;
15 | NWS_t NWS_handles;
16 |
17 | /**
18 | * Initializes UDS
19 | *
20 | * @param ppUDS - Pointer to address of UDS object .
21 | * @return UDS_ReturnError:
22 | * UDS_ERROR_NO - Operation completed successfully.
23 | * @date Jan. 21th 2017
24 | */
25 | UDS_ReturnError UDS_Init(UDS_t **ppUDS)
26 | {
27 | UDS_t *UDS;
28 | (*ppUDS) = &UDS_handles;
29 | UDS = *ppUDS; //pointer to (newly created) object
30 |
31 | UDS->UDS_RAM = &UDS_RAM;
32 |
33 | NWS_Init(&UDS->NWS);
34 |
35 | return UDS_ERROR_NO;
36 | }
37 |
38 | /**
39 | * Process UDS objects
40 | *
41 | * @param UDS - Pointer to UDS object .
42 | * timeStamp - Time interval.
43 | * @return UDS_ReturnError:
44 | * UDS_ERROR_NO - Operation completed successfully.
45 | * @node Function must be called cyclically.
46 | * @date Jan. 23th 2017
47 | */
48 | UDS_ReturnError UDS_Process(UDS_t *UDS, U32 timeStamp)
49 | {
50 | NWS_Process(UDS->NWS, timeStamp);
51 | UDS_APP_Process(timeStamp);
52 | return UDS_ERROR_NO;
53 | }
54 |
--------------------------------------------------------------------------------
/STM32/Utilities/Dunen_Lib/UDS_V1.00/UDS.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS.h
3 | Unified diagnostic services.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_H_
13 | #define _UDS_H_
14 | #include "UDS_Driver.h"
15 | #include "UDS_Config.h"
16 | #include "UDS_Primitive.h"
17 | #include "UDS_NWS.h"
18 | #if UDS_MASTER == UDS_TRUE
19 | #include "UDS_Master.h"
20 | #endif
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif /* __cplusplus */
25 |
26 | typedef struct {
27 | NWS_t *NWS;
28 | s_UDS_RAM *UDS_RAM;
29 | } UDS_t;
30 |
31 | /* Initializes UDS */
32 | UDS_ReturnError UDS_Init(UDS_t **ppUDS);
33 | /* Process CAN objects */
34 | UDS_ReturnError UDS_Process(UDS_t *UDS, U32 timeStamp);
35 |
36 |
37 | #ifdef __cplusplus
38 | }
39 | #endif /* __cplusplus */
40 |
41 | #endif /* _UDS_H_ */
42 |
--------------------------------------------------------------------------------
/STM32/Utilities/Dunen_Lib/UDS_V1.00/UDS_NWS.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************
2 | File - UDS_NWS.h
3 | Network layer services.
4 | Copyright (C) 2017 Dunen; Nanjing
5 | All rights reserved. Protected by international copyright laws.
6 | */
7 | /*
8 | Author: WenHui Wu
9 | Date: Jan. 24th 2017
10 | Version: V1.0.0
11 | *******************************************************************************/
12 | #ifndef _UDS_NWS_H_
13 | #define _UDS_NWS_H_
14 |
15 | #ifdef __cplusplus
16 | extern "C" {
17 | #endif /* __cplusplus */
18 |
19 | /* Flow Control Flow Status definition */
20 | #define NWS_FS_CLEAR_TO_SEND 0U
21 | #define NWS_FS_WAIT 1U
22 | #define NWS_FS_OVERFLOW 2U
23 |
24 | #define GET_MSG_RX(idx) NWS->pUDS_CFGS[idx].pNWS_MSG->pMSG_RX
25 | #define GET_MSG_TX(idx) NWS->pUDS_CFGS[idx].pNWS_MSG->pMSG_TX
26 | #define GET_MSG_TIM(idx) NWS->pUDS_CFGS[idx].pNWS_MSG->pMSG_TIM
27 |
28 | #define GET_CAN_RX(idx) NWS->pUDS_CFGS[idx].pCANrxBuf
29 | #define GET_CAN_TX(idx) NWS->pUDS_CFGS[idx].pCANtxBuf
30 |
31 | #define RX_N_PCI_IDX(i) NWS->pUDS_CFGS[i].pCANrxBuf->N_PCI_OFFSET
32 | #define TX_N_PCI_IDX(i) NWS->pUDS_CFGS[i].pCANtxBuf->N_PCI_OFFSET
33 |
34 | typedef struct s_NWS NWS_t;
35 |
36 | struct s_NWS{
37 | UDS_CONST_STORAGE s_UDS_CFGS *pUDS_CFGS;
38 | UDS_RX_LONG_RSP_t *pUDS_RX_LONG_RSP;
39 | N_PDU_t *pN_PDU_in;
40 | N_PDU_t *pN_PDU_out;
41 | };
42 |
43 | /* Read received message from CAN */
44 | UDS_ReturnError NWS_Receive(void *object, UDS_CANrxMsg_t *msg, U8 idxf);
45 | /* Stop TP message transmission */
46 | void NWS_AbortMsg(NWS_t *NWS, U8 msgIdx);
47 | /* Send CAN message */
48 | UDS_ReturnError NWS_SendFrame(UDS_CANtxBuf_t *buf);
49 | /* Message transmission buffer update */
50 | void NWS_SetTxMsgData(NWS_MSG_TX_t *pMsg, U8 *pData, U16 uwLen);
51 | /* Send a message using the Transport Protocol */
52 | UDS_ReturnError NWS_SendMsgData(NWS_t *NWS, U8 msgIdx);
53 | /* Initializes NWS */
54 | UDS_ReturnError NWS_Init(NWS_t **ppNWS);
55 | /* Processing NWS */
56 | UDS_ReturnError NWS_Process(NWS_t *NWS, U32 timeStamp);
57 | /* Message reception indication */
58 | UDS_ReturnError NWS_RxIndication(NWS_t *NWS, U8 msgIdx, N_Result_t Result);
59 | /* Message reception request */
60 | UDS_ReturnError NWS_RxRequest(NWS_t *NWS, U8 msgIdx);
61 | /* Message reception indication (long request) */
62 | UDS_ReturnError UDS_LongRxIndication(NWS_t *NWS);
63 | /* Message transmit confirm */
64 | UDS_ReturnError NWS_TxConfirm(NWS_t *NWS, U8 msgIdx, N_Result_t Result);
65 | /* Processing a message */
66 | void NWS_ReceiveMessage_Do(NWS_t *NWS, U8 msgIdx);
67 | /* Pesponse a message */
68 | void NWS_PesponseMessage(NWS_t *NWS, U8 msgIdx, UDS_CONST_STORAGE s_UDS_DSI *pDSI, U8 NRC);
69 |
70 | #ifdef __cplusplus
71 | }
72 | #endif /* __cplusplus */
73 |
74 | #endif /* _UDS_NWS_H_ */
75 |
--------------------------------------------------------------------------------