├── .gitignore ├── Cargo.toml ├── LICENSE ├── README.md ├── riscv-sw ├── build-flow │ ├── Makefile.include │ ├── crt0.s │ └── link.ld ├── examples │ └── hello_world │ │ ├── Makefile │ │ └── hello_world.c └── tests │ └── riscv-arch-test-target │ └── rrs │ ├── device │ └── rv32i_m │ │ ├── I │ │ └── Makefile.include │ │ ├── M │ │ └── Makefile.include │ │ └── Makefile.include │ ├── link.ld │ └── model_test.h ├── rrs-cli ├── Cargo.toml └── src │ └── main.rs ├── rrs-lib ├── Cargo.toml ├── README.md └── src │ ├── csrs.rs │ ├── instruction_executor.rs │ ├── instruction_formats.rs │ ├── instruction_string_outputter.rs │ ├── lib.rs │ ├── memories.rs │ └── process_instruction.rs └── vendor ├── README.md └── riscv-arch-test ├── CHANGELOG.md ├── CONTRIBUTION.md ├── COPYING.APACHE ├── COPYING.BSD ├── COPYING.CC ├── Makefile ├── Makefile.include ├── README.md ├── doc ├── .gitignore ├── ChangeLog ├── MIGRATION.adoc ├── Makefile ├── README.adoc ├── custom.wordlist └── file-struct.jpg ├── riscv-ovpsim ├── README.md └── riscvOVPsim.jpg ├── riscv-target ├── Codasip-simulator │ ├── compliance_io.h │ ├── compliance_test.h │ └── device │ │ └── rv32i │ │ └── Makefile.include ├── OpenHW │ ├── README.md │ ├── compliance_io.h │ ├── compliance_test.h │ └── device │ │ └── cv32e40p │ │ ├── Makefile.include │ │ ├── Makefile.include.ovp │ │ ├── README.txt │ │ ├── handler.S │ │ ├── link.ld │ │ └── runtarget.sh ├── README.md ├── example-target │ ├── README.adoc │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ │ └── Makefile.include │ │ │ ├── Makefile.include │ │ │ ├── Zifencei │ │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ │ └── Makefile.include │ │ └── rv64i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── env │ │ ├── linkmono.ld │ │ └── linksplit.ld │ ├── linker_script.adoc │ └── model_test.h ├── grift │ ├── README.md │ ├── device │ │ └── rv32i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── link.ld │ └── model_test.h ├── ibex │ ├── README.md │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ ├── I │ │ │ ├── M │ │ │ └── privilege │ │ └── rv32imc │ │ │ ├── Makefile.include │ │ │ ├── handler.S │ │ │ ├── isa.yaml │ │ │ ├── link.ld │ │ │ └── platform.yaml │ └── model_test.h ├── ri5cy │ ├── README.md │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ ├── I │ │ │ ├── M │ │ │ ├── Zifencei │ │ │ └── privilege │ │ └── rv32imc │ │ │ ├── Makefile.include │ │ │ ├── handler.S │ │ │ └── link.ld │ └── model_test.h ├── riscvOVPsim │ ├── README.md │ ├── cover.sh │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ │ └── Makefile.include │ │ │ ├── K │ │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ │ └── Makefile.include │ │ └── rv64i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── K │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── link.ld │ ├── model_test.h │ └── postverify.sh ├── riscvOVPsim_0p1 │ ├── README.md │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ │ └── Makefile.include │ │ └── rv64i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── model_test.h │ └── wip │ │ ├── rv64i │ │ └── Makefile.include │ │ └── rv64im │ │ └── Makefile.include ├── rocket │ ├── device │ │ └── rv32i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ └── model_test.h ├── sail-riscv-c │ ├── README.md │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ │ └── Makefile.include │ │ └── rv64i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── link.ld │ └── model_test.h ├── sail-riscv-ocaml │ ├── README.md │ ├── device │ │ ├── rv32i_m │ │ │ ├── C │ │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ │ └── Makefile.include │ │ └── rv64i_m │ │ │ ├── C │ │ │ └── Makefile.include │ │ │ ├── I │ │ │ └── Makefile.include │ │ │ ├── M │ │ │ └── Makefile.include │ │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ │ └── privilege │ │ │ └── Makefile.include │ ├── link.ld │ └── model_test.h ├── spike │ └── README.md └── spike_0p1 │ ├── README.md │ ├── device │ ├── rv32i_m │ │ ├── C │ │ │ └── Makefile.include │ │ ├── I │ │ │ └── Makefile.include │ │ ├── M │ │ │ └── Makefile.include │ │ ├── Zifencei │ │ │ └── Makefile.include │ │ └── privilege │ │ │ └── Makefile.include │ └── rv64i_m │ │ ├── C │ │ └── Makefile.include │ │ ├── I │ │ └── Makefile.include │ │ ├── M │ │ └── Makefile.include │ │ ├── Zifencei │ │ └── Makefile.include │ │ └── privilege │ │ └── Makefile.include │ └── model_test.h ├── riscv-test-env ├── LICENSE ├── arch_test.h ├── encoding.h ├── p │ ├── link.ld │ └── riscv_test.h ├── pm │ ├── link.ld │ └── riscv_test.h ├── pt │ ├── link.ld │ └── riscv_test.h ├── v │ ├── entry.S │ ├── link.ld │ ├── riscv_test.h │ ├── string.c │ └── vm.c └── verify.sh ├── riscv-test-stats ├── coverage │ ├── README.md │ ├── dataset.yaml │ ├── rv32i.yaml │ ├── rv32i_fencei.yaml │ ├── rv32i_m │ │ ├── C │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── I │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── K_unratified │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── M │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── Zifencei │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ └── privilege │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ ├── rv32i_priv.yaml │ ├── rv32ic.yaml │ ├── rv32ik.yaml │ ├── rv32im.yaml │ ├── rv64i.yaml │ ├── rv64i_fencei.yaml │ ├── rv64i_m │ │ ├── C │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── I │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── K_unratified │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── M │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ ├── Zifencei │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ │ └── privilege │ │ │ ├── coverage.html │ │ │ ├── style.css │ │ │ └── suite_coverage.rpt │ ├── rv64i_priv.yaml │ ├── rv64ic.yaml │ ├── rv64ik.yaml │ └── rv64im.yaml └── data-propagation │ ├── README.md │ ├── rv32i_m │ ├── C │ │ ├── cadd-01.md │ │ ├── caddi-01.md │ │ ├── caddi16sp-01.md │ │ ├── caddi4spn-01.md │ │ ├── cand-01.md │ │ ├── candi-01.md │ │ ├── cbeqz-01.md │ │ ├── cbnez-01.md │ │ ├── cebreak-01.md │ │ ├── cj-01.md │ │ ├── cjal-01.md │ │ ├── cjalr-01.md │ │ ├── cjr-01.md │ │ ├── cli-01.md │ │ ├── clui-01.md │ │ ├── clw-01.md │ │ ├── clwsp-01.md │ │ ├── cmv-01.md │ │ ├── cnop-01.md │ │ ├── cor-01.md │ │ ├── cslli-01.md │ │ ├── csrai-01.md │ │ ├── csrli-01.md │ │ ├── csub-01.md │ │ ├── csw-01.md │ │ ├── cswsp-01.md │ │ └── cxor-01.md │ ├── I │ │ ├── add-01.md │ │ ├── addi-01.md │ │ ├── and-01.md │ │ ├── andi-01.md │ │ ├── auipc-01.md │ │ ├── beq-01.md │ │ ├── bge-01.md │ │ ├── bgeu-01.md │ │ ├── blt-01.md │ │ ├── bltu-01.md │ │ ├── bne-01.md │ │ ├── fence-01.md │ │ ├── jal-01.md │ │ ├── jalr-01.md │ │ ├── lb-align-01.md │ │ ├── lbu-align-01.md │ │ ├── lh-align-01.md │ │ ├── lhu-align-01.md │ │ ├── lui-01.md │ │ ├── lw-align-01.md │ │ ├── or-01.md │ │ ├── ori-01.md │ │ ├── sb-align-01.md │ │ ├── sh-align-01.md │ │ ├── sll-01.md │ │ ├── slli-01.md │ │ ├── slt-01.md │ │ ├── slti-01.md │ │ ├── sltiu-01.md │ │ ├── sltu-01.md │ │ ├── sra-01.md │ │ ├── srai-01.md │ │ ├── srl-01.md │ │ ├── srli-01.md │ │ ├── sub-01.md │ │ ├── sw-align-01.md │ │ ├── xor-01.md │ │ └── xori-01.md │ ├── K_unratified │ │ ├── aes32dsi-01.md │ │ ├── aes32dsi-rwp1.md │ │ ├── aes32dsmi-01.md │ │ ├── aes32dsmi-rwp1.md │ │ ├── aes32esi-01.md │ │ ├── aes32esi-rwp1.md │ │ ├── aes32esmi-01.md │ │ ├── aes32esmi-rwp1.md │ │ ├── andn-01.md │ │ ├── clmul-01.md │ │ ├── clmulh-01.md │ │ ├── orn-01.md │ │ ├── pack-01.md │ │ ├── packh-01.md │ │ ├── packu-01.md │ │ ├── rev.b-01.md │ │ ├── rev8-01.md │ │ ├── rol-01.md │ │ ├── ror-01.md │ │ ├── rori-01.md │ │ ├── sha256sig0-01.md │ │ ├── sha256sig0-rwp1.md │ │ ├── sha256sig0-rwp2.md │ │ ├── sha256sig1-01.md │ │ ├── sha256sig1-rwp1.md │ │ ├── sha256sig1-rwp2.md │ │ ├── sha256sum0-01.md │ │ ├── sha256sum0-rwp1.md │ │ ├── sha256sum0-rwp2.md │ │ ├── sha256sum1-01.md │ │ ├── sha256sum1-rwp1.md │ │ ├── sha256sum1-rwp2.md │ │ ├── sha512sig0h-01.md │ │ ├── sha512sig0h-rwp1.md │ │ ├── sha512sig0h-rwp2.md │ │ ├── sha512sig0l-01.md │ │ ├── sha512sig0l-rwp1.md │ │ ├── sha512sig0l-rwp2.md │ │ ├── sha512sig1h-01.md │ │ ├── sha512sig1h-rwp1.md │ │ ├── sha512sig1h-rwp2.md │ │ ├── sha512sig1l-01.md │ │ ├── sha512sig1l-rwp1.md │ │ ├── sha512sig1l-rwp2.md │ │ ├── sha512sum0r-01.md │ │ ├── sha512sum0r-rwp1.md │ │ ├── sha512sum0r-rwp2.md │ │ ├── sha512sum1r-01.md │ │ ├── sha512sum1r-rwp1.md │ │ ├── sha512sum1r-rwp2.md │ │ ├── sm3p0-01.md │ │ ├── sm3p0-rwp1.md │ │ ├── sm3p0-rwp2.md │ │ ├── sm3p1-01.md │ │ ├── sm3p1-rwp1.md │ │ ├── sm3p1-rwp2.md │ │ ├── sm4ed-01.md │ │ ├── sm4ed-rwp1.md │ │ ├── sm4ks-01.md │ │ ├── sm4ks-rwp1.md │ │ ├── unzip-01.md │ │ ├── xnor-01.md │ │ ├── xperm.b-01.md │ │ ├── xperm.n-01.md │ │ └── zip-01.md │ ├── M │ │ ├── div-01.md │ │ ├── divu-01.md │ │ ├── mul-01.md │ │ ├── mulh-01.md │ │ ├── mulhsu-01.md │ │ ├── mulhu-01.md │ │ ├── rem-01.md │ │ └── remu-01.md │ ├── Zifencei │ │ └── Fencei.md │ └── privilege │ │ ├── cadd-01.md │ │ ├── caddi-01.md │ │ ├── caddi16sp-01.md │ │ ├── caddi4spn-01.md │ │ ├── cand-01.md │ │ ├── candi-01.md │ │ ├── cbeqz-01.md │ │ ├── cbnez-01.md │ │ ├── cj-01.md │ │ ├── cjal-01.md │ │ ├── cjalr-01.md │ │ ├── cjr-01.md │ │ ├── cli-01.md │ │ ├── clui-01.md │ │ ├── clw-01.md │ │ ├── clwsp-01.md │ │ ├── cmv-01.md │ │ ├── cnop-01.md │ │ ├── cor-01.md │ │ ├── cslli-01.md │ │ ├── csrai-01.md │ │ ├── csrli-01.md │ │ ├── csub-01.md │ │ ├── csw-01.md │ │ ├── cswsp-01.md │ │ ├── cxor-01.md │ │ ├── ebreak.md │ │ ├── ecall.md │ │ ├── misalign-beq-01.md │ │ ├── misalign-bge-01.md │ │ ├── misalign-bgeu-01.md │ │ ├── misalign-blt-01.md │ │ ├── misalign-bltu-01.md │ │ ├── misalign-bne-01.md │ │ ├── misalign-jal-01.md │ │ ├── misalign-lh-01.md │ │ ├── misalign-lhu-01.md │ │ ├── misalign-lw-01.md │ │ ├── misalign-sh-01.md │ │ ├── misalign-sw-01.md │ │ ├── misalign1-jalr-01.md │ │ └── misalign2-jalr-01.md │ └── rv64i_m │ ├── C │ ├── cadd-01.md │ ├── caddi-01.md │ ├── caddi16sp-01.md │ ├── caddi4spn-01.md │ ├── caddiw-01.md │ ├── caddw-01.md │ ├── cand-01.md │ ├── candi-01.md │ ├── cbeqz-01.md │ ├── cbnez-01.md │ ├── cebreak-01.md │ ├── cj-01.md │ ├── cjalr-01.md │ ├── cjr-01.md │ ├── cld-01.md │ ├── cldsp-01.md │ ├── cli-01.md │ ├── clui-01.md │ ├── clw-01.md │ ├── clwsp-01.md │ ├── cmv-01.md │ ├── cnop-01.md │ ├── cor-01.md │ ├── csd-01.md │ ├── csdsp-01.md │ ├── cslli-01.md │ ├── csrai-01.md │ ├── csrli-01.md │ ├── csub-01.md │ ├── csubw-01.md │ ├── csw-01.md │ ├── cswsp-01.md │ └── cxor-01.md │ ├── I │ ├── add-01.md │ ├── addi-01.md │ ├── addiw-01.md │ ├── addw-01.md │ ├── and-01.md │ ├── andi-01.md │ ├── auipc-01.md │ ├── beq-01.md │ ├── bge-01.md │ ├── bgeu-01.md │ ├── blt-01.md │ ├── bltu-01.md │ ├── bne-01.md │ ├── fence-01.md │ ├── jal-01.md │ ├── jalr-01.md │ ├── lb-align-01.md │ ├── lbu-align-01.md │ ├── ld-align-01.md │ ├── lh-align-01.md │ ├── lhu-align-01.md │ ├── lui-01.md │ ├── lw-align-01.md │ ├── lwu-align-01.md │ ├── or-01.md │ ├── ori-01.md │ ├── sb-align-01.md │ ├── sd-align-01.md │ ├── sh-align-01.md │ ├── sll-01.md │ ├── slli-01.md │ ├── slliw-01.md │ ├── sllw-01.md │ ├── slt-01.md │ ├── slti-01.md │ ├── sltiu-01.md │ ├── sltu-01.md │ ├── sra-01.md │ ├── srai-01.md │ ├── sraiw-01.md │ ├── sraw-01.md │ ├── srl-01.md │ ├── srli-01.md │ ├── srliw-01.md │ ├── srlw-01.md │ ├── sub-01.md │ ├── subw-01.md │ ├── sw-align-01.md │ ├── xor-01.md │ └── xori-01.md │ ├── K_unratified │ ├── aes64ds-01.md │ ├── aes64ds-rwp1.md │ ├── aes64dsm-01.md │ ├── aes64dsm-rwp1.md │ ├── aes64es-01.md │ ├── aes64es-rwp1.md │ ├── aes64esm-01.md │ ├── aes64esm-rwp1.md │ ├── aes64im-01.md │ ├── aes64im-rwp1.md │ ├── aes64im-rwp2.md │ ├── aes64ks1i-01.md │ ├── aes64ks2-01.md │ ├── andn-01.md │ ├── clmul-01.md │ ├── clmulh-01.md │ ├── div-01.md │ ├── divu-01.md │ ├── divuw-01.md │ ├── divw-01.md │ ├── mul-01.md │ ├── mulh-01.md │ ├── mulhsu-01.md │ ├── mulhu-01.md │ ├── mulw-01.md │ ├── orn-01.md │ ├── pack-01.md │ ├── packh-01.md │ ├── packu-01.md │ ├── packuw-01.md │ ├── packw-01.md │ ├── ref.md │ ├── rem-01.md │ ├── remu-01.md │ ├── remuw-01.md │ ├── remw-01.md │ ├── rev.b-01.md │ ├── rev8-01.md │ ├── rev8.w-01.md │ ├── rol-01.md │ ├── rolw-01.md │ ├── ror-01.md │ ├── rori-01.md │ ├── roriw-01.md │ ├── rorw-01.md │ ├── sha256sig0-01.md │ ├── sha256sig0-rwp1.md │ ├── sha256sig0-rwp2.md │ ├── sha256sig1-01.md │ ├── sha256sig1-rwp1.md │ ├── sha256sig1-rwp2.md │ ├── sha256sum0-01.md │ ├── sha256sum0-rwp1.md │ ├── sha256sum0-rwp2.md │ ├── sha256sum1-01.md │ ├── sha256sum1-rwp1.md │ ├── sha256sum1-rwp2.md │ ├── sha512sig0-01.md │ ├── sha512sig0-rwp1.md │ ├── sha512sig0-rwp2.md │ ├── sha512sig1-01.md │ ├── sha512sig1-rwp1.md │ ├── sha512sig1-rwp2.md │ ├── sha512sum0-01.md │ ├── sha512sum0-rwp1.md │ ├── sha512sum0-rwp2.md │ ├── sha512sum1-01.md │ ├── sha512sum1-rwp1.md │ ├── sha512sum1-rwp2.md │ ├── sm3p0-01.md │ ├── sm3p0-rwp1.md │ ├── sm3p0-rwp2.md │ ├── sm3p1-01.md │ ├── sm3p1-rwp1.md │ ├── sm3p1-rwp2.md │ ├── sm4ed-01.md │ ├── sm4ed-rwp1.md │ ├── sm4ks-01.md │ ├── sm4ks-rwp1.md │ ├── unzip-01.md │ ├── xnor-01.md │ ├── xperm.b-01.md │ ├── xperm.n-01.md │ └── zip-01.md │ ├── M │ ├── div-01.md │ ├── divu-01.md │ ├── divuw-01.md │ ├── divw-01.md │ ├── mul-01.md │ ├── mulh-01.md │ ├── mulhsu-01.md │ ├── mulhu-01.md │ ├── mulw-01.md │ ├── rem-01.md │ ├── remu-01.md │ ├── remuw-01.md │ └── remw-01.md │ ├── Zifencei │ └── Fencei.md │ └── privilege │ ├── ebreak.md │ ├── ecall.md │ ├── misalign-beq-01.md │ ├── misalign-bge-01.md │ ├── misalign-bgeu-01.md │ ├── misalign-blt-01.md │ ├── misalign-bltu-01.md │ ├── misalign-bne-01.md │ ├── misalign-jal-01.md │ ├── misalign-ld-01.md │ ├── misalign-lh-01.md │ ├── misalign-lhu-01.md │ ├── misalign-lw-01.md │ ├── misalign-lwu-01.md │ ├── misalign-sd-01.md │ ├── misalign-sh-01.md │ ├── misalign-sw-01.md │ ├── misalign1-jalr-01.md │ └── misalign2-jalr-01.md ├── riscv-test-suite ├── Makefile.include ├── README.md ├── env │ ├── arch_test.h │ └── encoding.h ├── rv32i_m │ ├── .gitgnore │ ├── C │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ │ ├── cadd-01.reference_output │ │ │ ├── caddi-01.reference_output │ │ │ ├── caddi16sp-01.reference_output │ │ │ ├── caddi4spn-01.reference_output │ │ │ ├── cand-01.reference_output │ │ │ ├── candi-01.reference_output │ │ │ ├── cbeqz-01.reference_output │ │ │ ├── cbnez-01.reference_output │ │ │ ├── cebreak-01.reference_output │ │ │ ├── cj-01.reference_output │ │ │ ├── cjal-01.reference_output │ │ │ ├── cjalr-01.reference_output │ │ │ ├── cjr-01.reference_output │ │ │ ├── cli-01.reference_output │ │ │ ├── clui-01.reference_output │ │ │ ├── clw-01.reference_output │ │ │ ├── clwsp-01.reference_output │ │ │ ├── cmv-01.reference_output │ │ │ ├── cnop-01.reference_output │ │ │ ├── cor-01.reference_output │ │ │ ├── cslli-01.reference_output │ │ │ ├── csrai-01.reference_output │ │ │ ├── csrli-01.reference_output │ │ │ ├── csub-01.reference_output │ │ │ ├── csw-01.reference_output │ │ │ ├── cswsp-01.reference_output │ │ │ └── cxor-01.reference_output │ │ └── src │ │ │ ├── cadd-01.S │ │ │ ├── caddi-01.S │ │ │ ├── caddi16sp-01.S │ │ │ ├── caddi4spn-01.S │ │ │ ├── cand-01.S │ │ │ ├── candi-01.S │ │ │ ├── cbeqz-01.S │ │ │ ├── cbnez-01.S │ │ │ ├── cebreak-01.S │ │ │ ├── cj-01.S │ │ │ ├── cjal-01.S │ │ │ ├── cjalr-01.S │ │ │ ├── cjr-01.S │ │ │ ├── cli-01.S │ │ │ ├── clui-01.S │ │ │ ├── clw-01.S │ │ │ ├── clwsp-01.S │ │ │ ├── cmv-01.S │ │ │ ├── cnop-01.S │ │ │ ├── cor-01.S │ │ │ ├── cslli-01.S │ │ │ ├── csrai-01.S │ │ │ ├── csrli-01.S │ │ │ ├── csub-01.S │ │ │ ├── csw-01.S │ │ │ ├── cswsp-01.S │ │ │ └── cxor-01.S │ ├── I │ │ ├── .gitignore │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ │ ├── add-01.reference_output │ │ │ ├── addi-01.reference_output │ │ │ ├── and-01.reference_output │ │ │ ├── andi-01.reference_output │ │ │ ├── auipc-01.reference_output │ │ │ ├── beq-01.reference_output │ │ │ ├── bge-01.reference_output │ │ │ ├── bgeu-01.reference_output │ │ │ ├── blt-01.reference_output │ │ │ ├── bltu-01.reference_output │ │ │ ├── bne-01.reference_output │ │ │ ├── fence-01.reference_output │ │ │ ├── jal-01.reference_output │ │ │ ├── jalr-01.reference_output │ │ │ ├── lb-align-01.reference_output │ │ │ ├── lbu-align-01.reference_output │ │ │ ├── lh-align-01.reference_output │ │ │ ├── lhu-align-01.reference_output │ │ │ ├── lui-01.reference_output │ │ │ ├── lw-align-01.reference_output │ │ │ ├── or-01.reference_output │ │ │ ├── ori-01.reference_output │ │ │ ├── sb-align-01.reference_output │ │ │ ├── sh-align-01.reference_output │ │ │ ├── sll-01.reference_output │ │ │ ├── slli-01.reference_output │ │ │ ├── slt-01.reference_output │ │ │ ├── slti-01.reference_output │ │ │ ├── sltiu-01.reference_output │ │ │ ├── sltu-01.reference_output │ │ │ ├── sra-01.reference_output │ │ │ ├── srai-01.reference_output │ │ │ ├── srl-01.reference_output │ │ │ ├── srli-01.reference_output │ │ │ ├── sub-01.reference_output │ │ │ ├── sw-align-01.reference_output │ │ │ ├── xor-01.reference_output │ │ │ └── xori-01.reference_output │ │ └── src │ │ │ ├── add-01.S │ │ │ ├── addi-01.S │ │ │ ├── and-01.S │ │ │ ├── andi-01.S │ │ │ ├── auipc-01.S │ │ │ ├── beq-01.S │ │ │ ├── bge-01.S │ │ │ ├── bgeu-01.S │ │ │ ├── blt-01.S │ │ │ ├── bltu-01.S │ │ │ ├── bne-01.S │ │ │ ├── fence-01.S │ │ │ ├── jal-01.S │ │ │ ├── jalr-01.S │ │ │ ├── lb-align-01.S │ │ │ ├── lbu-align-01.S │ │ │ ├── lh-align-01.S │ │ │ ├── lhu-align-01.S │ │ │ ├── lui-01.S │ │ │ ├── lw-align-01.S │ │ │ ├── or-01.S │ │ │ ├── ori-01.S │ │ │ ├── sb-align-01.S │ │ │ ├── sh-align-01.S │ │ │ ├── sll-01.S │ │ │ ├── slli-01.S │ │ │ ├── slt-01.S │ │ │ ├── slti-01.S │ │ │ ├── sltiu-01.S │ │ │ ├── sltu-01.S │ │ │ ├── sra-01.S │ │ │ ├── srai-01.S │ │ │ ├── srl-01.S │ │ │ ├── srli-01.S │ │ │ ├── sub-01.S │ │ │ ├── sw-align-01.S │ │ │ ├── xor-01.S │ │ │ └── xori-01.S │ ├── K_unratified │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ │ ├── aes32dsi-01.reference_output │ │ │ ├── aes32dsi-rwp1.reference_output │ │ │ ├── aes32dsmi-01.reference_output │ │ │ ├── aes32dsmi-rwp1.reference_output │ │ │ ├── aes32esi-01.reference_output │ │ │ ├── aes32esi-rwp1.reference_output │ │ │ ├── aes32esmi-01.reference_output │ │ │ ├── aes32esmi-rwp1.reference_output │ │ │ ├── andn-01.reference_output │ │ │ ├── clmul-01.reference_output │ │ │ ├── clmulh-01.reference_output │ │ │ ├── orn-01.reference_output │ │ │ ├── pack-01.reference_output │ │ │ ├── packh-01.reference_output │ │ │ ├── packu-01.reference_output │ │ │ ├── rev.b-01.reference_output │ │ │ ├── rev8-01.reference_output │ │ │ ├── rol-01.reference_output │ │ │ ├── ror-01.reference_output │ │ │ ├── rori-01.reference_output │ │ │ ├── sha256sig0-01.reference_output │ │ │ ├── sha256sig0-rwp1.reference_output │ │ │ ├── sha256sig0-rwp2.reference_output │ │ │ ├── sha256sig1-01.reference_output │ │ │ ├── sha256sig1-rwp1.reference_output │ │ │ ├── sha256sig1-rwp2.reference_output │ │ │ ├── sha256sum0-01.reference_output │ │ │ ├── sha256sum0-rwp1.reference_output │ │ │ ├── sha256sum0-rwp2.reference_output │ │ │ ├── sha256sum1-01.reference_output │ │ │ ├── sha256sum1-rwp1.reference_output │ │ │ ├── sha256sum1-rwp2.reference_output │ │ │ ├── sha512sig0h-01.reference_output │ │ │ ├── sha512sig0h-rwp1.reference_output │ │ │ ├── sha512sig0h-rwp2.reference_output │ │ │ ├── sha512sig0l-01.reference_output │ │ │ ├── sha512sig0l-rwp1.reference_output │ │ │ ├── sha512sig0l-rwp2.reference_output │ │ │ ├── sha512sig1h-01.reference_output │ │ │ ├── sha512sig1h-rwp1.reference_output │ │ │ ├── sha512sig1h-rwp2.reference_output │ │ │ ├── sha512sig1l-01.reference_output │ │ │ ├── sha512sig1l-rwp1.reference_output │ │ │ ├── sha512sig1l-rwp2.reference_output │ │ │ ├── sha512sum0r-01.reference_output │ │ │ ├── sha512sum0r-rwp1.reference_output │ │ │ ├── sha512sum0r-rwp2.reference_output │ │ │ ├── sha512sum1r-01.reference_output │ │ │ ├── sha512sum1r-rwp1.reference_output │ │ │ ├── sha512sum1r-rwp2.reference_output │ │ │ ├── sm3p0-01.reference_output │ │ │ ├── sm3p0-rwp1.reference_output │ │ │ ├── sm3p0-rwp2.reference_output │ │ │ ├── sm3p1-01.reference_output │ │ │ ├── sm3p1-rwp1.reference_output │ │ │ ├── sm3p1-rwp2.reference_output │ │ │ ├── sm4ed-01.reference_output │ │ │ ├── sm4ed-rwp1.reference_output │ │ │ ├── sm4ks-01.reference_output │ │ │ ├── sm4ks-rwp1.reference_output │ │ │ ├── unzip-01.reference_output │ │ │ ├── xnor-01.reference_output │ │ │ ├── xperm.b-01.reference_output │ │ │ ├── xperm.n-01.reference_output │ │ │ └── zip-01.reference_output │ │ └── src │ │ │ ├── aes32dsi-01.S │ │ │ ├── aes32dsi-rwp1.S │ │ │ ├── aes32dsmi-01.S │ │ │ ├── aes32dsmi-rwp1.S │ │ │ ├── aes32esi-01.S │ │ │ ├── aes32esi-rwp1.S │ │ │ ├── aes32esmi-01.S │ │ │ ├── aes32esmi-rwp1.S │ │ │ ├── andn-01.S │ │ │ ├── clmul-01.S │ │ │ ├── clmulh-01.S │ │ │ ├── orn-01.S │ │ │ ├── pack-01.S │ │ │ ├── packh-01.S │ │ │ ├── packu-01.S │ │ │ ├── rev.b-01.S │ │ │ ├── rev8-01.S │ │ │ ├── rol-01.S │ │ │ ├── ror-01.S │ │ │ ├── rori-01.S │ │ │ ├── sha256sig0-01.S │ │ │ ├── sha256sig0-rwp1.S │ │ │ ├── sha256sig0-rwp2.S │ │ │ ├── sha256sig1-01.S │ │ │ ├── sha256sig1-rwp1.S │ │ │ ├── sha256sig1-rwp2.S │ │ │ ├── sha256sum0-01.S │ │ │ ├── sha256sum0-rwp1.S │ │ │ ├── sha256sum0-rwp2.S │ │ │ ├── sha256sum1-01.S │ │ │ ├── sha256sum1-rwp1.S │ │ │ ├── sha256sum1-rwp2.S │ │ │ ├── sha512sig0h-01.S │ │ │ ├── sha512sig0h-rwp1.S │ │ │ ├── sha512sig0h-rwp2.S │ │ │ ├── sha512sig0l-01.S │ │ │ ├── sha512sig0l-rwp1.S │ │ │ ├── sha512sig0l-rwp2.S │ │ │ ├── sha512sig1h-01.S │ │ │ ├── sha512sig1h-rwp1.S │ │ │ ├── sha512sig1h-rwp2.S │ │ │ ├── sha512sig1l-01.S │ │ │ ├── sha512sig1l-rwp1.S │ │ │ ├── sha512sig1l-rwp2.S │ │ │ ├── sha512sum0r-01.S │ │ │ ├── sha512sum0r-rwp1.S │ │ │ ├── sha512sum0r-rwp2.S │ │ │ ├── sha512sum1r-01.S │ │ │ ├── sha512sum1r-rwp1.S │ │ │ ├── sha512sum1r-rwp2.S │ │ │ ├── sm3p0-01.S │ │ │ ├── sm3p0-rwp1.S │ │ │ ├── sm3p0-rwp2.S │ │ │ ├── sm3p1-01.S │ │ │ ├── sm3p1-rwp1.S │ │ │ ├── sm3p1-rwp2.S │ │ │ ├── sm4ed-01.S │ │ │ ├── sm4ed-rwp1.S │ │ │ ├── sm4ks-01.S │ │ │ ├── sm4ks-rwp1.S │ │ │ ├── unzip-01.S │ │ │ ├── xnor-01.S │ │ │ ├── xperm.b-01.S │ │ │ ├── xperm.n-01.S │ │ │ └── zip-01.S │ ├── M │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ │ ├── div-01.reference_output │ │ │ ├── divu-01.reference_output │ │ │ ├── mul-01.reference_output │ │ │ ├── mulh-01.reference_output │ │ │ ├── mulhsu-01.reference_output │ │ │ ├── mulhu-01.reference_output │ │ │ ├── rem-01.reference_output │ │ │ └── remu-01.reference_output │ │ └── src │ │ │ ├── div-01.S │ │ │ ├── divu-01.S │ │ │ ├── mul-01.S │ │ │ ├── mulh-01.S │ │ │ ├── mulhsu-01.S │ │ │ ├── mulhu-01.S │ │ │ ├── rem-01.S │ │ │ └── remu-01.S │ ├── Zifencei │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ │ └── Fencei.reference_output │ │ └── src │ │ │ └── Fencei.S │ └── privilege │ │ ├── Makefile │ │ ├── Makefrag │ │ ├── references │ │ ├── ebreak.reference_output │ │ ├── ecall.reference_output │ │ ├── misalign-beq-01.reference_output │ │ ├── misalign-bge-01.reference_output │ │ ├── misalign-bgeu-01.reference_output │ │ ├── misalign-blt-01.reference_output │ │ ├── misalign-bltu-01.reference_output │ │ ├── misalign-bne-01.reference_output │ │ ├── misalign-jal-01.reference_output │ │ ├── misalign-lh-01.reference_output │ │ ├── misalign-lhu-01.reference_output │ │ ├── misalign-lw-01.reference_output │ │ ├── misalign-sh-01.reference_output │ │ ├── misalign-sw-01.reference_output │ │ ├── misalign1-jalr-01.reference_output │ │ └── misalign2-jalr-01.reference_output │ │ └── src │ │ ├── ebreak.S │ │ ├── ecall.S │ │ ├── misalign-beq-01.S │ │ ├── misalign-bge-01.S │ │ ├── misalign-bgeu-01.S │ │ ├── misalign-blt-01.S │ │ ├── misalign-bltu-01.S │ │ ├── misalign-bne-01.S │ │ ├── misalign-jal-01.S │ │ ├── misalign-lh-01.S │ │ ├── misalign-lhu-01.S │ │ ├── misalign-lw-01.S │ │ ├── misalign-sh-01.S │ │ ├── misalign-sw-01.S │ │ ├── misalign1-jalr-01.S │ │ └── misalign2-jalr-01.S └── rv64i_m │ ├── .gitgnore │ ├── C │ ├── Makefile │ ├── Makefrag │ ├── references │ │ ├── cadd-01.reference_output │ │ ├── caddi-01.reference_output │ │ ├── caddi16sp-01.reference_output │ │ ├── caddi4spn-01.reference_output │ │ ├── caddiw-01.reference_output │ │ ├── caddw-01.reference_output │ │ ├── cand-01.reference_output │ │ ├── candi-01.reference_output │ │ ├── cbeqz-01.reference_output │ │ ├── cbnez-01.reference_output │ │ ├── cebreak-01.reference_output │ │ ├── cj-01.reference_output │ │ ├── cjalr-01.reference_output │ │ ├── cjr-01.reference_output │ │ ├── cld-01.reference_output │ │ ├── cldsp-01.reference_output │ │ ├── cli-01.reference_output │ │ ├── clui-01.reference_output │ │ ├── clw-01.reference_output │ │ ├── clwsp-01.reference_output │ │ ├── cmv-01.reference_output │ │ ├── cnop-01.reference_output │ │ ├── cor-01.reference_output │ │ ├── csd-01.reference_output │ │ ├── csdsp-01.reference_output │ │ ├── cslli-01.reference_output │ │ ├── csrai-01.reference_output │ │ ├── csrli-01.reference_output │ │ ├── csub-01.reference_output │ │ ├── csubw-01.reference_output │ │ ├── csw-01.reference_output │ │ ├── cswsp-01.reference_output │ │ └── cxor-01.reference_output │ └── src │ │ ├── cadd-01.S │ │ ├── caddi-01.S │ │ ├── caddi16sp-01.S │ │ ├── caddi4spn-01.S │ │ ├── caddiw-01.S │ │ ├── caddw-01.S │ │ ├── cand-01.S │ │ ├── candi-01.S │ │ ├── cbeqz-01.S │ │ ├── cbnez-01.S │ │ ├── cebreak-01.S │ │ ├── cj-01.S │ │ ├── cjalr-01.S │ │ ├── cjr-01.S │ │ ├── cld-01.S │ │ ├── cldsp-01.S │ │ ├── cli-01.S │ │ ├── clui-01.S │ │ ├── clw-01.S │ │ ├── clwsp-01.S │ │ ├── cmv-01.S │ │ ├── cnop-01.S │ │ ├── cor-01.S │ │ ├── csd-01.S │ │ ├── csdsp-01.S │ │ ├── cslli-01.S │ │ ├── csrai-01.S │ │ ├── csrli-01.S │ │ ├── csub-01.S │ │ ├── csubw-01.S │ │ ├── csw-01.S │ │ ├── cswsp-01.S │ │ └── cxor-01.S │ ├── I │ ├── .gitignore │ ├── Makefile │ ├── Makefrag │ ├── references │ │ ├── add-01.reference_output │ │ ├── addi-01.reference_output │ │ ├── addiw-01.reference_output │ │ ├── addw-01.reference_output │ │ ├── and-01.reference_output │ │ ├── andi-01.reference_output │ │ ├── auipc-01.reference_output │ │ ├── beq-01.reference_output │ │ ├── bge-01.reference_output │ │ ├── bgeu-01.reference_output │ │ ├── blt-01.reference_output │ │ ├── bltu-01.reference_output │ │ ├── bne-01.reference_output │ │ ├── fence-01.reference_output │ │ ├── jal-01.reference_output │ │ ├── jalr-01.reference_output │ │ ├── lb-align-01.reference_output │ │ ├── lbu-align-01.reference_output │ │ ├── ld-align-01.reference_output │ │ ├── lh-align-01.reference_output │ │ ├── lhu-align-01.reference_output │ │ ├── lui-01.reference_output │ │ ├── lw-align-01.reference_output │ │ ├── lwu-align-01.reference_output │ │ ├── or-01.reference_output │ │ ├── ori-01.reference_output │ │ ├── sb-align-01.reference_output │ │ ├── sd-align-01.reference_output │ │ ├── sh-align-01.reference_output │ │ ├── sll-01.reference_output │ │ ├── slli-01.reference_output │ │ ├── slliw-01.reference_output │ │ ├── sllw-01.reference_output │ │ ├── slt-01.reference_output │ │ ├── slti-01.reference_output │ │ ├── sltiu-01.reference_output │ │ ├── sltu-01.reference_output │ │ ├── sra-01.reference_output │ │ ├── srai-01.reference_output │ │ ├── sraiw-01.reference_output │ │ ├── sraw-01.reference_output │ │ ├── srl-01.reference_output │ │ ├── srli-01.reference_output │ │ ├── srliw-01.reference_output │ │ ├── srlw-01.reference_output │ │ ├── sub-01.reference_output │ │ ├── subw-01.reference_output │ │ ├── sw-align-01.reference_output │ │ ├── xor-01.reference_output │ │ └── xori-01.reference_output │ └── src │ │ ├── add-01.S │ │ ├── addi-01.S │ │ ├── addiw-01.S │ │ ├── addw-01.S │ │ ├── and-01.S │ │ ├── andi-01.S │ │ ├── auipc-01.S │ │ ├── beq-01.S │ │ ├── bge-01.S │ │ ├── bgeu-01.S │ │ ├── blt-01.S │ │ ├── bltu-01.S │ │ ├── bne-01.S │ │ ├── fence-01.S │ │ ├── jal-01.S │ │ ├── jalr-01.S │ │ ├── lb-align-01.S │ │ ├── lbu-align-01.S │ │ ├── ld-align-01.S │ │ ├── lh-align-01.S │ │ ├── lhu-align-01.S │ │ ├── lui-01.S │ │ ├── lw-align-01.S │ │ ├── lwu-align-01.S │ │ ├── or-01.S │ │ ├── ori-01.S │ │ ├── sb-align-01.S │ │ ├── sd-align-01.S │ │ ├── sh-align-01.S │ │ ├── sll-01.S │ │ ├── slli-01.S │ │ ├── slliw-01.S │ │ ├── sllw-01.S │ │ ├── slt-01.S │ │ ├── slti-01.S │ │ ├── sltiu-01.S │ │ ├── sltu-01.S │ │ ├── sra-01.S │ │ ├── srai-01.S │ │ ├── sraiw-01.S │ │ ├── sraw-01.S │ │ ├── srl-01.S │ │ ├── srli-01.S │ │ ├── srliw-01.S │ │ ├── srlw-01.S │ │ ├── sub-01.S │ │ ├── subw-01.S │ │ ├── sw-align-01.S │ │ ├── xor-01.S │ │ └── xori-01.S │ ├── K_unratified │ ├── Makefile │ ├── Makefrag │ ├── references │ │ ├── aes64ds-01.reference_output │ │ ├── aes64ds-rwp1.reference_output │ │ ├── aes64dsm-01.reference_output │ │ ├── aes64dsm-rwp1.reference_output │ │ ├── aes64es-01.reference_output │ │ ├── aes64es-rwp1.reference_output │ │ ├── aes64esm-01.reference_output │ │ ├── aes64esm-rwp1.reference_output │ │ ├── aes64im-01.reference_output │ │ ├── aes64im-rwp1.reference_output │ │ ├── aes64im-rwp2.reference_output │ │ ├── aes64ks1i-01.reference_output │ │ ├── aes64ks2-01.reference_output │ │ ├── andn-01.reference_output │ │ ├── clmul-01.reference_output │ │ ├── clmulh-01.reference_output │ │ ├── orn-01.reference_output │ │ ├── pack-01.reference_output │ │ ├── packh-01.reference_output │ │ ├── packu-01.reference_output │ │ ├── packuw-01.reference_output │ │ ├── packw-01.reference_output │ │ ├── rev.b-01.reference_output │ │ ├── rev8-01.reference_output │ │ ├── rev8.w-01.reference_output │ │ ├── rol-01.reference_output │ │ ├── rolw-01.reference_output │ │ ├── ror-01.reference_output │ │ ├── rori-01.reference_output │ │ ├── roriw-01.reference_output │ │ ├── rorw-01.reference_output │ │ ├── sha256sig0-01.reference_output │ │ ├── sha256sig0-rwp1.reference_output │ │ ├── sha256sig0-rwp2.reference_output │ │ ├── sha256sig1-01.reference_output │ │ ├── sha256sig1-rwp1.reference_output │ │ ├── sha256sig1-rwp2.reference_output │ │ ├── sha256sum0-01.reference_output │ │ ├── sha256sum0-rwp1.reference_output │ │ ├── sha256sum0-rwp2.reference_output │ │ ├── sha256sum1-01.reference_output │ │ ├── sha256sum1-rwp1.reference_output │ │ ├── sha256sum1-rwp2.reference_output │ │ ├── sha512sig0-01.reference_output │ │ ├── sha512sig0-rwp1.reference_output │ │ ├── sha512sig0-rwp2.reference_output │ │ ├── sha512sig1-01.reference_output │ │ ├── sha512sig1-rwp1.reference_output │ │ ├── sha512sig1-rwp2.reference_output │ │ ├── sha512sum0-01.reference_output │ │ ├── sha512sum0-rwp1.reference_output │ │ ├── sha512sum0-rwp2.reference_output │ │ ├── sha512sum1-01.reference_output │ │ ├── sha512sum1-rwp1.reference_output │ │ ├── sha512sum1-rwp2.reference_output │ │ ├── sm3p0-01.reference_output │ │ ├── sm3p0-rwp1.reference_output │ │ ├── sm3p0-rwp2.reference_output │ │ ├── sm3p1-01.reference_output │ │ ├── sm3p1-rwp1.reference_output │ │ ├── sm3p1-rwp2.reference_output │ │ ├── sm4ed-01.reference_output │ │ ├── sm4ed-rwp1.reference_output │ │ ├── sm4ks-01.reference_output │ │ ├── sm4ks-rwp1.reference_output │ │ ├── unzip-01.reference_output │ │ ├── xnor-01.reference_output │ │ ├── xperm.b-01.reference_output │ │ ├── xperm.n-01.reference_output │ │ └── zip-01.reference_output │ └── src │ │ ├── aes64ds-01.S │ │ ├── aes64ds-rwp1.S │ │ ├── aes64dsm-01.S │ │ ├── aes64dsm-rwp1.S │ │ ├── aes64es-01.S │ │ ├── aes64es-rwp1.S │ │ ├── aes64esm-01.S │ │ ├── aes64esm-rwp1.S │ │ ├── aes64im-01.S │ │ ├── aes64im-rwp1.S │ │ ├── aes64im-rwp2.S │ │ ├── aes64ks1i-01.S │ │ ├── aes64ks2-01.S │ │ ├── andn-01.S │ │ ├── clmul-01.S │ │ ├── clmulh-01.S │ │ ├── orn-01.S │ │ ├── pack-01.S │ │ ├── packh-01.S │ │ ├── packu-01.S │ │ ├── packuw-01.S │ │ ├── packw-01.S │ │ ├── rev.b-01.S │ │ ├── rev8-01.S │ │ ├── rev8.w-01.S │ │ ├── rol-01.S │ │ ├── rolw-01.S │ │ ├── ror-01.S │ │ ├── rori-01.S │ │ ├── roriw-01.S │ │ ├── rorw-01.S │ │ ├── sha256sig0-01.S │ │ ├── sha256sig0-rwp1.S │ │ ├── sha256sig0-rwp2.S │ │ ├── sha256sig1-01.S │ │ ├── sha256sig1-rwp1.S │ │ ├── sha256sig1-rwp2.S │ │ ├── sha256sum0-01.S │ │ ├── sha256sum0-rwp1.S │ │ ├── sha256sum0-rwp2.S │ │ ├── sha256sum1-01.S │ │ ├── sha256sum1-rwp1.S │ │ ├── sha256sum1-rwp2.S │ │ ├── sha512sig0-01.S │ │ ├── sha512sig0-rwp1.S │ │ ├── sha512sig0-rwp2.S │ │ ├── sha512sig1-01.S │ │ ├── sha512sig1-rwp1.S │ │ ├── sha512sig1-rwp2.S │ │ ├── sha512sum0-01.S │ │ ├── sha512sum0-rwp1.S │ │ ├── sha512sum0-rwp2.S │ │ ├── sha512sum1-01.S │ │ ├── sha512sum1-rwp1.S │ │ ├── sha512sum1-rwp2.S │ │ ├── sm3p0-01.S │ │ ├── sm3p0-rwp1.S │ │ ├── sm3p0-rwp2.S │ │ ├── sm3p1-01.S │ │ ├── sm3p1-rwp1.S │ │ ├── sm3p1-rwp2.S │ │ ├── sm4ed-01.S │ │ ├── sm4ed-rwp1.S │ │ ├── sm4ks-01.S │ │ ├── sm4ks-rwp1.S │ │ ├── unzip-01.S │ │ ├── xnor-01.S │ │ ├── xperm.b-01.S │ │ ├── xperm.n-01.S │ │ └── zip-01.S │ ├── M │ ├── Makefile │ ├── Makefrag │ ├── references │ │ ├── div-01.reference_output │ │ ├── divu-01.reference_output │ │ ├── divuw-01.reference_output │ │ ├── divw-01.reference_output │ │ ├── mul-01.reference_output │ │ ├── mulh-01.reference_output │ │ ├── mulhsu-01.reference_output │ │ ├── mulhu-01.reference_output │ │ ├── mulw-01.reference_output │ │ ├── rem-01.reference_output │ │ ├── remu-01.reference_output │ │ ├── remuw-01.reference_output │ │ └── remw-01.reference_output │ └── src │ │ ├── div-01.S │ │ ├── divu-01.S │ │ ├── divuw-01.S │ │ ├── divw-01.S │ │ ├── mul-01.S │ │ ├── mulh-01.S │ │ ├── mulhsu-01.S │ │ ├── mulhu-01.S │ │ ├── mulw-01.S │ │ ├── rem-01.S │ │ ├── remu-01.S │ │ ├── remuw-01.S │ │ └── remw-01.S │ ├── Zifencei │ ├── Makefile │ ├── Makefrag │ ├── references │ │ └── Fencei.reference_output │ └── src │ │ └── Fencei.S │ └── privilege │ ├── Makefile │ ├── Makefrag │ ├── references │ ├── ebreak.reference_output │ ├── ecall.reference_output │ ├── misalign-beq-01.reference_output │ ├── misalign-bge-01.reference_output │ ├── misalign-bgeu-01.reference_output │ ├── misalign-blt-01.reference_output │ ├── misalign-bltu-01.reference_output │ ├── misalign-bne-01.reference_output │ ├── misalign-jal-01.reference_output │ ├── misalign-ld-01.reference_output │ ├── misalign-lh-01.reference_output │ ├── misalign-lhu-01.reference_output │ ├── misalign-lw-01.reference_output │ ├── misalign-lwu-01.reference_output │ ├── misalign-sd-01.reference_output │ ├── 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