├── inc ├── hsa_ext_amd.h ├── amd_hsa_signal.h ├── amd_hsa_queue.h └── amd_hsa_common.h ├── core ├── util │ ├── Makefile.util │ ├── small_heap.h │ ├── timer.cpp │ ├── locks.h │ ├── timer.h │ └── small_heap.cpp ├── inc │ ├── blit.h │ ├── amd_sdma_cmdwriter_kv.h │ ├── amd_blit_kernel.h │ ├── hsa_table_interface.h │ ├── hsa_api_trace_int.h │ ├── amd_memory_registration.h │ ├── amd_topology.h │ ├── hsa_ext_interface.h │ ├── checked.h │ ├── amd_dgpu_agent.h │ ├── thunk.h │ ├── amd_blit_sdma.h │ ├── memory_region.h │ ├── amd_memory_region.h │ ├── amd_cpu_agent.h │ ├── amd_loader_context.hpp │ ├── default_signal.h │ ├── amd_load_map.h │ ├── agent.h │ ├── host_queue.h │ └── interrupt_signal.h ├── runtime │ ├── isa.hpp │ ├── Makefile.runtime │ ├── compute_capability.hpp │ ├── amd_memory_registration.cpp │ ├── host_queue.cpp │ ├── amd_sdma_cmdwriter_kv.cpp │ ├── compute_capability.cpp │ └── amd_load_map.cpp ├── tools │ └── libamdhsacode │ │ ├── xutil.cpp │ │ ├── amd_hsa_locks.cpp │ │ ├── amd_hsa_locks.hpp │ │ ├── xutil.hpp │ │ └── amd_hsa_code_util.hpp ├── common │ ├── shared.cpp │ └── shared.h ├── hsacore.so.def └── CMakeLists.txt ├── LICENSE.txt └── README.md /inc/hsa_ext_amd.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/HSAFoundation/HSA-Runtime-Reference-Source/HEAD/inc/hsa_ext_amd.h -------------------------------------------------------------------------------- /core/util/Makefile.util: -------------------------------------------------------------------------------- 1 | include $(CORE_DEPTH)/make/coredefs 2 | 3 | include $(CORE_DEPTH)/make/Makefile.$(CORE_OS_PLATFORM).core 4 | 5 | CPPFILES += small_heap.cpp\ 6 | timer.cpp 7 | 8 | LIB_TARGET = util 9 | 10 | CORE_SRCDIR = $(CORE_DEPTH)/util 11 | SRCPATH = $(CORE_SRCDIR) 12 | 13 | include $(CORE_DEPTH)/make/corerules 14 | -------------------------------------------------------------------------------- /core/inc/blit.h: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_INC_BLIT_H_ 2 | #define HSA_RUNTIME_CORE_INC_BLIT_H_ 3 | 4 | #include 5 | 6 | #include "core/inc/agent.h" 7 | 8 | namespace core { 9 | class Blit { 10 | public: 11 | explicit Blit() {} 12 | virtual ~Blit() {} 13 | 14 | /// @brief Initialize a blit object. 15 | /// 16 | /// @param agent Pointer to the agent that will execute the blit commands. 17 | /// 18 | /// @return hsa_status_t 19 | virtual hsa_status_t Initialize(const core::Agent& agent) = 0; 20 | 21 | /// @brief Marks the blit object as invalid and uncouples its link with 22 | /// the underlying compute device's control block. Use of blit object 23 | /// once it has been release is illegal and any behavior is indeterminate 24 | /// 25 | /// @note: The call will block until all commands have executed. 26 | /// 27 | /// @return hsa_status_t 28 | virtual hsa_status_t Destroy() = 0; 29 | 30 | /// @brief Submit a linear copy command to the the underlying compute device's 31 | /// control block. The call is blocking until the command execution is 32 | /// finished. 33 | /// 34 | /// @param dst Memory address of the copy destination. 35 | /// @param src Memory address of the copy source. 36 | /// @param size Size of the data to be copied. 37 | virtual hsa_status_t SubmitLinearCopyCommand(void* dst, const void* src, 38 | size_t size) = 0; 39 | }; 40 | } // namespace core 41 | 42 | #endif // header guard 43 | -------------------------------------------------------------------------------- /core/inc/amd_sdma_cmdwriter_kv.h: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_AMD_SDMA_COMDWRITER_KV_H_ 2 | #define HSA_RUNTIME_CORE_AMD_SDMA_COMDWRITER_KV_H_ 3 | 4 | #include 5 | 6 | #include "core/inc/runtime.h" 7 | #include "core/util/utils.h" 8 | 9 | namespace amd { 10 | class SdmaCmdwriterKv { 11 | public: 12 | explicit SdmaCmdwriterKv(size_t sdma_queue_buffer_size); 13 | 14 | virtual ~SdmaCmdwriterKv(); 15 | 16 | virtual void WriteLinearCopyCommand(char* command_buffer, void* dst, 17 | const void* src, uint32_t copy_size); 18 | 19 | virtual void WriteFenceCommand(char* command_buffer, uint32_t* fence_address, 20 | uint32_t fence_value); 21 | 22 | inline uint32_t linear_copy_command_size() { 23 | return linear_copy_command_size_; 24 | } 25 | 26 | inline uint32_t fence_command_size() { return fence_command_size_; } 27 | 28 | inline size_t max_single_linear_copy_size() { 29 | return max_single_linear_copy_size_; 30 | } 31 | 32 | inline size_t max_total_linear_copy_size() { 33 | return max_total_linear_copy_size_; 34 | } 35 | 36 | protected: 37 | uint32_t linear_copy_command_size_; 38 | uint32_t fence_command_size_; 39 | 40 | /// Max copy size of a single linear copy command packet. 41 | size_t max_single_linear_copy_size_; 42 | 43 | /// Max total copy size supported by this queue. 44 | size_t max_total_linear_copy_size_; 45 | 46 | DISALLOW_COPY_AND_ASSIGN(SdmaCmdwriterKv); 47 | }; 48 | } // namespace 49 | #endif 50 | -------------------------------------------------------------------------------- /LICENSE.txt: -------------------------------------------------------------------------------- 1 | The University of Illinois/NCSA 2 | Open Source License (NCSA) 3 | 4 | Copyright (c) 2014, Advanced Micro Devices, Inc. 5 | All rights reserved. 6 | 7 | Developed by: 8 | 9 | AMD Research and AMD HSA Software Development 10 | 11 | Advanced Micro Devices, Inc. 12 | 13 | www.amd.com 14 | 15 | Permission is hereby granted, free of charge, to any person obtaining a copy 16 | of this software and associated documentation files (the "Software"), to 17 | deal with the Software without restriction, including without limitation 18 | the rights to use, copy, modify, merge, publish, distribute, sublicense, 19 | and/or sell copies of the Software, and to permit persons to whom the 20 | Software is furnished to do so, subject to the following conditions: 21 | 22 | - Redistributions of source code must retain the above copyright notice, 23 | this list of conditions and the following disclaimers. 24 | - Redistributions in binary form must reproduce the above copyright 25 | notice, this list of conditions and the following disclaimers in 26 | the documentation and/or other materials provided with the distribution. 27 | - Neither the names of Advanced Micro Devices, Inc, 28 | nor the names of its contributors may be used to endorse or promote 29 | products derived from this Software without specific prior written 30 | permission. 31 | 32 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 33 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 34 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 35 | THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 36 | OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 37 | ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 38 | DEALINGS WITH THE SOFTWARE. 39 | -------------------------------------------------------------------------------- /core/runtime/isa.hpp: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_ISA_HPP_ 2 | #define HSA_RUNTIME_CORE_ISA_HPP_ 3 | 4 | #include 5 | #include 6 | #include 7 | #include "core/runtime/compute_capability.hpp" 8 | #include "core/inc/agent.h" 9 | #include "core/inc/hsa_internal.h" 10 | #include "core/inc/amd_hsa_code.hpp" 11 | 12 | #define ISA_NAME_AMD_VENDOR "AMD" 13 | #define ISA_NAME_AMD_DEVICE "AMDGPU" 14 | #define ISA_NAME_AMD_TOKEN_COUNT 5 15 | 16 | namespace core { 17 | 18 | //===----------------------------------------------------------------------===// 19 | // Isa. // 20 | //===----------------------------------------------------------------------===// 21 | 22 | class Isa final: public amd::hsa::common::Signed<0xB13594F2BD8F212D> { 23 | public: 24 | const std::string &full_name() const { return full_name_; } 25 | const std::string &vendor() const { return vendor_; } 26 | const std::string &device() const { return device_; } 27 | const ComputeCapability &compute_capability() const { 28 | return compute_capability_; 29 | } 30 | 31 | static hsa_status_t Create(const hsa_agent_t &in_agent, 32 | hsa_isa_t *out_isa_handle); 33 | 34 | static hsa_status_t Create(const char *in_isa_name, 35 | hsa_isa_t *out_isa_handle); 36 | 37 | static hsa_isa_t Handle(const Isa *in_isa_object); 38 | 39 | static Isa *Object(const hsa_isa_t &in_isa_handle); 40 | 41 | Isa() : full_name_(""), vendor_(""), device_("") {} 42 | 43 | ~Isa() {} 44 | 45 | hsa_status_t Initialize(const hsa_agent_t &in_agent); 46 | 47 | hsa_status_t Initialize(const char *in_isa_name); 48 | 49 | void Reset(); 50 | 51 | hsa_status_t GetInfo(const hsa_isa_info_t &in_isa_attribute, 52 | const uint32_t &in_call_convention_index, 53 | void *out_value) const; 54 | 55 | hsa_status_t IsCompatible(const Isa &in_isa_object, bool *out_result) const; 56 | 57 | bool IsValid(); 58 | 59 | friend std::ostream &operator<<(std::ostream &out_stream, const Isa &in_isa); 60 | 61 | private: 62 | std::string full_name_; 63 | std::string vendor_; 64 | std::string device_; 65 | ComputeCapability compute_capability_; 66 | }; // class Isa 67 | 68 | } // namespace core 69 | 70 | #endif // HSA_RUNTIME_CORE_ISA_HPP_ 71 | -------------------------------------------------------------------------------- /core/inc/amd_blit_kernel.h: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_INC_AMD_BLIT_KERNEL_H_ 2 | #define HSA_RUNTIME_CORE_INC_AMD_BLIT_KERNEL_H_ 3 | 4 | #include 5 | 6 | #include "core/inc/blit.h" 7 | 8 | namespace amd { 9 | class BlitKernel : public core::Blit { 10 | public: 11 | explicit BlitKernel(); 12 | virtual ~BlitKernel() override; 13 | 14 | /// @brief Initialize a blit kernel object. 15 | /// 16 | /// @param agent Pointer to the agent that will execute the AQL packets. 17 | /// 18 | /// @return hsa_status_t 19 | virtual hsa_status_t Initialize(const core::Agent& agent) override; 20 | 21 | /// @brief Marks the blit kernel object as invalid and uncouples its link with 22 | /// the underlying AQL kernel queue. Use of the blit object 23 | /// once it has been release is illegal and any behavior is indeterminate 24 | /// 25 | /// @note: The call will block until all AQL packets have been executed. 26 | /// 27 | /// @return hsa_status_t 28 | virtual hsa_status_t Destroy() override; 29 | 30 | /// @brief Submit an AQL packet to perform vector copy. The call is blocking 31 | /// until the command execution is 32 | /// finished. 33 | /// 34 | /// @param dst Memory address of the copy destination. 35 | /// @param src Memory address of the copy source. 36 | /// @param size Size of the data to be copied. 37 | virtual hsa_status_t SubmitLinearCopyCommand(void* dst, const void* src, 38 | size_t size) override; 39 | 40 | private: 41 | /// Reserve a slot in the queue buffer. The call will wait until the queue 42 | /// buffer has a room. 43 | uint64_t AcquireWriteIndex(uint32_t num_packet); 44 | 45 | /// Update the queue doorbell register with ::write_index. This 46 | /// function also serializes concurrent doorbell update to ensure that the 47 | /// packet processor doesn't get invalid packet. 48 | void ReleaseWriteIndex(uint64_t write_index, uint32_t num_packet); 49 | 50 | /// Wait until all packets are finished. 51 | hsa_status_t FenceRelease(uint64_t write_index, uint32_t num_copy_packet, 52 | hsa_fence_scope_t fence); 53 | 54 | /// Handles to the vector copy kernel. 55 | hsa_executable_t code_executable_; 56 | hsa_code_object_t code_object_; 57 | uint64_t code_handle_; 58 | uint32_t code_private_segment_size_; 59 | 60 | /// AQL queue for submitting the vector copy kernel. 61 | hsa_queue_t* queue_; 62 | uint32_t queue_bitmask_; 63 | 64 | /// Index to track concurrent kernel launch. 65 | volatile std::atomic cached_index_; 66 | 67 | static const size_t kMaxCopySize; 68 | static const uint32_t kGroupSize; 69 | }; 70 | } // namespace amd 71 | 72 | #endif // header guard 73 | -------------------------------------------------------------------------------- /core/tools/libamdhsacode/xutil.cpp: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * University of Illinois / NCSA 3 | * Open Source License 4 | * 5 | * Copyright(c) 2011 - 2015 Advanced Micro Devices, Inc. 6 | * All rights reserved. 7 | * 8 | * Developed by: 9 | * Advanced Micro Devices, Inc. 10 | * www.amd.com 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining a copy 13 | * of this software and associated documentation files(the "Software"), to deal 14 | * with the Software without restriction, including without limitation the 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and / 16 | * or sell copies of the Software, and to permit persons to whom the Software 17 | * is furnished to do so, subject to the following conditions: 18 | * 19 | * Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimers. 21 | * 22 | * Redistributions in binary form must reproduce the above copyright notice, 23 | * this list of conditions and the following disclaimers in the documentation 24 | * and / or other materials provided with the distribution. 25 | * 26 | * Neither the names of Advanced Micro Devices, Inc, nor the 27 | mes of its 28 | * contributors may be used to endorse or promote products derived from this 29 | * Software without specific prior written permission. 30 | * 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE 34 | * CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 35 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 36 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH 37 | * THE SOFTWARE. 38 | ******************************************************************************/ 39 | 40 | #include "xutil.hpp" 41 | 42 | #include 43 | #include 44 | #include 45 | 46 | //===----------------------------------------------------------------------===// 47 | // File I/O. // 48 | //===----------------------------------------------------------------------===// 49 | 50 | #define XFIO_DOFF O_BINARY | O_CREAT | O_EXCL | O_RDWR 51 | 52 | #if defined(_WIN32) || defined(_WIN64) 53 | #define XFIO_DOFP _S_IREAD | _S_IWRITE 54 | #else 55 | #define XFIO_DOFP S_IRUSR | S_IWUSR 56 | #endif // _WIN32 || _WIN64 57 | 58 | int 59 | xx_open(const char *path, const int &flags) 60 | { 61 | int file_descriptor = -1; 62 | 63 | #if defined(_WIN32) || defined(_WIN64) 64 | _sopen_s(&file_descriptor, path, flags, _SH_DENYNO, XFIO_DOFP); 65 | #else 66 | file_descriptor = open(path, flags, XFIO_DOFP); 67 | #endif // _WIN32 || _WIN64 68 | 69 | return file_descriptor; 70 | } 71 | -------------------------------------------------------------------------------- /core/inc/hsa_table_interface.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "hsa_api_trace.h" 48 | 49 | void hsa_table_interface_init(const ApiTable* table); 50 | 51 | const ApiTable* hsa_table_interface_get_table(); 52 | -------------------------------------------------------------------------------- /core/common/shared.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "core/common/shared.h" 48 | 49 | namespace core { 50 | std::function* BaseShared::allocate_ = NULL; 51 | std::function* BaseShared::free_ = NULL; 52 | } -------------------------------------------------------------------------------- /core/runtime/Makefile.runtime: -------------------------------------------------------------------------------- 1 | include $(CORE_DEPTH)/make/coredefs 2 | 3 | include $(CORE_DEPTH)/make/Makefile.$(CORE_OS_PLATFORM).core 4 | 5 | LCXXINCS += -I$(CORE_DEPTH)/commandwriter \ 6 | -I$(CORE_DEPTH)/commandwriter/include/si \ 7 | -I$(CORE_DEPTH)/../../../inc/asic_reg \ 8 | -I$(SCLIB_DEPTH)/Interface \ 9 | -I$(SCLIB_DEPTH)/IL/inc \ 10 | -I$(HSAIL_TOOLS_DEPTH)/libHSAIL \ 11 | -I$(HSAIL_TOOLS_DEPTH)/libHSAIL/build/$(CORE_OS_BUILD)/B_$(BUILD_TYPE) \ 12 | -I$(CORE_DEPTH)/../../../hsathk/include \ 13 | -I$(CORE_DEPTH)/../common \ 14 | -I$(CORE_DEPTH)/../inc \ 15 | -I$(CORE_DEPTH)/../ \ 16 | -I$(CORE_DEPTH)/finalizer \ 17 | -I$(CORE_DEPTH)/common \ 18 | -I$(CORE_DEPTH)/../../contrib/elftoolchain/common \ 19 | -I$(CORE_DEPTH)/../../contrib/elftoolchain/libelf \ 20 | 21 | ifeq ($(CORE_OS_PLATFORM),win) 22 | LCXXINCS += -I$(CORE_DEPTH)/../../contrib/elftoolchain/common/win32 23 | endif 24 | 25 | 26 | CPPFILES = hsa.cpp \ 27 | hsa_ext_amd.cpp \ 28 | runtime.cpp \ 29 | interrupt_signal.cpp \ 30 | memory_database.cpp \ 31 | host_queue.cpp \ 32 | default_signal.cpp \ 33 | amd_hw_aql_command_processor.cpp \ 34 | hsa_ext_interface.cpp \ 35 | amd_topology.cpp \ 36 | amd_memory_registration.cpp \ 37 | amd_memory_region.cpp \ 38 | amd_gpu_agent.cpp \ 39 | amd_dgpu_agent.cpp \ 40 | amd_cpu_agent.cpp \ 41 | amd_blit_kernel.cpp \ 42 | amd_blit_sdma.cpp \ 43 | amd_sdma_cmdwriter_kv.cpp \ 44 | hsa_api_trace.cpp \ 45 | signal.cpp \ 46 | compute_capability.cpp \ 47 | isa.cpp \ 48 | amd_loader_context.cpp \ 49 | amd_load_map.cpp \ 50 | 51 | 52 | LIB_TARGET = runtime 53 | 54 | CORE_SRCDIR = $(CORE_DEPTH)/runtime 55 | SRCPATH = $(CORE_SRCDIR) 56 | 57 | include $(CORE_DEPTH)/make/corerules 58 | -------------------------------------------------------------------------------- /core/runtime/compute_capability.hpp: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_COMPUTE_CAPABILITY_HPP_ 2 | #define HSA_RUNTIME_CORE_COMPUTE_CAPABILITY_HPP_ 3 | 4 | #include 5 | #include 6 | 7 | #define COMPUTE_CAPABILITY_VERSION_MAJOR_UNDEFINED -1 8 | #define COMPUTE_CAPABILITY_VERSION_MINOR_UNDEFINED -1 9 | #define COMPUTE_CAPABILITY_VERSION_STEPPING_UNDEFINED -1 10 | 11 | namespace core { 12 | 13 | //===----------------------------------------------------------------------===// 14 | // ComputeProperties. // 15 | //===----------------------------------------------------------------------===// 16 | 17 | class ComputeProperties final { 18 | public: 19 | const bool &is_initialized() const { return is_initialized_; } 20 | 21 | ComputeProperties() : is_initialized_(false) {} 22 | 23 | ~ComputeProperties() {} 24 | 25 | void Initialize(); 26 | 27 | void Reset(); 28 | 29 | private: 30 | bool is_initialized_; 31 | }; // class ComputeProperties 32 | 33 | //===----------------------------------------------------------------------===// 34 | // ComputeCapability. // 35 | //===----------------------------------------------------------------------===// 36 | 37 | class ComputeCapability final { 38 | public: 39 | const int32_t &version_major() const { return version_major_; } 40 | const int32_t &version_minor() const { return version_minor_; } 41 | const int32_t &version_stepping() const { return version_stepping_; } 42 | const ComputeProperties &compute_properties() const { 43 | return compute_properties_; 44 | } 45 | 46 | void set_version_major(const int32_t &in_version_major) { 47 | version_major_ = in_version_major; 48 | } 49 | void set_version_minor(const int32_t &in_version_minor) { 50 | version_minor_ = in_version_minor; 51 | } 52 | void set_version_stepping(const int32_t &in_version_stepping) { 53 | version_stepping_ = in_version_stepping; 54 | } 55 | 56 | ComputeCapability() 57 | : version_major_(COMPUTE_CAPABILITY_VERSION_MAJOR_UNDEFINED), 58 | version_minor_(COMPUTE_CAPABILITY_VERSION_MINOR_UNDEFINED), 59 | version_stepping_(COMPUTE_CAPABILITY_VERSION_STEPPING_UNDEFINED) {} 60 | 61 | ComputeCapability(const int32_t &in_version_major, 62 | const int32_t &in_version_minor, 63 | const int32_t &in_version_stepping); 64 | 65 | ~ComputeCapability() {} 66 | 67 | void Initialize(const int32_t &in_version_major, 68 | const int32_t &in_version_minor, 69 | const int32_t &in_version_stepping); 70 | 71 | // void Initialize(const uint32_t &in_device_id); 72 | 73 | void Reset(); 74 | 75 | bool IsValid(); 76 | 77 | friend std::ostream &operator<<( 78 | std::ostream &out_stream, const ComputeCapability &in_compute_capability); 79 | 80 | private: 81 | int32_t version_major_; 82 | int32_t version_minor_; 83 | int32_t version_stepping_; 84 | ComputeProperties compute_properties_; 85 | }; // class ComputeCapability 86 | 87 | } // namespace core 88 | 89 | #endif // HSA_RUNTIME_CORE_COMPUTE_CAPABILITY_HPP_ 90 | -------------------------------------------------------------------------------- /core/tools/libamdhsacode/amd_hsa_locks.cpp: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * University of Illinois / NCSA 3 | * Open Source License 4 | * 5 | * Copyright(c) 2011 - 2015 Advanced Micro Devices, Inc. 6 | * All rights reserved. 7 | * 8 | * Developed by: 9 | * Advanced Micro Devices, Inc. 10 | * www.amd.com 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining a copy 13 | * of this software and associated documentation files(the "Software"), to deal 14 | * with the Software without restriction, including without limitation the 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and / 16 | * or sell copies of the Software, and to permit persons to whom the Software 17 | * is furnished to do so, subject to the following conditions: 18 | * 19 | * Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimers. 21 | * 22 | * Redistributions in binary form must reproduce the above copyright notice, 23 | * this list of conditions and the following disclaimers in the documentation 24 | * and / or other materials provided with the distribution. 25 | * 26 | * Neither the names of Advanced Micro Devices, Inc, nor the 27 | mes of its 28 | * contributors may be used to endorse or promote products derived from this 29 | * Software without specific prior written permission. 30 | * 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE 34 | * CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 35 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 36 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH 37 | * THE SOFTWARE. 38 | ******************************************************************************/ 39 | 40 | #include "amd_hsa_locks.hpp" 41 | 42 | namespace amd { 43 | namespace hsa { 44 | namespace common { 45 | 46 | void ReaderWriterLock::ReaderLock() 47 | { 48 | internal_lock_.lock(); 49 | while (0 < writers_count_) { 50 | readers_condition_.wait(internal_lock_); 51 | } 52 | readers_count_ += 1; 53 | internal_lock_.unlock(); 54 | } 55 | 56 | void ReaderWriterLock::ReaderUnlock() 57 | { 58 | internal_lock_.lock(); 59 | readers_count_ -= 1; 60 | if (0 == readers_count_ && 0 < writers_waiting_) { 61 | writers_condition_.notify_one(); 62 | } 63 | internal_lock_.unlock(); 64 | } 65 | 66 | void ReaderWriterLock::WriterLock() 67 | { 68 | internal_lock_.lock(); 69 | writers_waiting_ += 1; 70 | while (0 < readers_count_ || 0 < writers_count_) { 71 | writers_condition_.wait(internal_lock_); 72 | } 73 | writers_count_ += 1; 74 | writers_waiting_ -= 1; 75 | internal_lock_.unlock(); 76 | } 77 | 78 | void ReaderWriterLock::WriterUnlock() 79 | { 80 | internal_lock_.lock(); 81 | writers_count_ -= 1; 82 | if (0 < writers_waiting_) { 83 | writers_condition_.notify_one(); 84 | } 85 | readers_condition_.notify_all(); 86 | internal_lock_.unlock(); 87 | } 88 | 89 | } // namespace common 90 | } // namespace hsa 91 | } // namespace amd 92 | -------------------------------------------------------------------------------- /core/inc/hsa_api_trace_int.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTIME_CORE_INC_HSA_API_TRACE_INT_H 48 | #define HSA_RUNTIME_CORE_INC_HSA_API_TRACE_INT_H 49 | 50 | #include "inc/hsa_api_trace.h" 51 | #include "core/inc/hsa_internal.h" 52 | 53 | namespace core { 54 | struct ApiTable { 55 | ::ApiTable table; 56 | ExtTable extension_backup; 57 | 58 | ApiTable(); 59 | void Reset(); 60 | void LinkExts(ExtTable* ptr); 61 | }; 62 | 63 | extern ApiTable hsa_api_table_; 64 | extern ApiTable hsa_internal_api_table_; 65 | } 66 | 67 | #endif 68 | -------------------------------------------------------------------------------- /core/inc/amd_memory_registration.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // AMD specific HSA backend. 48 | 49 | #ifndef HSA_RUNTIME_CORE_INC_AMD_MEMORY_REGISTRATION_H_ 50 | #define HSA_RUNTIME_CORE_INC_AMD_MEMORY_REGISTRATION_H_ 51 | 52 | #include "stddef.h" 53 | 54 | namespace amd { 55 | /// @brief Tag memory pages for optimized agent access. 56 | bool RegisterKfdMemory(void* ptr, size_t length); 57 | 58 | /// @brief Untag previoulsy tagged memory pages. 59 | void DeregisterKfdMemory(void* ptr); 60 | } // namespace 61 | 62 | #endif // header guard 63 | -------------------------------------------------------------------------------- /core/inc/amd_topology.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTIME_CORE_INC_AMD_TOPOLOGY_H_ 48 | #define HSA_RUNTIME_CORE_INC_AMD_TOPOLOGY_H_ 49 | 50 | #include "core/inc/thunk.h" 51 | 52 | namespace amd { 53 | /// @brief Initializes the runtime. 54 | /// Should not be called directly, must be called only from Runtime::Acquire() 55 | void Load(); 56 | 57 | /// @brief Shutdown/cleanup of runtime. 58 | /// Should not be called directly, must be called only from Runtime::Release() 59 | void Unload(); 60 | } // namespace 61 | 62 | #endif // header guard 63 | -------------------------------------------------------------------------------- /core/runtime/amd_memory_registration.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "core/inc/amd_memory_registration.h" 48 | 49 | #include "core/inc/thunk.h" 50 | 51 | namespace amd { 52 | bool RegisterKfdMemory(void* ptr, size_t length) { 53 | if (hsaKmtRegisterMemory(ptr, length) != HSAKMT_STATUS_SUCCESS) { 54 | return false; 55 | } 56 | 57 | HSAuint64 alternate_va; 58 | hsaKmtMapMemoryToGPU(ptr, length, &alternate_va); 59 | 60 | return true; 61 | } 62 | 63 | void DeregisterKfdMemory(void* ptr) { 64 | hsaKmtUnmapMemoryToGPU(ptr); 65 | hsaKmtDeregisterMemory(ptr); 66 | } 67 | } // namespace 68 | -------------------------------------------------------------------------------- /core/inc/hsa_ext_interface.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTME_CORE_INC_AMD_EXT_INTERFACE_H_ 48 | #define HSA_RUNTME_CORE_INC_AMD_EXT_INTERFACE_H_ 49 | 50 | #include 51 | #include 52 | 53 | #include "hsa_api_trace_int.h" 54 | 55 | #include "core/util/os.h" 56 | #include "core/util/utils.h" 57 | 58 | namespace core { 59 | struct ExtTableInternal : public ExtTable { 60 | decltype(::hsa_amd_image_get_info_max_dim)* hsa_amd_image_get_info_max_dim_fn; 61 | }; 62 | 63 | class ExtensionEntryPoints { 64 | public: 65 | ExtTableInternal table; 66 | 67 | ExtensionEntryPoints(); 68 | 69 | bool Load(std::string library_name); 70 | void Unload(); 71 | 72 | private: 73 | typedef void (*Load_t)(const ::ApiTable* table); 74 | typedef void (*Unload_t)(); 75 | 76 | std::vector libs_; 77 | 78 | void InitTable(); 79 | DISALLOW_COPY_AND_ASSIGN(ExtensionEntryPoints); 80 | }; 81 | } 82 | 83 | #endif 84 | -------------------------------------------------------------------------------- /core/inc/checked.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTME_CORE_INC_CHECKED_H_ 48 | #define HSA_RUNTME_CORE_INC_CHECKED_H_ 49 | 50 | #include "stdint.h" 51 | 52 | namespace core { 53 | 54 | /// @brief Base class for all classes whose validity can be checked using 55 | /// IsValid() method. 56 | template 57 | class Checked { 58 | public: 59 | typedef Checked CheckedType; 60 | 61 | Checked() { object_ = uintptr_t(this) ^ uintptr_t(code); } 62 | Checked(const Checked&) { object_ = uintptr_t(this) ^ uintptr_t(code); } 63 | Checked(Checked&&) { object_ = uintptr_t(this) ^ uintptr_t(code); } 64 | 65 | virtual ~Checked() { object_ = NULL; } 66 | 67 | const Checked& operator=(Checked&& rhs) { return *this; } 68 | const Checked& operator=(const Checked& rhs) { return *this; } 69 | 70 | bool IsValid() const { 71 | return object_ == (uintptr_t(this) ^ uintptr_t(code)); 72 | } 73 | 74 | private: 75 | uintptr_t object_; 76 | }; 77 | 78 | } // namespace core 79 | #endif // header guard 80 | -------------------------------------------------------------------------------- /inc/amd_hsa_signal.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef AMD_HSA_SIGNAL_H 48 | #define AMD_HSA_SIGNAL_H 49 | 50 | #include "amd_hsa_common.h" 51 | #include "amd_hsa_queue.h" 52 | 53 | // AMD Signal Kind Enumeration Values. 54 | typedef int64_t amd_signal_kind64_t; 55 | enum amd_signal_kind_t { 56 | AMD_SIGNAL_KIND_INVALID = 0, 57 | AMD_SIGNAL_KIND_USER = 1, 58 | AMD_SIGNAL_KIND_DOORBELL = -1, 59 | AMD_SIGNAL_KIND_LEGACY_DOORBELL = -2 60 | }; 61 | 62 | // AMD Signal. 63 | #define AMD_SIGNAL_ALIGN_BYTES 64 64 | #define AMD_SIGNAL_ALIGN __ALIGNED__(AMD_SIGNAL_ALIGN_BYTES) 65 | typedef AMD_SIGNAL_ALIGN struct amd_signal_s { 66 | amd_signal_kind64_t kind; 67 | union { 68 | volatile int64_t value; 69 | volatile uint32_t* legacy_hardware_doorbell_ptr; 70 | volatile uint64_t* hardware_doorbell_ptr; 71 | }; 72 | uint64_t event_mailbox_ptr; 73 | uint32_t event_id; 74 | uint32_t reserved1; 75 | uint64_t start_ts; 76 | uint64_t end_ts; 77 | union { 78 | amd_queue_t* queue_ptr; 79 | uint64_t reserved2; 80 | }; 81 | uint32_t reserved3[2]; 82 | } amd_signal_t; 83 | 84 | #endif // AMD_HSA_SIGNAL_H 85 | -------------------------------------------------------------------------------- /core/tools/libamdhsacode/amd_hsa_locks.hpp: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * University of Illinois / NCSA 3 | * Open Source License 4 | * 5 | * Copyright(c) 2011 - 2015 Advanced Micro Devices, Inc. 6 | * All rights reserved. 7 | * 8 | * Developed by: 9 | * Advanced Micro Devices, Inc. 10 | * www.amd.com 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining a copy 13 | * of this software and associated documentation files(the "Software"), to deal 14 | * with the Software without restriction, including without limitation the 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and / 16 | * or sell copies of the Software, and to permit persons to whom the Software 17 | * is furnished to do so, subject to the following conditions: 18 | * 19 | * Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimers. 21 | * 22 | * Redistributions in binary form must reproduce the above copyright notice, 23 | * this list of conditions and the following disclaimers in the documentation 24 | * and / or other materials provided with the distribution. 25 | * 26 | * Neither the names of Advanced Micro Devices, Inc, nor the 27 | mes of its 28 | * contributors may be used to endorse or promote products derived from this 29 | * Software without specific prior written permission. 30 | * 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE 34 | * CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 35 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 36 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH 37 | * THE SOFTWARE. 38 | ******************************************************************************/ 39 | 40 | #ifndef AMD_HSA_LOCKS_HPP 41 | #define AMD_HSA_LOCKS_HPP 42 | 43 | #include 44 | #include 45 | #include 46 | 47 | namespace amd { 48 | namespace hsa { 49 | namespace common { 50 | 51 | template 52 | class ReaderLockGuard final { 53 | public: 54 | explicit ReaderLockGuard(LockType &lock): 55 | lock_(lock) 56 | { 57 | lock_.ReaderLock(); 58 | } 59 | 60 | ~ReaderLockGuard() 61 | { 62 | lock_.ReaderUnlock(); 63 | } 64 | 65 | private: 66 | ReaderLockGuard(const ReaderLockGuard&); 67 | ReaderLockGuard& operator=(const ReaderLockGuard&); 68 | 69 | LockType &lock_; 70 | }; 71 | 72 | template 73 | class WriterLockGuard final { 74 | public: 75 | explicit WriterLockGuard(LockType &lock): 76 | lock_(lock) 77 | { 78 | lock_.WriterLock(); 79 | } 80 | 81 | ~WriterLockGuard() 82 | { 83 | lock_.WriterUnlock(); 84 | } 85 | 86 | private: 87 | WriterLockGuard(const WriterLockGuard&); 88 | WriterLockGuard& operator=(const WriterLockGuard&); 89 | 90 | LockType &lock_; 91 | }; 92 | 93 | class ReaderWriterLock final { 94 | public: 95 | ReaderWriterLock(): 96 | readers_count_(0), writers_count_(0), writers_waiting_(0) {} 97 | 98 | ~ReaderWriterLock() {} 99 | 100 | void ReaderLock(); 101 | 102 | void ReaderUnlock(); 103 | 104 | void WriterLock(); 105 | 106 | void WriterUnlock(); 107 | 108 | private: 109 | ReaderWriterLock(const ReaderWriterLock&); 110 | ReaderWriterLock& operator=(const ReaderWriterLock&); 111 | 112 | size_t readers_count_; 113 | size_t writers_count_; 114 | size_t writers_waiting_; 115 | std::mutex internal_lock_; 116 | std::condition_variable_any readers_condition_; 117 | std::condition_variable_any writers_condition_; 118 | }; 119 | 120 | } // namespace common 121 | } // namespace hsa 122 | } // namespace amd 123 | 124 | #endif // AMD_HSA_LOCKS_HPP 125 | -------------------------------------------------------------------------------- /core/hsacore.so.def: -------------------------------------------------------------------------------- 1 | { 2 | global: 3 | hsa_init; 4 | hsa_shut_down; 5 | hsa_system_get_info; 6 | hsa_system_extension_supported; 7 | hsa_system_get_extension_table; 8 | hsa_iterate_agents; 9 | hsa_agent_get_info; 10 | hsa_agent_get_exception_policies; 11 | hsa_agent_extension_supported; 12 | hsa_queue_create; 13 | hsa_soft_queue_create; 14 | hsa_queue_destroy; 15 | hsa_queue_inactivate; 16 | hsa_queue_load_read_index_acquire; 17 | hsa_queue_load_read_index_relaxed; 18 | hsa_queue_load_write_index_acquire; 19 | hsa_queue_load_write_index_relaxed; 20 | hsa_queue_store_write_index_relaxed; 21 | hsa_queue_store_write_index_release; 22 | hsa_queue_cas_write_index_acq_rel; 23 | hsa_queue_cas_write_index_acquire; 24 | hsa_queue_cas_write_index_relaxed; 25 | hsa_queue_cas_write_index_release; 26 | hsa_queue_add_write_index_acq_rel; 27 | hsa_queue_add_write_index_acquire; 28 | hsa_queue_add_write_index_relaxed; 29 | hsa_queue_add_write_index_release; 30 | hsa_queue_store_read_index_relaxed; 31 | hsa_queue_store_read_index_release; 32 | hsa_agent_iterate_regions; 33 | hsa_region_get_info; 34 | hsa_memory_register; 35 | hsa_memory_deregister; 36 | hsa_memory_allocate; 37 | hsa_memory_free; 38 | hsa_memory_copy; 39 | hsa_memory_assign_agent; 40 | hsa_signal_create; 41 | hsa_signal_destroy; 42 | hsa_signal_load_relaxed; 43 | hsa_signal_load_acquire; 44 | hsa_signal_store_relaxed; 45 | hsa_signal_store_release; 46 | hsa_signal_wait_relaxed; 47 | hsa_signal_wait_acquire; 48 | hsa_signal_and_relaxed; 49 | hsa_signal_and_acquire; 50 | hsa_signal_and_release; 51 | hsa_signal_and_acq_rel; 52 | hsa_signal_or_relaxed; 53 | hsa_signal_or_acquire; 54 | hsa_signal_or_release; 55 | hsa_signal_or_acq_rel; 56 | hsa_signal_xor_relaxed; 57 | hsa_signal_xor_acquire; 58 | hsa_signal_xor_release; 59 | hsa_signal_xor_acq_rel; 60 | hsa_signal_exchange_relaxed; 61 | hsa_signal_exchange_acquire; 62 | hsa_signal_exchange_release; 63 | hsa_signal_exchange_acq_rel; 64 | hsa_signal_add_relaxed; 65 | hsa_signal_add_acquire; 66 | hsa_signal_add_release; 67 | hsa_signal_add_acq_rel; 68 | hsa_signal_subtract_relaxed; 69 | hsa_signal_subtract_acquire; 70 | hsa_signal_subtract_release; 71 | hsa_signal_subtract_acq_rel; 72 | hsa_signal_cas_relaxed; 73 | hsa_signal_cas_acquire; 74 | hsa_signal_cas_release; 75 | hsa_signal_cas_acq_rel; 76 | hsa_isa_from_name; 77 | hsa_isa_get_info; 78 | hsa_isa_compatible; 79 | hsa_code_object_serialize; 80 | hsa_code_object_deserialize; 81 | hsa_code_object_destroy; 82 | hsa_code_object_get_info; 83 | hsa_code_object_get_symbol; 84 | hsa_code_symbol_get_info; 85 | hsa_code_object_iterate_symbols; 86 | hsa_executable_create; 87 | hsa_executable_destroy; 88 | hsa_executable_load_code_object; 89 | hsa_executable_freeze; 90 | hsa_executable_get_info; 91 | hsa_executable_global_variable_define; 92 | hsa_executable_agent_global_variable_define; 93 | hsa_executable_readonly_variable_define; 94 | hsa_executable_validate; 95 | hsa_executable_get_symbol; 96 | hsa_executable_symbol_get_info; 97 | hsa_executable_iterate_symbols; 98 | hsa_status_string; 99 | hsa_ext_program_create; 100 | hsa_ext_program_destroy; 101 | hsa_ext_program_add_module; 102 | hsa_ext_program_iterate_modules; 103 | hsa_ext_program_get_info; 104 | hsa_ext_program_finalize; 105 | hsa_amd_coherency_get_type; 106 | hsa_amd_coherency_set_type; 107 | hsa_amd_profiling_set_profiler_enabled; 108 | hsa_amd_profiling_get_dispatch_time; 109 | hsa_amd_signal_wait_any; 110 | hsa_amd_signal_async_handler; 111 | hsa_amd_queue_sdma_create; 112 | hsa_amd_queue_sdma_destroy; 113 | hsa_amd_image_get_info_max_dim; 114 | hsa_ext_image_get_capability; 115 | hsa_ext_image_data_get_info; 116 | hsa_ext_image_create; 117 | hsa_ext_image_import; 118 | hsa_ext_image_export; 119 | hsa_ext_image_copy; 120 | hsa_ext_image_clear; 121 | hsa_ext_image_destroy; 122 | hsa_ext_sampler_create; 123 | hsa_ext_sampler_destroy; 124 | hsa_amd_queue_cu_set_mask; 125 | 126 | local: 127 | *; 128 | }; 129 | -------------------------------------------------------------------------------- /core/inc/amd_dgpu_agent.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // AMD specific HSA backend. 48 | 49 | #ifndef HSA_RUNTIME_CORE_INC_AMD_DGPU_AGENT_H_ 50 | #define HSA_RUNTIME_CORE_INC_AMD_DGPU_AGENT_H_ 51 | 52 | #include 53 | 54 | #include "core/inc/amd_gpu_agent.h" 55 | 56 | namespace amd { 57 | class DGpuAgent : public GpuAgent { 58 | public: 59 | DGpuAgent(HSAuint32 node, const HsaNodeProperties& node_props, 60 | const std::vector& cache_props); 61 | 62 | ~DGpuAgent(); 63 | 64 | void RegisterMemoryProperties(core::MemoryRegion& region) override; 65 | 66 | hsa_status_t GetInfo(hsa_agent_info_t attribute, void* value) const override; 67 | 68 | hsa_status_t QueueCreate(size_t size, hsa_queue_type_t queue_type, 69 | core::HsaEventCallback event_callback, void* data, 70 | uint32_t private_segment_size, 71 | uint32_t group_segment_size, 72 | core::Queue** queue) override; 73 | 74 | bool current_coherency_type(hsa_amd_coherency_type_t type) override { 75 | return false; 76 | } 77 | 78 | private: 79 | DISALLOW_COPY_AND_ASSIGN(DGpuAgent); 80 | }; 81 | 82 | } // namespace 83 | 84 | #endif // header guard 85 | -------------------------------------------------------------------------------- /core/tools/libamdhsacode/xutil.hpp: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * University of Illinois / NCSA 3 | * Open Source License 4 | * 5 | * Copyright(c) 2011 - 2015 Advanced Micro Devices, Inc. 6 | * All rights reserved. 7 | * 8 | * Developed by: 9 | * Advanced Micro Devices, Inc. 10 | * www.amd.com 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining a copy 13 | * of this software and associated documentation files(the "Software"), to deal 14 | * with the Software without restriction, including without limitation the 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and / 16 | * or sell copies of the Software, and to permit persons to whom the Software 17 | * is furnished to do so, subject to the following conditions: 18 | * 19 | * Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimers. 21 | * 22 | * Redistributions in binary form must reproduce the above copyright notice, 23 | * this list of conditions and the following disclaimers in the documentation 24 | * and / or other materials provided with the distribution. 25 | * 26 | * Neither the names of Advanced Micro Devices, Inc, nor the 27 | mes of its 28 | * contributors may be used to endorse or promote products derived from this 29 | * Software without specific prior written permission. 30 | * 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE 34 | * CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 35 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 36 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH 37 | * THE SOFTWARE. 38 | ******************************************************************************/ 39 | 40 | #ifndef EXT_COMMON_XUTIL_HPP 41 | #define EXT_COMMON_XUTIL_HPP 42 | 43 | #include 44 | #include 45 | #include 46 | #include 47 | //#include 48 | 49 | //===----------------------------------------------------------------------===// 50 | // File I/O. // 51 | //===----------------------------------------------------------------------===// 52 | 53 | #if defined(_WIN32) || defined(_WIN64) 54 | #include 55 | #include 56 | 57 | #define xx_lseek _lseek 58 | #define xx_close _close 59 | #define xx_unlink _unlink 60 | 61 | #define xx_read(d, b, s) _read(d, b, static_cast(s)) 62 | #define xx_write(d, b, s) _write(d, b, static_cast(s)) 63 | 64 | #define X_TMPNAM_MAX 1024 65 | #else 66 | #include 67 | 68 | #define xx_lseek lseek 69 | #define xx_close close 70 | #define xx_unlink unlink 71 | 72 | #define xx_read(d, b, s) read(d, b, s) 73 | #define xx_write(d, b, s) write(d, b, s) 74 | 75 | #define X_TMPNAM_MAX 6 76 | 77 | #ifndef O_BINARY 78 | #define O_BINARY 0 79 | #else 80 | #error "O_BINARY flag must not be defined" 81 | #endif // O_BINARY 82 | #endif // _WIN32 || _WIN64 83 | 84 | int xx_open(const char *path, const int &flags); 85 | 86 | //===----------------------------------------------------------------------===// 87 | // Standard I/O. // 88 | //===----------------------------------------------------------------------===// 89 | 90 | #if defined(_WIN32) || defined(_WIN64) 91 | #define x_va_copy(d, s) (d) = (s) 92 | #define x_vscprintf(f, a) _vscprintf(f, a) 93 | #define x_vsnprintf(s, n, f, a) vsnprintf_s(s, n, n, f, a) 94 | #else 95 | #define x_va_copy(d, s) va_copy(d, s) 96 | #define x_vscprintf(f, a) vsnprintf(NULL, 0, f, a) 97 | #define x_vsnprintf(s, n, f, a) vsnprintf(s, n, f, a) 98 | #endif // _WIN32 || _WIN64 99 | 100 | #endif // EXT_COMMON_XUTIL_HPP 101 | -------------------------------------------------------------------------------- /core/inc/thunk.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTME_CORE_INC_THUNK_H_ 48 | #define HSA_RUNTME_CORE_INC_THUNK_H_ 49 | 50 | // Add path to hsakmt.h in include search path in CMakeLists.txt or 51 | // any in other build framework being used. 52 | #include "hsakmt.h" 53 | #include "core/util/utils.h" 54 | 55 | typedef struct HsaQueueResourceFixed { 56 | HSA_QUEUEID queue_id; // queue ID 57 | // Doorbell address to notify HW of a new dispatch 58 | union { 59 | volatile HSAuint32* queue_doorbell; 60 | HSAuint64 queue_door_bell; 61 | }; 62 | 63 | // virtual address to notify HW of queue write ptr value 64 | union { 65 | volatile HSAuint32* queue_writeptr; 66 | HSAuint64 queue_writeptr_value; 67 | }; 68 | 69 | // virtual address updated by HW to indicate current read location 70 | union { 71 | volatile HSAuint32* queue_readptr; 72 | HSAuint64 queue_readptr_value; 73 | }; 74 | } HsaQueueResourceFixed; 75 | 76 | static __forceinline HSAKMT_STATUS 77 | hsaKmtCreateQueue(HSAuint32 node_id, HSA_QUEUE_TYPE type, 78 | HSAuint32 queue_percentage, HSA_QUEUE_PRIORITY priority, 79 | void* queue_address, HSAuint64 queue_size, 80 | HsaEvent* event, HsaQueueResourceFixed* queue_resource) { 81 | return hsaKmtCreateQueue(node_id, type, queue_percentage, priority, 82 | queue_address, queue_size, event, 83 | (HsaQueueResource*)queue_resource); 84 | } 85 | #endif // header guard -------------------------------------------------------------------------------- /core/common/shared.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTME_CORE_INC_SHARED_H_ 48 | #define HSA_RUNTME_CORE_INC_SHARED_H_ 49 | #include 50 | 51 | #include 52 | #include 53 | 54 | namespace core { 55 | /// @brief Base class encapsulating the allocator and deallocator for 56 | /// shared shared object. 57 | class BaseShared { 58 | public: 59 | static void SetAllocateAndFree(std::function& allocate, 60 | std::function& free) { 61 | allocate_ = &allocate; 62 | free_ = &free; 63 | } 64 | 65 | protected: 66 | static std::function* allocate_; 67 | static std::function* free_; 68 | }; 69 | 70 | /// @brief Base class for classes that encapsulates object shared between 71 | /// host and agents. 72 | template 73 | class Shared : public BaseShared { 74 | public: 75 | Shared() { 76 | assert(allocate_ != NULL && free_ != NULL && 77 | "Shared object allocator is not set"); 78 | shared_object_ = reinterpret_cast(allocate_->operator()(sizeof(T), A)); 79 | std::memset(shared_object_, 0, sizeof(T)); 80 | } 81 | 82 | virtual ~Shared() { 83 | assert(allocate_ != NULL && free_ != NULL && 84 | "Shared object allocator is not set"); 85 | if (shared_object_ != NULL) { 86 | free_->operator()(shared_object_); 87 | } 88 | } 89 | 90 | T* shared_object() const { return shared_object_; } 91 | 92 | private: 93 | T* shared_object_; 94 | }; 95 | 96 | } // namespace core 97 | #endif // header guard 98 | -------------------------------------------------------------------------------- /core/runtime/host_queue.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "core/inc/host_queue.h" 48 | 49 | #include "core/inc/runtime.h" 50 | #include "core/util/utils.h" 51 | 52 | namespace core { 53 | HostQueue::HostQueue(hsa_region_t region, uint32_t ring_size, 54 | hsa_queue_type_t type, uint32_t features, 55 | hsa_signal_t doorbell_signal) 56 | : size_(ring_size), active_(false) { 57 | HSA::hsa_memory_register(this, sizeof(HostQueue)); 58 | 59 | const size_t queue_buffer_size = size_ * sizeof(AqlPacket); 60 | if (HSA_STATUS_SUCCESS != 61 | HSA::hsa_memory_allocate(region, queue_buffer_size, &ring_)) { 62 | return; 63 | } 64 | 65 | assert(IsMultipleOf(ring_, kRingAlignment)); 66 | assert(ring_ != NULL); 67 | 68 | amd_queue_.hsa_queue.base_address = ring_; 69 | amd_queue_.hsa_queue.size = size_; 70 | amd_queue_.hsa_queue.doorbell_signal = doorbell_signal; 71 | amd_queue_.hsa_queue.id = Runtime::runtime_singleton_->GetQueueId(); 72 | amd_queue_.hsa_queue.type = type; 73 | amd_queue_.hsa_queue.features = features; 74 | #ifdef HSA_LARGE_MODEL 75 | AMD_HSA_BITS_SET( 76 | amd_queue_.queue_properties, AMD_QUEUE_PROPERTIES_IS_PTR64, 1); 77 | #else 78 | AMD_HSA_BITS_SET( 79 | amd_queue_.queue_properties, AMD_QUEUE_PROPERTIES_IS_PTR64, 0); 80 | #endif 81 | amd_queue_.write_dispatch_id = amd_queue_.read_dispatch_id = 0; 82 | AMD_HSA_BITS_SET( 83 | amd_queue_.queue_properties, AMD_QUEUE_PROPERTIES_ENABLE_PROFILING, 0); 84 | 85 | active_ = true; 86 | } 87 | 88 | HostQueue::~HostQueue() { 89 | HSA::hsa_memory_free(ring_); 90 | HSA::hsa_memory_deregister(this, sizeof(HostQueue)); 91 | } 92 | 93 | } // namespace core 94 | -------------------------------------------------------------------------------- /inc/amd_hsa_queue.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef AMD_HSA_QUEUE_H 48 | #define AMD_HSA_QUEUE_H 49 | 50 | #include "amd_hsa_common.h" 51 | #include "hsa.h" 52 | 53 | // AMD Queue Properties. 54 | typedef uint32_t amd_queue_properties32_t; 55 | enum amd_queue_properties_t { 56 | AMD_HSA_BITS_CREATE_ENUM_ENTRIES(AMD_QUEUE_PROPERTIES_ENABLE_TRAP_HANDLER, 0, 1), 57 | AMD_HSA_BITS_CREATE_ENUM_ENTRIES(AMD_QUEUE_PROPERTIES_IS_PTR64, 1, 1), 58 | AMD_HSA_BITS_CREATE_ENUM_ENTRIES(AMD_QUEUE_PROPERTIES_ENABLE_TRAP_HANDLER_DEBUG_SGPRS, 2, 1), 59 | AMD_HSA_BITS_CREATE_ENUM_ENTRIES(AMD_QUEUE_PROPERTIES_ENABLE_PROFILING, 3, 1), 60 | AMD_HSA_BITS_CREATE_ENUM_ENTRIES(AMD_QUEUE_PROPERTIES_RESERVED1, 4, 28) 61 | }; 62 | 63 | // AMD Queue. 64 | #define AMD_QUEUE_ALIGN_BYTES 64 65 | #define AMD_QUEUE_ALIGN __ALIGNED__(AMD_QUEUE_ALIGN_BYTES) 66 | typedef AMD_QUEUE_ALIGN struct amd_queue_s { 67 | hsa_queue_t hsa_queue; 68 | uint32_t reserved1[4]; 69 | volatile uint64_t write_dispatch_id; 70 | uint32_t group_segment_aperture_base_hi; 71 | uint32_t private_segment_aperture_base_hi; 72 | uint32_t max_cu_id; 73 | uint32_t max_wave_id; 74 | volatile uint64_t max_legacy_doorbell_dispatch_id_plus_1; 75 | volatile uint32_t legacy_doorbell_lock; 76 | uint32_t reserved2[9]; 77 | volatile uint64_t read_dispatch_id; 78 | uint32_t read_dispatch_id_field_base_byte_offset; 79 | uint32_t compute_tmpring_size; 80 | uint32_t scratch_resource_descriptor[4]; 81 | uint64_t scratch_backing_memory_location; 82 | uint64_t scratch_backing_memory_byte_size; 83 | uint32_t scratch_workitem_byte_size; 84 | amd_queue_properties32_t queue_properties; 85 | uint32_t reserved3[2]; 86 | hsa_signal_t queue_inactive_signal; 87 | uint32_t reserved4[14]; 88 | } amd_queue_t; 89 | 90 | #endif // AMD_HSA_QUEUE_H 91 | -------------------------------------------------------------------------------- /core/inc/amd_blit_sdma.h: -------------------------------------------------------------------------------- 1 | #ifndef HSA_RUNTIME_CORE_INC_AMD_BLIT_SDMA_H_ 2 | #define HSA_RUNTIME_CORE_INC_AMD_BLIT_SDMA_H_ 3 | 4 | #include 5 | 6 | #include "core/inc/amd_sdma_cmdwriter_kv.h" 7 | #include "core/inc/blit.h" 8 | #include "core/inc/runtime.h" 9 | #include "core/inc/signal.h" 10 | 11 | namespace amd { 12 | class BlitSdma : public core::Blit { 13 | public: 14 | explicit BlitSdma(); 15 | 16 | virtual ~BlitSdma() override; 17 | 18 | /// @brief Initialize a User Mode SDMA Queue object. Input parameters specify 19 | /// properties of queue being created. 20 | /// 21 | /// @param agent Pointer to the agent that will execute the PM4 commands. 22 | /// 23 | /// @return hsa_status_t 24 | virtual hsa_status_t Initialize(const core::Agent& agent) override; 25 | 26 | /// @brief Marks the queue object as invalid and uncouples its link with 27 | /// the underlying compute device's control block. Use of queue object 28 | /// once it has been release is illegal and any behavior is indeterminate 29 | /// 30 | /// @note: The call will block until all packets have executed. 31 | /// 32 | /// @return hsa_status_t 33 | virtual hsa_status_t Destroy() override; 34 | 35 | /// @brief Submit a linear copy command to the queue buffer. 36 | /// 37 | /// @param dst Memory address of the copy destination. 38 | /// @param src Memory address of the copy source. 39 | /// @param size Size of the data to be copied. 40 | virtual hsa_status_t SubmitLinearCopyCommand(void* dst, const void* src, 41 | size_t size) override; 42 | 43 | private: 44 | /// @brief Acquires the address into queue buffer where a new command 45 | /// packet of specified size could be written. The address that is 46 | /// returned is guaranteed to be unique even in a multi-threaded access 47 | /// scenario. This function is guaranteed to return a pointer for writing 48 | /// data into the queue buffer. 49 | /// 50 | /// @param cmd_size Command packet size in bytes. 51 | /// 52 | /// @return pointer into the queue buffer where a PM4 packet of specified size 53 | /// could be written. NULL if input size is greater than the size of queue 54 | /// buffer. 55 | char* AcquireWriteAddress(uint32_t cmd_size); 56 | 57 | /// @brief Updates the Write Register of compute device to the end of 58 | /// SDMA packet written into queue buffer. The update to Write Register 59 | /// will be safe under multi-threaded usage scenario. Furthermore, updates 60 | /// to Write Register are blocking until all prior updates are completed 61 | /// i.e. if two threads T1 & T2 were to call release, then updates by T2 62 | /// will block until T1 has completed its update (assumes T1 acquired the 63 | /// write address first). 64 | /// 65 | /// @param cmd_addr pointer into the queue buffer where a PM4 packet was 66 | /// written. 67 | /// 68 | /// @param cmd_size Command packet size in bytes. 69 | void ReleaseWriteAddress(char* cmd_addr, uint32_t cmd_size); 70 | 71 | /// @brief Writes NO-OP words into queue buffer in case writing a command 72 | /// causes the queue buffer to wrap. 73 | /// 74 | /// @param cmd_size Size in bytes of command causing queue buffer to wrap. 75 | void WrapQueue(uint32_t cmd_size); 76 | 77 | /// @brief Submit a fence command to the queue buffer and block until the 78 | /// fence command is executed. 79 | void Fence(char* fence_command_addr); 80 | 81 | /// Indicates size of Queue buffer in bytes. 82 | uint32_t queue_size_; 83 | 84 | /// Base address of the Queue buffer at construction time. 85 | char* queue_start_addr_; 86 | 87 | /// End address of the Queue buffer at construction time. 88 | char* queue_end_addr_; 89 | 90 | /// Queue resource descriptor for doorbell, read 91 | /// and write indices 92 | HsaQueueResourceFixed queue_resource_; 93 | 94 | /// @brief Current address of execution in Queue buffer. 95 | /// 96 | /// @note: The value of address is obtained by reading 97 | /// the value of Write Register of the compute device. 98 | /// Users should write to the Queue buffer at the current 99 | /// address, else it will lead to execution error and potentially 100 | /// a hang. 101 | /// 102 | /// @note: The value of Write Register does not always begin 103 | /// with Zero after a Queue has been created. This needs to be 104 | /// understood better. This means that current address number of 105 | /// words of Queue buffer is unavailable for use. 106 | uint32_t cached_offset_; 107 | 108 | /// Device specific command writer. 109 | SdmaCmdwriterKv* cmdwriter_; 110 | }; 111 | } // namespace amd 112 | 113 | #endif // header guard 114 | -------------------------------------------------------------------------------- /core/tools/libamdhsacode/amd_hsa_code_util.hpp: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * University of Illinois / NCSA 3 | * Open Source License 4 | * 5 | * Copyright(c) 2011 - 2015 Advanced Micro Devices, Inc. 6 | * All rights reserved. 7 | * 8 | * Developed by: 9 | * Advanced Micro Devices, Inc. 10 | * www.amd.com 11 | * 12 | * Permission is hereby granted, free of charge, to any person obtaining a copy 13 | * of this software and associated documentation files(the "Software"), to deal 14 | * with the Software without restriction, including without limitation the 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and / 16 | * or sell copies of the Software, and to permit persons to whom the Software 17 | * is furnished to do so, subject to the following conditions: 18 | * 19 | * Redistributions of source code must retain the above copyright notice, 20 | * this list of conditions and the following disclaimers. 21 | * 22 | * Redistributions in binary form must reproduce the above copyright notice, 23 | * this list of conditions and the following disclaimers in the documentation 24 | * and / or other materials provided with the distribution. 25 | * 26 | * Neither the names of Advanced Micro Devices, Inc, nor the 27 | mes of its 28 | * contributors may be used to endorse or promote products derived from this 29 | * Software without specific prior written permission. 30 | * 31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE 34 | * CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 35 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 36 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH 37 | * THE SOFTWARE. 38 | ******************************************************************************/ 39 | 40 | #include 41 | #include 42 | #include 43 | #ifdef _WIN32 44 | #include 45 | #else // _WIN32 46 | #include 47 | #endif // _WIN32 48 | #include "amd_hsa_kernel_code.h" 49 | #include "hsa.h" 50 | #include "hsa_ext_finalize.h" 51 | 52 | #ifndef AMD_HSA_CODE_UTIL_HPP_ 53 | #define AMD_HSA_CODE_UTIL_HPP_ 54 | 55 | namespace amd { 56 | namespace hsa { 57 | 58 | std::string HsaSymbolKindToString(hsa_symbol_kind_t kind); 59 | std::string HsaSymbolLinkageToString(hsa_symbol_linkage_t linkage); 60 | std::string HsaVariableAllocationToString(hsa_variable_allocation_t allocation); 61 | std::string HsaVariableSegmentToString(hsa_variable_segment_t segment); 62 | std::string AmdMachineKindToString(amd_machine_kind16_t machine); 63 | std::string AmdFloatRoundModeToString(amd_float_round_mode_t round_mode); 64 | std::string AmdFloatDenormModeToString(amd_float_denorm_mode_t denorm_mode); 65 | std::string AmdSystemVgprWorkitemIdToString(amd_system_vgpr_workitem_id_t system_vgpr_workitem_id); 66 | std::string AmdElementByteSizeToString(amd_element_byte_size_t element_byte_size); 67 | std::string AmdExceptionKindToString(amd_exception_kind16_t exceptions); 68 | 69 | void PrintAmdKernelCode(std::ostream& out, const amd_kernel_code_t *akc); 70 | void PrintAmdComputePgmRsrcOne(std::ostream& out, amd_compute_pgm_rsrc_one32_t compute_pgm_rsrc1); 71 | void PrintAmdComputePgmRsrcTwo(std::ostream& out, amd_compute_pgm_rsrc_two32_t compute_pgm_rsrc2); 72 | void PrintAmdKernelCodeProperties(std::ostream& out, amd_kernel_code_properties32_t kernel_code_properties); 73 | void PrintAmdControlDirectives(std::ostream& out, const amd_control_directives_t &control_directives); 74 | 75 | // \todo kzhuravl 8/10/2015 rename. 76 | const char* hsaerr2str(hsa_status_t status); 77 | bool ReadFileIntoBuffer(const std::string& filename, std::vector& buffer); 78 | 79 | // Create new empty temporary file that will be deleted when closed. 80 | int OpenTempFile(const char* prefix); 81 | void CloseTempFile(int fd); 82 | 83 | // Helper function that allocates an aligned memory. 84 | inline void* 85 | alignedMalloc(size_t size, size_t alignment) 86 | { 87 | #if defined(_WIN32) 88 | return ::_aligned_malloc(size, alignment); 89 | #else 90 | void * ptr = NULL; 91 | alignment = (std::max)(alignment, sizeof(void*)); 92 | if (0 == ::posix_memalign(&ptr, alignment, size)) { 93 | return ptr; 94 | } 95 | return NULL; 96 | #endif 97 | } 98 | 99 | // Helper function that frees an aligned memory. 100 | inline void 101 | alignedFree(void *ptr) 102 | { 103 | #if defined(_WIN32) 104 | ::_aligned_free(ptr); 105 | #else 106 | free(ptr); 107 | #endif 108 | } 109 | 110 | } 111 | } 112 | 113 | #endif // AMD_HSA_CODE_UTIL_HPP_ 114 | -------------------------------------------------------------------------------- /core/inc/memory_region.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // HSA runtime C++ interface file. 48 | 49 | #ifndef HSA_RUNTME_CORE_INC_MEMORY_REGION_H_ 50 | #define HSA_RUNTME_CORE_INC_MEMORY_REGION_H_ 51 | 52 | #include 53 | 54 | #include "core/inc/runtime.h" 55 | #include "core/inc/agent.h" 56 | #include "core/inc/checked.h" 57 | 58 | namespace core { 59 | class Agent; 60 | 61 | class MemoryRegion : public Checked<0x9C961F19EE175BB3> { 62 | public: 63 | MemoryRegion(bool fine_grain) 64 | : fine_grain_(fine_grain) {} 65 | 66 | virtual ~MemoryRegion() {} 67 | 68 | // Convert this object into hsa_region_t. 69 | static __forceinline hsa_region_t Convert(MemoryRegion* region) { 70 | const hsa_region_t region_handle = { 71 | static_cast(reinterpret_cast(region))}; 72 | return region_handle; 73 | } 74 | 75 | static __forceinline const hsa_region_t Convert(const MemoryRegion* region) { 76 | const hsa_region_t region_handle = { 77 | static_cast(reinterpret_cast(region))}; 78 | return region_handle; 79 | } 80 | 81 | // Convert hsa_region_t into MemoryRegion *. 82 | static __forceinline MemoryRegion* Convert(hsa_region_t region) { 83 | return reinterpret_cast(region.handle); 84 | } 85 | 86 | virtual hsa_status_t Allocate(size_t size, void** address) const = 0; 87 | 88 | virtual hsa_status_t Free(void* address, size_t size) const = 0; 89 | 90 | // Translate memory properties into HSA region attribute. 91 | virtual hsa_status_t GetInfo(hsa_region_info_t attribute, 92 | void* value) const = 0; 93 | 94 | virtual hsa_status_t AssignAgent(void* ptr, size_t size, const Agent& agent, 95 | hsa_access_permission_t access) const = 0; 96 | 97 | __forceinline bool fine_grain() const { return fine_grain_; } 98 | 99 | private: 100 | const bool fine_grain_; 101 | }; 102 | } // namespace core 103 | 104 | #endif // header guard 105 | -------------------------------------------------------------------------------- /inc/amd_hsa_common.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // The following set of header files provides definitions for AMD GPU 48 | // Architecture: 49 | // - amd_hsa_common.h 50 | // - amd_hsa_elf.h 51 | // - amd_hsa_kernel_code.h 52 | // - amd_hsa_queue.h 53 | // - amd_hsa_signal.h 54 | // 55 | // Refer to "HSA Application Binary Interface: AMD GPU Architecture" for more 56 | // information. 57 | 58 | #ifndef AMD_HSA_COMMON_H 59 | #define AMD_HSA_COMMON_H 60 | 61 | #include 62 | #include 63 | 64 | // Descriptive version of the HSA Application Binary Interface. 65 | #define AMD_HSA_ABI_VERSION "AMD GPU Architecture v0.35 (June 25, 2015)" 66 | 67 | // Alignment attribute that specifies a minimum alignment (in bytes) for 68 | // variables of the specified type. 69 | #if defined(__GNUC__) 70 | # define __ALIGNED__(x) __attribute__((aligned(x))) 71 | #elif defined(_MSC_VER) 72 | # define __ALIGNED__(x) __declspec(align(x)) 73 | #elif defined(RC_INVOKED) 74 | # define __ALIGNED__(x) 75 | #else 76 | # error 77 | #endif 78 | 79 | // Creates enumeration entries for packed types. Enumeration entries include 80 | // bit shift amount, bit width, and bit mask. 81 | #define AMD_HSA_BITS_CREATE_ENUM_ENTRIES(name, shift, width) \ 82 | name ## _SHIFT = (shift), \ 83 | name ## _WIDTH = (width), \ 84 | name = (((1 << (width)) - 1) << (shift)) \ 85 | 86 | // Gets bits for specified mask from specified src packed instance. 87 | #define AMD_HSA_BITS_GET(src, mask) \ 88 | ((src & mask) >> mask ## _SHIFT) \ 89 | 90 | // Sets val bits for specified mask in specified dst packed instance. 91 | #define AMD_HSA_BITS_SET(dst, mask, val) \ 92 | dst &= (~(1 << mask ## _SHIFT) & ~mask); \ 93 | dst |= (((val) << mask ## _SHIFT) & mask) \ 94 | 95 | #endif // AMD_HSA_COMMON_H 96 | -------------------------------------------------------------------------------- /core/util/small_heap.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // A simple first fit memory allocator with eager compaction. For use with few 48 | // items (where list iteration is faster than trees). 49 | // Not thread safe! 50 | 51 | #ifndef HSA_RUNTME_CORE_UTIL_SMALL_HEAP_H_ 52 | #define HSA_RUNTME_CORE_UTIL_SMALL_HEAP_H_ 53 | 54 | #include "utils.h" 55 | 56 | #include 57 | 58 | class SmallHeap { 59 | public: 60 | class Node { 61 | public: 62 | size_t len; 63 | void* next_free; 64 | void* prior_free; 65 | static const intptr_t END = -1; 66 | 67 | __forceinline bool isfree() const { return next_free != NULL; } 68 | __forceinline bool islastfree() const { return intptr_t(next_free) == END; } 69 | __forceinline bool isfirstfree() const { 70 | return intptr_t(prior_free) == END; 71 | } 72 | __forceinline void setlastfree() { 73 | *reinterpret_cast(&next_free) = END; 74 | } 75 | __forceinline void setfirstfree() { 76 | *reinterpret_cast(&prior_free) = END; 77 | } 78 | }; 79 | 80 | private: 81 | SmallHeap(const SmallHeap& rhs); 82 | SmallHeap& operator=(const SmallHeap& rhs); 83 | 84 | void* const pool; 85 | const size_t length; 86 | 87 | size_t total_free; 88 | void* first_free; 89 | std::map memory; 90 | 91 | typedef decltype(memory) memory_t; 92 | memory_t::iterator merge(memory_t::iterator& keep, 93 | memory_t::iterator& destroy); 94 | 95 | public: 96 | SmallHeap() : pool(NULL), length(0), total_free(0) {} 97 | SmallHeap(void* base, size_t length) 98 | : pool(base), length(length), total_free(length) { 99 | first_free = pool; 100 | 101 | Node& node = memory[first_free]; 102 | node.len = length; 103 | node.setlastfree(); 104 | node.setfirstfree(); 105 | 106 | memory[0].len = 0; 107 | memory[(void*)0xFFFFFFFFFFFFFFFFull].len = 0; 108 | } 109 | 110 | void* alloc(size_t bytes); 111 | void free(void* ptr); 112 | 113 | void* base() const { return pool; } 114 | size_t size() const { return length; } 115 | size_t remaining() const { return total_free; } 116 | }; 117 | 118 | #endif -------------------------------------------------------------------------------- /core/inc/amd_memory_region.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // AMD specific HSA backend. 48 | 49 | #ifndef HSA_RUNTIME_CORE_INC_AMD_MEMORY_REGION_H_ 50 | #define HSA_RUNTIME_CORE_INC_AMD_MEMORY_REGION_H_ 51 | 52 | #include "core/inc/agent.h" 53 | #include "core/inc/memory_region.h" 54 | #include "core/inc/thunk.h" 55 | 56 | namespace amd { 57 | class MemoryRegion : public core::MemoryRegion { 58 | public: 59 | MemoryRegion(bool fine_grain, uint32_t node_id, 60 | const HsaMemoryProperties& mem_props); 61 | 62 | ~MemoryRegion(); 63 | 64 | hsa_status_t Allocate(size_t size, void** address) const; 65 | 66 | hsa_status_t Free(void* address, size_t size) const; 67 | 68 | hsa_status_t GetInfo(hsa_region_info_t attribute, void* value) const; 69 | 70 | HSAuint64 GetBaseAddress() const { return mem_props_.VirtualBaseAddress; } 71 | 72 | HSAuint64 GetPhysicalSize() const { return mem_props_.SizeInBytes; } 73 | 74 | HSAuint64 GetVirtualSize() const { return virtual_size_; } 75 | 76 | hsa_status_t AssignAgent(void* ptr, size_t size, const core::Agent& agent, 77 | hsa_access_permission_t access) const; 78 | 79 | __forceinline bool IsLocalMemory() const { 80 | return ((mem_props_.HeapType == HSA_HEAPTYPE_FRAME_BUFFER_PRIVATE) || 81 | (mem_props_.HeapType == HSA_HEAPTYPE_FRAME_BUFFER_PUBLIC)); 82 | } 83 | 84 | __forceinline bool IsSystem() const { 85 | return mem_props_.HeapType == HSA_HEAPTYPE_SYSTEM; 86 | } 87 | 88 | __forceinline bool IsLDS() const { 89 | return mem_props_.HeapType == HSA_HEAPTYPE_GPU_LDS; 90 | } 91 | 92 | __forceinline bool IsGDS() const { 93 | return mem_props_.HeapType == HSA_HEAPTYPE_GPU_GDS; 94 | } 95 | 96 | __forceinline bool IsScratch() const { 97 | return mem_props_.HeapType == HSA_HEAPTYPE_GPU_SCRATCH; 98 | } 99 | 100 | private: 101 | uint32_t node_id_; 102 | 103 | const HsaMemoryProperties mem_props_; 104 | 105 | HsaMemFlags mem_flag_; 106 | 107 | size_t max_single_alloc_size_; 108 | 109 | HSAuint64 virtual_size_; 110 | 111 | static const size_t kPageSize_ = 4096; 112 | }; 113 | } // namespace 114 | 115 | #endif // header guard 116 | -------------------------------------------------------------------------------- /core/util/timer.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "core/util/timer.h" 48 | 49 | namespace timer { 50 | 51 | accurate_clock::init::init() { 52 | freq = os::AccurateClockFrequency(); 53 | accurate_clock::period_ns = 1e9 / double(freq); 54 | } 55 | 56 | // Calibrates the fast clock using the accurate clock. 57 | fast_clock::init::init() { 58 | typedef accurate_clock clock; 59 | clock::duration delay(std::chrono::milliseconds(1)); 60 | 61 | // calibrate clock 62 | fast_clock::raw_rep min = 0; 63 | clock::duration elapsed = clock::duration::max(); 64 | 65 | do { 66 | for (int t = 0; t < 10; t++) { 67 | fast_clock::raw_rep r1, r2; 68 | clock::time_point t0, t1, t2, t3; 69 | 70 | t0 = clock::now(); 71 | std::atomic_signal_fence(std::memory_order_acq_rel); 72 | r1 = fast_clock::raw_now(); 73 | std::atomic_signal_fence(std::memory_order_acq_rel); 74 | t1 = clock::now(); 75 | std::atomic_signal_fence(std::memory_order_acq_rel); 76 | 77 | do { 78 | t2 = clock::now(); 79 | } while (t2 - t1 < delay); 80 | 81 | std::atomic_signal_fence(std::memory_order_acq_rel); 82 | r2 = fast_clock::raw_now(); 83 | std::atomic_signal_fence(std::memory_order_acq_rel); 84 | t3 = clock::now(); 85 | 86 | // If elapsed time is shorter than last recorded time and both the start 87 | // and end times are confirmed correlated then record the clock readings. 88 | // This protects against inaccuracy due to thread switching 89 | if ((t3 - t1 < elapsed) && ((t1 - t0) * 10 < (t2 - t1)) && 90 | ((t3 - t2) * 10 < (t2 - t1))) { 91 | elapsed = t3 - t1; 92 | min = r2 - r1; 93 | } 94 | } 95 | delay += delay; 96 | } while (min < 1000); 97 | 98 | fast_clock::freq = double(min) / duration_in_seconds(elapsed); 99 | fast_clock::period_ps = 1e12 / fast_clock::freq; 100 | } 101 | 102 | double accurate_clock::period_ns; 103 | accurate_clock::raw_frequency accurate_clock::freq; 104 | accurate_clock::init accurate_clock::accurate_clock_init; 105 | 106 | double fast_clock::period_ps; 107 | fast_clock::raw_frequency fast_clock::freq; 108 | fast_clock::init fast_clock::fast_clock_init; 109 | } 110 | -------------------------------------------------------------------------------- /core/runtime/amd_sdma_cmdwriter_kv.cpp: -------------------------------------------------------------------------------- 1 | #include "core/inc/amd_sdma_cmdwriter_kv.h" 2 | 3 | #include 4 | #include 5 | 6 | namespace amd { 7 | // SDMA packet for CI device. 8 | // Reference: http://people.freedesktop.org/~agd5f/dma_packets.txt 9 | 10 | const unsigned int SDMA_OP_NOP = 0; 11 | const unsigned int SDMA_OP_COPY = 1; 12 | const unsigned int SDMA_OP_FENCE = 5; 13 | const unsigned int SDMA_SUBOP_COPY_LINEAR = 0; 14 | 15 | typedef struct SDMA_PKT_COPY_LINEAR_TAG { 16 | union { 17 | struct { 18 | unsigned int op : 8; 19 | unsigned int sub_op : 8; 20 | unsigned int extra_info : 16; 21 | }; 22 | unsigned int DW_0_DATA; 23 | } HEADER_UNION; 24 | 25 | union { 26 | struct { 27 | unsigned int count : 22; 28 | unsigned int reserved_0 : 10; 29 | }; 30 | unsigned int DW_1_DATA; 31 | } COUNT_UNION; 32 | 33 | union { 34 | struct { 35 | unsigned int reserved_0 : 16; 36 | unsigned int dst_swap : 2; 37 | unsigned int reserved_1 : 6; 38 | unsigned int src_swap : 2; 39 | unsigned int reserved_2 : 6; 40 | }; 41 | unsigned int DW_2_DATA; 42 | } PARAMETER_UNION; 43 | 44 | union { 45 | struct { 46 | unsigned int src_addr_31_0 : 32; 47 | }; 48 | unsigned int DW_3_DATA; 49 | } SRC_ADDR_LO_UNION; 50 | 51 | union { 52 | struct { 53 | unsigned int src_addr_63_32 : 32; 54 | }; 55 | unsigned int DW_4_DATA; 56 | } SRC_ADDR_HI_UNION; 57 | 58 | union { 59 | struct { 60 | unsigned int dst_addr_31_0 : 32; 61 | }; 62 | unsigned int DW_5_DATA; 63 | } DST_ADDR_LO_UNION; 64 | 65 | union { 66 | struct { 67 | unsigned int dst_addr_63_32 : 32; 68 | }; 69 | unsigned int DW_6_DATA; 70 | } DST_ADDR_HI_UNION; 71 | } SDMA_PKT_COPY_LINEAR; 72 | 73 | typedef struct SDMA_PKT_FENCE_TAG { 74 | union { 75 | struct { 76 | unsigned int op : 8; 77 | unsigned int sub_op : 8; 78 | unsigned int reserved_0 : 16; 79 | }; 80 | unsigned int DW_0_DATA; 81 | } HEADER_UNION; 82 | 83 | union { 84 | struct { 85 | unsigned int addr_31_0 : 32; 86 | }; 87 | unsigned int DW_1_DATA; 88 | } ADDR_LO_UNION; 89 | 90 | union { 91 | struct { 92 | unsigned int addr_63_32 : 32; 93 | }; 94 | unsigned int DW_2_DATA; 95 | } ADDR_HI_UNION; 96 | 97 | union { 98 | struct { 99 | unsigned int data : 32; 100 | }; 101 | unsigned int DW_3_DATA; 102 | } DATA_UNION; 103 | } SDMA_PKT_FENCE; 104 | 105 | inline uint32_t ptrlow32(const void* p) { 106 | return static_cast(reinterpret_cast(p)); 107 | } 108 | 109 | inline uint32_t ptrhigh32(const void* p) { 110 | #if defined(HSA_LARGE_MODEL) 111 | return static_cast(reinterpret_cast(p) >> 32); 112 | #else 113 | return 0; 114 | #endif 115 | } 116 | 117 | SdmaCmdwriterKv::SdmaCmdwriterKv(size_t sdma_queue_buffer_size) { 118 | linear_copy_command_size_ = sizeof(SDMA_PKT_COPY_LINEAR); 119 | fence_command_size_ = sizeof(SDMA_PKT_FENCE); 120 | 121 | const uint32_t sync_command_size = fence_command_size_; 122 | const uint32_t max_num_copy_command = std::floor( 123 | (static_cast(sdma_queue_buffer_size) - sync_command_size) / 124 | linear_copy_command_size_); 125 | 126 | max_single_linear_copy_size_ = 0x3fffe0; 127 | max_total_linear_copy_size_ = static_cast( 128 | std::min(static_cast(SIZE_MAX), 129 | static_cast(max_num_copy_command) * 130 | static_cast(max_single_linear_copy_size_))); 131 | } 132 | 133 | SdmaCmdwriterKv::~SdmaCmdwriterKv() {} 134 | 135 | void SdmaCmdwriterKv::WriteLinearCopyCommand(char* command_buffer, void* dst, 136 | const void* src, 137 | uint32_t copy_size) { 138 | SDMA_PKT_COPY_LINEAR* packet_addr = 139 | reinterpret_cast(command_buffer); 140 | 141 | memset(packet_addr, 0, sizeof(SDMA_PKT_COPY_LINEAR)); 142 | 143 | packet_addr->HEADER_UNION.op = SDMA_OP_COPY; 144 | packet_addr->HEADER_UNION.sub_op = SDMA_SUBOP_COPY_LINEAR; 145 | 146 | packet_addr->COUNT_UNION.count = copy_size; 147 | 148 | packet_addr->SRC_ADDR_LO_UNION.src_addr_31_0 = ptrlow32(src); 149 | packet_addr->SRC_ADDR_HI_UNION.src_addr_63_32 = ptrhigh32(src); 150 | 151 | packet_addr->DST_ADDR_LO_UNION.dst_addr_31_0 = ptrlow32(dst); 152 | packet_addr->DST_ADDR_HI_UNION.dst_addr_63_32 = ptrhigh32(dst); 153 | } 154 | 155 | void SdmaCmdwriterKv::WriteFenceCommand(char* command_buffer, 156 | uint32_t* fence_address, 157 | uint32_t fence_value) { 158 | SDMA_PKT_FENCE* packet_addr = 159 | reinterpret_cast(command_buffer); 160 | 161 | memset(packet_addr, 0, sizeof(SDMA_PKT_FENCE)); 162 | 163 | packet_addr->HEADER_UNION.op = SDMA_OP_FENCE; 164 | 165 | packet_addr->ADDR_LO_UNION.addr_31_0 = ptrlow32(fence_address); 166 | 167 | packet_addr->ADDR_HI_UNION.addr_63_32 = ptrhigh32(fence_address); 168 | 169 | packet_addr->DATA_UNION.data = fence_value; 170 | } 171 | } // namespace -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | HSA-Runtime-Reference-Source 2 | ============================ 3 | 4 | This repository contains the HSA Runtime source code, released primarily for user reference and experimentation purposes. 5 | 6 | For People looking for commercially supported implementation on AMD Hardware please use the ROCr runtime at https://github.com/RadeonOpenCompute/ROCR-Runtime 7 | 8 | ### Package Contents 9 | 10 | ##### Source & Include directories 11 | 12 | core - Contains the source code for AMD's implementation of the core HSA Runtime API's. 13 | 14 | inc - Contains the public and AMD specific header files exposing the HSA Runtimes interfaces. 15 | 16 | ### Build environment 17 | 18 | CMake build framework is used to build the HSA runtime. The minimum version is 2.8. 19 | 20 | Obtain cmake infrastructure: http://www.cmake.org/download/ 21 | 22 | Export cmake bin into your PATH 23 | HSA Runtime CMake build file CMakeLists.txt is located in runtime/core folder. 24 | 25 | Refer to CMakeLists.txt for building instructions and setup 26 | The 32-bit build target is a shared library named libhsa-runtime.so 27 | The 64-bit target is libhsa-runtime64.so 28 | 29 | ### Package Dependencies 30 | 31 | The following support packages are requried to succesfully build the runtime: 32 | 33 | * libelf-dev 34 | * g++ 35 | * libc6-dev-i386 (for libhsakmt 32bit) 36 | 37 | ### Specs 38 | 39 | http://www.hsafoundation.com/standards/ 40 | 41 | HSA Runtime Specification 1.0 42 | 43 | HSA Programmer Reference Manual Specification 1.0 44 | 45 | HSA Platform System Architecture Specification 1.0 46 | 47 | ### Runtime Design overview 48 | 49 | The AMD HSA runtime consists of three primary layers: 50 | 51 | C interface adaptors 52 | C++ interfaces classes and common functions 53 | AMD device specific implementations 54 | Additionally the runtime is dependent on a small utility library which provides simple common functions, limited operating system and compiler abstraction, as well as atomic operation interfaces. 55 | 56 | #### C interface adaptors 57 | 58 | Files : 59 | 60 | hsa.h(cpp) 61 | 62 | hsa_ext_interface.h(cpp) 63 | 64 | The C interface layer provides C99 APIs as defined in the HSA Runtime Specification 1.0. The interfaces and default definitions for the standard extensions are also provided. The interface functions simply forward to a function pointer table defined here. The table is initialized to point to default definitions, which simply return an appropriate error code. If available the extension library is loaded as part of runtime initialization and the table is updated to point into the extension library. In this release the standard extensions (image support and finalizer) are implemented in a separate libraries (not open sourced), and can be obtained from the HSA-Runtime-AMD git repository. 65 | 66 | #### C++ interfaces classes and common functions 67 | 68 | Files : 69 | 70 | runtime.h(cpp) 71 | 72 | agent.h 73 | 74 | queue.h 75 | 76 | signal.h 77 | 78 | memory_region.h(cpp) 79 | 80 | checked.h 81 | 82 | memory_database.h(cpp) 83 | 84 | default_signal.h(cpp) 85 | 86 | The C++ interface layer provides abstract interface classes encapsulating commands to HSA Signals, Agents, and Queues. This layer also contains the implementation of device independent commands, such as hsa_init and hsa_system_get_info, and a default signal and queue implementation. 87 | 88 | #### Device Specific Implementations 89 | 90 | Files: 91 | 92 | amd_cpu_agent.h(cpp) 93 | 94 | amd_gpu_agent.h(cpp) 95 | 96 | amd_hw_aql_command_processor.h(cpp) 97 | 98 | amd_memory_region.h(cpp) 99 | 100 | amd_memory_registration.h(cpp) 101 | 102 | amd_topology.h(cpp) 103 | 104 | host_queue.h(cpp) 105 | 106 | interrupt_signal.h(cpp) 107 | 108 | hsa_ext_private_amd.h(cpp) 109 | 110 | The device specific layer contains implementations of the C++ interface classes which implement HSA functionality for AMD Kaveri & Carrizo APUs. 111 | 112 | #### Implemented functionality 113 | 114 | * The following queries are not implemented: 115 | ** hsa_code_symbol_get_info: HSA_CODE_SYMBOL_INFO_INDIRECT_FUNCTION_CALL_CONVENTION 116 | ** hsa_executable_symbol_get_info: HSA_EXECUTABLE_SYMBOL_INFO_INDIRECT_FUNCTION_OBJECT, HSA_EXECUTABLE_SYMBOL_INFO_INDIRECT_FUNCTION_CALL_CONVENTION 117 | 118 | #### Known Issues 119 | 120 | * Max total coarse grain region limit is 8GB. 121 | * hsa_agent_get_exception_policies is not implemented. 122 | * Image import/export/copy/fill only support image created with memory from host accessible region. 123 | * hsa_system_get_extension_table is not implemented for HSA_EXTENSION_AMD_PROFILER. 124 | 125 | ### Disclaimer 126 | 127 | The information contained herein is for informational purposes only, and is subject to change without notice. While every precaution has been taken in the preparation of this document, it may contain technical inaccuracies, omissions and typographical errors, and AMD is under no obligation to update or otherwise correct this information. Advanced Micro Devices, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this document, and assumes no liability of any kind, including the implied warranties of noninfringement, merchantability or fitness for particular purposes, with respect to the operation or use of AMD hardware, software or other products described herein. No license, including implied or arising by estoppel, to any intellectual property rights is granted by this document. Terms and limitations applicable to the purchase or use of AMD's products are as set forth in a signed agreement between the parties or in AMD's Standard Terms and Conditions of Sale. 128 | 129 | AMD, the AMD Arrow logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 130 | 131 | Copyright (c) 2014 Advanced Micro Devices, Inc. All rights reserved. 132 | -------------------------------------------------------------------------------- /core/util/locks.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // Library of syncronization primitives - to be added to as needed. 48 | 49 | #ifndef HSA_RUNTIME_CORE_UTIL_LOCKS_H_ 50 | #define HSA_RUNTIME_CORE_UTIL_LOCKS_H_ 51 | 52 | #include "utils.h" 53 | #include "os.h" 54 | 55 | /// @brief: A class behaves as a lock in a scope. When trying to enter into the 56 | /// critical section, creat a object of this class. After the control path goes 57 | /// out of the scope, it will release the lock automatically. 58 | template 59 | class ScopedAcquire { 60 | public: 61 | /// @brief: When constructing, acquire the lock. 62 | /// @param: lock(Input), pointer to an existing lock. 63 | explicit ScopedAcquire(LockType* lock) : lock_(lock) { lock_->Acquire(); } 64 | 65 | /// @brief: when destructing, release the lock. 66 | ~ScopedAcquire() { lock_->Release(); } 67 | 68 | private: 69 | LockType* lock_; 70 | /// @brief: Disable copiable and assignable ability. 71 | DISALLOW_COPY_AND_ASSIGN(ScopedAcquire); 72 | }; 73 | 74 | /// @brief: a class represents a kernel mutex. 75 | /// Uses the kernel's scheduler to keep the waiting thread from being scheduled 76 | /// until the lock is released (Best for long waits, though anything using 77 | /// a kernel object is a long wait). 78 | class KernelMutex { 79 | public: 80 | KernelMutex() { lock_ = os::CreateMutex(); } 81 | ~KernelMutex() { os::DestroyMutex(lock_); } 82 | 83 | bool Try() { return os::TryAcquireMutex(lock_); } 84 | bool Acquire() { return os::AcquireMutex(lock_); } 85 | void Release() { os::ReleaseMutex(lock_); } 86 | 87 | private: 88 | os::Mutex lock_; 89 | 90 | /// @brief: Disable copiable and assignable ability. 91 | DISALLOW_COPY_AND_ASSIGN(KernelMutex); 92 | }; 93 | 94 | /// @brief: represents a spin lock. 95 | /// For very short hold durations on the order of the thread scheduling 96 | /// quanta or less. 97 | class SpinMutex { 98 | public: 99 | SpinMutex() { lock_ = 0; } 100 | 101 | bool Try() { 102 | int old = 0; 103 | return lock_.compare_exchange_strong(old, 1); 104 | } 105 | bool Acquire() { 106 | int old = 0; 107 | while (!lock_.compare_exchange_strong(old, 1)) 108 | { 109 | old=0; 110 | os::YieldThread(); 111 | } 112 | return true; 113 | } 114 | void Release() { lock_ = 0; } 115 | 116 | private: 117 | std::atomic lock_; 118 | 119 | /// @brief: Disable copiable and assignable ability. 120 | DISALLOW_COPY_AND_ASSIGN(SpinMutex); 121 | }; 122 | 123 | class KernelEvent { 124 | public: 125 | KernelEvent() { evt_ = os::CreateOsEvent(true, true); } 126 | ~KernelEvent() { os::DestroyOsEvent(evt_); } 127 | 128 | bool IsSet() { return os::WaitForOsEvent(evt_, 0)==0; } 129 | bool WaitForSet() { return os::WaitForOsEvent(evt_, 0xFFFFFFFF)==0; } 130 | void Set() { os::SetOsEvent(evt_); } 131 | void Reset() { os::ResetOsEvent(evt_); } 132 | 133 | private: 134 | os::EventHandle evt_; 135 | 136 | /// @brief: Disable copiable and assignable ability. 137 | DISALLOW_COPY_AND_ASSIGN(KernelEvent); 138 | }; 139 | 140 | #endif // HSA_RUNTIME_CORE_SUTIL_LOCKS_H_ -------------------------------------------------------------------------------- /core/runtime/compute_capability.cpp: -------------------------------------------------------------------------------- 1 | #include "compute_capability.hpp" 2 | 3 | #include 4 | #include 5 | 6 | #include 7 | #include 8 | #include 9 | #include 10 | 11 | namespace { 12 | 13 | using core::ComputeCapability; 14 | using core::ComputeProperties; 15 | 16 | //===----------------------------------------------------------------------===// 17 | // CapabilityMapping Initialization. // 18 | //===----------------------------------------------------------------------===// 19 | 20 | struct ComputeCapabilityComparison final { 21 | bool operator()(const ComputeCapability &in_lhs, 22 | const ComputeCapability &in_rhs) const { 23 | return in_lhs.version_major() == in_rhs.version_major() && 24 | in_lhs.version_minor() == in_rhs.version_minor() && 25 | in_lhs.version_stepping() == in_rhs.version_stepping(); 26 | } 27 | }; // struct ComputeCapabilityComparison 28 | 29 | struct ComputeCapabilityHash final { 30 | std::size_t operator()(const ComputeCapability &in_cc) const { 31 | // FIXME: better hashing function? 32 | std::ostringstream cc_stream; 33 | cc_stream << in_cc; 34 | return std::hash()(cc_stream.str()); 35 | } 36 | }; // struct ComputeCapabilityHash 37 | 38 | typedef std::unordered_map CapabilityMap; 43 | 44 | struct CapabilityMapping final { 45 | static CapabilityMap Initialize() { 46 | CapabilityMap contents; 47 | 48 | // NOTE: All compute capabilities and compute properties must be added below 49 | // this line. 50 | // ------------------------------------------------------------------------- 51 | 52 | contents[ComputeCapability(7, 0, 0)] = ComputeProperties(); 53 | contents[ComputeCapability(8, 0, 1)] = ComputeProperties(); 54 | contents[ComputeCapability(7, 0, 1)] = ComputeProperties(); 55 | contents[ComputeCapability(8, 0, 0)] = ComputeProperties(); 56 | contents[ComputeCapability(8, 1, 0)] = ComputeProperties(); 57 | contents[ComputeCapability(9, 0, 0)] = ComputeProperties(); 58 | 59 | return contents; 60 | } 61 | 62 | static const CapabilityMap contents_; 63 | }; // struct CapabilityMapping 64 | 65 | const CapabilityMap CapabilityMapping::contents_ = 66 | CapabilityMapping::Initialize(); 67 | 68 | } // namespace anonymous 69 | 70 | namespace core { 71 | 72 | //===----------------------------------------------------------------------===// 73 | // ComputeProperties. // 74 | //===----------------------------------------------------------------------===// 75 | 76 | void ComputeProperties::Initialize() { 77 | is_initialized_ = true; 78 | } // ComputeProperties::Initialize 79 | 80 | void ComputeProperties::Reset() { 81 | is_initialized_ = false; 82 | } // ComputeProperties::Reset 83 | 84 | //===----------------------------------------------------------------------===// 85 | // ComputeCapability. // 86 | //===----------------------------------------------------------------------===// 87 | 88 | ComputeCapability::ComputeCapability(const int32_t &in_version_major, 89 | const int32_t &in_version_minor, 90 | const int32_t &in_version_stepping) 91 | : version_major_(in_version_major), 92 | version_minor_(in_version_minor), 93 | version_stepping_(in_version_stepping) { 94 | auto compute_properties = CapabilityMapping::contents_.find(*this); 95 | if (compute_properties != CapabilityMapping::contents_.end()) { 96 | compute_properties_.Initialize(); 97 | } 98 | } 99 | 100 | void ComputeCapability::Initialize(const int32_t &in_version_major, 101 | const int32_t &in_version_minor, 102 | const int32_t &in_version_stepping) { 103 | version_major_ = in_version_major; 104 | version_minor_ = in_version_minor; 105 | version_stepping_ = in_version_stepping; 106 | auto compute_properties = CapabilityMapping::contents_.find(*this); 107 | if (compute_properties != CapabilityMapping::contents_.end()) { 108 | compute_properties_.Initialize(); 109 | } 110 | } // ComputeCapability::Initialize 111 | 112 | /*void ComputeCapability::Initialize(const uint32_t &in_device_id) { 113 | auto compute_capability = DeviceMapping::contents_.find(in_device_id); 114 | if (compute_capability != DeviceMapping::contents_.end()) { 115 | version_major_ = compute_capability->second.version_major_; 116 | version_minor_ = compute_capability->second.version_minor_; 117 | version_stepping_ = compute_capability->second.version_stepping_; 118 | } 119 | } // ComputeCapability::Initialize */ 120 | 121 | void ComputeCapability::Reset() { 122 | version_major_ = COMPUTE_CAPABILITY_VERSION_MAJOR_UNDEFINED; 123 | version_minor_ = COMPUTE_CAPABILITY_VERSION_MINOR_UNDEFINED; 124 | version_stepping_ = COMPUTE_CAPABILITY_VERSION_STEPPING_UNDEFINED; 125 | compute_properties_.Reset(); 126 | } // ComputeCapability::Reset 127 | 128 | bool ComputeCapability::IsValid() { 129 | return compute_properties_.is_initialized(); 130 | } // ComputeCapability::IsValid 131 | 132 | std::ostream &operator<<(std::ostream &out_stream, 133 | const ComputeCapability &in_compute_capability) { 134 | return out_stream << in_compute_capability.version_major_ << ":" 135 | << in_compute_capability.version_minor_ << ":" 136 | << in_compute_capability.version_stepping_; 137 | } // ostream< 53 | 54 | #include "core/inc/runtime.h" 55 | #include "core/inc/agent.h" 56 | #include "core/inc/queue.h" 57 | #include "core/inc/thunk.h" 58 | 59 | namespace amd { 60 | class CpuAgent : public core::Agent { 61 | public: 62 | CpuAgent(HSAuint32 node, const HsaNodeProperties& node_props, 63 | const std::vector& cache_props); 64 | 65 | ~CpuAgent(); 66 | 67 | void RegisterMemoryProperties(core::MemoryRegion& region); 68 | 69 | hsa_status_t IterateRegion(hsa_status_t (*callback)(hsa_region_t region, 70 | void* data), 71 | void* data) const; 72 | 73 | hsa_status_t GetInfo(hsa_agent_info_t attribute, void* value) const; 74 | 75 | /// @brief Api to create an Aql queue 76 | /// 77 | /// @param size Size of Queue in terms of Aql packet size 78 | /// 79 | /// @param type of Queue Single Writer or Multiple Writer 80 | /// 81 | /// @param callback Callback function to register in case Quee 82 | /// encounters an error 83 | /// 84 | /// @param data Application data that is passed to @p callback on every 85 | /// iteration.May be NULL. 86 | /// 87 | /// @param private_segment_size Hint indicating the maximum 88 | /// expected private segment usage per work - item, in bytes.There may 89 | /// be performance degradation if the application places a Kernel 90 | /// Dispatch packet in the queue and the corresponding private segment 91 | /// usage exceeds @p private_segment_size.If the application does not 92 | /// want to specify any particular value for this argument, @p 93 | /// private_segment_size must be UINT32_MAX.If the queue does not 94 | /// support Kernel Dispatch packets, this argument is ignored. 95 | /// 96 | /// @param group_segment_size Hint indicating the maximum expected 97 | /// group segment usage per work - group, in bytes.There may be 98 | /// performance degradation if the application places a Kernel Dispatch 99 | /// packet in the queue and the corresponding group segment usage 100 | /// exceeds @p group_segment_size.If the application does not want to 101 | /// specify any particular value for this argument, @p 102 | /// group_segment_size must be UINT32_MAX.If the queue does not 103 | /// support Kernel Dispatch packets, this argument is ignored. 104 | /// 105 | /// @parm queue Output parameter updated with a pointer to the 106 | /// queue being created 107 | /// 108 | /// @return hsa_status 109 | hsa_status_t QueueCreate(size_t size, hsa_queue_type_t queue_type, 110 | core::HsaEventCallback event_callback, void* data, 111 | uint32_t private_segment_size, 112 | uint32_t group_segment_size, core::Queue** queue); 113 | 114 | __forceinline HSAuint32 node_id() const { return node_id_; } 115 | 116 | __forceinline size_t num_cache() const { return cache_props_.size(); } 117 | 118 | __forceinline const HsaCacheProperties& cache_prop(int idx) const { 119 | return cache_props_[idx]; 120 | } 121 | 122 | const std::vector& regions() const { 123 | return regions_; 124 | } 125 | 126 | private: 127 | const HSAuint32 node_id_; 128 | 129 | const HsaNodeProperties properties_; 130 | 131 | std::vector cache_props_; 132 | 133 | std::vector regions_; 134 | 135 | DISALLOW_COPY_AND_ASSIGN(CpuAgent); 136 | }; 137 | 138 | } // namespace 139 | 140 | #endif // header guard 141 | -------------------------------------------------------------------------------- /core/util/timer.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTIME_CORE_UTIL_TIMER_H_ 48 | #define HSA_RUNTIME_CORE_UTIL_TIMER_H_ 49 | 50 | #include "core/util/utils.h" 51 | #include "core/util/os.h" 52 | #include 53 | 54 | #include 55 | 56 | namespace timer { 57 | 58 | // Needed to patch around a mixed arithmetic bug in MSVC's duration_cast as of 59 | // VS 2013. 60 | template 61 | struct wide_type { 62 | typedef double type; 63 | }; 64 | template <> 65 | struct wide_type { 66 | typedef uintmax_t type; 67 | }; 68 | template <> 69 | struct wide_type { 70 | typedef intmax_t type; 71 | }; 72 | 73 | template 74 | static __forceinline To 75 | duration_cast(const std::chrono::duration& d) { 76 | typedef typename wide_type::value, 77 | std::is_signed::value>::type wide; 78 | typedef std::chrono::duration unit_convert_t; 79 | 80 | unit_convert_t temp = std::chrono::duration_cast(d); 81 | return To(static_cast(temp.count())); 82 | } 83 | // End patch 84 | 85 | template 86 | static __forceinline double duration_in_seconds( 87 | std::chrono::duration delta) { 88 | typedef std::chrono::duration> seconds; 89 | return seconds(delta).count(); 90 | } 91 | 92 | template 93 | static __forceinline rep duration_from_seconds(double delta) { 94 | typedef std::chrono::duration> seconds; 95 | return std::chrono::duration_cast(seconds(delta)); 96 | } 97 | 98 | // Provices a C++11 standard clock interface to the os::AccurateClock functions 99 | class accurate_clock { 100 | public: 101 | typedef double rep; 102 | typedef std::nano period; 103 | typedef std::chrono::duration duration; 104 | typedef std::chrono::time_point time_point; 105 | 106 | static const bool is_steady = true; 107 | 108 | static __forceinline time_point now() { 109 | return time_point(duration(raw_now() * period_ns)); 110 | } 111 | 112 | // These two extra APIs and types let us use clocks without conversion to the 113 | // arbitrary period unit 114 | typedef uint64_t raw_rep; 115 | typedef uint64_t raw_frequency; 116 | 117 | static __forceinline raw_rep raw_now() { return os::ReadAccurateClock(); } 118 | static __forceinline raw_frequency raw_freq() { return freq; } 119 | 120 | private: 121 | static double period_ns; 122 | static raw_frequency freq; 123 | 124 | class init { 125 | public: 126 | init(); 127 | }; 128 | static init accurate_clock_init; 129 | }; 130 | 131 | // Provices a C++11 standard clock interface to the lowest latency approximate 132 | // clock 133 | class fast_clock { 134 | public: 135 | typedef double rep; 136 | typedef std::pico period; 137 | typedef std::chrono::duration duration; 138 | typedef std::chrono::time_point time_point; 139 | 140 | static const bool is_steady = true; 141 | 142 | static __forceinline time_point now() { 143 | return time_point(duration(raw_now() * period_ps)); 144 | } 145 | 146 | // These two extra APIs and types let us use clocks without conversion to the 147 | // arbitrary period unit 148 | typedef uint64_t raw_rep; 149 | typedef double raw_frequency; 150 | 151 | static __forceinline raw_rep raw_now() { return __rdtsc(); } 152 | static __forceinline raw_frequency raw_freq() { return freq; } 153 | 154 | private: 155 | static double period_ps; 156 | static raw_frequency freq; 157 | 158 | class init { 159 | public: 160 | init(); 161 | }; 162 | static init fast_clock_init; 163 | }; 164 | } 165 | 166 | #endif 167 | -------------------------------------------------------------------------------- /core/inc/amd_loader_context.hpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTIME_CORE_INC_AMD_LOADER_CONTEXT_HPP 48 | #define HSA_RUNTIME_CORE_INC_AMD_LOADER_CONTEXT_HPP 49 | 50 | #include 51 | #include 52 | #include 53 | #include "core/inc/amd_hsa_loader.hpp" 54 | #include "inc/hsa.h" 55 | #include "inc/hsa_ext_image.h" 56 | #include 57 | #include 58 | 59 | namespace amd { 60 | 61 | //===----------------------------------------------------------------------===// 62 | // Agent2RegionMap. // 63 | //===----------------------------------------------------------------------===// 64 | 65 | struct AgentHash { 66 | size_t operator()(const hsa_agent_t &agent) const { 67 | return std::hash()(agent.handle); 68 | } 69 | }; 70 | 71 | struct AgentCompare { 72 | bool operator()(const hsa_agent_t &left, const hsa_agent_t &right) const { 73 | return left.handle == right.handle; 74 | } 75 | }; 76 | 77 | typedef std::unordered_map Agent2RegionMap; 78 | 79 | //===----------------------------------------------------------------------===// 80 | // LoaderContext. // 81 | //===----------------------------------------------------------------------===// 82 | 83 | class LoaderContext final: public hsa::loader::Context { 84 | public: 85 | LoaderContext(): hsa::loader::Context() {} 86 | 87 | ~LoaderContext() {} 88 | 89 | hsa_isa_t IsaFromName(const char *name) override; 90 | 91 | bool IsaSupportedByAgent(hsa_agent_t agent, hsa_isa_t code_object_isa) override; 92 | 93 | void* SegmentAlloc(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, size_t size, size_t align, bool zero) override; 94 | 95 | bool SegmentCopy(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* dst, size_t offset, const void* src, size_t size) override; 96 | 97 | void SegmentFree(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* seg, size_t size = 0) override; 98 | 99 | void* SegmentAddress(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* seg, size_t offset) override; 100 | 101 | bool ImageExtensionSupported(); 102 | 103 | hsa_status_t ImageCreate( 104 | hsa_agent_t agent, 105 | hsa_access_permission_t image_permission, 106 | const hsa_ext_image_descriptor_t *image_descriptor, 107 | const void *image_data, 108 | hsa_ext_image_t *image_handle); 109 | 110 | hsa_status_t ImageDestroy(hsa_agent_t agent, hsa_ext_image_t image_handle); 111 | 112 | hsa_status_t SamplerCreate( 113 | hsa_agent_t agent, 114 | const hsa_ext_sampler_descriptor_t *sampler_descriptor, 115 | hsa_ext_sampler_t *sampler_handle); 116 | 117 | hsa_status_t SamplerDestroy(hsa_agent_t agent, hsa_ext_sampler_t sampler_handle); 118 | 119 | void Reset(); 120 | 121 | private: 122 | LoaderContext(const LoaderContext &lc); 123 | LoaderContext& operator=(const LoaderContext &lc); 124 | 125 | static hsa_status_t FindRegion(hsa_region_segment_t segment, hsa_region_t region, void *data); 126 | static hsa_status_t FindGlobalRegion(hsa_region_t region, void *data); 127 | static hsa_status_t FindReadonlyRegion(hsa_region_t region, void *data); 128 | 129 | void* ProgramGlobalAlloc(size_t size, size_t align, bool zero); 130 | bool ProgramGlobalCopy(void *dst, const void *src, size_t size); 131 | void ProgramGlobalFree(void *ptr, size_t size); 132 | void* AgentAlloc(hsa_agent_t agent, size_t size, size_t align, bool zero); 133 | bool AgentCopy(void *dst, const void *src, size_t size); 134 | void AgentFree(void *ptr, size_t size); 135 | void* KernelCodeAlloc(hsa_agent_t agent, size_t size, size_t align, bool zero); 136 | bool KernelCodeCopy(void *dst, const void *src, size_t size); 137 | void KernelCodeFree(void *ptr, size_t size); 138 | 139 | std::mutex agent2region_mutex_; 140 | Agent2RegionMap agent2region_; 141 | }; 142 | 143 | } // namespace amd 144 | 145 | #endif // HSA_RUNTIME_CORE_INC_AMD_LOADER_CONTEXT_HPP 146 | -------------------------------------------------------------------------------- /core/inc/default_signal.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // HSA runtime C++ interface file. 48 | 49 | #ifndef HSA_RUNTME_CORE_INC_DEFAULT_SIGNAL_H_ 50 | #define HSA_RUNTME_CORE_INC_DEFAULT_SIGNAL_H_ 51 | 52 | #include "core/inc/runtime.h" 53 | #include "core/inc/signal.h" 54 | #include "core/util/utils.h" 55 | 56 | namespace core { 57 | 58 | /// @brief Simple pure memory based signal. 59 | /// @brief See base class Signal. 60 | class DefaultSignal : public Signal { 61 | public: 62 | /// @brief See base class Signal. 63 | explicit DefaultSignal(hsa_signal_value_t initial_value); 64 | 65 | /// @brief See base class Signal. 66 | ~DefaultSignal(); 67 | 68 | // Below are various methods corresponding to the APIs, which load/store the 69 | // signal value or modify the existing signal value automically and with 70 | // specified memory ordering semantics. 71 | 72 | hsa_signal_value_t LoadRelaxed(); 73 | 74 | hsa_signal_value_t LoadAcquire(); 75 | 76 | void StoreRelaxed(hsa_signal_value_t value); 77 | 78 | void StoreRelease(hsa_signal_value_t value); 79 | 80 | hsa_signal_value_t WaitRelaxed(hsa_signal_condition_t condition, 81 | hsa_signal_value_t compare_value, 82 | uint64_t timeout, hsa_wait_state_t wait_hint); 83 | 84 | hsa_signal_value_t WaitAcquire(hsa_signal_condition_t condition, 85 | hsa_signal_value_t compare_value, 86 | uint64_t timeout, hsa_wait_state_t wait_hint); 87 | 88 | void AndRelaxed(hsa_signal_value_t value); 89 | 90 | void AndAcquire(hsa_signal_value_t value); 91 | 92 | void AndRelease(hsa_signal_value_t value); 93 | 94 | void AndAcqRel(hsa_signal_value_t value); 95 | 96 | void OrRelaxed(hsa_signal_value_t value); 97 | 98 | void OrAcquire(hsa_signal_value_t value); 99 | 100 | void OrRelease(hsa_signal_value_t value); 101 | 102 | void OrAcqRel(hsa_signal_value_t value); 103 | 104 | void XorRelaxed(hsa_signal_value_t value); 105 | 106 | void XorAcquire(hsa_signal_value_t value); 107 | 108 | void XorRelease(hsa_signal_value_t value); 109 | 110 | void XorAcqRel(hsa_signal_value_t value); 111 | 112 | void AddRelaxed(hsa_signal_value_t value); 113 | 114 | void AddAcquire(hsa_signal_value_t value); 115 | 116 | void AddRelease(hsa_signal_value_t value); 117 | 118 | void AddAcqRel(hsa_signal_value_t value); 119 | 120 | void SubRelaxed(hsa_signal_value_t value); 121 | 122 | void SubAcquire(hsa_signal_value_t value); 123 | 124 | void SubRelease(hsa_signal_value_t value); 125 | 126 | void SubAcqRel(hsa_signal_value_t value); 127 | 128 | hsa_signal_value_t ExchRelaxed(hsa_signal_value_t value); 129 | 130 | hsa_signal_value_t ExchAcquire(hsa_signal_value_t value); 131 | 132 | hsa_signal_value_t ExchRelease(hsa_signal_value_t value); 133 | 134 | hsa_signal_value_t ExchAcqRel(hsa_signal_value_t value); 135 | 136 | hsa_signal_value_t CasRelaxed(hsa_signal_value_t expected, 137 | hsa_signal_value_t value); 138 | 139 | hsa_signal_value_t CasAcquire(hsa_signal_value_t expected, 140 | hsa_signal_value_t value); 141 | 142 | hsa_signal_value_t CasRelease(hsa_signal_value_t expected, 143 | hsa_signal_value_t value); 144 | 145 | hsa_signal_value_t CasAcqRel(hsa_signal_value_t expected, 146 | hsa_signal_value_t value); 147 | 148 | /// @brief see the base class Signal 149 | __forceinline hsa_signal_value_t* ValueLocation() const { 150 | return (hsa_signal_value_t*)&signal_.value; 151 | } 152 | 153 | /// @brief see the base class Signal 154 | __forceinline HsaEvent* EopEvent() { return NULL; } 155 | 156 | /// @brief prevent throwing exceptions 157 | void* operator new(size_t size) { return malloc(size); } 158 | 159 | /// @brief prevent throwing exceptions 160 | void operator delete(void* ptr) { free(ptr); } 161 | 162 | private: 163 | DISALLOW_COPY_AND_ASSIGN(DefaultSignal); 164 | }; 165 | 166 | } // namespace core 167 | #endif // header guard 168 | -------------------------------------------------------------------------------- /core/inc/amd_load_map.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef AMD_LOAD_MAP_H 48 | #define AMD_LOAD_MAP_H 49 | 50 | #include "hsa.h" 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif // __cplusplus 55 | 56 | /// @todo. 57 | enum { 58 | AMD_EXTENSION_LOAD_MAP = 0x1002 59 | }; 60 | 61 | /// @todo. 62 | typedef struct amd_loaded_code_object_s { 63 | uint64_t handle; 64 | } amd_loaded_code_object_t; 65 | 66 | /// @todo. 67 | enum amd_loaded_code_object_info_t { 68 | AMD_LOADED_CODE_OBJECT_INFO_ELF_IMAGE = 0, 69 | AMD_LOADED_CODE_OBJECT_INFO_ELF_IMAGE_SIZE = 1 70 | }; 71 | 72 | /// @todo. 73 | typedef struct amd_loaded_segment_s { 74 | uint64_t handle; 75 | } amd_loaded_segment_t; 76 | 77 | /// @todo. 78 | enum amd_loaded_segment_info_t { 79 | AMD_LOADED_SEGMENT_INFO_TYPE = 0, 80 | AMD_LOADED_SEGMENT_INFO_ELF_BASE_ADDRESS = 1, 81 | AMD_LOADED_SEGMENT_INFO_LOAD_BASE_ADDRESS = 2, 82 | AMD_LOADED_SEGMENT_INFO_SIZE = 3 83 | }; 84 | 85 | /// @todo. 86 | hsa_status_t amd_executable_load_code_object( 87 | hsa_executable_t executable, 88 | hsa_agent_t agent, 89 | hsa_code_object_t code_object, 90 | const char *options, 91 | amd_loaded_code_object_t *loaded_code_object); 92 | 93 | /// @brief Invokes @p callback for each available executable in current 94 | /// process. 95 | hsa_status_t amd_iterate_executables( 96 | hsa_status_t (*callback)( 97 | hsa_executable_t executable, 98 | void *data), 99 | void *data); 100 | 101 | /// @brief Invokes @p callback for each loaded code object in specified 102 | /// @p executable. 103 | hsa_status_t amd_executable_iterate_loaded_code_objects( 104 | hsa_executable_t executable, 105 | hsa_status_t (*callback)( 106 | amd_loaded_code_object_t loaded_code_object, 107 | void *data), 108 | void *data); 109 | 110 | /// @brief Retrieves current value of specified @p loaded_code_object's 111 | /// @p attribute. 112 | hsa_status_t amd_loaded_code_object_get_info( 113 | amd_loaded_code_object_t loaded_code_object, 114 | amd_loaded_code_object_info_t attribute, 115 | void *value); 116 | 117 | /// @brief Invokes @p callback for each loaded segment in specified 118 | /// @p loaded_code_object. 119 | hsa_status_t amd_loaded_code_object_iterate_loaded_segments( 120 | amd_loaded_code_object_t loaded_code_object, 121 | hsa_status_t (*callback)( 122 | amd_loaded_segment_t loaded_segment, 123 | void *data), 124 | void *data); 125 | 126 | /// @brief Retrieves current value of specified @p loaded_segment's 127 | /// @p attribute. 128 | hsa_status_t amd_loaded_segment_get_info( 129 | amd_loaded_segment_t loaded_segment, 130 | amd_loaded_segment_info_t attribute, 131 | void *value); 132 | 133 | #define amd_load_map_1_00 134 | 135 | typedef struct amd_load_map_1_00_pfn_s { 136 | hsa_status_t (*amd_executable_load_code_object)( 137 | hsa_executable_t executable, 138 | hsa_agent_t agent, 139 | hsa_code_object_t code_object, 140 | const char *options, 141 | amd_loaded_code_object_t *loaded_code_object); 142 | 143 | hsa_status_t (*amd_iterate_executables)( 144 | hsa_status_t (*callback)( 145 | hsa_executable_t executable, 146 | void *data), 147 | void *data); 148 | 149 | hsa_status_t (*amd_executable_iterate_loaded_code_objects)( 150 | hsa_executable_t executable, 151 | hsa_status_t (*callback)( 152 | amd_loaded_code_object_t loaded_code_object, 153 | void *data), 154 | void *data); 155 | 156 | hsa_status_t (*amd_loaded_code_object_get_info)( 157 | amd_loaded_code_object_t loaded_code_object, 158 | amd_loaded_code_object_info_t attribute, 159 | void *value); 160 | 161 | hsa_status_t (*amd_loaded_code_object_iterate_loaded_segments)( 162 | amd_loaded_code_object_t loaded_code_object, 163 | hsa_status_t (*callback)( 164 | amd_loaded_segment_t loaded_segment, 165 | void *data), 166 | void *data); 167 | 168 | hsa_status_t (*amd_loaded_segment_get_info)( 169 | amd_loaded_segment_t loaded_segment, 170 | amd_loaded_segment_info_t attribute, 171 | void *value); 172 | } amd_load_map_1_00_pfn_t; 173 | 174 | #ifdef __cplusplus 175 | } // extern "C" 176 | #endif // __cplusplus 177 | 178 | #endif // AMD_LOAD_MAP_H 179 | -------------------------------------------------------------------------------- /core/inc/agent.h: -------------------------------------------------------------------------------- 1 | /////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // HSA runtime C++ interface file. 48 | 49 | #ifndef HSA_RUNTME_CORE_INC_AGENT_H_ 50 | #define HSA_RUNTME_CORE_INC_AGENT_H_ 51 | 52 | #include 53 | 54 | #include 55 | 56 | #include "core/inc/runtime.h" 57 | #include "core/inc/checked.h" 58 | #include "core/inc/queue.h" 59 | #include "core/inc/memory_region.h" 60 | #include "core/util/utils.h" 61 | #include "core/runtime/compute_capability.hpp" 62 | 63 | namespace core { 64 | typedef void (*HsaEventCallback)(hsa_status_t status, hsa_queue_t* source, 65 | void* data); 66 | 67 | class MemoryRegion; 68 | 69 | /* 70 | Agent is intended to be an pure interface class and may be wrapped or replaced 71 | by tools. 72 | All funtions other than Convert, device_type, and public_handle must be virtual. 73 | */ 74 | class Agent : public Checked<0xF6BC25EB17E6F917> { 75 | public: 76 | // Lightweight RTTI for vendor specific implementations. 77 | enum DeviceType { kAmdGpuDevice = 0, kAmdCpuDevice = 1, kUnknownDevice = 2 }; 78 | 79 | explicit Agent(DeviceType type) 80 | : compute_capability_(), device_type_(uint32_t(type)) { 81 | public_handle_ = Convert(this); 82 | } 83 | explicit Agent(uint32_t type) : compute_capability_(), device_type_(type) { 84 | public_handle_ = Convert(this); 85 | } 86 | 87 | virtual ~Agent() {} 88 | 89 | // Convert this object into hsa_agent_t. 90 | static __forceinline hsa_agent_t Convert(Agent* agent) { 91 | const hsa_agent_t agent_handle = { 92 | static_cast(reinterpret_cast(agent))}; 93 | return agent_handle; 94 | } 95 | 96 | static __forceinline const hsa_agent_t Convert(const Agent* agent) { 97 | const hsa_agent_t agent_handle = { 98 | static_cast(reinterpret_cast(agent))}; 99 | return agent_handle; 100 | } 101 | 102 | // Convert hsa_agent_t into Agent *. 103 | static __forceinline Agent* Convert(hsa_agent_t agent) { 104 | return reinterpret_cast(agent.handle); 105 | } 106 | 107 | virtual hsa_status_t DmaCopy(void* dst, const void* src, size_t size) { 108 | return HSA_STATUS_ERROR; 109 | } 110 | 111 | virtual hsa_status_t IterateRegion( 112 | hsa_status_t (*callback)(hsa_region_t region, void* data), 113 | void* data) const = 0; 114 | 115 | virtual hsa_status_t QueueCreate(size_t size, hsa_queue_type_t queue_type, 116 | HsaEventCallback event_callback, void* data, 117 | uint32_t private_segment_size, 118 | uint32_t group_segment_size, 119 | Queue** queue) = 0; 120 | 121 | // Translate vendor specific agent properties into HSA agent attribute. 122 | virtual hsa_status_t GetInfo(hsa_agent_info_t attribute, 123 | void* value) const = 0; 124 | 125 | virtual const std::vector& regions() const = 0; 126 | 127 | // For lightweight RTTI 128 | __forceinline uint32_t device_type() const { return device_type_; } 129 | 130 | __forceinline hsa_agent_t public_handle() const { return public_handle_; } 131 | 132 | // Get agent's compute capability value 133 | __forceinline const ComputeCapability& compute_capability() const { 134 | return compute_capability_; 135 | } 136 | 137 | protected: 138 | // Intention here is to have a polymorphic update procedure for public_handle_ 139 | // which is callable on any Agent* but only from some class dervied from 140 | // Agent*. do_set_public_handle should remain protected or private in all 141 | // derived types. 142 | static __forceinline void set_public_handle(Agent* agent, 143 | hsa_agent_t handle) { 144 | agent->do_set_public_handle(handle); 145 | } 146 | virtual void do_set_public_handle(hsa_agent_t handle) { 147 | public_handle_ = handle; 148 | } 149 | hsa_agent_t public_handle_; 150 | ComputeCapability compute_capability_; 151 | 152 | private: 153 | // Forbid copying and moving of this object 154 | DISALLOW_COPY_AND_ASSIGN(Agent); 155 | 156 | const uint32_t device_type_; 157 | }; 158 | } // namespace core 159 | 160 | #endif // header guard 161 | -------------------------------------------------------------------------------- /core/inc/host_queue.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #ifndef HSA_RUNTIME_CORE_INC_HOST_QUEUE_H_ 48 | #define HSA_RUNTIME_CORE_INC_HOST_QUEUE_H_ 49 | 50 | #include "core/inc/memory_region.h" 51 | #include "core/inc/queue.h" 52 | #include "core/inc/runtime.h" 53 | #include "core/inc/signal.h" 54 | 55 | namespace core { 56 | class HostQueue : public Queue { 57 | public: 58 | HostQueue(hsa_region_t region, uint32_t ring_size, hsa_queue_type_t type, 59 | uint32_t features, hsa_signal_t doorbell_signal); 60 | 61 | ~HostQueue(); 62 | 63 | hsa_status_t Inactivate() { return HSA_STATUS_SUCCESS; } 64 | 65 | uint64_t LoadReadIndexAcquire() { 66 | return atomic::Load(&amd_queue_.read_dispatch_id, 67 | std::memory_order_acquire); 68 | } 69 | 70 | uint64_t LoadReadIndexRelaxed() { 71 | return atomic::Load(&amd_queue_.read_dispatch_id, 72 | std::memory_order_relaxed); 73 | } 74 | 75 | uint64_t LoadWriteIndexAcquire() { 76 | return atomic::Load(&amd_queue_.write_dispatch_id, 77 | std::memory_order_acquire); 78 | } 79 | 80 | uint64_t LoadWriteIndexRelaxed() { 81 | return atomic::Load(&amd_queue_.write_dispatch_id, 82 | std::memory_order_relaxed); 83 | } 84 | 85 | void StoreReadIndexRelaxed(uint64_t value) { 86 | atomic::Store(&amd_queue_.read_dispatch_id, value, 87 | std::memory_order_relaxed); 88 | } 89 | 90 | void StoreReadIndexRelease(uint64_t value) { 91 | atomic::Store(&amd_queue_.read_dispatch_id, value, 92 | std::memory_order_release); 93 | } 94 | 95 | void StoreWriteIndexRelaxed(uint64_t value) { 96 | atomic::Store(&amd_queue_.write_dispatch_id, value, 97 | std::memory_order_relaxed); 98 | } 99 | 100 | void StoreWriteIndexRelease(uint64_t value) { 101 | atomic::Store(&amd_queue_.write_dispatch_id, value, 102 | std::memory_order_release); 103 | } 104 | 105 | uint64_t CasWriteIndexAcqRel(uint64_t expected, uint64_t value) { 106 | return atomic::Cas(&amd_queue_.write_dispatch_id, value, expected, 107 | std::memory_order_acq_rel); 108 | } 109 | 110 | uint64_t CasWriteIndexAcquire(uint64_t expected, uint64_t value) { 111 | return atomic::Cas(&amd_queue_.write_dispatch_id, value, expected, 112 | std::memory_order_acquire); 113 | } 114 | 115 | uint64_t CasWriteIndexRelaxed(uint64_t expected, uint64_t value) { 116 | return atomic::Cas(&amd_queue_.write_dispatch_id, value, expected, 117 | std::memory_order_relaxed); 118 | } 119 | 120 | uint64_t CasWriteIndexRelease(uint64_t expected, uint64_t value) { 121 | return atomic::Cas(&amd_queue_.write_dispatch_id, value, expected, 122 | std::memory_order_release); 123 | } 124 | 125 | uint64_t AddWriteIndexAcqRel(uint64_t value) { 126 | return atomic::Add(&amd_queue_.write_dispatch_id, value, 127 | std::memory_order_acq_rel); 128 | } 129 | 130 | uint64_t AddWriteIndexAcquire(uint64_t value) { 131 | return atomic::Add(&amd_queue_.write_dispatch_id, value, 132 | std::memory_order_acquire); 133 | } 134 | 135 | uint64_t AddWriteIndexRelaxed(uint64_t value) { 136 | return atomic::Add(&amd_queue_.write_dispatch_id, value, 137 | std::memory_order_relaxed); 138 | } 139 | 140 | uint64_t AddWriteIndexRelease(uint64_t value) { 141 | return atomic::Add(&amd_queue_.write_dispatch_id, value, 142 | std::memory_order_release); 143 | } 144 | 145 | hsa_status_t SetCUMasking(const uint32_t num_cu_mask_count, 146 | const uint32_t* cu_mask) { 147 | return HSA_STATUS_ERROR; 148 | } 149 | 150 | bool active() const { return active_; } 151 | 152 | void* operator new(size_t size) { 153 | return _aligned_malloc(size, HSA_QUEUE_ALIGN_BYTES); 154 | } 155 | 156 | void* operator new(size_t size, void* ptr) { return ptr; } 157 | 158 | void operator delete(void* ptr) { _aligned_free(ptr); } 159 | 160 | void operator delete(void*, void*) {} 161 | 162 | private: 163 | static const size_t kRingAlignment = 256; 164 | const uint32_t size_; 165 | bool active_; 166 | void* ring_; 167 | 168 | DISALLOW_COPY_AND_ASSIGN(HostQueue); 169 | }; 170 | } // namespace core 171 | #endif // header guard 172 | -------------------------------------------------------------------------------- /core/runtime/amd_load_map.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation (if 6 | // any) (collectively, the "Materials") pursuant to the terms and conditions of 7 | // the Software License Agreement included with the Materials. If you do not 8 | // have a copy of the Software License Agreement, contact your AMD 9 | // representative for a copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE 20 | // OF THE SOFTWARE IS ASSUMED BY YOU. Some jurisdictions do not allow the 21 | // exclusion of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor. Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include 48 | #include "core/inc/amd_hsa_loader.hpp" 49 | #include "core/inc/amd_load_map.h" 50 | #include "core/inc/runtime.h" 51 | 52 | using amd::hsa::loader::Executable; 53 | using amd::hsa::loader::LoadedCodeObject; 54 | using amd::hsa::loader::LoadedSegment; 55 | 56 | hsa_status_t amd_executable_load_code_object( 57 | hsa_executable_t executable, 58 | hsa_agent_t agent, 59 | hsa_code_object_t code_object, 60 | const char *options, 61 | amd_loaded_code_object_t *loaded_code_object) 62 | { 63 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 64 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 65 | } 66 | if (nullptr == loaded_code_object) { 67 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 68 | } 69 | 70 | Executable *exec = Executable::Object(executable); 71 | if (nullptr == exec) { 72 | return HSA_STATUS_ERROR_INVALID_EXECUTABLE; 73 | } 74 | return exec->LoadCodeObject(agent, code_object, options, loaded_code_object); 75 | } 76 | 77 | hsa_status_t amd_iterate_executables( 78 | hsa_status_t (*callback)( 79 | hsa_executable_t executable, 80 | void *data), 81 | void *data) 82 | { 83 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 84 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 85 | } 86 | if (nullptr == callback) { 87 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 88 | } 89 | 90 | return Executable::IterateExecutables(callback, data); 91 | } 92 | 93 | hsa_status_t amd_executable_iterate_loaded_code_objects( 94 | hsa_executable_t executable, 95 | hsa_status_t (*callback)( 96 | amd_loaded_code_object_t loaded_code_object, 97 | void *data), 98 | void *data) 99 | { 100 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 101 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 102 | } 103 | if (nullptr == callback) { 104 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 105 | } 106 | 107 | Executable *exec = Executable::Object(executable); 108 | if (nullptr == exec) { 109 | return HSA_STATUS_ERROR_INVALID_EXECUTABLE; 110 | } 111 | return exec->IterateLoadedCodeObjects(callback, data); 112 | } 113 | 114 | hsa_status_t amd_loaded_code_object_get_info( 115 | amd_loaded_code_object_t loaded_code_object, 116 | amd_loaded_code_object_info_t attribute, 117 | void *value) 118 | { 119 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 120 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 121 | } 122 | if (nullptr == value) { 123 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 124 | } 125 | 126 | LoadedCodeObject *obj = LoadedCodeObject::Object(loaded_code_object); 127 | if (nullptr == obj) { 128 | // \todo: new error code: AMD_STATUS_ERROR_INVALID_LOADED_CODE_OBJECT. 129 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 130 | } 131 | return false == obj->GetInfo(attribute, value) ? 132 | HSA_STATUS_ERROR_INVALID_ARGUMENT : HSA_STATUS_SUCCESS; 133 | } 134 | 135 | hsa_status_t amd_loaded_code_object_iterate_loaded_segments( 136 | amd_loaded_code_object_t loaded_code_object, 137 | hsa_status_t (*callback)( 138 | amd_loaded_segment_t loaded_segment, 139 | void *data), 140 | void *data) 141 | { 142 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 143 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 144 | } 145 | if (nullptr == callback) { 146 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 147 | } 148 | 149 | LoadedCodeObject *obj = LoadedCodeObject::Object(loaded_code_object); 150 | if (nullptr == obj) { 151 | // \todo: new error code: AMD_STATUS_ERROR_INVALID_LOADED_CODE_OBJECT. 152 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 153 | } 154 | return obj->IterateLoadedSegments(callback, data); 155 | } 156 | 157 | hsa_status_t amd_loaded_segment_get_info( 158 | amd_loaded_segment_t loaded_segment, 159 | amd_loaded_segment_info_t attribute, 160 | void *value) 161 | { 162 | if (!core::Runtime::runtime_singleton_->IsOpen()) { 163 | return HSA_STATUS_ERROR_NOT_INITIALIZED; 164 | } 165 | if (nullptr == value) { 166 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 167 | } 168 | 169 | LoadedSegment *obj = LoadedSegment::Object(loaded_segment); 170 | if (nullptr == obj) { 171 | // \todo: new error code: AMD_STATUS_ERROR_INVALID_LOADED_SEGMENT. 172 | return HSA_STATUS_ERROR_INVALID_ARGUMENT; 173 | } 174 | return false == obj->GetInfo(attribute, value) ? 175 | HSA_STATUS_ERROR_INVALID_ARGUMENT : HSA_STATUS_SUCCESS; 176 | } 177 | -------------------------------------------------------------------------------- /core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required ( VERSION 2.8.0 ) 2 | ## GCC 4.8 or higher compiler required. 3 | 4 | ############################################################################### 5 | ## Before building please provide the location for HSA KFD thunk headers and 6 | ## .so library files in HSA_BUILD_INC_PATH and HSA_BUILD_LIB_PATH environment 7 | ## variables. 8 | ## Example: 9 | ## export HSA_BUILD_INC_PATH=/libhsakmt/include 10 | ## export HSA_BUILD_LIB_PATH=/libhsakmt/lib/lnx64 11 | ## 12 | ## Obtaining kfd-thunk headers and shared library: 13 | ## 14 | ## Headers: Get kfd-thunk sources from the HSA-Drivers-Linux-AMD repository: 15 | ## $git clone https://github.com/HSAFoundation/HSA-Drivers-Linux-AMD.git 16 | ## export HSA_BUILD_INC_PATH= 17 | ## /src/libhsakmt/include 18 | ## 19 | ## Library: Go to the libhsakmt folder you cloned in the previous step 20 | ## Run 'make' 21 | ## export HSA_BUILD_LIB_PATH= 22 | ## /src/libhsakmt/build/lnx64a 23 | ## 24 | ## The system environment is now ready to build HSA. Please see the 25 | ## "Usage" instructions below. 26 | 27 | ############################################################################### 28 | ## Usage: 29 | ## 1) Create build folder named "release64" (any name will do) under core 30 | ## 2) Make core/release64 current folder 31 | ## 3) Run "cmake ../ && make" 32 | ## libhsa-runtime{64}.so will be in core/release64 folder. 33 | ## 34 | ## Defaults to 64 bit Release build. 35 | ## To build 32 bit: 36 | ## export HSA_BUILD_TARGET_BITS=32 37 | ## 38 | ## Note: The CMAKE_BUILD_TYPE CMake variable will override the 39 | ## HSA_BUILD_TARGET_TYPE environment variable. Its value 40 | ## can be specified on the cmake command line using the 41 | ## "-D CMAKE_BUILD_TYPE:STRING=(Release|Debug)" option. 42 | 43 | if ( WIN32 ) 44 | MESSAGE ( FATAL_ERROR "Windows build is not supported." ) 45 | endif () 46 | 47 | if ( "$ENV{HSA_BUILD_TARGET_BITS}" STREQUAL 32 ) 48 | set ( ONLY64STR "" ) 49 | set ( IS64BIT 0 ) 50 | else () 51 | set ( ONLY64STR "64" ) 52 | set ( IS64BIT 1 ) 53 | endif () 54 | 55 | if ( NOT EXISTS $ENV{HSA_BUILD_INC_PATH}/hsakmt.h ) 56 | MESSAGE ( FATAL_ERROR "Environment variable HSA_BUILD_INC_PATH is not set to point to the location where KFD Thunk header file hsakmt.h (and rest of the thunk headers) could be found." ) 57 | endif () 58 | 59 | if ( NOT EXISTS $ENV{HSA_BUILD_LIB_PATH}/libhsakmt.so.1 ) 60 | MESSAGE ( FATAL_ERROR "Environment variable HSA_BUILD_LIB_PATH is not set to point to the location where KFD Thunk library libhsakmt.so.1 could be found." ) 61 | endif () 62 | 63 | MESSAGE ( ------IS64BIT: ${IS64BIT} ) 64 | MESSAGE ( ------Compiler: ${CMAKE_CXX_COMPILER} ) 65 | MESSAGE ( ------Version: ${CMAKE_CXX_COMPILER_VERSION} ) 66 | 67 | ## Set core runtuime module name and project name. 68 | set ( CORE_RUNTIME_PACKAGE "hsa-runtime" ) 69 | set ( CORE_RUNTIME_LIB "${CORE_RUNTIME_PACKAGE}${ONLY64STR}" ) 70 | project ( ${CORE_RUNTIME_LIB} ) 71 | 72 | ## Verbose output. 73 | set ( CMAKE_VERBOSE_MAKEFILE on ) 74 | 75 | ## Compiler preproc definitions. 76 | add_definitions ( -D__linux__ ) 77 | add_definitions ( -DLITTLEENDIAN_CPU=1 ) 78 | add_definitions ( -DHSA_EXPORT=1 ) 79 | add_definitions ( -DHSA_EXPORT_FINALIZER=1 ) 80 | add_definitions ( -DHSA_EXPORT_IMAGES=1 ) 81 | 82 | ## ------------------------- Linux Compiler and Linker options ------------------------- 83 | set ( CMAKE_CXX_FLAGS "-std=c++11 " ) 84 | 85 | set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror -fexceptions -fno-rtti -fvisibility=hidden -Wno-error=sign-compare -Wno-sign-compare -Wno-write-strings -Wno-deprecated-declarations -Wno-conversion-null -fno-math-errno -fno-threadsafe-statics -fmerge-all-constants -fms-extensions -Wno-error=comment -Wno-comment -Wno-error=pointer-arith -Wno-pointer-arith" ) 86 | 87 | if ( IS64BIT ) 88 | set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -m64 -msse -msse2" ) 89 | else () 90 | set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -m32" ) 91 | endif () 92 | 93 | set ( DRVDEF "${CMAKE_SOURCE_DIR}/hsacore.so.def" ) 94 | 95 | set ( CMAKE_SHARED_LINKER_FLAGS "-Wl,-Bdynamic -Wl,-z,noexecstack -Wl,--version-script=${DRVDEF}" ) 96 | 97 | set ( CMAKE_SKIP_BUILD_RPATH TRUE) 98 | 99 | ## ------------------------- End Compiler and Linker options ---------------------------- 100 | 101 | ## Source files. 102 | set ( CORE_SRCS util/lnx/os_linux.cpp ) 103 | set ( CORE_SRCS ${CORE_SRCS} util/small_heap.cpp ) 104 | set ( CORE_SRCS ${CORE_SRCS} util/timer.cpp ) 105 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_blit_kernel.cpp ) 106 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_blit_sdma.cpp ) 107 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_cpu_agent.cpp ) 108 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_gpu_agent.cpp ) 109 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_dgpu_agent.cpp ) 110 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_hw_aql_command_processor.cpp ) 111 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_memory_region.cpp ) 112 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_memory_registration.cpp ) 113 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_sdma_cmdwriter_kv.cpp ) 114 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_topology.cpp ) 115 | set ( CORE_SRCS ${CORE_SRCS} runtime/compute_capability.cpp ) 116 | set ( CORE_SRCS ${CORE_SRCS} runtime/default_signal.cpp ) 117 | set ( CORE_SRCS ${CORE_SRCS} runtime/host_queue.cpp ) 118 | set ( CORE_SRCS ${CORE_SRCS} runtime/hsa.cpp ) 119 | set ( CORE_SRCS ${CORE_SRCS} runtime/hsa_api_trace.cpp ) 120 | set ( CORE_SRCS ${CORE_SRCS} runtime/hsa_ext_amd.cpp ) 121 | set ( CORE_SRCS ${CORE_SRCS} runtime/hsa_ext_interface.cpp ) 122 | set ( CORE_SRCS ${CORE_SRCS} runtime/interrupt_signal.cpp ) 123 | set ( CORE_SRCS ${CORE_SRCS} runtime/isa.cpp ) 124 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_loader_context.cpp ) 125 | set ( CORE_SRCS ${CORE_SRCS} runtime/amd_load_map.cpp ) 126 | set ( CORE_SRCS ${CORE_SRCS} runtime/memory_database.cpp ) 127 | set ( CORE_SRCS ${CORE_SRCS} runtime/runtime.cpp ) 128 | set ( CORE_SRCS ${CORE_SRCS} runtime/signal.cpp ) 129 | set ( CORE_SRCS ${CORE_SRCS} common/hsa_table_interface.cpp ) 130 | set ( CORE_SRCS ${CORE_SRCS} common/shared.cpp ) 131 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/amd_elf_image.cpp ) 132 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/amd_hsa_code.cpp ) 133 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/amd_hsa_code_util.cpp ) 134 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/amd_hsa_locks.cpp ) 135 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/util.cpp ) 136 | set ( CORE_SRCS ${CORE_SRCS} tools/libamdhsacode/xutil.cpp ) 137 | set ( CORE_SRCS ${CORE_SRCS} tools/loader/executable.cpp ) 138 | 139 | ## Include path(s). 140 | include_directories ( ${CMAKE_CURRENT_SOURCE_DIR}/.. ) 141 | include_directories ( ${CMAKE_SOURCE_DIR}/../inc ) 142 | include_directories ( ${CMAKE_SOURCE_DIR}/inc ) 143 | include_directories ( ${CMAKE_SOURCE_DIR}/tools/libamdhsacode ) 144 | include_directories ( ${CMAKE_SOURCE_DIR}/tools/loader ) 145 | include_directories ( $ENV{HSA_BUILD_INC_PATH} ) 146 | 147 | ## Library path(s). 148 | link_directories ( $ENV{HSA_BUILD_LIB_PATH} ) 149 | 150 | add_library ( ${CORE_RUNTIME_LIB} SHARED ${CORE_SRCS} ) 151 | 152 | set_property ( TARGET ${CORE_RUNTIME_LIB} PROPERTY SOVERSION 1 ) 153 | 154 | target_link_libraries ( ${CORE_RUNTIME_LIB} hsakmt elf c stdc++ dl pthread rt ) 155 | -------------------------------------------------------------------------------- /core/util/small_heap.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | #include "small_heap.h" 48 | 49 | SmallHeap::memory_t::iterator SmallHeap::merge( 50 | SmallHeap::memory_t::iterator& keep, 51 | SmallHeap::memory_t::iterator& destroy) { 52 | assert((char*)keep->first + keep->second.len == (char*)destroy->first && 53 | "Invalid merge"); 54 | assert(keep->second.isfree() && "Merge with allocated block"); 55 | assert(destroy->second.isfree() && "Merge with allocated block"); 56 | 57 | keep->second.len += destroy->second.len; 58 | keep->second.next_free = destroy->second.next_free; 59 | if (!destroy->second.islastfree()) 60 | memory[destroy->second.next_free].prior_free = keep->first; 61 | 62 | memory.erase(destroy); 63 | return keep; 64 | } 65 | 66 | void SmallHeap::free(void* ptr) { 67 | if (ptr == NULL) return; 68 | 69 | auto iterator = memory.find(ptr); 70 | 71 | // Check for illegal free 72 | if (iterator == memory.end()) { 73 | assert(false && "Illegal free."); 74 | return; 75 | } 76 | 77 | const auto start_guard = memory.find(0); 78 | const auto end_guard = memory.find((void*)0xFFFFFFFFFFFFFFFFull); 79 | 80 | // Return memory to total and link node into free list 81 | total_free += iterator->second.len; 82 | if (first_free < iterator->first) { 83 | auto before = iterator; 84 | before--; 85 | while (before != start_guard && !before->second.isfree()) before--; 86 | assert(before->second.next_free > iterator->first && 87 | "Inconsistency in small heap."); 88 | iterator->second.prior_free = before->first; 89 | iterator->second.next_free = before->second.next_free; 90 | before->second.next_free = iterator->first; 91 | if (!iterator->second.islastfree()) 92 | memory[iterator->second.next_free].prior_free = iterator->first; 93 | } else { 94 | iterator->second.setfirstfree(); 95 | iterator->second.next_free = first_free; 96 | first_free = iterator->first; 97 | if (!iterator->second.islastfree()) 98 | memory[iterator->second.next_free].prior_free = iterator->first; 99 | } 100 | 101 | // Attempt compaction 102 | auto before = iterator; 103 | before--; 104 | if (before != start_guard) { 105 | if (before->second.isfree()) { 106 | iterator = merge(before, iterator); 107 | } 108 | } 109 | 110 | auto after = iterator; 111 | after++; 112 | if (after != end_guard) { 113 | if (after->second.isfree()) { 114 | iterator = merge(iterator, after); 115 | } 116 | } 117 | } 118 | 119 | void* SmallHeap::alloc(size_t bytes) { 120 | // Is enough memory available? 121 | if ((bytes > total_free) || (bytes == 0)) return NULL; 122 | 123 | memory_t::iterator current; 124 | memory_t::iterator prior; 125 | 126 | // Walk the free list and allocate at first fitting location 127 | prior = current = memory.find(first_free); 128 | while (true) { 129 | if (bytes <= current->second.len) { 130 | // Decrement from total 131 | total_free -= bytes; 132 | 133 | // Is allocation an exact fit? 134 | if (bytes == current->second.len) { 135 | if (prior == current) { 136 | first_free = current->second.next_free; 137 | if (!current->second.islastfree()) 138 | memory[current->second.next_free].setfirstfree(); 139 | } else { 140 | prior->second.next_free = current->second.next_free; 141 | if (!current->second.islastfree()) 142 | memory[current->second.next_free].prior_free = prior->first; 143 | } 144 | current->second.next_free = NULL; 145 | return current->first; 146 | } else { 147 | // Split current node 148 | void* remaining = (char*)current->first + bytes; 149 | Node& node = memory[remaining]; 150 | node.next_free = current->second.next_free; 151 | node.prior_free = current->second.prior_free; 152 | node.len = current->second.len - bytes; 153 | current->second.len = bytes; 154 | 155 | if (prior == current) { 156 | first_free = remaining; 157 | node.setfirstfree(); 158 | } else { 159 | prior->second.next_free = remaining; 160 | node.prior_free = prior->first; 161 | } 162 | if (!node.islastfree()) memory[node.next_free].prior_free = remaining; 163 | 164 | current->second.next_free = NULL; 165 | return current->first; 166 | } 167 | } 168 | 169 | // End of free list? 170 | if (current->second.islastfree()) break; 171 | 172 | prior = current; 173 | current = memory.find(current->second.next_free); 174 | } 175 | 176 | // Can't service the request due to fragmentation 177 | return NULL; 178 | } 179 | -------------------------------------------------------------------------------- /core/inc/interrupt_signal.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Copyright 2014 ADVANCED MICRO DEVICES, INC. 4 | // 5 | // AMD is granting you permission to use this software and documentation(if any) 6 | // (collectively, the "Materials") pursuant to the terms and conditions of the 7 | // Software License Agreement included with the Materials.If you do not have a 8 | // copy of the Software License Agreement, contact your AMD representative for a 9 | // copy. 10 | // 11 | // You agree that you will not reverse engineer or decompile the Materials, in 12 | // whole or in part, except as allowed by applicable law. 13 | // 14 | // WARRANTY DISCLAIMER : THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF 15 | // ANY KIND.AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, 16 | // INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, 17 | // FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON - INFRINGEMENT, THAT THE 18 | // SOFTWARE WILL RUN UNINTERRUPTED OR ERROR - FREE OR WARRANTIES ARISING FROM 19 | // CUSTOM OF TRADE OR COURSE OF USAGE.THE ENTIRE RISK ASSOCIATED WITH THE USE OF 20 | // THE SOFTWARE IS ASSUMED BY YOU.Some jurisdictions do not allow the exclusion 21 | // of implied warranties, so the above exclusion may not apply to You. 22 | // 23 | // LIMITATION OF LIABILITY AND INDEMNIFICATION : AMD AND ITS LICENSORS WILL NOT, 24 | // UNDER ANY CIRCUMSTANCES BE LIABLE TO YOU FOR ANY PUNITIVE, DIRECT, 25 | // INCIDENTAL, INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF 26 | // THE SOFTWARE OR THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN 27 | // ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.In no event shall AMD's total 28 | // liability to You for all damages, losses, and causes of action (whether in 29 | // contract, tort (including negligence) or otherwise) exceed the amount of $100 30 | // USD. You agree to defend, indemnify and hold harmless AMD and its licensors, 31 | // and any of their directors, officers, employees, affiliates or agents from 32 | // and against any and all loss, damage, liability and other expenses (including 33 | // reasonable attorneys' fees), resulting from Your use of the Software or 34 | // violation of the terms and conditions of this Agreement. 35 | // 36 | // U.S.GOVERNMENT RESTRICTED RIGHTS : The Materials are provided with 37 | // "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is 38 | // subject to the restrictions as set forth in FAR 52.227 - 14 and DFAR252.227 - 39 | // 7013, et seq., or its successor.Use of the Materials by the Government 40 | // constitutes acknowledgement of AMD's proprietary rights in them. 41 | // 42 | // EXPORT RESTRICTIONS: The Materials may be subject to export restrictions as 43 | // stated in the Software License Agreement. 44 | // 45 | //////////////////////////////////////////////////////////////////////////////// 46 | 47 | // HSA runtime C++ interface file. 48 | 49 | #ifndef HSA_RUNTME_CORE_INC_INTERRUPT_SIGNAL_H_ 50 | #define HSA_RUNTME_CORE_INC_INTERRUPT_SIGNAL_H_ 51 | 52 | #include "core/inc/runtime.h" 53 | #include "core/inc/signal.h" 54 | #include "core/util/utils.h" 55 | 56 | #include "core/inc/thunk.h" 57 | 58 | namespace core { 59 | 60 | /// @brief A Signal implementation using interrupts versus plain memory based. 61 | /// Also see base class Signal. 62 | /// 63 | /// Breaks common/vendor separation - signals in general needs to be re-worked 64 | /// at the foundation level to make sense in a multi-device system. 65 | /// Supports only one waiter for now. 66 | /// KFD changes are needed to support multiple waiters and have device 67 | /// signaling. 68 | class InterruptSignal : public Signal { 69 | public: 70 | static HsaEvent* CreateEvent(); 71 | static void DestroyEvent(HsaEvent* evt); 72 | 73 | explicit InterruptSignal(hsa_signal_value_t initial_value, 74 | HsaEvent* use_event = NULL); 75 | 76 | ~InterruptSignal(); 77 | 78 | // Below are various methods corresponding to the APIs, which load/store the 79 | // signal value or modify the existing signal value automically and with 80 | // specified memory ordering semantics. 81 | 82 | hsa_signal_value_t LoadRelaxed(); 83 | 84 | hsa_signal_value_t LoadAcquire(); 85 | 86 | void StoreRelaxed(hsa_signal_value_t value); 87 | 88 | void StoreRelease(hsa_signal_value_t value); 89 | 90 | hsa_signal_value_t WaitRelaxed(hsa_signal_condition_t condition, 91 | hsa_signal_value_t compare_value, 92 | uint64_t timeout, hsa_wait_state_t wait_hint); 93 | 94 | hsa_signal_value_t WaitAcquire(hsa_signal_condition_t condition, 95 | hsa_signal_value_t compare_value, 96 | uint64_t timeout, hsa_wait_state_t wait_hint); 97 | 98 | void AndRelaxed(hsa_signal_value_t value); 99 | 100 | void AndAcquire(hsa_signal_value_t value); 101 | 102 | void AndRelease(hsa_signal_value_t value); 103 | 104 | void AndAcqRel(hsa_signal_value_t value); 105 | 106 | void OrRelaxed(hsa_signal_value_t value); 107 | 108 | void OrAcquire(hsa_signal_value_t value); 109 | 110 | void OrRelease(hsa_signal_value_t value); 111 | 112 | void OrAcqRel(hsa_signal_value_t value); 113 | 114 | void XorRelaxed(hsa_signal_value_t value); 115 | 116 | void XorAcquire(hsa_signal_value_t value); 117 | 118 | void XorRelease(hsa_signal_value_t value); 119 | 120 | void XorAcqRel(hsa_signal_value_t value); 121 | 122 | void AddRelaxed(hsa_signal_value_t value); 123 | 124 | void AddAcquire(hsa_signal_value_t value); 125 | 126 | void AddRelease(hsa_signal_value_t value); 127 | 128 | void AddAcqRel(hsa_signal_value_t value); 129 | 130 | void SubRelaxed(hsa_signal_value_t value); 131 | 132 | void SubAcquire(hsa_signal_value_t value); 133 | 134 | void SubRelease(hsa_signal_value_t value); 135 | 136 | void SubAcqRel(hsa_signal_value_t value); 137 | 138 | hsa_signal_value_t ExchRelaxed(hsa_signal_value_t value); 139 | 140 | hsa_signal_value_t ExchAcquire(hsa_signal_value_t value); 141 | 142 | hsa_signal_value_t ExchRelease(hsa_signal_value_t value); 143 | 144 | hsa_signal_value_t ExchAcqRel(hsa_signal_value_t value); 145 | 146 | hsa_signal_value_t CasRelaxed(hsa_signal_value_t expected, 147 | hsa_signal_value_t value); 148 | 149 | hsa_signal_value_t CasAcquire(hsa_signal_value_t expected, 150 | hsa_signal_value_t value); 151 | 152 | hsa_signal_value_t CasRelease(hsa_signal_value_t expected, 153 | hsa_signal_value_t value); 154 | 155 | hsa_signal_value_t CasAcqRel(hsa_signal_value_t expected, 156 | hsa_signal_value_t value); 157 | 158 | /// @brief See base class Signal. 159 | __forceinline hsa_signal_value_t* ValueLocation() const { 160 | return (hsa_signal_value_t*)&signal_.value; 161 | } 162 | 163 | /// @brief See base class Signal. 164 | __forceinline HsaEvent* EopEvent() { return event_; } 165 | 166 | /// @brief prevent throwing exceptions 167 | void* operator new(size_t size) { return malloc(size); } 168 | 169 | /// @brief prevent throwing exceptions 170 | void operator delete(void* ptr) { free(ptr); } 171 | 172 | private: 173 | /// @variable KFD event on which the interrupt signal is based on. 174 | HsaEvent* event_; 175 | 176 | /// @variable Indicates whether the signal should release the event when it 177 | /// closes or not. 178 | bool free_event_; 179 | 180 | DISALLOW_COPY_AND_ASSIGN(InterruptSignal); 181 | }; 182 | 183 | } // namespace core 184 | #endif // header guard 185 | --------------------------------------------------------------------------------