├── LICENSE ├── README.md ├── boards.txt ├── cores └── w806 │ ├── Arduino.h │ ├── WInterrupts.c │ ├── WInterrupts.h │ ├── include │ ├── arch │ │ └── xt804 │ │ │ ├── csi_config.h │ │ │ ├── csi_core │ │ │ ├── core_804.h │ │ │ ├── csi_core.h │ │ │ └── csi_gcc.h │ │ │ └── csi_dsp │ │ │ ├── csky_common_tables.h │ │ │ ├── csky_const_structs.h │ │ │ ├── csky_math.h │ │ │ ├── csky_vdsp2_const_structs.h │ │ │ └── csky_vdsp2_math.h │ ├── driver │ │ ├── wm_adc.h │ │ ├── wm_cpu.h │ │ ├── wm_gpio.h │ │ ├── wm_gpio_ex.h │ │ ├── wm_hal.h │ │ ├── wm_i2c.h │ │ ├── wm_internal_flash.h │ │ ├── wm_lcd.h │ │ ├── wm_pmu.h │ │ ├── wm_pwm.h │ │ ├── wm_rcc.h │ │ ├── wm_spi.h │ │ ├── wm_spi_flash.h │ │ ├── wm_tim.h │ │ ├── wm_touch.h │ │ ├── wm_uart.h │ │ └── wm_wdg.h │ ├── wm_regs.h │ └── wm_type_def.h │ ├── ld │ └── gcc_csky.ld │ ├── lib │ ├── arch │ │ └── xt804 │ │ │ ├── bsp │ │ │ ├── __rt_entry.S_ │ │ │ ├── __rt_entry.o │ │ │ ├── board_init.c │ │ │ ├── startup.S_ │ │ │ ├── startup.o │ │ │ ├── system.c │ │ │ ├── trap_c.c │ │ │ ├── vectors.S_ │ │ │ └── vectors.o │ │ │ └── libc │ │ │ └── libc_port.c │ ├── drivers │ │ ├── wm_adc.c │ │ ├── wm_cpu.c │ │ ├── wm_gpio.c │ │ ├── wm_hal.c │ │ ├── wm_i2c.c │ │ ├── wm_internal_flash.c │ │ ├── wm_lcd.c │ │ ├── wm_pmu.c │ │ ├── wm_pwm.c │ │ ├── wm_spi.c │ │ ├── wm_spi_flash.c │ │ ├── wm_tim.c │ │ ├── wm_touch.c │ │ ├── wm_uart.c │ │ └── wm_wdg.c │ └── libdsp.a │ ├── main.cpp │ ├── wiring.c │ ├── wiring_analog.c │ └── wiring_digital.c ├── doc ├── board_chioce.png ├── board_manager_zh.png └── option_zh.png ├── libraries ├── BasicsExamples │ ├── BasicsExamples.h │ ├── examples │ │ ├── Adc │ │ │ └── Adc.ino │ │ └── Led │ │ │ └── Led.ino │ ├── keywords.txt │ └── library.properties ├── SPI │ ├── examples │ │ └── DigitalPotControl │ │ │ └── DigitalPotControl.ino │ ├── keywords.txt │ ├── library.properties │ └── src │ │ ├── SPI.cpp │ │ └── SPI.h └── keywords.txt ├── package_w80x_index.json ├── package_w80x_proxy_index.json ├── platform.txt └── variants └── w806 ├── pins_arduino.h ├── variant.cpp └── variant.h /README.md: -------------------------------------------------------------------------------- 1 | # w80x_duino 2 | w806为[联盛德](http://www.winnermicro.com/)公司推出一款基于平头哥（XT-E804）架构的MCU 3 | 4 | **W806芯片参数** 5 | 6 | - 封装QFN56, 6mm x 6mm, pin间距0.35mm 7 | 8 | **MCU 特性** 9 | 10 | - 集成 32 位 XT804 处理器，工作频率 240MHz，内置 DSP、浮点运算单元与安全引擎 11 | - 内置 1MB Flash，288KB RAM 12 | - 集成 PSRAM 接口，支持最高 64MB 外置 PSRAM 存储器 13 | - 集成 6 路 UART 高速接口 14 | - 集成 4 路 16 比特 ADC，最高采样率 1KHz 15 | - 集成 1 个高速 SPI 接口（从接口），支持最高 50MHz 16 | - 集成一个主/从 SPI 接口 17 | - 集成 1 个 SDIO_HOST 接口，支持 SDIO2.0、SDHC、MMC4.2 18 | - 集成 1 个 SDIO_DEVICE，支持 SDIO2.0，最高吞吐率 200Mbps 19 | - 集成 1 个 I2C 控制器 20 | - 集成 GPIO 控制器，最多支持 44 个 GPIO 21 | - 集成 5 路 PWM 接口 22 | - 集成 1 路 Duplex I2S 控制器 23 | - 集成 LCD 控制器，支持 4x32 接口 24 | - 集成 1 个 7816 接口 25 | - 集成 15 个 Touch Sensor 26 | 27 | **供电** 28 | 29 | - 3.3V 单电源供电 30 | - 支持工作、睡眠、待机、关机工作模式 31 | - 待机功耗小于 10uA 32 | 33 | ## w80x_duino开发板Arduino IDE支持包安装 34 | 35 | 1、**文件->首选项** 36 | 37 | 2、在附加开发板管理器网址输入如下网址： 38 | 39 | > https://cdn.jsdelivr.net/gh/Hi-LinkDuino/w80x_arduino/package_w80x_proxy_index.json 40 | > 41 | > **如果这个不行请使用这个链接地址** 42 | 43 | > https://cdn.jsdelivr.net/gh/Hi-LinkDuino/w80x_arduino/package_w80x_index.json 44 | 45 | ![](./doc/option_zh.png) 46 | 47 | 3、**工具->开发板->开发板管理** 48 | 搜索**w80x_duino**,选择最新版本安装（如果搜索不到，请安装arduino IDE1.8.15以上） 49 | 50 | ![board_manage_zh](./doc/board_manager_zh.png) 51 | 52 | 4、**工具->开发板** 53 | ![](./doc/board_chioce.png) 54 | 55 | 代表w80x_duino开发环境搭建完成 56 | 57 | 5、**上传** 58 | 上传的过程忠按提示按主板上的复位键即可下载 59 | 60 | ## w80x_duino开发计划 61 | 打勾的代表已经实现并验证，没有打勾的代表正在开发中，期待更多开发者一起维护 62 | 63 | - [x] [支持arduino ide开发基于w806的官方SDK API调用开发](https://github.com/Hi-LinkDuino/w80x_arduino/tree/v0.0.1) 64 | - [x] [GPIO适配](https://github.com/Hi-LinkDuino/w80x_arduino/commit/53fb7892e041c1e37913b0c73fd1abaf5970a111) 65 | - [ ] [Serial适配]() 66 | - [x] [ADC适配](https://github.com/Hi-LinkDuino/w80x_arduino/pull/10) 67 | - [x] [PWM适配](https://github.com/Hi-LinkDuino/w80x_arduino/commit/8de553ff1431182d11d7fec1267ff2efeb1d84c9) 68 | - [ ] [timer适配]() 69 | - [ ] [I2C适配]() 70 | - [ ] [SPI适配]() 71 | - [ ] [flash模拟eerom操作适配]() 72 | 73 | ### 说明 74 | 由于此芯片为平头哥新架构，工具链和各种工具几乎是全新的，所有arduino标准接口都得全部适配。工作量还是挺大。 75 | 大家使用有问题，直接提[issue](https://github.com/Hi-LinkDuino/w80x_arduino/issues) 76 | 欢迎开发者协同开发提交commit，本项目会持续更新。 77 | 78 | ## 致谢 79 | - Hi-Link海凌科开发生产了此开发板 80 | - 此开源项目由[nulllab空想实验室](https://github.com/nulllaborg)团队维护，并得到联盛德官方捐赠 81 | -------------------------------------------------------------------------------- /boards.txt: -------------------------------------------------------------------------------- 1 | # See: http://code.google.com/p/arduino/wiki/Platforms 2 | 3 | menu.cpu_frq=CPU Frequency 4 | menu.cpu_variant=CPU 5 | menu.upload_speed=Upload Speed 6 | menu.erase=Erase Flash 7 | #menu.os_variant=OS 8 | 9 | ############################################################## 10 | 11 | w80x.name=w80x_duino 12 | w80x.upload.tool=serial_upload 13 | w80x.upload.protocol=xmodem 14 | w80x.upload.maximum_size=1048576 15 | w80x.upload.maximum_data_size=294912 16 | w80x.build.mcu=ck804ef 17 | w80x.build.board=HLK_w80x 18 | #w80x.build.core=w806 19 | w80x.build.mcpu=ck804ef 20 | 21 | ############################################################## 22 | # CPU Frequency 23 | w80x.menu.cpu_frq.240MHZ=240MHZ 24 | w80x.menu.cpu_frq.240MHZ.build.f_cpu=240000000 25 | w80x.menu.cpu_frq.160MHZ=160MHZ 26 | w80x.menu.cpu_frq.160MHZ.build.f_cpu=160000000 27 | w80x.menu.cpu_frq.80MHZ=80MHZ 28 | w80x.menu.cpu_frq.80MHZ.build.f_cpu=80000000 29 | w80x.menu.cpu_frq.40MHZ=40MHZ 30 | w80x.menu.cpu_frq.40MHZ.build.f_cpu=40000000 31 | w80x.menu.cpu_frq.2MHZ=2MHZ 32 | w80x.menu.cpu_frq.2MHZ.build.f_cpu=2000000 33 | 34 | ############################################################## 35 | # CPU variant 36 | w80x.menu.cpu_variant.w806=w806 37 | w80x.menu.cpu_variant.w806.build.variant=w806 38 | w80x.menu.cpu_variant.w806.build.core=w806 39 | w80x.menu.cpu_variant.w805=w805 40 | w80x.menu.cpu_variant.w805.build.variant=w805 41 | w80x.menu.cpu_variant.w806.build.core=w806 42 | 43 | # Upload Speed 44 | w80x.menu.upload_speed.baud115200=115200 45 | w80x.menu.upload_speed.baud115200.upload.speed=115200 46 | w80x.menu.upload_speed.baud460800=460800 47 | w80x.menu.upload_speed.baud460800.upload.speed=460800 48 | w80x.menu.upload_speed.baud921600=921600 49 | w80x.menu.upload_speed.baud921600.upload.speed=921600 50 | w80x.menu.upload_speed.baud1000000=1000000 51 | w80x.menu.upload_speed.baud1000000.upload.speed=1000000 52 | w80x.menu.upload_speed.baud2000000=2000000 53 | w80x.menu.upload_speed.baud2000000.upload.speed=2000000 54 | 55 | # Erase Flash 56 | w80x.menu.erase.yes=erase all flash 57 | w80x.menu.erase.yes.erase.flash=all 58 | w80x.menu.erase.no=no erase 59 | w80x.menu.erase.no.erase.flash=none 60 | ############################################################## 61 | -------------------------------------------------------------------------------- /cores/w806/Arduino.h: -------------------------------------------------------------------------------- 1 | /* 2 | Arduino.h - Main include file for the Arduino SDK 3 | Copyright (c) 2005-2013 Arduino Team. All right reserved. 4 | 5 | This library is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU Lesser General Public 7 | License as published by the Free Software Foundation; either 8 | version 2.1 of the License, or (at your option) any later version. 9 | 10 | This library is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 | Lesser General Public License for more details. 14 | 15 | You should have received a copy of the GNU Lesser General Public 16 | License along with this library; if not, write to the Free Software 17 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 | */ 19 | 20 | 21 | #ifndef Arduino_h 22 | #define Arduino_h 23 | 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include "pins_arduino.h" 31 | #include "./include/driver/wm_hal.h" 32 | 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | //Macro-based digital IO fucntions 39 | //#include "wiring_digita.h" 40 | 41 | //!!!!#include "binary.h" 42 | 43 | // FIXME: workarounds for missing features or unimplemented functions 44 | // cancel out the PROGMEM attribute - used only for atmel CPUs 45 | #define PROGMEM 46 | void yield(void); 47 | 48 | // we use pre-defined IRQ function the way wiring does 49 | #define WIRING 50 | 51 | #define HIGH 0x1 52 | #define LOW 0x0 53 | 54 | #define INPUT 0x0 55 | #define OUTPUT 0x1 56 | #define INPUT_PULLUP 0x2 57 | #define OUTPUT_OD 0x03 58 | #define INPUT_PULLDOWN 0x4 59 | #define ANALOG_INPUT 0x5 60 | #define PWM_OUT 0x6 61 | 62 | #define PIN_IDLE 0xff 63 | 64 | // undefine mathlib's pi if encountered 65 | #ifdef PI 66 | #undef PI 67 | #endif 68 | #ifdef HALF_PI 69 | #undef HALF_PI 70 | #endif 71 | #ifdef TWO_PI 72 | #undef TWO_PI 73 | #endif 74 | 75 | #define PI 3.1415926535897932384626433832795 76 | #define HALF_PI 1.5707963267948966192313216916398 77 | #define TWO_PI 6.283185307179586476925286766559 78 | #define DEG_TO_RAD 0.017453292519943295769236907684886 79 | #define RAD_TO_DEG 57.295779513082320876798154814105 80 | #define EULER 2.718281828459045235360287471352 81 | 82 | #define SERIAL 0x0 83 | #define DISPLAY 0x1 84 | 85 | #define LSBFIRST 0 86 | #define MSBFIRST 1 87 | 88 | #define FALLING 1 89 | 90 | /* 91 | #define INTERNAL1V1 2 92 | #define INTERNAL2V56 3 93 | #define INTERNAL 3 94 | #define DEFAULT 1 95 | #define EXTERNAL 0 96 | */ 97 | 98 | // undefine stdlib's abs if encountered 99 | #ifdef abs 100 | #undef abs 101 | #endif 102 | 103 | #define min(a,b) ((a)<(b)?(a):(b)) 104 | #define max(a,b) ((a)>(b)?(a):(b)) 105 | #define abs(x) ((x)>0?(x):-(x)) 106 | #define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt))) 107 | #define round(x) ((x)>=0?(long)((x)+0.5):(long)((x)-0.5)) 108 | #define radians(deg) ((deg)*DEG_TO_RAD) 109 | #define degrees(rad) ((rad)*RAD_TO_DEG) 110 | #define sq(x) ((x)*(x)) 111 | 112 | #define interrupts() sei() 113 | #define noInterrupts() cli() 114 | 115 | #define clockCyclesPerMicrosecond() ( F_CPU / 1000000L ) 116 | #define clockCyclesPerMillisecond() ( F_CPU / 1000L ) 117 | #define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() ) 118 | #define microsecondsToClockCycles(a) ( (a) * clockCyclesPerMicrosecond() ) 119 | 120 | #define byte(w) ((uint8_t)(w)) 121 | #define lowByte(w) ((uint8_t) ((w) & 0xff)) 122 | #define highByte(w) ((uint8_t) ((w) >> 8)) 123 | 124 | #define bitRead(value, bit) (((value) >> (bit)) & 0x01) 125 | #define bitSet(value, bit) ((value) |= (1UL << (bit))) 126 | #define bitClear(value, bit) ((value) &= ~(1UL << (bit))) 127 | #define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit)) 128 | 129 | #define maskSet(value, mask) ((value) |= (mask)) 130 | #define maskClear(value, mask) ((value) &= ~(mask)) 131 | 132 | 133 | // avr-libc defines _NOP() since 1.6.2 134 | #ifndef _NOP 135 | //#define _NOP() do { __asm__ volatile ("nop"); } while (0) 136 | #endif 137 | 138 | #define BEGIN_CRITICAL __critical { 139 | #define END_CRITICAL } 140 | 141 | 142 | typedef unsigned int word; 143 | 144 | #define bit(b) (1UL << (b)) 145 | 146 | typedef unsigned char boolean; 147 | typedef unsigned char byte; 148 | //typedef uint8_t byte; 149 | 150 | void init(void); 151 | //void initVariant(void); // weak 152 | 153 | //int atexit(void (*func)()); // __attribute__((weak)); 154 | //void serialEvent(void); // weak 155 | //extern unsigned char runSerialEvent; 156 | 157 | void pinMode(uint8_t pin, uint8_t mode); 158 | void digitalWrite(uint8_t pin, uint8_t val); 159 | 160 | uint8_t digitalRead(uint8_t pin); 161 | 162 | #define ADC8BIT 0x01 163 | #define ADC16BIT 0x02 164 | 165 | void analogReadResolution(uint8_t); 166 | int analogRead(uint8_t pin); 167 | 168 | void analogWrite(uint32_t pin, uint32_t val); 169 | //uint32_t millis(void); 170 | //uint32_t micros(void); 171 | //void delay(uint32_t ms); 172 | #define millis HAL_GetTick 173 | #define micros HAL_Get_Micros 174 | #define delay(ms) HAL_Delay(ms) 175 | 176 | void delayMicroseconds(uint32_t us); 177 | //unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout); 178 | //unsigned long pulseInLong(uint8_t pin, uint8_t state, unsigned long timeout); 179 | 180 | //void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t val); 181 | //uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder); 182 | 183 | //void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), __xdata uint8_t mode); 184 | //void detachInterrupt(uint8_t interruptNum); 185 | 186 | void setup(void); 187 | void loop(void); 188 | 189 | #ifdef __cplusplus 190 | } 191 | #endif 192 | #endif 193 | 194 | 195 | -------------------------------------------------------------------------------- /cores/w806/WInterrupts.c: -------------------------------------------------------------------------------- 1 | #include "wm_hal.h" 2 | 3 | #define readl(addr) ({unsigned int __v = (*(volatile unsigned int *) (addr)); __v;}) 4 | __attribute__((isr)) void CORET_IRQHandler(void) 5 | { 6 | readl(0xE000E010); 7 | HAL_IncTick(); 8 | } 9 | __attribute__((isr)) void GPIOA_IRQHandler(void) 10 | { 11 | HAL_GPIO_EXTI_IRQHandler(GPIOA, GPIO_PIN_0); 12 | } 13 | 14 | __attribute__((isr)) void GPIOB_IRQHandler(void) 15 | { 16 | HAL_GPIO_EXTI_IRQHandler(GPIOB, GPIO_PIN_5); 17 | } 18 | -------------------------------------------------------------------------------- /cores/w806/WInterrupts.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_IT_H__ 2 | #define __WM_IT_H__ 3 | #ifdef __cplusplus 4 | extern "C" { 5 | #endif 6 | void CORET_IRQHandler(void); 7 | void GPIOA_IRQHandler(void); 8 | void GPIOB_IRQHandler(void); 9 | void UART0_IRQHandler(void); 10 | void UART1_IRQHandler(void); 11 | void UART2_4_IRQHandler(void); 12 | void WDG_IRQHandler(void); 13 | void TIM0_5_IRQHandler(void); 14 | void ADC_IRQHandler(void); 15 | void PMU_IRQHandler(void); 16 | void TOUCH_IRQHandler(void); 17 | #ifdef __cplusplus 18 | } 19 | #endif 20 | #endif -------------------------------------------------------------------------------- /cores/w806/include/arch/xt804/csi_config.h: -------------------------------------------------------------------------------- 1 | #ifndef __CSI_CONFIG_H__ 2 | #define __CSI_CONFIG_H__ 3 | 4 | #ifdef __cplusplus 5 | extern "C" { 6 | #endif 7 | 8 | #define CONFIG_CHIP_SL04 1 9 | #define CONFIG_KERNEL_NONE 1 10 | #define CONFIG_HAVE_VIC 1 11 | #define CONFIG_SEPARATE_IRQ_SP 1 12 | #define CONFIG_ARCH_INTERRUPTSTACK 4096 13 | #define CONFIG_IRQ_VECTOR_SIZE 256 14 | #define USE_UART0_PRINT 1 15 | 16 | #ifdef CONFIG_KERNEL_NONE 17 | #define CONFIG_SYSTEM_SECURE 1 18 | #endif 19 | 20 | #ifdef __cplusplus 21 | } 22 | #endif 23 | 24 | #endif 25 | -------------------------------------------------------------------------------- /cores/w806/include/arch/xt804/csi_core/csi_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /****************************************************************************** 18 | * @file csi_core.h 19 | * @brief CSI Core Layer Header File 20 | * @version V1.0 21 | * @date 02. June 2017 22 | ******************************************************************************/ 23 | 24 | #ifndef _CORE_H_ 25 | #define _CORE_H_ 26 | 27 | #include 28 | 29 | #if defined(__CK801__) || defined(__E801__) 30 | #include 31 | #elif defined(__CK802__) || defined(__E802__) || defined(__S802__) 32 | #include 33 | #elif defined(__E803__) || defined(__S803__) 34 | #include 35 | #elif defined(__CK803__) || defined(__CK804__) || defined(__E804__) || defined(__E804D__) || defined(__E804F__) || defined (__E804DF__) 36 | #include 37 | #elif defined(__CK805__) || defined(__I805__) || defined(__I805F__) 38 | #include 39 | #elif defined(__CK610__) 40 | #include 41 | #elif defined(__CK810__) || defined(__C810__) || defined(__C810V__) 42 | #include 43 | #elif defined(__CK807__) || defined(__C807__) || defined(__C807F__) || defined(__C807FV__) 44 | #include 45 | #elif defined(__riscv) 46 | #include 47 | #endif 48 | 49 | #ifdef __riscv 50 | #include 51 | #else 52 | #include 53 | #endif 54 | 55 | #ifdef __cplusplus 56 | extern "C" { 57 | #endif 58 | 59 | #ifdef __cplusplus 60 | } 61 | #endif 62 | 63 | #endif /* _CORE_H_ */ 64 | -------------------------------------------------------------------------------- /cores/w806/include/arch/xt804/csi_dsp/csky_const_structs.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file csky_const_structs.h 3 | * @brief This file has constant structs that are initialized for 4 | * user convenience. For example, some can be given as 5 | * arguments to the csky_cfft_f32() function. 6 | * @version V1.0 7 | * @date 20. Dec 2016 8 | ******************************************************************************/ 9 | /* --------------------------------------------------------------------------- 10 | * Copyright (C) 2016 CSKY Limited. All rights reserved. 11 | * 12 | * Redistribution and use of this software in source and binary forms, 13 | * with or without modification, are permitted provided that the following 14 | * conditions are met: 15 | * * Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * * Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * * Neither the name of CSKY Ltd. nor the names of CSKY's contributors may 21 | * be used to endorse or promote products derived from this software without 22 | * specific prior written permission of CSKY Ltd. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 29 | * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 | * THE POSSIBILITY OF SUCH DAMAGE. 35 | * -------------------------------------------------------------------------- */ 36 | 37 | #ifndef _CSKY_CONST_STRUCTS_H 38 | #define _CSKY_CONST_STRUCTS_H 39 | 40 | #include "csky_math.h" 41 | #include "csky_common_tables.h" 42 | 43 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len16; 44 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len32; 45 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len64; 46 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len128; 47 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len256; 48 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len512; 49 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len1024; 50 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len2048; 51 | extern const csky_cfft_instance_f32 csky_cfft_sR_f32_len4096; 52 | 53 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len16; 54 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len32; 55 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len64; 56 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len128; 57 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len256; 58 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len512; 59 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len1024; 60 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len2048; 61 | extern const csky_cfft_instance_q31 csky_cfft_sR_q31_len4096; 62 | 63 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len16; 64 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len32; 65 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len64; 66 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len128; 67 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len256; 68 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len512; 69 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len1024; 70 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len2048; 71 | extern const csky_cfft_instance_q15 csky_cfft_sR_q15_len4096; 72 | 73 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len32; 74 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len64; 75 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len128; 76 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len256; 77 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len512; 78 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len1024; 79 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len2048; 80 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len4096; 81 | extern csky_rfft_instance_q15 csky_rfft_sR_q15_len8192; 82 | 83 | 84 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len32; 85 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len64; 86 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len128; 87 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len256; 88 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len512; 89 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len1024; 90 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len2048; 91 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len4096; 92 | extern csky_rfft_instance_q15 csky_inv_rfft_sR_q15_len8192; 93 | 94 | 95 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len32; 96 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len64; 97 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len128; 98 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len256; 99 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len512; 100 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len1024; 101 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len2048; 102 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len4096; 103 | extern csky_rfft_instance_q31 csky_rfft_sR_q31_len8192; 104 | 105 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len32; 106 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len64; 107 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len128; 108 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len256; 109 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len512; 110 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len1024; 111 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len2048; 112 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len4096; 113 | extern csky_rfft_instance_q31 csky_inv_rfft_sR_q31_len8192; 114 | 115 | 116 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len32; 117 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len64; 118 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len128; 119 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len256; 120 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len512; 121 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len1024; 122 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len2048; 123 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len4096; 124 | extern csky_rfft_fast_instance_f32 csky_rfft_sR_f32_len8192; 125 | 126 | extern csky_dct4_instance_q15 csky_dct4_sR_q15_len128; 127 | extern csky_dct4_instance_q15 csky_dct4_sR_q15_len512; 128 | extern csky_dct4_instance_q15 csky_dct4_sR_q15_len2048; 129 | extern csky_dct4_instance_q15 csky_dct4_sR_q15_len8192; 130 | 131 | extern csky_dct4_instance_q31 csky_dct4_sR_q31_len128; 132 | extern csky_dct4_instance_q31 csky_dct4_sR_q31_len512; 133 | extern csky_dct4_instance_q31 csky_dct4_sR_q31_len2048; 134 | extern csky_dct4_instance_q31 csky_dct4_sR_q31_len8192; 135 | 136 | extern csky_dct4_instance_f32 csky_dct4_sR_f32_len128; 137 | extern csky_dct4_instance_f32 csky_dct4_sR_f32_len512; 138 | extern csky_dct4_instance_f32 csky_dct4_sR_f32_len2048; 139 | extern csky_dct4_instance_f32 csky_dct4_sR_f32_len8192; 140 | #endif 141 | -------------------------------------------------------------------------------- /cores/w806/include/arch/xt804/csi_dsp/csky_vdsp2_const_structs.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file csky_vdsp2_const_structs.h 3 | * @brief This file has constant structs that are initialized for 4 | * user convenience. For example, some can be given as 5 | * arguments to the csky_vdsp2_cfft_f32() function. 6 | * @version V1.0 7 | * @date 20. Dec 2016 8 | ******************************************************************************/ 9 | /* --------------------------------------------------------------------------- 10 | * Copyright (C) 2016 CSKY Limited. All rights reserved. 11 | * 12 | * Redistribution and use of this software in source and binary forms, 13 | * with or without modification, are permitted provided that the following 14 | * conditions are met: 15 | * * Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * * Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * * Neither the name of CSKY Ltd. nor the names of CSKY's contributors may 21 | * be used to endorse or promote products derived from this software without 22 | * specific prior written permission of CSKY Ltd. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 29 | * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 | * THE POSSIBILITY OF SUCH DAMAGE. 35 | * -------------------------------------------------------------------------- */ 36 | 37 | #ifndef _CSKY_CONST_STRUCTS_H 38 | #define _CSKY_CONST_STRUCTS_H 39 | 40 | #include "csky_vdsp2_math.h" 41 | #include "csky_common_tables.h" 42 | 43 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len16; 44 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len32; 45 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len64; 46 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len128; 47 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len256; 48 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len512; 49 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len1024; 50 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len2048; 51 | extern const csky_vdsp2_cfft_instance_f32 csky_vdsp2_cfft_sR_f32_len4096; 52 | 53 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len16; 54 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len32; 55 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len64; 56 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len128; 57 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len256; 58 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len512; 59 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len1024; 60 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len2048; 61 | extern const csky_vdsp2_cfft_instance_q31 csky_vdsp2_cfft_sR_q31_len4096; 62 | 63 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len16; 64 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len32; 65 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len64; 66 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len128; 67 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len256; 68 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len512; 69 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len1024; 70 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len2048; 71 | extern const csky_vdsp2_cfft_instance_q15 csky_vdsp2_cfft_sR_q15_len4096; 72 | 73 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len32; 74 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len64; 75 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len128; 76 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len256; 77 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len512; 78 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len1024; 79 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len2048; 80 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len4096; 81 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_rfft_sR_q15_len8192; 82 | 83 | 84 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len32; 85 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len64; 86 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len128; 87 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len256; 88 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len512; 89 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len1024; 90 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len2048; 91 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len4096; 92 | extern csky_vdsp2_rfft_instance_q15 csky_vdsp2_inv_rfft_sR_q15_len8192; 93 | 94 | 95 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len32; 96 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len64; 97 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len128; 98 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len256; 99 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len512; 100 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len1024; 101 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len2048; 102 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len4096; 103 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_rfft_sR_q31_len8192; 104 | 105 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len32; 106 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len64; 107 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len128; 108 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len256; 109 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len512; 110 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len1024; 111 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len2048; 112 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len4096; 113 | extern csky_vdsp2_rfft_instance_q31 csky_vdsp2_inv_rfft_sR_q31_len8192; 114 | 115 | 116 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len32; 117 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len64; 118 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len128; 119 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len256; 120 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len512; 121 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len1024; 122 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len2048; 123 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len4096; 124 | extern csky_vdsp2_rfft_fast_instance_f32 csky_vdsp2_rfft_sR_f32_len8192; 125 | 126 | extern csky_vdsp2_dct4_instance_q15 csky_vdsp2_dct4_sR_q15_len128; 127 | extern csky_vdsp2_dct4_instance_q15 csky_vdsp2_dct4_sR_q15_len512; 128 | extern csky_vdsp2_dct4_instance_q15 csky_vdsp2_dct4_sR_q15_len2048; 129 | extern csky_vdsp2_dct4_instance_q15 csky_vdsp2_dct4_sR_q15_len8192; 130 | 131 | extern csky_vdsp2_dct4_instance_q31 csky_vdsp2_dct4_sR_q31_len128; 132 | extern csky_vdsp2_dct4_instance_q31 csky_vdsp2_dct4_sR_q31_len512; 133 | extern csky_vdsp2_dct4_instance_q31 csky_vdsp2_dct4_sR_q31_len2048; 134 | extern csky_vdsp2_dct4_instance_q31 csky_vdsp2_dct4_sR_q31_len8192; 135 | 136 | extern csky_vdsp2_dct4_instance_f32 csky_vdsp2_dct4_sR_f32_len128; 137 | extern csky_vdsp2_dct4_instance_f32 csky_vdsp2_dct4_sR_f32_len512; 138 | extern csky_vdsp2_dct4_instance_f32 csky_vdsp2_dct4_sR_f32_len2048; 139 | extern csky_vdsp2_dct4_instance_f32 csky_vdsp2_dct4_sR_f32_len8192; 140 | #endif 141 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_adc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/include/driver/wm_adc.h -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_cpu.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file wm_cpu.h 3 | * 4 | * @brief cpu driver module 5 | * 6 | * @author dave 7 | * 8 | * @copyright (c) 2014 Winner Microelectronics Co., Ltd. 9 | */ 10 | #ifndef __WM_CPU_H__ 11 | #define __WM_CPU_H__ 12 | 13 | #include "wm_hal.h" 14 | 15 | 16 | #ifdef __cplusplus 17 | extern "C" { 18 | #endif 19 | 20 | /**BASE PLL CLOCK*/ 21 | #define W805_PLL_CLK_MHZ (480) 22 | 23 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U) 24 | 25 | enum CPU_CLK{ 26 | CPU_CLK_240M = 2, 27 | CPU_CLK_160M = 3, 28 | CPU_CLK_80M = 6, 29 | CPU_CLK_40M = 12, 30 | CPU_CLK_2M = 240, 31 | }; 32 | 33 | typedef union { 34 | struct { 35 | uint32_t CPU: 8; /*!< bit: 0.. 7 cpu clock divider */ 36 | uint32_t WLAN: 8; /*!< bit: 8.. 15 Wlan clock divider */ 37 | uint32_t BUS2: 8; /*!< bit: 16.. 23 clock dividing ratio of bus2 & bus1 */ 38 | uint32_t PD: 4; /*!< bit: 24.. 27 peripheral divider */ 39 | uint32_t RSV: 3; /*!< bit: 28.. 30 Reserved */ 40 | uint32_t DIV_EN: 1; /*!< bit: 31 divide frequency enable */ 41 | } b; 42 | uint32_t w; 43 | } clk_div_reg; 44 | 45 | #define UNIT_MHZ (1000000) 46 | 47 | 48 | typedef struct{ 49 | uint32_t apbclk; 50 | uint32_t cpuclk; 51 | uint32_t wlanclk; 52 | }wm_sys_clk; 53 | 54 | typedef enum 55 | { 56 | HAL_TICK_FREQ_10HZ = 10, 57 | HAL_TICK_FREQ_100HZ = 100, 58 | HAL_TICK_FREQ_1KHZ = 1000, 59 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ 60 | } HAL_TickFreqTypeDef; 61 | 62 | 63 | void SystemClock_Config(uint32_t clk); 64 | void SystemClock_Get(wm_sys_clk *sysclk); 65 | 66 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority); 67 | void HAL_IncTick(void); 68 | uint32_t HAL_Get_Micros(void); 69 | uint32_t HAL_GetTick(void); 70 | void HAL_Delay(uint32_t Delay); 71 | 72 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t Priority); 73 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); 74 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); 75 | #ifdef __cplusplus 76 | } 77 | #endif 78 | 79 | #endif /* WM_CPU_H */ 80 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_gpio.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_GPIO_H__ 2 | #define __WM_GPIO_H__ 3 | 4 | #include "wm_hal.h" 5 | 6 | #ifdef __cplusplus 7 | extern "C" { 8 | #endif 9 | typedef struct 10 | { 11 | uint32_t Pin; 12 | uint32_t Mode; 13 | uint32_t Pull; 14 | } GPIO_InitTypeDef; 15 | 16 | typedef enum 17 | { 18 | GPIO_PIN_RESET = 0, 19 | GPIO_PIN_SET 20 | } GPIO_PinState; 21 | 22 | #define GPIOA ((GPIO_TypeDef *)GPIOA_BASE) 23 | #define GPIOB ((GPIO_TypeDef *)GPIOB_BASE) 24 | 25 | #define GPIO_PIN_0 ((uint32_t)0x00000001) 26 | #define GPIO_PIN_1 ((uint32_t)0x00000002) 27 | #define GPIO_PIN_2 ((uint32_t)0x00000004) 28 | #define GPIO_PIN_3 ((uint32_t)0x00000008) 29 | #define GPIO_PIN_4 ((uint32_t)0x00000010) 30 | #define GPIO_PIN_5 ((uint32_t)0x00000020) 31 | #define GPIO_PIN_6 ((uint32_t)0x00000040) 32 | #define GPIO_PIN_7 ((uint32_t)0x00000080) 33 | #define GPIO_PIN_8 ((uint32_t)0x00000100) 34 | #define GPIO_PIN_9 ((uint32_t)0x00000200) 35 | #define GPIO_PIN_10 ((uint32_t)0x00000400) 36 | #define GPIO_PIN_11 ((uint32_t)0x00000800) 37 | #define GPIO_PIN_12 ((uint32_t)0x00001000) 38 | #define GPIO_PIN_13 ((uint32_t)0x00002000) 39 | #define GPIO_PIN_14 ((uint32_t)0x00004000) 40 | #define GPIO_PIN_15 ((uint32_t)0x00008000) 41 | #define GPIO_PIN_16 ((uint32_t)0x00010000) 42 | #define GPIO_PIN_17 ((uint32_t)0x00020000) 43 | #define GPIO_PIN_18 ((uint32_t)0x00040000) 44 | #define GPIO_PIN_19 ((uint32_t)0x00080000) 45 | #define GPIO_PIN_20 ((uint32_t)0x00100000) 46 | #define GPIO_PIN_21 ((uint32_t)0x00200000) 47 | #define GPIO_PIN_22 ((uint32_t)0x00400000) 48 | #define GPIO_PIN_23 ((uint32_t)0x00800000) 49 | #define GPIO_PIN_24 ((uint32_t)0x01000000) 50 | #define GPIO_PIN_25 ((uint32_t)0x02000000) 51 | #define GPIO_PIN_26 ((uint32_t)0x04000000) 52 | #define GPIO_PIN_27 ((uint32_t)0x08000000) 53 | #define GPIO_PIN_28 ((uint32_t)0x10000000) 54 | #define GPIO_PIN_29 ((uint32_t)0x20000000) 55 | #define GPIO_PIN_30 ((uint32_t)0x40000000) 56 | #define GPIO_PIN_31 ((uint32_t)0x80000000) 57 | #define GPIO_PIN_ALL ((uint32_t)0xFFFFFFFF) 58 | 59 | #define GPIO_PIN_MASK 0xFFFFFFFF 60 | 61 | #define GPIO_MODE_INPUT 0x01 62 | #define GPIO_MODE_OUTPUT 0x02 63 | 64 | #define GPIO_MODE_IT_RISING 0x87 65 | #define GPIO_MODE_IT_FALLING 0x88 66 | #define GPIO_MODE_IT_RISING_FALLING 0x89 67 | #define GPIO_MODE_IT_HIGH_LEVEL 0x8a 68 | #define GPIO_MODE_IT_LOW_LEVEL 0x8b 69 | 70 | #define GPIO_NOPULL 0x12 71 | #define GPIO_PULLUP 0x13 72 | #define GPIO_PULLDOWN 0x14 73 | 74 | 75 | /** option 1 of the io */ 76 | #define WM_IO_OPTION1 1 77 | /** option 2 of the io */ 78 | #define WM_IO_OPTION2 2 79 | /** option 3 of the io */ 80 | #define WM_IO_OPTION3 3 81 | /** option 4 of the io */ 82 | #define WM_IO_OPTION4 4 83 | /** option 5 of the io */ 84 | #define WM_IO_OPTION5 5 85 | /** option 6 of the io */ 86 | #define WM_IO_OPTION6 6 87 | /** option 7 of the io */ 88 | #define WM_IO_OPTION7 7 89 | 90 | /* io option1 */ 91 | #define WM_IO_OPT1_I2C_DAT WM_IO_OPTION1 92 | #define WM_IO_OPT1_PWM1 WM_IO_OPTION1 93 | #define WM_IO_OPT1_PWM2 WM_IO_OPTION1 94 | #define WM_IO_OPT1_PWM3 WM_IO_OPTION1 95 | #define WM_IO_OPT1_PWM4 WM_IO_OPTION1 96 | #define WM_IO_OPT1_PWM5 WM_IO_OPTION1 97 | #define WM_IO_OPT1_UART0_RXD WM_IO_OPTION1 98 | #define WM_IO_OPT1_UART0_TXD WM_IO_OPTION1 99 | #define WM_IO_OPT1_PWM_BRAKE WM_IO_OPTION1 100 | #define WM_IO_OPT1_I2S_M_EXTCLK WM_IO_OPTION1 101 | #define WM_IO_OPT1_SPI_M_DO WM_IO_OPTION1 102 | #define WM_IO_OPT1_SPI_M_DI WM_IO_OPTION1 103 | #define WM_IO_OPT1_SPI_M_CS WM_IO_OPTION1 104 | #define WM_IO_OPT1_SPI_M_CK WM_IO_OPTION1 105 | #define WM_IO_OPT1_I2S_S_RL WM_IO_OPTION1 106 | #define WM_IO_OPT1_I2S_S_SCL WM_IO_OPTION1 107 | #define WM_IO_OPT1_I2S_S_SDA WM_IO_OPTION1 108 | #define WM_IO_OPT1_I2S_M_RL WM_IO_OPTION1 109 | #define WM_IO_OPT1_I2S_M_SCL WM_IO_OPTION1 110 | #define WM_IO_OPT1_I2S_M_SDA WM_IO_OPTION1 111 | #define WM_IO_OPT1_JTAG_RST WM_IO_OPTION1 112 | #define WM_IO_OPT1_JTAG_TDO WM_IO_OPTION1 113 | #define WM_IO_OPT1_JTAG_TDI WM_IO_OPTION1 114 | #define WM_IO_OPT1_JTAG_TCK_SWDCK WM_IO_OPTION1 115 | #define WM_IO_OPT1_JTAG_TMS_SWDAT WM_IO_OPTION1 116 | #define WM_IO_OPT1_UART1_RXD WM_IO_OPTION1 117 | #define WM_IO_OPT1_UART1_TXD WM_IO_OPTION1 118 | #define WM_IO_OPT1_UART1_RTS WM_IO_OPTION1 119 | #define WM_IO_OPT1_UART1_CTS WM_IO_OPTION1 120 | #define WM_IO_OPT1_SDIO_DAT WM_IO_OPTION1 121 | 122 | /* io option2 */ 123 | #define WM_IO_OPT2_PWM1 WM_IO_OPTION2 124 | #define WM_IO_OPT2_PWM2 WM_IO_OPTION2 125 | #define WM_IO_OPT2_PWM3 WM_IO_OPTION2 126 | #define WM_IO_OPT2_PWM4 WM_IO_OPTION2 127 | #define WM_IO_OPT2_PWM5 WM_IO_OPTION2 128 | #define WM_IO_OPT2_SPI_M_DO WM_IO_OPTION2 129 | #define WM_IO_OPT2_SPI_M_DI WM_IO_OPTION2 130 | #define WM_IO_OPT2_SPI_M_CS WM_IO_OPTION2 131 | #define WM_IO_OPT2_SPI_M_CK WM_IO_OPTION2 132 | #define WM_IO_OPT2_I2C_SCL WM_IO_OPTION2 133 | #define WM_IO_OPT2_I2S_M_EXTCLK WM_IO_OPTION2 134 | #define WM_IO_OPT2_UART1_RXD WM_IO_OPTION2 135 | #define WM_IO_OPT2_UART1_TXD WM_IO_OPTION2 136 | #define WM_IO_OPT2_UART1_RTS WM_IO_OPTION2 137 | #define WM_IO_OPT2_UART1_CTS WM_IO_OPTION2 138 | #define WM_IO_OPT2_I2C_DAT WM_IO_OPTION2 139 | #define WM_IO_OPT2_PWM_BRAKE WM_IO_OPTION2 140 | #define WM_IO_OPT2_UART0_RTS WM_IO_OPTION2 141 | #define WM_IO_OPT2_UART0_CTS WM_IO_OPTION2 142 | #define WM_IO_OPT2_SDIO_DAT WM_IO_OPTION2 143 | #define WM_IO_OPT2_HSPI_CK WM_IO_OPTION2 144 | #define WM_IO_OPT2_HSPI_INT WM_IO_OPTION2 145 | #define WM_IO_OPT2_HSPI_CS WM_IO_OPTION2 146 | #define WM_IO_OPT2_HSPI_DI WM_IO_OPTION2 147 | #define WM_IO_OPT2_HSPI_DO WM_IO_OPTION2 148 | 149 | /* io option3 */ 150 | #define WM_IO_OPT3_UART0_RXD WM_IO_OPTION3 151 | #define WM_IO_OPT3_UART0_TXD WM_IO_OPTION3 152 | #define WM_IO_OPT3_UART0_RTS WM_IO_OPTION3 153 | #define WM_IO_OPT3_UART0_CTS WM_IO_OPTION3 154 | #define WM_IO_OPT3_SPI_M_DO WM_IO_OPTION3 155 | #define WM_IO_OPT3_SPI_M_DI WM_IO_OPTION3 156 | #define WM_IO_OPT3_SPI_M_CS WM_IO_OPTION3 157 | #define WM_IO_OPT3_SDIO_CK WM_IO_OPTION3 158 | #define WM_IO_OPT3_SDIO_CMD WM_IO_OPTION3 159 | #define WM_IO_OPT3_SDIO_DAT WM_IO_OPTION3 160 | 161 | /* io option4 */ 162 | #define WM_IO_OPT4_I2S_M_MCLK WM_IO_OPTION4 163 | #define WM_IO_OPT4_I2S_M_RL WM_IO_OPTION4 164 | #define WM_IO_OPT4_I2S_M_SCL WM_IO_OPTION4 165 | #define WM_IO_OPT4_I2S_M_SDA WM_IO_OPTION4 166 | 167 | /* io option5 */ 168 | #define WM_IO_OPT5_GPIO WM_IO_OPTION5 169 | 170 | /* io option6 */ 171 | #define WM_IO_OPT6_ADC WM_IO_OPTION6 172 | #define WM_IO_OPT6_LCD_COM WM_IO_OPTION6 173 | #define WM_IO_OPT6_LCD_SEG WM_IO_OPTION6 174 | 175 | /* io option7 */ 176 | #define WM_IO_OPT7_TOUCH_SENSOR WM_IO_OPTION7 177 | 178 | 179 | #define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \ 180 | ((INSTANCE) == GPIOB)) 181 | 182 | #define IS_GPIO_AF_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE) 183 | 184 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) 185 | 186 | #define IS_GPIO_PIN(PIN) (((((uint32_t)PIN) & GPIO_PIN_MASK ) != 0x00u) && ((((uint32_t)PIN) & ~GPIO_PIN_MASK) == 0x00u)) 187 | 188 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ 189 | ((MODE) == GPIO_MODE_OUTPUT) ||\ 190 | ((MODE) == GPIO_MODE_IT_RISING) ||\ 191 | ((MODE) == GPIO_MODE_IT_FALLING) ||\ 192 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\ 193 | 194 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ 195 | ((PULL) == GPIO_PULLDOWN)) 196 | 197 | 198 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); 199 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 200 | void HAL_GPIO_Option(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, uint8_t GPIO_Opt); 201 | 202 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 203 | void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, GPIO_PinState PinState); 204 | void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 205 | void HAL_GPIO_EXTI_IRQHandler(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 206 | void HAL_GPIO_EXTI_Callback(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 207 | #ifdef __cplusplus 208 | } 209 | #endif 210 | 211 | #endif 212 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_hal.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_HAL_H__ 2 | #define __WM_HAL_H__ 3 | 4 | #include 5 | #include 6 | #include 7 | #include "../wm_type_def.h" 8 | #include "../wm_regs.h" 9 | #include "wm_cpu.h" 10 | #include "wm_gpio.h" 11 | #include "wm_gpio_ex.h" 12 | #include "wm_uart.h" 13 | #include "wm_rcc.h" 14 | #include "wm_spi.h" 15 | #include "wm_wdg.h" 16 | #include "wm_tim.h" 17 | #include "wm_internal_flash.h" 18 | #include "wm_adc.h" 19 | #include "wm_pwm.h" 20 | #include "wm_pmu.h" 21 | #include "wm_spi_flash.h" 22 | #include "wm_i2c.h" 23 | #include "wm_touch.h" 24 | #include "wm_lcd.h" 25 | 26 | 27 | #define VER "0.4.0" 28 | 29 | #define __HAL_LOCK(__HANDLE__) \ 30 | do{ \ 31 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 32 | { \ 33 | return HAL_BUSY; \ 34 | } \ 35 | else \ 36 | { \ 37 | (__HANDLE__)->Lock = HAL_LOCKED; \ 38 | } \ 39 | }while (0) 40 | 41 | #define __HAL_UNLOCK(__HANDLE__) \ 42 | do{ \ 43 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 44 | }while (0) 45 | #ifdef __cplusplus 46 | extern "C" { 47 | #endif 48 | 49 | 50 | HAL_StatusTypeDef HAL_Init(void); 51 | HAL_StatusTypeDef HAL_DeInit(void); 52 | void HAL_MspInit(void); 53 | void HAL_MspDeInit(void); 54 | 55 | #ifdef USE_FULL_ASSERT 56 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 57 | void assert_failed(uint8_t* file, uint32_t line); 58 | #else 59 | #define assert_param(expr) ((void)0U) 60 | #endif 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif 67 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_i2c.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_I2C_H__ 2 | #define __WM_I2C_H__ 3 | 4 | #include "wm_hal.h" 5 | 6 | 7 | #ifdef __cplusplus 8 | extern "C" { 9 | #endif 10 | 11 | typedef struct 12 | { 13 | GPIO_TypeDef *SCL_Port; 14 | uint32_t SCL_Pin; 15 | GPIO_TypeDef *SDA_Port; 16 | uint32_t SDA_Pin; 17 | } I2C_HandleTypeDef; 18 | 19 | #define I2C_SDA_H(HANDLE) HAL_GPIO_WritePin(HANDLE->SDA_Port, HANDLE->SDA_Pin, GPIO_PIN_SET) 20 | 21 | #define I2C_SDA_L(HANDLE) HAL_GPIO_WritePin(HANDLE->SDA_Port, HANDLE->SDA_Pin, GPIO_PIN_RESET) 22 | 23 | #define I2C_SCL_H(HANDLE) HAL_GPIO_WritePin(HANDLE->SCL_Port, HANDLE->SCL_Pin, GPIO_PIN_SET) 24 | 25 | #define I2C_SCL_L(HANDLE) HAL_GPIO_WritePin(HANDLE->SCL_Port, HANDLE->SCL_Pin, GPIO_PIN_RESET) 26 | 27 | #define I2C_SDA_OUT(HANDLE) SET_BIT(HANDLE->SDA_Port->DIR, HANDLE->SDA_Pin) 28 | 29 | #define I2C_SDA_IN(HANDLE) CLEAR_BIT(HANDLE->SDA_Port->DIR, HANDLE->SDA_Pin) 30 | 31 | #define I2C_SDA_GET(HANDLE) HAL_GPIO_ReadPin(HANDLE->SDA_Port, HANDLE->SDA_Pin) 32 | 33 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 34 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 35 | 36 | HAL_StatusTypeDef HAL_I2C_Write(I2C_HandleTypeDef *hi2c, uint8_t DevAddress, uint8_t MemAddress, uint8_t *pData, uint16_t Size); 37 | HAL_StatusTypeDef HAL_I2C_Read(I2C_HandleTypeDef *hi2c, uint8_t DevAddress, uint8_t MemAddress, uint8_t *pData, uint16_t Size); 38 | #ifdef __cplusplus 39 | } 40 | #endif 41 | 42 | #endif 43 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_internal_flash.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_INTERNAL_FLASH_H__ 2 | #define __WM_INTERNAL_FLASH_H__ 3 | 4 | #include "wm_hal.h" 5 | 6 | 7 | #ifdef __cplusplus 8 | extern "C" { 9 | #endif 10 | 11 | typedef struct 12 | { 13 | HAL_LockTypeDef Lock; 14 | 15 | } FLASH_ProcessTypeDef; 16 | 17 | typedef volatile unsigned char vu8; 18 | typedef volatile unsigned short vu16; 19 | typedef volatile unsigned long vu32; 20 | 21 | #define M32(adr) (*((vu32*) (adr))) 22 | 23 | #define FLASH ((FLASH_TypeDef *)FLASH_BASE) 24 | 25 | 26 | #define INSIDE_FLS_SECTOR_SIZE 0x1000 27 | #define INSIDE_FLS_PAGE_SIZE 256 28 | 29 | 30 | /******************************0x81FFFFF 31 | * USER PARAM 32 | * ****************************0x8XXXXXX 33 | * RUN IMAGE 34 | * ****************************0x8010400 35 | * RUN IMAGE HEADER 36 | * ****************************0x8010000 37 | * SECBOOT IMAGE 38 | * ****************************0x8002400 39 | * SECBOOT IMAGE HEAER 40 | * ****************************0x8002000 41 | * CHIP DATA 42 | * ****************************0x8000000*/ 43 | 44 | #define INSIDE_FLS_BASE_ADDR 0x8000000UL 45 | #define INSIDE_FLS_SECBOOT_ADDR (INSIDE_FLS_BASE_ADDR + 0x02000) 46 | #define INSIDE_FLS_IMAGE_ADDR (INSIDE_FLS_BASE_ADDR + 0x10000) 47 | #define INSIDE_FLS_END_ADDR (INSIDE_FLS_BASE_ADDR + 0x1FFFFF) 48 | 49 | enum TYPE_FLASH_ID{ 50 | SPIFLASH_MID_GD = 0xC8, 51 | SPIFLASH_MID_ESMT = 0x1C, 52 | SPIFLASH_MID_PUYA = 0x85, 53 | SPIFLASH_MID_WINBOND = 0xEF, 54 | SPIFLASH_MID_FUDANMICRO = 0xA1, 55 | SPIFLASH_MID_BOYA = 0x68, 56 | SPIFLASH_MID_XMC = 0x20, 57 | SPIFLASH_MID_XTX = 0x0B, 58 | SPIFLASH_MID_TSINGTENG = 0xEB, /*UNIGROUP TSINGTENG*/ 59 | }; 60 | 61 | typedef union { 62 | struct { 63 | uint32_t encrypt_en: 1; /*!< bit: 0 write encrypt flag */ 64 | uint32_t code_decrypt:1; /*!< bit: 1 read code from AHB decrypt flag */ 65 | uint32_t key_ready: 1; /*!< bit: 2 RO key ready flag */ 66 | uint32_t data_decrypt:1; /*!< bit: 3 read data from AHB or flash controller decrypt flag */ 67 | uint32_t key_sel: 1; /*!< bit: 4 key sel flag */ 68 | uint32_t _reserved0: 27; /*!< bit: 5.. 31 Reserved */ 69 | } b; /*!< Structure Access by bit */ 70 | uint32_t w; /*!< Type Access by whole register */ 71 | } FLASH_ENCRYPT_CTRL_Type; 72 | 73 | #define FLASH_HS 0x00000001 74 | 75 | /** Flash Keys */ 76 | #define RDPRT_KEY 0x5AA5 77 | #define FLASH_KEY1 0x57696E6E 78 | #define FLASH_KEY2 0x65724D69 79 | #define FLASH_KEY3 0x63726F21 80 | 81 | /** Flash Control Register definitions */ 82 | #define FLASH_PG 0x00000001 83 | #define FLASH_PER 0x00000002 84 | #define FLASH_MER 0x00000004 85 | #define FLASH_STRT 0x00000008 86 | #define FLASH_LOCK 0x00000020 87 | #define FLASH_ERRIE 0x00000040 88 | #define FLASH_EOPIE 0x00000080 89 | 90 | /** Flash Status Register definitions */ 91 | #define FLASH_BSY 0x00000001 92 | #define FLASH_PGERR 0x00000002 93 | #define FLASH_EOP 0x00000004 94 | 95 | #define FLS_PARAM_TYPE_ID (0) 96 | #define FLS_PARAM_TYPE_SIZE (1) 97 | #define FLS_PARAM_TYPE_PAGE_SIZE (2) 98 | #define FLS_PARAM_TYPE_PROG_SIZE (3) 99 | #define FLS_PARAM_TYPE_SECTOR_SIZE (4) 100 | 101 | #define FLS_FLAG_UNDER_PROTECT (1<<0) 102 | #define FLS_FLAG_FAST_READ (1<<1) 103 | #define FLS_FLAG_AAAI (1<<2) 104 | 105 | #define CMD_START_Pos 8U /*!< CMD start position */ 106 | #define CMD_START_Msk (1UL << CMD_START_Pos) /*!< CMD start Mask */ 107 | 108 | /** 109 | * @brief This function is used to unlock flash protect area [0x0~0x2000]. 110 | * 111 | * @param None 112 | * 113 | * @return None 114 | * 115 | * @note None 116 | */ 117 | int wm_flash_unlock(void); 118 | 119 | /** 120 | * @brief This function is used to lock flash protect area [0x0~0x2000]. 121 | * 122 | * @param None 123 | * 124 | * @return None 125 | * 126 | * @note None 127 | */ 128 | int wm_flash_lock(void); 129 | 130 | /** 131 | * @brief This function is used to read data from the flash. 132 | * 133 | * @param[in] addr Specifies the starting address to read from. 134 | * @param[in] buf Specified the address to save the readback data. 135 | * @param[in] len Specifies the length of the data to read. 136 | * 137 | * @retval TLS_FLS_STATUS_OK if read sucsess 138 | * @retval TLS_FLS_STATUS_EIO if read fail 139 | * 140 | * @note None 141 | */ 142 | HAL_StatusTypeDef HAL_FLASH_Read(uint32_t addr, uint8_t *buf, uint32_t len); 143 | 144 | /** 145 | * @brief This function is used to write data into the flash. 146 | * 147 | * @param[in] addr Specifies the starting address to write to 148 | * @param[in] buf Pointer to a byte array that is to be written 149 | * @param[in] len Specifies the length of the data to be written 150 | * 151 | * @retval TLS_FLS_STATUS_OK if write flash success 152 | * @retval TLS_FLS_STATUS_EPERM if flash struct point is null 153 | * @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed 154 | * @retval TLS_FLS_STATUS_EINVAL if argument is invalid 155 | * @retval TLS_FLS_STATUS_EIO if io error 156 | * 157 | * @note None 158 | */ 159 | HAL_StatusTypeDef HAL_FLASH_Write(uint32_t addr, uint8_t *buf, uint32_t len); 160 | 161 | #ifdef __cplusplus 162 | } 163 | #endif 164 | 165 | #endif 166 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_lcd.h: -------------------------------------------------------------------------------- 1 | /********************************************************************************* 2 | * @file wm_lcd.c 3 | * @author 杭州峰海科技有限公司 4 | * @version V1.0 5 | * @date 20211027 6 | * @brief linailiang 7 | * 8 | * Copyright (c) 2021 Hangzhou Fenghai Technology Co., Ltd. All rights reserved. 9 | *********************************************************************************/ 10 | 11 | #ifndef __WM_LCD_H 12 | #define __WM_LCD_H 13 | 14 | #ifdef __cplusplus 15 | extern "C" { 16 | #endif 17 | 18 | /***************************************************************************** 19 | * include 20 | */ 21 | #include 22 | #include "wm_hal.h" 23 | 24 | 25 | /***************************************************************************** 26 | * LCD Register Define 27 | */ 28 | #define LCD_RTC_CLK (32000UL) 29 | 30 | #define LCD_CR_EN_Pos (8) 31 | #define LCD_CR_PD_Pos (9) 32 | 33 | #define LCD_VDD_ON (1UL<<9) 34 | #define LCD_VDD_OFF (0UL<<9) 35 | #define LCD_EN (1UL<<8) 36 | 37 | #define LCD_BIAS_MASK (3UL<<6) 38 | #define LCD_BIAS_MASK_Pos (6) 39 | #define LCD_BIAS_ONEFOURTH (0UL<<6) 40 | #define LCD_BIAS_ONEHALF (1UL<<6) 41 | #define LCD_BIAS_ONETHIRD (2UL<<6) 42 | #define LCD_BIAS_STATIC (3UL<<6) 43 | 44 | #define LCD_VLCD_MASK (7UL<<3) 45 | #define LCD_VLCD_MASK_Pos (3) 46 | #define LCD_VLCD_27 (0UL<<3) 47 | #define LCD_VLCD_29 (1UL<<3) 48 | #define LCD_VLCD_31 (2UL<<3) 49 | #define LCD_VLCD_33 (3UL<<3) 50 | 51 | #define LCD_DUTY_MASK (7UL<<0) 52 | #define LCD_DUTY_MASK_Pos (0) 53 | #define LCD_DUTY_STATIC (0UL<<0) 54 | #define LCD_DUTY_ONEHALF (1UL<<0) 55 | #define LCD_DUTY_ONETHIRD (2UL<<0) 56 | #define LCD_DUTY_ONEFOURTH (3UL<<0) 57 | #define LCD_DUTY_ONEFIFTH (4UL<<0) 58 | #define LCD_DUTY_ONESIXTH (5UL<<0) 59 | #define LCD_DUTY_ONESEVENTH (6UL<<0) 60 | #define LCD_DUTY_ONEEIGHTH (7UL<<0) 61 | 62 | 63 | /***************************************************************************** 64 | * LCD typedef enum 65 | */ 66 | typedef enum 67 | { 68 | LCD_UNABLE = 0, /** */ 69 | LCD_ENABLE = 1, /** */ 70 | 71 | } LCD_StaDef; 72 | 73 | typedef enum 74 | { 75 | BIAS_STATIC = LCD_BIAS_STATIC, /** Static (2 levels) */ 76 | BIAS_ONEHALF = LCD_BIAS_ONEHALF, /** 1/2 Bias (3 levels) */ 77 | BIAS_ONETHIRD = LCD_BIAS_ONETHIRD, /** 1/3 Bias (4 levels) */ 78 | BIAS_ONEFOURTH = LCD_BIAS_ONEFOURTH,/** 1/4 Bias (4 levels) */ 79 | } LCD_BiasDef; 80 | 81 | typedef enum 82 | { 83 | VLCD27 = LCD_VLCD_27, /** VLCD 2.7v */ 84 | VLCD29 = LCD_VLCD_29, /** VLCD 2.9v */ 85 | VLCD31 = LCD_VLCD_31, /** VLCD 3.1v */ 86 | VLCD33 = LCD_VLCD_33, /** VLCD 3.3v */ 87 | } LCD_VlcdDef; 88 | 89 | typedef enum 90 | { 91 | DUTY_STATIC = LCD_DUTY_STATIC, /** Static (segments can be multiplexed with LCD_COM[0]) */ 92 | DUTY_ONEHALF = LCD_DUTY_ONEHALF, /** 1/2 Duty cycle (segments can be multiplexed with LCD_COM[0:1]) */ 93 | DUTY_ONETHIRD = LCD_DUTY_ONETHIRD, /** 1/3 Duty cycle (segments can be multiplexed with LCD_COM[0:2]) */ 94 | DUTY_ONEFOURTH = LCD_DUTY_ONEFOURTH, /** 1/4 Duty cycle (segments can be multiplexed with LCD_COM[0:3]) */ 95 | DUTY_ONEFIFTH = LCD_DUTY_ONEFIFTH, /** 1/5 Duty cycle (segments can be multiplexed with LCD_COM[0:4]) */ 96 | DUTY_ONESIXTH = LCD_DUTY_ONESIXTH, /** 1/6 Duty cycle (segments can be multiplexed with LCD_COM[0:5]) */ 97 | DUTY_ONESEVENTH = LCD_DUTY_ONESEVENTH,/** 1/7 Duty cycle (segments can be multiplexed with LCD_COM[0:6]) */ 98 | DUTY_ONEEIGHTH = LCD_DUTY_ONEEIGHTH, /** 1/8 Duty cycle (segments can be multiplexed with LCD_COM[0:7]) */ 99 | } LCD_DutyDef; 100 | 101 | typedef enum 102 | { 103 | LCD_RAM0 = 0, /** */ 104 | LCD_RAM1 = 1, /** */ 105 | LCD_RAM2 = 2, /** */ 106 | LCD_RAM3 = 3, /** */ 107 | LCD_RAM4 = 4, /** */ 108 | LCD_RAM5 = 5, /** */ 109 | LCD_RAM6 = 6, /** */ 110 | LCD_RAM7 = 7, /** */ 111 | } LCD_ComDef; 112 | 113 | 114 | /***************************************************************************** 115 | * LCD typedef struct 116 | */ 117 | typedef struct lcd_options 118 | { 119 | bool enable; /** */ 120 | LCD_BiasDef bias; /** Bias configuration */ 121 | LCD_DutyDef duty; /** Duty configuration */ 122 | LCD_VlcdDef vlcd; /** Vlcd configuration */ 123 | uint8_t com; /** com number */ 124 | uint16_t rate; /** Fresh rate configuration */ 125 | } lcd_options_t; 126 | 127 | 128 | /***************************************************************************** 129 | * LCD Driver APIs 130 | */ 131 | void HAL_LCD_Ratio(uint8_t comNum, uint16_t freq); 132 | void HAL_LCD_VlcdSet(LCD_VlcdDef vlcd); 133 | void HAL_LCD_DutySet(LCD_DutyDef duty); 134 | void HAL_LCD_BiasSet(LCD_BiasDef bias); 135 | void HAL_LCD_ComSegEnable(uint32_t com, uint32_t seg); 136 | void HAL_LCD_ShowSeg(LCD_ComDef com, uint32_t val); 137 | void HAL_LCD_DigitPower(LCD_StaDef status); 138 | void HAL_LCD_AnalogPower(LCD_StaDef status); 139 | 140 | 141 | /***************************************************************************** 142 | * LCD Init 143 | */ 144 | void HAL_LCD_Init(uint8_t comNum, uint32_t seg); 145 | 146 | 147 | 148 | 149 | 150 | #ifdef __cplusplus 151 | } 152 | #endif 153 | 154 | #endif 155 | 156 | 157 | 158 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_pmu.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_PMU_H__ 2 | #define __WM_PMU_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | 9 | typedef struct 10 | { 11 | uint8_t Year; /* This parameter must be a number between 0 and 99 */ 12 | 13 | uint8_t Month; /* This parameter must be a number between 1 and 12 */ 14 | 15 | uint8_t Date; /* This parameter must be a number between 1 and 31 */ 16 | 17 | uint8_t Hours; /* This parameter must be a number between 0 and 23 */ 18 | 19 | uint8_t Minutes; /* This parameter must be a number between 0 and 59 */ 20 | 21 | uint8_t Seconds; /* This parameter must be a number between 0 and 59 */ 22 | 23 | } RTC_TimeTypeDef; 24 | 25 | typedef struct 26 | { 27 | PMU_TypeDef *Instance; 28 | 29 | uint32_t ClkSource; /* This parameter can be a value of @ref PMU_ClkSource_Definitions */ 30 | 31 | } PMU_HandleTypeDef; 32 | 33 | #define PMU ((PMU_TypeDef *)PMU_BASE) 34 | 35 | // PMU_ClkSource_Definitions 36 | #define PMU_CLKSOURCE_32RC PMU_CR_32KRC_CAL_EN 37 | #define PMU_CLKSOURCE_32RCBYPASS PMU_CR_32KRCBYPASS 38 | 39 | #define IS_PMU_ALL_INSTANCE(INSTANCE) ((INSTANCE) == PMU) 40 | 41 | #define IS_PMU_TIMPERIOD(__PERIOD__) (((__PERIOD__) >= 0x0000) && ((__PERIOD__) <= 0x0FFFF)) 42 | 43 | #define IS_PMU_CLKSOURCE(SOURCE) (((SOURCE) == PMU_CR_32KRC_CAL_EN) || ((SOURCE) == PMU_CR_32KRCBYPASS)) 44 | #define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U) 45 | #define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59U) 46 | #define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59U) 47 | #define IS_RTC_YEAR(YEAR) ((YEAR) <= 99U) 48 | #define IS_RTC_MONTH(MONTH) (((MONTH) >= 1U) && ((MONTH) <= 12U)) 49 | #define IS_RTC_DATE(DATE) (((DATE) >= 1U) && ((DATE) <= 31U)) 50 | 51 | 52 | HAL_StatusTypeDef HAL_PMU_Init(PMU_HandleTypeDef *hpmu); 53 | 54 | HAL_StatusTypeDef HAL_PMU_DeInit(PMU_HandleTypeDef *hpmu); 55 | 56 | void HAL_PMU_MspInit(PMU_HandleTypeDef *hpmu); 57 | 58 | void HAL_PMU_MspDeInit(PMU_HandleTypeDef *hpmu); 59 | 60 | void HAL_PMU_Enter_Sleep(PMU_HandleTypeDef *hpmu); 61 | 62 | void HAL_PMU_Enter_Standby(PMU_HandleTypeDef *hpmu); 63 | 64 | HAL_StatusTypeDef HAL_PMU_TIMER0_Start(PMU_HandleTypeDef *hpmu, uint32_t Period); 65 | 66 | HAL_StatusTypeDef HAL_PMU_TIMER0_Stop(PMU_HandleTypeDef *hpmu); 67 | 68 | HAL_StatusTypeDef HAL_PMU_RTC_GetTime(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time); 69 | 70 | HAL_StatusTypeDef HAL_PMU_RTC_Start(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time); 71 | 72 | HAL_StatusTypeDef HAL_PMU_RTC_Stop(PMU_HandleTypeDef *hpmu); 73 | 74 | HAL_StatusTypeDef HAL_PMU_RTC_Alarm_Enable(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time); 75 | 76 | HAL_StatusTypeDef HAL_PMU_RTC_Alarm_Disable(PMU_HandleTypeDef *hpmu); 77 | 78 | void HAL_PMU_Tim0_Callback(PMU_HandleTypeDef *hpmu); 79 | 80 | void HAL_PMU_IO_Callback(PMU_HandleTypeDef *hpmu); 81 | 82 | void HAL_PMU_RTC_Callback(PMU_HandleTypeDef *hpmu); 83 | 84 | void HAL_PMU_IRQHandler(PMU_HandleTypeDef *hpmu); 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif 90 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_pwm.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_PWM_H__ 2 | #define __WM_PWM_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | typedef struct 9 | { 10 | uint32_t Prescaler; /* Specifies the prescaler value used to divide the PWM clock(40MHz). 11 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 12 | 13 | uint32_t CounterMode; /* Specifies the counter mode. 14 | This parameter can be a value of @ref PWM_Counter_Mode */ 15 | 16 | uint32_t Period; /* Specifies the period value to be loaded into the PERIOD 17 | Register at the next update event. 18 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF. */ 19 | 20 | uint32_t Pulse; /* Specifies the pulse value to be loaded into the Compare Register. 21 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 22 | 23 | uint32_t AutoReloadPreload; /* Specifies the auto-reload preload. 24 | This parameter can be a value of @ref TIM_AutoReloadPreload */ 25 | 26 | uint32_t OutMode; /* Specifies the output mode. 27 | This parameter can be a value of @ref PWM_Out_Mode*/ 28 | 29 | uint32_t OutInverse; /* Specifies the output polarity. 30 | This parameter can be a value of @ref PWM_Out_Inverse */ 31 | 32 | uint32_t Dtdiv; /* Specifies the prescaler value used to divide the dead zone clock(40MHz) when in complementary mode. 33 | This parameter can be a value of @ref PWM_DT_DIV */ 34 | 35 | uint32_t Dtcnt; /* Specifies the number of dead time clocks when in complementary mode. 36 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 37 | 38 | } PWM_InitTypeDef; 39 | 40 | typedef struct 41 | { 42 | PWM_TypeDef *Instance; 43 | 44 | PWM_InitTypeDef Init; 45 | 46 | uint32_t Channel; /* This parameter can be a value of @ref PWM_Channel */ 47 | 48 | } PWM_HandleTypeDef; 49 | 50 | #define PWM ((PWM_TypeDef *)PWM_BASE) 51 | 52 | // PWM_Channel 53 | #define PWM_CHANNEL_0 0x00 54 | #define PWM_CHANNEL_1 0x01 55 | #define PWM_CHANNEL_2 0x02 56 | #define PWM_CHANNEL_3 0x03 57 | #define PWM_CHANNEL_4 0x04 58 | #define PWM_CHANNEL_ALL 0x01F 59 | 60 | // PWM_Counter_Mode 61 | #define PWM_COUNTERMODE_EDGEALIGNED_UP 0x0 // edge-aligned up mode for capture 62 | #define PWM_COUNTERMODE_EDGEALIGNED_DOWN 0x1 // edge-aligned up mode for out 63 | #define PWM_COUNTERMODE_CENTERALIGNED 0x2 // center-aligned mode for out 64 | 65 | // PWM_AutoReloadPreload 66 | #define PWM_AUTORELOAD_PRELOAD_DISABLE 0x00 // TIMx_ARR register is not buffered 67 | #define PWM_AUTORELOAD_PRELOAD_ENABLE 0x01 // TIMx_ARR register is buffered 68 | 69 | // PWM_Out_Mode 70 | #define PWM_OUT_MODE_INDEPENDENT 0x00 71 | #define PWM_OUT_MODE_2SYNC 0x01 72 | #define PWM_OUT_MODE_2COMPLEMENTARY 0x02 73 | #define PWM_OUT_MODE_5SYNC 0x03 74 | #define PWM_OUT_MODE_BREAK 0x04 75 | 76 | // PWM_Out_Inverse 77 | #define PWM_OUT_INVERSE_DISABLE 0x00 78 | #define PWM_OUT_INVERSE_ENABLE 0x01 79 | 80 | // PWM_DT_DIV 81 | #define PWM_DTDIV_NONE PWM_DTCR_DTDIV_1 82 | #define PWM_DTDIV_2 PWM_DTCR_DTDIV_2 83 | #define PWM_DTDIV_4 PWM_DTCR_DTDIV_4 84 | #define PWM_DTDIV_8 PWM_DTCR_DTDIV_8 85 | 86 | 87 | 88 | 89 | #define IS_PWM_INSTANCE(INSTANCE) (((INSTANCE) == PWM)) 90 | 91 | #define IS_PWM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == PWM_CHANNEL_0) || \ 92 | ((__CHANNEL__) == PWM_CHANNEL_1) || \ 93 | ((__CHANNEL__) == PWM_CHANNEL_2) || \ 94 | ((__CHANNEL__) == PWM_CHANNEL_3) || \ 95 | ((__CHANNEL__) == PWM_CHANNEL_4) || \ 96 | ((__CHANNEL__) == PWM_CHANNEL_ALL)) 97 | 98 | #define IS_PWM_PRESCALER(__PRESCALER__) (((__PRESCALER__) >= 0x0000) && ((__PRESCALER__) <= 0x0FFFF)) 99 | 100 | #define IS_PWM_COUNTER_MODE(__MODE__) (((__MODE__) == PWM_COUNTERMODE_EDGEALIGNED_UP) || \ 101 | ((__MODE__) == PWM_COUNTERMODE_EDGEALIGNED_DOWN) || \ 102 | ((__MODE__) == PWM_COUNTERMODE_CENTERALIGNED)) 103 | 104 | #define IS_PWM_PERIOD(__PERIOD__) (((__PERIOD__) >= 0x00) && ((__PERIOD__) <= 0x0FF)) 105 | 106 | #define IS_PWM_PULSE(__PULSE__) (((__PULSE__) >= 0x00) && ((__PULSE__) <= 0x0FF)) 107 | 108 | #define IS_PWM_AUTORELOADPRELOAD(__AUTORELOAD__) (((__AUTORELOAD__) == PWM_AUTORELOAD_PRELOAD_DISABLE) || \ 109 | ((__AUTORELOAD__) == PWM_AUTORELOAD_PRELOAD_ENABLE)) 110 | 111 | #define IS_PWM_OUTMODE(__MODE__) (((__MODE__) == PWM_OUT_MODE_INDEPENDENT) || \ 112 | ((__MODE__) == PWM_OUT_MODE_2SYNC) || \ 113 | ((__MODE__) == PWM_OUT_MODE_2COMPLEMENTARY) || \ 114 | ((__MODE__) == PWM_OUT_MODE_5SYNC)) 115 | 116 | #define IS_PWM_OUTINVERSE(__INVERSE__) (((__INVERSE__) == PWM_OUT_INVERSE_DISABLE) || \ 117 | ((__INVERSE__) == PWM_OUT_INVERSE_ENABLE)) 118 | 119 | #define IS_PWM_DTDIV(__DIV__) (((__DIV__) == PWM_DTDIV_NONE) || \ 120 | ((__DIV__) == PWM_DTDIV_2) || \ 121 | ((__DIV__) == PWM_DTDIV_4) || \ 122 | ((__DIV__) == PWM_DTDIV_8)) 123 | 124 | #define IS_PWM_DTCNT(__CNT__) (((__CNT__) >= 0) && ((__CNT__) <= 0x0FF)) 125 | 126 | 127 | 128 | 129 | HAL_StatusTypeDef HAL_PWM_Init(PWM_HandleTypeDef *hpwm); 130 | HAL_StatusTypeDef HAL_PWM_DeInit(PWM_HandleTypeDef *hpwm); 131 | void HAL_PWM_MspInit(PWM_HandleTypeDef *hpwm); 132 | void HAL_PWM_MspDeInit(PWM_HandleTypeDef *hpwm); 133 | 134 | HAL_StatusTypeDef HAL_PWM_Start(PWM_HandleTypeDef *hpwm, uint32_t Channel); 135 | HAL_StatusTypeDef HAL_PWM_Stop(PWM_HandleTypeDef *hpwm, uint32_t Channel); 136 | HAL_StatusTypeDef HAL_PWM_Duty_Set(PWM_HandleTypeDef *hpwm, uint32_t Channel, uint32_t Duty); 137 | HAL_StatusTypeDef HAL_PWM_Freq_Set(PWM_HandleTypeDef *hpwm, uint32_t Channel, uint32_t Prescaler, uint32_t Period); 138 | #ifdef __cplusplus 139 | } 140 | #endif 141 | 142 | #endif -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_rcc.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_RCC_H__ 2 | #define __WM_RCC_H__ 3 | #ifdef __cplusplus 4 | extern "C" { 5 | #endif 6 | #define RCC ((RCC_TypeDef *)RCC_BASE) 7 | 8 | #define __HAL_RCC_ALL_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_ALL) 9 | 10 | #define __HAL_RCC_SPI_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_LSPI) 11 | 12 | #define __HAL_RCC_SPI_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_LSPI) 13 | 14 | #define __HAL_RCC_LCD_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_LCD) 15 | 16 | #define __HAL_RCC_LCD_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_LCD) 17 | 18 | #define __HAL_RCC_PWM_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_PWM) 19 | 20 | #define __HAL_RCC_PWM_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_PWM) 21 | 22 | #define __HAL_RCC_ADC_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_ADC) 23 | 24 | #define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_ADC) 25 | 26 | #define __HAL_RCC_GPIO_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_GPIO) 27 | 28 | #define __HAL_RCC_GPIO_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_GPIO) 29 | 30 | #define __HAL_RCC_UART0_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART0) 31 | 32 | #define __HAL_RCC_UART0_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART0) 33 | 34 | #define __HAL_RCC_UART1_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART1) 35 | 36 | #define __HAL_RCC_UART1_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART1) 37 | 38 | #define __HAL_RCC_UART2_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART2) 39 | 40 | #define __HAL_RCC_UART2_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART2) 41 | 42 | #define __HAL_RCC_UART3_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART3) 43 | 44 | #define __HAL_RCC_UART3_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART3) 45 | 46 | #define __HAL_RCC_UART4_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART4) 47 | 48 | #define __HAL_RCC_UART4_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART4) 49 | 50 | #define __HAL_RCC_UART5_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_UART5) 51 | 52 | #define __HAL_RCC_UART5_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_UART5) 53 | 54 | #define __HAL_RCC_TIM_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_TIMER) 55 | 56 | #define __HAL_RCC_TIM_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_TIMER) 57 | 58 | #define __HAL_RCC_I2C_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_I2C) 59 | 60 | #define __HAL_RCC_I2C_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_I2C) 61 | 62 | #define __HAL_RCC_TOUCH_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_TOUCH) 63 | 64 | #define __HAL_RCC_TOUCH_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_TOUCH) 65 | 66 | #define __HAL_RCC_I2S_CLK_ENABLE() SET_BIT(RCC->CLK_EN, RCC_CLK_EN_I2S) 67 | 68 | #define __HAL_RCC_I2S_CLK_DISABLE() CLEAR_BIT(RCC->CLK_EN, RCC_CLK_EN_I2S) 69 | 70 | #ifdef __cplusplus 71 | } 72 | #endif 73 | 74 | #endif 75 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_spi.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_SPI_H__ 2 | #define __WM_SPI_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | typedef struct 9 | { 10 | uint32_t Mode; /*!< Specifies the SPI operating mode. 11 | This parameter can be a value of @ref SPI_Mode */ 12 | 13 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 14 | This parameter can be a value of @ref SPI_Clock_Polarity */ 15 | 16 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 17 | This parameter can be a value of @ref SPI_Clock_Phase */ 18 | 19 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 20 | hardware (NSS pin) or by software using the SSI bit. 21 | This parameter can be a value of @ref SPI_Slave_Select_management */ 22 | 23 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 24 | used to configure the transmit and receive SCK clock. 25 | This parameter can be a value of @ref SPI_BaudRate_Prescaler 26 | @note The communication clock is derived from the master 27 | clock. The slave clock does not need to be set. */ 28 | 29 | uint32_t FirstByte; /* Specifies whether data transfers start from high byte or low byte. 30 | This parameter can be a value of @ref SPI_HBYTE_LBYTE_transmission */ 31 | 32 | 33 | } SPI_InitTypeDef; 34 | 35 | typedef enum 36 | { 37 | HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 38 | HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 39 | HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 40 | HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 41 | HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 42 | HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 43 | HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 44 | HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 45 | } HAL_SPI_StateTypeDef; 46 | 47 | typedef struct __SPI_HandleTypeDef 48 | { 49 | SPI_TypeDef *Instance; /*!< SPI registers base address */ 50 | 51 | SPI_InitTypeDef Init; /*!< SPI communication parameters */ 52 | 53 | uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 54 | 55 | uint32_t TxXferSize; /*!< SPI Tx Transfer size */ 56 | 57 | __IO uint32_t TxXferCount; /*!< SPI Tx Transfer Counter */ 58 | 59 | uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 60 | 61 | uint32_t RxXferSize; /*!< SPI Rx Transfer size */ 62 | 63 | __IO uint32_t RxXferCount; /*!< SPI Rx Transfer Counter */ 64 | 65 | HAL_LockTypeDef Lock; /*!< Locking object */ 66 | 67 | __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 68 | 69 | __IO uint32_t ErrorCode; /*!< SPI Error code */ 70 | 71 | } SPI_HandleTypeDef; 72 | 73 | 74 | #define SPI ((SPI_TypeDef *)SPI_BASE) 75 | 76 | #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 77 | 78 | // SPI_Mode 79 | #define SPI_MODE_SLAVE (0x00000000U) 80 | #define SPI_MODE_MASTER (SPI_SPI_CFG_MASTER) 81 | 82 | // SPI_Clock_Polarity 83 | #define SPI_POLARITY_LOW (0x00000000U) 84 | #define SPI_POLARITY_HIGH SPI_SPI_CFG_CPOL 85 | 86 | // SPI_Clock_Phase 87 | #define SPI_PHASE_1EDGE (0x00000000U) 88 | #define SPI_PHASE_2EDGE SPI_SPI_CFG_CPHA 89 | 90 | // SPI_Slave_Select_management 91 | #define SPI_NSS_HARD (0x00000000U) 92 | #define SPI_NSS_SOFT SPI_CH_CFG_CSSEL 93 | 94 | // SPI_HBYTE_LBYTE_transmission 95 | #define SPI_LITTLEENDIAN (0x00000000U) 96 | #define SPI_BIGENDIAN SPI_SPI_CFG_BIGENDIAN 97 | 98 | // fclk = 40MHz / (2 * (div + 1)) 99 | #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) // 40M / 2 = 20M 100 | #define SPI_BAUDRATEPRESCALER_4 (0x00000001U) // 40M / 4 = 10M 101 | #define SPI_BAUDRATEPRESCALER_8 (0x00000003U) // 40M / 8 = 5M 102 | #define SPI_BAUDRATEPRESCALER_10 (0x00000004U) // 40M / 10 = 4M 103 | #define SPI_BAUDRATEPRESCALER_20 (0x00000009U) // 40M / 20 = 2M 104 | #define SPI_BAUDRATEPRESCALER_40 (0x00000013U) // 40M / 40 = 1M 105 | 106 | 107 | #define BLOCK_SIZE (8 * 1024 - 4) 108 | 109 | #define IS_SPI_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SPI1) 110 | 111 | #define IS_SPI_MODE(__MODE__) ((__MODE__) == SPI_MODE_MASTER) 112 | 113 | #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 114 | ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 115 | ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 116 | 117 | #define IS_SPI_BIG_OR_LITTLE(__ENDIAN__) (((__ENDIAN__) == SPI_LITTLEENDIAN) || \ 118 | ((__ENDIAN__) == SPI_BIGENDIAN)) 119 | 120 | #define __HAL_SPI_ENABLE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_TXON) 121 | 122 | #define __HAL_SPI_ENABLE_RX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_RXON) 123 | 124 | #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CH_CFG, (SPI_CH_CFG_RXON | SPI_CH_CFG_TXON)) 125 | 126 | #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CH_CFG, (SPI_CH_CFG_RXON | SPI_CH_CFG_TXON | SPI_CH_CFG_START)) 127 | 128 | #define __HAL_SPI_CLEAR_FIFO(__HANDLE__) do{SET_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_CLEARFIFOS);\ 129 | while(READ_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_CLEARFIFOS));}while(0U); 130 | 131 | #define __HAL_SPI_GET_TXFIFO(__HANDLE__) (((__HANDLE__)->Instance->STATUS) & SPI_STATUS_TXFIFO) 132 | 133 | #define __HAL_SPI_GET_RXFIFO(__HANDLE__) ((((__HANDLE__)->Instance->STATUS) & SPI_STATUS_RXFIFO) >> SPI_STATUS_RXFIFO_Pos) 134 | 135 | #define __HAL_SPI_SET_CLK_NUM(__HANDLE__, NUM) (MODIFY_REG((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_LEN, NUM << SPI_CH_CFG_LEN_Pos)) 136 | 137 | #define __HAL_SPI_SET_START(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_START)) 138 | 139 | #define __HAL_SPI_GET_START(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_START)) 140 | 141 | #define __HAL_SPI_GET_BUSY_STATUS(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->STATUS, SPI_STATUS_BUSY)) 142 | 143 | #define __HAL_SPI_SET_CS_LOW(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_CSLEVEL) 144 | 145 | #define __HAL_SPI_SET_CS_HIGH(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CH_CFG, SPI_CH_CFG_CSLEVEL) 146 | 147 | #define __HAL_SPI_GET_FLAG(__HANDLE__, FLAG) READ_BIT((__HANDLE__)->Instance->INT_SRC, FLAG) 148 | 149 | #define __HAL_SPI_CELAR_FLAG(__HANDLE__, FLAG) SET_BIT((__HANDLE__)->Instance->INT_SRC, FLAG) 150 | 151 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 152 | HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 153 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 154 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 155 | 156 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 157 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 158 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint32_t Size, 159 | uint32_t Timeout); 160 | 161 | #ifdef __cplusplus 162 | } 163 | #endif 164 | 165 | #endif -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_spi_flash.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_SPI_FLASH_H__ 2 | #define __WM_SPI_FLASH_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | #define PAGE_SIZE 256 9 | #define SECTOR_SIZE 4096 10 | 11 | #define EXFLASH_ID (0x9F) 12 | #define EXFLASH_READ_DATA (0x03) 13 | #define EXFLASH_PAGE_PROGRAM (0x02) 14 | #define EXFLASH_SECTOR_ERASE (0x20) 15 | #define EXFLASH_CIHP_ERASE (0xC7) 16 | #define EXFLASH_WRITE_ENABLE (0x06) 17 | #define EXFLASH_READ_SR1 (0x05) 18 | #define EXFLASH_READ_SR2 (0x35) 19 | 20 | #define EXFLASH_STATUS_BUSY (1 << 0) 21 | #define EXFLASH_STATUS_WEL (1 << 1) 22 | 23 | #define swap32(a) (((a & 0xFF) << 24) | ((a & 0xFF00) << 8) | ((a & 0xFF0000) >> 8) | (a >> 24)) 24 | 25 | int SPIFLS_Init(void); 26 | 27 | int SPIFLS_Read_ID(uint8_t *id); 28 | 29 | int SPIFLS_Read(uint32_t addr, uint8_t *buf, uint32_t len); 30 | 31 | int SPIFLS_Write(uint32_t addr, uint8_t *buf, uint32_t len); 32 | 33 | int SPIFLS_Erase(uint32_t sector); 34 | 35 | int SPIFLS_Chip_Erase(void); 36 | #ifdef __cplusplus 37 | } 38 | #endif 39 | 40 | #endif -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_tim.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_TIM_H__ 2 | #define __WM_TIM_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | 9 | #define TIM ((TIM_TypeDef *)TIM_BASE) 10 | #define TIM0 0 11 | #define TIM1 1 12 | #define TIM2 2 13 | #define TIM3 3 14 | #define TIM4 4 15 | #define TIM5 5 16 | 17 | typedef enum 18 | { 19 | HAL_TIM_STATE_RESET = 0x00U, 20 | HAL_TIM_STATE_READY = 0x01U, 21 | HAL_TIM_STATE_BUSY = 0x02U, 22 | HAL_TIM_STATE_TIMEOUT = 0x03U, 23 | HAL_TIM_STATE_ERROR = 0x04U 24 | } HAL_TIM_StateTypeDef; 25 | 26 | typedef struct 27 | { 28 | uint32_t Unit; 29 | uint32_t AutoReload; 30 | uint32_t Period; 31 | 32 | } TIM_Base_InitTypeDef; 33 | 34 | typedef struct 35 | { 36 | uint32_t Instance; 37 | TIM_Base_InitTypeDef Init; 38 | 39 | HAL_LockTypeDef Lock; 40 | __IO HAL_TIM_StateTypeDef State; 41 | 42 | } TIM_HandleTypeDef; 43 | 44 | #define TIM_UNIT_US 0x00000000U 45 | #define TIM_UNIT_MS 0x00000001U 46 | 47 | #define TIM_AUTORELOAD_PRELOAD_DISABLE 0x00000001U 48 | #define TIM_AUTORELOAD_PRELOAD_ENABLE 0x00000000U 49 | 50 | #define IS_TIM_INSTANCE(INSTANCE)\ 51 | (((INSTANCE) == TIM0) || \ 52 | ((INSTANCE) == TIM1) || \ 53 | ((INSTANCE) == TIM2) || \ 54 | ((INSTANCE) == TIM3) || \ 55 | ((INSTANCE) == TIM4) || \ 56 | ((INSTANCE) == TIM5)) 57 | 58 | #define IS_TIM_UNIT(UNIT) (((UNIT) == TIM_UNIT_US) || \ 59 | ((UNIT) == TIM_UNIT_MS)) 60 | 61 | #define IS_TIM_AUTORELOAD(PRELOAD) (((PRELOAD) == TIM_AUTORELOAD_PRELOAD_DISABLE) || \ 62 | ((PRELOAD) == TIM_AUTORELOAD_PRELOAD_ENABLE)) 63 | 64 | #define __HAL_TIM_ENABLE(__HANDLE__) (TIM->CR |= TIM_CR_TIM_EN((__HANDLE__)->Instance - TIM0)) 65 | 66 | #define __HAL_TIM_DISABLE(__HANDLE__) (TIM->CR &= ~(TIM_CR_TIM_EN((__HANDLE__)->Instance - TIM0))) 67 | 68 | #define __HAL_TIM_ENABLE_IT(__HANDLE__) (TIM->CR |= TIM_CR_TIM_TIE((__HANDLE__)->Instance - TIM0)) 69 | 70 | #define __HAL_TIM_DISABLE_IT(__HANDLE__) (TIM->CR &= ~(TIM_CR_TIM_TIE((__HANDLE__)->Instance - TIM0))) 71 | 72 | #define __HAL_TIM_GET_FLAG(__HANDLE__) ((TIM->CR & TIM_CR_TIM_TIF((__HANDLE__)->Instance - TIM0)) == \ 73 | TIM_CR_TIM_TIF((__HANDLE__)->Instance - TIM0)) 74 | 75 | #define __HAL_TIM_CLEAR_IT(__HANDLE__) (TIM->CR |= TIM_CR_TIM_TIF((__HANDLE__)->Instance - TIM0)) 76 | 77 | HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim); 78 | HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim); 79 | void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim); 80 | void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim); 81 | 82 | HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim); 83 | HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim); 84 | 85 | HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim); 86 | HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim); 87 | 88 | HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim); 89 | 90 | void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim); 91 | 92 | void HAL_TIM_Callback(TIM_HandleTypeDef *htim); 93 | #ifdef __cplusplus 94 | } 95 | #endif 96 | 97 | #endif 98 | -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_touch.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_TOUCH_H__ 2 | #define __WM_TOUCH_H__ 3 | 4 | #include "wm_hal.h" 5 | #ifdef __cplusplus 6 | extern "C" { 7 | #endif 8 | typedef struct 9 | { 10 | uint32_t Channel; /* Specifies the touch channel used. 11 | This parameter can be a value of @ref TOUCH_CHANNEL */ 12 | 13 | uint32_t ScanPeriod; /* Specifies the scan period. The unit is 16ms. 14 | This parameter can be a number between Min_Data = 0x01 and Max_Data = 0x3F.*/ 15 | 16 | uint32_t Window; /* Specifies Output pulse number as counting window. 17 | Note: Set to N, the actual value is N - 2. 18 | This parameter can be a number between Min_Data = 0x03 and Max_Data = 0x3F.*/ 19 | 20 | uint8_t Threshold[16]; /* Specifies Counting threshold for each channel.Threshold[0] corresponds to channel 0, 21 | and Threshold[15] corresponds to channel 15. 22 | This parameter can be a number between Min_Data = 0x01 and Max_Data = 0x7F.*/ 23 | 24 | uint16_t Irq_en; /* Specifies irq enable for each channel. 25 | Each bit corresponds to a channel, the LSB corresponds to channel 0, 26 | and the MSB corresponds to channel 15.*/ 27 | 28 | } TOUCH_InitTypeDef; 29 | 30 | typedef struct __TOUCH_HandleTypeDef 31 | { 32 | TOUCH_TypeDef *Instance; /*!< TOUCH registers base address */ 33 | 34 | TOUCH_InitTypeDef Init; /*!< TOUCH SCAN parameters */ 35 | 36 | } TOUCH_HandleTypeDef; 37 | 38 | 39 | #define TOUCH ((TOUCH_TypeDef *)TOUCH_BASE) 40 | 41 | 42 | // TOUCH_CHANNEL 43 | #define TOUCH_CH_0 (0x0001U) // PA7 44 | #define TOUCH_CH_1 (0x0002U) // PA9 45 | #define TOUCH_CH_2 (0x0004U) // PA10 46 | #define TOUCH_CH_3 (0x0008U) // PB0 47 | #define TOUCH_CH_4 (0x0010U) // PB1 48 | #define TOUCH_CH_5 (0x0020U) // PB2 49 | #define TOUCH_CH_6 (0x0040U) // PB3 50 | #define TOUCH_CH_7 (0x0080U) // PB4 51 | #define TOUCH_CH_8 (0x0100U) // PB5 52 | #define TOUCH_CH_9 (0x0200U) // PB6 53 | #define TOUCH_CH_10 (0x0400U) // PB7 54 | #define TOUCH_CH_11 (0x0800U) // PB8 55 | #define TOUCH_CH_12 (0x1000U) // PB9 56 | #define TOUCH_CH_13 (0x2000U) // PA12 57 | #define TOUCH_CH_14 (0x4000U) // PA14 58 | #define TOUCH_CH_15 (0x8000U) // PB29 59 | #define TOUCH_CH_NONE (0x0000U) 60 | #define TOUCH_CH_ALL (0xFFFFU) 61 | 62 | #define IS_TOUCH_INSTANCE(INSTANCE) (((INSTANCE) == TOUCH)) 63 | #define IS_TOUCH_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TOUCH_CH_0) || \ 64 | ((__CHANNEL__) == TOUCH_CH_1) || \ 65 | ((__CHANNEL__) == TOUCH_CH_2) || \ 66 | ((__CHANNEL__) == TOUCH_CH_3) || \ 67 | ((__CHANNEL__) == TOUCH_CH_4) || \ 68 | ((__CHANNEL__) == TOUCH_CH_5) || \ 69 | ((__CHANNEL__) == TOUCH_CH_6) || \ 70 | ((__CHANNEL__) == TOUCH_CH_7) || \ 71 | ((__CHANNEL__) == TOUCH_CH_8) || \ 72 | ((__CHANNEL__) == TOUCH_CH_9) || \ 73 | ((__CHANNEL__) == TOUCH_CH_10) || \ 74 | ((__CHANNEL__) == TOUCH_CH_11) || \ 75 | ((__CHANNEL__) == TOUCH_CH_12) || \ 76 | ((__CHANNEL__) == TOUCH_CH_13) || \ 77 | ((__CHANNEL__) == TOUCH_CH_14) || \ 78 | ((__CHANNEL__) == TOUCH_CH_15) || \ 79 | ((__CHANNEL__) == TOUCH_CH_NONE) || \ 80 | ((__CHANNEL__) == TOUCH_CH_ALL)) 81 | 82 | #define IS_TOUCH_SCANPERIOD(__PERIOD__) (((__PERIOD__) >= 0x01) && ((__PERIOD__) <= 0x03F)) 83 | 84 | #define IS_TOUCH_WINDOW(__WINDOW__) (((__WINDOW__) >= 0x03) && ((__WINDOW__) <= 0x03F)) 85 | 86 | #define IS_TOUCH_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) >= 0x01) && ((__THRESHOLD__) <= 0x07F)) 87 | 88 | #define __HAL_TOUCH_GET_FLAG(__HANDLE__) (READ_REG((__HANDLE__)->Instance->IE_IF)) 89 | 90 | #define __HAL_TOUCH_CLEAR_IT(__HANDLE__, __FLAG__) (WRITE_REG((__HANDLE__)->Instance->IE_IF, __FLAG__)) 91 | 92 | HAL_StatusTypeDef HAL_TOUCH_Init(TOUCH_HandleTypeDef *htouch); 93 | HAL_StatusTypeDef HAL_TOUCH_DeInit(TOUCH_HandleTypeDef *htouch); 94 | void HAL_TOUCH_MspInit(TOUCH_HandleTypeDef *htouch); 95 | void HAL_TOUCH_MspDeInit(TOUCH_HandleTypeDef *htouch); 96 | 97 | void HAL_TOUCH_IRQHandler(TOUCH_HandleTypeDef *htouch); 98 | 99 | /* Flag: irq flag, 100 | * Each bit corresponds to a channel, the LSB corresponds to channel 0, 101 | * and the MSB corresponds to channel 15 102 | */ 103 | void HAL_TOUCH_Callback(TOUCH_HandleTypeDef *htouch, uint16_t Flag); 104 | #ifdef __cplusplus 105 | } 106 | #endif 107 | 108 | #endif -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_uart.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/include/driver/wm_uart.h -------------------------------------------------------------------------------- /cores/w806/include/driver/wm_wdg.h: -------------------------------------------------------------------------------- 1 | #ifndef __WM_WDG_H__ 2 | #define __WM_WDG_H__ 3 | 4 | #include "wm_hal.h" 5 | 6 | #ifdef __cplusplus 7 | extern "C" { 8 | #endif 9 | 10 | #define WDG ((WDG_TypeDef *)WDG_BASE) 11 | 12 | typedef struct 13 | { 14 | uint32_t Reload; // unit: us 15 | 16 | } WDG_InitTypeDef; 17 | 18 | typedef struct 19 | { 20 | WDG_TypeDef *Instance; 21 | 22 | WDG_InitTypeDef Init; 23 | 24 | } WDG_HandleTypeDef; 25 | 26 | 27 | #define IS_WDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == WDG) 28 | 29 | #define IS_WDG_RELOAD(__RELOAD__) ((__RELOAD__) <= WDG_LD) 30 | 31 | #define __HAL_WDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = __FLAG__) 32 | 33 | HAL_StatusTypeDef HAL_WDG_Init(WDG_HandleTypeDef *hwdg); 34 | 35 | void HAL_WDG_MspInit(WDG_HandleTypeDef* hwdg); 36 | 37 | HAL_StatusTypeDef HAL_WDG_DeInit(WDG_HandleTypeDef *hwdg); 38 | 39 | void HAL_WDG_IRQHandler(WDG_HandleTypeDef *hwdg); 40 | #ifdef __cplusplus 41 | } 42 | #endif 43 | 44 | #endif 45 | -------------------------------------------------------------------------------- /cores/w806/include/wm_type_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file wm_type_def.h 3 | * 4 | * @brief WM type redefine 5 | * 6 | * @author winnermicro 7 | * 8 | * Copyright (c) 2015 Winner Microelectronics Co., Ltd. 9 | */ 10 | #ifndef __WM_TYPE_DEF_H__ 11 | #define __WM_TYPE_DEF_H__ 12 | 13 | 14 | #include 15 | #include 16 | 17 | typedef enum 18 | { 19 | HAL_OK = 0x00U, 20 | HAL_ERROR = 0x01U, 21 | HAL_BUSY = 0x02U, 22 | HAL_TIMEOUT = 0x03U 23 | } HAL_StatusTypeDef; 24 | 25 | typedef enum 26 | { 27 | HAL_UNLOCKED = 0x00U, 28 | HAL_LOCKED = 0x01U 29 | } HAL_LockTypeDef; 30 | 31 | typedef enum 32 | { 33 | RESET = 0, 34 | SET = !RESET 35 | } FlagStatus, ITStatus; 36 | 37 | #define UNUSED(X) (void)X 38 | 39 | #ifndef NULL 40 | #define NULL ((void *)0) 41 | #endif 42 | 43 | #define HAL_MAX_DELAY 0xFFFFFFFF 44 | 45 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != 0U) 46 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 47 | 48 | #endif 49 | -------------------------------------------------------------------------------- /cores/w806/ld/gcc_csky.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /****************************************************************************** 18 | * @file gcc_csky.ld 19 | * @brief csky linker file 20 | * @version V1.0 21 | * @date 02. June 2017 22 | ******************************************************************************/ 23 | MEMORY 24 | { 25 | I-SRAM : ORIGIN = 0x08010400 , LENGTH = 0xEFC00 /* I-SRAM 1MB */ 26 | D-SRAM : ORIGIN = 0x20000100 , LENGTH = 0x47f00 /* D-SRAM 288KB */ 27 | V-SRAM : ORIGIN = 0x20000000 , LENGTH = 0x100 /* off-chip SRAM 8MB */ 28 | } 29 | 30 | __min_heap_size = 0; 31 | PROVIDE (__ram_end = 0x20048000); 32 | PROVIDE (__heap_end = __ram_end); 33 | 34 | REGION_ALIAS("REGION_TEXT", I-SRAM); 35 | REGION_ALIAS("REGION_RODATA", I-SRAM); 36 | REGION_ALIAS("REGION_VDATA", V-SRAM); 37 | REGION_ALIAS("REGION_DATA", D-SRAM); 38 | REGION_ALIAS("REGION_BSS", D-SRAM); 39 | 40 | ENTRY(Reset_Handler) 41 | SECTIONS 42 | { 43 | .text : { 44 | . = ALIGN(0x4) ; 45 | KEEP(*startup.o(.vectors)) 46 | __stext = . ; 47 | *(.text) 48 | *(.text*) 49 | *(.text.*) 50 | *(.gnu.warning) 51 | *(.stub) 52 | *(.gnu.linkonce.t*) 53 | *(.glue_7t) 54 | *(.glue_7) 55 | *(.jcr) 56 | KEEP (*(.init)) 57 | KEEP (*(.fini)) 58 | . = ALIGN (4) ; 59 | PROVIDE(__ctbp = .); 60 | *(.call_table_data) 61 | *(.call_table_text) 62 | . = ALIGN(0x10) ; 63 | __etext = . ; 64 | } > REGION_TEXT 65 | .rodata : { 66 | . = ALIGN(0x4) ; 67 | __srodata = .; 68 | *(.rdata) 69 | *(.rdata*) 70 | *(.rdata1) 71 | *(.rdata.*) 72 | *(.rodata) 73 | *(.rodata1) 74 | *(.rodata*) 75 | *(.rodata.*) 76 | *(.rodata.str1.4) 77 | KEEP (*crtbegin.o(.ctors)) 78 | KEEP (*crtbegin?.o(.ctors)) 79 | KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) 80 | KEEP (*(SORT(.ctors.*))) 81 | KEEP (*(.ctors)) 82 | KEEP (*crtbegin.o(.dtors)) 83 | KEEP (*crtbegin?.o(.dtors)) 84 | KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) 85 | KEEP (*(SORT(.dtors.*))) 86 | KEEP (*(.dtors)) 87 | . = ALIGN(0x4) ; 88 | __erodata = .; 89 | } > REGION_RODATA 90 | .vdata : { 91 | . = ALIGN(0x4) ; 92 | __vdata_start__ = . ; 93 | KEEP(*startup.o(.vdata)) 94 | . = ALIGN(0x4) ; 95 | __vdata_end__ = .; 96 | } > REGION_VDATA 97 | .data : { 98 | . = ALIGN(0x4) ; 99 | __sdata = . ; 100 | __data_start__ = . ; 101 | data_start = . ; 102 | *(.got.plt) 103 | *(.got) 104 | *(.gnu.linkonce.r*) 105 | *(.data) 106 | *(.data*) 107 | *(.data1) 108 | *(.data.*) 109 | *(.gnu.linkonce.d*) 110 | *(.data1) 111 | *(.gcc_except_table) 112 | *(.gcc_except_table*) 113 | __start_init_call = .; 114 | *(.initcall.init) 115 | __stop_init_call = .; 116 | __start_cmd = .; 117 | *(.bootloaddata.cmd) 118 | . = ALIGN(4) ; 119 | __stop_cmd = .; 120 | *(.sdata) 121 | *(.sdata.*) 122 | *(.gnu.linkonce.s.*) 123 | *(__libc_atexit) 124 | *(__libc_subinit) 125 | *(__libc_subfreeres) 126 | *(.note.ABI-tag) 127 | . = ALIGN(0x4) ; 128 | __edata = .; 129 | __data_end__ = .; 130 | } > REGION_DATA AT > REGION_RODATA 131 | .bss : { 132 | . = ALIGN(0x4) ; 133 | __sbss = ALIGN(0x4) ; 134 | __bss_start__ = . ; 135 | *(.dynsbss) 136 | *(.sbss) 137 | *(.sbss.*) 138 | *(.scommon) 139 | *(.dynbss) 140 | *(.bss) 141 | *(.bss.*) 142 | *(COMMON) 143 | . = ALIGN(0x4) ; 144 | __ebss = . ; 145 | __end = . ; 146 | end = . ; 147 | __bss_end__ = .; 148 | } > REGION_BSS 149 | ._user_heap : { 150 | . = ALIGN(0x4) ; 151 | __heap_start = .; 152 | . += __min_heap_size; 153 | . = ALIGN(0x4) ; 154 | } > REGION_BSS 155 | .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > REGION_BSS 156 | .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } > REGION_BSS 157 | .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } 158 | .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } 159 | .eh_frame_hdr : { *(.eh_frame_hdr) } 160 | .preinit_array : 161 | { 162 | PROVIDE_HIDDEN (__preinit_array_start = .); 163 | KEEP (*(.preinit_array)) 164 | PROVIDE_HIDDEN (__preinit_array_end = .); 165 | } 166 | .init_array : 167 | { 168 | PROVIDE_HIDDEN (__init_array_start = .); 169 | KEEP (*(SORT(.init_array.*))) 170 | KEEP (*(.init_array)) 171 | PROVIDE_HIDDEN (__init_array_end = .); 172 | } 173 | .fini_array : 174 | { 175 | PROVIDE_HIDDEN (__fini_array_start = .); 176 | KEEP (*(.fini_array)) 177 | KEEP (*(SORT(.fini_array.*))) 178 | PROVIDE_HIDDEN (__fini_array_end = .); 179 | } 180 | .junk 0 : { *(.rel*) *(.rela*) } 181 | .stab 0 : { *(.stab) } 182 | .stabstr 0 : { *(.stabstr) } 183 | .stab.excl 0 : { *(.stab.excl) } 184 | .stab.exclstr 0 : { *(.stab.exclstr) } 185 | .stab.index 0 : { *(.stab.index) } 186 | .stab.indexstr 0 : { *(.stab.indexstr) } 187 | .comment 0 : { *(.comment) } 188 | .debug 0 : { *(.debug) } 189 | .line 0 : { *(.line) } 190 | .debug_srcinfo 0 : { *(.debug_srcinfo) } 191 | .debug_sfnames 0 : { *(.debug_sfnames) } 192 | .debug_aranges 0 : { *(.debug_aranges) } 193 | .debug_pubnames 0 : { *(.debug_pubnames) } 194 | .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } 195 | .debug_abbrev 0 : { *(.debug_abbrev) } 196 | .debug_line 0 : { *(.debug_line) } 197 | .debug_frame 0 : { *(.debug_frame) } 198 | .debug_str 0 : { *(.debug_str) } 199 | .debug_loc 0 : { *(.debug_loc) } 200 | .debug_macinfo 0 : { *(.debug_macinfo) } 201 | .debug_weaknames 0 : { *(.debug_weaknames) } 202 | .debug_funcnames 0 : { *(.debug_funcnames) } 203 | .debug_typenames 0 : { *(.debug_typenames) } 204 | .debug_varnames 0 : { *(.debug_varnames) } 205 | .debug_pubtypes 0 : { *(.debug_pubtypes) } 206 | .debug_ranges 0 : { *(.debug_ranges) } 207 | .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } 208 | /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } 209 | } 210 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/__rt_entry.S_: -------------------------------------------------------------------------------- 1 | 2 | .global __main 3 | .weak __main 4 | .global __e_rom 5 | .weak __e_rom 6 | .global __s_ram_data_1 7 | .weak __s_ram_data_1 8 | .global __e_ram_data_1 9 | .weak __e_ram_data_1 10 | .global __s_ram_bss_1 11 | .weak __s_ram_bss_1 12 | .global __e_ram_bss_1 13 | .weak __e_ram_bss_1 14 | .global __s_ram_data_2 15 | .weak __s_ram_data_2 16 | .global __e_ram_data_2 17 | .weak __e_ram_data_2 18 | .global __s_ram_bss_2 19 | .weak __s_ram_bss_2 20 | .global __e_ram_bss_2 21 | .weak __e_ram_bss_2 22 | .global __s_ram_data_3 23 | .weak __s_ram_data_3 24 | .global __e_ram_data_3 25 | .weak __e_ram_data_3 26 | .global __s_ram_bss_3 27 | .weak __s_ram_bss_3 28 | .global __e_ram_bss_3 29 | .weak __e_ram_bss_3 30 | .global __s_ram_data_4 31 | .weak __s_ram_data_4 32 | .global __e_ram_data_4 33 | .weak __e_ram_data_4 34 | .global __s_ram_bss_4 35 | .weak __s_ram_bss_4 36 | .global __e_ram_bss_4 37 | .weak __e_ram_bss_4 38 | .global __s_ram_data_5 39 | .weak __s_ram_data_5 40 | .global __e_ram_data_5 41 | .weak __e_ram_data_5 42 | .global __s_ram_bss_5 43 | .weak __s_ram_bss_5 44 | .global __e_ram_bss_5 45 | .weak __e_ram_bss_5 46 | .global __ChipInitHandler 47 | .weak __ChipInitHandler 48 | 49 | .text 50 | .align 3 51 | __bss_initialization: 52 | subu a2, a3 53 | lsri a2, 2 54 | cmpnei a2, 0 55 | bf 2f 56 | movi a1, 0 57 | 1: 58 | stw a1, (a3) 59 | addi a3, 4 60 | subi a2, 1 61 | cmpnei a2, 0 62 | bt 1b 63 | 2: 64 | jmp r15 65 | 66 | __rom_decompression: 67 | cmphs a1, a2 68 | bt 4f 69 | 3: 70 | ld.w a3, (a0, 0) 71 | st.w a3, (a1, 0) 72 | addi a0, 4 73 | addi a1, 4 74 | cmphs a1, a2 75 | bf 3b 76 | 4: 77 | jmp r15 78 | 79 | __main: 80 | mov r6, r15 81 | lrw a3, __s_ram_bss_1 82 | lrw a2, __e_ram_bss_1 83 | bsr __bss_initialization 84 | lrw a3, __s_ram_bss_2 85 | lrw a2, __e_ram_bss_2 86 | bsr __bss_initialization 87 | lrw a3, __s_ram_bss_3 88 | lrw a2, __e_ram_bss_3 89 | bsr __bss_initialization 90 | lrw a3, __s_ram_bss_4 91 | lrw a2, __e_ram_bss_4 92 | bsr __bss_initialization 93 | lrw a3, __s_ram_bss_5 94 | lrw a2, __e_ram_bss_5 95 | bsr __bss_initialization 96 | lrw a0, __e_rom 97 | lrw a1, __s_ram_data_1 98 | lrw a2, __e_ram_data_1 99 | bsr __rom_decompression 100 | lrw a1, __s_ram_data_2 101 | lrw a2, __e_ram_data_2 102 | bsr __rom_decompression 103 | lrw a1, __s_ram_data_3 104 | lrw a2, __e_ram_data_3 105 | bsr __rom_decompression 106 | lrw a1, __s_ram_data_4 107 | lrw a2, __e_ram_data_4 108 | bsr __rom_decompression 109 | lrw a1, __s_ram_data_5 110 | lrw a2, __e_ram_data_5 111 | bsr __rom_decompression 112 | #ifdef __CSKYABIV2__ 113 | subi sp, 4 114 | stw r6, (sp, 0) 115 | lrw a0, __ChipInitHandler 116 | cmpnei a0, 0 117 | bf 1f 118 | jsr a0 119 | 1: 120 | lrw a0, main 121 | jsr a0 122 | #else 123 | subi sp, 8 124 | stw r6, (sp, 0) 125 | lrw a0, __ChipInitHandler 126 | cmpnei a0, 0 127 | bf 1f 128 | jsri __ChipInitHandler 129 | 1: 130 | jsri main 131 | #endif 132 | ldw r15, (sp, 0) 133 | #ifdef __CSKYABIV2__ 134 | addi sp, 4 135 | #else 136 | addi sp, 8 137 | #endif 138 | jmp r15 139 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/__rt_entry.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/lib/arch/xt804/bsp/__rt_entry.o -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/board_init.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /****************************************************************************** 18 | * @file board_init.c 19 | * @brief CSI Source File for board init 20 | * @version V1.0 21 | * @date 02. June 2017 22 | ******************************************************************************/ 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include "wm_regs.h" 28 | #include "wm_hal.h" 29 | 30 | #define UART_TXEN_BIT (0x40) 31 | #define UART_RXEN_BIT (0x80) 32 | #define UART_PARITYEN_BIT (0x08) 33 | #define UART_PARITYODD_BIT (0x10) 34 | #define UART_BITSTOP_VAL (0x03) /// 1 stop-bit; no crc; 8 data-bits 35 | 36 | static void uart0Init (int bandrate) 37 | { 38 | unsigned int bd; 39 | 40 | NVIC_DisableIRQ(UART0_IRQn); 41 | NVIC_ClearPendingIRQ(UART0_IRQn); 42 | 43 | bd = (APB_CLK/(16*bandrate) - 1)|(((APB_CLK%(bandrate*16))*16/(bandrate*16))<<16); 44 | WRITE_REG(UART0->BAUDR, bd); 45 | 46 | WRITE_REG(UART0->LC, UART_BITSTOP_VAL | UART_TXEN_BIT | UART_RXEN_BIT); 47 | WRITE_REG(UART0->FC, 0x00); /* Disable afc */ 48 | WRITE_REG(UART0->DMAC, 0x00); /* Disable DMA */ 49 | WRITE_REG(UART0->FIFOC, 0x00); /* one byte TX/RX */ 50 | // WRITE_REG(UART0->INTM, 0x00); /* Disable INT */ 51 | 52 | } 53 | #if 0 54 | static void uart1_io_init(void) 55 | { 56 | uint32_t temp; 57 | 58 | /* PB6.7 AF Close */ 59 | temp = READ_REG(GPIOB->AF_SEL); 60 | temp &= ~0xC0; 61 | WRITE_REG(GPIOB->AF_SEL, temp); 62 | 63 | /* PB6.7 AF Open opt1 */ 64 | temp = READ_REG(GPIOB->AF_SEL); 65 | temp |= 0xC0; 66 | WRITE_REG(GPIOB->AF_SEL, temp); 67 | 68 | temp = READ_REG(GPIOB->AF_S0); 69 | temp &= ~0xC0; 70 | WRITE_REG(GPIOB->AF_S0, temp); 71 | 72 | temp = READ_REG(GPIOB->AF_S1); 73 | temp &= ~0xC0; 74 | WRITE_REG(GPIOB->AF_S1, temp); 75 | 76 | } 77 | static void uart1Init (int bandrate) 78 | { 79 | unsigned int bd; 80 | 81 | NVIC_DisableIRQ(UART1_IRQn); 82 | NVIC_ClearPendingIRQ(UART1_IRQn); 83 | 84 | bd = (APB_CLK/(16*bandrate) - 1)|(((APB_CLK%(bandrate*16))*16/(bandrate*16))<<16); 85 | WRITE_REG(UART1->BAUDR, bd); 86 | 87 | WRITE_REG(UART1->LC, UART_BITSTOP_VAL | UART_TXEN_BIT | UART_RXEN_BIT); 88 | WRITE_REG(UART1->FC, 0x00); /* Disable afc */ 89 | WRITE_REG(UART1->DMAC, 0x00); /* Disable DMA */ 90 | WRITE_REG(UART1->FIFOC, 0x00); /* one byte TX/RX */ 91 | WRITE_REG(UART1->INTM, 0x00); /* Disable INT */ 92 | 93 | } 94 | #endif 95 | void board_init(void) 96 | { 97 | 98 | #if USE_UART0_PRINT 99 | /* use uart0 as log output io */ 100 | uart0Init(115200); 101 | #else 102 | uart1_io_init(); 103 | /* use uart1 as log output io */ 104 | uart1Init(115200); 105 | #endif 106 | } 107 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/startup.S_: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | /****************************************************************************** 17 | * @file startup.S 18 | * @brief startup file for smartl. Should use with 19 | * GCC for CSKY Embedded Processors 20 | * @version V1.0 21 | * @date 02. June 2017 22 | ******************************************************************************/ 23 | 24 | #include 25 | 26 | .section .vectors 27 | .align 10 28 | .globl __Vectors 29 | .type __Vectors, @object 30 | __Vectors: 31 | .long Reset_Handler 32 | .long Default_Handler 33 | .long Default_Handler 34 | .long Default_Handler 35 | .long Default_Handler 36 | .long Default_Handler 37 | .long Default_Handler 38 | .long Default_Handler 39 | .long Default_Handler 40 | .long Default_Handler 41 | .long Default_Handler 42 | .long Default_Handler 43 | .long Default_Handler 44 | .long Default_Handler 45 | .long Default_Handler 46 | .long Default_Handler 47 | .long Default_Handler 48 | .long Default_Handler 49 | .long Default_Handler 50 | .long Default_Handler 51 | .long Default_Handler 52 | .long Default_Handler 53 | .long tspend_handler 54 | .long Default_Handler 55 | .long Default_Handler 56 | .long Default_Handler 57 | .long Default_Handler 58 | .long Default_Handler 59 | .long Default_Handler 60 | .long Default_Handler 61 | .long Default_Handler 62 | .long Default_Handler 63 | 64 | /* External interrupts */ 65 | .long SDIO_IRQHandler /* 0: SDIO */ 66 | .long MAC_IRQHandler /* 1: MAC */ 67 | .long RF_Cfg_IRQHandler /* 2: RF Cfg */ 68 | .long SEC_IRQHandler /* 3: SEC */ 69 | .long DMA_Channel0_IRQHandler /* 4: DMA_Channel0 */ 70 | .long DMA_Channel1_IRQHandler /* 5: DMA_Channel1 */ 71 | .long DMA_Channel2_IRQHandler /* 6: DMA_Channel2 */ 72 | .long DMA_Channel3_IRQHandler /* 7: DMA_Channel3 */ 73 | .long DMA_Channel4_7_IRQHandler /* 8: DMA_Channel4_7 */ 74 | .long DMA_BRUST_IRQHandler /* 9: DMA_BRUST */ 75 | .long I2C_IRQHandler /* 10: IIC */ 76 | .long ADC_IRQHandler /* 11: SD ADC */ 77 | .long SPI_LS_IRQHandler /* 12: LS SPI */ 78 | .long SPI_HS_IRQHandler /* 13: HS SPI */ 79 | .long GPIOA_IRQHandler /* 14: GPIOA */ 80 | .long GPIOB_IRQHandler /* 15: GPIOB */ 81 | .long UART0_IRQHandler /* 16: UART0 */ 82 | .long UART1_IRQHandler /* 17: UART1 */ 83 | .long TOUCH_IRQHandler /* 18: TOUCH SENSOR */ 84 | .long UART2_5_IRQHandler /* 19: UART2_5 */ 85 | .long BLE_IRQHandler /* 20: BLE */ 86 | .long BT_IRQHandler /* 21: BT */ 87 | .long PWM_IRQHandler /* 22: PWM */ 88 | .long I2S_IRQHandler /* 23: I2S */ 89 | .long SDIO_HOST_IRQHandler /* 24: SDIO HOST */ 90 | .long CORET_IRQHandler /* 25: CoreTIM */ 91 | .long RSA_IRQHandler /* 26: RSA */ 92 | .long GPSEC_IRQHandler /* 27: GPSEC */ 93 | .long FLASH_IRQHandler /* 28: Flash */ 94 | .long PMU_IRQHandler /* 29: PMU */ 95 | .long TIM0_5_IRQHandler /* 30: Timer0_5 */ 96 | .long WDG_IRQHandler /* 31: Watch dog */ 97 | 98 | .size __Vectors, . - __Vectors 99 | 100 | .text 101 | .align 2 102 | _start: 103 | .text 104 | .align 2 105 | .globl Reset_Handler 106 | .type Reset_Handler, %function 107 | Reset_Handler: 108 | #ifdef CONFIG_KERNEL_NONE 109 | lrw r0, 0xe0000200 110 | #else 111 | lrw r0, 0x80000200 112 | mtcr r0, psr 113 | #endif 114 | mtcr r0, psr 115 | 116 | lrw r0, g_top_irqstack 117 | mov sp, r0 118 | 119 | /* 120 | * move __Vectors to irq_vectors 121 | */ 122 | lrw r1, __Vectors 123 | lrw r2, __vdata_start__ 124 | lrw r3, __vdata_end__ 125 | 126 | subu r3, r2 127 | cmpnei r3, 0 128 | bf .L_loopv0_done 129 | 130 | .L_loopv0: 131 | ldw r0, (r1, 0) 132 | stw r0, (r2, 0) 133 | addi r1, 4 134 | addi r2, 4 135 | subi r3, 4 136 | cmpnei r3, 0 137 | bt .L_loopv0 138 | 139 | .L_loopv0_done: 140 | 141 | /* 142 | * The ranges of copy from/to are specified by following symbols 143 | * __etext: LMA of start of the section to copy from. Usually end of text 144 | * __data_start__: VMA of start of the section to copy to 145 | * __data_end__: VMA of end of the section to copy to 146 | * 147 | * All addresses must be aligned to 4 bytes boundary. 148 | */ 149 | lrw r1, __erodata 150 | lrw r2, __data_start__ 151 | lrw r3, __data_end__ 152 | 153 | subu r3, r2 154 | cmpnei r3, 0 155 | bf .L_loop0_done 156 | 157 | .L_loop0: 158 | ldw r0, (r1, 0) 159 | stw r0, (r2, 0) 160 | addi r1, 4 161 | addi r2, 4 162 | subi r3, 4 163 | cmpnei r3, 0 164 | bt .L_loop0 165 | 166 | .L_loop0_done: 167 | 168 | /* 169 | * The BSS section is specified by following symbols 170 | * __bss_start__: start of the BSS section. 171 | * __bss_end__: end of the BSS section. 172 | * 173 | * Both addresses must be aligned to 4 bytes boundary. 174 | */ 175 | #if 1 176 | lrw r1, __bss_start__ 177 | lrw r2, __bss_end__ 178 | 179 | movi r0, 0 180 | 181 | subu r2, r1 182 | cmpnei r2, 0 183 | bf .L_loop1_done 184 | 185 | .L_loop1: 186 | stw r0, (r1, 0) 187 | addi r1, 4 188 | subi r2, 4 189 | cmpnei r2, 0 190 | bt .L_loop1 191 | .L_loop1_done: 192 | #endif 193 | 194 | #ifndef __NO_SYSTEM_INIT 195 | jbsr SystemInit 196 | #endif 197 | 198 | #ifndef __NO_BOARD_INIT 199 | jbsr board_init 200 | #endif 201 | 202 | jbsr main 203 | .size Reset_Handler, . - Reset_Handler 204 | 205 | __exit: 206 | br __exit 207 | 208 | .section .bss 209 | 210 | .align 2 211 | .globl g_intstackalloc 212 | .global g_intstackbase 213 | .global g_top_irqstack 214 | g_intstackalloc: 215 | g_intstackbase: 216 | .space CONFIG_ARCH_INTERRUPTSTACK 217 | g_top_irqstack: 218 | 219 | .section .vdata 220 | .align 10 221 | .globl irq_vectors 222 | .type irq_vectors, @object 223 | irq_vectors: 224 | .space CONFIG_IRQ_VECTOR_SIZE 225 | .size irq_vectors, . - irq_vectors 226 | 227 | .globl irq_vectors_end 228 | irq_vectors_end: 229 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/startup.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/lib/arch/xt804/bsp/startup.o -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/system.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /****************************************************************************** 18 | * @file system.c 19 | * @brief CSI Device System Source File 20 | * @version V1.0 21 | * @date 02. June 2017 22 | ******************************************************************************/ 23 | 24 | #include 25 | #include "csi_core.h" 26 | 27 | /** 28 | * @brief initialize the system 29 | * Initialize the psr and vbr. 30 | * @param None 31 | * @return None 32 | */ 33 | void SystemInit(void) 34 | { 35 | __set_VBR((uint32_t) & (irq_vectors)); 36 | 37 | #if defined(CONFIG_SEPARATE_IRQ_SP) && !defined(CONFIG_KERNEL_NONE) 38 | /* 801 not supported */ 39 | extern int32_t g_top_irqstack; 40 | __set_Int_SP((uint32_t)&g_top_irqstack); 41 | __set_CHR(__get_CHR() | CHR_ISE_Msk); 42 | VIC->TSPR = 0xFF; 43 | #endif 44 | 45 | __set_CHR(__get_CHR() | CHR_IAE_Msk); 46 | 47 | /* Clear active and pending IRQ */ 48 | VIC->IABR[0] = 0x0; 49 | VIC->ICPR[0] = 0xFFFFFFFF; 50 | 51 | #ifdef CONFIG_KERNEL_NONE 52 | __enable_excp_irq(); 53 | #endif 54 | } 55 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/trap_c.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /****************************************************************************** 18 | * @file trap_c.c 19 | * @brief source file for the trap process 20 | * @version V1.0 21 | * @date 12. December 2017 22 | ******************************************************************************/ 23 | 24 | #include 25 | #include 26 | #include 27 | #include 28 | 29 | void trap_c(uint32_t *regs) 30 | { 31 | int i; 32 | uint32_t vec = 0; 33 | asm volatile( 34 | "mfcr %0, psr \n" 35 | "lsri %0, 16 \n" 36 | "sextb %0 \n" 37 | :"=r"(vec):); 38 | //while (1); 39 | printf("CPU Exception : %u", vec); 40 | printf("\n"); 41 | 42 | for (i = 0; i < 16; i++) { 43 | printf("r%d: %08x\t", i, regs[i]); 44 | 45 | if ((i % 5) == 4) { 46 | printf("\n"); 47 | } 48 | } 49 | 50 | printf("\n"); 51 | printf("epsr: %8x\n", regs[16]); 52 | printf("epc : %8x\n", regs[17]); 53 | 54 | while (1); 55 | } 56 | 57 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/vectors.S_: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | /****************************************************************************** 17 | * @file vectors.S 18 | * @brief define default vector handlers. Should use with 19 | * GCC for CSKY Embedded Processors 20 | * @version V1.0 21 | * @date 28. Nove 2017 22 | ******************************************************************************/ 23 | 24 | #include 25 | 26 | .import trap_c 27 | 28 | .section .bss 29 | .align 2 30 | .globl g_trapstackalloc 31 | .global g_trapstackbase 32 | .global g_top_trapstack 33 | g_trapstackalloc: 34 | g_trapstackbase: 35 | .space 512 36 | g_top_trapstack: 37 | 38 | .align 2 39 | .globl g_trap_sp 40 | .type g_trap_sp, object 41 | g_trap_sp: 42 | .long 0 43 | .size g_trap_sp, .-g_trap_sp 44 | 45 | .text 46 | 47 | /****************************************************************************** 48 | * Functions: 49 | * void trap(void); 50 | * default exception handler 51 | ******************************************************************************/ 52 | .global trap 53 | .type trap, %function 54 | trap: 55 | psrset ee 56 | 57 | subi sp, 4 58 | stw r13, (sp) 59 | addi sp, 4 60 | 61 | lrw r13, g_trap_sp 62 | stw sp, (r13) 63 | 64 | lrw sp, g_top_trapstack 65 | 66 | subi sp, 72 67 | stm r0-r12, (sp) 68 | 69 | lrw r0, g_trap_sp 70 | ldw r0, (r0) 71 | 72 | stw r0, (sp, 56) /* save r14 */ 73 | 74 | subi r0, 4 75 | ldw r13, (r0) 76 | stw r13, (sp, 52) 77 | 78 | stw r15, (sp, 60) 79 | mfcr r0, epsr 80 | stw r0, (sp, 64) 81 | mfcr r0, epc 82 | stw r0, (sp, 68) 83 | 84 | mov r0, sp 85 | 86 | jbsr trap_c 87 | 88 | .align 2 89 | .weak Default_Handler 90 | .type Default_Handler, %function 91 | Default_Handler: 92 | br trap 93 | .size Default_Handler, . - Default_Handler 94 | 95 | /* Macro to define default handlers. Default handler 96 | * will be weak symbol and just dead loops. They can be 97 | * overwritten by other handlers */ 98 | .macro def_irq_handler handler_name 99 | .weak \handler_name 100 | .globl \handler_name 101 | .set \handler_name, Default_Handler 102 | .endm 103 | 104 | def_irq_handler tspend_handler 105 | def_irq_handler SDIO_IRQHandler /* 0: SDIO */ 106 | def_irq_handler MAC_IRQHandler /* 1: MAC */ 107 | def_irq_handler RF_Cfg_IRQHandler /* 2: RF Cfg */ 108 | def_irq_handler SEC_IRQHandler /* 3: SEC */ 109 | def_irq_handler DMA_Channel0_IRQHandler /* 4: DMA_Channel0 */ 110 | def_irq_handler DMA_Channel1_IRQHandler /* 5: DMA_Channel1 */ 111 | def_irq_handler DMA_Channel2_IRQHandler /* 6: DMA_Channel2 */ 112 | def_irq_handler DMA_Channel3_IRQHandler /* 7: DMA_Channel3 */ 113 | def_irq_handler DMA_Channel4_7_IRQHandler /* 8: DMA_Channel4_7 */ 114 | def_irq_handler DMA_BRUST_IRQHandler /* 9: DMA_BRUST */ 115 | def_irq_handler I2C_IRQHandler /* 10: IIC */ 116 | def_irq_handler ADC_IRQHandler /* 11: SD ADC */ 117 | def_irq_handler SPI_LS_IRQHandler /* 12: LS SPI */ 118 | def_irq_handler SPI_HS_IRQHandler /* 13: HS SPI */ 119 | def_irq_handler GPIOA_IRQHandler /* 14: GPIOA */ 120 | def_irq_handler GPIOB_IRQHandler /* 15: GPIOB */ 121 | def_irq_handler UART0_IRQHandler /* 16: UART0 */ 122 | def_irq_handler UART1_IRQHandler /* 17: UART1 */ 123 | def_irq_handler TOUCH_IRQHandler /* 18: TOUCH SENSOR */ 124 | def_irq_handler UART2_5_IRQHandler /* 19: UART2_5 */ 125 | def_irq_handler BLE_IRQHandler /* 20: BLE */ 126 | def_irq_handler BT_IRQHandler /* 21: BT */ 127 | def_irq_handler PWM_IRQHandler /* 22: PWM */ 128 | def_irq_handler I2S_IRQHandler /* 23: I2S */ 129 | def_irq_handler SDIO_HOST_IRQHandler /* 24: SDIO HOST */ 130 | def_irq_handler CORET_IRQHandler /* 25: CoreTIM */ 131 | def_irq_handler RSA_IRQHandler /* 26: RSA */ 132 | def_irq_handler GPSEC_IRQHandler /* 27: GPSEC */ 133 | def_irq_handler FLASH_IRQHandler /* 28: Flash */ 134 | def_irq_handler PMU_IRQHandler /* 29: PMU */ 135 | def_irq_handler TIM0_5_IRQHandler /* 30: Timer0_5 */ 136 | def_irq_handler WDG_IRQHandler /* 31: Watch dog */ 137 | -------------------------------------------------------------------------------- /cores/w806/lib/arch/xt804/bsp/vectors.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/lib/arch/xt804/bsp/vectors.o -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_adc.c: -------------------------------------------------------------------------------- 1 | #include "wm_adc.h" 2 | 3 | static uint32_t _Get_Result(void) 4 | { 5 | uint32_t value; 6 | 7 | value = ADC->DR; 8 | value = value & 0x3FFFC; 9 | if (value & 0x20000) 10 | { 11 | value &= 0x1FFFF; 12 | } 13 | else 14 | { 15 | value |= 0x20000; 16 | } 17 | return value; 18 | } 19 | 20 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) 21 | { 22 | uint32_t div; 23 | wm_sys_clk sysclk; 24 | 25 | if (hadc == NULL) 26 | { 27 | return HAL_ERROR; 28 | } 29 | 30 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 31 | assert_param(IS_ADC_CHANNEL(hadc->Init.channel)); 32 | assert_param(IS_ADC_FREQUENCY(hadc->Init.freq)); 33 | 34 | hadc->Lock = HAL_UNLOCKED; 35 | 36 | HAL_ADC_MspInit(hadc); 37 | 38 | SystemClock_Get(&sysclk); 39 | div = sysclk.apbclk * 1000000 / (hadc->Init.freq) / 512; 40 | MODIFY_REG(RCC->CLK_SEL, RCC_CLK_SEL_ADC_DIV, ((div & 0xFF) << RCC_CLK_SEL_ADC_DIV_Pos)); 41 | SET_BIT(RCC->CLK_DIV, RCC_CLK_DIV_FREQ_EN); 42 | 43 | MODIFY_REG(hadc->Instance->ADC_CR, ADC_ADC_CR_DMAEN | ADC_ADC_CR_SWITCHTIME | ADC_ADC_CR_INITTIME, 44 | (0x50 << ADC_ADC_CR_SWITCHTIME_Pos) | (0x50 << ADC_ADC_CR_INITTIME_Pos) | ADC_ADC_CR_ADCIE); 45 | 46 | MODIFY_REG(hadc->Instance->PGA_CR, ADC_PGA_CR_BPREF | ADC_PGA_CR_GAIN | ADC_PGA_CR_BP, ADC_PGA_CR_CHOPEN | ADC_PGA_CR_PGAEN); 47 | 48 | // 校验计算offset 49 | MODIFY_REG(hadc->Instance->ANA_CR, ADC_ANA_CR_CH | ADC_ANA_CR_PD, ADC_ANA_CR_RST | ADC_ANA_CR_LDOEN | ADC_ANA_CR_CH_OFFSET); 50 | 51 | HAL_ADC_PollForConversion(hadc); 52 | hadc->offset = _Get_Result(); 53 | __HAL_ADC_DISABLE(hadc); 54 | 55 | return HAL_OK; 56 | } 57 | 58 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) 59 | { 60 | if (hadc == NULL) 61 | { 62 | return HAL_ERROR; 63 | } 64 | 65 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 66 | 67 | __HAL_ADC_DISABLE(hadc); 68 | HAL_ADC_MspDeInit(hadc); 69 | __HAL_UNLOCK(hadc); 70 | 71 | return HAL_OK; 72 | } 73 | 74 | __attribute__((weak)) void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 75 | { 76 | UNUSED(hadc); 77 | } 78 | 79 | __attribute__((weak)) void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 80 | { 81 | UNUSED(hadc); 82 | } 83 | 84 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) 85 | { 86 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 87 | 88 | __HAL_LOCK(hadc); 89 | MODIFY_REG(hadc->Instance->ANA_CR, ADC_ANA_CR_CH, hadc->Init.channel); 90 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_ADC | ADC_IF_CMP); 91 | __HAL_ADC_ENABLE(hadc); 92 | __HAL_UNLOCK(hadc); 93 | 94 | return HAL_OK; 95 | } 96 | 97 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) 98 | { 99 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 100 | 101 | __HAL_LOCK(hadc); 102 | __HAL_ADC_DISABLE(hadc); 103 | __HAL_UNLOCK(hadc); 104 | 105 | return HAL_OK; 106 | } 107 | 108 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc) 109 | { 110 | uint32_t count = 0; 111 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instansce)); 112 | 113 | while (1) 114 | { 115 | if (HAL_IS_BIT_SET(hadc->Instance->IF, ADC_IF_ADC)) 116 | { 117 | count++; 118 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_ADC); 119 | if(count == 4) 120 | { 121 | break; 122 | } 123 | } 124 | } 125 | 126 | return HAL_OK; 127 | } 128 | 129 | int HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) 130 | { 131 | int value = 0; 132 | 133 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 134 | 135 | value = _Get_Result() - hadc->offset; 136 | 137 | return value; 138 | } 139 | 140 | int HAL_ADC_GET_INPUT_VOLTAGE(ADC_HandleTypeDef* hadc) 141 | { 142 | int value; 143 | double voltage = 0.0; 144 | 145 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 146 | 147 | HAL_ADC_Start(hadc); 148 | HAL_ADC_PollForConversion(hadc); 149 | HAL_ADC_Stop(hadc); 150 | value = HAL_ADC_GetValue(hadc); 151 | voltage = (double)value / 4.0 * (126363 / 1000.0) / 1000000 + 1.196; 152 | 153 | value = (int)(voltage * 1000); 154 | return value; 155 | } 156 | 157 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) 158 | { 159 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 160 | 161 | __HAL_LOCK(hadc); 162 | MODIFY_REG(hadc->Instance->ANA_CR, ADC_ANA_CR_CH, hadc->Init.channel); 163 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_ADC | ADC_IF_CMP); 164 | __HAL_ADC_INT_ENABLE(hadc, ADC_ADC_CR_ADCIE); 165 | __HAL_ADC_ENABLE(hadc); 166 | __HAL_UNLOCK(hadc); 167 | 168 | return HAL_OK; 169 | } 170 | 171 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) 172 | { 173 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 174 | 175 | __HAL_LOCK(hadc); 176 | __HAL_ADC_DISABLE(hadc); 177 | __HAL_ADC_INT_DISABLE(hadc, ADC_ADC_CR_ADCIE); 178 | __HAL_UNLOCK(hadc); 179 | 180 | return HAL_OK; 181 | } 182 | 183 | HAL_StatusTypeDef HAL_ADC_Start_Compare_IT(ADC_HandleTypeDef* hadc) 184 | { 185 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 186 | assert_param(IS_ADC_CMP_POL(hadc)); 187 | 188 | __HAL_LOCK(hadc); 189 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_ADC | ADC_IF_CMP); 190 | MODIFY_REG(hadc->Instance->ANA_CR, ADC_ANA_CR_CH, hadc->Init.channel); 191 | MODIFY_REG(hadc->Instance->ADC_CR, ADC_ADC_CR_CMPPOL | ADC_ADC_CR_CMPEN, ((hadc->Init.cmp_pol) | ADC_ADC_CR_CMPEN)); 192 | WRITE_REG(hadc->Instance->CMP_VAL, ((hadc->Init.cmp_val) & 0x3FFFF)); 193 | __HAL_ADC_INT_ENABLE(hadc, ADC_ADC_CR_CMPIE); 194 | __HAL_ADC_ENABLE(hadc); 195 | __HAL_UNLOCK(hadc); 196 | 197 | return HAL_OK; 198 | } 199 | 200 | HAL_StatusTypeDef HAL_ADC_Stop_Compare_IT(ADC_HandleTypeDef* hadc) 201 | { 202 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 203 | 204 | __HAL_LOCK(hadc); 205 | __HAL_ADC_DISABLE(hadc); 206 | __HAL_ADC_INT_DISABLE(hadc, ADC_IF_CMP | ADC_ADC_CR_CMPEN); 207 | __HAL_UNLOCK(hadc); 208 | 209 | return HAL_OK; 210 | } 211 | 212 | __attribute__((weak)) void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) 213 | { 214 | UNUSED(hadc); 215 | } 216 | 217 | __attribute__((weak)) void HAL_ADC_CompareCallback(ADC_HandleTypeDef* hadc) 218 | { 219 | UNUSED(hadc); 220 | } 221 | 222 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) 223 | { 224 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 225 | 226 | if (__HAL_ADC_GET_IT_SOURCE(hadc, ADC_ADC_CR_ADCIE)) 227 | { 228 | if (__HAL_ADC_GET_FLAG(hadc, ADC_IF_ADC)) 229 | { 230 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_ADC); 231 | HAL_ADC_ConvCpltCallback(hadc); 232 | } 233 | } 234 | if (__HAL_ADC_GET_IT_SOURCE(hadc, ADC_ADC_CR_CMPIE)) 235 | { 236 | if (__HAL_ADC_GET_FLAG(hadc, ADC_IF_CMP)) 237 | { 238 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IF_CMP); 239 | HAL_ADC_CompareCallback(hadc); 240 | } 241 | } 242 | } 243 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_cpu.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file wm_cpu.c 3 | * 4 | * @brief cpu driver module 5 | * 6 | * @author kevin 7 | * 8 | * Copyright (c) 2014 Winner Microelectronics Co., Ltd. 9 | */ 10 | #include "wm_regs.h" 11 | #include "wm_cpu.h" 12 | #include "core_804.h" 13 | #include "wm_hal.h" 14 | 15 | #define TICK_INT_PRIORITY 7 16 | 17 | __IO uint32_t uwTick; 18 | uint32_t uwTickPrio; 19 | static HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */ 20 | #define US_TICKS F_CPU/1000000U 21 | 22 | /** 23 | * @brief This function is used to set cpu clock 24 | * 25 | * @param[in] clk select cpu clock, this parameter can be a value of @ref enum CPU_CLK 26 | * 27 | * @return None 28 | * 29 | * @note None 30 | */ 31 | void SystemClock_Config(uint32_t clk) 32 | { 33 | uint32_t RegValue, bus2Fac, wlanDiv, cpuDiv = clk; 34 | 35 | if ((clk < 2) || (clk > 240)) 36 | { 37 | return; 38 | } 39 | 40 | /*Close those not initialized clk. Except uart and gpio. */ 41 | RegValue = READ_REG(RCC->CLK_EN); 42 | RegValue &= ~0x3FFFFF; 43 | RegValue |= 0x802; 44 | WRITE_REG(RCC->CLK_EN, RegValue); 45 | 46 | /* Close bbp clk */ 47 | WRITE_REG(RCC->BBP_CLK, 0x0F); 48 | 49 | /* Config clk div */ 50 | RegValue = READ_REG(RCC->CLK_DIV); 51 | wlanDiv = (RegValue>>8)&0xFF; 52 | RegValue &= 0xFF000000; 53 | RegValue |= 0x80000000; 54 | if(cpuDiv > 12) 55 | { 56 | bus2Fac = 1; 57 | wlanDiv = cpuDiv/4; 58 | } 59 | else /*wlan can run*/ 60 | { 61 | wlanDiv=3; 62 | bus2Fac = (wlanDiv*4/cpuDiv)&0xFF; 63 | } 64 | RegValue |= (bus2Fac<<16) | (wlanDiv<<8) | cpuDiv; 65 | WRITE_REG(RCC->CLK_DIV, RegValue); 66 | 67 | HAL_InitTick(TICK_INT_PRIORITY); 68 | return; 69 | } 70 | 71 | /** 72 | * @brief This function is used to get cpu clock 73 | * 74 | * @param[out] *sysclk point to the addr for system clk output 75 | * 76 | * @return None 77 | * 78 | * @note None 79 | */ 80 | void SystemClock_Get(wm_sys_clk *sysclk) 81 | { 82 | clk_div_reg clk_div; 83 | 84 | clk_div.w = READ_REG(RCC->CLK_DIV); 85 | sysclk->cpuclk = W805_PLL_CLK_MHZ/(clk_div.b.CPU); 86 | sysclk->wlanclk = W805_PLL_CLK_MHZ/(clk_div.b.WLAN); 87 | sysclk->apbclk = sysclk->cpuclk / clk_div.b.BUS2; 88 | } 89 | 90 | 91 | __attribute__((weak)) HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 92 | { 93 | wm_sys_clk sysclk; 94 | 95 | SystemClock_Get(&sysclk); 96 | SysTick_Config(sysclk.cpuclk * UNIT_MHZ / uwTickFreq); 97 | HAL_NVIC_SetPriority(SYS_TICK_IRQn, TickPriority); 98 | HAL_NVIC_EnableIRQ(SYS_TICK_IRQn); 99 | uwTickPrio = TickPriority; 100 | return HAL_OK; 101 | } 102 | 103 | __attribute__((weak)) void HAL_IncTick(void) 104 | { 105 | uwTick += 1; 106 | } 107 | 108 | __attribute__((weak)) uint32_t HAL_GetTick(void) 109 | { 110 | return uwTick; 111 | } 112 | 113 | __attribute__((weak)) uint32_t HAL_Get_Micros(void) 114 | { 115 | register uint32_t ms, cycle_cnt; 116 | do { 117 | ms = uwTick; 118 | cycle_cnt = csi_coret_get_value(); 119 | } while (ms != uwTick); 120 | return (ms * 1000) + (1000 - cycle_cnt/US_TICKS); 121 | } 122 | 123 | __attribute__((weak)) void HAL_Delay(uint32_t Delay) 124 | { 125 | uint32_t tickstart = HAL_GetTick(); 126 | uint32_t wait = Delay; 127 | 128 | while ((HAL_GetTick() - tickstart) < wait) 129 | { 130 | } 131 | } 132 | 133 | /* Priority: a value between 0 and 15 134 | * A lower priority value indicates a higher priority */ 135 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t Priority) 136 | { 137 | NVIC_SetPriority(IRQn, Priority); 138 | } 139 | 140 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) 141 | { 142 | /* Check the parameters */ 143 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); 144 | 145 | /* Enable interrupt */ 146 | NVIC_EnableIRQ(IRQn); 147 | } 148 | 149 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) 150 | { 151 | /* Check the parameters */ 152 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); 153 | 154 | /* Disable interrupt */ 155 | NVIC_DisableIRQ(IRQn); 156 | } 157 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_gpio.c: -------------------------------------------------------------------------------- 1 | #include "wm_gpio.h" 2 | 3 | #define EXTI_MODE 0x80 4 | 5 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) 6 | { 7 | uint32_t position = 0x00; 8 | uint32_t ioposition, iocurrent; 9 | 10 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 11 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); 12 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); 13 | 14 | while (((GPIO_Init->Pin) >> position) != 0x00) 15 | { 16 | ioposition = (0x01 << position); 17 | 18 | iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 19 | 20 | if (iocurrent == ioposition) 21 | { 22 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); 23 | __AFIO_REMAP_SET_OPT5(GPIOx, ioposition); 24 | switch (GPIO_Init->Mode) 25 | { 26 | case GPIO_MODE_OUTPUT: 27 | SET_BIT(GPIOx->DIR, ioposition); 28 | break; 29 | 30 | case GPIO_MODE_INPUT: 31 | case GPIO_MODE_IT_RISING: 32 | case GPIO_MODE_IT_FALLING: 33 | case GPIO_MODE_IT_RISING_FALLING: 34 | case GPIO_MODE_IT_HIGH_LEVEL: 35 | case GPIO_MODE_IT_LOW_LEVEL: 36 | CLEAR_BIT(GPIOx->DIR, ioposition); 37 | break; 38 | 39 | default: 40 | break; 41 | 42 | } 43 | 44 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); 45 | if (GPIO_Init->Pull == GPIO_NOPULL) 46 | { 47 | SET_BIT(GPIOx->PULLUP_EN, ioposition); 48 | CLEAR_BIT(GPIOx->PULLDOWN_EN, ioposition); 49 | } 50 | else if (GPIO_Init->Pull == GPIO_PULLUP) 51 | { 52 | CLEAR_BIT(GPIOx->PULLUP_EN, ioposition); 53 | CLEAR_BIT(GPIOx->PULLDOWN_EN, ioposition); 54 | } 55 | else if(GPIO_Init->Pull == GPIO_PULLDOWN) 56 | { 57 | SET_BIT(GPIOx->PULLUP_EN, ioposition); 58 | SET_BIT(GPIOx->PULLDOWN_EN, ioposition); 59 | } 60 | 61 | switch (GPIO_Init->Mode) 62 | { 63 | case GPIO_MODE_IT_RISING: 64 | CLEAR_BIT(GPIOx->IS, ioposition); 65 | CLEAR_BIT(GPIOx->IBE, ioposition); 66 | SET_BIT(GPIOx->IEV, ioposition); 67 | break; 68 | 69 | case GPIO_MODE_IT_FALLING: 70 | CLEAR_BIT(GPIOx->IS, ioposition); 71 | CLEAR_BIT(GPIOx->IBE, ioposition); 72 | CLEAR_BIT(GPIOx->IEV, ioposition); 73 | break; 74 | 75 | case GPIO_MODE_IT_RISING_FALLING: 76 | CLEAR_BIT(GPIOx->IS, ioposition); 77 | SET_BIT(GPIOx->IBE, ioposition); 78 | break; 79 | 80 | case GPIO_MODE_IT_HIGH_LEVEL: 81 | SET_BIT(GPIOx->IS, ioposition); 82 | SET_BIT(GPIOx->IEV, ioposition); 83 | break; 84 | 85 | case GPIO_MODE_IT_LOW_LEVEL: 86 | SET_BIT(GPIOx->IS, ioposition); 87 | CLEAR_BIT(GPIOx->IEV, ioposition); 88 | break; 89 | 90 | default: 91 | break; 92 | } 93 | if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 94 | { 95 | SET_BIT(GPIOx->IE, ioposition); 96 | } 97 | } 98 | 99 | position++; 100 | } 101 | } 102 | 103 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) 104 | { 105 | uint32_t position = 0x00, iocurrent; 106 | 107 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 108 | assert_param(IS_GPIO_PIN(GPIO_Pin)); 109 | 110 | while ((GPIO_Pin >> position) != 0) 111 | { 112 | iocurrent = (GPIO_Pin) & (1uL << position); 113 | 114 | if (iocurrent) 115 | { 116 | CLEAR_BIT(GPIOx->DIR, iocurrent); 117 | 118 | SET_BIT(GPIOx->PULLUP_EN, iocurrent); 119 | CLEAR_BIT(GPIOx->PULLDOWN_EN, iocurrent); 120 | 121 | CLEAR_BIT(GPIOx->IS, iocurrent); 122 | CLEAR_BIT(GPIOx->IBE, iocurrent); 123 | CLEAR_BIT(GPIOx->IEV, iocurrent); 124 | CLEAR_BIT(GPIOx->IE, iocurrent); 125 | } 126 | 127 | position++; 128 | } 129 | } 130 | 131 | void HAL_GPIO_Option(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, uint8_t GPIO_Opt) 132 | { 133 | switch(GPIO_Opt) 134 | { 135 | case 1: 136 | { 137 | GPIOx->AF_SEL |= GPIO_Pin; 138 | GPIOx->AF_S1 &= ~GPIO_Pin; 139 | GPIOx->AF_S0 &= ~GPIO_Pin; 140 | break; 141 | } 142 | 143 | case 2: 144 | { 145 | GPIOx->AF_SEL |= GPIO_Pin; 146 | GPIOx->AF_S1 &= ~GPIO_Pin; 147 | GPIOx->AF_S0 |= GPIO_Pin; 148 | break; 149 | } 150 | 151 | case 3: 152 | { 153 | GPIOx->AF_SEL |= GPIO_Pin; 154 | GPIOx->AF_S1 |= GPIO_Pin; 155 | GPIOx->AF_S0 &= ~GPIO_Pin; 156 | break; 157 | } 158 | 159 | case 4: 160 | { 161 | GPIOx->AF_SEL |= GPIO_Pin; 162 | GPIOx->AF_S1 |= GPIO_Pin; 163 | GPIOx->AF_S0 |= GPIO_Pin; 164 | break; 165 | } 166 | 167 | case 5: 168 | { 169 | GPIOx->AF_SEL &= ~GPIO_Pin; 170 | break; 171 | } 172 | 173 | case 6: 174 | { 175 | GPIOx->AF_SEL &= ~GPIO_Pin; 176 | GPIOx->DIR &= ~GPIO_Pin; 177 | GPIOx->PULLUP_EN |= GPIO_Pin; 178 | GPIOx->PULLDOWN_EN &= ~GPIO_Pin; 179 | break; 180 | } 181 | 182 | case 7: 183 | { 184 | GPIOx->AF_SEL &= ~GPIO_Pin; 185 | GPIOx->DIR &= ~GPIO_Pin; 186 | GPIOx->PULLUP_EN &= ~GPIO_Pin; 187 | GPIOx->PULLDOWN_EN &= ~GPIO_Pin; 188 | break; 189 | } 190 | } 191 | } 192 | 193 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) 194 | { 195 | GPIO_PinState bitstatus; 196 | 197 | assert_param(IS_GPIO_PIN(GPIO_Pin)); 198 | 199 | if ((GPIOx->DATA & GPIO_Pin) != GPIO_PIN_RESET) 200 | { 201 | bitstatus = GPIO_PIN_SET; 202 | } 203 | else 204 | { 205 | bitstatus = GPIO_PIN_RESET; 206 | } 207 | return bitstatus; 208 | } 209 | 210 | void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin, GPIO_PinState PinState) 211 | { 212 | uint32_t data_en; 213 | 214 | assert_param(IS_GPIO_PIN(GPIO_Pin)); 215 | assert_param(IS_GPIO_PIN_ACTION(PinState)); 216 | 217 | data_en = READ_REG(GPIOx->DATA_B_EN); 218 | SET_BIT(GPIOx->DATA_B_EN, GPIO_Pin); 219 | if (PinState != GPIO_PIN_RESET) 220 | { 221 | SET_BIT(GPIOx->DATA, GPIO_Pin); 222 | } 223 | else 224 | { 225 | CLEAR_BIT(GPIOx->DATA, GPIO_Pin); 226 | } 227 | WRITE_REG(GPIOx->DATA_B_EN, data_en); 228 | } 229 | 230 | void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) 231 | { 232 | uint32_t data_en, position = 0x00, iocurrent; 233 | 234 | assert_param(IS_GPIO_PIN(GPIO_Pin)); 235 | 236 | data_en = READ_REG(GPIOx->DATA_B_EN); 237 | SET_BIT(GPIOx->DATA_B_EN, GPIO_Pin); 238 | while ((GPIO_Pin >> position) != 0) 239 | { 240 | iocurrent = (GPIO_Pin) & (1uL << position); 241 | 242 | if (iocurrent) 243 | { 244 | if ((GPIOx->DATA & iocurrent) != GPIO_PIN_RESET) 245 | { 246 | CLEAR_BIT(GPIOx->DATA, iocurrent); 247 | } 248 | else 249 | { 250 | SET_BIT(GPIOx->DATA, iocurrent); 251 | } 252 | } 253 | 254 | position++; 255 | } 256 | WRITE_REG(GPIOx->DATA_B_EN, data_en); 257 | } 258 | 259 | void HAL_GPIO_EXTI_IRQHandler(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) 260 | { 261 | if ((GPIOx->MIS & GPIO_Pin) != 0) 262 | { 263 | SET_BIT(GPIOx->IC, GPIO_Pin); 264 | HAL_GPIO_EXTI_Callback(GPIOx, GPIO_Pin); 265 | } 266 | } 267 | 268 | __attribute__((weak)) void HAL_GPIO_EXTI_Callback(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) 269 | { 270 | UNUSED(GPIO_Pin); 271 | } -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_hal.c: -------------------------------------------------------------------------------- 1 | #include "wm_hal.h" 2 | 3 | HAL_StatusTypeDef HAL_Init(void) 4 | { 5 | HAL_MspInit(); 6 | return HAL_OK; 7 | } 8 | 9 | HAL_StatusTypeDef HAL_DeInit(void) 10 | { 11 | return HAL_OK; 12 | } 13 | 14 | __attribute__((weak)) void HAL_MspInit(void) 15 | { 16 | 17 | } 18 | 19 | __attribute__((weak)) void HAL_MspDeInit(void) 20 | { 21 | 22 | } 23 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_i2c.c: -------------------------------------------------------------------------------- 1 | #include "wm_i2c.h" 2 | 3 | static void delay_us(void) 4 | { 5 | uint32_t i; 6 | 7 | for (i = 0; i < (45 * 5); i++) 8 | { 9 | __NOP(); 10 | } 11 | } 12 | 13 | static void I2C_Start(I2C_HandleTypeDef *hi2c) 14 | { 15 | I2C_SCL_H(hi2c); 16 | I2C_SDA_H(hi2c); 17 | delay_us(); 18 | 19 | I2C_SDA_L(hi2c); 20 | delay_us(); 21 | 22 | I2C_SCL_L(hi2c); 23 | delay_us(); 24 | } 25 | 26 | static void I2C_Stop(I2C_HandleTypeDef *hi2c) 27 | { 28 | I2C_SDA_L(hi2c); 29 | I2C_SCL_H(hi2c); 30 | delay_us(); 31 | 32 | I2C_SDA_H(hi2c); 33 | delay_us(); 34 | } 35 | 36 | static void I2C_Ack(I2C_HandleTypeDef *hi2c) 37 | { 38 | I2C_SDA_OUT(hi2c); 39 | I2C_SDA_L(hi2c); 40 | I2C_SCL_H(hi2c); 41 | delay_us(); 42 | 43 | I2C_SCL_L(hi2c); 44 | delay_us(); 45 | I2C_SDA_IN(hi2c); 46 | } 47 | 48 | static void I2C_Nack(I2C_HandleTypeDef *hi2c) 49 | { 50 | I2C_SDA_OUT(hi2c); 51 | I2C_SDA_H(hi2c); 52 | I2C_SCL_H(hi2c); 53 | delay_us(); 54 | 55 | I2C_SCL_L(hi2c); 56 | delay_us(); 57 | I2C_SDA_IN(hi2c); 58 | } 59 | 60 | static uint8_t I2C_Wait_Ack(I2C_HandleTypeDef *hi2c) 61 | { 62 | uint8_t ack; 63 | 64 | I2C_SDA_H(hi2c); 65 | delay_us(); 66 | I2C_SDA_IN(hi2c); 67 | I2C_SCL_H(hi2c); 68 | delay_us(); 69 | ack = I2C_SDA_GET(hi2c); 70 | I2C_SCL_L(hi2c); 71 | delay_us(); 72 | I2C_SDA_OUT(hi2c); 73 | 74 | return ack; 75 | } 76 | 77 | static void I2C_Write_Byte(I2C_HandleTypeDef *hi2c, uint8_t data) 78 | { 79 | int i; 80 | 81 | for (i = 0; i < 8; i ++) 82 | { 83 | if (data & 0x80) 84 | { 85 | I2C_SDA_H(hi2c); 86 | } 87 | else 88 | { 89 | I2C_SDA_L(hi2c); 90 | } 91 | I2C_SCL_H(hi2c); 92 | delay_us(); 93 | I2C_SCL_L(hi2c); 94 | delay_us(); 95 | data <<= 1; 96 | } 97 | } 98 | 99 | static uint8_t I2C_Read_Byte(I2C_HandleTypeDef *hi2c) 100 | { 101 | uint8_t i, temp = 0; 102 | 103 | for (i = 0; i < 8; i++) 104 | { 105 | I2C_SCL_H(hi2c); 106 | delay_us(); 107 | temp <<= 1; 108 | if (I2C_SDA_GET(hi2c)) 109 | { 110 | temp |= 0x01; 111 | } 112 | I2C_SCL_L(hi2c); 113 | delay_us(); 114 | } 115 | 116 | return temp; 117 | } 118 | 119 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) 120 | { 121 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 122 | 123 | GPIO_InitStruct.Pin = hi2c->SCL_Pin; 124 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT; 125 | GPIO_InitStruct.Pull = GPIO_PULLUP; 126 | HAL_GPIO_Init(hi2c->SCL_Port, &GPIO_InitStruct); 127 | 128 | GPIO_InitStruct.Pin = hi2c->SDA_Pin; 129 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT; 130 | GPIO_InitStruct.Pull = GPIO_PULLUP; 131 | HAL_GPIO_Init(hi2c->SDA_Port, &GPIO_InitStruct); 132 | 133 | HAL_GPIO_WritePin(hi2c->SCL_Port, hi2c->SCL_Pin, GPIO_PIN_SET); 134 | HAL_GPIO_WritePin(hi2c->SDA_Port, hi2c->SDA_Pin, GPIO_PIN_SET); 135 | 136 | return HAL_OK; 137 | } 138 | 139 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) 140 | { 141 | HAL_GPIO_DeInit(hi2c->SCL_Port, hi2c->SCL_Pin); 142 | HAL_GPIO_DeInit(hi2c->SDA_Port, hi2c->SDA_Pin); 143 | 144 | return HAL_OK; 145 | } 146 | 147 | HAL_StatusTypeDef HAL_I2C_Write(I2C_HandleTypeDef *hi2c, uint8_t DevAddress, uint8_t MemAddress, uint8_t *pData, uint16_t Size) 148 | { 149 | uint32_t i, ret = HAL_ERROR; 150 | 151 | I2C_Start(hi2c); 152 | I2C_Write_Byte(hi2c, (DevAddress & 0xFE)); 153 | if (I2C_Wait_Ack(hi2c)) 154 | { 155 | goto OUT; 156 | } 157 | I2C_Write_Byte(hi2c, MemAddress); 158 | if (I2C_Wait_Ack(hi2c)) 159 | { 160 | goto OUT; 161 | } 162 | for (i = 0; i < Size; i++) 163 | { 164 | I2C_Write_Byte(hi2c, pData[i]); 165 | if (I2C_Wait_Ack(hi2c)) 166 | { 167 | goto OUT; 168 | } 169 | } 170 | ret = HAL_OK; 171 | OUT: 172 | I2C_Stop(hi2c); 173 | return ret; 174 | } 175 | 176 | HAL_StatusTypeDef HAL_I2C_Read(I2C_HandleTypeDef *hi2c, uint8_t DevAddress, uint8_t MemAddress, uint8_t *pData, uint16_t Size) 177 | { 178 | uint32_t i, ret = HAL_ERROR; 179 | 180 | I2C_Start(hi2c); 181 | I2C_Write_Byte(hi2c, (DevAddress & 0xFE)); 182 | if (I2C_Wait_Ack(hi2c)) 183 | { 184 | goto OUT; 185 | } 186 | I2C_Write_Byte(hi2c, MemAddress); 187 | if (I2C_Wait_Ack(hi2c)) 188 | { 189 | goto OUT; 190 | } 191 | I2C_Start(hi2c); 192 | I2C_Write_Byte(hi2c, (DevAddress | 0x01)); 193 | if (I2C_Wait_Ack(hi2c)) 194 | { 195 | goto OUT; 196 | } 197 | I2C_SDA_IN(hi2c); 198 | for (i = 0; i < Size; i++) 199 | { 200 | pData[i] = I2C_Read_Byte(hi2c); 201 | if (i == (Size - 1)) 202 | { 203 | I2C_Nack(hi2c); 204 | } 205 | else 206 | { 207 | I2C_Ack(hi2c); 208 | } 209 | } 210 | ret = HAL_OK; 211 | OUT: 212 | I2C_SDA_OUT(hi2c); 213 | I2C_Stop(hi2c); 214 | return ret; 215 | } 216 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_lcd.c: -------------------------------------------------------------------------------- 1 | /********************************************************************************* 2 | * @file wm_lcd.c 3 | * @author 杭州峰海科技有限公司 4 | * @version V1.0 5 | * @date 20211027 6 | * @brief linailiang 7 | * 8 | * Copyright (c) 2021 Hangzhou Fenghai Technology Co., Ltd. All rights reserved. 9 | *********************************************************************************/ 10 | #include "wm_lcd.h" 11 | 12 | 13 | 14 | /***************************************************************************** 15 | * @brief Initialize LCD Frame Counter 16 | * 17 | * @param freq: LCD reference refresh frequency in Hz 18 | */ 19 | void HAL_LCD_Ratio(uint8_t comNum, uint16_t freq) 20 | { 21 | if (freq == 0) freq = 60; 22 | 23 | LCD->FRAMECNT = (LCD_RTC_CLK/freq)/comNum; 24 | } 25 | 26 | 27 | /***************************************************************************** 28 | * @brief select the voltage of LCD module 29 | * 30 | */ 31 | void HAL_LCD_VlcdSet(LCD_VlcdDef vlcd) 32 | { 33 | LCD->CTRL &= ~LCD_VLCD_MASK; 34 | LCD->CTRL |= vlcd; 35 | } 36 | 37 | 38 | /***************************************************************************** 39 | * @brief set the duty of LCD module 40 | * 41 | */ 42 | void HAL_LCD_DutySet(LCD_DutyDef duty) 43 | { 44 | LCD->CTRL &= ~LCD_DUTY_MASK; 45 | LCD->CTRL |= duty; 46 | } 47 | 48 | 49 | /***************************************************************************** 50 | * @brief set the bias of LCD module 51 | * 52 | */ 53 | void HAL_LCD_BiasSet(LCD_BiasDef bias) 54 | { 55 | LCD->CTRL &= ~LCD_BIAS_MASK; 56 | LCD->CTRL |= bias; 57 | } 58 | 59 | 60 | /***************************************************************************** 61 | * @brief set LCD com & seg 62 | * 63 | */ 64 | void HAL_LCD_ComSegEnable(uint32_t com, uint32_t seg) 65 | { 66 | LCD->COM_EN = com; 67 | LCD->SEG_EN = seg; 68 | } 69 | 70 | 71 | /***************************************************************************** 72 | * @brief Turn on or clear a segment 73 | * 74 | * @param com: Which COM line to update 75 | * val: which field to change 76 | */ 77 | void HAL_LCD_ShowSeg(LCD_ComDef com, uint32_t val) 78 | { 79 | switch(com) 80 | { 81 | case LCD_RAM0: LCD->RAM0 = val; break; 82 | case LCD_RAM1: LCD->RAM1 = val; break; 83 | case LCD_RAM2: LCD->RAM2 = val; break; 84 | case LCD_RAM3: LCD->RAM3 = val; break; 85 | case LCD_RAM4: LCD->RAM4 = val; break; 86 | case LCD_RAM5: LCD->RAM5 = val; break; 87 | case LCD_RAM6: LCD->RAM6 = val; break; 88 | case LCD_RAM7: LCD->RAM7 = val; break; 89 | default: break; 90 | } 91 | } 92 | 93 | 94 | /***************************************************************************** 95 | * @brief set LCD digit module 96 | * 97 | */ 98 | void HAL_LCD_DigitPower(LCD_StaDef status) 99 | { 100 | if(status == LCD_ENABLE) LCD->CTRL |= LCD_EN; 101 | else LCD->CTRL &= ~LCD_EN; 102 | } 103 | 104 | 105 | /***************************************************************************** 106 | * @brief set LCD analog module 107 | * 108 | */ 109 | void HAL_LCD_AnalogPower(LCD_StaDef status) 110 | { 111 | if(status == LCD_ENABLE) LCD->CTRL |= LCD_VDD_ON; 112 | else LCD->CTRL &= ~LCD_VDD_ON; 113 | } 114 | 115 | 116 | /***************************************************************************** 117 | * @brief initialize the lcd module 118 | * @param comNum: COM line 4 - 8 119 | * seg: 0-31 120 | */ 121 | void HAL_LCD_Init(uint8_t comNum, uint32_t seg) 122 | { 123 | uint32_t com; 124 | 125 | switch(comNum) 126 | { 127 | case 4: com = 0x0f; break; // 4 COM 128 | case 5: com = 0x1f; break; // 5 COM 129 | case 6: com = 0x3f; break; // 6 COM 130 | case 7: com = 0x7f; break; // 7 COM 131 | case 8: com = 0xff; break; // 8 COM 132 | default:com = 0x0f; break; // 4 COM 133 | } 134 | 135 | __HAL_RCC_LCD_CLK_ENABLE(); // 确保打开LCD时钟，该宏定义需要在wm_rcc.h中添加，LCD默认是打开时钟的 136 | 137 | HAL_LCD_AnalogPower(LCD_ENABLE); // 先打开模拟部分电源 138 | HAL_Delay(5); // 适当延时，否则运行不正常！ 139 | 140 | HAL_LCD_VlcdSet(VLCD33); // 配置显示参数 141 | HAL_LCD_DutySet(DUTY_ONEFOURTH); 142 | HAL_LCD_BiasSet(BIAS_ONETHIRD); 143 | HAL_LCD_Ratio(comNum, 60); 144 | HAL_Delay(5); // 适当延时，否则运行不正常！ 145 | 146 | HAL_LCD_ShowSeg(LCD_RAM0, 0x0000); // 清除显示内容 147 | HAL_LCD_ShowSeg(LCD_RAM1, 0x0000); 148 | HAL_LCD_ShowSeg(LCD_RAM2, 0x0000); 149 | HAL_LCD_ShowSeg(LCD_RAM3, 0x0000); 150 | 151 | HAL_LCD_ComSegEnable(com, seg); // 打开需要显示的COM与SEG 152 | HAL_Delay(5); 153 | 154 | HAL_LCD_DigitPower(LCD_ENABLE); // 最好打开数字部分 155 | HAL_Delay(5); 156 | } 157 | 158 | 159 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_pmu.c: -------------------------------------------------------------------------------- 1 | #include "wm_pmu.h" 2 | 3 | HAL_StatusTypeDef HAL_PMU_Init(PMU_HandleTypeDef *hpmu) 4 | { 5 | if (hpmu == NULL) 6 | { 7 | return HAL_ERROR; 8 | } 9 | assert_param(IS_PMU_ALL_INSTANCE(hpmu->Instance)); 10 | assert_param(IS_PMU_CLKSOURCE(SOURCE)); 11 | 12 | HAL_PMU_MspInit(hpmu); 13 | 14 | if (hpmu->ClkSource == PMU_CR_32KRC_CAL_EN) 15 | { 16 | if (READ_BIT(hpmu->Instance->CR, PMU_CR_32KRC_CAL_EN) != PMU_CR_32KRC_CAL_EN) 17 | { 18 | SET_BIT(hpmu->Instance->CR, PMU_CR_32KRC_CAL_EN); 19 | } 20 | } 21 | else 22 | { 23 | if (READ_BIT(hpmu->Instance->CR, PMU_CR_32KRCBYPASS) != PMU_CR_32KRCBYPASS) 24 | { 25 | SET_BIT(hpmu->Instance->CR, PMU_CR_32KRCBYPASS); 26 | } 27 | } 28 | 29 | return HAL_OK; 30 | } 31 | 32 | HAL_StatusTypeDef HAL_PMU_DeInit(PMU_HandleTypeDef *hpmu) 33 | { 34 | HAL_PMU_MspDeInit(hpmu); 35 | SET_BIT(hpmu->Instance->IF, (PMU_IF_SLEEP | PMU_IF_STANDBY | PMU_IF_TIM0 | PMU_IF_IO_WAKE | PMU_IF_RTC)); 36 | CLEAR_BIT(hpmu->Instance->TIMER0, PMU_TIMER0_EN); 37 | CLEAR_BIT(hpmu->Instance->RTCCR0, PMU_RTCCR0_TIMING_EN); 38 | CLEAR_BIT(hpmu->Instance->RTCCR1, PMU_RTCCR1_EN); 39 | CLEAR_BIT(hpmu->Instance->CR, (PMU_CR_SLEEP_EN | PMU_CR_STANDBY_EN)); 40 | 41 | return HAL_OK; 42 | } 43 | 44 | __attribute__((weak)) void HAL_PMU_MspInit(PMU_HandleTypeDef *hpmu) 45 | { 46 | UNUSED(hpmu); 47 | } 48 | 49 | __attribute__((weak)) void HAL_PMU_MspDeInit(PMU_HandleTypeDef *hpmu) 50 | { 51 | UNUSED(hpmu); 52 | } 53 | 54 | void HAL_PMU_Enter_Sleep(PMU_HandleTypeDef *hpmu) 55 | { 56 | SET_BIT(hpmu->Instance->CR, PMU_CR_SLEEP_EN); 57 | } 58 | 59 | void HAL_PMU_Enter_Standby(PMU_HandleTypeDef *hpmu) 60 | { 61 | SET_BIT(hpmu->Instance->CR, PMU_CR_STANDBY_EN); 62 | } 63 | 64 | /* Period: this parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. The unit is seconds. */ 65 | HAL_StatusTypeDef HAL_PMU_TIMER0_Start(PMU_HandleTypeDef *hpmu, uint32_t Period) 66 | { 67 | if (hpmu == NULL) 68 | { 69 | return HAL_ERROR; 70 | } 71 | assert_param(IS_PMU_ALL_INSTANCE(hpmu->Instance)); 72 | assert_param(IS_PMU_TIMPERIOD(Period)); 73 | 74 | WRITE_REG(hpmu->Instance->TIMER0, (PMU_TIMER0_EN | Period)); 75 | 76 | return HAL_OK; 77 | } 78 | 79 | HAL_StatusTypeDef HAL_PMU_TIMER0_Stop(PMU_HandleTypeDef *hpmu) 80 | { 81 | if (hpmu == NULL) 82 | { 83 | return HAL_ERROR; 84 | } 85 | assert_param(IS_PMU_ALL_INSTANCE(hpmu->Instance)); 86 | 87 | CLEAR_BIT(hpmu->Instance->TIMER0, PMU_TIMER0_EN); 88 | 89 | return HAL_OK; 90 | } 91 | 92 | HAL_StatusTypeDef HAL_PMU_RTC_GetTime(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time) 93 | { 94 | uint32_t cr0, cr1; 95 | 96 | if ((hpmu == NULL) | (Time == NULL)) 97 | { 98 | return HAL_ERROR; 99 | } 100 | assert_param(IS_RTC_ALL_INSTANCE(hpmu->Instance)); 101 | 102 | cr0 = READ_REG(hpmu->Instance->RTCCR0); 103 | cr1 = READ_REG(hpmu->Instance->RTCCR1); 104 | 105 | Time->Year = ((cr1 & PMU_RTCCR1_YEAR) >> PMU_RTCCR1_YEAR_Pos); 106 | Time->Month = ((cr1 & PMU_RTCCR1_MONTH) >> PMU_RTCCR1_MONTH_Pos); 107 | 108 | Time->Date = ((cr0 & PMU_RTCCR0_DATE) >> PMU_RTCCR0_DATE_Pos); 109 | Time->Hours = ((cr0 & PMU_RTCCR0_HOUR) >> PMU_RTCCR0_HOUR_Pos); 110 | Time->Minutes = ((cr0 & PMU_RTCCR0_MINUTE) >> PMU_RTCCR0_MINUTE_Pos); 111 | Time->Seconds = ((cr0 & PMU_RTCCR0_SECOND) >> PMU_RTCCR0_SECOND_Pos); 112 | 113 | return HAL_OK; 114 | } 115 | 116 | HAL_StatusTypeDef HAL_PMU_RTC_Start(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time) 117 | { 118 | if (hpmu == NULL) 119 | { 120 | return HAL_ERROR; 121 | } 122 | assert_param(IS_RTC_ALL_INSTANCE(hpmu->Instance)); 123 | 124 | CLEAR_BIT(hpmu->Instance->RTCCR1, PMU_RTCCR1_EN); 125 | MODIFY_REG(hpmu->Instance->RTCCR0, (PMU_RTCCR0_DATE | PMU_RTCCR0_HOUR | PMU_RTCCR0_MINUTE | PMU_RTCCR0_SECOND), 126 | ((Time->Date << PMU_RTCCR0_DATE_Pos) | (Time->Hours << PMU_RTCCR0_HOUR_Pos) | 127 | (Time->Minutes << PMU_RTCCR0_MINUTE_Pos) | (Time->Seconds << PMU_RTCCR0_SECOND_Pos))); 128 | 129 | MODIFY_REG(hpmu->Instance->RTCCR1, (PMU_RTCCR1_YEAR | PMU_RTCCR1_MONTH), 130 | ((Time->Year << PMU_RTCCR1_YEAR_Pos) | (Time->Month << PMU_RTCCR1_MONTH_Pos))); 131 | 132 | SET_BIT(hpmu->Instance->RTCCR1, PMU_RTCCR1_EN); 133 | 134 | return HAL_OK; 135 | } 136 | 137 | HAL_StatusTypeDef HAL_PMU_RTC_Stop(PMU_HandleTypeDef *hpmu) 138 | { 139 | if (hpmu == NULL) 140 | { 141 | return HAL_ERROR; 142 | } 143 | assert_param(IS_RTC_ALL_INSTANCE(hpmu->Instance)); 144 | 145 | CLEAR_BIT(hpmu->Instance->RTCCR1, PMU_RTCCR1_EN); 146 | 147 | return HAL_OK; 148 | } 149 | 150 | HAL_StatusTypeDef HAL_PMU_RTC_Alarm_Enable(PMU_HandleTypeDef *hpmu, RTC_TimeTypeDef *Time) 151 | { 152 | if (hpmu == NULL) 153 | { 154 | return HAL_ERROR; 155 | } 156 | assert_param(IS_RTC_ALL_INSTANCE(hpmu->Instance)); 157 | 158 | SET_BIT(hpmu->Instance->IF, PMU_IF_RTC); 159 | 160 | MODIFY_REG(hpmu->Instance->RTCCR1, (PMU_RTCCR1_YEAR | PMU_RTCCR1_MONTH), 161 | ((Time->Year << PMU_RTCCR1_YEAR_Pos) | (Time->Month << PMU_RTCCR1_MONTH_Pos))); 162 | 163 | MODIFY_REG(hpmu->Instance->RTCCR0, (PMU_RTCCR0_DATE | PMU_RTCCR0_HOUR | PMU_RTCCR0_MINUTE | PMU_RTCCR0_SECOND), 164 | ((Time->Date << PMU_RTCCR0_DATE_Pos) | (Time->Hours << PMU_RTCCR0_HOUR_Pos) | 165 | (Time->Minutes << PMU_RTCCR0_MINUTE_Pos) | (Time->Seconds << PMU_RTCCR0_SECOND_Pos) | PMU_RTCCR0_TIMING_EN)); 166 | 167 | return HAL_OK; 168 | } 169 | 170 | HAL_StatusTypeDef HAL_PMU_RTC_Alarm_Disable(PMU_HandleTypeDef *hpmu) 171 | { 172 | if (hpmu == NULL) 173 | { 174 | return HAL_ERROR; 175 | } 176 | assert_param(IS_RTC_ALL_INSTANCE(hpmu->Instance)); 177 | 178 | CLEAR_BIT(hpmu->Instance->RTCCR0, PMU_RTCCR0_TIMING_EN); 179 | 180 | return HAL_OK; 181 | } 182 | 183 | __attribute__((weak)) void HAL_PMU_Tim0_Callback(PMU_HandleTypeDef *hpmu) 184 | { 185 | UNUSED(NULL); 186 | } 187 | 188 | __attribute__((weak)) void HAL_PMU_IO_Callback(PMU_HandleTypeDef *hpmu) 189 | { 190 | UNUSED(NULL); 191 | } 192 | 193 | __attribute__((weak)) void HAL_PMU_RTC_Callback(PMU_HandleTypeDef *hpmu) 194 | { 195 | UNUSED(NULL); 196 | } 197 | 198 | void HAL_PMU_IRQHandler(PMU_HandleTypeDef *hpmu) 199 | { 200 | uint32_t flag = READ_REG(hpmu->Instance->IF); 201 | 202 | SET_BIT(hpmu->Instance->IF, (PMU_IF_SLEEP | PMU_IF_STANDBY | PMU_IF_TIM0 | PMU_IF_IO_WAKE | PMU_IF_RTC)); 203 | if ((flag & PMU_IF_TIM0) == PMU_IF_TIM0) 204 | { 205 | HAL_PMU_Tim0_Callback(hpmu); 206 | } 207 | if ((flag & PMU_IF_IO_WAKE) == PMU_IF_IO_WAKE) 208 | { 209 | HAL_PMU_IO_Callback(hpmu); 210 | } 211 | if ((flag & PMU_IF_RTC) == PMU_IF_RTC) 212 | { 213 | HAL_PMU_RTC_Callback(hpmu); 214 | } 215 | } 216 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_spi_flash.c: -------------------------------------------------------------------------------- 1 | #include "wm_spi_flash.h" 2 | 3 | static SPI_HandleTypeDef hspi; 4 | static uint32_t total_size = 0; 5 | static uint8_t cache[SECTOR_SIZE]; 6 | 7 | static int fls_drv_read_id(uint8_t *id) 8 | { 9 | uint8_t cmd = EXFLASH_ID; 10 | uint8_t rx[3]; 11 | int err; 12 | 13 | if (id == NULL) 14 | { 15 | return HAL_ERROR; 16 | } 17 | 18 | __HAL_SPI_SET_CS_LOW(&hspi); 19 | err = HAL_SPI_Transmit(&hspi, &cmd, 1, 100); 20 | if (err != HAL_OK) 21 | { 22 | __HAL_SPI_SET_CS_HIGH(&hspi); 23 | return err; 24 | } 25 | err = HAL_SPI_Receive(&hspi, rx, 3, 100); 26 | if (err != HAL_OK) 27 | { 28 | __HAL_SPI_SET_CS_HIGH(&hspi); 29 | return err; 30 | } 31 | __HAL_SPI_SET_CS_HIGH(&hspi); 32 | 33 | memcpy(id, rx, 3); 34 | return HAL_OK; 35 | } 36 | 37 | static int fls_drv_init(void) 38 | { 39 | uint8_t buf[3]; 40 | int err; 41 | 42 | hspi.Instance = SPI; 43 | hspi.Init.Mode = SPI_MODE_MASTER; 44 | hspi.Init.CLKPolarity = SPI_POLARITY_LOW; 45 | hspi.Init.CLKPhase = SPI_PHASE_1EDGE; 46 | hspi.Init.NSS = SPI_NSS_SOFT; 47 | hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; 48 | 49 | if (HAL_SPI_Init(&hspi) != HAL_OK) 50 | { 51 | return HAL_ERROR; 52 | } 53 | err = fls_drv_read_id(buf); 54 | if (err != HAL_OK) 55 | { 56 | return err; 57 | } 58 | if (buf[2]) 59 | { 60 | total_size = (1 << buf[2]); 61 | } 62 | else 63 | { 64 | return HAL_ERROR; 65 | } 66 | 67 | return HAL_OK; 68 | } 69 | 70 | static int fls_drv_write_enable(void) 71 | { 72 | uint8_t cmd; 73 | int err; 74 | 75 | cmd = EXFLASH_WRITE_ENABLE; 76 | __HAL_SPI_SET_CS_LOW(&hspi); 77 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 1, 100); 78 | __HAL_SPI_SET_CS_HIGH(&hspi); 79 | if (err != HAL_OK) 80 | { 81 | return err; 82 | } 83 | 84 | return HAL_OK; 85 | } 86 | 87 | static int fls_drv_wait_write_enable(void) 88 | { 89 | uint8_t cmd, sr = 0; 90 | int err; 91 | 92 | cmd = EXFLASH_READ_SR1; 93 | do { 94 | __HAL_SPI_SET_CS_LOW(&hspi); 95 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 1, 100); 96 | if (err != HAL_OK) 97 | { 98 | __HAL_SPI_SET_CS_HIGH(&hspi); 99 | return err; 100 | } 101 | err = HAL_SPI_Receive(&hspi, (uint8_t *)&sr, 1, 100); 102 | if (err != HAL_OK) 103 | { 104 | __HAL_SPI_SET_CS_HIGH(&hspi); 105 | return err; 106 | } 107 | __HAL_SPI_SET_CS_HIGH(&hspi); 108 | 109 | if (sr & EXFLASH_STATUS_WEL) 110 | { 111 | break; 112 | } 113 | } while (1); 114 | 115 | return HAL_OK; 116 | } 117 | 118 | static int fls_drv_wait_flash_ready(void) 119 | { 120 | uint8_t cmd, sr = 0; 121 | int err; 122 | 123 | cmd = EXFLASH_READ_SR1; 124 | do { 125 | __HAL_SPI_SET_CS_LOW(&hspi); 126 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 1, 100); 127 | if (err != HAL_OK) 128 | { 129 | __HAL_SPI_SET_CS_HIGH(&hspi); 130 | return err; 131 | } 132 | err = HAL_SPI_Receive(&hspi, (uint8_t *)&sr, 1, 100); 133 | if (err != HAL_OK) 134 | { 135 | __HAL_SPI_SET_CS_HIGH(&hspi); 136 | return err; 137 | } 138 | __HAL_SPI_SET_CS_HIGH(&hspi); 139 | 140 | if ((sr & EXFLASH_STATUS_BUSY) == 0x00) 141 | { 142 | break; 143 | } 144 | } while (1); 145 | 146 | return HAL_OK; 147 | } 148 | 149 | static int fls_drv_read(uint32_t addr, uint8_t *buf, uint32_t len) 150 | { 151 | uint32_t cmd = 0; 152 | int err; 153 | 154 | cmd |= EXFLASH_READ_DATA; 155 | cmd |= (swap32(addr) & 0xFFFFFF00); 156 | __HAL_SPI_SET_CS_LOW(&hspi); 157 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 4, 100); 158 | if (err != HAL_OK) 159 | { 160 | __HAL_SPI_SET_CS_HIGH(&hspi); 161 | return err; 162 | } 163 | err = HAL_SPI_Receive(&hspi, buf, len, 1000); 164 | if (err != HAL_OK) 165 | { 166 | __HAL_SPI_SET_CS_HIGH(&hspi); 167 | return err; 168 | } 169 | __HAL_SPI_SET_CS_HIGH(&hspi); 170 | 171 | return HAL_OK; 172 | } 173 | 174 | static int fls_drv_page_write(uint32_t page, uint8_t *buf) 175 | { 176 | uint32_t cmd = 0; 177 | int err; 178 | 179 | err = fls_drv_write_enable(); 180 | if (err != HAL_OK) 181 | { 182 | return err; 183 | } 184 | 185 | err = fls_drv_wait_write_enable(); 186 | if (err != HAL_OK) 187 | { 188 | return err; 189 | } 190 | 191 | cmd |= EXFLASH_PAGE_PROGRAM; 192 | cmd |= (swap32(page * PAGE_SIZE) & 0xFFFFFF00); 193 | __HAL_SPI_SET_CS_LOW(&hspi); 194 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 4, 100); 195 | if (err != HAL_OK) 196 | { 197 | __HAL_SPI_SET_CS_HIGH(&hspi); 198 | return err; 199 | } 200 | err = HAL_SPI_Transmit(&hspi, buf, PAGE_SIZE, 1000); 201 | if (err != HAL_OK) 202 | { 203 | __HAL_SPI_SET_CS_HIGH(&hspi); 204 | return err; 205 | } 206 | __HAL_SPI_SET_CS_HIGH(&hspi); 207 | 208 | err = fls_drv_wait_flash_ready(); 209 | if (err != HAL_OK) 210 | { 211 | return err; 212 | } 213 | return HAL_OK; 214 | } 215 | 216 | static int fls_drv_erase(uint32_t sector) 217 | { 218 | uint32_t cmd = 0; 219 | int err; 220 | 221 | err = fls_drv_write_enable(); 222 | if (err != HAL_OK) 223 | { 224 | return err; 225 | } 226 | 227 | err = fls_drv_wait_write_enable(); 228 | if (err != HAL_OK) 229 | { 230 | return err; 231 | } 232 | 233 | cmd |= EXFLASH_SECTOR_ERASE; 234 | cmd |= (swap32(sector * SECTOR_SIZE) & 0xFFFFFF00); 235 | __HAL_SPI_SET_CS_LOW(&hspi); 236 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 4, 100); 237 | __HAL_SPI_SET_CS_HIGH(&hspi); 238 | if (err != HAL_OK) 239 | { 240 | return err; 241 | } 242 | err = fls_drv_wait_flash_ready(); 243 | if (err != HAL_OK) 244 | { 245 | return err; 246 | } 247 | return HAL_OK; 248 | } 249 | 250 | static int fls_drv_chip_erase(void) 251 | { 252 | uint32_t cmd = 0; 253 | int err; 254 | 255 | err = fls_drv_write_enable(); 256 | if (err != HAL_OK) 257 | { 258 | return err; 259 | } 260 | 261 | err = fls_drv_wait_write_enable(); 262 | if (err != HAL_OK) 263 | { 264 | return err; 265 | } 266 | cmd = EXFLASH_CIHP_ERASE; 267 | __HAL_SPI_SET_CS_LOW(&hspi); 268 | err = HAL_SPI_Transmit(&hspi, (uint8_t *)&cmd, 1, 100); 269 | __HAL_SPI_SET_CS_HIGH(&hspi); 270 | if (err != HAL_OK) 271 | { 272 | return err; 273 | } 274 | err = fls_drv_wait_flash_ready(); 275 | if (err != HAL_OK) 276 | { 277 | return err; 278 | } 279 | return HAL_OK; 280 | } 281 | 282 | int SPIFLS_Init(void) 283 | { 284 | int err; 285 | 286 | err = fls_drv_init(); 287 | if (err != HAL_OK) 288 | { 289 | return err; 290 | } 291 | 292 | return HAL_OK; 293 | } 294 | 295 | int SPIFLS_Read_ID(uint8_t *id) 296 | { 297 | uint8_t rx[3]; 298 | int err; 299 | 300 | err = fls_drv_read_id(rx); 301 | if (err != HAL_OK) 302 | { 303 | return err; 304 | } 305 | *id = rx[0]; 306 | 307 | return HAL_OK; 308 | } 309 | 310 | int SPIFLS_Page_Write(uint32_t page, uint8_t *buf, uint32_t page_cnt) 311 | { 312 | int i = 0; 313 | int err; 314 | 315 | for (i = 0; i < page_cnt; i++) 316 | { 317 | err = fls_drv_page_write(page + i, buf + i * PAGE_SIZE); 318 | if (err != HAL_OK) 319 | { 320 | return err; 321 | } 322 | } 323 | 324 | return HAL_OK; 325 | } 326 | 327 | int SPIFLS_Read(uint32_t addr, uint8_t *buf, uint32_t len) 328 | { 329 | int err; 330 | 331 | if ((addr > total_size) || (buf == NULL) || (len == 0) || ((addr + len) > total_size)) 332 | { 333 | return HAL_ERROR; 334 | } 335 | 336 | err = fls_drv_read(addr, buf, len); 337 | if (err != HAL_OK) 338 | { 339 | return err; 340 | } 341 | 342 | return HAL_OK; 343 | } 344 | 345 | int SPIFLS_Write(uint32_t addr, uint8_t *buf, uint32_t len) 346 | { 347 | uint32_t sector_addr, sector_num, i, j; 348 | int err; 349 | 350 | if ((addr > total_size) || (buf == NULL) || (len == 0) || ((addr + len) > total_size)) 351 | { 352 | return HAL_ERROR; 353 | } 354 | 355 | sector_addr = addr / SECTOR_SIZE; 356 | sector_num = (addr + len - 1) / SECTOR_SIZE - sector_addr + 1; 357 | 358 | for (i = 0; i < sector_num; i++) 359 | { 360 | err = fls_drv_read((sector_addr + i) * SECTOR_SIZE, cache, SECTOR_SIZE); 361 | if (err != HAL_OK) 362 | { 363 | return err; 364 | } 365 | if (sector_num == 1) 366 | { 367 | memcpy(cache + (addr % SECTOR_SIZE), buf, len); 368 | buf += len; 369 | len = 0; 370 | } 371 | else 372 | { 373 | if (i == 0) 374 | { 375 | memcpy(cache + (addr % SECTOR_SIZE), buf, SECTOR_SIZE - (addr % SECTOR_SIZE)); 376 | buf += (SECTOR_SIZE - (addr % SECTOR_SIZE)); 377 | len -= (SECTOR_SIZE - (addr % SECTOR_SIZE)); 378 | } 379 | else if (i == (sector_num - 1)) 380 | { 381 | memcpy(cache, buf, len); 382 | buf += len; 383 | len = 0; 384 | } 385 | else 386 | { 387 | memcpy(cache, buf, SECTOR_SIZE); 388 | buf += SECTOR_SIZE; 389 | len -= SECTOR_SIZE; 390 | } 391 | } 392 | 393 | err = fls_drv_erase(sector_addr + i); 394 | if (err != HAL_OK) 395 | { 396 | return err; 397 | } 398 | 399 | for (j = 0; j < (SECTOR_SIZE / PAGE_SIZE); j++) 400 | { 401 | err = fls_drv_page_write((sector_addr + i) * (SECTOR_SIZE / PAGE_SIZE) + j, cache + j * PAGE_SIZE); 402 | if (err != HAL_OK) 403 | { 404 | return err; 405 | } 406 | } 407 | } 408 | 409 | return HAL_OK; 410 | } 411 | 412 | int SPIFLS_Erase(uint32_t sector) 413 | { 414 | int err; 415 | 416 | if (sector > (total_size / SECTOR_SIZE)) 417 | { 418 | return HAL_ERROR; 419 | } 420 | err = fls_drv_erase(sector); 421 | if (err != HAL_OK) 422 | { 423 | return err; 424 | } 425 | 426 | return HAL_OK; 427 | } 428 | 429 | int SPIFLS_Chip_Erase(void) 430 | { 431 | int err; 432 | 433 | err = fls_drv_chip_erase(); 434 | if (err != HAL_OK) 435 | { 436 | return err; 437 | } 438 | 439 | return HAL_OK; 440 | } -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_tim.c: -------------------------------------------------------------------------------- 1 | #include "wm_tim.h" 2 | 3 | HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) 4 | { 5 | uint32_t offset = 0; 6 | wm_sys_clk sysclk; 7 | 8 | if (htim == NULL) 9 | { 10 | return HAL_ERROR; 11 | } 12 | 13 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 14 | assert_param(IS_TIM_UNIT(htim->Init.unit)); 15 | assert_param(IS_TIM_AUTORELOAD(htim->Init.AutoReload)); 16 | 17 | if (htim->State == HAL_TIM_STATE_RESET) 18 | { 19 | htim->Lock = HAL_UNLOCKED; 20 | HAL_TIM_Base_MspInit(htim); 21 | } 22 | htim->State = HAL_TIM_STATE_BUSY; 23 | 24 | SystemClock_Get(&sysclk); 25 | WRITE_REG(TIM->TMR_CONFIG, sysclk.apbclk-1); 26 | offset = htim->Instance - TIM0; 27 | MODIFY_REG(TIM->CR, (TIM_CR_TIM_MODE(offset) | TIM_CR_TIM_UNIT(offset)), 28 | ((htim->Init.AutoReload << TIM_CR_TIM_MODE_Pos(offset)) | (htim->Init.Unit << TIM_CR_TIM_UNIT_Pos(offset)))); 29 | 30 | WRITE_REG(*(uint32_t *)(&(TIM->TIM0_PRD) + offset), htim->Init.Period); 31 | htim->State = HAL_TIM_STATE_READY; 32 | 33 | return HAL_OK; 34 | } 35 | 36 | HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) 37 | { 38 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 39 | 40 | htim->State = HAL_TIM_STATE_BUSY; 41 | __HAL_TIM_DISABLE(htim); 42 | HAL_TIM_Base_MspDeInit(htim); 43 | htim->State = HAL_TIM_STATE_RESET; 44 | __HAL_UNLOCK(htim); 45 | 46 | return HAL_OK; 47 | } 48 | 49 | __attribute__((weak)) void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) 50 | { 51 | UNUSED(htim); 52 | } 53 | 54 | __attribute__((weak)) void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) 55 | { 56 | UNUSED(htim); 57 | } 58 | 59 | HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) 60 | { 61 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 62 | 63 | if (htim->State != HAL_TIM_STATE_READY) 64 | { 65 | return HAL_ERROR; 66 | } 67 | 68 | htim->State = HAL_TIM_STATE_BUSY; 69 | __HAL_TIM_ENABLE(htim); 70 | 71 | return HAL_OK; 72 | } 73 | 74 | HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) 75 | { 76 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 77 | 78 | __HAL_TIM_DISABLE(htim); 79 | 80 | htim->State = HAL_TIM_STATE_READY; 81 | 82 | return HAL_OK; 83 | } 84 | 85 | HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) 86 | { 87 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 88 | 89 | if (htim->State != HAL_TIM_STATE_READY) 90 | { 91 | return HAL_ERROR; 92 | } 93 | htim->State = HAL_TIM_STATE_BUSY; 94 | __HAL_TIM_ENABLE_IT(htim); 95 | __HAL_TIM_ENABLE(htim); 96 | 97 | return HAL_OK; 98 | } 99 | 100 | HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) 101 | { 102 | assert_param(IS_TIM_INSTANCE(htim->Instance)); 103 | 104 | __HAL_TIM_DISABLE_IT(htim); 105 | __HAL_TIM_DISABLE(htim); 106 | htim->State = HAL_TIM_STATE_READY; 107 | 108 | return HAL_OK; 109 | } 110 | 111 | HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim) 112 | { 113 | return htim->State; 114 | } 115 | 116 | __attribute__((weak)) void HAL_TIM_Callback(TIM_HandleTypeDef *htim) 117 | { 118 | UNUSED(htim); 119 | } 120 | 121 | void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) 122 | { 123 | if (__HAL_TIM_GET_FLAG(htim) != RESET) 124 | { 125 | __HAL_TIM_CLEAR_IT(htim); 126 | HAL_TIM_Callback(htim); 127 | } 128 | } 129 | 130 | 131 | 132 | 133 | 134 | 135 | 136 | 137 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_touch.c: -------------------------------------------------------------------------------- 1 | #include "wm_touch.h" 2 | 3 | // 在使用TOUCH功能时，TOUCH0（PA7）必须复用为TOUCH功能，不可以作为其他功能！！！ 4 | 5 | 6 | HAL_StatusTypeDef HAL_TOUCH_Init(TOUCH_HandleTypeDef *htouch) 7 | { 8 | int i; 9 | 10 | if (htouch == NULL) 11 | { 12 | return HAL_ERROR; 13 | } 14 | assert_param(IS_TOUCH_INSTANCE(htouch->Instance)); 15 | assert_param(IS_TOUCH_CHANNELS(htouch->Init.Channel)); 16 | assert_param(IS_TOUCH_WINDOW(htouch->Init.Window)); 17 | assert_param(IS_TOUCH_SCANPERIOD(htouch->Init.ScanPeriod)); 18 | 19 | HAL_TOUCH_MspInit(htouch); 20 | WRITE_REG(htouch->Instance->CR, 0); 21 | WRITE_REG(htouch->Instance->IE_IF, 0x0000FFFF); 22 | for (i = 0; i < 16; i++) 23 | { 24 | if (htouch->Init.Channel & (1 << i)) 25 | { 26 | assert_param(IS_TOUCH_THRESHOLD(htouch->Init.Threshold[i])); 27 | MODIFY_REG(*((&(htouch->Instance->CH0CR)) + i), TOUCH_CH0CR_THRESHOLD, htouch->Init.Threshold[i]); 28 | if (htouch->Init.Irq_en & (1 << i)) 29 | { 30 | SET_BIT(htouch->Instance->IE_IF, (1 << (16 + i))); 31 | } 32 | } 33 | } 34 | WRITE_REG(htouch->Instance->CR, ((htouch->Init.Channel << TOUCH_CR_CH_SEL_Pos) | 35 | (htouch->Init.ScanPeriod << TOUCH_CR_SCAN_PERIOD_Pos) | 36 | (htouch->Init.Window << TOUCH_CR_CAPDET_CNT_Pos) | 37 | TOUCH_CR_EN)); 38 | 39 | return HAL_OK; 40 | } 41 | 42 | HAL_StatusTypeDef HAL_TOUCH_DeInit(TOUCH_HandleTypeDef *htouch) 43 | { 44 | if (htouch == NULL) 45 | { 46 | return HAL_ERROR; 47 | } 48 | CLEAR_BIT(htouch->Instance->CR, TOUCH_CR_EN); 49 | HAL_TOUCH_MspDeInit(htouch); 50 | 51 | return HAL_OK; 52 | } 53 | 54 | __attribute__((weak)) void HAL_TOUCH_MspInit(TOUCH_HandleTypeDef *htouch) 55 | { 56 | UNUSED(htouch); 57 | } 58 | 59 | __attribute__((weak)) void HAL_TOUCH_MspDeInit(TOUCH_HandleTypeDef *htouch) 60 | { 61 | UNUSED(htouch); 62 | } 63 | 64 | __attribute__((weak)) void HAL_TOUCH_Callback(TOUCH_HandleTypeDef *htouch, uint16_t Flag) 65 | { 66 | UNUSED(htouch); 67 | } 68 | 69 | void HAL_TOUCH_IRQHandler(TOUCH_HandleTypeDef *htouch) 70 | { 71 | uint32_t flag = __HAL_TOUCH_GET_FLAG(htouch); 72 | if (flag != RESET) 73 | { 74 | __HAL_TOUCH_CLEAR_IT(htouch, flag); 75 | HAL_TOUCH_Callback(htouch, flag & TOUCH_IE_IF_FLAG); 76 | } 77 | } 78 | -------------------------------------------------------------------------------- /cores/w806/lib/drivers/wm_wdg.c: -------------------------------------------------------------------------------- 1 | #include "wm_wdg.h" 2 | 3 | HAL_StatusTypeDef HAL_WDG_Init(WDG_HandleTypeDef *hwdg) 4 | { 5 | wm_sys_clk sysclk; 6 | 7 | if (hwdg == NULL) 8 | { 9 | return HAL_ERROR; 10 | } 11 | 12 | assert_param(IS_WDG_ALL_INSTANCE(hwdg->Instance)); 13 | assert_param(IS_WDG_COUNTER(hwdg->Init.Reload)); 14 | 15 | HAL_WDG_MspInit(hwdg); 16 | 17 | SystemClock_Get(&sysclk); 18 | WRITE_REG(hwdg->Instance->LD, (sysclk.apbclk * hwdg->Init.Reload)); 19 | WRITE_REG(hwdg->Instance->CR, 0x03); 20 | 21 | return HAL_OK; 22 | } 23 | 24 | HAL_StatusTypeDef HAL_WDG_DeInit(WDG_HandleTypeDef *hwdg) 25 | { 26 | HAL_NVIC_DisableIRQ(WDG_IRQn); 27 | WRITE_REG(hwdg->Instance->CR, 0); 28 | __HAL_WDG_CLEAR_FLAG(hwdg, WDG_CLR); 29 | 30 | return HAL_OK; 31 | } 32 | 33 | __attribute__((weak)) void HAL_WDG_MspInit(WDG_HandleTypeDef *hwdg) 34 | { 35 | UNUSED(hwdg); 36 | } 37 | 38 | void HAL_WDG_IRQHandler(WDG_HandleTypeDef *hwdg) 39 | { 40 | __HAL_WDG_CLEAR_FLAG(hwdg, WDG_CLR); // 如果不清除中断，不会立即复位，在下一个周期中断到来时才复位。 41 | // 例如定时5s，第一次来中断时没清除，则5s后下一个中断到来才复位 42 | } -------------------------------------------------------------------------------- /cores/w806/lib/libdsp.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/lib/libdsp.a -------------------------------------------------------------------------------- /cores/w806/main.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "wm_hal.h" 4 | 5 | void Error_Handler(void); 6 | 7 | int main(void) 8 | { 9 | #if (F_CPU == 240000000) 10 | uint32_t f_cpu_dir = (uint32_t)CPU_CLK_240M; 11 | #elif (F_CPU == 80000000) 12 | uint32_t f_cpu_dir = (uint32_t)CPU_CLK_80M; 13 | #elif (F_CUP == 4000000) 14 | uint32_t f_cpu_dir = (uint32_t)CPU_CLK_40M; 15 | #elif (F_CUP == 2000000) 16 | uint32_t f_cpu_dir = (uint32_t)CPU_CLK_2M; 17 | #else 18 | uint32_t f_cpu_dir = CPU_CLK_160M; 19 | #endif 20 | 21 | SystemClock_Config(f_cpu_dir); 22 | init(); 23 | 24 | setup(); 25 | 26 | for (;;) { 27 | loop(); 28 | } 29 | 30 | return 0; 31 | } 32 | 33 | void Error_Handler(void) 34 | { 35 | while (1) 36 | { 37 | } 38 | } 39 | 40 | void assert_failed(uint8_t *file, uint32_t line) 41 | { 42 | printf("Wrong parameters value: file %s on line %d\r\n", file, line); 43 | } 44 | -------------------------------------------------------------------------------- /cores/w806/wiring.c: -------------------------------------------------------------------------------- 1 | /* 2 | wiring.c - Partial implementation of the Wiring API for the ATmega8. 3 | Part of Arduino - http://www.arduino.cc/ 4 | 5 | Copyright (c) 2005-2006 David A. Mellis 6 | 7 | This library is free software; you can redistribute it and/or 8 | modify it under the terms of the GNU Lesser General Public 9 | License as published by the Free Software Foundation; either 10 | version 2.1 of the License, or (at your option) any later version. 11 | 12 | This library is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 | Lesser General Public License for more details. 16 | 17 | You should have received a copy of the GNU Lesser General 18 | Public License along with this library; if not, write to the 19 | Free Software Foundation, Inc., 59 Temple Place, Suite 330, 20 | Boston, MA 02111-1307 USA 21 | */ 22 | 23 | #include "./include/driver/wm_hal.h" 24 | 25 | /* 26 | unsigned long millis() 27 | { 28 | return 1; 29 | } 30 | */ 31 | 32 | 33 | /* Delay for the given number of microseconds. Assumes a 1, 8, 12, 16, 20 or 24 MHz clock. */ 34 | void delayMicroseconds(uint32_t us) 35 | { 36 | uint32_t t0 = HAL_Get_Micros(); 37 | while(HAL_Get_Micros() - t0 < us); 38 | } 39 | 40 | void init() 41 | { 42 | HAL_Init(); 43 | __HAL_RCC_GPIO_CLK_ENABLE(); 44 | __HAL_RCC_ADC_CLK_ENABLE(); 45 | __HAL_RCC_PWM_CLK_ENABLE(); 46 | } 47 | 48 | -------------------------------------------------------------------------------- /cores/w806/wiring_analog.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Hi-LinkDuino/w80x_arduino/80d0d7011cb0d2f6668a198bc4f514835e0dee68/cores/w806/wiring_analog.c -------------------------------------------------------------------------------- /cores/w806/wiring_digital.c: -------------------------------------------------------------------------------- 1 | /* 2 | wiring_digital.c - digital input and output functions 3 | Part of Arduino - http://www.arduino.cc/ 4 | 5 | Copyright (c) 2005-2006 David A. Mellis 6 | 7 | This library is free software; you can redistribute it and/or 8 | modify it under the terms of the GNU Lesser General Public 9 | License as published by the Free Software Foundation; either 10 | version 2.1 of the License, or (at your option) any later version. 11 | 12 | This library is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 | Lesser General Public License for more details. 16 | 17 | You should have received a copy of the GNU Lesser General 18 | Public License along with this library; if not, write to the 19 | Free Software Foundation, Inc., 59 Temple Place, Suite 330, 20 | Boston, MA 02111-1307 USA 21 | 22 | Modified 28 September 2010 by Mark Sproul 23 | 24 | $Id: wiring.c 248 2007-02-03 15:36:30Z mellis $ 25 | */ 26 | 27 | #define ARDUINO_MAIN 28 | #include "Arduino.h" 29 | #include "pins_arduino.h" 30 | #include "./include/driver/wm_gpio.h" 31 | #include "variant.h" 32 | 33 | void pinMode(uint8_t pin, uint8_t mode) 34 | { 35 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 36 | GPIO_TypeDef *port = (pin > 15)? GPIOB:GPIOA; 37 | if (pin > 15) { pin -= 16; } 38 | g_pinStatus[pin] = mode; 39 | GPIO_InitStruct.Pin = 1< 15)? GPIOB:GPIOA; 79 | if (pin > 15) { pin -= 16; } 80 | if (g_pinStatus[pin] == PWM_OUT) { 81 | __turnOffPWM(pin); 82 | } else if (g_pinStatus[pin] == ANALOG_INPUT) { 83 | __turnOffADC(pin); 84 | } 85 | g_pinStatus[pin] = OUTPUT_OD; 86 | HAL_GPIO_WritePin(port, 1 << pin, (GPIO_PinState)val); 87 | //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, (GPIO_PinState)val); 88 | } 89 | 90 | uint8_t digitalRead(uint8_t pin) 91 | { 92 | GPIO_TypeDef *port = (pin > 15)? GPIOB:GPIOA; 93 | if (pin > 15) { pin -= 16; } 94 | if (g_pinStatus[pin] == PWM_OUT) { 95 | __turnOffPWM(pin); 96 | } else if (g_pinStatus[pin] == ANALOG_INPUT) { 97 | __turnOffADC(pin); 98 | } 99 | g_pinStatus[pin] = INPUT; 100 | return HAL_GPIO_ReadPin(port, 1< 15)? GPIOB:GPIOA; 106 | if (pin > 15) { pin -= 16; } 107 | if (g_pinStatus[pin] == PWM_OUT) { 108 | __turnOffPWM(pin); 109 | } else if (g_pinStatus[pin] == ANALOG_INPUT) { 110 | __turnOffADC(pin); 111 | } 112 | g_pinStatus[pin] = OUTPUT_OD; 113 | HAL_GPIO_TogglePin(port, 1< Examples > BseicsExamples menu after a w80x_duino board is selected 3 | -------------------------------------------------------------------------------- /libraries/BasicsExamples/examples/Adc/Adc.ino: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #define ADC_RESOLUTION ADC16BIT 4 | #define ADC_CH1 PA1 5 | 6 | void setup() 7 | { 8 | //the analogReadResolution needn’t set,if you use 8bit adc 9 | analogReadResolution(ADC_RESOLUTION); 10 | pinMode(ADC_CH1, INPUT); 11 | } 12 | 13 | void loop() 14 | { 15 | #if (ADC_RESOLUTION == ADC8BIT) 16 | uint32_t value; 17 | float volt = 0; 18 | value = analogRead(ADC_CH1); 19 | volt = (value * 2.4) / 256; 20 | //this version Serial lib is not enable,but you could use printf on UART0 21 | printf("ADC val [%d], volt [%f]\r\n", value, volt); 22 | 23 | #else if (ADC_RESOLUTION == ADC16BIT) 24 | uint32_t value; 25 | float volt = 0; 26 | value = analogRead(ADC_CH1); 27 | volt = (value * 2.4) / 76000; 28 | //this version Serial lib is not enable,but you could use printf on UART0 29 | printf("ADC val [%d], volt [%f]\r\n", value, volt); 30 | #endif 31 | delay(1000); 32 | } -------------------------------------------------------------------------------- /libraries/BasicsExamples/examples/Led/Led.ino: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | int led = PB0; 4 | 5 | // the setup routine runs once when you press reset: 6 | void setup() { 7 | // initialize the digital pin as an output. 8 | pinMode(led, OUTPUT); 9 | } 10 | 11 | // the loop routine runs over and over again forever: 12 | void loop() { 13 | digitalWrite(led, HIGH); // turn the LED on (HIGH is the voltage level) 14 | delay(1000); // wait for a second 15 | digitalWrite(led, LOW); // turn the LED off by making the voltage LOW 16 | delay(1000); // wait for a second 17 | } -------------------------------------------------------------------------------- /libraries/BasicsExamples/keywords.txt: -------------------------------------------------------------------------------- 1 | ####################################### 2 | # Syntax Coloring Map For Ultrasound 3 | ####################################### 4 | 5 | ####################################### 6 | # Datatypes (KEYWORD1) 7 | ####################################### 8 | 9 | EEPROM KEYWORD1 10 | 11 | ####################################### 12 | # Methods and Functions (KEYWORD2) 13 | ####################################### 14 | read KEYWORD2 15 | write KEYWORD2 16 | read32 KEYWORD2 17 | write32 KEYWORD2 18 | readSWM KEYWORD2 19 | writeSWM KEYWORD2 20 | 21 | ####################################### 22 | # Constants (LITERAL1) 23 | ####################################### 24 | 25 | -------------------------------------------------------------------------------- /libraries/BasicsExamples/library.properties: -------------------------------------------------------------------------------- 1 | name=BasicsExamples 2 | version=0.0.0 3 | author=null-jun 4 | maintainer=nulllab 5 | sentence=Example sketches for the nulllab w80x Arduino Hardware Support Package 6 | paragraph= 7 | category=Other 8 | url=https://github.com/nulllaborg/nulllab_w80x_duino 9 | architectures=XT804 10 | -------------------------------------------------------------------------------- /libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino: -------------------------------------------------------------------------------- 1 | /* 2 | Digital Pot Control 3 | 4 | This example controls an Analog Devices AD5206 digital potentiometer. 5 | The AD5206 has 6 potentiometer channels. Each channel's pins are labeled 6 | A - connect this to voltage 7 | W - this is the pot's wiper, which changes when you set it 8 | B - connect this to ground. 9 | 10 | The AD5206 is SPI-compatible,and to command it, you send two bytes, 11 | one with the channel number (0 - 5) and one with the resistance value for the 12 | channel (0 - 255). 13 | 14 | The circuit: 15 | * All A pins of AD5206 connected to +5V 16 | * All B pins of AD5206 connected to ground 17 | * An LED and a 220-ohm resisor in series connected from each W pin to ground 18 | * CS - to digital pin 10 (SS pin) 19 | * SDI - to digital pin 11 (MOSI pin) 20 | * CLK - to digital pin 13 (SCK pin) 21 | 22 | created 10 Aug 2010 23 | by Tom Igoe 24 | 25 | Thanks to Heather Dewey-Hagborg for the original tutorial, 2005 26 | 27 | */ 28 | 29 | 30 | // inslude the SPI library: 31 | #include 32 | 33 | 34 | // set pin 10 as the slave select for the digital pot: 35 | const int slaveSelectPin = 10; 36 | 37 | void setup() { 38 | // set the slaveSelectPin as an output: 39 | pinMode(slaveSelectPin, OUTPUT); 40 | // initialize SPI: 41 | SPI.begin(); 42 | } 43 | 44 | void loop() { 45 | 46 | } 47 | 48 | void digitalPotWrite(int address, int value) { 49 | 50 | 51 | // send in the address and value via SPI: 52 | SPI.transfer(address); 53 | SPI.transfer(value); 54 | 55 | } 56 | -------------------------------------------------------------------------------- /libraries/SPI/keywords.txt: -------------------------------------------------------------------------------- 1 | ####################################### 2 | # Syntax Coloring Map SPI 3 | ####################################### 4 | 5 | ####################################### 6 | # Datatypes (KEYWORD1) 7 | ####################################### 8 | 9 | SPI KEYWORD1 10 | 11 | ####################################### 12 | # Methods and Functions (KEYWORD2) 13 | ####################################### 14 | begin KEYWORD2 15 | end KEYWORD2 16 | transfer KEYWORD2 17 | setBitOrder KEYWORD2 18 | setDataMode KEYWORD2 19 | setClockDivider KEYWORD2 20 | 21 | 22 | ####################################### 23 | # Constants (LITERAL1) 24 | ####################################### 25 | SPI_CLOCK_DIV4 LITERAL1 26 | SPI_CLOCK_DIV16 LITERAL1 27 | SPI_CLOCK_DIV64 LITERAL1 28 | SPI_CLOCK_DIV128 LITERAL1 29 | SPI_CLOCK_DIV2 LITERAL1 30 | SPI_CLOCK_DIV8 LITERAL1 31 | SPI_CLOCK_DIV32 LITERAL1 32 | SPI_CLOCK_DIV64 LITERAL1 33 | SPI_MODE0 LITERAL1 34 | SPI_MODE1 LITERAL1 35 | SPI_MODE2 LITERAL1 36 | SPI_MODE3 LITERAL1 -------------------------------------------------------------------------------- /libraries/SPI/library.properties: -------------------------------------------------------------------------------- 1 | name=SPI 2 | version=1.0 3 | author=Arduino 4 | maintainer=Arduino 5 | sentence=Enables the communication with devices that use the Serial Peripheral Interface (SPI) Bus. 6 | paragraph=SPI is a synchronous serial data protocol used by microcontrollers for communicating with one or more peripheral devices quickly over short distances. It uses three lines common to all devices (MISO, MOSI and SCK) and one specific for each device. 7 | category=Communication 8 | url=http://www.arduino.cc/en/Reference/SPI 9 | architectures=avr 10 | 11 | -------------------------------------------------------------------------------- /libraries/SPI/src/SPI.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2010 by Cristian Maglie 3 | * Copyright (c) 2014 by Paul Stoffregen (Transaction API) 4 | * Copyright (c) 2014 by Matthijs Kooijman (SPISettings AVR) 5 | * Copyright (c) 2014 by Andrew J. Kroll (atomicity fixes) 6 | * SPI Master library for arduino. 7 | * 8 | * This file is free software; you can redistribute it and/or modify 9 | * it under the terms of either the GNU General Public License version 2 10 | * or the GNU Lesser General Public License version 2.1, both as 11 | * published by the Free Software Foundation. 12 | */ 13 | 14 | #include "SPI.h" 15 | 16 | SPIClass SPI; 17 | 18 | uint8_t SPIClass::initialized = 0; 19 | uint8_t SPIClass::interruptMode = 0; 20 | uint8_t SPIClass::interruptMask = 0; 21 | uint8_t SPIClass::interruptSave = 0; 22 | SPI_InitTypeDef SPIClass::spi_init = {SPI_MODE_MASTER, SPI_POLARITY_LOW, SPI_PHASE_1EDGE, SPI_NSS_SOFT, SPI_CLOCK_DIV8, SPI_LITTLEENDIAN}; 23 | SPI_HandleTypeDef SPIClass::hspi = {}; 24 | 25 | 26 | void SPIClass::begin() 27 | { 28 | noInterrupts(); // Protect from a scheduler and prevent transactionBegin 29 | if (!initialized) { 30 | __HAL_RCC_SPI_CLK_ENABLE(); 31 | __HAL_AFIO_REMAP_SPI_CS(GPIOB, GPIO_PIN_4); // GPIO init 32 | __HAL_AFIO_REMAP_SPI_CLK(GPIOB, GPIO_PIN_2); 33 | __HAL_AFIO_REMAP_SPI_MISO(GPIOB, GPIO_PIN_3); 34 | __HAL_AFIO_REMAP_SPI_MOSI(GPIOB, GPIO_PIN_5); 35 | hspi.Instance = SPI_HAL; 36 | hspi.Init = spi_init; 37 | 38 | if (HAL_SPI_Init(&hspi) != HAL_OK) 39 | { 40 | // Error_Handler(); 41 | } 42 | } 43 | initialized++; // reference count 44 | 45 | } 46 | 47 | void SPIClass::end() { 48 | noInterrupts(); // Protect from a scheduler and prevent transactionBegin 49 | // Decrease the reference counter 50 | if (initialized) 51 | initialized--; 52 | // If there are no more references disable SPI 53 | if (!initialized) { 54 | __HAL_RCC_SPI_CLK_DISABLE(); 55 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5); 56 | } 57 | } 58 | 59 | void SPIClass::usingInterrupt(uint8_t interruptNumber) 60 | { 61 | 62 | } 63 | 64 | void SPIClass::notUsingInterrupt(uint8_t interruptNumber) 65 | { 66 | 67 | } 68 | -------------------------------------------------------------------------------- /libraries/keywords.txt: -------------------------------------------------------------------------------- 1 | ####################################### 2 | # Syntax Coloring Map For Ultrasound 3 | ####################################### 4 | 5 | ####################################### 6 | # Datatypes (KEYWORD1) 7 | ####################################### 8 | 9 | ####################################### 10 | # Methods and Functions (KEYWORD2) 11 | ####################################### 12 | digitalToggle KEYWORD2 13 | sysClock KEYWORD2 14 | sysClockPrescale KEYWORD2 15 | sysClockOutput KEYWORD2 16 | 17 | ####################################### 18 | # Constants (LITERAL1) 19 | ####################################### 20 | E0 LITERAL1 21 | E1 LITERAL1 22 | E2 LITERAL1 23 | E3 LITERAL1 24 | E4 LITERAL1 25 | E5 LITERAL1 26 | E6 LITERAL1 27 | E7 LITERAL1 28 | B6 LITERAL1 29 | B7 LITERAL1 30 | C7 LITERAL1 31 | F0 LITERAL1 32 | F1 LITERAL1 33 | F2 LITERAL1 34 | F3 LITERAL1 35 | F4 LITERAL1 36 | F5 LITERAL1 37 | F6 LITERAL1 38 | F7 LITERAL1 39 | INT_OSC_32K LITERAL1 40 | INT_OSC_32M LITERAL1 41 | SYSCLK_DIV_0 LITERAL1 42 | SYSCLK_DIV_2 LITERAL1 43 | SYSCLK_DIV_4 LITERAL1 44 | SYSCLK_DIV_8 LITERAL1 45 | SYSCLK_DIV_16 LITERAL1 46 | SYSCLK_DIV_32 LITERAL1 47 | SYSCLK_DIV_64 LITERAL1 48 | SYSCLK_DIV_128 LITERAL1 49 | ADC10BIT LITERAL1 50 | ADC12BIT LITERAL1 51 | DEFAULT LITERAL1 52 | EXTERNAL LITERAL1 53 | INTERNAL1V024 LITERAL1 54 | INTERNAL2V048 LITERAL1 55 | INTERNAL4V096 LITERAL1 56 | -------------------------------------------------------------------------------- /package_w80x_index.json: -------------------------------------------------------------------------------- 1 | { 2 | "packages": [ 3 | { 4 | "name": "w80x_duino", 5 | "maintainer": "nulllab", 6 | "websiteURL": "https://github.com/Hi-LinkDuino/w80x_arduino", 7 | "email": "nulljun@nulllab.cn", 8 | "help": { 9 | "online": "www.nulllab.cn" 10 | }, 11 | "platforms" : [ 12 | { 13 | "name": "w80x_arduino csky plain C/C++ core", 14 | "architecture": "XT804", 15 | "version": "0.0.2", 16 | "category": "Contributed", 17 | "url": "https://github.com/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.2/w80x_arduino-0.0.2.zip", 18 | "archiveFileName": "w80x_arduino-0.0.2.zip", 19 | "help": { 20 | "online": "https://github.com/Hi-LinkDuino/w80x_arduino/issues" 21 | }, 22 | "boards": [ 23 | {"name": "w80x_duino"}, 24 | {"name": "HLK-W806"} 25 | ], 26 | "toolsDependencies": [ 27 | { 28 | "name": "csky", 29 | "version": "2021.04.23", 30 | "packager": "w80x_duino" 31 | }, 32 | { 33 | "name": "w80x_tool", 34 | "version": "v1.0", 35 | "packager": "w80x_duino" 36 | } 37 | ] 38 | }, 39 | { 40 | "name": "w80x_arduino csky plain C/C++ core", 41 | "architecture": "XT804", 42 | "version": "0.0.1", 43 | "category": "Contributed", 44 | "url": "https://github.com/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/w80x_arduino-0.0.1.zip", 45 | "archiveFileName": "w80x_arduino-0.0.1.zip", 46 | "help": { 47 | "online": "https://github.com/Hi-LinkDuino/w80x_arduino/issues" 48 | }, 49 | "boards": [ 50 | {"name": "w80x_duino"}, 51 | {"name": "HLK-W806"} 52 | ], 53 | "toolsDependencies": [ 54 | { 55 | "name": "csky", 56 | "version": "2021.04.23", 57 | "packager": "w80x_duino" 58 | }, 59 | { 60 | "name": "w80x_tool", 61 | "version": "v1.0", 62 | "packager": "w80x_duino" 63 | } 64 | ] 65 | } 66 | ], 67 | "tools" : [ 68 | { 69 | "name": "csky", 70 | "version": "2021.04.23", 71 | "systems": [ 72 | { 73 | "host": "i686-mingw32", 74 | "url": "https://github.com/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/csky-elfabiv2-tools-mingw-minilibc-20210423.tar.gz", 75 | "archiveFileName":"csky-elfabiv2-tools-mingw-minilibc-20210423.tar.gz", 76 | "checksum": "SHA-256:e7d0130df26bcf7b625f7c0818251c04e6be4715ed9b3c8f6303081cea1f058b", 77 | "size": "78639538" 78 | },{ 79 | "host": "x86_64-pc-linux-gnu", 80 | "url": "https://github.com/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/csky-elfabiv2-tools-x86_64-minilibc-20210423.tar.gz", 81 | "archiveFileName": "csky-elfabiv2-tools-x86_64-minilibc-20210423.tar.gz", 82 | "checksum": "SHA-256:8b9a353c157e4d44001a21974254a21cc0f3c7ea2bf3c894f18a905509a7048f", 83 | "size": "80451419" 84 | } 85 | ] 86 | }, 87 | { 88 | "name": "w80x_tool", 89 | "version": "v1.0", 90 | "systems": [ 91 | { 92 | "host": "i686-mingw32", 93 | "url": "https://github.com/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/w80x_tool-mingw32-v1.0.zip", 94 | "archiveFileName": "w80x_tool-mingw32-v1.0.zip" 95 | } 96 | ] 97 | } 98 | ] 99 | } 100 | ] 101 | } 102 | -------------------------------------------------------------------------------- /package_w80x_proxy_index.json: -------------------------------------------------------------------------------- 1 | { 2 | "packages": [ 3 | { 4 | "name": "w80x_duino", 5 | "maintainer": "nulllab", 6 | "websiteURL": "https://github.com/Hi-LinkDuino/w80x_arduino", 7 | "email": "nulljun@nulllab.cn", 8 | "help": { 9 | "online": "www.nulllab.cn" 10 | }, 11 | "platforms" : [ 12 | { 13 | "name": "w80x_arduino csky plain C/C++ core", 14 | "architecture": "XT804", 15 | "version": "0.0.1", 16 | "category": "Contributed", 17 | "url": "https://github.com.cnpmjs.org/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/w80x_arduino-0.0.1.zip", 18 | "archiveFileName": "w80x_arduino-0.0.1.zip", 19 | "help": { 20 | "online": "https://github.com/Hi-LinkDuino/w80x_arduino/issues" 21 | }, 22 | "boards": [ 23 | {"name": "w80x_duino"}, 24 | {"name": "HLK-W806"} 25 | ], 26 | "toolsDependencies": [ 27 | { 28 | "name": "csky", 29 | "version": "2021.04.23", 30 | "packager": "w80x_duino" 31 | }, 32 | { 33 | "name": "w80x_tool", 34 | "version": "v1.0", 35 | "packager": "w80x_duino" 36 | } 37 | ] 38 | } 39 | ], 40 | "tools" : [ 41 | { 42 | "name": "csky", 43 | "version": "2021.04.23", 44 | "systems": [ 45 | { 46 | "host": "i686-mingw32", 47 | "url": "https://github.com.cnpmjs.org/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/csky-elfabiv2-tools-mingw-minilibc-20210423.tar.gz", 48 | "archiveFileName":"csky-elfabiv2-tools-mingw-minilibc-20210423.tar.gz", 49 | "checksum": "SHA-256:e7d0130df26bcf7b625f7c0818251c04e6be4715ed9b3c8f6303081cea1f058b", 50 | "size": "78639538" 51 | },{ 52 | "host": "x86_64-pc-linux-gnu", 53 | "url": "https://github.com.cnpmjs.org/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/csky-elfabiv2-tools-x86_64-minilibc-20210423.tar.gz", 54 | "archiveFileName": "csky-elfabiv2-tools-x86_64-minilibc-20210423.tar.gz", 55 | "checksum": "SHA-256:8b9a353c157e4d44001a21974254a21cc0f3c7ea2bf3c894f18a905509a7048f", 56 | "size": "80451419" 57 | } 58 | ] 59 | }, 60 | { 61 | "name": "w80x_tool", 62 | "version": "v1.0", 63 | "systems": [ 64 | { 65 | "host": "i686-mingw32", 66 | "url": "https://github.com.cnpmjs.org/Hi-LinkDuino/w80x_arduino/releases/download/v0.0.1/w80x_tool-mingw32-v1.0.zip", 67 | "archiveFileName": "w80x_tool-mingw32-v1.0.zip" 68 | } 69 | ] 70 | } 71 | ] 72 | } 73 | ] 74 | } 75 | -------------------------------------------------------------------------------- /platform.txt: -------------------------------------------------------------------------------- 1 | 2 | # Arduino W806 Core and platform. 3 | # ------------------------------ 4 | # 5 | # Part of the w806_duino project: https://github.com/nulllaborg/w806_duino 6 | # For more info on this file: 7 | # https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5-3rd-party-Hardware-specification 8 | 9 | name= W80x Boards 10 | version=0.1.0 11 | 12 | #runtime.tools.csky.path={runtime.hardware.path}/tools/csky-abiv2-elf-toolchain 13 | #runtime.tools.w80x_tool.path={runtime.hardware.path}/tools/w80x_tool 14 | 15 | compiler.warning_flags=-w 16 | compiler.warning_flags.none=-w 17 | compiler.warning_flags.default= 18 | compiler.warning_flags.more=-Wall 19 | compiler.warning_flags.all=-Wall -Wextra 20 | 21 | # Default "compiler.path" is correct, change only if you want to override the initial value 22 | compiler.path={runtime.tools.csky.path}/bin/ 23 | compiler.wrapper.path={runtime.tools.w80x_tool.path}/wrapper 24 | compiler.wrapper.path.windows={runtime.tools.w80x_tool.path}/win/busybox" ash "{runtime.tools.w80x_tool.path}/wrapper 25 | compiler.c.cmd=csky-elfabiv2-gcc 26 | compiler.c.flags=-mhard-float -DGCC_COMPILE=1 -O2 -g3 -Wall -ffunction-sections -fdata-sections -c 27 | 28 | compiler.c.elf.flags=-Wl,--gc-sections -Wl,-zmax-page-size=1024 -Wl,--whole-archive 29 | compiler.c.elf.cmd=csky-elfabiv2-gcc 30 | 31 | compiler.S.flags=-mhard-float -Wa,--gdwarf2 32 | 33 | compiler.cpp.cmd=csky-elfabiv2-g++ 34 | compiler.cpp.flags=-mhard-float -DGCC_COMPILE=1 -O2 -g3 -Wall -ffunction-sections -fdata-sections -c 35 | 36 | compiler.ar.cmd=csky-elfabiv2-gcc-ar 37 | compiler.ar.flags=ru 38 | 39 | compiler.objcopy.cmd=csky-elfabiv2-objcopy 40 | compiler.objcopy.eep.flags=-O ihex -j .eeprom --set-section-flags=.eeprom=alloc,load --no-change-warnings --change-section-lma .eeprom=0 41 | 42 | compiler.elf2bin.flags=-O binary 43 | compiler.elf2bin.cmd=csky-elfabiv2-objcopy 44 | compiler.ldflags=-lm -Wl,-T{build.core.path}/ld/gcc_csky.ld 45 | compiler.size.cmd=csky-elfabiv2-size 46 | 47 | # This can be overridden in boards.txt 48 | build.extra_flags= 49 | 50 | # These can be overridden in platform.local.txt 51 | compiler.c.extra_flags= 52 | compiler.c.elf.extra_flags=-Wl,--no-whole-archive -nostartfiles -mhard-float 53 | #compiler.S.extra_flags=-I{runtime.tools.csky.path}/csky-elfabiv2/include/csi/csi_core/csi_cdk/ -ID:/C-Sky/CDK/CSKY/csi/csi_core/include/ -ID:/C-Sky/CDK/CSKY/csi/csi_driver/include/ 54 | compiler.S.extra_flags= 55 | compiler.cpp.extra_flags= 56 | compiler.ar.extra_flags= 57 | compiler.objcopy.eep.extra_flags= 58 | compiler.elf2bin.extra_flags= 59 | compiler.includes="-I{runtime.tools.csky.path}/csky-elfabiv2/include" "-I{build.core.path}/include" "-I{build.core.path}/include/arch/{build.arch}" "-I{build.core.path}/include/arch/{build.arch}/csi_dsp" "-I{build.core.path}/include/arch/{build.arch}/csi_core" "-I{build.core.path}/include/driver" 60 | compiler.libs={build.core.path}/lib/libdsp.a {build.core.path}/lib/arch/{build.arch}/bsp/startup.o {build.core.path}/lib/arch/{build.arch}/bsp/__rt_entry.o {build.core.path}/lib/arch/{build.arch}/bsp/vectors.o 61 | 62 | # Build image 63 | img_type=1 64 | run_img_header=8010000 65 | run_img_pos=8010400 66 | upd_img_pos=8010000 67 | 68 | sec_img_header=8002000 69 | sec_img_pos=8002400 70 | 71 | build.tools.path.windows={runtime.tools.w80x_tool.path}/win/ 72 | 73 | # w806 compile patterns 74 | # -------------------- 75 | 76 | ## Compile c files 77 | recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" -c "{source_file}" -mcpu={build.mcpu} {compiler.c.flags} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DTLS_CONFIG_CPU_{build.arch}=1 {compiler.c.extra_flags} {build.extra_flags} {compiler.includes} {includes} -MMD -MP -MF {object_file}.d -MT {object_file} -o "{object_file}" 78 | 79 | ## Compile c++ files 80 | recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" -c "{source_file}" -mcpu={build.mcpu} {compiler.cpp.flags} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DTLS_CONFIG_CPU_{build.arch}=1 {compiler.cpp.extra_flags} {compiler.includes} {build.extra_flags} {includes} -MMD -MP -MF {object_file}.d -MT {object_file} -o "{object_file}" 81 | 82 | ## Compile S files 83 | recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" -c "{source_file}" -mcpu={build.mcpu} {compiler.S.flags} -MMD -MP -MT"{object_file}" -MF"{object_file}.d" -o "{object_file}" {compiler.S.extra_flags} {build.extra_flags} {compiler.includes} {includes} 84 | 85 | ## Create archives 86 | # archive_file_path is needed for backwards compatibility with IDE 1.6.5 or older, IDE 1.6.6 or newer overrides this value 87 | archive_file_path={build.path}/{archive_file} 88 | recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}" 89 | 90 | ## Combine gc-sections, archives, and objects 91 | recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} {object_files} {compiler.libs} {archive_file_path} {compiler.c.elf.extra_flags} -mcpu={build.mcpu} {compiler.ldflags} -Wl,--ckmap={build.path}/{build.project_name}.map -o "{build.path}/{build.project_name}.elf" 92 | #recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} {object_files} {archive_file_path} {build.core.path}/lib/libdsp.a {compiler.c.elf.extra_flags} -mcpu={build.mcpu} {compiler.ldflags} -Wl,--ckmap={build.path}/{build.project_name}.map -o "{build.path}/{build.project_name}.elf" 93 | 94 | ## Create output files (.elf and .bin) 95 | recipe.objcopy.bin.pattern="{compiler.path}{compiler.elf2bin.cmd}" {compiler.elf2bin.flags} {compiler.elf2bin.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.bin" 96 | #recipe.objcopy.eep.pattern="{runtime.tools.w80x_tool.path}/wm_tool.exe" -b {build.path}/{build.project_name}.bin -o {build.path}/{build.project_name} -it {img_type} -fc 0 -ra {run_img_pos} -ih {run_img_header} -ua {upd_img_pos} -nh 0 -un 0 97 | #recipe.objcopy.img.pattern="{runtime.tools.w80x_tool.path}/wm_tool.exe" -b {build.tools.path}/W806_secboot.bin -o {build.path}/{build.project_name}_secboot -it 0 -fc 0 -ra {sec_img_pos} -ih {sec_img_header} -ua {upd_img_pos} -nh {run_img_header} -un 0 & type "{build.path}\{build.project_name}_secboot.img" {build.path}\{build.project_name}.img > {build.path}\{build.project_name}.fls 98 | recipe.objcopy.fls.pattern="{build.tools.path}/build" "{build.tools.path}/wm_tool.exe" {build.path}\{build.project_name} {build.tools.path}\W806_secboot.bin 99 | 100 | ## Save bin 101 | recipe.output.tmp_file={build.project_name}.bin 102 | recipe.output.save_file={build.project_name}.{build.variant}.bin 103 | 104 | ## Compute size 105 | recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf" 106 | recipe.size.regex=^(?:\.text|\.data|\.bootloader)\s+([0-9]+).* 107 | recipe.size.regex.data=^(?:\.data|\.bss|\.noinit)\s+([0-9]+).* 108 | recipe.size.regex.eeprom=^(?:\.eeprom)\s+([0-9]+).* 109 | 110 | ## Preprocessor 111 | preproc.includes.flags=-w -x c++ -M -MG -MP 112 | recipe.preproc.includes="{compiler.path}{compiler.cpp.cmd}" -mcpu={build.mcpu} {compiler.cpp.flags} {preproc.includes.flags} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DTLS_CONFIG_CPU_{build.arch}=1 {compiler.cpp.extra_flags} {build.extra_flags} {compiler.libs.c.flags} {includes} "{source_file}" 113 | 114 | #preproc.macros.flags=-w -x c++ -E -CC 115 | preproc.macros.flags= 116 | recipe.preproc.macros="{compiler.path}{compiler.cpp.cmd}" -mcpu={build.mcpu} {compiler.cpp.flags} {preproc.macros.flags} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DTLS_CONFIG_CPU_{build.arch}=1 {compiler.cpp.extra_flags} {compiler.libs.c.flags} {build.extra_flags} {includes} "{source_file}" -o "{preprocessed_file_path}" 117 | 118 | # W806 Uploader tools 119 | # ------------------------------ 120 | 121 | tools.serial_upload.path={runtime.tools.w80x_tool.path}/win/ 122 | tools.serial_upload.cmd.path={path}/wm_tool.exe 123 | 124 | tools.serial_upload.upload.params.verbose=-c 125 | tools.serial_upload.upload.params.quiet=-q -q 126 | # tools.avrdude.upload.verify is needed for backwards compatibility with IDE 1.6.8 or older, IDE 1.6.9 or newer overrides this value 127 | tools.serial_upload.upload.verify= 128 | tools.serial_upload.upload.params.noverify=-V 129 | tools.serial_upload.upload.pattern="{cmd.path}" {upload.params.verbose} {serial.port} -ws 115200 -ds {upload.speed} -dl "{build.path}/{build.project_name}.fls" 130 | -------------------------------------------------------------------------------- /variants/w806/pins_arduino.h: -------------------------------------------------------------------------------- 1 | /* 2 | pins_arduino.h - Pin definition functions for Arduino 3 | Part of Arduino - http://www.arduino.cc/ 4 | 5 | Copyright (c) 2007 David A. Mellis 6 | 7 | This library is free software; you can redistribute it and/or 8 | modify it under the terms of the GNU Lesser General Public 9 | License as published by the Free Software Foundation; either 10 | version 2.1 of the License, or (at your option) any later version. 11 | 12 | This library is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 | Lesser General Public License for more details. 16 | 17 | You should have received a copy of the GNU Lesser General 18 | Public License along with this library; if not, write to the 19 | Free Software Foundation, Inc., 59 Temple Place, Suite 330, 20 | Boston, MA 02111-1307 USA 21 | */ 22 | 23 | #ifndef Pins_Arduino_h 24 | #define Pins_Arduino_h 25 | 26 | #include "variant.h" 27 | 28 | #define PIOA ((GPIO_TypeDef *)GPIOA_BASE) 29 | #define PIOB ((GPIO_TypeDef *)GPIOB_BASE) 30 | 31 | #define PA0 0 32 | #define PA1 1 33 | #define PA2 2 34 | #define PA3 3 35 | #define PA4 4 36 | #define PA5 5 37 | #define PA6 6 38 | #define PA7 7 39 | #define PA8 8 40 | #define PA9 9 41 | #define PA10 10 42 | #define PA11 11 43 | #define PA12 12 44 | #define PA13 13 45 | #define PA14 14 46 | #define PA15 15 47 | 48 | #define PB0 16 49 | #define PB1 17 50 | #define PB2 18 51 | #define PB3 19 52 | #define PB4 20 53 | #define PB5 21 54 | #define PB6 22 55 | #define PB7 23 56 | #define PB8 24 57 | #define PB9 25 58 | #define PB10 26 59 | #define PB11 27 60 | #define PB12 28 61 | #define PB13 29 62 | #define PB14 30 63 | #define PB15 31 64 | #define PB16 32 65 | #define PB17 33 66 | #define PB18 34 67 | #define PB19 35 68 | #define PB20 36 69 | #define PB21 37 70 | #define PB22 38 71 | #define PB23 39 72 | #define PB24 40 73 | #define PB25 41 74 | #define PB26 42 75 | 76 | #define A0 PA1 77 | #define A1 PA4 78 | #define A2 PA3 79 | #define A3 PA2 80 | //#define PA##n (n) 81 | //#define PB##n (16+n) 82 | 83 | /* 84 | #ifndef _BV 85 | #define _BV(X) (1<<(X)) 86 | #endif 87 | 88 | __code uint8_t digital_pin_to_pwm_PGM[] = { 89 | NOT_ON_PWM, //PIN00 90 | NOT_ON_PWM, 91 | NOT_ON_PWM, 92 | NOT_ON_PWM, 93 | NOT_ON_PWM, 94 | NOT_ON_PWM, 95 | NOT_ON_PWM, 96 | NOT_ON_PWM, 97 | NOT_ON_PWM, //not exist 98 | NOT_ON_PWM, //not exist 99 | 100 | NOT_ON_PWM, //PIN10 101 | NOT_ON_PWM, 102 | NOT_ON_PWM, 103 | NOT_ON_PWM, 104 | NOT_ON_PWM, 105 | PIN_PWM1, 106 | NOT_ON_PWM, 107 | NOT_ON_PWM, 108 | NOT_ON_PWM, //not exist 109 | NOT_ON_PWM, //not exist 110 | 111 | NOT_ON_PWM, //PIN20 112 | NOT_ON_PWM, 113 | NOT_ON_PWM, 114 | NOT_ON_PWM, 115 | NOT_ON_PWM, 116 | NOT_ON_PWM, 117 | NOT_ON_PWM, 118 | NOT_ON_PWM, 119 | NOT_ON_PWM, //not exist 120 | NOT_ON_PWM, //not exist 121 | 122 | PIN_PWM1_, //PIN30 123 | PIN_PWM2_, 124 | NOT_ON_PWM, 125 | NOT_ON_PWM, 126 | PIN_PWM2, 127 | NOT_ON_PWM, 128 | NOT_ON_PWM, 129 | NOT_ON_PWM, 130 | NOT_ON_PWM, //not exist 131 | NOT_ON_PWM, //not exist 132 | }; 133 | 134 | __code uint8_t PROGMEM digital_pin_to_port_PGM[] = { 135 | GPIOA, //PA0 136 | GPIOA, 137 | GPIOA, 138 | GPIOA, 139 | GPIOA, 140 | GPIOA, 141 | GPIOA, 142 | GPIOA, 143 | GPIOA, 144 | GPIOA, 145 | GPIOA, 146 | GPIOA, 147 | GPIOA, 148 | GPIOA, 149 | GPIOA, 150 | GPIOA, //PA15 151 | 152 | GPIOB, //PB0 153 | GPIOB, 154 | GPIOB, 155 | GPIOB, 156 | GPIOB, 157 | GPIOB, 158 | GPIOB, 159 | GPIOB, 160 | GPIOB, 161 | GPIOB, 162 | GPIOB, 163 | GPIOB, 164 | GPIOB, 165 | GPIOB, 166 | GPIOB, 167 | GPIOB, //PB15 168 | GPIOB, //PB16 169 | GPIOB, 170 | GPIOB, 171 | GPIOB, 172 | GPIOB, 173 | GPIOB, 174 | GPIOB, 175 | GPIOB, 176 | GPIOB, 177 | GPIOB, 178 | GPIOB, //PB26 179 | GPIOB, //PB27 180 | }; 181 | 182 | __code uint8_t digital_pin_to_bit_mask_PGM[] = { 183 | _BV(0), //PIN00 184 | _BV(1), 185 | _BV(2), 186 | _BV(3), 187 | _BV(4), 188 | _BV(5), 189 | _BV(6), 190 | _BV(7), 191 | 0, //not exist 192 | 0, //not exist 193 | 194 | _BV(0), //PIN10 195 | _BV(1), 196 | _BV(2), 197 | _BV(3), 198 | _BV(4), 199 | _BV(5), 200 | _BV(6), 201 | _BV(7), 202 | 0, //not exist 203 | 0, //not exist 204 | 205 | _BV(0), //PIN20 206 | _BV(1), 207 | _BV(2), 208 | _BV(3), 209 | _BV(4), 210 | _BV(5), 211 | _BV(6), 212 | _BV(7), 213 | 0, //not exist 214 | 0, //not exist 215 | 216 | _BV(0), //PIN30 217 | _BV(1), 218 | _BV(2), 219 | _BV(3), 220 | _BV(4), 221 | _BV(5), 222 | _BV(6), 223 | _BV(7), 224 | 0, //not exist 225 | 0, //not exist 226 | }; 227 | 228 | __code uint8_t digital_pin_to_channel_PGM[] = { 229 | NOT_ANALOG, //PIN00 230 | NOT_ANALOG, 231 | NOT_ANALOG, 232 | NOT_ANALOG, 233 | NOT_ANALOG, 234 | NOT_ANALOG, 235 | NOT_ANALOG, 236 | NOT_ANALOG, 237 | NOT_ANALOG, //not exist 238 | NOT_ANALOG, //not exist 239 | 240 | NOT_ANALOG, //PIN10 241 | 0, 242 | NOT_ANALOG, 243 | NOT_ANALOG, 244 | 1, 245 | 2, 246 | NOT_ANALOG, 247 | NOT_ANALOG, 248 | NOT_ANALOG, //not exist 249 | NOT_ANALOG, //not exist 250 | 251 | NOT_ANALOG, //PIN20 252 | NOT_ANALOG, 253 | NOT_ANALOG, 254 | NOT_ANALOG, 255 | NOT_ANALOG, 256 | NOT_ANALOG, 257 | NOT_ANALOG, 258 | NOT_ANALOG, 259 | NOT_ANALOG, //not exist 260 | NOT_ANALOG, //not exist 261 | 262 | NOT_ANALOG, //PIN30 263 | NOT_ANALOG, 264 | 3, 265 | NOT_ANALOG, 266 | NOT_ANALOG, 267 | NOT_ANALOG, 268 | NOT_ANALOG, 269 | NOT_ANALOG, 270 | NOT_ANALOG, //not exist 271 | NOT_ANALOG, //not exist 272 | }; 273 | */ 274 | 275 | #endif 276 | -------------------------------------------------------------------------------- /variants/w806/variant.cpp: -------------------------------------------------------------------------------- 1 | #include "variant.h" 2 | #include 3 | 4 | uint8_t g_pinStatus[PINS_COUNT] = {0}; 5 | 6 | /* 7 | uint8_t pPort ; 8 | uint32_t ulPin ; 9 | uint32_t ulPinType ; 10 | uint32_t ulPinAttribute ; 11 | EAnalogChannel ulAnalogChannel ; 12 | */ 13 | 14 | const PinDescription g_APinDescription[] = { 15 | { PIOA, GPIO_PIN_0, PIN_ATTR_DIGITAL|PIN_ATTR_ANALOG|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 16 | { PIOA, GPIO_PIN_1, PIN_ATTR_DIGITAL|PIN_ATTR_ANALOG|PIN_ATTR_PWM, ADC_Channel1, NOT_ON_PWM}, 17 | { PIOA, GPIO_PIN_2, PIN_ATTR_DIGITAL|PIN_ATTR_ANALOG|PIN_ATTR_PWM, ADC_Channel4, NOT_ON_PWM}, 18 | { PIOA, GPIO_PIN_3, PIN_ATTR_DIGITAL|PIN_ATTR_ANALOG|PIN_ATTR_PWM, ADC_Channel3, NOT_ON_PWM}, 19 | { PIOA, GPIO_PIN_4, PIN_ATTR_DIGITAL|PIN_ATTR_ANALOG|PIN_ATTR_PWM, ADC_Channel2, NOT_ON_PWM}, 20 | { PIOA, GPIO_PIN_5, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 21 | { PIOA, GPIO_PIN_6, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 22 | { PIOA, GPIO_PIN_7, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, PWM_CH4}, 23 | { PIOA, GPIO_PIN_8, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 24 | { PIOA, GPIO_PIN_9, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 25 | { PIOA, GPIO_PIN_10, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 26 | { PIOA, GPIO_PIN_11, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 27 | { PIOA, GPIO_PIN_12, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 28 | { PIOA, GPIO_PIN_13, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 29 | { PIOA, GPIO_PIN_14, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 30 | { PIOA, GPIO_PIN_15, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 31 | 32 | { PIOB, GPIO_PIN_0, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, PWM_CH0}, 33 | { PIOB, GPIO_PIN_1, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, PWM_CH1}, 34 | { PIOB, GPIO_PIN_2, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, PWM_CH2}, 35 | { PIOB, GPIO_PIN_3, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, PWM_CH3}, 36 | { PIOB, GPIO_PIN_4, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 37 | { PIOB, GPIO_PIN_5, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 38 | { PIOB, GPIO_PIN_6, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 39 | { PIOB, GPIO_PIN_7, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 40 | { PIOB, GPIO_PIN_8, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 41 | { PIOB, GPIO_PIN_9, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 42 | { PIOB, GPIO_PIN_10, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 43 | { PIOB, GPIO_PIN_11, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 44 | { PIOB, GPIO_PIN_12, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 45 | { PIOB, GPIO_PIN_13, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 46 | { PIOB, GPIO_PIN_14, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 47 | { PIOB, GPIO_PIN_15, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 48 | { PIOB, GPIO_PIN_16, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 49 | { PIOB, GPIO_PIN_17, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 50 | { PIOB, GPIO_PIN_18, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 51 | { PIOB, GPIO_PIN_19, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 52 | { PIOB, GPIO_PIN_20, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 53 | { PIOB, GPIO_PIN_21, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 54 | { PIOB, GPIO_PIN_22, PIN_ATTR_DIGITAL, No_ADC_Channel, NOT_ON_PWM}, 55 | { PIOB, GPIO_PIN_23, PIN_ATTR_NONE, No_ADC_Channel, NOT_ON_PWM}, 56 | { PIOB, GPIO_PIN_24, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 57 | { PIOB, GPIO_PIN_25, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 58 | { PIOB, GPIO_PIN_26, PIN_ATTR_DIGITAL|PIN_ATTR_PWM, No_ADC_Channel, NOT_ON_PWM}, 59 | }; -------------------------------------------------------------------------------- /variants/w806/variant.h: -------------------------------------------------------------------------------- 1 | #ifndef _VARIANT_ARDUINO_W806_ 2 | #define _VARIANT_ARDUINO_W806_ 3 | #include "pins_arduino.h" 4 | #include "./include/driver/wm_hal.h" 5 | #define PINS_COUNT (42U) /*number of pins on hilink demo board*/ 6 | #define ADC_COUNT (4U) /*number of adc pins*/ 7 | #define PWM_COUNT (5U) /*number of pwm pins*/ 8 | 9 | 10 | /** 11 | * Pin Attributes to be OR-ed 12 | */ 13 | #define PIN_ATTR_NONE (0UL<<0) 14 | #define PIN_ATTR_COMBO (1UL<<0) 15 | #define PIN_ATTR_ANALOG (1UL<<1) 16 | #define PIN_ATTR_DIGITAL (1UL<<2) 17 | #define PIN_ATTR_PWM (1UL<<3) 18 | #define PIN_ATTR_TIMER (1UL<<4) 19 | #define PIN_ATTR_TIMER_ALT (1UL<<5) 20 | #define PIN_ATTR_EXTINT (1UL<<6) 21 | 22 | 23 | typedef enum _EAnalogChannel 24 | { 25 | No_ADC_Channel = -1, 26 | //ADC_Channel0 = 0, 27 | ADC_Channel1 = ADC_ANA_CR_CH_0, 28 | ADC_Channel2 = ADC_ANA_CR_CH_1, 29 | ADC_Channel3 = ADC_ANA_CR_CH_2, 30 | ADC_Channel4 = ADC_ANA_CR_CH_3, 31 | }EAnalogChannel; 32 | 33 | // Definitions for PWM channels 34 | typedef enum _EPWMChannel 35 | { 36 | NOT_ON_PWM = -1, 37 | PWM_CH0 = 0, 38 | PWM_CH1 = 1, 39 | PWM_CH2 = 2, 40 | PWM_CH3 = 3, 41 | PWM_CH4 = 4, 42 | } EPWMChannel ; 43 | 44 | /* Types used for the tables below */ 45 | typedef struct _PinDescription 46 | { 47 | GPIO_TypeDef * pPort ; 48 | uint32_t ulPin ; /*pin number*/ 49 | //uint8_t ulPinType ; 50 | //uint32_t ulPeripheralId ; 51 | //uint32_t ulPinConfiguration ; 52 | uint32_t ulPinAttribute ; 53 | EAnalogChannel ulAnalogChannel ; /* Analog pin in the Arduino context (label on the board) */ 54 | EPWMChannel ulPWMChannel ; /* PWM pin in the Arduino context (label on the board) */ 55 | //ETCChannel ulTCChannel ; 56 | } PinDescription ; 57 | 58 | 59 | extern uint8_t g_pinStatus[]; 60 | /* Pins table to be instanciated into variant.cpp */ 61 | extern const PinDescription g_APinDescription[] ; 62 | 63 | #endif /* _VARIANT_ARDUINO_W806_ */ --------------------------------------------------------------------------------