├── .gitignore ├── user ├── user_config.h └── user_main.c ├── README.md ├── driver ├── Makefile └── uart.c ├── include └── driver │ ├── uart.h │ └── uart_register.h └── Makefile /.gitignore: -------------------------------------------------------------------------------- 1 | build/ 2 | firmware/ 3 | *.swp 4 | -------------------------------------------------------------------------------- /user/user_config.h: -------------------------------------------------------------------------------- 1 | #define CHANNEL_HOP_INTERVAL 5000 2 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | ESP8266 Monitor app 2 | =================== 3 | 4 | First try at ESP8266 programming. 5 | 6 | Notes to future self: 7 | - `esptool` and `esptool.py` are two completely different pieces of software. 8 | - Back then I found it rather clean to store SDK/Toolchain in some path other 9 | than `/opt/Espressif`, and put `export {XTENSA_TOOLS_ROOT,SDK_BASE,ESPTOOL,ESPPORT,FW_TOOL}` 10 | into my environment. 11 | - Following links may be considered friendly: 12 | - https://github.com/esp8266/esp8266-wiki/wiki/Toolchain 13 | - http://bbs.espressif.com/ (http://bbs.espressif.com/viewforum.php?f=5 in 14 | particular) 15 | - https://github.com/3s1d/esp_prog (oh, and, by the way, that was my first 16 | idea after getting my module, but had no time to play with it for a couple 17 | of weeks... :P) 18 | - I somehow managed to break my ESP-01, so it fails to power up on `CH_PD`, if 19 | not pushed down onto the table. Don't ask. 20 | -------------------------------------------------------------------------------- /driver/Makefile: -------------------------------------------------------------------------------- 1 | 2 | ############################################################# 3 | # Required variables for each makefile 4 | # Discard this section from all parent makefiles 5 | # Expected variables (with automatic defaults): 6 | # CSRCS (all "C" files in the dir) 7 | # SUBDIRS (all subdirs with a Makefile) 8 | # GEN_LIBS - list of libs to be generated () 9 | # GEN_IMAGES - list of images to be generated () 10 | # COMPONENTS_xxx - a list of libs/objs in the form 11 | # subdir/lib to be extracted and rolled up into 12 | # a generated lib/image xxx.a () 13 | # 14 | ifndef PDIR 15 | GEN_LIBS = libdriver.a 16 | endif 17 | 18 | 19 | ############################################################# 20 | # Configuration i.e. compile options etc. 21 | # Target specific stuff (defines etc.) goes in here! 22 | # Generally values applying to a tree are captured in the 23 | # makefile at its root level - these are then overridden 24 | # for a subtree within the makefile rooted therein 25 | # 26 | #DEFINES += 27 | 28 | ############################################################# 29 | # Recursion Magic - Don't touch this!! 30 | # 31 | # Each subtree potentially has an include directory 32 | # corresponding to the common APIs applicable to modules 33 | # rooted at that subtree. Accordingly, the INCLUDE PATH 34 | # of a module can only contain the include directories up 35 | # its parent path, and not its siblings 36 | # 37 | # Required for each makefile to inherit from the parent 38 | # 39 | 40 | INCLUDES := $(INCLUDES) -I $(PDIR)include 41 | INCLUDES += -I ./ 42 | PDIR := ../$(PDIR) 43 | sinclude $(PDIR)Makefile 44 | 45 | -------------------------------------------------------------------------------- /user/user_main.c: -------------------------------------------------------------------------------- 1 | #include "ets_sys.h" 2 | #include "osapi.h" 3 | #include "gpio.h" 4 | #include "os_type.h" 5 | #include "user_config.h" 6 | #include "user_interface.h" 7 | #include "driver/uart.h" 8 | 9 | #define user_procTaskPrio 0 10 | #define user_procTaskQueueLen 1 11 | os_event_t user_procTaskQueue[user_procTaskQueueLen]; 12 | static volatile os_timer_t channelHop_timer; 13 | 14 | static void loop(os_event_t *events); 15 | static void promisc_cb(uint8 *buf, uint16 len); 16 | 17 | #define printmac(buf, i) os_printf("\t%02X:%02X:%02X:%02X:%02X:%02X", buf[i+0], buf[i+1], buf[i+2], \ 18 | buf[i+3], buf[i+4], buf[i+5]) 19 | 20 | void channelHop(void *arg) 21 | { 22 | // 1 - 13 channel hopping 23 | uint8 new_channel = wifi_get_channel() % 12 + 1; 24 | os_printf("** hop to %d **\n", new_channel); 25 | wifi_set_channel(new_channel); 26 | } 27 | 28 | static void ICACHE_FLASH_ATTR 29 | promisc_cb(uint8 *buf, uint16 len) 30 | { 31 | os_printf("-> %3d: %d", wifi_get_channel(), len); 32 | printmac(buf, 4); 33 | printmac(buf, 10); 34 | printmac(buf, 16); 35 | os_printf("\n"); 36 | } 37 | 38 | //Main code function 39 | static void ICACHE_FLASH_ATTR 40 | loop(os_event_t *events) 41 | { 42 | os_delay_us(10); 43 | } 44 | 45 | //Init function 46 | void ICACHE_FLASH_ATTR 47 | user_init() 48 | { 49 | uart_init(115200, 115200); 50 | os_delay_us(100); 51 | 52 | uart0_sendStr("*** Monitor mode test ***\r\n"); 53 | 54 | os_printf(" -> Promisc mode setup ... "); 55 | wifi_set_promiscuous_rx_cb(promisc_cb); 56 | wifi_promiscuous_enable(1); 57 | os_printf("done.\n"); 58 | 59 | os_printf(" -> Timer setup ... "); 60 | os_timer_disarm(&channelHop_timer); 61 | os_timer_setfn(&channelHop_timer, (os_timer_func_t *) channelHop, NULL); 62 | os_timer_arm(&channelHop_timer, CHANNEL_HOP_INTERVAL, 1); 63 | os_printf("done.\n"); 64 | 65 | os_printf(" -> Set opmode ... "); 66 | wifi_set_opmode( 0x1 ); 67 | os_printf("done.\n"); 68 | 69 | //Start os task 70 | system_os_task(loop, user_procTaskPrio,user_procTaskQueue, user_procTaskQueueLen); 71 | 72 | os_printf(" -> Init finished!\n\n"); 73 | } 74 | -------------------------------------------------------------------------------- /include/driver/uart.h: -------------------------------------------------------------------------------- 1 | #ifndef UART_APP_H 2 | #define UART_APP_H 3 | 4 | #include "uart_register.h" 5 | #include "eagle_soc.h" 6 | #include "c_types.h" 7 | 8 | #define RX_BUFF_SIZE 256 9 | #define TX_BUFF_SIZE 100 10 | #define UART0 0 11 | #define UART1 1 12 | 13 | typedef enum { 14 | FIVE_BITS = 0x0, 15 | SIX_BITS = 0x1, 16 | SEVEN_BITS = 0x2, 17 | EIGHT_BITS = 0x3 18 | } UartBitsNum4Char; 19 | 20 | typedef enum { 21 | ONE_STOP_BIT = 0, 22 | ONE_HALF_STOP_BIT = BIT2, 23 | TWO_STOP_BIT = BIT2 24 | } UartStopBitsNum; 25 | 26 | typedef enum { 27 | NONE_BITS = 0, 28 | ODD_BITS = 0, 29 | EVEN_BITS = BIT4 30 | } UartParityMode; 31 | 32 | typedef enum { 33 | STICK_PARITY_DIS = 0, 34 | STICK_PARITY_EN = BIT3 | BIT5 35 | } UartExistParity; 36 | 37 | typedef enum { 38 | BIT_RATE_9600 = 9600, 39 | BIT_RATE_19200 = 19200, 40 | BIT_RATE_38400 = 38400, 41 | BIT_RATE_57600 = 57600, 42 | BIT_RATE_74880 = 74880, 43 | BIT_RATE_115200 = 115200, 44 | BIT_RATE_230400 = 230400, 45 | BIT_RATE_460800 = 460800, 46 | BIT_RATE_921600 = 921600 47 | } UartBautRate; 48 | 49 | typedef enum { 50 | NONE_CTRL, 51 | HARDWARE_CTRL, 52 | XON_XOFF_CTRL 53 | } UartFlowCtrl; 54 | 55 | typedef enum { 56 | EMPTY, 57 | UNDER_WRITE, 58 | WRITE_OVER 59 | } RcvMsgBuffState; 60 | 61 | typedef struct { 62 | uint32 RcvBuffSize; 63 | uint8 *pRcvMsgBuff; 64 | uint8 *pWritePos; 65 | uint8 *pReadPos; 66 | uint8 TrigLvl; //JLU: may need to pad 67 | RcvMsgBuffState BuffState; 68 | } RcvMsgBuff; 69 | 70 | typedef struct { 71 | uint32 TrxBuffSize; 72 | uint8 *pTrxBuff; 73 | } TrxMsgBuff; 74 | 75 | typedef enum { 76 | BAUD_RATE_DET, 77 | WAIT_SYNC_FRM, 78 | SRCH_MSG_HEAD, 79 | RCV_MSG_BODY, 80 | RCV_ESC_CHAR, 81 | } RcvMsgState; 82 | 83 | typedef struct { 84 | UartBautRate baut_rate; 85 | UartBitsNum4Char data_bits; 86 | UartExistParity exist_parity; 87 | UartParityMode parity; // chip size in byte 88 | UartStopBitsNum stop_bits; 89 | UartFlowCtrl flow_ctrl; 90 | RcvMsgBuff rcv_buff; 91 | TrxMsgBuff trx_buff; 92 | RcvMsgState rcv_state; 93 | int received; 94 | int buff_uart_no; //indicate which uart use tx/rx buffer 95 | } UartDevice; 96 | 97 | void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); 98 | void uart0_sendStr(const char *str); 99 | 100 | #endif 101 | 102 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # Changelog 2 | # Changed the variables to include the header file directory 3 | # Added global var for the XTENSA tool root 4 | # 5 | # This make file still needs some work. 6 | # 7 | # 8 | # Output directors to store intermediate compiled files 9 | # relative to the project directory 10 | BUILD_BASE = build 11 | FW_BASE = firmware 12 | 13 | # Base directory for the compiler 14 | XTENSA_TOOLS_ROOT ?= /opt/Espressif/crosstool-NG/builds/xtensa-lx106-elf/bin 15 | 16 | # base directory of the ESP8266 SDK package, absolute 17 | SDK_BASE ?= /opt/Espressif/ESP8266_SDK 18 | 19 | #Esptool.py path and port 20 | ESPTOOL ?= esptool.py 21 | ESPPORT ?= /dev/ttyUSB0 22 | 23 | # name for the target project 24 | TARGET = app 25 | 26 | # which modules (subdirectories) of the project to include in compiling 27 | MODULES = driver user 28 | EXTRA_INCDIR = include $(SDK_BASE)/../include 29 | 30 | # libraries used in this project, mainly provided by the SDK 31 | LIBS = c gcc hal phy pp net80211 lwip wpa main 32 | 33 | # compiler flags using during compilation of source files 34 | CFLAGS = -Os -g -O2 -Wpointer-arith -Wundef -Werror -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mtext-section-literals -D__ets__ -DICACHE_FLASH 35 | 36 | # linker flags used to generate the main object file 37 | LDFLAGS = -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static 38 | 39 | # linker script used for the above linkier step 40 | LD_SCRIPT = eagle.app.v6.ld 41 | 42 | # various paths from the SDK used in this project 43 | SDK_LIBDIR = lib 44 | SDK_LDDIR = ld 45 | SDK_INCDIR = include include/json 46 | 47 | # we create two different files for uploading into the flash 48 | # these are the names and options to generate them 49 | FW_FILE_1 = 0x00000 50 | FW_FILE_1_ARGS = -bo $@ -bs .text -bs .data -bs .rodata -bc -ec 51 | FW_FILE_2 = 0x40000 52 | FW_FILE_2_ARGS = -es .irom0.text $@ -ec 53 | 54 | # select which tools to use as compiler, librarian and linker 55 | CC := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc 56 | AR := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-ar 57 | LD := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc 58 | 59 | 60 | 61 | #### 62 | #### no user configurable options below here 63 | #### 64 | FW_TOOL ?= /usr/bin/esptool 65 | SRC_DIR := $(MODULES) 66 | BUILD_DIR := $(addprefix $(BUILD_BASE)/,$(MODULES)) 67 | 68 | SDK_LIBDIR := $(addprefix $(SDK_BASE)/,$(SDK_LIBDIR)) 69 | SDK_INCDIR := $(addprefix -I$(SDK_BASE)/,$(SDK_INCDIR)) 70 | 71 | SRC := $(foreach sdir,$(SRC_DIR),$(wildcard $(sdir)/*.c)) 72 | OBJ := $(patsubst %.c,$(BUILD_BASE)/%.o,$(SRC)) 73 | LIBS := $(addprefix -l,$(LIBS)) 74 | APP_AR := $(addprefix $(BUILD_BASE)/,$(TARGET)_app.a) 75 | TARGET_OUT := $(addprefix $(BUILD_BASE)/,$(TARGET).out) 76 | 77 | LD_SCRIPT := $(addprefix -T$(SDK_BASE)/$(SDK_LDDIR)/,$(LD_SCRIPT)) 78 | 79 | INCDIR := $(addprefix -I,$(SRC_DIR)) 80 | EXTRA_INCDIR := $(addprefix -I,$(EXTRA_INCDIR)) 81 | MODULE_INCDIR := $(addsuffix /include,$(INCDIR)) 82 | 83 | FW_FILE_1 := $(addprefix $(FW_BASE)/,$(FW_FILE_1).bin) 84 | FW_FILE_2 := $(addprefix $(FW_BASE)/,$(FW_FILE_2).bin) 85 | 86 | V ?= $(VERBOSE) 87 | ifeq ("$(V)","1") 88 | Q := 89 | vecho := @true 90 | else 91 | Q := @ 92 | vecho := @echo 93 | endif 94 | 95 | vpath %.c $(SRC_DIR) 96 | 97 | define compile-objects 98 | $1/%.o: %.c 99 | $(vecho) "CC $$<" 100 | $(Q) $(CC) $(INCDIR) $(MODULE_INCDIR) $(EXTRA_INCDIR) $(SDK_INCDIR) $(CFLAGS) -c $$< -o $$@ 101 | endef 102 | 103 | .PHONY: all checkdirs clean 104 | 105 | all: checkdirs $(TARGET_OUT) $(FW_FILE_1) $(FW_FILE_2) 106 | 107 | $(FW_FILE_1): $(TARGET_OUT) 108 | $(vecho) "FW $@" 109 | $(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_1_ARGS) 110 | 111 | $(FW_FILE_2): $(TARGET_OUT) 112 | $(vecho) "FW $@" 113 | $(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_2_ARGS) 114 | 115 | $(TARGET_OUT): $(APP_AR) 116 | $(vecho) "LD $@" 117 | $(Q) $(LD) -L$(SDK_LIBDIR) $(LD_SCRIPT) $(LDFLAGS) -Wl,--start-group $(LIBS) $(APP_AR) -Wl,--end-group -o $@ 118 | 119 | $(APP_AR): $(OBJ) 120 | $(vecho) "AR $@" 121 | $(Q) $(AR) cru $@ $^ 122 | 123 | checkdirs: $(BUILD_DIR) $(FW_BASE) 124 | 125 | $(BUILD_DIR): 126 | $(Q) mkdir -p $@ 127 | 128 | firmware: 129 | $(Q) mkdir -p $@ 130 | 131 | flash: firmware/0x00000.bin firmware/0x40000.bin 132 | -$(ESPTOOL) --port $(ESPPORT) write_flash 0x40000 firmware/0x40000.bin 133 | sleep 3 134 | -$(ESPTOOL) --port $(ESPPORT) write_flash 0x00000 firmware/0x00000.bin 135 | 136 | test: flash 137 | screen $(ESPPORT) 115200 138 | 139 | clean: 140 | $(Q) rm -f $(APP_AR) 141 | $(Q) rm -f $(TARGET_OUT) 142 | $(Q) rm -rf $(BUILD_DIR) 143 | $(Q) rm -rf $(BUILD_BASE) 144 | 145 | 146 | $(Q) rm -f $(FW_FILE_1) 147 | $(Q) rm -f $(FW_FILE_2) 148 | $(Q) rm -rf $(FW_BASE) 149 | 150 | $(foreach bdir,$(BUILD_DIR),$(eval $(call compile-objects,$(bdir)))) 151 | -------------------------------------------------------------------------------- /include/driver/uart_register.h: -------------------------------------------------------------------------------- 1 | //Generated at 2012-07-03 18:44:06 2 | /* 3 | * Copyright (c) 2010 - 2011 Espressif System 4 | * 5 | */ 6 | 7 | #ifndef UART_REGISTER_H_INCLUDED 8 | #define UART_REGISTER_H_INCLUDED 9 | #define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) 10 | //version value:32'h062000 11 | 12 | #define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) 13 | #define UART_RXFIFO_RD_BYTE 0x000000FF 14 | #define UART_RXFIFO_RD_BYTE_S 0 15 | 16 | #define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) 17 | #define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) 18 | #define UART_BRK_DET_INT_RAW (BIT(7)) 19 | #define UART_CTS_CHG_INT_RAW (BIT(6)) 20 | #define UART_DSR_CHG_INT_RAW (BIT(5)) 21 | #define UART_RXFIFO_OVF_INT_RAW (BIT(4)) 22 | #define UART_FRM_ERR_INT_RAW (BIT(3)) 23 | #define UART_PARITY_ERR_INT_RAW (BIT(2)) 24 | #define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) 25 | #define UART_RXFIFO_FULL_INT_RAW (BIT(0)) 26 | 27 | #define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) 28 | #define UART_RXFIFO_TOUT_INT_ST (BIT(8)) 29 | #define UART_BRK_DET_INT_ST (BIT(7)) 30 | #define UART_CTS_CHG_INT_ST (BIT(6)) 31 | #define UART_DSR_CHG_INT_ST (BIT(5)) 32 | #define UART_RXFIFO_OVF_INT_ST (BIT(4)) 33 | #define UART_FRM_ERR_INT_ST (BIT(3)) 34 | #define UART_PARITY_ERR_INT_ST (BIT(2)) 35 | #define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) 36 | #define UART_RXFIFO_FULL_INT_ST (BIT(0)) 37 | 38 | #define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) 39 | #define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) 40 | #define UART_BRK_DET_INT_ENA (BIT(7)) 41 | #define UART_CTS_CHG_INT_ENA (BIT(6)) 42 | #define UART_DSR_CHG_INT_ENA (BIT(5)) 43 | #define UART_RXFIFO_OVF_INT_ENA (BIT(4)) 44 | #define UART_FRM_ERR_INT_ENA (BIT(3)) 45 | #define UART_PARITY_ERR_INT_ENA (BIT(2)) 46 | #define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) 47 | #define UART_RXFIFO_FULL_INT_ENA (BIT(0)) 48 | 49 | #define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) 50 | #define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) 51 | #define UART_BRK_DET_INT_CLR (BIT(7)) 52 | #define UART_CTS_CHG_INT_CLR (BIT(6)) 53 | #define UART_DSR_CHG_INT_CLR (BIT(5)) 54 | #define UART_RXFIFO_OVF_INT_CLR (BIT(4)) 55 | #define UART_FRM_ERR_INT_CLR (BIT(3)) 56 | #define UART_PARITY_ERR_INT_CLR (BIT(2)) 57 | #define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) 58 | #define UART_RXFIFO_FULL_INT_CLR (BIT(0)) 59 | 60 | #define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) 61 | #define UART_CLKDIV_CNT 0x000FFFFF 62 | #define UART_CLKDIV_S 0 63 | 64 | #define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) 65 | #define UART_GLITCH_FILT 0x000000FF 66 | #define UART_GLITCH_FILT_S 8 67 | #define UART_AUTOBAUD_EN (BIT(0)) 68 | 69 | #define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) 70 | #define UART_TXD (BIT(31)) 71 | #define UART_RTSN (BIT(30)) 72 | #define UART_DTRN (BIT(29)) 73 | #define UART_TXFIFO_CNT 0x000000FF 74 | #define UART_TXFIFO_CNT_S 16 75 | #define UART_RXD (BIT(15)) 76 | #define UART_CTSN (BIT(14)) 77 | #define UART_DSRN (BIT(13)) 78 | #define UART_RXFIFO_CNT 0x000000FF 79 | #define UART_RXFIFO_CNT_S 0 80 | 81 | #define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) 82 | #define UART_TXFIFO_RST (BIT(18)) 83 | #define UART_RXFIFO_RST (BIT(17)) 84 | #define UART_IRDA_EN (BIT(16)) 85 | #define UART_TX_FLOW_EN (BIT(15)) 86 | #define UART_LOOPBACK (BIT(14)) 87 | #define UART_IRDA_RX_INV (BIT(13)) 88 | #define UART_IRDA_TX_INV (BIT(12)) 89 | #define UART_IRDA_WCTL (BIT(11)) 90 | #define UART_IRDA_TX_EN (BIT(10)) 91 | #define UART_IRDA_DPLX (BIT(9)) 92 | #define UART_TXD_BRK (BIT(8)) 93 | #define UART_SW_DTR (BIT(7)) 94 | #define UART_SW_RTS (BIT(6)) 95 | #define UART_STOP_BIT_NUM 0x00000003 96 | #define UART_STOP_BIT_NUM_S 4 97 | #define UART_BIT_NUM 0x00000003 98 | #define UART_BIT_NUM_S 2 99 | #define UART_PARITY_EN (BIT(1)) 100 | #define UART_PARITY (BIT(0)) 101 | 102 | #define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) 103 | #define UART_RX_TOUT_EN (BIT(31)) 104 | #define UART_RX_TOUT_THRHD 0x0000007F 105 | #define UART_RX_TOUT_THRHD_S 24 106 | #define UART_RX_FLOW_EN (BIT(23)) 107 | #define UART_RX_FLOW_THRHD 0x0000007F 108 | #define UART_RX_FLOW_THRHD_S 16 109 | #define UART_TXFIFO_EMPTY_THRHD 0x0000007F 110 | #define UART_TXFIFO_EMPTY_THRHD_S 8 111 | #define UART_RXFIFO_FULL_THRHD 0x0000007F 112 | #define UART_RXFIFO_FULL_THRHD_S 0 113 | 114 | #define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) 115 | #define UART_LOWPULSE_MIN_CNT 0x000FFFFF 116 | #define UART_LOWPULSE_MIN_CNT_S 0 117 | 118 | #define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) 119 | #define UART_HIGHPULSE_MIN_CNT 0x000FFFFF 120 | #define UART_HIGHPULSE_MIN_CNT_S 0 121 | 122 | #define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) 123 | #define UART_PULSE_NUM_CNT 0x0003FF 124 | #define UART_PULSE_NUM_CNT_S 0 125 | 126 | #define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) 127 | #define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) 128 | #endif // UART_REGISTER_H_INCLUDED 129 | -------------------------------------------------------------------------------- /driver/uart.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * Copyright 2013-2014 Espressif Systems (Wuxi) 3 | * 4 | * FileName: uart.c 5 | * 6 | * Description: Two UART mode configration and interrupt handler. 7 | * Check your hardware connection while use this mode. 8 | * 9 | * Modification history: 10 | * 2014/3/12, v1.0 create this file. 11 | *******************************************************************************/ 12 | #include "ets_sys.h" 13 | #include "osapi.h" 14 | #include "driver/uart.h" 15 | 16 | #include "driver/uart_register.h" 17 | //#include "ssc.h" 18 | //#include "at.h" 19 | 20 | // UartDev is defined and initialized in rom code. 21 | extern UartDevice UartDev; 22 | //extern os_event_t at_recvTaskQueue[at_recvTaskQueueLen]; 23 | 24 | LOCAL void uart0_rx_intr_handler(void *para); 25 | 26 | /****************************************************************************** 27 | * FunctionName : uart_config 28 | * Description : Internal used function 29 | * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled 30 | * UART1 just used for debug output 31 | * Parameters : uart_no, use UART0 or UART1 defined ahead 32 | * Returns : NONE 33 | *******************************************************************************/ 34 | LOCAL void ICACHE_FLASH_ATTR 35 | uart_config(uint8 uart_no) 36 | { 37 | if (uart_no == UART1) 38 | { 39 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); 40 | } 41 | else 42 | { 43 | /* rcv_buff size if 0x100 */ 44 | ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); 45 | PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); 46 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); 47 | // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); 48 | } 49 | 50 | uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); 51 | 52 | WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity 53 | | UartDev.parity 54 | | (UartDev.stop_bits << UART_STOP_BIT_NUM_S) 55 | | (UartDev.data_bits << UART_BIT_NUM_S)); 56 | 57 | //clear rx and tx fifo,not ready 58 | SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); 59 | CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); 60 | 61 | //set rx fifo trigger 62 | // WRITE_PERI_REG(UART_CONF1(uart_no), 63 | // ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | 64 | // ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) | 65 | // UART_RX_FLOW_EN); 66 | if (uart_no == UART0) 67 | { 68 | //set rx fifo trigger 69 | WRITE_PERI_REG(UART_CONF1(uart_no), 70 | ((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | 71 | ((0x01 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | 72 | UART_RX_FLOW_EN); 73 | } 74 | else 75 | { 76 | WRITE_PERI_REG(UART_CONF1(uart_no), 77 | ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); 78 | } 79 | 80 | //clear all interrupt 81 | WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); 82 | //enable rx_interrupt 83 | SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); 84 | } 85 | 86 | /****************************************************************************** 87 | * FunctionName : uart1_tx_one_char 88 | * Description : Internal used function 89 | * Use uart1 interface to transfer one char 90 | * Parameters : uint8 TxChar - character to tx 91 | * Returns : OK 92 | *******************************************************************************/ 93 | LOCAL STATUS 94 | uart_tx_one_char(uint8 uart, uint8 TxChar) 95 | { 96 | while (true) 97 | { 98 | uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { 100 | break; 101 | } 102 | } 103 | 104 | WRITE_PERI_REG(UART_FIFO(uart) , TxChar); 105 | return OK; 106 | } 107 | 108 | /****************************************************************************** 109 | * FunctionName : uart0_write_char 110 | * Description : Internal used function 111 | * Do some special deal while tx char is '\r' or '\n' 112 | * Parameters : char c - character to tx 113 | * Returns : NONE 114 | *******************************************************************************/ 115 | LOCAL void ICACHE_FLASH_ATTR 116 | uart0_write_char(char c) 117 | { 118 | if (c == '\n') 119 | { 120 | uart_tx_one_char(UART0, '\r'); 121 | uart_tx_one_char(UART0, '\n'); 122 | } 123 | else if (c == '\r') 124 | { 125 | } 126 | else 127 | { 128 | uart_tx_one_char(UART0, c); 129 | } 130 | } 131 | /****************************************************************************** 132 | * FunctionName : uart0_tx_buffer 133 | * Description : use uart0 to transfer buffer 134 | * Parameters : uint8 *buf - point to send buffer 135 | * uint16 len - buffer len 136 | * Returns : 137 | *******************************************************************************/ 138 | void ICACHE_FLASH_ATTR 139 | uart0_tx_buffer(uint8 *buf, uint16 len) 140 | { 141 | uint16 i; 142 | 143 | for (i = 0; i < len; i++) 144 | { 145 | uart_tx_one_char(UART0, buf[i]); 146 | } 147 | } 148 | 149 | /****************************************************************************** 150 | * FunctionName : uart0_sendStr 151 | * Description : use uart0 to transfer buffer 152 | * Parameters : uint8 *buf - point to send buffer 153 | * uint16 len - buffer len 154 | * Returns : 155 | *******************************************************************************/ 156 | void uart0_sendStr(const char *str) 157 | { 158 | while(*str) 159 | { 160 | uart_tx_one_char(UART0, *str++); 161 | } 162 | } 163 | 164 | /****************************************************************************** 165 | * FunctionName : uart0_rx_intr_handler 166 | * Description : Internal used function 167 | * UART0 interrupt handler, add self handle code inside 168 | * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg 169 | * Returns : NONE 170 | *******************************************************************************/ 171 | //extern void at_recvTask(void); 172 | 173 | LOCAL void 174 | uart0_rx_intr_handler(void *para) 175 | { 176 | /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents 177 | * uart1 and uart0 respectively 178 | */ 179 | // RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para; 180 | // uint8 RcvChar; 181 | uint8 uart_no = UART0;//UartDev.buff_uart_no; 182 | 183 | // if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) 184 | // { 185 | // return; 186 | // } 187 | if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) 188 | { 189 | //at_recvTask(); 190 | WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR); 191 | } 192 | 193 | // WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR); 194 | 195 | // if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) 196 | // { 197 | // RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF; 198 | // at_recvTask(); 199 | // *(pRxBuff->pWritePos) = RcvChar; 200 | 201 | // system_os_post(at_recvTaskPrio, NULL, RcvChar); 202 | 203 | // //insert here for get one command line from uart 204 | // if (RcvChar == '\r') 205 | // { 206 | // pRxBuff->BuffState = WRITE_OVER; 207 | // } 208 | // 209 | // pRxBuff->pWritePos++; 210 | // 211 | // if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) 212 | // { 213 | // // overflow ...we may need more error handle here. 214 | // pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ; 215 | // } 216 | // } 217 | } 218 | 219 | /****************************************************************************** 220 | * FunctionName : uart_init 221 | * Description : user interface for init uart 222 | * Parameters : UartBautRate uart0_br - uart0 bautrate 223 | * UartBautRate uart1_br - uart1 bautrate 224 | * Returns : NONE 225 | *******************************************************************************/ 226 | void ICACHE_FLASH_ATTR 227 | uart_init(UartBautRate uart0_br, UartBautRate uart1_br) 228 | { 229 | // rom use 74880 baut_rate, here reinitialize 230 | UartDev.baut_rate = uart0_br; 231 | uart_config(UART0); 232 | UartDev.baut_rate = uart1_br; 233 | uart_config(UART1); 234 | ETS_UART_INTR_ENABLE(); 235 | 236 | // install uart1 putc callback 237 | os_install_putc1((void *)uart0_write_char); 238 | } 239 | 240 | void ICACHE_FLASH_ATTR 241 | uart_reattach() 242 | { 243 | uart_init(BIT_RATE_74880, BIT_RATE_74880); 244 | // ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff)); 245 | // ETS_UART_INTR_ENABLE(); 246 | } 247 | --------------------------------------------------------------------------------