├── Crypto
└── System_Security_Cryptography
│ ├── Managed
│ └── System.Security.Cryptography.Netmf.pe
│ └── Interop
│ ├── dotNetMF.proj
│ ├── System_Security_Cryptography_Netmf.h
│ ├── System.Security.Cryptography.Netmf.featureproj
│ ├── System_Security_Cryptography_Netmf.cpp
│ ├── System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.h
│ ├── System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random_mshl.cpp
│ └── System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.cpp
├── DeviceCode
├── Targets
│ └── Native
│ │ ├── STM32F4
│ │ ├── ManagedCode
│ │ │ ├── build.dirproj
│ │ │ ├── Hardware
│ │ │ │ ├── HardwareProvider.cs
│ │ │ │ └── STM32F4_hardware.csproj
│ │ │ └── SystemAssemblies.datproj
│ │ ├── DeviceCode
│ │ │ ├── dotNetMF.proj
│ │ │ ├── STM32F4_RTC
│ │ │ │ ├── RTC_decl.h
│ │ │ │ ├── Time_Pal_Rtc
│ │ │ │ │ ├── dotNetMF.proj
│ │ │ │ │ └── time_functions_rtc.cpp
│ │ │ │ ├── dotNetMF.proj
│ │ │ │ └── STM32F4_RTC_functions.cpp
│ │ │ ├── STM32F4_Random
│ │ │ │ ├── STM32F4_Random_functions.h
│ │ │ │ ├── STM32F4_Random_functions.cpp
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_Power
│ │ │ │ ├── STM32F4_Power_functions.h
│ │ │ │ ├── dotNetMF.proj
│ │ │ │ └── STM32F4_Power_functions.cpp
│ │ │ ├── STM32F4_ETH_lwip
│ │ │ │ ├── STM32F4_ETH_lwip_adapter.h
│ │ │ │ ├── STM32F4_ETH_gpio.h
│ │ │ │ ├── STM32F4_ETH_lwip.h
│ │ │ │ ├── STM32F4_ETH_phy.h
│ │ │ │ ├── STM32F4_ETH_tx_desc.h
│ │ │ │ ├── STM32F4_ETH_rx_desc.h
│ │ │ │ └── STM32F4_ETH_driver.h
│ │ │ ├── STM32F4_security
│ │ │ │ ├── STM32F4_security_functions.cpp
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_Flash
│ │ │ │ ├── STM32F4_Flash.h
│ │ │ │ ├── dotNetMF.proj
│ │ │ │ └── dotNetMF_x9.proj
│ │ │ ├── system_stm32f2xx.h
│ │ │ ├── system_stm32f4xx.h
│ │ │ ├── STM32F4_DA
│ │ │ │ ├── STM32F4_DA_functions.cpp
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_Analog
│ │ │ │ ├── STM32F4_AD_functions.cpp
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_Time
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_PWM
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_GPIO
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_USART
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_USB
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_SPI
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_I2C
│ │ │ │ └── dotNetMF.proj
│ │ │ ├── STM32F4_IntC
│ │ │ │ ├── dotNetMF.proj
│ │ │ │ └── STM32F4_intc_functions.cpp
│ │ │ └── STM32F4_Bootstrap
│ │ │ │ └── dotNetMF.proj
│ │ ├── dotNetMF.proj
│ │ ├── STM32F2.settings
│ │ ├── STM32F4.settings
│ │ └── processor_selector.h
│ │ └── STM32
│ │ ├── DeviceCode
│ │ └── CortexM3
│ │ │ ├── TinyHal
│ │ │ ├── GNU_S
│ │ │ │ ├── IDelayLoop.s
│ │ │ │ ├── VectorsHandlers.s
│ │ │ │ ├── FirstEntry.s
│ │ │ │ └── FirstEntryMinimal.s
│ │ │ └── Aborts.cpp
│ │ │ └── GlobalLock
│ │ │ └── SmartPtr_cortex_gnu.cpp
│ │ └── STM32.settings
└── Drivers
│ └── Oberon
│ ├── MX29
│ ├── dotNetMF.proj
│ └── MX29.h
│ ├── M25P16
│ ├── M25P16_Flash.h
│ └── dotNetMF.proj
│ ├── S25FL127S
│ ├── dotNetMF.proj
│ └── S25FL127S_Flash.h
│ ├── S25FL064K
│ ├── S25FL064K_Flash.h
│ └── dotNetMF.proj
│ └── Initialization
│ └── dotNetMF.proj
├── .gitattributes
├── Solutions
└── Discovery429
│ ├── TinyCLR
│ ├── GNU_S
│ │ └── tinyclr_dat.s
│ ├── RVD_S
│ │ └── tinyclr_dat.s
│ ├── allocator.cpp
│ └── tinyclr.cpp
│ ├── DeviceCode
│ ├── Blockstorage
│ │ ├── dotNetMF.proj
│ │ ├── addDevices
│ │ │ ├── Bl_addDevices.cpp
│ │ │ └── dotNetMF.proj
│ │ └── STM32F4
│ │ │ └── dotNetMF.proj
│ ├── MFUpdate_Config_PAL
│ │ ├── MFUpdate_config_Discovery429.cpp
│ │ └── dotNetMF.proj
│ ├── Init
│ │ └── dotNetMF.proj
│ └── USB
│ │ └── dotNetMF.proj
│ ├── dotNetMF.proj
│ ├── scatterfile_gcc_missing_symbols.xml
│ ├── Discovery429.settings
│ └── TinyBooter
│ ├── allocator.cpp
│ ├── scatterfile_bootloader_mdk.xml
│ └── scatterfile_bootloader_rvds.xml
├── .gitignore
└── CLR
└── Libraries
└── SPOT
└── spot_native_Microsoft_SPOT_Hardware_SystemInfo__SystemID.cpp
/Crypto/System_Security_Cryptography/Managed/System.Security.Cryptography.Netmf.pe:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/IngenuityMicro/NETMF-DISCO-429/HEAD/Crypto/System_Security_Cryptography/Managed/System.Security.Cryptography.Netmf.pe
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/ManagedCode/build.dirproj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 | false
6 |
7 |
8 |
9 |
--------------------------------------------------------------------------------
/.gitattributes:
--------------------------------------------------------------------------------
1 | # Auto detect text files and perform LF normalization
2 | * text=auto
3 |
4 | # Custom for Visual Studio
5 | *.cs diff=csharp
6 |
7 | # Standard to msysgit
8 | *.doc diff=astextplain
9 | *.DOC diff=astextplain
10 | *.docx diff=astextplain
11 | *.DOCX diff=astextplain
12 | *.dot diff=astextplain
13 | *.DOT diff=astextplain
14 | *.pdf diff=astextplain
15 | *.PDF diff=astextplain
16 | *.rtf diff=astextplain
17 | *.RTF diff=astextplain
18 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | DeviceCode\Targets\Native\STM32F4\DeviceCode
5 |
6 |
7 |
8 |
9 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/ManagedCode/Hardware/HardwareProvider.cs:
--------------------------------------------------------------------------------
1 | using System;
2 | using System.Threading;
3 | using System.Runtime.CompilerServices;
4 | using Microsoft.SPOT.Hardware;
5 |
6 | namespace Microsoft.SPOT.Hardware.STM32F4
7 | {
8 | internal class STM32F4HardwareProvider : HardwareProvider
9 | {
10 | static STM32F4HardwareProvider()
11 | {
12 | Microsoft.SPOT.Hardware.HardwareProvider.Register(new STM32F4HardwareProvider());
13 | }
14 | }
15 | }
16 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/TinyCLR/GNU_S/tinyclr_dat.s:
--------------------------------------------------------------------------------
1 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2 | @ Copyright (c) Microsoft Corporation. All rights reserved.
3 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
4 |
5 | .section tinyclr_metadata, "d", %progbits
6 | .align 4
7 |
8 | .global TinyClr_Dat_Start
9 | .global TinyClr_Dat_End
10 |
11 | TinyClr_Dat_Start:
12 | .incbin "tinyclr.dat"
13 | TinyClr_Dat_End:
14 |
15 | .end
16 |
17 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | DeviceCode\Targets\Native\STM32F4
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/Blockstorage/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 | Solutions\Discovery429\DeviceCode\BlockStorage
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | Solutions\Discovery429
4 | $(SPOCLIENT)\Solutions\Discovery429\Discovery429.settings
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
--------------------------------------------------------------------------------
/.gitignore:
--------------------------------------------------------------------------------
1 | # Windows image file caches
2 | Thumbs.db
3 | ehthumbs.db
4 |
5 | # Folder config file
6 | Desktop.ini
7 |
8 | # Recycle Bin used on file shares
9 | $RECYCLE.BIN/
10 |
11 | # Windows Installer files
12 | *.cab
13 | *.msi
14 | *.msm
15 | *.msp
16 |
17 | # Windows shortcuts
18 | *.lnk
19 |
20 | # =========================
21 | # Operating System Files
22 | # =========================
23 |
24 | # OSX
25 | # =========================
26 |
27 | .DS_Store
28 | .AppleDouble
29 | .LSOverride
30 |
31 | # Thumbnails
32 | ._*
33 |
34 | # Files that might appear on external disk
35 | .Spotlight-V100
36 | .Trashes
37 |
38 | # Directories potentially created on remote AFP share
39 | .AppleDB
40 | .AppleDesktop
41 | Network Trash Folder
42 | Temporary Items
43 | .apdisk
44 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/scatterfile_gcc_missing_symbols.xml:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/TinyCLR/RVD_S/tinyclr_dat.s:
--------------------------------------------------------------------------------
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 | ; Copyright (c) Microsoft Corporation. All rights reserved.
3 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
4 |
5 | AREA |.text|, CODE, READONLY
6 |
7 | ; has to keep it as ARM code, otherwise the the label TinyClr_Dat_Start and TinyClr_Dat_End are 1 word shift.
8 |
9 | ; ARM directive is only valid for ARM/THUMB processor, but not CORTEX
10 | IF :DEF:COMPILE_ARM :LOR: :DEF:COMPILE_THUMB
11 | ARM
12 | ENDIF
13 |
14 | EXPORT TinyClr_Dat_Start
15 | EXPORT TinyClr_Dat_End
16 |
17 | TinyClr_Dat_Start DATA
18 | INCBIN tinyclr.dat
19 | TinyClr_Dat_End
20 |
21 | END
22 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_RTC/RTC_decl.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | // Copyright (c) Microsoft Corporation. All rights reserved.
3 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
4 |
5 | #ifndef _DRIVERS_RTC_DECL_H_
6 | #define _DRIVERS_RTC_DECL_H_ 1
7 |
8 | //--//
9 |
10 | BOOL RTC_Initialize ( );
11 | INT64 RTC_GetTime ( );
12 | void RTC_SetTime ( INT64 time );
13 | INT32 RTC_GetOffset ( );
14 | void RTC_SetOffset ( INT32 offset );
15 |
16 | //--//
17 |
18 | #endif // _DRIVERS_RTC_DECL_H_
19 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Random/STM32F4_Random_functions.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** STM32F4 Random Number Generator driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | void Random_Start( );
15 | void Random_Stop();
16 | UINT32 Random_Generate();
17 |
18 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/TinyHal/GNU_S/IDelayLoop.s:
--------------------------------------------------------------------------------
1 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2 | @
3 | @ Licensed under the Apache License, Version 2.0 (the "License");
4 | @ you may not use this file except in compliance with the License.
5 | @ You may obtain a copy of the License at http:;www.apache.org/licenses/LICENSE-2.0
6 | @
7 | @ Copyright (c) Microsoft Corporation. All rights reserved.
8 | @ Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | @
10 | @ Delay Loop
11 | @
12 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
13 |
14 |
15 | .global IDelayLoop
16 |
17 | .section SectionForFlashOperations,"xa", %progbits @ void IDelayLoop(UINT32 count)
18 |
19 | IDelayLoop:
20 | subs r0, r0, #4 @ 1 cycle
21 | bgt IDelayLoop @ 3 cycles taken, 1 cycle not taken.
22 | mov pc, lr @ 3 cycles
23 |
24 |
25 | .end
26 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Power/STM32F4_Power_functions.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** CPU Power States ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 |
15 | #ifndef _STM32F4_POWER_FUNCTIONS_H_1
16 | #define _STM32F4_POWER_FUNCTIONS_H_1 1
17 |
18 |
19 | void STM32F4_SetPowerHandlers(void (*stop)(), void (*restart)());
20 |
21 |
22 | #endif
23 |
24 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_lwip_adapter.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Portions Copyright (c) CSA Engineering AG, Switzerland
3 | * www.csa.ch, info@csa.ch
4 | */
5 |
6 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
9 |
10 | #include
11 |
12 | #ifndef _STM32F4_ETH_LWIP_ADAPTER_H_1
13 | #define _STM32F4_ETH_LWIP_ADAPTER_H_1 1
14 |
15 | struct STM32F4_ETH_LWIP_Driver
16 | {
17 | static int Open (int);
18 | static BOOL Close (void);
19 | static BOOL Bind (void);
20 | static BOOL IsNetworkConnected(void);
21 | };
22 |
23 | //
24 | // STM32F4_ETH_LWIP_ADAPTER
25 | //////////////////////////////////////////////////////////////////////////////
26 |
27 | #endif
28 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/ManagedCode/SystemAssemblies.datproj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | false
5 | $(BUILD_TREE_DAT)\tinyclr_STM32F4.dat
6 |
7 |
8 |
9 | false
10 |
11 |
12 | false
13 |
14 |
15 | false
16 |
17 |
18 | false
19 |
20 |
21 |
22 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | DeviceCode\Targets\Native\Interop\System_Security_Cryptography_Netmf
4 | System_Security_Cryptography_Netmf
5 |
6 |
7 |
8 | Library
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System_Security_Cryptography_Netmf.h:
--------------------------------------------------------------------------------
1 | //-----------------------------------------------------------------------------
2 | //
3 | // ** DO NOT EDIT THIS FILE! **
4 | // This file was generated by a tool
5 | // re-running the tool will overwrite this file.
6 | //
7 | //-----------------------------------------------------------------------------
8 |
9 |
10 | #ifndef _SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_H_
11 | #define _SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_H_
12 |
13 | #include
14 | struct Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random
15 | {
16 | static const int FIELD_STATIC___lock = 0;
17 | static const int FIELD_STATIC___referenceCount = 1;
18 |
19 | static const int FIELD___enabled = 1;
20 |
21 | TINYCLR_NATIVE_DECLARE(NativeEnable___STATIC__VOID);
22 | TINYCLR_NATIVE_DECLARE(NativeDisable___STATIC__VOID);
23 | TINYCLR_NATIVE_DECLARE(NativeGetBytes___STATIC__VOID__SZARRAY_U1);
24 |
25 | //--//
26 |
27 | };
28 |
29 |
30 |
31 | extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_Security_Cryptography_Netmf;
32 |
33 | #endif //_SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_H_
34 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System.Security.Cryptography.Netmf.featureproj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | System.Security.Cryptography.Netmf
5 | {da89068f-304b-4fdd-9b62-9d8e0a7622fe}
6 | <Add Feature Description Here>
7 |
8 | True
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/Discovery429.settings:
--------------------------------------------------------------------------------
1 |
2 |
3 | Oberon microsystems, Inc.
4 | Discovery429 board solution
5 |
6 |
7 | {00AC00D3-004E-00C2-908F-FD686D39F6BB}
8 | THUMB2
9 | Discovery429
10 | Discovery429
11 | True
12 | le
13 | true
14 |
15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
23 |
24 | Oberon microsystems, Inc.
25 |
26 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System_Security_Cryptography_Netmf.cpp:
--------------------------------------------------------------------------------
1 | //-----------------------------------------------------------------------------
2 | //
3 | // ** DO NOT EDIT THIS FILE! **
4 | // This file was generated by a tool
5 | // re-running the tool will overwrite this file.
6 | //
7 | //-----------------------------------------------------------------------------
8 |
9 |
10 | #include "System_Security_Cryptography_Netmf.h"
11 |
12 |
13 | static const CLR_RT_MethodHandler method_lookup[] =
14 | {
15 | NULL,
16 | NULL,
17 | NULL,
18 | NULL,
19 | NULL,
20 | NULL,
21 | NULL,
22 | NULL,
23 | NULL,
24 | NULL,
25 | Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeEnable___STATIC__VOID,
26 | Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeDisable___STATIC__VOID,
27 | Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeGetBytes___STATIC__VOID__SZARRAY_U1,
28 | NULL,
29 | };
30 |
31 | const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_Security_Cryptography_Netmf =
32 | {
33 | "System.Security.Cryptography.Netmf",
34 | 0x8119DF0D,
35 | method_lookup
36 | };
37 |
38 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/ManagedCode/Hardware/STM32F4_hardware.csproj:
--------------------------------------------------------------------------------
1 |
2 |
3 | Microsoft.SPOT.Hardware.STM32F4
4 | Library
5 | Microsoft.SPOT.Hardware
6 | {b69e3092-b931-443c-abe7-7e7b65f2a37f};{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}
7 | 9.0.21022
8 | 2.0
9 | {00C900B9-005D-0012-AF2B-DBCE91D758DB}
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 | $(BUILD_TREE_DLL)\Microsoft.SPOT.Native.dll
21 |
22 |
23 | $(BUILD_TREE_DLL)\Microsoft.SPOT.Hardware.dll
24 |
25 |
26 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/MFUpdate_Config_PAL/MFUpdate_config_Discovery429.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Oberon microsystems, Inc.
8 | //
9 | // *** MFUpdate Configuration ***
10 | //
11 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
12 |
13 | #include
14 | #include
15 | #include
16 |
17 | static const IUpdatePackage s_UpdatePackages[] =
18 | {
19 | {
20 | "NetMF",
21 | &g_MicroBooterUpdateProvider,
22 | &g_CrcUpdateValidationProvider,
23 | &g_BlockStorageUpdateProvider,
24 | NULL,
25 | },
26 | };
27 |
28 | const IUpdatePackage* g_UpdatePackages = s_UpdatePackages;
29 | const INT32 g_UpdatePackageCount = ARRAYSIZE(s_UpdatePackages);
30 |
31 |
32 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/TinyCLR/allocator.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | // Copyright (c) Microsoft Corporation. All rights reserved.
3 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
4 |
5 | #include
6 | #include
7 |
8 | ////////////////////////////////////////////////////////////////////////////////
9 |
10 | static void RuntimeFault( const char* szText )
11 | {
12 | lcd_printf("\014ERROR:\r\n%s\r\n", szText );
13 | debug_printf( "ERROR: %s\r\n", szText );
14 |
15 | HARD_BREAKPOINT();
16 | }
17 |
18 | void *operator new(size_t)
19 | {
20 | RuntimeFault( "new(size_t)" );
21 |
22 | return NULL;
23 | }
24 |
25 | void *operator new[](size_t)
26 | {
27 | RuntimeFault( "new[](size_t)" );
28 |
29 | return NULL;
30 | }
31 |
32 | void operator delete (void*)
33 | {
34 | RuntimeFault( "delete(void*)" );
35 | }
36 |
37 | void operator delete[] (void*)
38 | {
39 | RuntimeFault( "delete[](void*)" );
40 | }
41 |
42 | ////////////////////////////////////////////////////////////////////////////////
43 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/TinyBooter/allocator.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | // Copyright (c) Microsoft Corporation. All rights reserved.
3 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
4 |
5 | #include
6 | #include
7 |
8 | ////////////////////////////////////////////////////////////////////////////////
9 |
10 | static void RuntimeFault( LPCSTR szText )
11 | {
12 | lcd_printf("\014ERROR:\r\n%s\r\n", szText );
13 | debug_printf( "ERROR: %s\r\n", szText );
14 |
15 | // let watchdog take over
16 | CPU_Halt();
17 | }
18 |
19 | void *operator new(size_t)
20 | {
21 | RuntimeFault( "new(size_t)" );
22 |
23 | return NULL;
24 | }
25 |
26 | void *operator new[](size_t)
27 | {
28 | RuntimeFault( "new[](size_t)" );
29 |
30 | return NULL;
31 | }
32 |
33 | void operator delete (void*)
34 | {
35 | RuntimeFault( "delete(void*)" );
36 | }
37 |
38 | void operator delete[] (void*)
39 | {
40 | RuntimeFault( "delete[](void*)" );
41 | }
42 |
43 | ////////////////////////////////////////////////////////////////////////////////
44 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_security/STM32F4_security_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Security Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 |
17 | void SecurityKey_Copy( UINT8 KeyCopy[], INT32 BytesToCopy )
18 | {
19 | NATIVE_PROFILE_HAL_PROCESSOR_SECURITY();
20 | }
21 |
22 | void SecurityKey_LowLevelCopy( UINT8 KeyCopy[], INT32 BytesToCopy )
23 | {
24 | NATIVE_PROFILE_HAL_PROCESSOR_SECURITY();
25 | for(int i= 0; i
15 |
16 |
17 | extern struct BlockStorageDevice g_STM32F4_BS;
18 | extern struct IBlockStorageDevice g_STM32F4_Flash_DeviceTable;
19 | extern struct BLOCK_CONFIG g_STM32F4_BS_Config;
20 |
21 |
22 | void BlockStorage_AddDevices() {
23 | BlockStorageList::AddDevice( &g_STM32F4_BS,
24 | &g_STM32F4_Flash_DeviceTable,
25 | &g_STM32F4_BS_Config, FALSE );
26 | }
27 |
28 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/STM32.settings:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32
4 | Cortex-M3
5 | THUMB2
6 | {00CC0049-00FD-0044-AF40-DB0A37E94271}
7 |
8 |
9 |
10 |
11 | $(SPOCLIENT)\devicecode\Targets\Native\STM32\STM32.settings
12 | ARM
13 | Cortex
14 | THUMB2
15 | STM32
16 | STM32
17 | Native
18 |
19 |
20 |
21 | Cortex-M3
22 | {1942C531-3AAC-4abb-8B4F-C3111012F9D9}
23 |
24 |
25 | Cortex-M3
26 | {CD24C1A5-2641-4460-AC5A-093B1C6D3D8B}
27 |
28 |
29 |
30 |
31 |
32 |
33 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/STM32F2.settings:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32F2
4 | Cortex-M3
5 | THUMB2
6 | {002E00B2-009B-0009-B2F8-127FE8E839D1}
7 |
8 |
9 |
10 |
11 | $(SPOCLIENT)\devicecode\Targets\Native\STM32F4\STM32F2.settings
12 | ARM
13 | Cortex
14 | THUMB2
15 | STM32F2
16 | STM32F4
17 | Native
18 |
19 |
20 |
21 | Cortex-M3
22 | {1942C531-3AAC-4abb-8B4F-C3111012F9D9}
23 |
24 |
25 | Cortex-M3
26 | {CD24C1A5-2641-4460-AC5A-093B1C6D3D8B}
27 |
28 |
29 |
30 |
31 |
32 |
33 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/STM32F4.settings:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32F4
4 | Cortex-M4
5 | THUMB2
6 | {007400A6-0088-008A-A158-3C166CD3322C}
7 |
8 |
9 |
10 |
11 | $(SPOCLIENT)\devicecode\Targets\Native\STM32F4\STM32F4.settings
12 | ARM
13 | Cortex
14 | THUMB2FP
15 | STM32F4
16 | STM32F4
17 | Native
18 |
19 |
20 |
21 | Cortex-M4.fp
22 | {00C50096-00DD-00E7-BBA9-7FC84D408562}
23 |
24 |
25 | Cortex-M4.fp
26 | {00EC0018-007A-0040-9936-929B39330107}
27 |
28 |
29 |
30 |
31 |
32 |
33 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/TinyCLR/tinyclr.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | // Copyright (c) Microsoft Corporation. All rights reserved.
3 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
4 |
5 | #include
6 | #include
7 |
8 | ////////////////////////////////////////////////////////////////////////////////
9 | void ApplicationEntryPoint()
10 | {
11 | CLR_SETTINGS clrSettings;
12 |
13 | memset(&clrSettings, 0, sizeof(CLR_SETTINGS));
14 |
15 | clrSettings.MaxContextSwitches = 50;
16 | clrSettings.WaitForDebugger = false;
17 | clrSettings.EnterDebuggerLoopAfterExit = true;
18 |
19 |
20 | ClrStartup( clrSettings );
21 |
22 | #if !defined(BUILD_RTM)
23 | debug_printf( "Exiting.\r\n" );
24 | #else
25 | ::CPU_Reset();
26 | #endif
27 | }
28 |
29 | BOOL Solution_GetReleaseInfo(MfReleaseInfo& releaseInfo)
30 | {
31 | MfReleaseInfo::Init(releaseInfo,
32 | VERSION_MAJOR, VERSION_MINOR, VERSION_BUILD, VERSION_REVISION,
33 | OEMSYSTEMINFOSTRING, hal_strlen_s(OEMSYSTEMINFOSTRING)
34 | );
35 | return TRUE; // alternatively, return false if you didn't initialize the releaseInfo structure.
36 | }
37 |
38 |
--------------------------------------------------------------------------------
/CLR/Libraries/SPOT/spot_native_Microsoft_SPOT_Hardware_SystemInfo__SystemID.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | // Copyright (c) Microsoft Corporation. All rights reserved.
3 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
4 |
5 | #include "SPOT.h"
6 |
7 |
8 | HRESULT Library_spot_native_Microsoft_SPOT_Hardware_SystemInfo__SystemID::get_OEM___STATIC__U1( CLR_RT_StackFrame& stack )
9 | {
10 | NATIVE_PROFILE_CLR_CORE();
11 | TINYCLR_HEADER();
12 |
13 | stack.SetResult( g_ConfigurationSector.OEM_Model_SKU.OEM, DATATYPE_U1 );
14 |
15 | TINYCLR_NOCLEANUP_NOLABEL();
16 | }
17 |
18 | HRESULT Library_spot_native_Microsoft_SPOT_Hardware_SystemInfo__SystemID::get_Model___STATIC__U1( CLR_RT_StackFrame& stack )
19 | {
20 | NATIVE_PROFILE_CLR_CORE();
21 | TINYCLR_HEADER();
22 |
23 | stack.SetResult( g_ConfigurationSector.OEM_Model_SKU.Model, DATATYPE_U1 );
24 |
25 | TINYCLR_NOCLEANUP_NOLABEL();
26 | }
27 |
28 | HRESULT Library_spot_native_Microsoft_SPOT_Hardware_SystemInfo__SystemID::get_SKU___STATIC__U2( CLR_RT_StackFrame& stack )
29 | {
30 | NATIVE_PROFILE_CLR_CORE();
31 | TINYCLR_HEADER();
32 |
33 | stack.SetResult( g_ConfigurationSector.OEM_Model_SKU.SKU, DATATYPE_U2 );
34 |
35 | TINYCLR_NOCLEANUP_NOLABEL();
36 | }
37 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/Init/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\Init\dotnetmf.proj
4 | IO_Init_Discovery429
5 |
6 |
7 | {00370045-000D-00BD-B5BA-A0F80E67359F}
8 | IO port initialization for Discovery429 solution
9 | HAL
10 | IO_Init_Discovery429.$(LIB_EXT)
11 | IO_Init_Discovery429.$(LIB_EXT).manifest
12 | Solutions\Discovery429
13 |
14 |
15 |
16 |
17 | False
18 |
19 |
20 | False
21 | False
22 | False
23 | Solutions\Discovery429\DeviceCode\Init
24 | Library
25 | false
26 | 4.0.0.0
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 |
37 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.h:
--------------------------------------------------------------------------------
1 | //-----------------------------------------------------------------------------
2 | //
3 | // ** WARNING! **
4 | // This file was generated automatically by a tool.
5 | // Re-running the tool will overwrite this file.
6 | // You should copy this file to a custom location
7 | // before adding any customization in the copy to
8 | // prevent loss of your changes when the tool is
9 | // re-run.
10 | //
11 | //-----------------------------------------------------------------------------
12 |
13 |
14 | #ifndef _SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_SYSTEM_SECURITY_CRYPTOGRAPHY_STM32F4RANDOM_H_
15 | #define _SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_SYSTEM_SECURITY_CRYPTOGRAPHY_STM32F4RANDOM_H_
16 |
17 | namespace System
18 | {
19 | namespace Security
20 | {
21 | namespace Cryptography
22 | {
23 | struct Stm32F4Random
24 | {
25 | // Helper Functions to access fields of managed object
26 | static INT8& Get__enabled( CLR_RT_HeapBlock* pMngObj ) { return Interop_Marshal_GetField_INT8( pMngObj, Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::FIELD___enabled ); }
27 |
28 | // Declaration of stubs. These functions are implemented by Interop code developers
29 | static void NativeEnable( HRESULT &hr );
30 | static void NativeDisable( HRESULT &hr );
31 | static void NativeGetBytes( CLR_RT_TypedArray_UINT8 param0, HRESULT &hr );
32 | };
33 | }
34 | }
35 | }
36 | #endif //_SYSTEM_SECURITY_CRYPTOGRAPHY_NETMF_SYSTEM_SECURITY_CRYPTOGRAPHY_STM32F4RANDOM_H_
37 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random_mshl.cpp:
--------------------------------------------------------------------------------
1 | //-----------------------------------------------------------------------------
2 | //
3 | // ** DO NOT EDIT THIS FILE! **
4 | // This file was generated by a tool
5 | // re-running the tool will overwrite this file.
6 | //
7 | //-----------------------------------------------------------------------------
8 |
9 |
10 | #include "System_Security_Cryptography_Netmf.h"
11 | #include "System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.h"
12 |
13 | using namespace System::Security::Cryptography;
14 |
15 |
16 | HRESULT Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeEnable___STATIC__VOID( CLR_RT_StackFrame& stack )
17 | {
18 | TINYCLR_HEADER(); hr = S_OK;
19 | {
20 | Stm32F4Random::NativeEnable( hr );
21 | TINYCLR_CHECK_HRESULT( hr );
22 | }
23 | TINYCLR_NOCLEANUP();
24 | }
25 |
26 | HRESULT Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeDisable___STATIC__VOID( CLR_RT_StackFrame& stack )
27 | {
28 | TINYCLR_HEADER(); hr = S_OK;
29 | {
30 | Stm32F4Random::NativeDisable( hr );
31 | TINYCLR_CHECK_HRESULT( hr );
32 | }
33 | TINYCLR_NOCLEANUP();
34 | }
35 |
36 | HRESULT Library_System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random::NativeGetBytes___STATIC__VOID__SZARRAY_U1( CLR_RT_StackFrame& stack )
37 | {
38 | TINYCLR_HEADER(); hr = S_OK;
39 | {
40 | CLR_RT_TypedArray_UINT8 param0;
41 | TINYCLR_CHECK_HRESULT( Interop_Marshal_UINT8_ARRAY( stack, 0, param0 ) );
42 |
43 | Stm32F4Random::NativeGetBytes( param0, hr );
44 | TINYCLR_CHECK_HRESULT( hr );
45 | }
46 | TINYCLR_NOCLEANUP();
47 | }
48 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_gpio.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_gpio.h
19 | * @brief Ethernet GPIO driver.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_GPIO_H
25 | #define STM32F4_ETH_GPIO_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 |
37 | #ifdef STM32F4XX
38 | #include "..\stm32f4xx.h"
39 | #else
40 | #include "..\stm32f2xx.h"
41 | #endif
42 |
43 | //--------------------------------------------------------------------------------------------
44 | // Functions prototypes
45 | //--------------------------------------------------------------------------------------------
46 |
47 | void eth_initEthGpio();
48 |
49 | //--------------------------------------------------------------------------------------------
50 | #ifdef __cplusplus
51 | }
52 | #endif
53 |
54 | #endif // STM32F4_ETH_GPIO_H
55 |
--------------------------------------------------------------------------------
/Crypto/System_Security_Cryptography/Interop/System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Oberon microsystems, Inc.
8 | //
9 | // *** STM32F4 Random Number Generator interop ***
10 | //
11 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
12 |
13 | #include "System_Security_Cryptography_Netmf.h"
14 | #include "System_Security_Cryptography_Netmf_System_Security_Cryptography_Stm32F4Random.h"
15 |
16 | using namespace System::Security::Cryptography;
17 |
18 | #include
19 | #include "STM32F4_Random_functions.h"
20 |
21 | void Stm32F4Random::NativeEnable( HRESULT &hr )
22 | {
23 | Random_Start();
24 | }
25 |
26 | void Stm32F4Random::NativeDisable( HRESULT &hr )
27 | {
28 | Random_Stop();
29 | }
30 |
31 | void Stm32F4Random::NativeGetBytes( CLR_RT_TypedArray_UINT8 param0, HRESULT &hr )
32 | {
33 | unsigned char* arr = param0.GetBuffer();
34 | unsigned int length = param0.GetSize();
35 | unsigned int offset = 0;
36 |
37 | UINT32 rand;
38 |
39 | if (length > sizeof(rand))
40 | {
41 | for (offset = 0; offset < length-sizeof(rand); offset += sizeof(rand))
42 | {
43 | rand = Random_Generate();
44 | memcpy(arr+offset, &rand, sizeof(rand));
45 | }
46 | }
47 | if (offset < length)
48 | {
49 | unsigned int difference = length - offset;
50 | rand = Random_Generate();
51 | memcpy(arr+offset, &rand, difference);
52 | }
53 |
54 | }
55 |
56 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Random/STM32F4_Random_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Oberon microsystems, Inc.
8 | //
9 | // *** STM32F4 Random Number Generator driver ***
10 | //
11 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
12 |
13 | #include
14 |
15 | #ifdef STM32F4XX
16 | #include "..\stm32f4xx.h"
17 | #else
18 | #include "..\stm32f2xx.h"
19 | #endif
20 |
21 | #include "STM32F4_Random_functions.h"
22 | static UINT32 previous_random;
23 | static UINT32 random_generator_use_count = 0;
24 |
25 |
26 | void Random_Start( )
27 | {
28 | if (random_generator_use_count++ == 0) {
29 | RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN; // enable RNG clock
30 | RNG->CR = RNG_CR_RNGEN; // start RNG
31 | previous_random = Random_Generate(); // get first value
32 | }
33 | }
34 |
35 | void Random_Stop()
36 | {
37 | if (--random_generator_use_count == 0) {
38 | RNG->CR = 0; // stop RNG
39 | RCC->AHB2ENR &= ~RCC_AHB2ENR_RNGEN; // disable RNG clock
40 | }
41 | }
42 |
43 | UINT32 Random_Generate()
44 | {
45 | // repeat until valid data is present
46 | while (TRUE) {
47 | UINT32 status = RNG->SR;
48 | if (status & RNG_SR_CECS) { // seed error
49 | RNG->SR = 0; // clear error bits
50 | RNG->CR = 0; // stop RNG
51 | RNG->CR = RNG_CR_RNGEN; // restart RNG
52 | } else if (status & RNG_SR_DRDY) { // data available
53 | UINT32 data = RNG->DR;
54 | if (data != previous_random) {
55 | previous_random = data;
56 | return data;
57 | }
58 | }
59 | }
60 | }
61 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Flash/STM32F4_Flash.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Flash Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | //--//
17 | #ifndef _DRIVERS_BS_STM32F4_
18 | #define _DRIVERS_BS_STM32F4_ 1
19 |
20 | //--//
21 |
22 | struct STM32F4_Flash_Driver
23 | {
24 |
25 | static BOOL ChipInitialize( void* context );
26 |
27 | static BOOL ChipUnInitialize( void* context );
28 |
29 | static const BlockDeviceInfo* GetDeviceInfo( void* context );
30 |
31 | static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff );
32 |
33 | static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite );
34 |
35 | static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes );
36 |
37 | static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
38 |
39 | static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
40 |
41 | static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength );
42 |
43 | static BOOL EraseBlock( void* context, ByteAddress Address );
44 |
45 | static void SetPowerState( void* context, UINT32 State );
46 |
47 | static UINT32 MaxSectorWrite_uSec( void* context );
48 |
49 | static UINT32 MaxBlockErase_uSec( void* context );
50 |
51 |
52 | };
53 |
54 | //--//
55 |
56 | #endif // _DRIVERS_BS_STM32F4_
57 |
58 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/MX29/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Drivers\Oberon\MX29\dotNetMF.proj
4 | {00690053-00FC-00C1-9B51-A3020004D8BC}
5 | MX29_Flash
6 |
7 |
8 | MX29 flash block storage driver
9 | HAL
10 | MX29_Flash.$(LIB_EXT)
11 | MX29_Flash.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
25 | 0
26 | 0
27 | 0
28 |
29 | 2009-04-30
30 |
31 | LibraryCategory
32 |
33 |
34 | DeviceCode\Drivers\Oberon\MX29
35 | Library
36 | false
37 | 4.0.0.0
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/Blockstorage/STM32F4/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32F4_blconfig_Discovery429
4 |
5 |
6 | {00BE0002-0081-00E0-B9E7-32687DDD4FD7}
7 | Block storage configuration for Discovery429
8 | HAL
9 | STM32F4_blconfig_Discovery429.$(LIB_EXT)
10 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\Blockstorage\STM32F4\dotNetMF.proj
11 | STM32F4_blconfig_Discovery429.$(LIB_EXT).manifest
12 | Solutions\Discovery429
13 |
14 |
15 |
16 | 4
17 | 0
18 | 0
19 | 0
20 |
21 | 2009-08-12
22 |
23 | LibraryCategory
24 |
25 |
26 |
27 |
28 | False
29 | Discovery429
30 | False
31 | False
32 | False
33 | Solutions\Discovery429\DeviceCode\BlockStorage\STM32F4
34 | Library
35 | false
36 | 4.0.0.0
37 |
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/M25P16/M25P16_Flash.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for M25P16 Flash: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Flash Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | //--//
17 | #ifndef _DRIVERS_BS_M25P16_
18 | #define _DRIVERS_BS_M25P16_ 1
19 |
20 | //--//
21 |
22 | struct M25P16_Flash_Driver
23 | {
24 |
25 | static BOOL ChipInitialize( void* context );
26 |
27 | static BOOL ChipUnInitialize( void* context );
28 |
29 | static const BlockDeviceInfo* GetDeviceInfo( void* context );
30 |
31 | static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff );
32 |
33 | static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite );
34 |
35 | static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes );
36 |
37 | static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
38 |
39 | static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
40 |
41 | static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength );
42 |
43 | static BOOL EraseBlock( void* context, ByteAddress Address );
44 |
45 | static void SetPowerState( void* context, UINT32 State );
46 |
47 | static UINT32 MaxSectorWrite_uSec( void* context );
48 |
49 | static UINT32 MaxBlockErase_uSec( void* context );
50 |
51 | private:
52 | static BOOL WriteX( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL increment );
53 |
54 | };
55 |
56 | //--//
57 |
58 | #endif // _DRIVERS_BS_M25P16_
59 |
60 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/M25P16/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Drivers\Oberon\M25P16_Flash\dotNetMF.proj
4 | {003700AF-00A9-0028-B9B4-7B7B9492C113}
5 | M25P16_Flash
6 |
7 |
8 | M25P16 flash block storage driver
9 | HAL
10 | M25P16_Flash.$(LIB_EXT)
11 | M25P16_Flash.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
25 | 0
26 | 0
27 | 0
28 |
29 | 2009-04-30
30 |
31 | LibraryCategory
32 |
33 |
34 | DeviceCode\Drivers\Oberon\M25P16_Flash
35 | Library
36 | false
37 | 4.0.0.0
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/S25FL127S/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Drivers\Oberon\S25FL127S\dotNetMF.proj
4 | {000C0015-00F6-00F5-BCCF-FD3C2ECFD239}
5 | S25FL127S_Flash
6 |
7 |
8 | S25FL127S flash block storage driver
9 | HAL
10 | S25FL127S_Flash.$(LIB_EXT)
11 | S25FL127S_Flash.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
25 | 0
26 | 0
27 | 0
28 |
29 | 2009-04-30
30 |
31 | LibraryCategory
32 |
33 |
34 | DeviceCode\Drivers\Oberon\S25FL127S
35 | Library
36 | false
37 | 4.0.0.0
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/Blockstorage/addDevices/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | BlockStorage_AddDevices_Discovery429
4 |
5 |
6 | {002E0079-001E-0043-B24C-29B389957A5A}
7 | Block storage add device driver for Discovery429
8 | HAL
9 | BlockStorage_AddDevices_Discovery429.$(LIB_EXT)
10 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\Blockstorage\addDevices\dotNetMF.proj
11 | BlockStorage_AddDevices_Discovery429.$(LIB_EXT).manifest
12 | Solutions\Discovery429
13 |
14 |
15 |
16 | 4
17 | 0
18 | 0
19 | 0
20 |
21 | 2009-08-12
22 |
23 | LibraryCategory
24 |
25 |
26 |
27 |
28 | False
29 | Discovery429
30 | False
31 | False
32 | False
33 | Solutions\Discovery429\DeviceCode\BlockStorage\AddDevices
34 | Library
35 | false
36 | 4.0.0.0
37 |
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/S25FL127S/S25FL127S_Flash.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for Limmat (STM32F4): Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Flash Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | //--//
17 | #ifndef _DRIVERS_BS_S25FL127S_
18 | #define _DRIVERS_BS_S25FL127S_ 1
19 |
20 | //--//
21 |
22 | struct S25FL127S_Flash_Driver
23 | {
24 |
25 | static BOOL ChipInitialize( void* context );
26 |
27 | static BOOL ChipUnInitialize( void* context );
28 |
29 | static const BlockDeviceInfo* GetDeviceInfo( void* context );
30 |
31 | static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff );
32 |
33 | static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite );
34 |
35 | static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes );
36 |
37 | static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
38 |
39 | static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
40 |
41 | static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength );
42 |
43 | static BOOL EraseBlock( void* context, ByteAddress Address );
44 |
45 | static void SetPowerState( void* context, UINT32 State );
46 |
47 | static UINT32 MaxSectorWrite_uSec( void* context );
48 |
49 | static UINT32 MaxBlockErase_uSec( void* context );
50 |
51 | private:
52 | static BOOL WriteX( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL increment );
53 |
54 | };
55 |
56 | //--//
57 |
58 | #endif // _DRIVERS_BS_S25FL127S_
59 |
60 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/S25FL064K/S25FL064K_Flash.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for Mountaineer board (STM32F4): Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Flash Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | //--//
17 | #ifndef _DRIVERS_BS_S25FL064K_
18 | #define _DRIVERS_BS_S25FL064K_ 1
19 |
20 | //--//
21 |
22 | struct S25FL064K_Flash_Driver
23 | {
24 |
25 | static BOOL ChipInitialize( void* context );
26 |
27 | static BOOL ChipUnInitialize( void* context );
28 |
29 | static const BlockDeviceInfo* GetDeviceInfo( void* context );
30 |
31 | static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff );
32 |
33 | static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite );
34 |
35 | static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes );
36 |
37 | static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
38 |
39 | static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
40 |
41 | static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength );
42 |
43 | static BOOL EraseBlock( void* context, ByteAddress Address );
44 |
45 | static void SetPowerState( void* context, UINT32 State );
46 |
47 | static UINT32 MaxSectorWrite_uSec( void* context );
48 |
49 | static UINT32 MaxBlockErase_uSec( void* context );
50 |
51 | private:
52 | static BOOL WriteX( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL increment );
53 |
54 | };
55 |
56 | //--//
57 |
58 | #endif // _DRIVERS_BS_S25FL064K_
59 |
60 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/S25FL064K/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Drivers\Oberon\S25FL064K_Flash\dotNetMF.proj
4 | {00B30021-0067-0005-8504-869EB7C705D9}
5 | S25FL064K_Flash
6 |
7 |
8 | S25FL064K flash block storage driver
9 | HAL
10 | S25FL064K_Flash.$(LIB_EXT)
11 | S25FL064K_Flash.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
25 | 0
26 | 0
27 | 0
28 |
29 | 2009-04-30
30 |
31 | LibraryCategory
32 |
33 |
34 | DeviceCode\Drivers\Oberon\S25FL064K_Flash
35 | Library
36 | false
37 | 4.0.0.0
38 |
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/USB/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | usb_pal_config_Discovery429
4 |
5 |
6 | {000800BE-00D7-00B6-B1C0-8FC4A4E2437F}
7 | USB PAL configuration for Discovery429 solution
8 | PAL
9 | usb_pal_config_Discovery429.$(LIB_EXT)
10 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\USB\dotnetmf.proj
11 | usb_pal_config_Discovery429.$(LIB_EXT).manifest
12 | Solutions\Discovery429
13 |
14 |
15 |
16 | 4
17 | 0
18 | 0
19 | 0
20 |
21 | 2009-04-30
22 | Oberon microsystems, Inc.
23 |
24 | LibraryCategory
25 |
26 |
27 |
28 |
29 | False
30 |
31 |
32 | False
33 | False
34 | False
35 | Solutions\Discovery429\DeviceCode\USB
36 | Library
37 | false
38 | 4.0.0.0
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/Initialization/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | $(SPOCLIENT)\DeviceCode\Drivers\Oberon\Initialization\dotnetmf.proj
5 | {008300F8-00EB-0007-BB35-1AA5DD250D39}
6 | initialization_hal
7 |
8 |
9 | System initialization library
10 | HAL
11 | initialization_hal.$(LIB_EXT)
12 | initialization_hal.$(LIB_EXT).manifest
13 | BlockStorage
14 |
15 |
16 | False
17 |
18 |
19 | False
20 | False
21 | False
22 |
23 |
24 |
25 | 4
26 | 0
27 | 0
28 | 0
29 |
30 | 2009-06-22
31 | Microsoft
32 |
33 | LibraryCategory
34 |
35 |
36 | DeviceCode\Drivers\Oberon\Initialization
37 | Library
38 | false
39 | 4.0.0.0
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/TinyHal/GNU_S/VectorsHandlers.s:
--------------------------------------------------------------------------------
1 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2 | @
3 | @ Licensed under the Apache License, Version 2.0 (the "License");
4 | @ you may not use this file except in compliance with the License.
5 | @ You may obtain a copy of the License at http:;www.apache.org/licenses/LICENSE-2.0
6 | @
7 | @ Copyright (c) Microsoft Corporation. All rights reserved.
8 | @ Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | @
10 | @ CORTEX-M3 Fault Handler Entry Code
11 | @
12 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
13 |
14 |
15 | .global FAULT_SubHandler
16 | .extern FAULT_Handler @ void FAULT_Handler(UINT32*, UINT32)
17 |
18 | .global HARD_Breakpoint
19 | .extern HARD_Breakpoint_Handler @ HARD_Breakpoint_Handler(UINT32*)
20 |
21 |
22 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
23 |
24 | .section i.FAULT_SubHandler, "xa", %progbits
25 | .thumb_func
26 | FAULT_SubHandler:
27 | @ on entry, we have an exception frame on the stack:
28 | @ SP+00: R0
29 | @ SP+04: R1
30 | @ SP+08: R2
31 | @ SP+12: R3
32 | @ SP+16: R12
33 | @ SP+20: LR
34 | @ SP+24: PC
35 | @ SP+28: PSR
36 | @ R0-R12 are not overwritten yet
37 | add sp,sp,#16 @ remove R0-R3
38 | push {r0-r11} @ store R0-R11
39 | mov r0,sp
40 | @ R0+00: R0-R12
41 | @ R0+52: LR
42 | @ R0+56: PC
43 | @ R0+60: PSR
44 | mrs r1,IPSR @ exception number
45 | b FAULT_Handler
46 | @ never expect to return
47 |
48 |
49 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
50 |
51 | .section i.HARD_Breakpoint, "xa", %progbits
52 | .thumb_func
53 | HARD_Breakpoint:
54 | @ on entry, were are being called from C/C++ in Thread mode
55 | add sp,sp,#-4 @ space for PSR
56 | push {r14} @ store original PC
57 | push {r0-r12,r14} @ store R0 - R12, LR
58 | mov r0,sp
59 | mrs r1,XPSR
60 | str r1,[r0,#60] @ store PSR
61 | @ R0+00: R0-R12
62 | @ R0+52: LR
63 | @ R0+56: PC
64 | @ R0+60: PSR
65 | b HARD_Breakpoint_Handler
66 | @ never expect to return
67 |
68 |
69 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
70 |
71 |
72 | .end
73 |
74 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/system_stm32f2xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f2xx.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 18-April-2011
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /** @addtogroup CMSIS
23 | * @{
24 | */
25 |
26 | /** @addtogroup stm32f2xx_system
27 | * @{
28 | */
29 |
30 | /**
31 | * @brief Define to prevent recursive inclusion
32 | */
33 | #ifndef __SYSTEM_STM32F2XX_H
34 | #define __SYSTEM_STM32F2XX_H
35 |
36 | #ifdef __cplusplus
37 | extern "C" {
38 | #endif
39 |
40 | /** @addtogroup STM32F2xx_System_Includes
41 | * @{
42 | */
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @addtogroup STM32F2xx_System_Exported_types
50 | * @{
51 | */
52 |
53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
54 |
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @addtogroup STM32F2xx_System_Exported_Constants
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @addtogroup STM32F2xx_System_Exported_Macros
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @addtogroup STM32F2xx_System_Exported_Functions
77 | * @{
78 | */
79 |
80 | extern void SystemInit(void);
81 | extern void SystemCoreClockUpdate(void);
82 | /**
83 | * @}
84 | */
85 |
86 | #ifdef __cplusplus
87 | }
88 | #endif
89 |
90 | #endif /*__SYSTEM_STM32F2XX_H */
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /**
97 | * @}
98 | */
99 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
100 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/system_stm32f4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.0.0
6 | * @date 30-September-2011
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /** @addtogroup CMSIS
23 | * @{
24 | */
25 |
26 | /** @addtogroup stm32f4xx_system
27 | * @{
28 | */
29 |
30 | /**
31 | * @brief Define to prevent recursive inclusion
32 | */
33 | #ifndef __SYSTEM_STM32F4XX_H
34 | #define __SYSTEM_STM32F4XX_H
35 |
36 | #ifdef __cplusplus
37 | extern "C" {
38 | #endif
39 |
40 | /** @addtogroup STM32F4xx_System_Includes
41 | * @{
42 | */
43 |
44 | /**
45 | * @}
46 | */
47 |
48 |
49 | /** @addtogroup STM32F4xx_System_Exported_types
50 | * @{
51 | */
52 |
53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
54 |
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @addtogroup STM32F4xx_System_Exported_Constants
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @addtogroup STM32F4xx_System_Exported_Macros
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @addtogroup STM32F4xx_System_Exported_Functions
77 | * @{
78 | */
79 |
80 | extern void SystemInit(void);
81 | extern void SystemCoreClockUpdate(void);
82 | /**
83 | * @}
84 | */
85 |
86 | #ifdef __cplusplus
87 | }
88 | #endif
89 |
90 | #endif /*__SYSTEM_STM32F4XX_H */
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /**
97 | * @}
98 | */
99 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
100 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_lwip.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_lwip.h
19 | * @brief Interface between the LWIP module and the STM32F4 ethernet driver.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_LWIP_H
25 | #define STM32F4_ETH_LWIP_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 | #include
37 | #include
38 |
39 | //--------------------------------------------------------------------------------------------
40 | // Typedefs and enums
41 | //--------------------------------------------------------------------------------------------
42 |
43 | typedef struct pbuf Pbuf_t;
44 | typedef struct netif Netif_t;
45 |
46 | //--------------------------------------------------------------------------------------------
47 | // Functions prototypes
48 | //--------------------------------------------------------------------------------------------
49 |
50 | BOOL STM32F4_ETH_LWIP_open(Netif_t *const pNetif);
51 | void STM32F4_ETH_LWIP_close(const BOOL disableClocks);
52 | void STM32F4_ETH_LWIP_recv(Netif_t *const pNetif);
53 | err_t STM32F4_ETH_LWIP_xmit(Netif_t *const pNetif, Pbuf_t *const pBuf);
54 | void STM32F4_ETH_LWIP_interrupt(Netif_t *const pNetif);
55 |
56 | //--------------------------------------------------------------------------------------------
57 | #ifdef __cplusplus
58 | }
59 | #endif
60 |
61 | #endif // STM32F4_ETH_LWIP_H
62 |
--------------------------------------------------------------------------------
/DeviceCode/Drivers/Oberon/MX29/MX29.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for MX29: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** MX29 Flash Driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | //--//
17 | #ifndef _DRIVERS_BS_MX29_
18 | #define _DRIVERS_BS_MX29_ 1
19 |
20 | //--//
21 |
22 | typedef UINT16 CHIP_WORD;
23 |
24 |
25 | struct MX29_Flash_Driver
26 | {
27 |
28 | static BOOL ChipInitialize( void* context );
29 |
30 | static BOOL ChipUnInitialize( void* context );
31 |
32 | static const BlockDeviceInfo* GetDeviceInfo( void* context );
33 |
34 | static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff );
35 |
36 | static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite );
37 |
38 | static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes );
39 |
40 | static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
41 |
42 | static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata);
43 |
44 | static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength );
45 |
46 | static BOOL EraseBlock( void* context, ByteAddress Address );
47 |
48 | static void SetPowerState( void* context, UINT32 State );
49 |
50 | static UINT32 MaxSectorWrite_uSec( void* context );
51 |
52 | static UINT32 MaxBlockErase_uSec( void* context );
53 |
54 | private:
55 | static BOOL WriteX( void* context, ByteAddress StartSector, UINT32 NumSectors,BYTE * pSectorBuff, BOOL ReadModifyWrite, BOOL fIncrementDataPtr );
56 | static BOOL Action_EraseSector( void* context, volatile CHIP_WORD* SectorStart );
57 | static void Action_WriteWord ( void* context, volatile CHIP_WORD* Sector, CHIP_WORD Data );
58 |
59 | };
60 |
61 | //--//
62 |
63 | #endif // _DRIVERS_BS_MX29_
64 |
65 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_phy.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_phy.h
19 | * @brief PHY (TERIDIAN 78Q2123) driver.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_PHY_H
25 | #define STM32F4_ETH_PHY_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 |
37 | #ifdef STM32F4XX
38 | #include "..\stm32f4xx.h"
39 | #else
40 | #include "..\stm32f2xx.h"
41 | #endif
42 |
43 | //--------------------------------------------------------------------------------------------
44 | // Typedefs and enums
45 | //--------------------------------------------------------------------------------------------
46 |
47 | typedef BOOL (*pRead)(const uint32_t, uint16_t *const);
48 | typedef BOOL (*pWrite)(const uint32_t, const uint16_t);
49 |
50 | //--------------------------------------------------------------------------------------------
51 | // Functions prototypes
52 | //--------------------------------------------------------------------------------------------
53 |
54 | void initReadPhyCallback(pRead readCallback);
55 | void initWritePhyCallback(pWrite writeCallback);
56 |
57 | BOOL eth_phyReset(void);
58 | BOOL eth_isPhyLinkValid(BOOL isCallBlocking);
59 | BOOL eth_enableAutoNegotiation(void);
60 | BOOL eth_powerUpPhy(BOOL isPowerUp);
61 | BOOL eth_isPhyResponding(void);
62 |
63 | //--------------------------------------------------------------------------------------------
64 | #ifdef __cplusplus
65 | }
66 | #endif
67 |
68 | #endif // STM32F4_ETH_PHY_H
69 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_tx_desc.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_tx_desc.h
19 | * @brief TX descriptors handler.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_TX_DESC_H
25 | #define STM32F4_ETH_TX_DESC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 |
37 | #ifdef STM32F4XX
38 | #include "..\stm32f4xx.h"
39 | #else
40 | #include "..\stm32f2xx.h"
41 | #endif
42 |
43 | //--------------------------------------------------------------------------------------------
44 | // Constant defines
45 | //--------------------------------------------------------------------------------------------
46 |
47 | #define DEBUG_TX_DESC 0
48 |
49 | #define N_TX_DESC 3U // Number of chained TX descriptors
50 | #define TX_BUFFER_LENGTH 1522U // TX buffer length
51 |
52 | //--------------------------------------------------------------------------------------------
53 | // Functions prototypes
54 | //--------------------------------------------------------------------------------------------
55 |
56 | void eth_initTxDescriptor();
57 | uint8_t* eth_getTxDescBuffer();
58 | void eth_pointToNextTxDesc();
59 | void eth_setFrameLength(uint32_t length);
60 | BOOL eth_isTxDescOwnedByDma();
61 | void eth_setTxDescOwnedByDma();
62 |
63 | #if DEBUG_TX_DESC
64 | void eth_displayTxDescStatus();
65 | #endif
66 |
67 | //--------------------------------------------------------------------------------------------
68 | #ifdef __cplusplus
69 | }
70 | #endif
71 |
72 | #endif // STM32F4_ETH_TX_DESC_H
73 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_rx_desc.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_rx_desc.h
19 | * @brief RX descriptors handler.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_RX_DESC_H
25 | #define STM32F4_ETH_RX_DESC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 |
37 | #ifdef STM32F4XX
38 | #include "..\stm32f4xx.h"
39 | #else
40 | #include "..\stm32f2xx.h"
41 | #endif
42 |
43 | //--------------------------------------------------------------------------------------------
44 | // Constant defines
45 | //--------------------------------------------------------------------------------------------
46 |
47 | #define DEBUG_RX_DESC 0
48 |
49 | #define N_RX_DESC 8U // Number of chained RX descriptors
50 | #define RX_BUFFER_LENGTH 256U // RX buffer length
51 |
52 | //--------------------------------------------------------------------------------------------
53 | // Functions prototypes
54 | //--------------------------------------------------------------------------------------------
55 |
56 | void eth_initRxDescriptors();
57 | uint8_t* eth_getRxDescBuffer();
58 | void eth_pointToNextRxDesc();
59 | BOOL eth_isRxDescOwnedByDma();
60 | void eth_setRxDescOwnedByDma();
61 | BOOL eth_isFirstDescriptor();
62 | BOOL eth_isLastDescriptor();
63 | uint16_t eth_checkFrameAndGetLength();
64 |
65 | #if DEBUG_RX_DESC
66 | void eth_displayRxDescStatus();
67 | #endif
68 |
69 | //--------------------------------------------------------------------------------------------
70 | #ifdef __cplusplus
71 | }
72 | #endif
73 |
74 | #endif // STM32F4_ETH_RX_DESC_H
75 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_RTC/Time_Pal_Rtc/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | Time_pal_rtc
5 |
6 |
7 | {005500EC-005E-0050-9A61-262D14B9B3D1}
8 | Pal Time functions with RTC connection
9 | PAL
10 | Time_pal_rtc.$(LIB_EXT)
11 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_RTC\Time_Pal_Rtc\dotNetMF.proj
12 | Time_pal_rtc.$(LIB_EXT).manifest
13 | Time
14 |
15 |
16 |
17 | 4
18 | 0
19 | 0
20 | 0
21 |
22 | 2009-06-15
23 | Microsoft
24 |
25 | LibraryCategory
26 |
27 |
28 |
29 |
30 | False
31 |
32 |
33 | False
34 | False
35 | False
36 | True
37 | True
38 | DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_RTC\Time_Pal_Rtc
39 | Library
40 | false
41 | 4.0.0.0
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
53 |
54 |
55 |
56 |
57 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip/STM32F4_ETH_driver.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright 2011 CSA Engineering AG
3 | *
4 | * Licensed under the Apache License, Version 2.0 (the "License");
5 | * you may not use this file except in compliance with the License.
6 | * You may obtain a copy of the License at
7 | *
8 | * http://www.apache.org/licenses/LICENSE-2.0
9 | *
10 | * Unless required by applicable law or agreed to in writing, software
11 | * distributed under the License is distributed on an "AS IS" BASIS,
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 | * See the License for the specific language governing permissions and
14 | * limitations under the License.
15 | */
16 |
17 | /*********************************************************************************************
18 | * @file STM32F4_ETH_driver.h
19 | * @brief STM32F4 ethernet driver.
20 | * @author CSA Engineering AG, Switzerland, www.csa.ch, info@csa.ch
21 | * @date March 2012
22 | ********************************************************************************************/
23 |
24 | #ifndef STM32F4_ETH_DRIVER_H
25 | #define STM32F4_ETH_DRIVER_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | //--------------------------------------------------------------------------------------------
32 | // System and local includes
33 | //--------------------------------------------------------------------------------------------
34 |
35 | #include
36 |
37 | #ifdef STM32F4XX
38 | #include "..\stm32f4xx.h"
39 | #else
40 | #include "..\stm32f2xx.h"
41 | #endif
42 |
43 | #include "STM32F4_ETH_phy.h"
44 |
45 | //--------------------------------------------------------------------------------------------
46 | // Typedefs and enums
47 | //--------------------------------------------------------------------------------------------
48 |
49 | typedef void (*pIntHandler)(void);
50 |
51 | //--------------------------------------------------------------------------------------------
52 | // Functions prototypes
53 | //--------------------------------------------------------------------------------------------
54 |
55 | // DMA and MAC functions
56 | void eth_initDmaMacRegisters(void);
57 | void eth_initMacAddress(const uint8_t *const pAddress);
58 | BOOL eth_macReset(void);
59 | void eth_selectMii(void);
60 | void eth_enableClocks(void);
61 | void eth_disableClocks(void);
62 | void eth_enableTxRx(void);
63 | void eth_disableTxRx(void);
64 | void eth_resumeDmaTransmission(void);
65 | void eth_resumeDmaReception(void);
66 | void eth_dmaInterruptHandler(void);
67 |
68 | // Interrupt handler
69 | void eth_initReceiveIntHandler(pIntHandler receiveHandler);
70 |
71 | // PHY
72 | void eth_initPhy(void);
73 |
74 | // Descriptors
75 | void eth_initTxDescList(uint32_t txAddress);
76 | void eth_initRxDescList(uint32_t rxAddress);
77 |
78 | //--------------------------------------------------------------------------------------------
79 | #ifdef __cplusplus
80 | }
81 | #endif
82 |
83 | #endif // STM32F4_ETH_DRIVER_H
84 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_DA/STM32F4_DA_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** DA Conversion ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | #ifdef STM32F4XX
17 | #include "..\stm32f4xx.h"
18 | #else
19 | #include "..\stm32f2xx.h"
20 | #endif
21 |
22 | ///////////////////////////////////////////////////////////////////////////////
23 |
24 | #define STM32F4_DA_CHANNELS 2 // number of channels
25 | #define STM32F4_DA_FIRST_PIN 4 // channel 0 pin (A4)
26 |
27 | //--//
28 |
29 | BOOL DA_Initialize( DA_CHANNEL channel, INT32 precisionInBits )
30 | {
31 | if (precisionInBits != 12) return FALSE;
32 |
33 | // enable DA clock
34 | RCC->APB1ENR |= RCC_APB1ENR_DACEN;
35 | // set pin as analog
36 | CPU_GPIO_DisablePin(STM32F4_DA_FIRST_PIN + channel, RESISTOR_DISABLED, 0, GPIO_ALT_MODE_1);
37 | if (channel) {
38 | DAC->CR |= DAC_CR_EN2; // enable channel 2
39 | } else {
40 | DAC->CR |= DAC_CR_EN1; // enable channel 1
41 | }
42 | return TRUE;
43 | }
44 |
45 | void DA_Uninitialize( DA_CHANNEL channel )
46 | {
47 | if (channel) {
48 | DAC->CR &= ~DAC_CR_EN2; // disable channel 2
49 | } else {
50 | DAC->CR &= ~DAC_CR_EN1; // disable channel 1
51 | }
52 | // free pin
53 | CPU_GPIO_DisablePin(STM32F4_DA_FIRST_PIN + channel, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY);
54 | if ((DAC->CR & (DAC_CR_EN1 | DAC_CR_EN2)) == 0) { // all channels off
55 | // disable DA clock
56 | RCC->APB1ENR &= ~RCC_APB1ENR_DACEN;
57 | }
58 | }
59 |
60 | // level is a 12 bit value
61 | void DA_Write( DA_CHANNEL channel, INT32 level )
62 | {
63 | if (channel) {
64 | DAC->DHR12R2 = level;
65 | } else {
66 | DAC->DHR12R1 = level;
67 | }
68 | }
69 |
70 | UINT32 DA_DAChannels()
71 | {
72 | return STM32F4_DA_CHANNELS;
73 | }
74 |
75 | GPIO_PIN DA_GetPinForChannel( DA_CHANNEL channel )
76 | {
77 | if ((UINT32)channel >= STM32F4_DA_CHANNELS) return GPIO_PIN_NONE;
78 | return STM32F4_DA_FIRST_PIN + channel;
79 | }
80 |
81 | BOOL DA_GetAvailablePrecisionsForChannel( DA_CHANNEL channel, INT32* precisions, UINT32& size )
82 | {
83 | size = 0;
84 | if (precisions == NULL || (UINT32)channel >= STM32F4_DA_CHANNELS) return FALSE;
85 | precisions[0] = 12;
86 | size = 1;
87 | return TRUE;
88 | }
89 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/TinyHal/GNU_S/FirstEntry.s:
--------------------------------------------------------------------------------
1 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2 | @
3 | @ Licensed under the Apache License, Version 2.0 (the "License");
4 | @ you may not use this file except in compliance with the License.
5 | @ You may obtain a copy of the License at http:;www.apache.org/licenses/LICENSE-2.0
6 | @
7 | @ Copyright (c) Microsoft Corporation. All rights reserved.
8 | @ Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | @
10 | @ CORTEX-M3 Standard Entry Code
11 | @
12 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
13 |
14 |
15 | .global EntryPoint
16 |
17 | .global PreStackInit_Exit_Pointer
18 | .global ARM_Vectors
19 |
20 | .global StackBottom
21 | .global StackTop
22 | .global HeapBegin
23 | .global HeapEnd
24 | .global CustomHeapBegin
25 | .global CustomHeapEnd
26 |
27 | .extern PreStackInit
28 |
29 |
30 | .ifdef HAL_REDUCESIZE
31 | .extern BootEntryLoader
32 | .else
33 | .extern BootEntry
34 | .endif
35 | .extern BootstrapCode
36 |
37 |
38 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
39 |
40 | .section SectionForStackBottom, "a", %progbits
41 | StackBottom:
42 | .word 0
43 | .section SectionForStackTop, "a", %progbits
44 | StackTop:
45 | .word 0
46 | .section SectionForHeapBegin, "a", %progbits
47 | HeapBegin:
48 | .word 0
49 | .section SectionForHeapEnd, "a", %progbits
50 | HeapEnd:
51 | .word 0
52 | .section SectionForCustomHeapBegin, "a", %progbits
53 | ARM_Vectors:
54 | .zero 84*4 @ exception vector table (max 84 entries)
55 | CustomHeapBegin:
56 | .word 0
57 | .section SectionForCustomHeapEnd, "a", %progbits
58 | CustomHeapEnd:
59 | .word 0
60 |
61 |
62 | .section i.EntryPoint, "xa", %progbits
63 |
64 | .entry
65 |
66 | .thumb_func
67 | EntryPoint:
68 |
69 | @ The first word has several functions:
70 | @ - It is the entry point of the application
71 | @ - it contains a signature word used to identify application blocks
72 | @ - out of reset it contains the initial stack pointer value
73 | @ - it is the first entry of the initial exception handler table
74 | @ The actual word used is 0x2000E00C
75 |
76 | b Start @ 0xE00C
77 | .byte 0x00 @ Booter signature is 0x2000E00C
78 | .byte 0x20
79 | .word Start @ Reset
80 | .word Fault_Handler @ NMI
81 | .word Fault_Handler @ Hard Fault
82 | .word Fault_Handler @ MMU Fault
83 | .word Fault_Handler @ Bus Fault
84 | .word Fault_Handler @ Usage Fault
85 |
86 | Start:
87 |
88 | @ allow per processor pre-stack initialization
89 |
90 | PreStackEntry:
91 | b PreStackInit
92 |
93 | PreStackInit_Exit_Pointer:
94 |
95 | ldr sp,StackTop_Ptr
96 | bl BootstrapCode
97 |
98 | .ifdef HAL_REDUCESIZE
99 | b BootEntryLoader
100 | .else
101 | b BootEntry
102 | .endif
103 |
104 |
105 | .align
106 |
107 | StackTop_Ptr:
108 | .word StackTop
109 |
110 | Fault_Handler:
111 | b Fault_Handler
112 |
113 |
114 | .end
115 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/GlobalLock/SmartPtr_cortex_gnu.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // CORTEX-M3 Interrupt Disable Handling
11 | // Compiler independent (CMSIS) version
12 | //
13 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
14 |
15 | #include
16 |
17 | /*
18 | * Usage:
19 | * constructor { Release Acquire | Probe } destructor
20 | *
21 | * legal states: m_state Primask
22 | * WAS_DISABLED 1 1 (disabled)
23 | * WAS_ENABLED 0 1 (disabled)
24 | * RELEASED 0 0 (enabled)
25 | */
26 |
27 |
28 | /*
29 | * disabled -> WAS_DISABLED
30 | * enabled -> WAS_ENABLED
31 | */
32 | SmartPtr_IRQ::SmartPtr_IRQ(void* context)
33 | {
34 | m_context = context; // never used
35 | m_state = __get_PRIMASK();
36 | __disable_irq();
37 | }
38 |
39 | /*
40 | * WAS_DISABLED -> disable
41 | * WAS_ENABLED -> enable
42 | * RELEASED -> enable
43 | */
44 | SmartPtr_IRQ::~SmartPtr_IRQ()
45 | {
46 | __set_PRIMASK(m_state);
47 | }
48 |
49 | BOOL SmartPtr_IRQ::WasDisabled()
50 | {
51 | // Also check for interrupt state != 0
52 | return m_state || __get_IPSR() != 0;
53 | }
54 |
55 | /*
56 | * WAS_DISABLED -> WAS_DISABLED
57 | * WAS_ENABLED -> RELEASED
58 | * RELEASED -> RELEASED
59 | */
60 | void SmartPtr_IRQ::Release()
61 | {
62 | __set_PRIMASK(m_state);
63 | }
64 |
65 | /*
66 | * WAS_DISABLED -> WAS_DISABLED
67 | * WAS_ENABLED -> WAS_ENABLED
68 | * RELEASED -> WAS_ENABLED
69 | */
70 | void SmartPtr_IRQ::Acquire()
71 | {
72 | __disable_irq();
73 | }
74 |
75 | /*
76 | * WAS_DISABLED -> WAS_DISABLED
77 | * WAS_ENABLED -> enabled -> WAS_ENABLED
78 | * RELEASED -> RELEASED
79 | */
80 | void SmartPtr_IRQ::Probe()
81 | {
82 | UINT32 m = __get_PRIMASK();
83 | __set_PRIMASK(m_state);
84 | __nop;
85 | __set_PRIMASK(m);
86 | }
87 |
88 |
89 | // static members
90 |
91 | BOOL SmartPtr_IRQ::GetState(void* context)
92 | {
93 | // Also check for interrupt state == 0
94 | return __get_PRIMASK() == 0 && __get_IPSR() == 0;
95 | }
96 |
97 | BOOL SmartPtr_IRQ::ForceDisabled(void* context)
98 | {
99 | UINT32 m = __get_PRIMASK();
100 | __disable_irq();
101 | return m ^ 1;
102 | }
103 |
104 | BOOL SmartPtr_IRQ::ForceEnabled(void* context)
105 | {
106 | UINT32 m = __get_PRIMASK();
107 | __enable_irq();
108 | return m ^ 1;
109 | }
110 |
111 |
112 | // private members (not used)
113 |
114 | void SmartPtr_IRQ::Disable()
115 | {
116 | m_state = __get_PRIMASK();
117 | __disable_irq();
118 | }
119 |
120 | void SmartPtr_IRQ::Restore()
121 | {
122 | __set_PRIMASK(m_state);
123 | }
124 |
125 |
126 |
--------------------------------------------------------------------------------
/Solutions/Discovery429/DeviceCode/MFUpdate_Config_PAL/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | MFUpdate_Config_PAL_Discovery429
5 | {00CE00AA-0015-0054-BB30-50E798C4E979}
6 | MFUpdate config Discovery429 component
7 | HAL
8 | MFUpdate_Config_PAL_Discovery429.$(LIB_EXT)
9 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\MFUpdate_Config_PAL\dotNetMF.proj
10 | Solutions\Discovery429\DeviceCode\MFUpdate_Config_PAL
11 | MFUpdate_Config_PAL_Discovery429.$(LIB_EXT).manifest
12 |
13 |
14 |
15 |
16 | 4
17 | 0
18 | 0
19 | 0
20 |
21 | 2011-09-15
22 |
23 |
24 | LibraryCategory
25 |
26 |
27 |
28 | False
29 |
30 | False
31 | False
32 | false
33 | True
34 | True
35 | MFUpdate_Config_PAL_Discovery429
36 | {394B2C1A-EE11-4180-8E69-9975B9F05D36}
37 | MFUpdate config MFUpdate_Config_PAL_Discovery429 component
38 | HAL
39 | MFUpdate_Config_PAL_Discovery429.$(LIB_EXT)
40 | $(SPOCLIENT)\Solutions\Discovery429\DeviceCode\MFUpdate_Config_PAL\dotNetMF.proj
41 | Solutions\Discovery429\DeviceCode\MFUpdate_Config_PAL
42 | Library
43 | false
44 | 4.0.0.0
45 |
46 |
47 |
48 |
49 |
50 |
51 |
52 |
53 |
54 |
55 |
56 |
57 |
58 |
59 |
60 |
61 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/TinyHal/Aborts.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // CORTEX-M3 Abort Handling
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 | #include "..\..\stm32f10x.h"
16 |
17 | //--//
18 |
19 | #if !defined(BUILD_RTM)
20 |
21 | void monitor_debug_printf( const char* format, ... )
22 | {
23 | char buffer[256];
24 | va_list arg_ptr;
25 |
26 | va_start( arg_ptr, format );
27 |
28 | int len = hal_vsnprintf( buffer, sizeof(buffer)-1, format, arg_ptr );
29 |
30 | // flush existing characters
31 | USART_Flush( ConvertCOM_ComPort(USART_DEFAULT_PORT) );
32 |
33 | // write string
34 | USART_Write( ConvertCOM_ComPort(USART_DEFAULT_PORT), buffer, len );
35 |
36 | // flush new characters
37 | USART_Flush( ConvertCOM_ComPort(USART_DEFAULT_PORT) );
38 |
39 | va_end( arg_ptr );
40 | }
41 |
42 | void FAULT_HandlerDisplay( UINT32 *registers, UINT32 exception )
43 | {
44 | int i;
45 |
46 | USART_Initialize( ConvertCOM_ComPort(USART_DEFAULT_PORT), USART_DEFAULT_BAUDRATE, USART_PARITY_NONE, 8, USART_STOP_BITS_ONE, USART_FLOW_NONE );
47 |
48 | if (exception) {
49 | monitor_debug_printf("EXCEPTION 0x%02x:\r\n", exception);
50 | } else {
51 | monitor_debug_printf("ERROR:\r\n");
52 | }
53 | monitor_debug_printf(" cpsr=0x%08x\r\n", registers[15]);
54 | monitor_debug_printf(" pc =0x%08x\r\n", registers[14]);
55 | monitor_debug_printf(" lr =0x%08x\r\n", registers[13]);
56 | monitor_debug_printf(" sp =0x%08x\r\n", registers + 16);
57 | for(i = 0; i <= 12; i++) {
58 | monitor_debug_printf(" r%02d =0x%08x\r\n", i, registers[i]);
59 | }
60 | if (exception) {
61 | UINT32 cfsr = SCB->CFSR;
62 | monitor_debug_printf(" cfsr=0x%08x\r\n", cfsr);
63 | if (cfsr & 0x8000) { // BFAR valid
64 | UINT32 bfar = SCB->BFAR;
65 | monitor_debug_printf(" bfar=0x%08x\r\n", bfar);
66 | }
67 | UINT32 hfsr = SCB->HFSR;
68 | monitor_debug_printf(" hfsr=0x%08x\r\n", hfsr);
69 | }
70 | }
71 |
72 | #endif // !defined(BUILD_RTM)
73 |
74 | extern "C"
75 | {
76 | void FAULT_Handler( UINT32* registers, UINT32 exception )
77 | {
78 | ASSERT_IRQ_MUST_BE_OFF();
79 | #if !defined(BUILD_RTM)
80 | FAULT_HandlerDisplay(registers, exception);
81 | CPU_Halt();
82 | #else
83 | CPU_Reset();
84 | #endif // !defined(BUILD_RTM)
85 | }
86 |
87 | void HARD_Breakpoint_Handler(UINT32 *registers)
88 | {
89 | #if !defined(BUILD_RTM)
90 | GLOBAL_LOCK(irq);
91 | FAULT_HandlerDisplay(registers, 0);
92 | CPU_Halt();
93 | #else
94 | CPU_Reset();
95 | #endif // !defined(BUILD_RTM)
96 | }
97 | }
98 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Analog/STM32F4_AD_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** AD Conversion ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | #ifdef STM32F4XX
17 | #include "..\stm32f4xx.h"
18 | #else
19 | #include "..\stm32f2xx.h"
20 | #endif
21 |
22 | //--//
23 |
24 |
25 | #define STM32F4_AD_SAMPLE_TIME 2 // sample time = 28 cycles
26 |
27 | #if STM32F4_ADC == 1
28 | #define ADCx ADC1
29 | #define RCC_APB2ENR_ADCxEN RCC_APB2ENR_ADC1EN
30 | #define STM32F4_ADC_PINS {0,1,2,3,4,5,6,7,16,17,32,33,34,35,36,37} // ADC1 pins
31 | #elif STM32F4_ADC == 3
32 | #define ADCx ADC3
33 | #define RCC_APB2ENR_ADCxEN RCC_APB2ENR_ADC3EN
34 | #define STM32F4_ADC_PINS {0,1,2,3,86,87,88,89,90,83,32,33,34,35,84,85} // ADC3 pins
35 | #else
36 | #error wrong STM32F4_ADC value (1 or 3)
37 | #endif
38 |
39 | // Channels
40 | static const BYTE g_STM32F4_AD_Channel[] = STM32F4_AD_CHANNELS;
41 | static const BYTE g_STM32F4_AD_Pins[] = STM32F4_ADC_PINS;
42 | #define STM32F4_AD_NUM ARRAYSIZE_CONST_EXPR(g_STM32F4_AD_Channel) // number of channels
43 |
44 |
45 | //--//
46 |
47 | BOOL AD_Initialize( ANALOG_CHANNEL channel, INT32 precisionInBits )
48 | {
49 | if (!(RCC->APB2ENR & RCC_APB2ENR_ADCxEN)) { // not yet initialized
50 | RCC->APB2ENR |= RCC_APB2ENR_ADCxEN; // enable AD clock
51 | ADC->CCR = 0; // ADCCLK = PB2CLK / 2;
52 | ADCx->SQR1 = 0; // 1 conversion
53 | ADCx->CR1 = 0;
54 | ADCx->CR2 = ADC_CR2_ADON; // AD on
55 | ADCx->SMPR1 = 0x01249249 * STM32F4_AD_SAMPLE_TIME;
56 | ADCx->SMPR2 = 0x09249249 * STM32F4_AD_SAMPLE_TIME;
57 | }
58 | // set pin as analog input
59 | CPU_GPIO_DisablePin(AD_GetPinForChannel(channel), RESISTOR_DISABLED, 0, GPIO_ALT_MODE_1);
60 | return TRUE;
61 | }
62 |
63 | void AD_Uninitialize( ANALOG_CHANNEL channel )
64 | {
65 | // free pin
66 | CPU_GPIO_DisablePin(AD_GetPinForChannel(channel), RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY);
67 | }
68 |
69 | INT32 AD_Read( ANALOG_CHANNEL channel )
70 | {
71 | if ((UINT32)channel >= STM32F4_AD_NUM) return 0;
72 | int x = ADCx->DR; // clear EOC flag
73 | ADCx->SQR3 = g_STM32F4_AD_Channel[channel]; // select channel
74 | ADCx->CR2 |= ADC_CR2_SWSTART; // start AD
75 | while (!(ADCx->SR & ADC_SR_EOC)); // wait for completion
76 | return ADCx->DR; // read result
77 | }
78 |
79 | UINT32 AD_ADChannels()
80 | {
81 | return STM32F4_AD_NUM;
82 | }
83 |
84 | GPIO_PIN AD_GetPinForChannel( ANALOG_CHANNEL channel )
85 | {
86 | if ((UINT32)channel >= STM32F4_AD_NUM) return GPIO_PIN_NONE;
87 | int chNum = g_STM32F4_AD_Channel[channel];
88 | return (GPIO_PIN)g_STM32F4_AD_Pins[chNum];
89 | }
90 |
91 | BOOL AD_GetAvailablePrecisionsForChannel( ANALOG_CHANNEL channel, INT32* precisions, UINT32& size )
92 | {
93 | size = 0;
94 | if (precisions == NULL || (UINT32)channel >= STM32F4_AD_NUM) return FALSE;
95 | precisions[0] = 12;
96 | size = 1;
97 | return TRUE;
98 | }
99 |
--------------------------------------------------------------------------------
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67 |
68 |
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70 |
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/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_security/dotNetMF.proj:
--------------------------------------------------------------------------------
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2 |
3 | STM32F4_Security
4 |
5 |
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8 | HAL
9 | STM32F4_Security.$(LIB_EXT)
10 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_security\dotNetMF.proj
11 | STM32F4_Security.$(LIB_EXT).manifest
12 | Processor\STM32F4
13 |
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61 |
62 |
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64 | Library
65 | false
66 | 4.0.0.0
67 |
68 |
69 | true
70 |
71 |
72 |
73 |
74 |
75 |
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78 |
79 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_I2C/dotNetMF.proj:
--------------------------------------------------------------------------------
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11 | STM32F4_I2C.$(LIB_EXT).manifest
12 | Processor\STM32F4
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68 |
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70 |
71 |
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73 |
74 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/processor_selector.h:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // STM32F2/F4 specific definitions
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 |
15 | #ifndef _STM32F4_PROCESSOR_SELECTOR_H_
16 | #define _STM32F4_PROCESSOR_SELECTOR_H_ 1
17 |
18 | #define PLATFORM_ARM_DEFINED
19 |
20 | #if defined(PLATFORM_ARM_STM32F2)
21 | #define STM32F2XX
22 | #elif defined(PLATFORM_ARM_STM32F4)
23 | #define STM32F4XX
24 | #else
25 | ERROR - WE SHOULD NOT INCLUDE THIS HEADER IF NOT BUILDING A STM32F2/F4 PLATFORM
26 | #endif
27 |
28 | /////////////////////////////////////////////////////////
29 | //
30 | // macros
31 | //
32 |
33 | #define GLOBAL_LOCK(x) SmartPtr_IRQ x
34 | #define DISABLE_INTERRUPTS() SmartPtr_IRQ::ForceDisabled()
35 | #define ENABLE_INTERRUPTS() SmartPtr_IRQ::ForceEnabled()
36 | #define INTERRUPTS_ENABLED_STATE() SmartPtr_IRQ::GetState()
37 | #define GLOBAL_LOCK_SOCKETS(x) SmartPtr_IRQ x
38 |
39 | #if defined(_DEBUG)
40 | #define ASSERT_IRQ_MUST_BE_OFF() ASSERT(!SmartPtr_IRQ::GetState())
41 | #define ASSERT_IRQ_MUST_BE_ON() ASSERT( SmartPtr_IRQ::GetState())
42 | #else
43 | #define ASSERT_IRQ_MUST_BE_OFF()
44 | #define ASSERT_IRQ_MUST_BE_ON()
45 | #endif
46 |
47 |
48 | #define INTERRUPT_START SystemState_SetNoLock( SYSTEM_STATE_ISR ); \
49 | SystemState_SetNoLock( SYSTEM_STATE_NO_CONTINUATIONS );
50 | #define INTERRUPT_END SystemState_ClearNoLock( SYSTEM_STATE_NO_CONTINUATIONS ); \
51 | SystemState_ClearNoLock( SYSTEM_STATE_ISR );
52 |
53 |
54 | //
55 | // macros
56 | //
57 | /////////////////////////////////////////////////////////
58 |
59 | /////////////////////////////////////////////////////////
60 | // communicaiton facilities
61 | //
62 |
63 | // Port definitions
64 | #define COM1 ConvertCOM_ComHandle(0)
65 | #define COM2 ConvertCOM_ComHandle(1)
66 | #define COM3 ConvertCOM_ComHandle(2)
67 | #define COM4 ConvertCOM_ComHandle(3)
68 | #define COM5 ConvertCOM_ComHandle(4)
69 | #define COM6 ConvertCOM_ComHandle(5)
70 |
71 | #define USB1 ConvertCOM_UsbHandle(0)
72 | #define USB2 ConvertCOM_UsbHandle(1)
73 |
74 | #define TOTAL_DEBUG_PORT 1
75 | #define COM_DEBUG ConvertCOM_DebugHandle(0)
76 |
77 | #define COM_MESSAGING ConvertCOM_MessagingHandle(0)
78 |
79 | #define USART_TX_IRQ_INDEX(x) 6 // dummy index (EXTI0, always on)
80 | #define USB_IRQ_INDEX 6 // dummy index (EXTI0, always on)
81 |
82 |
83 | #ifndef PLATFORM_DEPENDENT_TX_USART_BUFFER_SIZE
84 | #define PLATFORM_DEPENDENT_TX_USART_BUFFER_SIZE 256 // there is one TX for each usart port
85 | #endif
86 | #ifndef PLATFORM_DEPENDENT_RX_USART_BUFFER_SIZE
87 | #define PLATFORM_DEPENDENT_RX_USART_BUFFER_SIZE 256 // there is one RX for each usart port
88 | #endif
89 | #ifndef PLATFORM_DEPENDENT_USB_QUEUE_PACKET_COUNT
90 | #define PLATFORM_DEPENDENT_USB_QUEUE_PACKET_COUNT 8 // there is one queue for each pipe of each endpoint and the size of a single packet is sizeof(USB_PACKET64) == 68 bytes
91 | #endif
92 |
93 | //
94 | // communicaiton facilities
95 | /////////////////////////////////////////////////////////
96 |
97 |
98 | #endif
99 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_IntC/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32F4_INTC
4 |
5 |
6 | {00D300C2-007C-0008-9F37-9BAEEF92FB70}
7 | STM32F4 interrupt controller driver
8 | HAL
9 | STM32F4_INTC.$(LIB_EXT)
10 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_INTC\dotNetMF.proj
11 | STM32F4_INTC.$(LIB_EXT).manifest
12 | Processor\STM32F4
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
25 | 0
26 | 0
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34 |
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67 |
68 |
69 | true
70 |
71 |
72 |
73 |
74 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Flash/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_Flash\dotNetMF.proj
4 | {00650055-00D3-008E-9D45-3758F085F71F}
5 | STM32F4_Flash
6 |
7 |
8 | STM32F4 internal flash block storage driver
9 | HAL
10 | STM32F4_Flash.$(LIB_EXT)
11 | STM32F4_Flash.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
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61 |
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63 | Library
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66 |
67 |
68 |
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70 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Bootstrap/dotNetMF.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | STM32F4_bootstrap
4 |
5 |
6 | {00AE00E7-003A-0024-B0ED-D9866B1A1861}
7 | STM32F4 bootstrap driver
8 | HAL
9 | STM32F4_bootstrap.$(LIB_EXT)
10 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_Bootstrap\dotNetMF.proj
11 | STM32F4_bootstrap.$(LIB_EXT).manifest
12 | Processor\STM32F4
13 |
14 |
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20 | False
21 |
22 |
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62 |
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64 | Library
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67 |
68 |
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71 |
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74 |
75 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Flash/dotNetMF_x9.proj:
--------------------------------------------------------------------------------
1 |
2 |
3 | $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_Flash\dotNetMF_x9.proj
4 | {009300C0-0019-0076-9144-FAA4C1028B6F}
5 | STM32F4_Flash_x9
6 |
7 |
8 | STM32F4 internal flash block storage driver
9 | HAL
10 | STM32F4_Flash_x9.$(LIB_EXT)
11 | STM32F4_Flash_x9.$(LIB_EXT).manifest
12 | BlockStorage
13 |
14 |
15 | False
16 |
17 |
18 | False
19 | False
20 | False
21 |
22 |
23 |
24 | 4
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57 | Oberon microsystems, Inc.
58 |
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60 |
61 |
62 | DeviceCode\Targets\Native\STM32F4\DeviceCode\STM32F4_Flash
63 | Library
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65 | 4.0.0.0
66 |
67 |
68 |
69 |
70 |
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73 |
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75 |
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--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_RTC/STM32F4_RTC_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** STM32F4 RTC driver ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 |
15 | #include
16 | #include "RTC_decl.h"
17 |
18 | #ifdef STM32F4XX
19 | #include "..\stm32f4xx.h"
20 | #else
21 | #include "..\stm32f2xx.h"
22 | #endif
23 |
24 |
25 | BOOL RTC_Initialize()
26 | {
27 | PWR->CR |= PWR_CR_DBP; // enable RTC access
28 | RCC->BDCR |= RCC_BDCR_RTCSEL_0 | RCC_BDCR_LSEON | RCC_BDCR_RTCEN; // RTC & LSE on
29 |
30 | return TRUE;
31 | }
32 |
33 | UINT32 RTC_BcdToBin(UINT32 bcd)
34 | {
35 | return (bcd >> 4) * 10 + (bcd & 15);
36 | }
37 |
38 | UINT32 RTC_BinToBcd(UINT32 bin)
39 | {
40 | return bin / 10 << 4 | bin % 10;
41 | }
42 |
43 | INT64 RTC_GetTime()
44 | {
45 | if (!(RTC->ISR & RTC_ISR_INITS)) { // RTC not set up
46 | return 0;
47 | }
48 |
49 | while (!(RTC->ISR & RTC_ISR_RSF)); // wait for shadow register ready
50 |
51 | #ifdef STM32F4XX
52 | UINT32 ss = ~RTC->SSR & 255; // sub seconds [s/256]
53 | #endif
54 | UINT32 tr = RTC->TR; // time
55 | UINT32 dr = RTC->DR; // date
56 |
57 | SYSTEMTIME sysTime;
58 | #ifdef STM32F4XX
59 | sysTime.wMilliseconds = ss * 1000 >> 8; // s/256 -> ms
60 | #else
61 | sysTime.wMilliseconds = 0;
62 | #endif
63 | sysTime.wSecond = RTC_BcdToBin(tr & 0x7F);
64 | sysTime.wMinute = RTC_BcdToBin(tr >> 8 & 0x7F);
65 | sysTime.wHour = RTC_BcdToBin(tr >> 16 & 0x3F);
66 | sysTime.wDay = RTC_BcdToBin(dr & 0x3F);
67 | sysTime.wMonth = RTC_BcdToBin(dr >> 8 & 0x1F);
68 | sysTime.wYear = 2000 + RTC_BcdToBin(dr >> 16 & 0xFF);
69 | return Time_FromSystemTime(&sysTime);
70 | }
71 |
72 | void RTC_SetTime( INT64 time )
73 | {
74 | RTC->WPR = 0xCA; // disable write protection
75 | RTC->WPR = 0x53;
76 | RTC->ISR = 0xFFFFFFFF; // enter Init mode
77 |
78 | SYSTEMTIME sysTime;
79 | Time_ToSystemTime(time, &sysTime);
80 | UINT32 tr = RTC_BinToBcd(sysTime.wSecond)
81 | | RTC_BinToBcd(sysTime.wMinute) << 8
82 | | RTC_BinToBcd(sysTime.wHour) << 16;
83 | UINT32 dr = RTC_BinToBcd(sysTime.wDay)
84 | | RTC_BinToBcd(sysTime.wMonth) << 8
85 | | (sysTime.wDayOfWeek ? sysTime.wDayOfWeek : 7) << 13
86 | | RTC_BinToBcd(sysTime.wYear % 100) << 16;
87 |
88 | while (!(RTC->ISR & RTC_ISR_INITF)); // wait for Init mode ready
89 |
90 | RTC->CR &= ~(RTC_CR_FMT); // 24h format
91 | RTC->TR = tr;
92 | RTC->DR = dr;
93 |
94 | #ifdef RTC_CALIBRATION
95 | #if RTC_CALIBRATION > 488 || RTC_CALIBRATION < -488
96 | #error illegal RTC_CALIBRATION value (-488..488)
97 | #endif
98 | UINT32 cal = -((RTC_CALIBRATION << 20) / 1000000); // ppm -> 1/2^20
99 | if (cal < 0) cal += RTC_CALR_CALP | 512;
100 | RTC->CALR = cal;
101 | }
102 | #endif
103 |
104 | RTC->ISR = 0xFFFFFFFF & ~RTC_ISR_INIT; // exit Init mode
105 | RTC->WPR = 0xFF; // enable write protection
106 | }
107 |
108 | INT32 RTC_GetOffset()
109 | {
110 | return RTC->BKP0R;
111 | }
112 |
113 | void RTC_SetOffset(INT32 offset)
114 | {
115 | RTC->WPR = 0xCA; // disable write protection
116 | RTC->WPR = 0x53;
117 | RTC->BKP0R = offset;
118 | RTC->WPR = 0xFF; // enable write protection
119 | }
120 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32/DeviceCode/CortexM3/TinyHal/GNU_S/FirstEntryMinimal.s:
--------------------------------------------------------------------------------
1 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2 | @
3 | @ Licensed under the Apache License, Version 2.0 (the "License");
4 | @ you may not use this file except in compliance with the License.
5 | @ You may obtain a copy of the License at http:;www.apache.org/licenses/LICENSE-2.0
6 | @
7 | @ Copyright (c) Microsoft Corporation. All rights reserved.
8 | @ Implementation for STM32: Copyright (c) Oberon microsystems, Inc.
9 | @
10 | @ CORTEX-M3 Bootloader Entry Code
11 | @
12 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
13 |
14 | .global EntryPoint
15 |
16 | .global ARM_Vectors
17 |
18 | .global StackBottom
19 | .global StackTop
20 | .global HeapBegin
21 | .global HeapEnd
22 | .global CustomHeapBegin
23 | .global CustomHeapEnd
24 |
25 | .extern BootEntry
26 | .extern BootstrapCodeMinimal
27 |
28 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
29 |
30 | @ these define the region to zero initialize
31 | .extern Image$$ER_RAM_RW$$ZI$$Base
32 | .extern Image$$ER_RAM_RW$$ZI$$Length
33 |
34 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
35 |
36 | .section SectionForStackBottom, "a", %progbits
37 | StackBottom:
38 | .word 0
39 | .section SectionForStackTop, "a", %progbits
40 | StackTop:
41 | .word 0
42 | .section SectionForHeapBegin, "a", %progbits
43 | HeapBegin:
44 | .word 0
45 | .section SectionForHeapEnd, "a", %progbits
46 | HeapEnd:
47 | .word 0
48 | .section SectionForCustomHeapBegin, "a", %progbits
49 | ARM_Vectors:
50 | .zero 84*4 @ exception vector table (max 84 entries)
51 | CustomHeapBegin:
52 | .word 0
53 | .section SectionForCustomHeapEnd, "a", %progbits
54 | CustomHeapEnd:
55 | .word 0
56 |
57 |
58 | .section i.EntryPoint, "xa", %progbits
59 |
60 | .entry
61 |
62 | .thumb_func
63 | EntryPoint:
64 |
65 | @ The first word has several functions:
66 | @ - It is the entry point of the application
67 | @ - it contains a signature word used to identify application blocks
68 | @ - out of reset it contains the initial stack pointer value
69 | @ - it is the first entry of the initial exception handler table
70 | @ The actual word used is 0x2000E00C
71 |
72 | b Start @ 0xE00C
73 | .byte 0x00 @ Booter signature is 0x2000E00C
74 | .byte 0x20
75 | .word Start @ Reset
76 | .word Fault_Handler @ NMI
77 | .word Fault_Handler @ Hard Fault
78 | .word Fault_Handler @ MMU Fault
79 | .word Fault_Handler @ Bus Fault
80 | .word Fault_Handler @ Usage Fault
81 |
82 | Start:
83 |
84 | ldr sp,StackTop_Ptr
85 | bl BootstrapCodeMinimal
86 |
87 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
88 | @ clear the Zero Initialized RAM, .bss
89 | @ do this last just in case there is overlap on the load area
90 | @ and the execution ZI area
91 | @ this is not a failsafe, but helps some situations
92 | @ it would be nice to trap non-workable scatter files somehow - more thought required here @todo
93 |
94 | ldr r0, = Image$$ER_RAM_RW$$ZI$$Length
95 | cmp r0, #0
96 | beq NoClearZI_ER_RAM
97 | ldr r1, = Image$$ER_RAM_RW$$ZI$$Base
98 | mov r2, #0
99 |
100 | ClearZI_ER_RAM:
101 |
102 | stmia r1!, { r2 }
103 | subs r0, r0, #4 @ 4 bytes filled per loop
104 | bne ClearZI_ER_RAM
105 |
106 | NoClearZI_ER_RAM:
107 |
108 |
109 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
110 | @ done moving and clearing RAM, so continue on in C
111 |
112 | b BootEntry
113 |
114 |
115 | .align
116 |
117 | StackTop_Ptr:
118 | DCD StackTop
119 |
120 | Fault_Handler:
121 | b Fault_Handler
122 |
123 |
124 | .end
125 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_RTC/Time_Pal_Rtc/time_functions_rtc.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | //
9 | // *** Pal Time Driver with RTC Connection ***
10 | //
11 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
12 |
13 |
14 | #include
15 | #include "Time_driver.h"
16 | #include "..\RTC_decl.h"
17 |
18 |
19 |
20 | // ********** Time Function Wrappers with RTC Access **********
21 |
22 | HRESULT Time_Initialize()
23 | {
24 | RTC_Initialize();
25 | HRESULT res = g_TimeDriver.Initialize();
26 | INT64 time = RTC_GetTime();
27 | if (time != 0) {
28 | g_TimeDriver.SetUtcTime(time, FALSE);
29 | INT32 offset = RTC_GetOffset();
30 | g_TimeDriver.SetTimeZoneOffset(offset);
31 | }
32 | return res;
33 | }
34 |
35 | INT64 Time_SetUtcTime( INT64 UtcTime, bool calibrate )
36 | {
37 | RTC_SetTime(UtcTime);
38 | return g_TimeDriver.SetUtcTime( UtcTime, calibrate );
39 | }
40 |
41 | INT32 Time_SetTimeZoneOffset(INT32 offset)
42 | {
43 | // offset in minutes
44 | RTC_SetOffset(offset);
45 | return g_TimeDriver.SetTimeZoneOffset(offset);
46 | }
47 |
48 |
49 | // ********** Standard Time Function Wrappers **********
50 |
51 | HRESULT Time_Uninitialize()
52 | {
53 | return g_TimeDriver.Uninitialize();
54 | }
55 |
56 | INT64 Time_GetUtcTime()
57 | {
58 | return g_TimeDriver.GetUtcTime();
59 | }
60 |
61 | INT64 Time_GetLocalTime()
62 | {
63 | return g_TimeDriver.GetLocalTime();
64 | }
65 |
66 | INT32 Time_GetTimeZoneOffset()
67 | {
68 | return g_TimeDriver.GetTimeZoneOffset();
69 | }
70 |
71 | INT64 Time_GetTickCount()
72 | {
73 | return g_TimeDriver.GetTickCount();
74 | }
75 |
76 | INT64 Time_GetMachineTime()
77 | {
78 | return g_TimeDriver.GetMachineTime();
79 | }
80 |
81 | BOOL Time_ToSystemTime(INT64 time, SYSTEMTIME* systemTime)
82 | {
83 | return g_TimeDriver.ToSystemTime(time, systemTime);
84 | }
85 |
86 | INT64 Time_FromSystemTime(const SYSTEMTIME* systemTime)
87 | {
88 | return g_TimeDriver.FromSystemTime(systemTime);
89 | }
90 |
91 | HRESULT Time_DaysInMonth(INT32 year, INT32 month, INT32* days)
92 | {
93 | return g_TimeDriver.DaysInMonth(year, month, days);
94 | }
95 |
96 | HRESULT Time_AccDaysInMonth(INT32 year, INT32 month, INT32* days)
97 | {
98 | return g_TimeDriver.AccDaysInMonth(year, month, days);
99 | }
100 |
101 | BOOL Utility_SafeSprintfV( LPSTR& szBuffer, size_t& iBuffer, LPCSTR format, va_list arg )
102 | {
103 | return g_TimeDriver.SafeSprintfV(szBuffer, iBuffer, format, arg);
104 | }
105 |
106 | BOOL Utility_SafeSprintf( LPSTR& szBuffer, size_t& iBuffer, LPCSTR format, ... )
107 | {
108 | va_list arg;
109 | BOOL fRes;
110 | va_start( arg, format );
111 | fRes = g_TimeDriver.SafeSprintfV(szBuffer, iBuffer, format, arg);
112 | va_end( arg );
113 | return fRes;
114 | }
115 |
116 | BOOL Time_TimeSpanToStringEx( const INT64& ticks, LPSTR& buf, size_t& len )
117 | {
118 | return g_TimeDriver.TimeSpanToString(ticks, buf, len);
119 | }
120 |
121 | LPCSTR Time_TimeSpanToString( const INT64& ticks )
122 | {
123 | return g_TimeDriver.TimeSpanToString(ticks);
124 | }
125 |
126 | BOOL Time_DateTimeToStringEx( const INT64& time, LPSTR& buf, size_t& len )
127 | {
128 | return g_TimeDriver.DateTimeToString(time, buf, len);
129 | }
130 |
131 | LPCSTR Time_DateTimeToString( const INT64& time)
132 | {
133 | return g_TimeDriver.DateTimeToString(time);
134 | }
135 |
136 | LPCSTR Time_CurrentDateTimeToString()
137 | {
138 | return g_TimeDriver.DateTimeToString(Time_GetLocalTime());
139 | }
140 |
141 |
142 |
143 |
--------------------------------------------------------------------------------
/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_Power/STM32F4_Power_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** CPU Power States ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 | #include "STM32F4_Power_functions.h"
16 |
17 | #ifdef STM32F4XX
18 | #include "..\stm32f4xx.h"
19 | #else
20 | #include "..\stm32f2xx.h"
21 | #endif
22 |
23 |
24 | static void (*g_STM32F4_stopHandler)();
25 | static void (*g_STM32F4_restartHandler)();
26 |
27 |
28 | void STM32F4_SetPowerHandlers(void (*stop)(), void (*restart)())
29 | {
30 | g_STM32F4_stopHandler = stop;
31 | g_STM32F4_restartHandler = restart;
32 | }
33 |
34 |
35 | BOOL CPU_Initialize()
36 | {
37 | NATIVE_PROFILE_HAL_PROCESSOR_POWER();
38 | CPU_INTC_Initialize();
39 | return TRUE;
40 | }
41 |
42 |
43 | void CPU_ChangePowerLevel(POWER_LEVEL level)
44 | {
45 | switch(level)
46 | {
47 | case POWER_LEVEL__MID_POWER:
48 | break;
49 |
50 | case POWER_LEVEL__LOW_POWER:
51 | break;
52 |
53 | case POWER_LEVEL__HIGH_POWER:
54 | default:
55 | break;
56 | }
57 | }
58 |
59 | void CPU_Sleep( SLEEP_LEVEL level, UINT64 wakeEvents )
60 | {
61 | NATIVE_PROFILE_HAL_PROCESSOR_POWER();
62 |
63 | switch(level) {
64 |
65 | case SLEEP_LEVEL__DEEP_SLEEP: // stop
66 | // stop peripherals if needed
67 | if (g_STM32F4_stopHandler != NULL) g_STM32F4_stopHandler();
68 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
69 | PWR->CR |= PWR_CR_CWUF | PWR_CR_FPDS | PWR_CR_LPDS; // low power deepsleep
70 | __WFI(); // stop clocks and wait for external interrupt
71 | #if SYSTEM_CRYSTAL_CLOCK_HZ != 0
72 | RCC->CR |= RCC_CR_HSEON; // HSE on
73 | #endif
74 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; // reset deepsleep
75 | while(!(RCC->CR & RCC_CR_HSERDY));
76 | RCC->CR |= RCC_CR_PLLON; // pll on
77 | while(!(RCC->CR & RCC_CR_PLLRDY));
78 | RCC->CFGR |= RCC_CFGR_SW_PLL; // sysclk = pll out
79 | #if SYSTEM_CRYSTAL_CLOCK_HZ != 0
80 | RCC->CR &= ~RCC_CR_HSION; // HSI off
81 | #endif
82 | // restart peripherals if needed
83 | if (g_STM32F4_restartHandler != NULL) g_STM32F4_restartHandler();
84 | return;
85 | case SLEEP_LEVEL__OFF: // standby
86 | // stop peripherals if needed
87 | if (g_STM32F4_stopHandler != NULL) g_STM32F4_stopHandler();
88 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
89 | PWR->CR |= PWR_CR_CWUF | PWR_CR_PDDS; // power down deepsleep
90 | __WFI(); // soft power off, never returns
91 | return;
92 | default: // sleep
93 | PWR->CR |= PWR_CR_CWUF;
94 | __WFI(); // sleep and wait for interrupt
95 | return;
96 | }
97 |
98 | }
99 |
100 | void CPU_Halt() // unrecoverable error
101 | {
102 | NATIVE_PROFILE_HAL_PROCESSOR_POWER();
103 | while(1);
104 | }
105 |
106 | void CPU_Reset()
107 | {
108 | NATIVE_PROFILE_HAL_PROCESSOR_POWER();
109 | SCB->AIRCR = (0x5FA << SCB_AIRCR_VECTKEY_Pos) // unlock key
110 | | (1 << SCB_AIRCR_SYSRESETREQ_Pos); // reset request
111 | while(1); // wait for reset
112 | }
113 |
114 | BOOL CPU_IsSoftRebootSupported ()
115 | {
116 | NATIVE_PROFILE_HAL_PROCESSOR_POWER();
117 | return TRUE;
118 | }
119 |
120 | __asm void HAL_AssertEx()
121 | {
122 | BKPT #0
123 | L1 B L1
124 | BX lr
125 | }
126 |
127 | //--//
128 |
129 |
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/Solutions/Discovery429/TinyBooter/scatterfile_bootloader_mdk.xml:
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/Solutions/Discovery429/TinyBooter/scatterfile_bootloader_rvds.xml:
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/DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_IntC/STM32F4_intc_functions.cpp:
--------------------------------------------------------------------------------
1 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
2 | //
3 | // Licensed under the Apache License, Version 2.0 (the "License");
4 | // you may not use this file except in compliance with the License.
5 | // You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
6 | //
7 | // Copyright (c) Microsoft Corporation. All rights reserved.
8 | // Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc.
9 | //
10 | // *** Interrupt Handling ***
11 | //
12 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
13 |
14 | #include
15 |
16 | #ifdef STM32F4XX
17 | #include "..\stm32f4xx.h"
18 | #else
19 | #include "..\stm32f2xx.h"
20 | #endif
21 |
22 | extern UINT32 ARM_Vectors[84]; // the interrupt vector table
23 | extern UINT32 FAULT_SubHandler; // the standard fault handler
24 | #ifdef FIQ_SAMPLING_PROFILER
25 | extern UINT32 FIQ_Handler; // the profiler NMI handler
26 | #endif
27 |
28 | void CPU_INTC_Initialize()
29 | {
30 | // disable all interrupts
31 | NVIC->ICER[0] = 0xFFFFFFFF;
32 | NVIC->ICER[1] = 0xFFFFFFFF;
33 | NVIC->ICER[2] = 0xFFFFFFFF;
34 | // clear pending bits
35 | NVIC->ICPR[0] = 0xFFFFFFFF;
36 | NVIC->ICPR[1] = 0xFFFFFFFF;
37 | NVIC->ICPR[2] = 0xFFFFFFFF;
38 |
39 | #ifdef FIQ_SAMPLING_PROFILER
40 | ARM_Vectors[2] = (UINT32)&FIQ_Handler; // NMI
41 | #else
42 | ARM_Vectors[2] = (UINT32)&FAULT_SubHandler; // NMI
43 | #endif
44 | ARM_Vectors[3] = (UINT32)&FAULT_SubHandler; // Hard Fault
45 | ARM_Vectors[4] = (UINT32)&FAULT_SubHandler; // MMU Fault
46 | ARM_Vectors[5] = (UINT32)&FAULT_SubHandler; // Bus Fault
47 | ARM_Vectors[6] = (UINT32)&FAULT_SubHandler; // Usage Fault
48 | ARM_Vectors[11] = (UINT32)&FAULT_SubHandler; // SVC
49 | ARM_Vectors[12] = (UINT32)&FAULT_SubHandler; // Debug
50 | ARM_Vectors[14] = (UINT32)&FAULT_SubHandler; // PendSV
51 | ARM_Vectors[15] = (UINT32)&FAULT_SubHandler; // Systick
52 |
53 | __DMB(); // ensure table is written
54 |
55 | SCB->AIRCR = (0x5FA << SCB_AIRCR_VECTKEY_Pos) // unlock key
56 | | (7 << SCB_AIRCR_PRIGROUP_Pos); // no priority group bits
57 | SCB->VTOR = (UINT32)ARM_Vectors; // vector table base
58 | SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk // enable faults
59 | | SCB_SHCSR_BUSFAULTENA_Msk
60 | | SCB_SHCSR_MEMFAULTENA_Msk;
61 |
62 | }
63 |
64 | BOOL CPU_INTC_ActivateInterrupt( UINT32 Irq_Index, HAL_CALLBACK_FPN ISR, void* ISR_Param )
65 | {
66 | ARM_Vectors[Irq_Index + 16] = (UINT32)ISR; // exception = irq + 16
67 | __DMB(); // asure table is written
68 | NVIC->ICPR[Irq_Index >> 5] = 1 << (Irq_Index & 0x1F); // clear pending bit
69 | NVIC->ISER[Irq_Index >> 5] = 1 << (Irq_Index & 0x1F); // set enable bit
70 | return TRUE;
71 | }
72 |
73 | BOOL CPU_INTC_DeactivateInterrupt( UINT32 Irq_Index )
74 | {
75 | NVIC->ICER[Irq_Index >> 5] = 1 << (Irq_Index & 0x1F); // clear enable bit */
76 | return TRUE;
77 | }
78 |
79 | BOOL CPU_INTC_InterruptEnable( UINT32 Irq_Index )
80 | {
81 | UINT32 ier = NVIC->ISER[Irq_Index >> 5]; // old state
82 | NVIC->ISER[Irq_Index >> 5] = 1 << (Irq_Index & 0x1F); // set enable bit
83 | return (ier >> (Irq_Index & 0x1F)) & 1; // old enable bit
84 | }
85 |
86 | BOOL CPU_INTC_InterruptDisable( UINT32 Irq_Index )
87 | {
88 | UINT32 ier = NVIC->ISER[Irq_Index >> 5]; // old state
89 | NVIC->ICER[Irq_Index >> 5] = 1 << (Irq_Index & 0x1F); // clear enable bit
90 | return (ier >> (Irq_Index & 0x1F)) & 1; // old enable bit
91 | }
92 |
93 | BOOL CPU_INTC_InterruptEnableState( UINT32 Irq_Index )
94 | {
95 | // return enabled bit
96 | return (NVIC->ISER[Irq_Index >> 5] >> (Irq_Index & 0x1F)) & 1;
97 | }
98 |
99 | BOOL CPU_INTC_InterruptState( UINT32 Irq_Index )
100 | {
101 | // return pending bit
102 | return (NVIC->ISPR[Irq_Index >> 5] >> (Irq_Index & 0x1F)) & 1;
103 | }
104 |
--------------------------------------------------------------------------------