├── CMSIS ├── Device │ └── ST │ │ ├── STM32F0xx │ │ ├── Include │ │ │ ├── stm32f042x6.h │ │ │ ├── stm32f070x6.h │ │ │ ├── stm32f070xb.h │ │ │ ├── stm32f072xb.h │ │ │ ├── stm32f091xc.h │ │ │ └── system_stm32f0xx.h │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f042x6.s │ │ │ ├── startup_stm32f070x6.s │ │ │ ├── startup_stm32f070xb.s │ │ │ ├── startup_stm32f072xb.s │ │ │ └── startup_stm32f091xc.s │ │ │ ├── gcc │ │ │ ├── startup_stm32f042x6.s │ │ │ ├── startup_stm32f070x6.s │ │ │ ├── startup_stm32f070xb.s │ │ │ ├── startup_stm32f072xb.s │ │ │ └── startup_stm32f091xc.s │ │ │ └── iar │ │ │ ├── linker │ │ │ ├── stm32f042x6_flash.icf │ │ │ ├── stm32f070x6_flash.icf │ │ │ ├── stm32f070xb_flash.icf │ │ │ ├── stm32f072xb_flash.icf │ │ │ └── stm32f091xc_flash.icf │ │ │ ├── startup_stm32f042x6.s │ │ │ ├── startup_stm32f070x6.s │ │ │ ├── startup_stm32f070xb.s │ │ │ ├── startup_stm32f072xb.s │ │ │ └── startup_stm32f091xc.s │ │ ├── STM32F3xx │ │ ├── Include │ │ │ ├── stm32f301x8.h │ │ │ ├── stm32f302x8.h │ │ │ ├── stm32f302xc.h │ │ │ ├── stm32f302xe.h │ │ │ ├── stm32f303x8.h │ │ │ ├── stm32f303xc.h │ │ │ ├── stm32f303xe.h │ │ │ └── system_stm32f3xx.h │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f301x8.s │ │ │ ├── startup_stm32f302x8.s │ │ │ ├── startup_stm32f302xc.s │ │ │ ├── startup_stm32f302xe.s │ │ │ ├── startup_stm32f303x8.s │ │ │ ├── startup_stm32f303xc.s │ │ │ └── startup_stm32f303xe.s │ │ │ ├── gcc │ │ │ ├── linker │ │ │ │ ├── STM32F301X8_FLASH.ld │ │ │ │ ├── STM32F302X8_FLASH.ld │ │ │ │ ├── STM32F302XC_FLASH.ld │ │ │ │ ├── STM32F302XE_FLASH.ld │ │ │ │ ├── STM32F303X8_FLASH.ld │ │ │ │ ├── STM32F303XC_FLASH.ld │ │ │ │ └── STM32F303XE_FLASH.ld │ │ │ ├── startup_stm32f301x8.s │ │ │ ├── startup_stm32f302x8.s │ │ │ ├── startup_stm32f302xc.s │ │ │ ├── startup_stm32f302xe.s │ │ │ ├── startup_stm32f303x8.s │ │ │ ├── startup_stm32f303xc.s │ │ │ └── startup_stm32f303xe.s │ │ │ └── iar │ │ │ ├── linker │ │ │ ├── stm32f301x8_flash.icf │ │ │ ├── stm32f302x8_flash.icf │ │ │ ├── stm32f302xc_flash.icf │ │ │ ├── stm32f302xe_flash.icf │ │ │ ├── stm32f303x8_flash.icf │ │ │ ├── stm32f303xc_flash.icf │ │ │ └── stm32f303xe_flash.icf │ │ │ ├── startup_stm32f301x8.s │ │ │ ├── startup_stm32f302x8.s │ │ │ ├── startup_stm32f302xc.s │ │ │ ├── startup_stm32f302xe.s │ │ │ ├── startup_stm32f303x8.s │ │ │ ├── startup_stm32f303xc.s │ │ │ └── startup_stm32f303xe.s │ │ ├── STM32F4xx │ │ ├── Include │ │ │ ├── stm32f401xc.h │ │ │ ├── stm32f401xe.h │ │ │ ├── stm32f405xx.h │ │ │ ├── stm32f407xx.h │ │ │ ├── stm32f415xx.h │ │ │ ├── stm32f417xx.h │ │ │ ├── stm32f427xx.h │ │ │ ├── stm32f429xx.h │ │ │ └── system_stm32f4xx.h │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f401xc.s │ │ │ ├── startup_stm32f401xe.s │ │ │ ├── startup_stm32f405xx.s │ │ │ ├── startup_stm32f407xx.s │ │ │ ├── startup_stm32f415xx.s │ │ │ ├── startup_stm32f417xx.s │ │ │ ├── startup_stm32f427xx.s │ │ │ └── startup_stm32f429xx.s │ │ │ ├── gcc │ │ │ ├── linker │ │ │ │ └── STM32F407VG_FLASH.ld │ │ │ ├── startup_stm32f401xc.s │ │ │ ├── startup_stm32f401xe.s │ │ │ ├── startup_stm32f405xx.s │ │ │ ├── startup_stm32f407xx.s │ │ │ ├── startup_stm32f415xx.s │ │ │ ├── startup_stm32f417xx.s │ │ │ ├── startup_stm32f427xx.s │ │ │ └── startup_stm32f429xx.s │ │ │ └── iar │ │ │ ├── linker │ │ │ ├── stm32f405xx_flash.icf │ │ │ ├── stm32f405xx_sram.icf │ │ │ ├── stm32f407xx_flash.icf │ │ │ ├── stm32f407xx_sram.icf │ │ │ ├── stm32f415xx_flash.icf │ │ │ ├── stm32f415xx_sram.icf │ │ │ ├── stm32f417xx_flash.icf │ │ │ └── stm32f417xx_sram.icf │ │ │ ├── startup_stm32f401xc.s │ │ │ ├── startup_stm32f401xe.s │ │ │ ├── startup_stm32f405xx.s │ │ │ ├── startup_stm32f407xx.s │ │ │ ├── startup_stm32f415xx.s │ │ │ ├── startup_stm32f417xx.s │ │ │ ├── startup_stm32f427xx.s │ │ │ └── startup_stm32f429xx.s │ │ └── STM32L4xx │ │ ├── Include │ │ ├── stm32l412xx.h │ │ ├── stm32l432xx.h │ │ ├── stm32l476xx.h │ │ ├── stm32l4r9xx.h │ │ └── system_stm32l4xx.h │ │ └── Source │ │ └── Templates │ │ ├── arm │ │ ├── startup_stm32l412xx.s │ │ ├── startup_stm32l432xx.s │ │ ├── startup_stm32l476xx.s │ │ └── startup_stm32l4r9xx.s │ │ ├── gcc │ │ ├── linker │ │ │ └── STM32L476RG_FLASH.ld │ │ ├── startup_stm32l412xx.s │ │ ├── startup_stm32l432xx.s │ │ ├── startup_stm32l476xx.s │ │ └── startup_stm32l4r9xx.s │ │ └── iar │ │ ├── linker │ │ ├── stm32l412xx_flash.icf │ │ ├── stm32l412xx_sram.icf │ │ ├── stm32l432xx_flash.icf │ │ ├── stm32l432xx_sram.icf │ │ ├── stm32l476xx_flash.icf │ │ ├── stm32l476xx_sram.icf │ │ ├── stm32l4r9xx_flash.icf │ │ └── stm32l4r9xx_sram.icf │ │ ├── startup_stm32l412xx.s │ │ ├── startup_stm32l432xx.s │ │ ├── startup_stm32l476xx.s │ │ └── startup_stm32l4r9xx.s └── Include │ ├── cmsis_armcc.h │ ├── cmsis_armclang.h │ ├── cmsis_compiler.h │ ├── cmsis_gcc.h │ ├── cmsis_iccarm.h │ ├── cmsis_version.h │ ├── core_cm0.h │ ├── core_cm0plus.h │ ├── core_cm3.h │ ├── core_cm4.h │ ├── mpu_armv7.h │ └── mpu_armv8.h ├── LICENSE ├── README.md ├── STM32F0_XPD ├── inc │ ├── xpd_adc.h │ ├── xpd_adc_calc.h │ ├── xpd_can.h │ ├── xpd_cec.h │ ├── xpd_common.h │ ├── xpd_core.h │ ├── xpd_crs.h │ ├── xpd_dma.h │ ├── xpd_exti.h │ ├── xpd_flash.h │ ├── xpd_gpio.h │ ├── xpd_i2c.h │ ├── xpd_mco.h │ ├── xpd_nvic.h │ ├── xpd_pvd.h │ ├── xpd_pwr.h │ ├── xpd_rcc.h │ ├── xpd_rcc_cc.h │ ├── xpd_rcc_pc.h │ ├── xpd_rtc.h │ ├── xpd_spi.h │ ├── xpd_syscfg.h │ ├── xpd_systick.h │ ├── xpd_tim.h │ ├── xpd_usart.h │ ├── xpd_usb.h │ └── xpd_utils.h ├── src │ ├── xpd_adc.c │ ├── xpd_adc_calc.c │ ├── xpd_can.c │ ├── xpd_crs.c │ ├── xpd_dma.c │ ├── xpd_exti.c │ ├── xpd_flash.c │ ├── xpd_gpio.c │ ├── xpd_i2c.c │ ├── xpd_pwr.c │ ├── xpd_rcc.c │ ├── xpd_rcc_cc.c │ ├── xpd_rcc_pc.c │ ├── xpd_spi.c │ ├── xpd_tim.c │ ├── xpd_usart.c │ ├── xpd_usb.c │ └── xpd_utils.c └── templates │ ├── system_stm32f0xx.c │ ├── xpd_config.h │ └── xpd_usb_wrapper.h ├── STM32F3_XPD ├── inc │ ├── xpd_adc.h │ ├── xpd_adc_calc.h │ ├── xpd_can.h │ ├── xpd_cec.h │ ├── xpd_common.h │ ├── xpd_core.h │ ├── xpd_dma.h │ ├── xpd_exti.h │ ├── xpd_flash.h │ ├── xpd_gpio.h │ ├── xpd_i2c.h │ ├── xpd_i2s.h │ ├── xpd_mco.h │ ├── xpd_nvic.h │ ├── xpd_pvd.h │ ├── xpd_pwr.h │ ├── xpd_rcc.h │ ├── xpd_rcc_cc.h │ ├── xpd_rcc_pc.h │ ├── xpd_rtc.h │ ├── xpd_sdadc.h │ ├── xpd_spi.h │ ├── xpd_syscfg.h │ ├── xpd_systick.h │ ├── xpd_tim.h │ ├── xpd_usart.h │ ├── xpd_usb.h │ └── xpd_utils.h ├── src │ ├── xpd_adc.c │ ├── xpd_adc_calc.c │ ├── xpd_can.c │ ├── xpd_dma.c │ ├── xpd_exti.c │ ├── xpd_flash.c │ ├── xpd_gpio.c │ ├── xpd_i2c.c │ ├── xpd_pwr.c │ ├── xpd_rcc.c │ ├── xpd_rcc_cc.c │ ├── xpd_rcc_pc.c │ ├── xpd_spi.c │ ├── xpd_tim.c │ ├── xpd_usart.c │ ├── xpd_usb.c │ └── xpd_utils.c └── templates │ ├── system_stm32f3xx.c │ ├── xpd_config.h │ └── xpd_usb_wrapper.h ├── STM32F4_XPD ├── inc │ ├── xpd_adc.h │ ├── xpd_adc_calc.h │ ├── xpd_can.h │ ├── xpd_common.h │ ├── xpd_core.h │ ├── xpd_dma.h │ ├── xpd_exti.h │ ├── xpd_flash.h │ ├── xpd_gpio.h │ ├── xpd_i2c.h │ ├── xpd_mco.h │ ├── xpd_nvic.h │ ├── xpd_pvd.h │ ├── xpd_pwr.h │ ├── xpd_rcc.h │ ├── xpd_rcc_cc.h │ ├── xpd_rcc_pc.h │ ├── xpd_rtc.h │ ├── xpd_spi.h │ ├── xpd_syscfg.h │ ├── xpd_systick.h │ ├── xpd_tim.h │ ├── xpd_usart.h │ ├── xpd_usb.h │ ├── xpd_usb_otg.h │ └── xpd_utils.h ├── src │ ├── xpd_adc.c │ ├── xpd_adc_calc.c │ ├── xpd_can.c │ ├── xpd_dma.c │ ├── xpd_exti.c │ ├── xpd_flash.c │ ├── xpd_gpio.c │ ├── xpd_pwr.c │ ├── xpd_rcc.c │ ├── xpd_rcc_cc.c │ ├── xpd_rcc_pc.c │ ├── xpd_spi.c │ ├── xpd_tim.c │ ├── xpd_usart.c │ ├── xpd_usb_otg.c │ └── xpd_utils.c └── templates │ ├── system_stm32f4xx.c │ ├── xpd_config.h │ └── xpd_usb_wrapper.h ├── STM32L4_XPD ├── inc │ ├── xpd_adc.h │ ├── xpd_adc_calc.h │ ├── xpd_can.h │ ├── xpd_cec.h │ ├── xpd_common.h │ ├── xpd_core.h │ ├── xpd_crs.h │ ├── xpd_dma.h │ ├── xpd_exti.h │ ├── xpd_flash.h │ ├── xpd_gpio.h │ ├── xpd_i2c.h │ ├── xpd_i2s.h │ ├── xpd_mco.h │ ├── xpd_nvic.h │ ├── xpd_pvd.h │ ├── xpd_pwr.h │ ├── xpd_rcc.h │ ├── xpd_rcc_cc.h │ ├── xpd_rcc_pc.h │ ├── xpd_rtc.h │ ├── xpd_spi.h │ ├── xpd_syscfg.h │ ├── xpd_systick.h │ ├── xpd_tim.h │ ├── xpd_usart.h │ ├── xpd_usb.h │ ├── xpd_usb_otg.h │ └── xpd_utils.h ├── src │ ├── xpd_adc.c │ ├── xpd_adc_calc.c │ ├── xpd_can.c │ ├── xpd_crs.c │ ├── xpd_dma.c │ ├── xpd_exti.c │ ├── xpd_flash.c │ ├── xpd_gpio.c │ ├── xpd_i2c.c │ ├── xpd_pwr.c │ ├── xpd_rcc.c │ ├── xpd_rcc_cc.c │ ├── xpd_rcc_pc.c │ ├── xpd_spi.c │ ├── xpd_tim.c │ ├── xpd_usart.c │ ├── xpd_usb.c │ ├── xpd_usb_otg.c │ └── xpd_utils.c └── templates │ ├── system_stm32l4xx.c │ ├── xpd_config.h │ └── xpd_usb_wrapper.h ├── _config.yml └── _layouts ├── default.html └── powered_by_STM32.png /CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_stm32f0xx.h 3 | * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for 4 | * Device STM32F0xx 5 | * @version V5.00 6 | * @date 10. January 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #ifndef __SYSTEM_STM32F0XX_H 27 | #define __SYSTEM_STM32F0XX_H 28 | 29 | #ifdef __cplusplus 30 | extern "C" { 31 | #endif 32 | 33 | #include 34 | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 36 | 37 | 38 | /** 39 | @brief Setup the microcontroller system. 40 | 41 | Initialize the System and update the SystemCoreClock variable. 42 | */ 43 | extern void SystemInit (void); 44 | 45 | 46 | /** 47 | @brief Update SystemCoreClock variable. 48 | 49 | Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 50 | */ 51 | extern void SystemCoreClockUpdate (void); 52 | 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* __SYSTEM_STM32F0XX_H */ 59 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f042x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; 31 | 32 | export symbol __ICFEDIT_region_RAM_start__; 33 | export symbol __ICFEDIT_region_RAM_end__; 34 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f070x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; 31 | 32 | export symbol __ICFEDIT_region_RAM_start__; 33 | export symbol __ICFEDIT_region_RAM_end__; 34 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f070xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; 31 | 32 | export symbol __ICFEDIT_region_RAM_start__; 33 | export symbol __ICFEDIT_region_RAM_end__; 34 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f072xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; 31 | 32 | export symbol __ICFEDIT_region_RAM_start__; 33 | export symbol __ICFEDIT_region_RAM_end__; 34 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f091xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | define memory mem with size = 4G; 17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 19 | 20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 22 | 23 | initialize by copy { readwrite }; 24 | do not initialize { section .noinit }; 25 | 26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 27 | 28 | place in ROM_region { readonly }; 29 | place in RAM_region { readwrite, 30 | block CSTACK, block HEAP }; 31 | 32 | export symbol __ICFEDIT_region_RAM_start__; 33 | export symbol __ICFEDIT_region_RAM_end__; 34 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_stm32f3xx.h 3 | * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for 4 | * Device STM32F3xx 5 | * @version V5.00 6 | * @date 10. January 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #ifndef __SYSTEM_STM32F3XX_H 27 | #define __SYSTEM_STM32F3XX_H 28 | 29 | #ifdef __cplusplus 30 | extern "C" { 31 | #endif 32 | 33 | #include 34 | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 36 | 37 | 38 | /** 39 | @brief Setup the microcontroller system. 40 | 41 | Initialize the System and update the SystemCoreClock variable. 42 | */ 43 | extern void SystemInit (void); 44 | 45 | 46 | /** 47 | @brief Update SystemCoreClock variable. 48 | 49 | Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 50 | */ 51 | extern void SystemCoreClockUpdate (void); 52 | 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* _SYSTEM_STM32F3XX_H */ 59 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F301X8_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F301X8_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302X8_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302X8_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XC_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XC_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XE_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XE_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303X8_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303X8_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XC_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XC_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XE_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XE_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f301x8_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f302x8_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f302xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20009FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f302xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f303x8_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20002FFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x10000FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f303xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20009FFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x10001FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F3xx/Source/Templates/iar/linker/stm32f303xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x10003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_stm32f4xx.h 3 | * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for 4 | * Device STM32F4xx 5 | * @version V5.00 6 | * @date 10. January 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #ifndef __SYSTEM_STM32F4XX_H 27 | #define __SYSTEM_STM32F4XX_H 28 | 29 | #ifdef __cplusplus 30 | extern "C" { 31 | #endif 32 | 33 | #include 34 | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 36 | 37 | 38 | /** 39 | @brief Setup the microcontroller system. 40 | 41 | Initialize the System and update the SystemCoreClock variable. 42 | */ 43 | extern void SystemInit (void); 44 | 45 | 46 | /** 47 | @brief Update SystemCoreClock variable. 48 | 49 | Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 50 | */ 51 | extern void SystemCoreClockUpdate (void); 52 | 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* __SYSTEM_STM32F4XX_H */ 59 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/linker/STM32F407VG_FLASH.ld: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/IntergatedCircuits/STM32_XPD/6eac5c20bbce88e57c52c7e51aa6fa2ad840dd11/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/linker/STM32F407VG_FLASH.ld -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f405xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f405xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f407xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f407xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f415xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f415xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f417xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f417xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file system_stm32l4xx.h 3 | * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for 4 | * Device STM32L4xx 5 | * @version V5.00 6 | * @date 10. January 2018 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #ifndef __SYSTEM_STM32L4XX_H 27 | #define __SYSTEM_STM32L4XX_H 28 | 29 | #ifdef __cplusplus 30 | extern "C" { 31 | #endif 32 | 33 | #include 34 | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 36 | 37 | 38 | /** 39 | @brief Setup the microcontroller system. 40 | 41 | Initialize the System and update the SystemCoreClock variable. 42 | */ 43 | extern void SystemInit (void); 44 | 45 | 46 | /** 47 | @brief Update SystemCoreClock variable. 48 | 49 | Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 50 | */ 51 | extern void SystemCoreClockUpdate (void); 52 | 53 | 54 | #ifdef __cplusplus 55 | } 56 | #endif 57 | 58 | #endif /* __SYSTEM_STM32L4XX_H */ 59 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l412xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20009FFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20000000; 18 | define symbol __region_SRAM1_end__ = 0x20007FFF; 19 | define symbol __region_SRAM2_start__ = 0x20008000; 20 | define symbol __region_SRAM2_end__ = 0x20009FFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 29 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 30 | 31 | initialize by copy { readwrite }; 32 | do not initialize { section .noinit }; 33 | 34 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 35 | 36 | place in ROM_region { readonly }; 37 | place in RAM_region { readwrite, 38 | block CSTACK, block HEAP }; 39 | place in SRAM1_region { }; 40 | place in SRAM2_region { }; 41 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l412xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20005FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20006000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20006000; 18 | define symbol __region_SRAM1_end__ = 0x20007FFF; 19 | define symbol __region_SRAM2_start__ = 0x20008000; 20 | define symbol __region_SRAM2_end__ = 0x20009FFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 29 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 30 | 31 | initialize by copy { readwrite }; 32 | do not initialize { section .noinit }; 33 | 34 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 35 | 36 | place in ROM_region { readonly }; 37 | place in RAM_region { readwrite, 38 | block CSTACK, block HEAP }; 39 | place in SRAM1_region { }; 40 | place in SRAM2_region { }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l432xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20000000; 18 | define symbol __region_SRAM1_end__ = 0x2000BFFF; 19 | define symbol __region_SRAM2_start__ = 0x2000C000; 20 | define symbol __region_SRAM2_end__ = 0x2000FFFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 29 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 30 | 31 | initialize by copy { readwrite }; 32 | do not initialize { section .noinit }; 33 | 34 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 35 | 36 | place in ROM_region { readonly }; 37 | place in RAM_region { readwrite, 38 | block CSTACK, block HEAP }; 39 | place in SRAM1_region { }; 40 | place in SRAM2_region { }; 41 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l432xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20008000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20008000; 18 | define symbol __region_SRAM1_end__ = 0x2000BFFF; 19 | define symbol __region_SRAM2_start__ = 0x2000C000; 20 | define symbol __region_SRAM2_end__ = 0x2000FFFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 29 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 30 | 31 | initialize by copy { readwrite }; 32 | do not initialize { section .noinit }; 33 | 34 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 35 | 36 | place in ROM_region { readonly }; 37 | place in RAM_region { readwrite, 38 | block CSTACK, block HEAP }; 39 | place in SRAM1_region { }; 40 | place in SRAM2_region { }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l476xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20000000; 18 | define symbol __region_SRAM1_end__ = 0x20017FFF; 19 | define symbol __region_SRAM2_start__ = 0x10000000; 20 | define symbol __region_SRAM2_end__ = 0x10007FFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 29 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 30 | 31 | initialize by copy { readwrite }; 32 | do not initialize { section .noinit }; 33 | 34 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 35 | 36 | place in ROM_region { readonly }; 37 | place in RAM_region { readwrite, 38 | block CSTACK, block HEAP }; 39 | place in SRAM1_region { }; 40 | place in SRAM2_region { }; 41 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l476xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20010000; 18 | define symbol __region_SRAM1_end__ = 0x20017FFF; 19 | define symbol __region_SRAM2_start__ = 0x10000000; 20 | define symbol __region_SRAM2_end__ = 0x10007FFF; 21 | 22 | define memory mem with size = 4G; 23 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 24 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 25 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 26 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 27 | 28 | 29 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 30 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 31 | 32 | initialize by copy { readwrite }; 33 | do not initialize { section .noinit }; 34 | 35 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 36 | 37 | place in ROM_region { readonly }; 38 | place in RAM_region { readwrite, 39 | block CSTACK, block HEAP }; 40 | place in SRAM1_region { }; 41 | place in SRAM2_region { }; -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l4r9xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20000000; 18 | define symbol __region_SRAM1_end__ = 0x2002FFFF; 19 | define symbol __region_SRAM2_start__ = 0x20030000; 20 | define symbol __region_SRAM2_end__ = 0x2003FFFF; 21 | define symbol __region_SRAM3_start__ = 0x20040000; 22 | define symbol __region_SRAM3_end__ = 0x2009FFFF; 23 | 24 | define memory mem with size = 4G; 25 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 26 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 27 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 28 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 29 | define region SRAM3_region = mem:[from __region_SRAM3_start__ to __region_SRAM3_end__]; 30 | 31 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 32 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 33 | 34 | initialize by copy { readwrite }; 35 | do not initialize { section .noinit }; 36 | 37 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 38 | 39 | place in ROM_region { readonly }; 40 | place in RAM_region { readwrite, 41 | block CSTACK, block HEAP }; 42 | place in SRAM1_region { }; 43 | place in SRAM2_region { }; 44 | place in SRAM3_region { }; 45 | -------------------------------------------------------------------------------- /CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/linker/stm32l4r9xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2001FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20020000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | 12 | /*-Sizes-*/ 13 | define symbol __ICFEDIT_size_cstack__ = 0x400; 14 | define symbol __ICFEDIT_size_heap__ = 0x200; 15 | /**** End of ICF editor section. ###ICF###*/ 16 | 17 | define symbol __region_SRAM1_start__ = 0x20020000; 18 | define symbol __region_SRAM1_end__ = 0x2002FFFF; 19 | define symbol __region_SRAM2_start__ = 0x20030000; 20 | define symbol __region_SRAM2_end__ = 0x2003FFFF; 21 | define symbol __region_SRAM3_start__ = 0x20040000; 22 | define symbol __region_SRAM3_end__ = 0x2009FFFF; 23 | 24 | define memory mem with size = 4G; 25 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 26 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 27 | define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 28 | define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 29 | define region SRAM3_region = mem:[from __region_SRAM3_start__ to __region_SRAM3_end__]; 30 | 31 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 32 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 33 | 34 | initialize by copy { readwrite }; 35 | do not initialize { section .noinit }; 36 | 37 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 38 | 39 | place in ROM_region { readonly }; 40 | place in RAM_region { readwrite, 41 | block CSTACK, block HEAP }; 42 | place in SRAM1_region { }; 43 | place in SRAM2_region { }; 44 | place in SRAM3_region { }; 45 | -------------------------------------------------------------------------------- /CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.2 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Peripheral Drivers for STM32 series MCUs 2 | 3 | This project aims to provide an efficient peripheral library for the STM32 series microcontrollers with the potential ability to replace STM32 HAL drivers. The following features are the key to achieving this goal: a straightforward common API with high level of hardware abstraction and code portability, and a comprehensible and lightweight driver code. 4 | 5 | ## Project overview 6 | 7 | The XPD drivers provide a hardware abstraction layer for the MCU peripherals, leaving the user to simply provide configuration sets, I/O data and callbacks to its API for complex device operations. 8 | 9 | The XPD is currently under development, therefore only a subset of modules and devices are supported. A certain MCU is supported if its device descriptor header can be found within [CMSIS/Device/ST](https://github.com/IntergatedCircuits/STM32_XPD/tree/master/CMSIS/Device/ST)/STM32..xx/Include. For the list of supported peripheral modules please check the corresponding XPD library. 10 | 11 | The project redefines all peripheral layout structures to include bit field definitions, and also introduces bit-band alias peripheral structures, therefore the CMSIS library contents are incompatible with the official release. The XPD library is heavily built on these attributes, therefore it must be used with the CMSIS of the same revision. 12 | 13 | ## Documentation 14 | 15 | The project is well structured and doxygen documented, therefore offering easy understandability and navigation. The [XPD Wiki](https://github.com/IntergatedCircuits/STM32_XPD/wiki) offers a Beginner's Guide as well as detailed explanation of each peripheral module driver and the unique concepts applied in the library. 16 | 17 | ## Feedback 18 | 19 | The CMSIS device descriptors are result of a custom code generator with some manual touchups, therefore certain bit fields might have allocated incorrectly. Generally only the XPD supported peripherals' fields can be relied upon. Furthermore, part of the XPD API itself is not thoroughly tested. If you find any bugs, have any questions or constructive ideas, or would like to request support of a currently missing device, don't be afraid to contact the author or [open an issue](https://github.com/IntergatedCircuits/STM32_XPD/issues/new). 20 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_adc_calc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_adc_calc.h 4 | * @author Benedek Kupper 5 | * @version 1.0 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers ADC Calculations Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_ADC_CALC_H_ 24 | #define __XPD_ADC_CALC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @ingroup ADC 34 | * @defgroup ADC_Calculations ADC Calculations 35 | * @{ */ 36 | 37 | /** @addtogroup ADC_Calculations_Exported_Functions 38 | * @{ */ 39 | int32_t ADC_lCalcVDDA_mV (uint16_t usVRefintConversion); 40 | int32_t ADC_lCalcExt_mV (uint16_t usChannelConversion); 41 | int32_t ADC_lCalcTemp_C (uint16_t usTempConversion); 42 | #ifdef ADC_VBAT_SCALER 43 | int32_t ADC_lCalcVBAT_mV (uint16_t usVBatConversion); 44 | #endif 45 | int32_t ADC_lGetVDDA_mV (void); 46 | 47 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 48 | float ADC_fCalcVDDA_V (uint16_t usVRefintConversion); 49 | float ADC_fCalcExt_V (uint16_t usChannelConversion); 50 | float ADC_fCalcTemp_C (uint16_t usTempConversion); 51 | #ifdef ADC_VBAT_SCALER 52 | float ADC_fCalcVBAT_V (uint16_t usVBatConversion); 53 | #endif 54 | float ADC_fGetVDDA_V (void); 55 | #endif 56 | 57 | /** @} */ 58 | 59 | /** @} */ 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* __XPD_ADC_CALC_H_ */ 66 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_cec.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CEC_H_ 24 | #define __XPD_CEC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_CEC_API 34 | #include 35 | #undef XPD_CEC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_CEC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_core.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Cortex Core Modules 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CORE_H_ 24 | #define __XPD_CORE_H_ 25 | 26 | #include 27 | #include 28 | 29 | #endif /* __XPD_CORE_H_ */ 30 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_EXTI_H_ 24 | #define __XPD_EXTI_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup EXTI 34 | * @{ */ 35 | 36 | /** @defgroup EXTI_Exported_Types EXTI Exported Types 37 | * @{ */ 38 | 39 | /** @brief EXTI setup structure */ 40 | typedef union 41 | { 42 | struct { 43 | ReactionType Reaction : 2; /*!< Type of generated reaction for the detected edge */ 44 | EdgeType Edge : 2; /*!< The selected edges trigger a reaction */ 45 | uint8_t : 4; 46 | }; 47 | uint8_t w; 48 | }EXTI_InitType; 49 | 50 | /** @} */ 51 | 52 | /** @defgroup EXTI_Exported_Variables EXTI Exported Variables 53 | * @{ */ 54 | 55 | /** @brief EXTI GPIO Pin callbacks container array */ 56 | extern XPD_ValueCallbackType EXTI_xPinCallbacks[16]; 57 | 58 | /** @} */ 59 | 60 | /** @addtogroup EXTI_Exported_Functions 61 | * @{ */ 62 | void EXTI_vInit (uint8_t ucLine, const EXTI_InitType * pxConfig); 63 | void EXTI_vDeinit (uint8_t ucLine); 64 | 65 | const EXTI_InitType * EXTI_pxDefaultConfig(void); 66 | 67 | /** 68 | * @brief Gets the pending flag for the line. 69 | * @param ucLine: the selected EXTI line 70 | * @return The EXTI line flag status 71 | */ 72 | __STATIC_INLINE FlagStatus EXTI_eGetFlag(uint8_t ucLine) 73 | { 74 | #ifdef EXTI_BB 75 | return EXTI_BB->PR[ucLine]; 76 | #else 77 | return (EXTI->PR >> ucLine) & 1; 78 | #endif 79 | } 80 | 81 | /** 82 | * @brief Clears the pending flag for the line. 83 | * @param ucLine: the selected EXTI line to clear 84 | */ 85 | __STATIC_INLINE void EXTI_vClearFlag(uint8_t ucLine) 86 | { 87 | EXTI->PR = 1 << ucLine; 88 | } 89 | 90 | /** 91 | * @brief Generates a software triggered interrupt. 92 | * @param ucLine: the selected EXTI line to trigger 93 | */ 94 | __STATIC_INLINE void EXTI_vGenerateIT(uint8_t ucLine) 95 | { 96 | EXTI->SWIER = 1 << ucLine; 97 | } 98 | 99 | /** 100 | * @brief EXTI interrupt handler. 101 | * @param ucLine: an interrupt line which may be responsible for the interrupt generation. 102 | */ 103 | __STATIC_INLINE void EXTI_vIRQHandler(uint8_t ucLine) 104 | { 105 | if (EXTI_eGetFlag(ucLine)) 106 | { 107 | EXTI_vClearFlag(ucLine); 108 | 109 | /* GPIO callbacks only */ 110 | if (ucLine < 16) 111 | { 112 | XPD_SAFE_CALLBACK(EXTI_xPinCallbacks[ucLine], ucLine); 113 | } 114 | } 115 | } 116 | 117 | /** @} */ 118 | 119 | /** @} */ 120 | 121 | #ifdef __cplusplus 122 | } 123 | #endif 124 | 125 | #endif /* __XPD_EXTI_H_ */ 126 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_mco.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_mco.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Master Clock Output Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_MCO_H_ 24 | #define __XPD_MCO_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | /** @addtogroup RCC 36 | * @{ */ 37 | 38 | /** @defgroup MCO Master Clock Output 39 | * @{ */ 40 | 41 | /** @defgroup MCO_Exported_Types MCO Exported Types 42 | * @{ */ 43 | 44 | /** @brief RCC master clock output 1 clock source types */ 45 | typedef enum 46 | { 47 | MCO1_CLOCKSOURCE_NOCLOCK = 0, /*!< MCO clock disabled */ 48 | MCO1_CLOCKSOURCE_HSI14 = 1, /*!< HSI14 clock source */ 49 | MCO1_CLOCKSOURCE_LSI = 2, /*!< LSI clock source */ 50 | #ifdef LSE_VALUE_Hz 51 | MCO1_CLOCKSOURCE_LSE = 3, /*!< LSE clock source */ 52 | #endif 53 | MCO1_CLOCKSOURCE_SYSCLK = 4, 54 | MCO1_CLOCKSOURCE_HSI = 5, /*!< HSI clock source */ 55 | #ifdef HSE_VALUE_Hz 56 | MCO1_CLOCKSOURCE_HSE = 6, /*!< HSE clock source */ 57 | #endif 58 | MCO1_CLOCKSOURCE_PLLCLK_DIV2 = 7, /*!< PLL / 2 clock source */ 59 | #ifdef RCC_HSI48_SUPPORT 60 | MCO1_CLOCKSOURCE_HSI48 = 8, /*!< HSE clock source */ 61 | #endif 62 | #ifdef RCC_CFGR_PLLNODIV 63 | MCO1_CLOCKSOURCE_PLLCLK = 0x17, /*!< PLL clock source */ 64 | #endif 65 | }MCO1_ClockSourceType; 66 | 67 | /** @} */ 68 | 69 | #define MCO1_GPIO_PIN PA8 70 | 71 | /** @defgroup MCO_Exported_Functions MCO Exported Functions 72 | * @brief RCC microcontroller clock outputs 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @brief Configures a master clock output 78 | * @param eMCOSource: clock source of the MCO 79 | * @param eMCODiv: the clock division to be applied for the MCO 80 | */ 81 | __STATIC_INLINE void MCO_vInit( 82 | MCO1_ClockSourceType eMCOSource, 83 | ClockDividerType eMCODiv) 84 | { 85 | static const GPIO_InitType xMCOPinCfg = { 86 | .Mode = GPIO_MODE_ALTERNATE, 87 | .AlternateMap = GPIO_MCO_AF0, 88 | .Output.Speed = VERY_HIGH, 89 | .Output.Type = GPIO_OUTPUT_PUSHPULL, 90 | .Pull = GPIO_PULL_FLOAT, 91 | }; 92 | 93 | { 94 | GPIO_vInitPin(MCO1_GPIO_PIN, &xMCOPinCfg); 95 | 96 | RCC->CFGR.b.MCO = eMCOSource; 97 | #ifdef RCC_CFGR_PLLNODIV 98 | RCC_REG_BIT(CFGR,PLLNODIV) = eMCOSource >> 4; 99 | #endif 100 | #ifdef RCC_CFGR_MCOPRE 101 | RCC->CFGR.b.MCOPRE = eMCODiv; 102 | #endif 103 | } 104 | } 105 | 106 | /** 107 | * @brief Disables a master clock output 108 | */ 109 | __STATIC_INLINE void MCO_vDeinit(void) 110 | { 111 | GPIO_vDeinitPin(MCO1_GPIO_PIN); 112 | } 113 | 114 | /** @} */ 115 | 116 | /** @} */ 117 | 118 | /** @} */ 119 | 120 | #ifdef __cplusplus 121 | } 122 | #endif 123 | 124 | #endif /* __XPD_MCO_H_ */ 125 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_nvic.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_nvic.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers NVIC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_NVIC_H_ 24 | #define __XPD_NVIC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup NVIC 34 | * @{ */ 35 | 36 | #if (__CORTEX_M >= 3) 37 | /** @defgroup NVIC_Exported_Types NVIC Exported Types 38 | * @{ */ 39 | 40 | /** @brief NVIC priority group types used for NVIC_SetPriorityGrouping() */ 41 | typedef enum 42 | { 43 | NVIC_PRIOGROUP_0PRE_4SUB = 7, /*!< 0 preemption priority bits, 4 subpriority bits */ 44 | NVIC_PRIOGROUP_1PRE_3SUB = 6, /*!< 1 preemption priority bits, 3 subpriority bits */ 45 | NVIC_PRIOGROUP_2PRE_2SUB = 5, /*!< 2 preemption priority bits, 2 subpriority bits */ 46 | NVIC_PRIOGROUP_3PRE_1SUB = 4, /*!< 3 preemption priority bits, 1 subpriority bits */ 47 | NVIC_PRIOGROUP_4PRE_0SUB = 3 /*!< 4 preemption priority bits, 0 subpriority bits */ 48 | }NVIC_PrioGroupType; 49 | 50 | /** @} */ 51 | 52 | #endif /* (__CORTEX_M >= 3) */ 53 | 54 | /** @defgroup NVIC_Exported_Macros NVIC Exported Macros 55 | * @{ */ 56 | 57 | /** 58 | * @brief @ref XPD_NVIC_GetCurrentIRQ() return value when it's called in thread context. 59 | */ 60 | #define ThreadMode_IRQn (-16) 61 | 62 | /** 63 | * @brief Returns the currently active interrupt line. 64 | * @retval The @ref IRQn_Type that is currently being executed 65 | */ 66 | __STATIC_INLINE IRQn_Type NVIC_GetCurrentIRQ(void) 67 | { 68 | return ((IRQn_Type)(((IPSR_Type)__get_IPSR()).b.ISR) - 16); 69 | } 70 | 71 | /** 72 | * @brief Enable all exceptions with configurable priority (default). 73 | */ 74 | __STATIC_INLINE void NVIC_EnableAllIRQs(void) 75 | { 76 | __set_PRIMASK(0); 77 | } 78 | 79 | /** 80 | * @brief Disable all exceptions with configurable priority. 81 | */ 82 | __STATIC_INLINE void NVIC_DisableAllIRQs(void) 83 | { 84 | __set_PRIMASK(1); 85 | } 86 | 87 | #if (__CORTEX_M >= 3) 88 | 89 | /** 90 | * @brief NVIC interrupt priority configuration setting macro. 91 | * @param IRQn: the selected @ref IRQn_Type line to configure 92 | * @param PreemptPriority: the preemption priority value 93 | * @param SubPriority: the subpriority value 94 | */ 95 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 96 | uint32_t PreemptPriority, 97 | uint32_t SubPriority) 98 | { 99 | NVIC_SetPriority(IRQn, 100 | NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 101 | PreemptPriority, SubPriority)); 102 | } 103 | 104 | #else 105 | 106 | /** 107 | * @brief NVIC interrupt priority configuration setting macro. 108 | * @param IRQn: the selected @ref IRQn_Type line to configure 109 | * @param PreemptPriority: unused 110 | * @param SubPriority: the priority value 111 | */ 112 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 113 | uint32_t PreemptPriority, 114 | uint32_t SubPriority) 115 | { 116 | NVIC_SetPriority(IRQn, SubPriority); 117 | } 118 | 119 | #endif /* (__CORTEX_M >= 3) */ 120 | 121 | /** @} */ 122 | 123 | /** @} */ 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __XPD_NVIC_H_ */ 130 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_pvd.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_pvd.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Power Voltage Detector Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_PVD_H_ 24 | #define __XPD_PVD_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | #ifdef PWR_CR_PLS 36 | 37 | /** @defgroup PVD Power Voltage Detector 38 | * @{ */ 39 | 40 | /** @defgroup PVD_Exported_Types PVD Exported Types 41 | * @{ */ 42 | 43 | /** @brief PVD levels */ 44 | typedef enum 45 | { 46 | PWR_PVDLEVEL_2V2 = 0, /*!< 2.2V voltage detector level */ 47 | PWR_PVDLEVEL_2V3 = 1, /*!< 2.3V voltage detector level */ 48 | PWR_PVDLEVEL_2V4 = 2, /*!< 2.4V voltage detector level */ 49 | PWR_PVDLEVEL_2V5 = 3, /*!< 2.5V voltage detector level */ 50 | PWR_PVDLEVEL_2V6 = 4, /*!< 2.6V voltage detector level */ 51 | PWR_PVDLEVEL_2V7 = 5, /*!< 2.7V voltage detector level */ 52 | PWR_PVDLEVEL_2V8 = 6, /*!< 2.8V voltage detector level */ 53 | PWR_PVDLEVEL_2V9 = 7 /*!< 2.9V voltage detector level */ 54 | } PWR_PVDLevelType; 55 | 56 | /** @} */ 57 | 58 | /** @defgroup PVD_Exported_Macros PVD Exported Macros 59 | * @{ */ 60 | 61 | /** @brief PVD EXTI line number */ 62 | #define PVD_EXTI_LINE 16 63 | /** @} */ 64 | 65 | /** @defgroup PVD_Exported_Functions PVD Exported Functions 66 | * @{ */ 67 | 68 | /** 69 | * @brief Configures the voltage threshold monitoring by the Power Voltage Detector(PVD). 70 | * @param eLevel: the monitored voltage level 71 | * @param eReaction: system reaction upon crossing threshold 72 | */ 73 | __STATIC_INLINE void PVD_vInit(PWR_PVDLevelType eLevel, ReactionType eReaction) 74 | { 75 | EXTI_InitType xExti = { .Edge = EDGE_RISING }; 76 | xExti.Reaction = eReaction; 77 | 78 | /* Set PLS bits according to PVDLevel value */ 79 | PWR->CR.b.PLS = eLevel; 80 | 81 | /* External interrupt line 16 Connected to the PVD EXTI Line */ 82 | EXTI_vInit(PVD_EXTI_LINE, &xExti); 83 | } 84 | 85 | /** 86 | * @brief Enables the Power Voltage Detector (PVD). 87 | */ 88 | __STATIC_INLINE void PVD_vStart(void) 89 | { 90 | PWR_REG_BIT(CR,PVDE) = 1; 91 | } 92 | 93 | /** 94 | * @brief Disables the Power Voltage Detector (PVD). 95 | */ 96 | __STATIC_INLINE void PVD_vStop(void) 97 | { 98 | PWR_REG_BIT(CR,PVDE) = 0; 99 | } 100 | 101 | /** 102 | * @brief Gets the pending flag for the PVD. 103 | * @return The PVD flag status 104 | */ 105 | __STATIC_INLINE FlagStatus PVD_eGetFlag(void) 106 | { 107 | return EXTI_eGetFlag(PVD_EXTI_LINE); 108 | } 109 | 110 | /** 111 | * @brief Clears the pending PVD flag. 112 | */ 113 | __STATIC_INLINE void PVD_vClearFlag(void) 114 | { 115 | EXTI_vClearFlag(PVD_EXTI_LINE); 116 | } 117 | 118 | /** @} */ 119 | 120 | /** @} */ 121 | 122 | #endif /* PWR_CR_PLS */ 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __XPD_PVD_H_ */ 129 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rtc.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Real Time Clock Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_RTC_H_ 24 | #define __XPD_RTC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_RTC_API 34 | #include 35 | #undef XPD_RTC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_RTC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F0_XPD/inc/xpd_systick.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_systick.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers SysTick Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_SYSTICK_H_ 24 | #define __XPD_SYSTICK_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup SysTick 34 | * @{ */ 35 | 36 | /** @defgroup SysTick_Exported_Types SysTick Exported Types 37 | * @{ */ 38 | 39 | /** @brief SysTick clock source types */ 40 | typedef enum 41 | { 42 | SYSTICK_CLOCKSOURCE_HCLK_DIV8 = 0, /*!< SysTick clock source is HCLK divided by 8 */ 43 | SYSTICK_CLOCKSOURCE_HCLK = 1 /*!< SysTick clock source is HCLK */ 44 | }SysTick_ClockSourceType; 45 | 46 | /** @} */ 47 | 48 | /** @defgroup SysTick_Exported_Functions SysTick Exported Functions 49 | * @{ */ 50 | 51 | /** 52 | * @brief Configures the SysTick timer and interrupt generation 53 | * @param ClockSource: clock source of the timer 54 | * @param Period: the amount of timer counts until the counter reset 55 | * @return ERROR if the Period is too large to fit in the 24 bit register, 56 | * OK if successful 57 | */ 58 | __STATIC_INLINE XPD_ReturnType SysTick_eInit( 59 | SysTick_ClockSourceType eClockSource, 60 | uint32_t ulPeriod) 61 | { 62 | /* check against counter size (24 bits) */ 63 | if ((--ulPeriod) > SysTick_LOAD_RELOAD_Msk) 64 | { 65 | return XPD_ERROR; 66 | } 67 | else 68 | { 69 | /* set reload register */ 70 | SysTick->LOAD = ulPeriod; 71 | 72 | /* reset the SysTick Counter Value */ 73 | SysTick->VAL = 0; 74 | 75 | /* set clock source */ 76 | SysTick->CTRL.b.CLKSOURCE = eClockSource; 77 | 78 | return XPD_OK; 79 | } 80 | } 81 | 82 | /** 83 | * @brief Enables the SysTick timer 84 | */ 85 | __STATIC_INLINE void SysTick_vStart(void) 86 | { 87 | SysTick->CTRL.b.ENABLE = 1; 88 | } 89 | 90 | /** 91 | * @brief Disables the SysTick timer 92 | */ 93 | __STATIC_INLINE void SysTick_vStop(void) 94 | { 95 | SysTick->CTRL.b.ENABLE = 0; 96 | } 97 | 98 | /** 99 | * @brief Starts the SysTick timer with interrupt generation 100 | */ 101 | __STATIC_INLINE void SysTick_vStart_IT(void) 102 | { 103 | SysTick->VAL = 0; 104 | SET_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 105 | } 106 | 107 | /** 108 | * @brief Stops the SysTick timer with interrupt generation 109 | */ 110 | __STATIC_INLINE void SysTick_vStop_IT(void) 111 | { 112 | CLEAR_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 113 | } 114 | 115 | /** 116 | * @brief Enables the SysTick interrupt request 117 | */ 118 | __STATIC_INLINE void SysTick_IT_Enable(void) 119 | { 120 | SysTick->CTRL.b.TICKINT = 1; 121 | } 122 | 123 | /** 124 | * @brief Disables the SysTick interrupt request 125 | */ 126 | __STATIC_INLINE void SysTick_IT_Disable(void) 127 | { 128 | SysTick->CTRL.b.TICKINT = 0; 129 | } 130 | 131 | /** @} */ 132 | 133 | /** @} */ 134 | 135 | /** @} */ 136 | 137 | #ifdef __cplusplus 138 | } 139 | #endif 140 | 141 | #endif /* __XPD_SYSTICK_H_ */ 142 | -------------------------------------------------------------------------------- /STM32F0_XPD/src/xpd_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.c 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | 24 | #include 25 | 26 | /** @addtogroup EXTI 27 | * @{ */ 28 | 29 | XPD_ValueCallbackType EXTI_xPinCallbacks[16] = { 30 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 31 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 32 | }; 33 | 34 | static const EXTI_InitType exti_xDefConfig = { .Reaction = REACTION_IT, .Edge = EDGE_RISING }; 35 | 36 | /** @defgroup EXTI_Exported_Functions EXTI Exported Functions 37 | * @{ */ 38 | 39 | /** 40 | * @brief Configures the EXTI line according to the setup parameters. 41 | * @param ucLine: the selected EXTI line 42 | * @param pxConfig: pointer to the setup structure 43 | */ 44 | void EXTI_vInit(uint8_t ucLine, const EXTI_InitType * pxConfig) 45 | { 46 | #ifdef RCC_APB2ENR_EXTITEN 47 | RCC_vClockEnable(RCC_POS_EXTI); 48 | #endif 49 | 50 | #ifdef EXTI_BB 51 | EXTI_BB->IMR[ucLine] = pxConfig->w; 52 | 53 | EXTI_BB->EMR[ucLine] = pxConfig->w >> 1; 54 | 55 | EXTI_BB->RTSR[ucLine] = pxConfig->w >> 2; 56 | 57 | EXTI_BB->FTSR[ucLine] = pxConfig->w >> 3; 58 | #else 59 | uint32_t ulLineBit = 1 << ucLine; 60 | 61 | /* set EXTI line configuration */ 62 | if (pxConfig->Reaction & REACTION_IT) 63 | { 64 | SET_BIT(EXTI->IMR, ulLineBit); 65 | } 66 | else 67 | { 68 | CLEAR_BIT(EXTI->IMR, ulLineBit); 69 | } 70 | 71 | if (pxConfig->Reaction & REACTION_EVENT) 72 | { 73 | SET_BIT(EXTI->EMR, ulLineBit); 74 | } 75 | else 76 | { 77 | CLEAR_BIT(EXTI->EMR, ulLineBit); 78 | } 79 | 80 | /* set rising and falling edge configuration */ 81 | if (pxConfig->Edge & EDGE_RISING) 82 | { 83 | SET_BIT(EXTI->RTSR, ulLineBit); 84 | } 85 | else 86 | { 87 | CLEAR_BIT(EXTI->RTSR, ulLineBit); 88 | } 89 | 90 | if (pxConfig->Edge & EDGE_FALLING) 91 | { 92 | SET_BIT(EXTI->FTSR, ulLineBit); 93 | } 94 | else 95 | { 96 | CLEAR_BIT(EXTI->FTSR, ulLineBit); 97 | } 98 | #endif 99 | } 100 | 101 | /** 102 | * @brief Restores the EXTI line to its default state. 103 | * @param ucLine: the selected EXTI line 104 | */ 105 | void EXTI_vDeinit(uint8_t ucLine) 106 | { 107 | #ifdef EXTI_BB 108 | /* Clear EXTI line configuration */ 109 | EXTI_BB->IMR[ucLine] = 0; 110 | EXTI_BB->EMR[ucLine] = 0; 111 | 112 | /* Clear Rising Falling edge configuration */ 113 | EXTI_BB->RTSR[ucLine] = 0; 114 | EXTI_BB->FTSR[ucLine] = 0; 115 | #else 116 | uint32_t ulLineBit = 1 << ucLine; 117 | 118 | /* Clear EXTI line configuration */ 119 | CLEAR_BIT(EXTI->IMR, ulLineBit); 120 | CLEAR_BIT(EXTI->EMR, ulLineBit); 121 | 122 | /* Clear Rising Falling edge configuration */ 123 | CLEAR_BIT(EXTI->RTSR, ulLineBit); 124 | CLEAR_BIT(EXTI->FTSR, ulLineBit); 125 | #endif 126 | } 127 | 128 | /** 129 | * @brief Gets the default EXTI configuration (trigger interrupt on rising edge). 130 | * @return Reference to the default EXTI configuration value 131 | */ 132 | const EXTI_InitType * EXTI_pxDefaultConfig(void) 133 | { 134 | return &exti_xDefConfig; 135 | } 136 | 137 | /** @} */ 138 | 139 | /** @} */ 140 | -------------------------------------------------------------------------------- /STM32F0_XPD/src/xpd_rcc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rcc.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers RCC Peripherals Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | 25 | /** @addtogroup RCC 26 | * @{ */ 27 | 28 | /** @addtogroup RCC_Peripheral_Control 29 | * @{ */ 30 | 31 | typedef union { 32 | struct { 33 | uint16_t bitIndex : 5; 34 | uint16_t regIndex : 11; 35 | }; 36 | uint16_t w; 37 | } rccPosType; 38 | 39 | #define PPOS ((rccPosType)ePeriphPos) 40 | 41 | /** @defgroup RCC_Peripheral_Control_Exported_Functions RCC Peripheral Control Exported Functions 42 | * @{ */ 43 | 44 | /** 45 | * @brief Enables the clock of the peripheral. 46 | * @param ePeriphPos: Relative position of the peripheral control bit 47 | * in the RCC register space 48 | */ 49 | void RCC_vClockEnable(RCC_PositionType ePeriphPos) 50 | { 51 | #ifdef RCC_BB 52 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHBENR.w); 53 | pulEN[ePeriphPos] = 1; 54 | 55 | /* Read back to ensure effect */ 56 | (void) pulEN[ePeriphPos]; 57 | #else 58 | __IO uint32_t *pulENR = &RCC->AHBENR.w + PPOS.regIndex; 59 | SET_BIT(*pulENR, 1 << PPOS.bitIndex); 60 | 61 | /* Read back to ensure effect */ 62 | (void) *pulENR; 63 | #endif 64 | } 65 | 66 | /** 67 | * @brief Disables the clock of the peripheral. 68 | * @param ePeriphPos: Relative position of the peripheral control bit 69 | * in the RCC register space 70 | */ 71 | void RCC_vClockDisable(RCC_PositionType ePeriphPos) 72 | { 73 | #ifdef RCC_BB 74 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHBENR.w); 75 | pulEN[ePeriphPos] = 0; 76 | #else 77 | __IO uint32_t *pulENR = &RCC->AHBENR.w + PPOS.regIndex; 78 | CLEAR_BIT(*pulENR, 1 << PPOS.bitIndex); 79 | #endif 80 | } 81 | 82 | /** 83 | * @brief Forces and releases a reset on the peripheral. 84 | * @param ePeriphPos: Relative position of the peripheral control bit 85 | * in the RCC register space 86 | */ 87 | void RCC_vReset(RCC_PositionType ePeriphPos) 88 | { 89 | /* These devices have different layout for RSTR than ENR registers */ 90 | #ifdef RCC_BB 91 | __IO uint32_t *pulRST = PERIPH_BB(&RCC->AHBRSTR.w); 92 | if ((ePeriphPos & (~0x1F)) != RCC_POS_AHB) 93 | { 94 | pulRST = PERIPH_BB(&RCC->CIR.w); 95 | } 96 | pulRST[ePeriphPos] = 1; 97 | pulRST[ePeriphPos] = 0; 98 | #else 99 | __IO uint32_t *pulRSTR = &RCC->AHBRSTR.w + PPOS.regIndex; 100 | 101 | if ((ePeriphPos & (~0x1F)) != RCC_POS_AHB) 102 | { 103 | pulRSTR = &RCC->CIR.w + PPOS.regIndex; 104 | } 105 | SET_BIT (*pulRSTR, 1 << PPOS.bitIndex); 106 | CLEAR_BIT(*pulRSTR, 1 << PPOS.bitIndex); 107 | #endif 108 | } 109 | 110 | /** @} */ 111 | 112 | /** @} */ 113 | 114 | /** @} */ 115 | -------------------------------------------------------------------------------- /STM32F0_XPD/templates/system_stm32f0xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f0xx.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-09-28 7 | * @brief STM32 eXtensible Peripheral Drivers template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | #include 25 | #include 26 | #include 27 | 28 | /** @brief Global variable used to store the actual system clock frequency [Hz] */ 29 | uint32_t SystemCoreClock; 30 | 31 | /** @brief Interrupt vector table in startup_.s */ 32 | extern const uint32_t g_pfnVectors[]; 33 | 34 | /** 35 | * @brief Setup the microcontroller system. 36 | * Initialize the default HSI clock source, 37 | * vector table location 38 | * and the PLL configuration is reset. 39 | */ 40 | void SystemInit(void) 41 | { 42 | /* Reset all peripherals */ 43 | XPD_vDeinit(); 44 | 45 | /* Reset the RCC clock configuration to the default reset state 46 | * Sets SystemCoreClock value */ 47 | RCC_vDeinit(); 48 | 49 | /* initialize XPD services */ 50 | XPD_vInit(); 51 | 52 | /* TODO Redirect to interrupt vector table position */ 53 | SYSTEM_MEMORY_REMAP(FLASH); 54 | 55 | /* TODO Configure system memory options */ 56 | FLASH_vPrefetchBuffer(ENABLE); 57 | } 58 | -------------------------------------------------------------------------------- /STM32F0_XPD/templates/xpd_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_config.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers configuration template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CONFIG_H_ 24 | #define __XPD_CONFIG_H_ 25 | 26 | /* TODO step 1: specify device header */ 27 | #include 28 | 29 | /* TODO step 2: enable desired used XPD modules error handling */ 30 | /* #define __XPD_DMA_ERROR_DETECT */ 31 | 32 | /* TODO step 3: specify power supplies */ 33 | #define VDD_VALUE_mV 3000 /* Value of VDD in mV */ 34 | #define VDDA_VALUE_mV 3000 /* Value of VDD Analog in mV */ 35 | 36 | /* TODO step 4: specify oscillator parameters */ 37 | /* #define HSE_VALUE_Hz 80000000 38 | * #define LSE_VALUE_Hz 32768 */ 39 | 40 | #endif /* __XPD_CONFIG_H_ */ 41 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_adc_calc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_adc_calc.h 4 | * @author Benedek Kupper 5 | * @version 1.0 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers ADC Calculations Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_ADC_CALC_H_ 24 | #define __XPD_ADC_CALC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @ingroup ADC 34 | * @defgroup ADC_Calculations ADC Calculations 35 | * @{ */ 36 | 37 | /** @addtogroup ADC_Calculations_Exported_Functions 38 | * @{ */ 39 | int32_t ADC_lCalcVDDA_mV (uint16_t usVRefintConversion); 40 | int32_t ADC_lCalcExt_mV (uint16_t usChannelConversion); 41 | int32_t ADC_lCalcTemp_C (uint16_t usTempConversion); 42 | #ifdef ADC_VBAT_SCALER 43 | int32_t ADC_lCalcVBAT_mV (uint16_t usVBatConversion); 44 | #endif 45 | int32_t ADC_lGetVDDA_mV (void); 46 | 47 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 48 | float ADC_fCalcVDDA_V (uint16_t usVRefintConversion); 49 | float ADC_fCalcExt_V (uint16_t usChannelConversion); 50 | float ADC_fCalcTemp_C (uint16_t usTempConversion); 51 | #ifdef ADC_VBAT_SCALER 52 | float ADC_fCalcVBAT_V (uint16_t usVBatConversion); 53 | #endif 54 | float ADC_fGetVDDA_V (void); 55 | #endif 56 | 57 | /** @} */ 58 | 59 | /** @} */ 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* __XPD_ADC_CALC_H_ */ 66 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_cec.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CEC_H_ 24 | #define __XPD_CEC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_CEC_API 34 | #include 35 | #undef XPD_CEC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_CEC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_core.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Cortex Core Modules 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CORE_H_ 24 | #define __XPD_CORE_H_ 25 | 26 | #include 27 | #include 28 | 29 | #endif /* __XPD_CORE_H_ */ 30 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_EXTI_H_ 24 | #define __XPD_EXTI_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup EXTI 34 | * @{ */ 35 | 36 | /** @defgroup EXTI_Exported_Types EXTI Exported Types 37 | * @{ */ 38 | 39 | /** @brief EXTI setup structure */ 40 | typedef union 41 | { 42 | struct { 43 | ReactionType Reaction : 2; /*!< Type of generated reaction for the detected edge */ 44 | EdgeType Edge : 2; /*!< The selected edges trigger a reaction */ 45 | uint8_t : 4; 46 | }; 47 | uint8_t w; 48 | }EXTI_InitType; 49 | 50 | /** @} */ 51 | 52 | /** @defgroup EXTI_Exported_Variables EXTI Exported Variables 53 | * @{ */ 54 | 55 | /** @brief EXTI GPIO Pin callbacks container array */ 56 | extern XPD_ValueCallbackType EXTI_xPinCallbacks[16]; 57 | 58 | /** @} */ 59 | 60 | /** @addtogroup EXTI_Exported_Functions 61 | * @{ */ 62 | void EXTI_vInit (uint8_t ucLine, const EXTI_InitType * pxConfig); 63 | void EXTI_vDeinit (uint8_t ucLine); 64 | 65 | const EXTI_InitType * EXTI_pxDefaultConfig(void); 66 | 67 | /** 68 | * @brief Gets the pending flag for the line. 69 | * @param ucLine: the selected EXTI line 70 | * @return The EXTI line flag status 71 | */ 72 | __STATIC_INLINE FlagStatus EXTI_eGetFlag(uint8_t ucLine) 73 | { 74 | #ifdef EXTI_BB 75 | if (ucLine < 32) 76 | { 77 | return EXTI_BB->PR[ucLine]; 78 | } 79 | else 80 | { 81 | return EXTI_BB->PR2[ucLine - 32]; 82 | } 83 | #else 84 | if (ucLine < 32) 85 | { 86 | return (EXTI->PR >> ucLine) & 1; 87 | } 88 | else 89 | { 90 | return (EXTI->PR2 >> (ucLine - 32)) & 1; 91 | } 92 | #endif 93 | } 94 | 95 | /** 96 | * @brief Clears the pending flag for the line. 97 | * @param ucLine: the selected EXTI line to clear 98 | */ 99 | __STATIC_INLINE void EXTI_vClearFlag(uint8_t ucLine) 100 | { 101 | if (ucLine < 32) 102 | { 103 | EXTI->PR = 1 << ucLine; 104 | } 105 | else 106 | { 107 | EXTI->PR2 = 1 << (ucLine - 32); 108 | } 109 | } 110 | 111 | /** 112 | * @brief Generates a software triggered interrupt. 113 | * @param ucLine: the selected EXTI line to trigger 114 | */ 115 | __STATIC_INLINE void EXTI_vGenerateIT(uint8_t ucLine) 116 | { 117 | if (ucLine < 32) 118 | { 119 | EXTI->SWIER = 1 << ucLine; 120 | } 121 | else 122 | { 123 | EXTI->SWIER2 = 1 << (ucLine - 32); 124 | } 125 | } 126 | 127 | /** 128 | * @brief EXTI interrupt handler. 129 | * @param ucLine: an interrupt line which may be responsible for the interrupt generation. 130 | */ 131 | __STATIC_INLINE void EXTI_vIRQHandler(uint8_t ucLine) 132 | { 133 | if (EXTI_eGetFlag(ucLine)) 134 | { 135 | EXTI_vClearFlag(ucLine); 136 | 137 | /* GPIO callbacks only */ 138 | if (ucLine < 16) 139 | { 140 | XPD_SAFE_CALLBACK(EXTI_xPinCallbacks[ucLine], ucLine); 141 | } 142 | } 143 | } 144 | 145 | /** @} */ 146 | 147 | /** @} */ 148 | 149 | #ifdef __cplusplus 150 | } 151 | #endif 152 | 153 | #endif /* __XPD_EXTI_H_ */ 154 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_i2s.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_i2s.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_I2S_H_ 24 | #define __XPD_I2S_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_I2S_API 34 | #include 35 | #undef XPD_I2S_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_I2S_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_mco.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_mco.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Master Clock Output Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_MCO_H_ 24 | #define __XPD_MCO_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | /** @addtogroup RCC 36 | * @{ */ 37 | 38 | /** @defgroup MCO Master Clock Output 39 | * @{ */ 40 | 41 | /** @defgroup MCO_Exported_Types MCO Exported Types 42 | * @{ */ 43 | 44 | /** @brief RCC master clock output 1 clock source types */ 45 | typedef enum 46 | { 47 | MCO1_CLOCKSOURCE_NOCLOCK = 0, /*!< MCO clock disabled */ 48 | MCO1_CLOCKSOURCE_LSI = 2, /*!< LSI clock source */ 49 | #ifdef LSE_VALUE_Hz 50 | MCO1_CLOCKSOURCE_LSE = 3, /*!< LSE clock source */ 51 | #endif 52 | MCO1_CLOCKSOURCE_SYSCLK = 4, 53 | MCO1_CLOCKSOURCE_HSI = 5, /*!< HSI clock source */ 54 | #ifdef HSE_VALUE_Hz 55 | MCO1_CLOCKSOURCE_HSE = 6, /*!< HSE clock source */ 56 | #endif 57 | MCO1_CLOCKSOURCE_PLLCLK_DIV2 = 7, /*!< PLL / 2 clock source */ 58 | #ifdef RCC_CFGR_PLLNODIV 59 | MCO1_CLOCKSOURCE_PLLCLK = 0x17, /*!< PLL clock source */ 60 | #endif 61 | }MCO1_ClockSourceType; 62 | 63 | /** @} */ 64 | 65 | #define MCO1_GPIO_PIN PA8 66 | 67 | /** @defgroup MCO_Exported_Functions MCO Exported Functions 68 | * @brief RCC microcontroller clock outputs 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief Configures a master clock output 74 | * @param eMCOSource: clock source of the MCO 75 | * @param eMCODiv: the clock division to be applied for the MCO 76 | */ 77 | __STATIC_INLINE void MCO_vInit( 78 | MCO1_ClockSourceType eMCOSource, 79 | ClockDividerType eMCODiv) 80 | { 81 | static const GPIO_InitType xMCOPinCfg = { 82 | .Mode = GPIO_MODE_ALTERNATE, 83 | .AlternateMap = GPIO_MCO_AF0, 84 | .Output.Speed = VERY_HIGH, 85 | .Output.Type = GPIO_OUTPUT_PUSHPULL, 86 | .Pull = GPIO_PULL_FLOAT, 87 | }; 88 | 89 | { 90 | GPIO_vInitPin(MCO1_GPIO_PIN, &xMCOPinCfg); 91 | 92 | RCC->CFGR.b.MCO = eMCOSource; 93 | #ifdef RCC_CFGR_PLLNODIV 94 | RCC_REG_BIT(CFGR,PLLNODIV) = eMCOSource >> 4; 95 | #endif 96 | #ifdef RCC_CFGR_MCOPRE 97 | RCC->CFGR.b.MCOPRE = eMCODiv; 98 | #endif 99 | } 100 | } 101 | 102 | /** 103 | * @brief Disables a master clock output 104 | */ 105 | __STATIC_INLINE void MCO_vDeinit(void) 106 | { 107 | GPIO_vDeinitPin(MCO1_GPIO_PIN); 108 | } 109 | 110 | /** @} */ 111 | 112 | /** @} */ 113 | 114 | /** @} */ 115 | 116 | #ifdef __cplusplus 117 | } 118 | #endif 119 | 120 | #endif /* __XPD_MCO_H_ */ 121 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_nvic.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_nvic.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers NVIC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_NVIC_H_ 24 | #define __XPD_NVIC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup NVIC 34 | * @{ */ 35 | 36 | #if (__CORTEX_M >= 3) 37 | /** @defgroup NVIC_Exported_Types NVIC Exported Types 38 | * @{ */ 39 | 40 | /** @brief NVIC priority group types used for NVIC_SetPriorityGrouping() */ 41 | typedef enum 42 | { 43 | NVIC_PRIOGROUP_0PRE_4SUB = 7, /*!< 0 preemption priority bits, 4 subpriority bits */ 44 | NVIC_PRIOGROUP_1PRE_3SUB = 6, /*!< 1 preemption priority bits, 3 subpriority bits */ 45 | NVIC_PRIOGROUP_2PRE_2SUB = 5, /*!< 2 preemption priority bits, 2 subpriority bits */ 46 | NVIC_PRIOGROUP_3PRE_1SUB = 4, /*!< 3 preemption priority bits, 1 subpriority bits */ 47 | NVIC_PRIOGROUP_4PRE_0SUB = 3 /*!< 4 preemption priority bits, 0 subpriority bits */ 48 | }NVIC_PrioGroupType; 49 | 50 | /** @} */ 51 | 52 | #endif /* (__CORTEX_M >= 3) */ 53 | 54 | /** @defgroup NVIC_Exported_Macros NVIC Exported Macros 55 | * @{ */ 56 | 57 | /** 58 | * @brief @ref XPD_NVIC_GetCurrentIRQ() return value when it's called in thread context. 59 | */ 60 | #define ThreadMode_IRQn (-16) 61 | 62 | /** 63 | * @brief Returns the currently active interrupt line. 64 | * @retval The @ref IRQn_Type that is currently being executed 65 | */ 66 | __STATIC_INLINE IRQn_Type NVIC_GetCurrentIRQ(void) 67 | { 68 | return ((IRQn_Type)(((IPSR_Type)__get_IPSR()).b.ISR) - 16); 69 | } 70 | 71 | /** 72 | * @brief Enable all exceptions with configurable priority (default). 73 | */ 74 | __STATIC_INLINE void NVIC_EnableAllIRQs(void) 75 | { 76 | __set_PRIMASK(0); 77 | } 78 | 79 | /** 80 | * @brief Disable all exceptions with configurable priority. 81 | */ 82 | __STATIC_INLINE void NVIC_DisableAllIRQs(void) 83 | { 84 | __set_PRIMASK(1); 85 | } 86 | 87 | #if (__CORTEX_M >= 3) 88 | 89 | /** 90 | * @brief NVIC interrupt priority configuration setting macro. 91 | * @param IRQn: the selected @ref IRQn_Type line to configure 92 | * @param PreemptPriority: the preemption priority value 93 | * @param SubPriority: the subpriority value 94 | */ 95 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 96 | uint32_t PreemptPriority, 97 | uint32_t SubPriority) 98 | { 99 | NVIC_SetPriority(IRQn, 100 | NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 101 | PreemptPriority, SubPriority)); 102 | } 103 | 104 | #else 105 | 106 | /** 107 | * @brief NVIC interrupt priority configuration setting macro. 108 | * @param IRQn: the selected @ref IRQn_Type line to configure 109 | * @param PreemptPriority: unused 110 | * @param SubPriority: the priority value 111 | */ 112 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 113 | uint32_t PreemptPriority, 114 | uint32_t SubPriority) 115 | { 116 | NVIC_SetPriority(IRQn, SubPriority); 117 | } 118 | 119 | #endif /* (__CORTEX_M >= 3) */ 120 | 121 | /** @} */ 122 | 123 | /** @} */ 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __XPD_NVIC_H_ */ 130 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_pvd.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_pvd.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Power Voltage Detector Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_PVD_H_ 24 | #define __XPD_PVD_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | #ifdef PWR_CR_PLS 36 | 37 | /** @defgroup PVD Power Voltage Detector 38 | * @{ */ 39 | 40 | /** @defgroup PVD_Exported_Types PVD Exported Types 41 | * @{ */ 42 | 43 | /** @brief PVD levels */ 44 | typedef enum 45 | { 46 | PWR_PVDLEVEL_2V2 = 0, /*!< 2.2V voltage detector level */ 47 | PWR_PVDLEVEL_2V3 = 1, /*!< 2.3V voltage detector level */ 48 | PWR_PVDLEVEL_2V4 = 2, /*!< 2.4V voltage detector level */ 49 | PWR_PVDLEVEL_2V5 = 3, /*!< 2.5V voltage detector level */ 50 | PWR_PVDLEVEL_2V6 = 4, /*!< 2.6V voltage detector level */ 51 | PWR_PVDLEVEL_2V7 = 5, /*!< 2.7V voltage detector level */ 52 | PWR_PVDLEVEL_2V8 = 6, /*!< 2.8V voltage detector level */ 53 | PWR_PVDLEVEL_2V9 = 7 /*!< 2.9V voltage detector level */ 54 | } PWR_PVDLevelType; 55 | 56 | /** @} */ 57 | 58 | /** @defgroup PVD_Exported_Macros PVD Exported Macros 59 | * @{ */ 60 | 61 | /** @brief PVD EXTI line number */ 62 | #define PVD_EXTI_LINE 16 63 | /** @} */ 64 | 65 | /** @defgroup PVD_Exported_Functions PVD Exported Functions 66 | * @{ */ 67 | 68 | /** 69 | * @brief Configures the voltage threshold monitoring by the Power Voltage Detector(PVD). 70 | * @param eLevel: the monitored voltage level 71 | * @param eReaction: system reaction upon crossing threshold 72 | */ 73 | __STATIC_INLINE void PVD_vInit(PWR_PVDLevelType eLevel, ReactionType eReaction) 74 | { 75 | EXTI_InitType xExti = { .Edge = EDGE_RISING }; 76 | xExti.Reaction = eReaction; 77 | 78 | /* Set PLS bits according to PVDLevel value */ 79 | PWR->CR.b.PLS = eLevel; 80 | 81 | /* External interrupt line 16 Connected to the PVD EXTI Line */ 82 | EXTI_vInit(PVD_EXTI_LINE, &xExti); 83 | } 84 | 85 | /** 86 | * @brief Enables the Power Voltage Detector (PVD). 87 | */ 88 | __STATIC_INLINE void PVD_vStart(void) 89 | { 90 | PWR_REG_BIT(CR,PVDE) = 1; 91 | } 92 | 93 | /** 94 | * @brief Disables the Power Voltage Detector (PVD). 95 | */ 96 | __STATIC_INLINE void PVD_vStop(void) 97 | { 98 | PWR_REG_BIT(CR,PVDE) = 0; 99 | } 100 | 101 | /** 102 | * @brief Gets the pending flag for the PVD. 103 | * @return The PVD flag status 104 | */ 105 | __STATIC_INLINE FlagStatus PVD_eGetFlag(void) 106 | { 107 | return EXTI_eGetFlag(PVD_EXTI_LINE); 108 | } 109 | 110 | /** 111 | * @brief Clears the pending PVD flag. 112 | */ 113 | __STATIC_INLINE void PVD_vClearFlag(void) 114 | { 115 | EXTI_vClearFlag(PVD_EXTI_LINE); 116 | } 117 | 118 | /** @} */ 119 | 120 | /** @} */ 121 | 122 | #endif /* PWR_CR_PLS */ 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __XPD_PVD_H_ */ 129 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rtc.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Real Time Clock Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_RTC_H_ 24 | #define __XPD_RTC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_RTC_API 34 | #include 35 | #undef XPD_RTC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_RTC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_sdadc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_sdadc.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_SDADC_H_ 24 | #define __XPD_SDADC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_SDADC_API 34 | #include 35 | #undef XPD_SDADC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_SDADC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F3_XPD/inc/xpd_systick.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_systick.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers SysTick Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_SYSTICK_H_ 24 | #define __XPD_SYSTICK_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup SysTick 34 | * @{ */ 35 | 36 | /** @defgroup SysTick_Exported_Types SysTick Exported Types 37 | * @{ */ 38 | 39 | /** @brief SysTick clock source types */ 40 | typedef enum 41 | { 42 | SYSTICK_CLOCKSOURCE_HCLK_DIV8 = 0, /*!< SysTick clock source is HCLK divided by 8 */ 43 | SYSTICK_CLOCKSOURCE_HCLK = 1 /*!< SysTick clock source is HCLK */ 44 | }SysTick_ClockSourceType; 45 | 46 | /** @} */ 47 | 48 | /** @defgroup SysTick_Exported_Functions SysTick Exported Functions 49 | * @{ */ 50 | 51 | /** 52 | * @brief Configures the SysTick timer and interrupt generation 53 | * @param ClockSource: clock source of the timer 54 | * @param Period: the amount of timer counts until the counter reset 55 | * @return ERROR if the Period is too large to fit in the 24 bit register, 56 | * OK if successful 57 | */ 58 | __STATIC_INLINE XPD_ReturnType SysTick_eInit( 59 | SysTick_ClockSourceType eClockSource, 60 | uint32_t ulPeriod) 61 | { 62 | /* check against counter size (24 bits) */ 63 | if ((--ulPeriod) > SysTick_LOAD_RELOAD_Msk) 64 | { 65 | return XPD_ERROR; 66 | } 67 | else 68 | { 69 | /* set reload register */ 70 | SysTick->LOAD = ulPeriod; 71 | 72 | /* reset the SysTick Counter Value */ 73 | SysTick->VAL = 0; 74 | 75 | /* set clock source */ 76 | SysTick->CTRL.b.CLKSOURCE = eClockSource; 77 | 78 | return XPD_OK; 79 | } 80 | } 81 | 82 | /** 83 | * @brief Enables the SysTick timer 84 | */ 85 | __STATIC_INLINE void SysTick_vStart(void) 86 | { 87 | SysTick->CTRL.b.ENABLE = 1; 88 | } 89 | 90 | /** 91 | * @brief Disables the SysTick timer 92 | */ 93 | __STATIC_INLINE void SysTick_vStop(void) 94 | { 95 | SysTick->CTRL.b.ENABLE = 0; 96 | } 97 | 98 | /** 99 | * @brief Starts the SysTick timer with interrupt generation 100 | */ 101 | __STATIC_INLINE void SysTick_vStart_IT(void) 102 | { 103 | SysTick->VAL = 0; 104 | SET_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 105 | } 106 | 107 | /** 108 | * @brief Stops the SysTick timer with interrupt generation 109 | */ 110 | __STATIC_INLINE void SysTick_vStop_IT(void) 111 | { 112 | CLEAR_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 113 | } 114 | 115 | /** 116 | * @brief Enables the SysTick interrupt request 117 | */ 118 | __STATIC_INLINE void SysTick_IT_Enable(void) 119 | { 120 | SysTick->CTRL.b.TICKINT = 1; 121 | } 122 | 123 | /** 124 | * @brief Disables the SysTick interrupt request 125 | */ 126 | __STATIC_INLINE void SysTick_IT_Disable(void) 127 | { 128 | SysTick->CTRL.b.TICKINT = 0; 129 | } 130 | 131 | /** @} */ 132 | 133 | /** @} */ 134 | 135 | /** @} */ 136 | 137 | #ifdef __cplusplus 138 | } 139 | #endif 140 | 141 | #endif /* __XPD_SYSTICK_H_ */ 142 | -------------------------------------------------------------------------------- /STM32F3_XPD/src/xpd_rcc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rcc.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers RCC Peripherals Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | 25 | /** @addtogroup RCC 26 | * @{ */ 27 | 28 | /** @addtogroup RCC_Peripheral_Control 29 | * @{ */ 30 | 31 | typedef union { 32 | struct { 33 | uint16_t bitIndex : 5; 34 | uint16_t regIndex : 11; 35 | }; 36 | uint16_t w; 37 | } rccPosType; 38 | 39 | #define PPOS ((rccPosType)ePeriphPos) 40 | 41 | /** @defgroup RCC_Peripheral_Control_Exported_Functions RCC Peripheral Control Exported Functions 42 | * @{ */ 43 | 44 | /** 45 | * @brief Enables the clock of the peripheral. 46 | * @param ePeriphPos: Relative position of the peripheral control bit 47 | * in the RCC register space 48 | */ 49 | void RCC_vClockEnable(RCC_PositionType ePeriphPos) 50 | { 51 | #ifdef RCC_BB 52 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHBENR.w); 53 | pulEN[ePeriphPos] = 1; 54 | 55 | /* Read back to ensure effect */ 56 | (void) pulEN[ePeriphPos]; 57 | #else 58 | __IO uint32_t *pulENR = &RCC->AHBENR.w + PPOS.regIndex; 59 | SET_BIT(*pulENR, 1 << PPOS.bitIndex); 60 | 61 | /* Read back to ensure effect */ 62 | (void) *pulENR; 63 | #endif 64 | } 65 | 66 | /** 67 | * @brief Disables the clock of the peripheral. 68 | * @param ePeriphPos: Relative position of the peripheral control bit 69 | * in the RCC register space 70 | */ 71 | void RCC_vClockDisable(RCC_PositionType ePeriphPos) 72 | { 73 | #ifdef RCC_BB 74 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHBENR.w); 75 | pulEN[ePeriphPos] = 0; 76 | #else 77 | __IO uint32_t *pulENR = &RCC->AHBENR.w + PPOS.regIndex; 78 | CLEAR_BIT(*pulENR, 1 << PPOS.bitIndex); 79 | #endif 80 | } 81 | 82 | /** 83 | * @brief Forces and releases a reset on the peripheral. 84 | * @param ePeriphPos: Relative position of the peripheral control bit 85 | * in the RCC register space 86 | */ 87 | void RCC_vReset(RCC_PositionType ePeriphPos) 88 | { 89 | /* These devices have different layout for RSTR than ENR registers */ 90 | #ifdef RCC_BB 91 | __IO uint32_t *pulRST = PERIPH_BB(&RCC->AHBRSTR.w); 92 | if ((ePeriphPos & (~0x1F)) != RCC_POS_AHB) 93 | { 94 | pulRST = PERIPH_BB(&RCC->CIR.w); 95 | } 96 | pulRST[ePeriphPos] = 1; 97 | pulRST[ePeriphPos] = 0; 98 | #else 99 | __IO uint32_t *pulRSTR = &RCC->AHBRSTR.w + PPOS.regIndex; 100 | 101 | if ((ePeriphPos & (~0x1F)) != RCC_POS_AHB) 102 | { 103 | pulRSTR = &RCC->CIR.w + PPOS.regIndex; 104 | } 105 | SET_BIT (*pulRSTR, 1 << PPOS.bitIndex); 106 | CLEAR_BIT(*pulRSTR, 1 << PPOS.bitIndex); 107 | #endif 108 | } 109 | 110 | /** @} */ 111 | 112 | /** @} */ 113 | 114 | /** @} */ 115 | -------------------------------------------------------------------------------- /STM32F3_XPD/templates/system_stm32f3xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f3xx.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-09-28 7 | * @brief STM32 eXtensible Peripheral Drivers template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | #include 25 | #include 26 | #include 27 | 28 | /** @brief Global variable used to store the actual system clock frequency [Hz] */ 29 | uint32_t SystemCoreClock; 30 | 31 | /** @brief Interrupt vector table in startup_.s */ 32 | extern const uint32_t g_pfnVectors[]; 33 | 34 | /** 35 | * @brief Setup the microcontroller system. 36 | * Initialize the default HSI clock source, 37 | * vector table location 38 | * and the PLL configuration is reset. 39 | */ 40 | void SystemInit(void) 41 | { 42 | /* Reset all peripherals */ 43 | XPD_vDeinit(); 44 | 45 | /* Reset the RCC clock configuration to the default reset state 46 | * Sets SystemCoreClock value */ 47 | RCC_vDeinit(); 48 | 49 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 50 | /* FPU settings: if used, set CP10 and CP11 Full Access */ 51 | SCB->CPACR.b.CP10 = 3; 52 | SCB->CPACR.b.CP11 = 3; 53 | #endif 54 | 55 | /* initialize XPD services */ 56 | XPD_vInit(); 57 | 58 | /* TODO Redirect to interrupt vector table position */ 59 | SCB->VTOR.w = (uint32_t)g_pfnVectors; 60 | SYSTEM_MEMORY_REMAP(FLASH); 61 | 62 | /* TODO Configure system memory options */ 63 | FLASH_vPrefetchBuffer(ENABLE); 64 | } 65 | -------------------------------------------------------------------------------- /STM32F3_XPD/templates/xpd_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_config.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers configuration template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CONFIG_H_ 24 | #define __XPD_CONFIG_H_ 25 | 26 | /* TODO step 1: specify device header */ 27 | #include 28 | 29 | /* TODO step 2: enable desired used XPD modules error handling */ 30 | /* #define __XPD_DMA_ERROR_DETECT */ 31 | 32 | /* TODO step 3: specify power supplies */ 33 | #define VDD_VALUE_mV 3000 /* Value of VDD in mV */ 34 | #define VDDA_VALUE_mV 3000 /* Value of VDD Analog in mV */ 35 | 36 | /* TODO step 4: specify oscillator parameters */ 37 | /* #define HSE_VALUE_Hz 80000000 38 | * #define LSE_VALUE_Hz 32768 */ 39 | 40 | #endif /* __XPD_CONFIG_H_ */ 41 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_adc_calc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_adc_calc.h 4 | * @author Benedek Kupper 5 | * @version 1.0 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers ADC Calculations Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_ADC_CALC_H_ 24 | #define __XPD_ADC_CALC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @ingroup ADC 34 | * @defgroup ADC_Calculations ADC Calculations 35 | * @{ */ 36 | 37 | /** @addtogroup ADC_Calculations_Exported_Functions 38 | * @{ */ 39 | int32_t ADC_lCalcVDDA_mV (uint16_t usVRefintConversion); 40 | int32_t ADC_lCalcExt_mV (uint16_t usChannelConversion); 41 | int32_t ADC_lCalcTemp_C (uint16_t usTempConversion); 42 | #ifdef ADC_VBAT_SCALER 43 | int32_t ADC_lCalcVBAT_mV (uint16_t usVBatConversion); 44 | #endif 45 | int32_t ADC_lGetVDDA_mV (void); 46 | 47 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 48 | float ADC_fCalcVDDA_V (uint16_t usVRefintConversion); 49 | float ADC_fCalcExt_V (uint16_t usChannelConversion); 50 | float ADC_fCalcTemp_C (uint16_t usTempConversion); 51 | #ifdef ADC_VBAT_SCALER 52 | float ADC_fCalcVBAT_V (uint16_t usVBatConversion); 53 | #endif 54 | float ADC_fGetVDDA_V (void); 55 | #endif 56 | 57 | /** @} */ 58 | 59 | /** @} */ 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* __XPD_ADC_CALC_H_ */ 66 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_core.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Cortex Core Modules 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CORE_H_ 24 | #define __XPD_CORE_H_ 25 | 26 | #include 27 | #include 28 | 29 | #endif /* __XPD_CORE_H_ */ 30 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_EXTI_H_ 24 | #define __XPD_EXTI_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup EXTI 34 | * @{ */ 35 | 36 | /** @defgroup EXTI_Exported_Types EXTI Exported Types 37 | * @{ */ 38 | 39 | /** @brief EXTI setup structure */ 40 | typedef union 41 | { 42 | struct { 43 | ReactionType Reaction : 2; /*!< Type of generated reaction for the detected edge */ 44 | EdgeType Edge : 2; /*!< The selected edges trigger a reaction */ 45 | uint8_t : 4; 46 | }; 47 | uint8_t w; 48 | }EXTI_InitType; 49 | 50 | /** @} */ 51 | 52 | /** @defgroup EXTI_Exported_Variables EXTI Exported Variables 53 | * @{ */ 54 | 55 | /** @brief EXTI GPIO Pin callbacks container array */ 56 | extern XPD_ValueCallbackType EXTI_xPinCallbacks[16]; 57 | 58 | /** @} */ 59 | 60 | /** @addtogroup EXTI_Exported_Functions 61 | * @{ */ 62 | void EXTI_vInit (uint8_t ucLine, const EXTI_InitType * pxConfig); 63 | void EXTI_vDeinit (uint8_t ucLine); 64 | 65 | const EXTI_InitType * EXTI_pxDefaultConfig(void); 66 | 67 | /** 68 | * @brief Gets the pending flag for the line. 69 | * @param ucLine: the selected EXTI line 70 | * @return The EXTI line flag status 71 | */ 72 | __STATIC_INLINE FlagStatus EXTI_eGetFlag(uint8_t ucLine) 73 | { 74 | #ifdef EXTI_BB 75 | return EXTI_BB->PR[ucLine]; 76 | #else 77 | return (EXTI->PR >> ucLine) & 1; 78 | #endif 79 | } 80 | 81 | /** 82 | * @brief Clears the pending flag for the line. 83 | * @param ucLine: the selected EXTI line to clear 84 | */ 85 | __STATIC_INLINE void EXTI_vClearFlag(uint8_t ucLine) 86 | { 87 | EXTI->PR = 1 << ucLine; 88 | } 89 | 90 | /** 91 | * @brief Generates a software triggered interrupt. 92 | * @param ucLine: the selected EXTI line to trigger 93 | */ 94 | __STATIC_INLINE void EXTI_vGenerateIT(uint8_t ucLine) 95 | { 96 | EXTI->SWIER = 1 << ucLine; 97 | } 98 | 99 | /** 100 | * @brief EXTI interrupt handler. 101 | * @param ucLine: an interrupt line which may be responsible for the interrupt generation. 102 | */ 103 | __STATIC_INLINE void EXTI_vIRQHandler(uint8_t ucLine) 104 | { 105 | if (EXTI_eGetFlag(ucLine)) 106 | { 107 | EXTI_vClearFlag(ucLine); 108 | 109 | /* GPIO callbacks only */ 110 | if (ucLine < 16) 111 | { 112 | XPD_SAFE_CALLBACK(EXTI_xPinCallbacks[ucLine], ucLine); 113 | } 114 | } 115 | } 116 | 117 | /** @} */ 118 | 119 | /** @} */ 120 | 121 | #ifdef __cplusplus 122 | } 123 | #endif 124 | 125 | #endif /* __XPD_EXTI_H_ */ 126 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_i2c.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_i2c.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Inter-Interface Communication Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_I2C_H_ 24 | #define __XPD_I2C_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | 34 | /** @defgroup I2C 35 | * @{ */ 36 | 37 | /** @defgroup I2C_Exported_Types I2C Exported Types 38 | * @{ */ 39 | 40 | /** @brief I2C Handle structure */ 41 | typedef struct 42 | { 43 | I2C_TypeDef * Inst; /*!< The address of the peripheral instance used by the handle */ 44 | #ifdef I2C_BB 45 | I2C_BitBand_TypeDef * Inst_BB; /*!< The address of the peripheral instance in the bit-band region */ 46 | #endif 47 | struct { 48 | XPD_HandleCallbackType DepInit; /*!< Callback to initialize module dependencies (GPIOs, IRQs, DMAs) */ 49 | XPD_HandleCallbackType DepDeinit; /*!< Callback to restore module dependencies (GPIOs, IRQs, DMAs) */ 50 | XPD_HandleCallbackType Transmit; /*!< Data stream transmission successful callback */ 51 | XPD_HandleCallbackType Receive; /*!< Data stream reception successful callback */ 52 | #if defined(__XPD_I2C_ERROR_DETECT) || defined(__XPD_DMA_ERROR_DETECT) 53 | XPD_HandleCallbackType Error; /*!< Error callbacks */ 54 | #endif 55 | }Callbacks; /* Handle Callbacks */ 56 | struct { 57 | DMA_HandleType * Transmit; /*!< DMA handle for data transmission */ 58 | DMA_HandleType * Receive; /*!< DMA handle for data reception */ 59 | }DMA; /* DMA handle references */ 60 | DataStreamType RxStream; /*!< Data reception stream */ 61 | DataStreamType TxStream; /*!< Data transmission stream */ 62 | RCC_PositionType CtrlPos; /*!< Relative position for reset and clock control */ 63 | #if defined(__XPD_I2C_ERROR_DETECT) || defined(__XPD_DMA_ERROR_DETECT) 64 | //volatile I2C_ErrorType Errors; /*!< Transfer errors */ 65 | #endif 66 | }I2C_HandleType; 67 | 68 | /** @} */ 69 | 70 | /** @addtogroup I2C_Exported_Functions 71 | * @{ */ 72 | 73 | /** @} */ 74 | 75 | /** @} */ 76 | 77 | #define XPD_I2C_API 78 | #include 79 | #undef XPD_I2C_API 80 | 81 | #ifdef __cplusplus 82 | } 83 | #endif 84 | 85 | #endif /* __XPD_I2C_H_ */ 86 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_mco.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_mco.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Master Clock Output Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_MCO_H_ 24 | #define __XPD_MCO_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | /** @addtogroup RCC 36 | * @{ */ 37 | 38 | /** @defgroup MCO Master Clock Output 39 | * @{ */ 40 | 41 | /** @defgroup MCO_Exported_Types MCO Exported Types 42 | * @{ */ 43 | 44 | /** @brief RCC master clock output 1 clock source types */ 45 | typedef enum 46 | { 47 | MCO1_CLOCKSOURCE_HSI = 0, /*!< HSI clock source */ 48 | #ifdef LSE_VALUE_Hz 49 | MCO1_CLOCKSOURCE_LSE = 1, /*!< LSE clock source */ 50 | #endif 51 | #ifdef HSE_VALUE_Hz 52 | MCO1_CLOCKSOURCE_HSE = 2, /*!< HSE clock source */ 53 | #endif 54 | MCO1_CLOCKSOURCE_PLL = 3 /*!< PLL clock source */ 55 | }MCO1_ClockSourceType; 56 | 57 | #ifdef RCC_CFGR_MCO2 58 | /** @brief RCC master clock output 2 clock source types */ 59 | typedef enum 60 | { 61 | MCO2_CLOCKSOURCE_SYSCLK = 0, /*!< System clock source */ 62 | MCO2_CLOCKSOURCE_PLLI2SCLK = 1, /*!< PLL I2S clock source */ 63 | #ifdef HSE_VALUE_Hz 64 | MCO2_CLOCKSOURCE_HSE = 2, /*!< HSE clock source */ 65 | #endif 66 | MCO2_CLOCKSOURCE_PLL = 3 /*!< PLL clock source */ 67 | }MCO2_ClockSourceType; 68 | #endif 69 | 70 | /** @} */ 71 | 72 | #define MCO1_GPIO_PIN PA8 73 | #define MCO2_GPIO_PIN PC9 74 | 75 | /** @defgroup MCO_Exported_Functions MCO Exported Functions 76 | * @brief RCC microcontroller clock outputs 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Configures a master clock output 82 | * @param ucMCOx: the number of the MCO 83 | * @param eMCOSource: clock source of the MCO, either @ref MCO1_ClockSourceType 84 | or @ref MCO2_ClockSourceType depending on the used MCO 85 | * @param ucMCODiv: the clock division to be applied for the MCO [1 .. 5] 86 | */ 87 | __STATIC_INLINE void MCO_vInit( 88 | uint8_t ucMCOx, 89 | MCO1_ClockSourceType eMCOSource, 90 | uint8_t ucMCODiv) 91 | { 92 | static const GPIO_InitType xMCOPinCfg = { 93 | .Mode = GPIO_MODE_ALTERNATE, 94 | .AlternateMap = GPIO_MCO_AF0, 95 | .Output.Speed = VERY_HIGH, 96 | .Output.Type = GPIO_OUTPUT_PUSHPULL, 97 | .Pull = GPIO_PULL_FLOAT, 98 | }; 99 | 100 | if (ucMCOx == 2) 101 | { 102 | GPIO_vInitPin(MCO2_GPIO_PIN, &xMCOPinCfg); 103 | 104 | RCC->CFGR.b.MCO2 = eMCOSource; 105 | if (ucMCODiv > 1) 106 | { 107 | RCC->CFGR.b.MCO2PRE = 4 | (ucMCODiv - 1); 108 | } 109 | else 110 | { 111 | RCC->CFGR.b.MCO2PRE = 0; 112 | } 113 | 114 | #ifdef RCC_CFGR_MCO2EN 115 | RCC_REG_BIT(CFGR,MCO2EN) = 1; 116 | #endif 117 | } 118 | else 119 | { 120 | GPIO_vInitPin(MCO1_GPIO_PIN, &xMCOPinCfg); 121 | 122 | RCC->CFGR.b.MCO1 = eMCOSource; 123 | if (ucMCODiv > 1) 124 | { 125 | RCC->CFGR.b.MCO1PRE = 4 | (ucMCODiv - 1); 126 | } 127 | else 128 | { 129 | RCC->CFGR.b.MCO1PRE = 0; 130 | } 131 | 132 | #ifdef RCC_CFGR_MCO1EN 133 | RCC_REG_BIT(CFGR,MCO1EN) = 1; 134 | #endif 135 | } 136 | } 137 | 138 | /** 139 | * @brief Disables a master clock output 140 | * @param ucMCOx: the number of the MCO 141 | */ 142 | __STATIC_INLINE void MCO_vDeinit(uint8_t ucMCOx) 143 | { 144 | if (ucMCOx == 2) 145 | { 146 | GPIO_vDeinitPin(MCO2_GPIO_PIN); 147 | 148 | #ifdef RCC_CFGR_MCO2EN 149 | RCC_REG_BIT(CFGR,MCO2EN) = 0; 150 | #endif 151 | } 152 | else 153 | { 154 | GPIO_vDeinitPin(MCO1_GPIO_PIN); 155 | 156 | #ifdef RCC_CFGR_MCO1EN 157 | RCC_REG_BIT(CFGR,MCO1EN) = 0; 158 | #endif 159 | } 160 | } 161 | 162 | /** @} */ 163 | 164 | /** @} */ 165 | 166 | /** @} */ 167 | 168 | #ifdef __cplusplus 169 | } 170 | #endif 171 | 172 | #endif /* __XPD_MCO_H_ */ 173 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_nvic.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_nvic.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers NVIC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_NVIC_H_ 24 | #define __XPD_NVIC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup NVIC 34 | * @{ */ 35 | 36 | #if (__CORTEX_M >= 3) 37 | /** @defgroup NVIC_Exported_Types NVIC Exported Types 38 | * @{ */ 39 | 40 | /** @brief NVIC priority group types used for NVIC_SetPriorityGrouping() */ 41 | typedef enum 42 | { 43 | NVIC_PRIOGROUP_0PRE_4SUB = 7, /*!< 0 preemption priority bits, 4 subpriority bits */ 44 | NVIC_PRIOGROUP_1PRE_3SUB = 6, /*!< 1 preemption priority bits, 3 subpriority bits */ 45 | NVIC_PRIOGROUP_2PRE_2SUB = 5, /*!< 2 preemption priority bits, 2 subpriority bits */ 46 | NVIC_PRIOGROUP_3PRE_1SUB = 4, /*!< 3 preemption priority bits, 1 subpriority bits */ 47 | NVIC_PRIOGROUP_4PRE_0SUB = 3 /*!< 4 preemption priority bits, 0 subpriority bits */ 48 | }NVIC_PrioGroupType; 49 | 50 | /** @} */ 51 | 52 | #endif /* (__CORTEX_M >= 3) */ 53 | 54 | /** @defgroup NVIC_Exported_Macros NVIC Exported Macros 55 | * @{ */ 56 | 57 | /** 58 | * @brief @ref XPD_NVIC_GetCurrentIRQ() return value when it's called in thread context. 59 | */ 60 | #define ThreadMode_IRQn (-16) 61 | 62 | /** 63 | * @brief Returns the currently active interrupt line. 64 | * @retval The @ref IRQn_Type that is currently being executed 65 | */ 66 | __STATIC_INLINE IRQn_Type NVIC_GetCurrentIRQ(void) 67 | { 68 | return ((IRQn_Type)(((IPSR_Type)__get_IPSR()).b.ISR) - 16); 69 | } 70 | 71 | /** 72 | * @brief Enable all exceptions with configurable priority (default). 73 | */ 74 | __STATIC_INLINE void NVIC_EnableAllIRQs(void) 75 | { 76 | __set_PRIMASK(0); 77 | } 78 | 79 | /** 80 | * @brief Disable all exceptions with configurable priority. 81 | */ 82 | __STATIC_INLINE void NVIC_DisableAllIRQs(void) 83 | { 84 | __set_PRIMASK(1); 85 | } 86 | 87 | #if (__CORTEX_M >= 3) 88 | 89 | /** 90 | * @brief NVIC interrupt priority configuration setting macro. 91 | * @param IRQn: the selected @ref IRQn_Type line to configure 92 | * @param PreemptPriority: the preemption priority value 93 | * @param SubPriority: the subpriority value 94 | */ 95 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 96 | uint32_t PreemptPriority, 97 | uint32_t SubPriority) 98 | { 99 | NVIC_SetPriority(IRQn, 100 | NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 101 | PreemptPriority, SubPriority)); 102 | } 103 | 104 | #else 105 | 106 | /** 107 | * @brief NVIC interrupt priority configuration setting macro. 108 | * @param IRQn: the selected @ref IRQn_Type line to configure 109 | * @param PreemptPriority: unused 110 | * @param SubPriority: the priority value 111 | */ 112 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 113 | uint32_t PreemptPriority, 114 | uint32_t SubPriority) 115 | { 116 | NVIC_SetPriority(IRQn, SubPriority); 117 | } 118 | 119 | #endif /* (__CORTEX_M >= 3) */ 120 | 121 | /** @} */ 122 | 123 | /** @} */ 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __XPD_NVIC_H_ */ 130 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_pvd.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_pvd.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Power Voltage Detector Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_PVD_H_ 24 | #define __XPD_PVD_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | #ifdef PWR_CR_PLS 36 | 37 | /** @defgroup PVD Power Voltage Detector 38 | * @{ */ 39 | 40 | /** @defgroup PVD_Exported_Types PVD Exported Types 41 | * @{ */ 42 | 43 | /** @brief PVD levels */ 44 | typedef enum 45 | { 46 | PWR_PVDLEVEL_2V0 = 0, /*!< 2.0V voltage detector level */ 47 | PWR_PVDLEVEL_2V1 = 1, /*!< 2.1V voltage detector level */ 48 | PWR_PVDLEVEL_2V3 = 2, /*!< 2.3V voltage detector level */ 49 | PWR_PVDLEVEL_2V5 = 3, /*!< 2.5V voltage detector level */ 50 | PWR_PVDLEVEL_2V6 = 4, /*!< 2.6V voltage detector level */ 51 | PWR_PVDLEVEL_2V7 = 5, /*!< 2.7V voltage detector level */ 52 | PWR_PVDLEVEL_2V8 = 6, /*!< 2.8V voltage detector level */ 53 | PWR_PVDLEVEL_2V9 = 7 /*!< 2.9V voltage detector level */ 54 | } PWR_PVDLevelType; 55 | 56 | /** @} */ 57 | 58 | /** @defgroup PVD_Exported_Macros PVD Exported Macros 59 | * @{ */ 60 | 61 | /** @brief PVD EXTI line number */ 62 | #define PVD_EXTI_LINE 16 63 | /** @} */ 64 | 65 | /** @defgroup PVD_Exported_Functions PVD Exported Functions 66 | * @{ */ 67 | 68 | /** 69 | * @brief Configures the voltage threshold monitoring by the Power Voltage Detector(PVD). 70 | * @param eLevel: the monitored voltage level 71 | * @param eReaction: system reaction upon crossing threshold 72 | */ 73 | __STATIC_INLINE void PVD_vInit(PWR_PVDLevelType eLevel, ReactionType eReaction) 74 | { 75 | EXTI_InitType xExti = { .Edge = EDGE_RISING }; 76 | xExti.Reaction = eReaction; 77 | 78 | /* Set PLS bits according to PVDLevel value */ 79 | PWR->CR.b.PLS = eLevel; 80 | 81 | /* External interrupt line 16 Connected to the PVD EXTI Line */ 82 | EXTI_vInit(PVD_EXTI_LINE, &xExti); 83 | } 84 | 85 | /** 86 | * @brief Enables the Power Voltage Detector (PVD). 87 | */ 88 | __STATIC_INLINE void PVD_vStart(void) 89 | { 90 | PWR_REG_BIT(CR,PVDE) = 1; 91 | } 92 | 93 | /** 94 | * @brief Disables the Power Voltage Detector (PVD). 95 | */ 96 | __STATIC_INLINE void PVD_vStop(void) 97 | { 98 | PWR_REG_BIT(CR,PVDE) = 0; 99 | } 100 | 101 | /** 102 | * @brief Gets the pending flag for the PVD. 103 | * @return The PVD flag status 104 | */ 105 | __STATIC_INLINE FlagStatus PVD_eGetFlag(void) 106 | { 107 | return EXTI_eGetFlag(PVD_EXTI_LINE); 108 | } 109 | 110 | /** 111 | * @brief Clears the pending PVD flag. 112 | */ 113 | __STATIC_INLINE void PVD_vClearFlag(void) 114 | { 115 | EXTI_vClearFlag(PVD_EXTI_LINE); 116 | } 117 | 118 | /** @} */ 119 | 120 | /** @} */ 121 | 122 | #endif /* PWR_CR_PLS */ 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __XPD_PVD_H_ */ 129 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_rcc_pc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rcc_pc.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers RCC Peripheral Clocks Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | 24 | #if defined(XPD_I2C_API) 25 | 26 | /** @ingroup I2C 27 | * @defgroup I2C_Clock_Source I2C Clock Source 28 | * @{ */ 29 | 30 | /** @addtogroup I2C_Clock_Source_Exported_Functions 31 | * @{ */ 32 | uint32_t I2C_ulClockFreq_Hz (I2C_HandleType * pxI2C); 33 | /** @} */ 34 | 35 | /** @} */ 36 | 37 | #elif defined(XPD_RTC_API) 38 | 39 | /** @ingroup RTC 40 | * @defgroup RTC_Clock_Source RTC Clock Source 41 | * @{ */ 42 | 43 | /** @defgroup RTC_Clock_Source_Exported_Types RTC Clock Source Exported Types 44 | * @{ */ 45 | 46 | /** @brief RTC clock source types */ 47 | typedef enum 48 | { 49 | RTC_CLOCKSOURCE_NONE = 0, /*!< no clock source */ 50 | #ifdef LSE_VALUE_Hz 51 | RTC_CLOCKSOURCE_LSE = 1, /*!< LSE clock source */ 52 | #endif 53 | RTC_CLOCKSOURCE_LSI = 2, /*!< LSI clock source */ 54 | #ifdef HSE_VALUE_Hz 55 | RTC_CLOCKSOURCE_HSE = 3, /*!< HSE clock source */ 56 | #endif 57 | }RTC_ClockSourceType; 58 | /** @} */ 59 | 60 | /** @addtogroup RTC_Clock_Source_Exported_Functions 61 | * @{ */ 62 | XPD_ReturnType RTC_eClockConfig (RTC_ClockSourceType eClockSource); 63 | uint32_t RTC_ulClockFreq_Hz (void); 64 | /** @} */ 65 | 66 | /** @} */ 67 | 68 | #elif defined(XPD_TIM_API) 69 | 70 | /** @ingroup TIM 71 | * @defgroup TIM_Clock_Source TIM Clock Source 72 | * @{ */ 73 | 74 | #ifdef RCC_DCKCFGR_TIMPRE 75 | /** @defgroup TIM_Clock_Source_Exported_Types TIM Clock Source Exported Types 76 | * @{ */ 77 | 78 | /** @brief TIM clock source types */ 79 | typedef enum 80 | { 81 | TIM_CLOCKSOURCE_PCLKx = 0, /*!< default clock source */ 82 | TIM_CLOCKSOURCE_HCLK = 1, /*!< clock source from HCLK 83 | @note Only applies if APBx prescaler is DIV1, 2 or 4 */ 84 | }TIM_ClockSourceType; 85 | /** @} */ 86 | #endif 87 | 88 | /** @addtogroup TIM_Clock_Source_Exported_Functions 89 | * @{ */ 90 | #ifdef RCC_DCKCFGR_TIMPRE 91 | void TIM_vClockConfig (TIM_ClockSourceType eClockSource); 92 | #endif 93 | uint32_t TIM_ulClockFreq_Hz (TIM_HandleType * pxTIM); 94 | /** @} */ 95 | 96 | /** @} */ 97 | 98 | #elif defined(XPD_USART_API) 99 | 100 | /** @ingroup USART 101 | * @defgroup USART_Clock_Source USART Clock Source 102 | * @{ */ 103 | 104 | /** @addtogroup USART_Clock_Source_Exported_Functions 105 | * @{ */ 106 | uint32_t USART_ulClockFreq_Hz (USART_HandleType * pxUSART); 107 | /** @} */ 108 | 109 | /** @} */ 110 | #endif 111 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rtc.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Real Time Clock Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_RTC_H_ 24 | #define __XPD_RTC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_RTC_API 34 | #include 35 | #undef XPD_RTC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_RTC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_syscfg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_syscfg.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers System Configuration Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef SYSCFG_REG_BIT 24 | 25 | #ifdef SYSCFG_BB 26 | #define SYSCFG_REG_BIT(REG_NAME, BIT_NAME) \ 27 | (SYSCFG_BB->REG_NAME.BIT_NAME) 28 | #else 29 | #define SYSCFG_REG_BIT(REG_NAME, BIT_NAME) \ 30 | (SYSCFG->REG_NAME.b.BIT_NAME) 31 | #endif /* SYSCFG_BB */ 32 | 33 | #define __MEM_RMP_FLASH 0 34 | #define __MEM_RMP_ROM 1 35 | #define __MEM_RMP_SRAM 3 36 | #define __MEM_RMP_FMC 2 37 | #define __MEM_RMP_FSMC __MEM_RMP_FMC 38 | /** 39 | * @brief Maps the selected memory also starting from 0 address 40 | * @param MEMORY: The system memory to map 41 | * @arg FLASH Main flash 42 | * @arg ROM System memory 43 | * @arg SRAM Embedded SRAM 44 | * @arg FMC F(S)MC Bank1 (NOR/PSRAM 1 and 2) 45 | */ 46 | #define SYSTEM_MEMORY_REMAP(MEMORY) \ 47 | (SYSCFG->MEMRMP.b.MEM_MODE = __MEM_RMP_##MEMORY) 48 | 49 | #endif /* SYSCFG_REG_BIT */ 50 | 51 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_systick.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_systick.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers SysTick Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_SYSTICK_H_ 24 | #define __XPD_SYSTICK_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup SysTick 34 | * @{ */ 35 | 36 | /** @defgroup SysTick_Exported_Types SysTick Exported Types 37 | * @{ */ 38 | 39 | /** @brief SysTick clock source types */ 40 | typedef enum 41 | { 42 | SYSTICK_CLOCKSOURCE_HCLK_DIV8 = 0, /*!< SysTick clock source is HCLK divided by 8 */ 43 | SYSTICK_CLOCKSOURCE_HCLK = 1 /*!< SysTick clock source is HCLK */ 44 | }SysTick_ClockSourceType; 45 | 46 | /** @} */ 47 | 48 | /** @defgroup SysTick_Exported_Functions SysTick Exported Functions 49 | * @{ */ 50 | 51 | /** 52 | * @brief Configures the SysTick timer and interrupt generation 53 | * @param ClockSource: clock source of the timer 54 | * @param Period: the amount of timer counts until the counter reset 55 | * @return ERROR if the Period is too large to fit in the 24 bit register, 56 | * OK if successful 57 | */ 58 | __STATIC_INLINE XPD_ReturnType SysTick_eInit( 59 | SysTick_ClockSourceType eClockSource, 60 | uint32_t ulPeriod) 61 | { 62 | /* check against counter size (24 bits) */ 63 | if ((--ulPeriod) > SysTick_LOAD_RELOAD_Msk) 64 | { 65 | return XPD_ERROR; 66 | } 67 | else 68 | { 69 | /* set reload register */ 70 | SysTick->LOAD = ulPeriod; 71 | 72 | /* reset the SysTick Counter Value */ 73 | SysTick->VAL = 0; 74 | 75 | /* set clock source */ 76 | SysTick->CTRL.b.CLKSOURCE = eClockSource; 77 | 78 | return XPD_OK; 79 | } 80 | } 81 | 82 | /** 83 | * @brief Enables the SysTick timer 84 | */ 85 | __STATIC_INLINE void SysTick_vStart(void) 86 | { 87 | SysTick->CTRL.b.ENABLE = 1; 88 | } 89 | 90 | /** 91 | * @brief Disables the SysTick timer 92 | */ 93 | __STATIC_INLINE void SysTick_vStop(void) 94 | { 95 | SysTick->CTRL.b.ENABLE = 0; 96 | } 97 | 98 | /** 99 | * @brief Starts the SysTick timer with interrupt generation 100 | */ 101 | __STATIC_INLINE void SysTick_vStart_IT(void) 102 | { 103 | SysTick->VAL = 0; 104 | SET_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 105 | } 106 | 107 | /** 108 | * @brief Stops the SysTick timer with interrupt generation 109 | */ 110 | __STATIC_INLINE void SysTick_vStop_IT(void) 111 | { 112 | CLEAR_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 113 | } 114 | 115 | /** 116 | * @brief Enables the SysTick interrupt request 117 | */ 118 | __STATIC_INLINE void SysTick_IT_Enable(void) 119 | { 120 | SysTick->CTRL.b.TICKINT = 1; 121 | } 122 | 123 | /** 124 | * @brief Disables the SysTick interrupt request 125 | */ 126 | __STATIC_INLINE void SysTick_IT_Disable(void) 127 | { 128 | SysTick->CTRL.b.TICKINT = 0; 129 | } 130 | 131 | /** @} */ 132 | 133 | /** @} */ 134 | 135 | /** @} */ 136 | 137 | #ifdef __cplusplus 138 | } 139 | #endif 140 | 141 | #endif /* __XPD_SYSTICK_H_ */ 142 | -------------------------------------------------------------------------------- /STM32F4_XPD/inc/xpd_usb.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_usb.h 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Universal Serial Bus Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_USB_H_ 24 | #define __XPD_USB_H_ 25 | #include 26 | 27 | #define USB_vInit USB_vDevInit 28 | #define USB_vDeinit USB_vDevDeinit 29 | #define USB_vStart_IT USB_vDevStart_IT 30 | #define USB_vStop_IT USB_vDevStop_IT 31 | #define USB_vIRQHandler USB_vDevIRQHandler 32 | 33 | #endif /* __XPD_USB_H_ */ 34 | -------------------------------------------------------------------------------- /STM32F4_XPD/src/xpd_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.c 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | 24 | #include 25 | 26 | /** @addtogroup EXTI 27 | * @{ */ 28 | 29 | XPD_ValueCallbackType EXTI_xPinCallbacks[16] = { 30 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 31 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 32 | }; 33 | 34 | static const EXTI_InitType exti_xDefConfig = { .Reaction = REACTION_IT, .Edge = EDGE_RISING }; 35 | 36 | /** @defgroup EXTI_Exported_Functions EXTI Exported Functions 37 | * @{ */ 38 | 39 | /** 40 | * @brief Configures the EXTI line according to the setup parameters. 41 | * @param ucLine: the selected EXTI line 42 | * @param pxConfig: pointer to the setup structure 43 | */ 44 | void EXTI_vInit(uint8_t ucLine, const EXTI_InitType * pxConfig) 45 | { 46 | #ifdef RCC_APB2ENR_EXTITEN 47 | RCC_vClockEnable(RCC_POS_EXTI); 48 | #endif 49 | 50 | #ifdef EXTI_BB 51 | EXTI_BB->IMR[ucLine] = pxConfig->w; 52 | 53 | EXTI_BB->EMR[ucLine] = pxConfig->w >> 1; 54 | 55 | EXTI_BB->RTSR[ucLine] = pxConfig->w >> 2; 56 | 57 | EXTI_BB->FTSR[ucLine] = pxConfig->w >> 3; 58 | #else 59 | uint32_t ulLineBit = 1 << ucLine; 60 | 61 | /* set EXTI line configuration */ 62 | if (pxConfig->Reaction & REACTION_IT) 63 | { 64 | SET_BIT(EXTI->IMR, ulLineBit); 65 | } 66 | else 67 | { 68 | CLEAR_BIT(EXTI->IMR, ulLineBit); 69 | } 70 | 71 | if (pxConfig->Reaction & REACTION_EVENT) 72 | { 73 | SET_BIT(EXTI->EMR, ulLineBit); 74 | } 75 | else 76 | { 77 | CLEAR_BIT(EXTI->EMR, ulLineBit); 78 | } 79 | 80 | /* set rising and falling edge configuration */ 81 | if (pxConfig->Edge & EDGE_RISING) 82 | { 83 | SET_BIT(EXTI->RTSR, ulLineBit); 84 | } 85 | else 86 | { 87 | CLEAR_BIT(EXTI->RTSR, ulLineBit); 88 | } 89 | 90 | if (pxConfig->Edge & EDGE_FALLING) 91 | { 92 | SET_BIT(EXTI->FTSR, ulLineBit); 93 | } 94 | else 95 | { 96 | CLEAR_BIT(EXTI->FTSR, ulLineBit); 97 | } 98 | #endif 99 | } 100 | 101 | /** 102 | * @brief Restores the EXTI line to its default state. 103 | * @param ucLine: the selected EXTI line 104 | */ 105 | void EXTI_vDeinit(uint8_t ucLine) 106 | { 107 | #ifdef EXTI_BB 108 | /* Clear EXTI line configuration */ 109 | EXTI_BB->IMR[ucLine] = 0; 110 | EXTI_BB->EMR[ucLine] = 0; 111 | 112 | /* Clear Rising Falling edge configuration */ 113 | EXTI_BB->RTSR[ucLine] = 0; 114 | EXTI_BB->FTSR[ucLine] = 0; 115 | #else 116 | uint32_t ulLineBit = 1 << ucLine; 117 | 118 | /* Clear EXTI line configuration */ 119 | CLEAR_BIT(EXTI->IMR, ulLineBit); 120 | CLEAR_BIT(EXTI->EMR, ulLineBit); 121 | 122 | /* Clear Rising Falling edge configuration */ 123 | CLEAR_BIT(EXTI->RTSR, ulLineBit); 124 | CLEAR_BIT(EXTI->FTSR, ulLineBit); 125 | #endif 126 | } 127 | 128 | /** 129 | * @brief Gets the default EXTI configuration (trigger interrupt on rising edge). 130 | * @return Reference to the default EXTI configuration value 131 | */ 132 | const EXTI_InitType * EXTI_pxDefaultConfig(void) 133 | { 134 | return &exti_xDefConfig; 135 | } 136 | 137 | /** @} */ 138 | 139 | /** @} */ 140 | -------------------------------------------------------------------------------- /STM32F4_XPD/src/xpd_rcc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rcc.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers RCC Peripherals Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | 25 | /** @addtogroup RCC 26 | * @{ */ 27 | 28 | /** @addtogroup RCC_Peripheral_Control 29 | * @{ */ 30 | 31 | typedef union { 32 | struct { 33 | uint16_t bitIndex : 5; 34 | uint16_t regIndex : 11; 35 | }; 36 | uint16_t w; 37 | } rccPosType; 38 | 39 | #define PPOS ((rccPosType)ePeriphPos) 40 | 41 | /** @defgroup RCC_Peripheral_Control_Exported_Functions RCC Peripheral Control Exported Functions 42 | * @{ */ 43 | 44 | /** 45 | * @brief Enables the clock of the peripheral. 46 | * @param ePeriphPos: Relative position of the peripheral control bit 47 | * in the RCC register space 48 | */ 49 | void RCC_vClockEnable(RCC_PositionType ePeriphPos) 50 | { 51 | #ifdef RCC_BB 52 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHB1ENR.w); 53 | pulEN[ePeriphPos] = 1; 54 | 55 | /* Read back to ensure effect */ 56 | (void) pulEN[ePeriphPos]; 57 | #else 58 | __IO uint32_t *pulENR = &RCC->AHB1ENR.w + PPOS.regIndex; 59 | SET_BIT(*pulENR, 1 << PPOS.bitIndex); 60 | 61 | /* Read back to ensure effect */ 62 | (void) *pulENR; 63 | #endif 64 | } 65 | 66 | /** 67 | * @brief Disables the clock of the peripheral. 68 | * @param ePeriphPos: Relative position of the peripheral control bit 69 | * in the RCC register space 70 | */ 71 | void RCC_vClockDisable(RCC_PositionType ePeriphPos) 72 | { 73 | #ifdef RCC_BB 74 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHB1ENR.w); 75 | pulEN[ePeriphPos] = 0; 76 | #else 77 | __IO uint32_t *pulENR = &RCC->AHB1ENR.w + PPOS.regIndex; 78 | CLEAR_BIT(*pulENR, 1 << PPOS.bitIndex); 79 | #endif 80 | } 81 | 82 | /** 83 | * @brief Enables the clock of the peripheral during sleep mode. 84 | * @param ePeriphPos: Relative position of the peripheral control bit 85 | * in the RCC register space 86 | */ 87 | void RCC_vSleepClockEnable(RCC_PositionType ePeriphPos) 88 | { 89 | #ifdef RCC_BB 90 | __IO uint32_t *pulLPEN = PERIPH_BB(&RCC->AHB1LPENR.w); 91 | pulLPEN[ePeriphPos] = 1; 92 | #else 93 | __IO uint32_t *pulLPENR = &RCC->AHB1LPENR.w + PPOS.regIndex; 94 | SET_BIT(*pulLPENR, 1 << PPOS.bitIndex); 95 | #endif 96 | } 97 | 98 | /** 99 | * @brief Disables the clock of the peripheral during sleep mode. 100 | * @param ePeriphPos: Relative position of the peripheral control bit 101 | * in the RCC register space 102 | */ 103 | void RCC_vSleepClockDisable(RCC_PositionType ePeriphPos) 104 | { 105 | #ifdef RCC_BB 106 | __IO uint32_t *pulLPEN = PERIPH_BB(&RCC->AHB1LPENR.w); 107 | pulLPEN[ePeriphPos] = 0; 108 | #else 109 | __IO uint32_t *pulLPENR = &RCC->AHB1LPENR.w + PPOS.regIndex; 110 | CLEAR_BIT(*pulLPENR, 1 << PPOS.bitIndex); 111 | #endif 112 | } 113 | 114 | /** 115 | * @brief Forces and releases a reset on the peripheral. 116 | * @param ePeriphPos: Relative position of the peripheral control bit 117 | * in the RCC register space 118 | */ 119 | void RCC_vReset(RCC_PositionType ePeriphPos) 120 | { 121 | #ifdef RCC_BB 122 | __IO uint32_t *pulRST = PERIPH_BB(&RCC->AHB1RSTR.w); 123 | pulRST[ePeriphPos] = 1; 124 | pulRST[ePeriphPos] = 0; 125 | #else 126 | __IO uint32_t *pulRSTR = &RCC->AHB1RSTR.w + PPOS.regIndex; 127 | SET_BIT (*pulRSTR, 1 << PPOS.bitIndex); 128 | CLEAR_BIT(*pulRSTR, 1 << PPOS.bitIndex); 129 | #endif 130 | } 131 | 132 | /** @} */ 133 | 134 | /** @} */ 135 | 136 | /** @} */ 137 | -------------------------------------------------------------------------------- /STM32F4_XPD/templates/system_stm32f4xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-09-28 7 | * @brief STM32 eXtensible Peripheral Drivers template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | #include 25 | #include 26 | #include 27 | 28 | /** @brief Global variable used to store the actual system clock frequency [Hz] */ 29 | uint32_t SystemCoreClock; 30 | 31 | /** @brief Interrupt vector table in startup_.s */ 32 | extern const uint32_t g_pfnVectors[]; 33 | 34 | /** 35 | * @brief Setup the microcontroller system. 36 | * Initialize the default HSI clock source, 37 | * vector table location 38 | * and the PLL configuration is reset. 39 | */ 40 | void SystemInit(void) 41 | { 42 | /* Reset all peripherals */ 43 | XPD_vDeinit(); 44 | 45 | /* Reset the RCC clock configuration to the default reset state 46 | * Sets SystemCoreClock value */ 47 | RCC_vDeinit(); 48 | 49 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 50 | /* FPU settings: if used, set CP10 and CP11 Full Access */ 51 | SCB->CPACR.b.CP10 = 3; 52 | SCB->CPACR.b.CP11 = 3; 53 | #endif 54 | 55 | /* initialize XPD services */ 56 | XPD_vInit(); 57 | 58 | /* TODO Redirect to interrupt vector table position */ 59 | SCB->VTOR.w = (uint32_t)g_pfnVectors; 60 | SYSTEM_MEMORY_REMAP(FLASH); 61 | 62 | /* TODO Configure system memory options */ 63 | FLASH_vPrefetchBuffer(ENABLE); 64 | 65 | FLASH_vInstCache(ENABLE); 66 | FLASH_vDataCache(ENABLE); 67 | } 68 | -------------------------------------------------------------------------------- /STM32F4_XPD/templates/xpd_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_config.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers configuration template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CONFIG_H_ 24 | #define __XPD_CONFIG_H_ 25 | 26 | /* TODO step 1: specify device header */ 27 | #include 28 | 29 | /* TODO step 2: enable desired used XPD modules error handling */ 30 | /* #define __XPD_DMA_ERROR_DETECT */ 31 | 32 | /* TODO step 3: specify power supplies */ 33 | #define VDD_VALUE_mV 3000 /* Value of VDD in mV */ 34 | #define VDDA_VALUE_mV 3000 /* Value of VDD Analog in mV */ 35 | 36 | /* TODO step 4: specify oscillator parameters */ 37 | /* #define HSE_VALUE_Hz 80000000 38 | * #define LSE_VALUE_Hz 32768 */ 39 | 40 | #endif /* __XPD_CONFIG_H_ */ 41 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_adc_calc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_adc_calc.h 4 | * @author Benedek Kupper 5 | * @version 1.0 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers ADC Calculations Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_ADC_CALC_H_ 24 | #define __XPD_ADC_CALC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @ingroup ADC 34 | * @defgroup ADC_Calculations ADC Calculations 35 | * @{ */ 36 | 37 | /** @addtogroup ADC_Calculations_Exported_Functions 38 | * @{ */ 39 | int32_t ADC_lCalcVDDA_mV (uint16_t usVRefintConversion); 40 | int32_t ADC_lCalcExt_mV (uint16_t usChannelConversion); 41 | int32_t ADC_lCalcTemp_C (uint16_t usTempConversion); 42 | #ifdef ADC_VBAT_SCALER 43 | int32_t ADC_lCalcVBAT_mV (uint16_t usVBatConversion); 44 | #endif 45 | int32_t ADC_lGetVDDA_mV (void); 46 | 47 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 48 | float ADC_fCalcVDDA_V (uint16_t usVRefintConversion); 49 | float ADC_fCalcExt_V (uint16_t usChannelConversion); 50 | float ADC_fCalcTemp_C (uint16_t usTempConversion); 51 | #ifdef ADC_VBAT_SCALER 52 | float ADC_fCalcVBAT_V (uint16_t usVBatConversion); 53 | #endif 54 | float ADC_fGetVDDA_V (void); 55 | #endif 56 | 57 | /** @} */ 58 | 59 | /** @} */ 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* __XPD_ADC_CALC_H_ */ 66 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_cec.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CEC_H_ 24 | #define __XPD_CEC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_CEC_API 34 | #include 35 | #undef XPD_CEC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_CEC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_core.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Cortex Core Modules 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CORE_H_ 24 | #define __XPD_CORE_H_ 25 | 26 | #include 27 | #include 28 | 29 | #endif /* __XPD_CORE_H_ */ 30 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_exti.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers EXTI Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_EXTI_H_ 24 | #define __XPD_EXTI_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup EXTI 34 | * @{ */ 35 | 36 | /** @defgroup EXTI_Exported_Types EXTI Exported Types 37 | * @{ */ 38 | 39 | /** @brief EXTI setup structure */ 40 | typedef union 41 | { 42 | struct { 43 | ReactionType Reaction : 2; /*!< Type of generated reaction for the detected edge */ 44 | EdgeType Edge : 2; /*!< The selected edges trigger a reaction */ 45 | uint8_t : 4; 46 | }; 47 | uint8_t w; 48 | }EXTI_InitType; 49 | 50 | /** @} */ 51 | 52 | /** @defgroup EXTI_Exported_Variables EXTI Exported Variables 53 | * @{ */ 54 | 55 | /** @brief EXTI GPIO Pin callbacks container array */ 56 | extern XPD_ValueCallbackType EXTI_xPinCallbacks[16]; 57 | 58 | /** @} */ 59 | 60 | /** @addtogroup EXTI_Exported_Functions 61 | * @{ */ 62 | void EXTI_vInit (uint8_t ucLine, const EXTI_InitType * pxConfig); 63 | void EXTI_vDeinit (uint8_t ucLine); 64 | 65 | const EXTI_InitType * EXTI_pxDefaultConfig(void); 66 | 67 | /** 68 | * @brief Gets the pending flag for the line. 69 | * @param ucLine: the selected EXTI line 70 | * @return The EXTI line flag status 71 | */ 72 | __STATIC_INLINE FlagStatus EXTI_eGetFlag(uint8_t ucLine) 73 | { 74 | #ifdef EXTI_BB 75 | if (ucLine < 32) 76 | { 77 | return EXTI_BB->PR1[ucLine]; 78 | } 79 | else 80 | { 81 | return EXTI_BB->PR2[ucLine - 32]; 82 | } 83 | #else 84 | if (ucLine < 32) 85 | { 86 | return (EXTI->PR1 >> ucLine) & 1; 87 | } 88 | else 89 | { 90 | return (EXTI->PR2 >> (ucLine - 32)) & 1; 91 | } 92 | #endif 93 | } 94 | 95 | /** 96 | * @brief Clears the pending flag for the line. 97 | * @param ucLine: the selected EXTI line to clear 98 | */ 99 | __STATIC_INLINE void EXTI_vClearFlag(uint8_t ucLine) 100 | { 101 | if (ucLine < 32) 102 | { 103 | EXTI->PR1 = 1 << ucLine; 104 | } 105 | else 106 | { 107 | EXTI->PR2 = 1 << (ucLine - 32); 108 | } 109 | } 110 | 111 | /** 112 | * @brief Generates a software triggered interrupt. 113 | * @param ucLine: the selected EXTI line to trigger 114 | */ 115 | __STATIC_INLINE void EXTI_vGenerateIT(uint8_t ucLine) 116 | { 117 | if (ucLine < 32) 118 | { 119 | EXTI->SWIER1 = 1 << ucLine; 120 | } 121 | else 122 | { 123 | EXTI->SWIER2 = 1 << (ucLine - 32); 124 | } 125 | } 126 | 127 | /** 128 | * @brief EXTI interrupt handler. 129 | * @param ucLine: an interrupt line which may be responsible for the interrupt generation. 130 | */ 131 | __STATIC_INLINE void EXTI_vIRQHandler(uint8_t ucLine) 132 | { 133 | if (EXTI_eGetFlag(ucLine)) 134 | { 135 | EXTI_vClearFlag(ucLine); 136 | 137 | /* GPIO callbacks only */ 138 | if (ucLine < 16) 139 | { 140 | XPD_SAFE_CALLBACK(EXTI_xPinCallbacks[ucLine], ucLine); 141 | } 142 | } 143 | } 144 | 145 | /** @} */ 146 | 147 | /** @} */ 148 | 149 | #ifdef __cplusplus 150 | } 151 | #endif 152 | 153 | #endif /* __XPD_EXTI_H_ */ 154 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_i2s.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_i2s.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers CEC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_I2S_H_ 24 | #define __XPD_I2S_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_I2S_API 34 | #include 35 | #undef XPD_I2S_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_I2S_H_ */ 42 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_nvic.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_nvic.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers NVIC Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_NVIC_H_ 24 | #define __XPD_NVIC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup NVIC 34 | * @{ */ 35 | 36 | #if (__CORTEX_M >= 3) 37 | /** @defgroup NVIC_Exported_Types NVIC Exported Types 38 | * @{ */ 39 | 40 | /** @brief NVIC priority group types used for NVIC_SetPriorityGrouping() */ 41 | typedef enum 42 | { 43 | NVIC_PRIOGROUP_0PRE_4SUB = 7, /*!< 0 preemption priority bits, 4 subpriority bits */ 44 | NVIC_PRIOGROUP_1PRE_3SUB = 6, /*!< 1 preemption priority bits, 3 subpriority bits */ 45 | NVIC_PRIOGROUP_2PRE_2SUB = 5, /*!< 2 preemption priority bits, 2 subpriority bits */ 46 | NVIC_PRIOGROUP_3PRE_1SUB = 4, /*!< 3 preemption priority bits, 1 subpriority bits */ 47 | NVIC_PRIOGROUP_4PRE_0SUB = 3 /*!< 4 preemption priority bits, 0 subpriority bits */ 48 | }NVIC_PrioGroupType; 49 | 50 | /** @} */ 51 | 52 | #endif /* (__CORTEX_M >= 3) */ 53 | 54 | /** @defgroup NVIC_Exported_Macros NVIC Exported Macros 55 | * @{ */ 56 | 57 | /** 58 | * @brief @ref XPD_NVIC_GetCurrentIRQ() return value when it's called in thread context. 59 | */ 60 | #define ThreadMode_IRQn (-16) 61 | 62 | /** 63 | * @brief Returns the currently active interrupt line. 64 | * @retval The @ref IRQn_Type that is currently being executed 65 | */ 66 | __STATIC_INLINE IRQn_Type NVIC_GetCurrentIRQ(void) 67 | { 68 | return ((IRQn_Type)(((IPSR_Type)__get_IPSR()).b.ISR) - 16); 69 | } 70 | 71 | /** 72 | * @brief Enable all exceptions with configurable priority (default). 73 | */ 74 | __STATIC_INLINE void NVIC_EnableAllIRQs(void) 75 | { 76 | __set_PRIMASK(0); 77 | } 78 | 79 | /** 80 | * @brief Disable all exceptions with configurable priority. 81 | */ 82 | __STATIC_INLINE void NVIC_DisableAllIRQs(void) 83 | { 84 | __set_PRIMASK(1); 85 | } 86 | 87 | #if (__CORTEX_M >= 3) 88 | 89 | /** 90 | * @brief NVIC interrupt priority configuration setting macro. 91 | * @param IRQn: the selected @ref IRQn_Type line to configure 92 | * @param PreemptPriority: the preemption priority value 93 | * @param SubPriority: the subpriority value 94 | */ 95 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 96 | uint32_t PreemptPriority, 97 | uint32_t SubPriority) 98 | { 99 | NVIC_SetPriority(IRQn, 100 | NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 101 | PreemptPriority, SubPriority)); 102 | } 103 | 104 | #else 105 | 106 | /** 107 | * @brief NVIC interrupt priority configuration setting macro. 108 | * @param IRQn: the selected @ref IRQn_Type line to configure 109 | * @param PreemptPriority: unused 110 | * @param SubPriority: the priority value 111 | */ 112 | __STATIC_INLINE void NVIC_SetPriorityConfig(IRQn_Type IRQn, 113 | uint32_t PreemptPriority, 114 | uint32_t SubPriority) 115 | { 116 | NVIC_SetPriority(IRQn, SubPriority); 117 | } 118 | 119 | #endif /* (__CORTEX_M >= 3) */ 120 | 121 | /** @} */ 122 | 123 | /** @} */ 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __XPD_NVIC_H_ */ 130 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_pvd.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_pvd.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Power Voltage Detector Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_PVD_H_ 24 | #define __XPD_PVD_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | #include 33 | #include 34 | 35 | #ifdef PWR_CR2_PLS 36 | 37 | /** @defgroup PVD Power Voltage Detector 38 | * @{ */ 39 | 40 | /** @defgroup PVD_Exported_Types PVD Exported Types 41 | * @{ */ 42 | 43 | /** @brief PVD levels */ 44 | typedef enum 45 | { 46 | PWR_PVDLEVEL_2V0 = 0, /*!< 2.0V voltage detector level */ 47 | PWR_PVDLEVEL_2V2 = 1, /*!< 2.2V voltage detector level */ 48 | PWR_PVDLEVEL_2V4 = 2, /*!< 2.4V voltage detector level */ 49 | PWR_PVDLEVEL_2V5 = 3, /*!< 2.5V voltage detector level */ 50 | PWR_PVDLEVEL_2V6 = 4, /*!< 2.6V voltage detector level */ 51 | PWR_PVDLEVEL_2V8 = 5, /*!< 2.8V voltage detector level */ 52 | PWR_PVDLEVEL_2V9 = 6, /*!< 2.9V voltage detector level */ 53 | PWR_PVDLEVEL_EXT = 7 /*!< External input analog voltage PVD_IN (compared to VREFINT) */ 54 | } PWR_PVDLevelType; 55 | 56 | /** @} */ 57 | 58 | /** @defgroup PVD_Exported_Macros PVD Exported Macros 59 | * @{ */ 60 | 61 | /** @brief PVD EXTI line number */ 62 | #define PVD_EXTI_LINE 16 63 | /** @} */ 64 | 65 | /** @defgroup PVD_Exported_Functions PVD Exported Functions 66 | * @{ */ 67 | 68 | /** 69 | * @brief Configures the voltage threshold monitoring by the Power Voltage Detector(PVD). 70 | * @param eLevel: the monitored voltage level 71 | * @param eReaction: system reaction upon crossing threshold 72 | */ 73 | __STATIC_INLINE void PVD_vInit(PWR_PVDLevelType eLevel, ReactionType eReaction) 74 | { 75 | EXTI_InitType xExti = { .Edge = EDGE_RISING }; 76 | xExti.Reaction = eReaction; 77 | 78 | /* Set PLS bits according to PVDLevel value */ 79 | PWR->CR2.b.PLS = eLevel; 80 | 81 | /* External interrupt line 16 Connected to the PVD EXTI Line */ 82 | EXTI_vInit(PVD_EXTI_LINE, &xExti); 83 | } 84 | 85 | /** 86 | * @brief Enables the Power Voltage Detector (PVD). 87 | */ 88 | __STATIC_INLINE void PVD_vStart(void) 89 | { 90 | PWR_REG_BIT(CR2,PVDE) = 1; 91 | } 92 | 93 | /** 94 | * @brief Disables the Power Voltage Detector (PVD). 95 | */ 96 | __STATIC_INLINE void PVD_vStop(void) 97 | { 98 | PWR_REG_BIT(CR2,PVDE) = 0; 99 | } 100 | 101 | /** 102 | * @brief Gets the pending flag for the PVD. 103 | * @return The PVD flag status 104 | */ 105 | __STATIC_INLINE FlagStatus PVD_eGetFlag(void) 106 | { 107 | return EXTI_eGetFlag(PVD_EXTI_LINE); 108 | } 109 | 110 | /** 111 | * @brief Clears the pending PVD flag. 112 | */ 113 | __STATIC_INLINE void PVD_vClearFlag(void) 114 | { 115 | EXTI_vClearFlag(PVD_EXTI_LINE); 116 | } 117 | 118 | /** @} */ 119 | 120 | /** @} */ 121 | 122 | #endif /* PWR_CR_PLS */ 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __XPD_PVD_H_ */ 129 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rtc.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers Real Time Clock Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_RTC_H_ 24 | #define __XPD_RTC_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | #define XPD_RTC_API 34 | #include 35 | #undef XPD_RTC_API 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* __XPD_RTC_H_ */ 42 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_syscfg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_syscfg.h 4 | * @author Benedek Kupper 5 | * @version 0.1 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers System Configuration Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef SYSCFG_REG_BIT 24 | 25 | #ifdef SYSCFG_BB 26 | #define SYSCFG_REG_BIT(REG_NAME, BIT_NAME) \ 27 | (SYSCFG_BB->REG_NAME.BIT_NAME) 28 | #else 29 | #define SYSCFG_REG_BIT(REG_NAME, BIT_NAME) \ 30 | (SYSCFG->REG_NAME.b.BIT_NAME) 31 | #endif /* SYSCFG_BB */ 32 | 33 | #define __MEM_RMP_FLASH 0 34 | #define __MEM_RMP_ROM 1 35 | #define __MEM_RMP_SRAM 3 36 | #define __MEM_RMP_FMC 2 37 | #define __MEM_RMP_QUADSPI 6 38 | /** 39 | * @brief Maps the selected memory also starting from 0 address 40 | * @param MEMORY: The system memory to map 41 | * @arg FLASH Main flash 42 | * @arg ROM System memory 43 | * @arg SRAM Embedded SRAM 44 | * @arg FMC FMC bank 1 (NOR/PSRAM 1 and 2) 45 | * @arg QUADSPI QUADSPI memory 46 | */ 47 | #define SYSTEM_MEMORY_REMAP(MEMORY) \ 48 | (SYSCFG->MEMRMP.b.MEM_MODE = __MEM_RMP_##MEMORY) 49 | 50 | #endif /* SYSCFG_REG_BIT */ 51 | 52 | -------------------------------------------------------------------------------- /STM32L4_XPD/inc/xpd_systick.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_systick.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers SysTick Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_SYSTICK_H_ 24 | #define __XPD_SYSTICK_H_ 25 | 26 | #ifdef __cplusplus 27 | extern "C" 28 | { 29 | #endif 30 | 31 | #include 32 | 33 | /** @defgroup SysTick 34 | * @{ */ 35 | 36 | /** @defgroup SysTick_Exported_Types SysTick Exported Types 37 | * @{ */ 38 | 39 | /** @brief SysTick clock source types */ 40 | typedef enum 41 | { 42 | SYSTICK_CLOCKSOURCE_HCLK_DIV8 = 0, /*!< SysTick clock source is HCLK divided by 8 */ 43 | SYSTICK_CLOCKSOURCE_HCLK = 1 /*!< SysTick clock source is HCLK */ 44 | }SysTick_ClockSourceType; 45 | 46 | /** @} */ 47 | 48 | /** @defgroup SysTick_Exported_Functions SysTick Exported Functions 49 | * @{ */ 50 | 51 | /** 52 | * @brief Configures the SysTick timer and interrupt generation 53 | * @param ClockSource: clock source of the timer 54 | * @param Period: the amount of timer counts until the counter reset 55 | * @return ERROR if the Period is too large to fit in the 24 bit register, 56 | * OK if successful 57 | */ 58 | __STATIC_INLINE XPD_ReturnType SysTick_eInit( 59 | SysTick_ClockSourceType eClockSource, 60 | uint32_t ulPeriod) 61 | { 62 | /* check against counter size (24 bits) */ 63 | if ((--ulPeriod) > SysTick_LOAD_RELOAD_Msk) 64 | { 65 | return XPD_ERROR; 66 | } 67 | else 68 | { 69 | /* set reload register */ 70 | SysTick->LOAD = ulPeriod; 71 | 72 | /* reset the SysTick Counter Value */ 73 | SysTick->VAL = 0; 74 | 75 | /* set clock source */ 76 | SysTick->CTRL.b.CLKSOURCE = eClockSource; 77 | 78 | return XPD_OK; 79 | } 80 | } 81 | 82 | /** 83 | * @brief Enables the SysTick timer 84 | */ 85 | __STATIC_INLINE void SysTick_vStart(void) 86 | { 87 | SysTick->CTRL.b.ENABLE = 1; 88 | } 89 | 90 | /** 91 | * @brief Disables the SysTick timer 92 | */ 93 | __STATIC_INLINE void SysTick_vStop(void) 94 | { 95 | SysTick->CTRL.b.ENABLE = 0; 96 | } 97 | 98 | /** 99 | * @brief Starts the SysTick timer with interrupt generation 100 | */ 101 | __STATIC_INLINE void SysTick_vStart_IT(void) 102 | { 103 | SysTick->VAL = 0; 104 | SET_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 105 | } 106 | 107 | /** 108 | * @brief Stops the SysTick timer with interrupt generation 109 | */ 110 | __STATIC_INLINE void SysTick_vStop_IT(void) 111 | { 112 | CLEAR_BIT(SysTick->CTRL.w, SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); 113 | } 114 | 115 | /** 116 | * @brief Enables the SysTick interrupt request 117 | */ 118 | __STATIC_INLINE void SysTick_IT_Enable(void) 119 | { 120 | SysTick->CTRL.b.TICKINT = 1; 121 | } 122 | 123 | /** 124 | * @brief Disables the SysTick interrupt request 125 | */ 126 | __STATIC_INLINE void SysTick_IT_Disable(void) 127 | { 128 | SysTick->CTRL.b.TICKINT = 0; 129 | } 130 | 131 | /** @} */ 132 | 133 | /** @} */ 134 | 135 | /** @} */ 136 | 137 | #ifdef __cplusplus 138 | } 139 | #endif 140 | 141 | #endif /* __XPD_SYSTICK_H_ */ 142 | -------------------------------------------------------------------------------- /STM32L4_XPD/src/xpd_rcc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_rcc.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers RCC Peripherals Module 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | 25 | /** @addtogroup RCC 26 | * @{ */ 27 | 28 | /** @addtogroup RCC_Peripheral_Control 29 | * @{ */ 30 | 31 | typedef union { 32 | struct { 33 | uint16_t bitIndex : 5; 34 | uint16_t regIndex : 11; 35 | }; 36 | uint16_t w; 37 | } rccPosType; 38 | 39 | #define PPOS ((rccPosType)ePeriphPos) 40 | 41 | /** @defgroup RCC_Peripheral_Control_Exported_Functions RCC Peripheral Control Exported Functions 42 | * @{ */ 43 | 44 | /** 45 | * @brief Enables the clock of the peripheral. 46 | * @param ePeriphPos: Relative position of the peripheral control bit 47 | * in the RCC register space 48 | */ 49 | void RCC_vClockEnable(RCC_PositionType ePeriphPos) 50 | { 51 | #ifdef RCC_BB 52 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHB1ENR.w); 53 | pulEN[ePeriphPos] = 1; 54 | 55 | /* Read back to ensure effect */ 56 | (void) pulEN[ePeriphPos]; 57 | #else 58 | __IO uint32_t *pulENR = &RCC->AHB1ENR.w + PPOS.regIndex; 59 | SET_BIT(*pulENR, 1 << PPOS.bitIndex); 60 | 61 | /* Read back to ensure effect */ 62 | (void) *pulENR; 63 | #endif 64 | } 65 | 66 | /** 67 | * @brief Disables the clock of the peripheral. 68 | * @param ePeriphPos: Relative position of the peripheral control bit 69 | * in the RCC register space 70 | */ 71 | void RCC_vClockDisable(RCC_PositionType ePeriphPos) 72 | { 73 | #ifdef RCC_BB 74 | __IO uint32_t *pulEN = PERIPH_BB(&RCC->AHB1ENR.w); 75 | pulEN[ePeriphPos] = 0; 76 | #else 77 | __IO uint32_t *pulENR = &RCC->AHB1ENR.w + PPOS.regIndex; 78 | CLEAR_BIT(*pulENR, 1 << PPOS.bitIndex); 79 | #endif 80 | } 81 | 82 | /** 83 | * @brief Enables the clock of the peripheral during sleep mode. 84 | * @param ePeriphPos: Relative position of the peripheral control bit 85 | * in the RCC register space 86 | */ 87 | void RCC_vSleepClockEnable(RCC_PositionType ePeriphPos) 88 | { 89 | #ifdef RCC_BB 90 | __IO uint32_t *pulSMEN = PERIPH_BB(&RCC->AHB1SMENR.w); 91 | pulSMEN[ePeriphPos] = 1; 92 | #else 93 | __IO uint32_t *pulSMENR = &RCC->AHB1SMENR.w + PPOS.regIndex; 94 | SET_BIT(*pulSMENR, 1 << PPOS.bitIndex); 95 | #endif 96 | } 97 | 98 | /** 99 | * @brief Disables the clock of the peripheral during sleep mode. 100 | * @param ePeriphPos: Relative position of the peripheral control bit 101 | * in the RCC register space 102 | */ 103 | void RCC_vSleepClockDisable(RCC_PositionType ePeriphPos) 104 | { 105 | #ifdef RCC_BB 106 | __IO uint32_t *pulSMEN = PERIPH_BB(&RCC->AHB1SMENR.w); 107 | pulSMEN[ePeriphPos] = 0; 108 | #else 109 | __IO uint32_t *pulSMENR = &RCC->AHB1SMENR.w + PPOS.regIndex; 110 | CLEAR_BIT(*pulSMENR, 1 << PPOS.bitIndex); 111 | #endif 112 | } 113 | 114 | /** 115 | * @brief Forces and releases a reset on the peripheral. 116 | * @param ePeriphPos: Relative position of the peripheral control bit 117 | * in the RCC register space 118 | */ 119 | void RCC_vReset(RCC_PositionType ePeriphPos) 120 | { 121 | #ifdef RCC_BB 122 | __IO uint32_t *pulRST = PERIPH_BB(&RCC->AHB1RSTR.w); 123 | pulRST[ePeriphPos] = 1; 124 | pulRST[ePeriphPos] = 0; 125 | #else 126 | __IO uint32_t *pulRSTR = &RCC->AHB1RSTR.w + PPOS.regIndex; 127 | SET_BIT (*pulRSTR, 1 << PPOS.bitIndex); 128 | CLEAR_BIT(*pulRSTR, 1 << PPOS.bitIndex); 129 | #endif 130 | } 131 | 132 | /** @} */ 133 | 134 | /** @} */ 135 | 136 | /** @} */ 137 | -------------------------------------------------------------------------------- /STM32L4_XPD/templates/system_stm32l4xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32l4xx.c 4 | * @author Benedek Kupper 5 | * @version 0.3 6 | * @date 2018-09-28 7 | * @brief STM32 eXtensible Peripheral Drivers template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #include 24 | #include 25 | #include 26 | #include 27 | 28 | /** @brief Global variable used to store the actual system clock frequency [Hz] */ 29 | uint32_t SystemCoreClock; 30 | 31 | /** @brief Interrupt vector table in startup_.s */ 32 | extern const uint32_t g_pfnVectors[]; 33 | 34 | /** 35 | * @brief Setup the microcontroller system. 36 | * Initialize the default HSI clock source, 37 | * vector table location 38 | * and the PLL configuration is reset. 39 | */ 40 | void SystemInit(void) 41 | { 42 | /* Reset all peripherals */ 43 | XPD_vDeinit(); 44 | 45 | /* Reset the RCC clock configuration to the default reset state 46 | * Sets SystemCoreClock value */ 47 | RCC_vDeinit(); 48 | 49 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 50 | /* FPU settings: if used, set CP10 and CP11 Full Access */ 51 | SCB->CPACR.b.CP10 = 3; 52 | SCB->CPACR.b.CP11 = 3; 53 | #endif 54 | 55 | /* initialize XPD services */ 56 | XPD_vInit(); 57 | 58 | /* TODO Redirect to interrupt vector table position */ 59 | SCB->VTOR.w = (uint32_t)g_pfnVectors; 60 | SYSTEM_MEMORY_REMAP(FLASH); 61 | 62 | /* TODO Configure system memory options */ 63 | FLASH_vPrefetchBuffer(ENABLE); 64 | 65 | FLASH_vInstCache(ENABLE); 66 | FLASH_vDataCache(ENABLE); 67 | } 68 | -------------------------------------------------------------------------------- /STM32L4_XPD/templates/xpd_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file xpd_config.h 4 | * @author Benedek Kupper 5 | * @version 0.2 6 | * @date 2018-01-28 7 | * @brief STM32 eXtensible Peripheral Drivers configuration template 8 | * 9 | * Copyright (c) 2018 Benedek Kupper 10 | * 11 | * Licensed under the Apache License, Version 2.0 (the "License"); 12 | * you may not use this file except in compliance with the License. 13 | * You may obtain a copy of the License at 14 | * 15 | * http://www.apache.org/licenses/LICENSE-2.0 16 | * 17 | * Unless required by applicable law or agreed to in writing, software 18 | * distributed under the License is distributed on an "AS IS" BASIS, 19 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 | * See the License for the specific language governing permissions and 21 | * limitations under the License. 22 | */ 23 | #ifndef __XPD_CONFIG_H_ 24 | #define __XPD_CONFIG_H_ 25 | 26 | /* TODO step 1: specify device header */ 27 | #include 28 | 29 | /* TODO step 2: enable desired used XPD modules error handling */ 30 | /* #define __XPD_DMA_ERROR_DETECT */ 31 | 32 | /* TODO step 3: specify power supplies */ 33 | #define VDD_VALUE_mV 3000 /* Value of VDD in mV */ 34 | #define VDDA_VALUE_mV 3000 /* Value of VDD Analog in mV */ 35 | 36 | /* TODO step 4: specify oscillator parameters */ 37 | /* #define HSE_VALUE_Hz 80000000 38 | * #define LSE_VALUE_Hz 32768 */ 39 | 40 | #endif /* __XPD_CONFIG_H_ */ 41 | -------------------------------------------------------------------------------- /_config.yml: -------------------------------------------------------------------------------- 1 | theme: jekyll-theme-midnight -------------------------------------------------------------------------------- /_layouts/default.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | {{ site.title | default: site.github.repository_name }} by {{ site.github.owner_name }} 7 | 8 | 9 | 10 | 13 | 16 | 17 | 18 | 19 | 20 | 31 | 32 |
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