├── README.md ├── backup ├── axi_dma_controller.v ├── axi_dma_ctl_tb.v ├── axi_slave.v └── top.v ├── backup2 ├── axi_dma_controller.v ├── axi_dma_ctl_tb.v ├── axi_slave.v └── top.v ├── project_AXI_DMA.cache ├── sim │ └── ssm.db └── wt │ ├── project.wpc │ └── xsim.wdf ├── project_AXI_DMA.hw └── project_AXI_DMA.lpr ├── project_AXI_DMA.ip_user_files └── README.txt ├── project_AXI_DMA.sim └── sim_1 │ └── behav │ └── xsim │ ├── compile.bat │ ├── dump.vcd │ ├── elaborate.bat │ ├── elaborate.log │ ├── glbl.v │ ├── simulate.bat │ ├── simulate.log │ ├── test.tcl │ ├── test_behav.wdb │ ├── test_vlog.prj │ ├── xelab.pb │ ├── xsim.dir │ ├── test_behav │ │ ├── Compile_Options.txt │ │ ├── TempBreakPointFile.txt │ │ ├── obj │ │ │ ├── xsim_0.win64.obj │ │ │ ├── xsim_1.c │ │ │ └── xsim_1.win64.obj │ │ ├── xsim.dbg │ │ ├── xsim.mem │ │ ├── xsim.reloc │ │ ├── xsim.rlx │ │ ├── xsim.rtti │ │ ├── xsim.svtype │ │ ├── xsim.type │ │ ├── xsim.xdbg │ │ ├── xsimSettings.ini │ │ ├── xsimcrash.log │ │ ├── xsimk.exe │ │ └── xsimkernel.log │ └── xil_defaultlib │ │ ├── axi_dma_controller.sdb │ │ ├── axi_slave.sdb │ │ ├── glbl.sdb │ │ ├── test.sdb │ │ ├── top.sdb │ │ └── xil_defaultlib.rlx │ ├── xsim.ini │ ├── xvlog.log │ └── xvlog.pb ├── project_AXI_DMA.srcs ├── sim_1 │ └── new │ │ └── axi_dma_ctl_tb.v └── sources_1 │ └── new │ ├── axi_dma_controller.v │ ├── axi_slave.v │ ├── ram.v │ └── top.v ├── project_AXI_DMA.xpr └── test_behav.wcfg /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/README.md -------------------------------------------------------------------------------- /backup/axi_dma_controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup/axi_dma_controller.v -------------------------------------------------------------------------------- /backup/axi_dma_ctl_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup/axi_dma_ctl_tb.v -------------------------------------------------------------------------------- /backup/axi_slave.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup/axi_slave.v -------------------------------------------------------------------------------- /backup/top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup/top.v -------------------------------------------------------------------------------- /backup2/axi_dma_controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup2/axi_dma_controller.v -------------------------------------------------------------------------------- /backup2/axi_dma_ctl_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup2/axi_dma_ctl_tb.v -------------------------------------------------------------------------------- /backup2/axi_slave.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup2/axi_slave.v -------------------------------------------------------------------------------- /backup2/top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/backup2/top.v -------------------------------------------------------------------------------- /project_AXI_DMA.cache/sim/ssm.db: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.cache/sim/ssm.db -------------------------------------------------------------------------------- /project_AXI_DMA.cache/wt/project.wpc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.cache/wt/project.wpc -------------------------------------------------------------------------------- /project_AXI_DMA.cache/wt/xsim.wdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.cache/wt/xsim.wdf -------------------------------------------------------------------------------- /project_AXI_DMA.hw/project_AXI_DMA.lpr: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.hw/project_AXI_DMA.lpr -------------------------------------------------------------------------------- /project_AXI_DMA.ip_user_files/README.txt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.ip_user_files/README.txt -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/compile.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/compile.bat -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/dump.vcd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/dump.vcd -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/elaborate.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/elaborate.bat -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/elaborate.log: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/elaborate.log -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/glbl.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/glbl.v -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/simulate.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/simulate.bat -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/simulate.log: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/test.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/test.tcl -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/test_behav.wdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/test_behav.wdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/test_vlog.prj: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/test_vlog.prj -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xelab.pb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xelab.pb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/Compile_Options.txt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/Compile_Options.txt -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/TempBreakPointFile.txt: -------------------------------------------------------------------------------- 1 | Breakpoint File Version 1.0 2 | -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_0.win64.obj: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_0.win64.obj -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_1.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_1.c -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_1.win64.obj: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/obj/xsim_1.win64.obj -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.dbg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.dbg -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.mem: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.mem -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.reloc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.reloc -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.rlx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.rlx -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.rtti: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.rtti -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.svtype: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.svtype -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.type: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.type -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.xdbg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsim.xdbg -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimSettings.ini: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimSettings.ini -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimcrash.log: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimk.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimk.exe -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimkernel.log: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/test_behav/xsimkernel.log -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/axi_dma_controller.sdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/axi_dma_controller.sdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/axi_slave.sdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/axi_slave.sdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/glbl.sdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/test.sdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/test.sdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/top.sdb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/top.sdb -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xsim.ini: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xsim.ini -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xvlog.log: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xvlog.log -------------------------------------------------------------------------------- /project_AXI_DMA.sim/sim_1/behav/xsim/xvlog.pb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.sim/sim_1/behav/xsim/xvlog.pb -------------------------------------------------------------------------------- /project_AXI_DMA.srcs/sim_1/new/axi_dma_ctl_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.srcs/sim_1/new/axi_dma_ctl_tb.v -------------------------------------------------------------------------------- /project_AXI_DMA.srcs/sources_1/new/axi_dma_controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.srcs/sources_1/new/axi_dma_controller.v -------------------------------------------------------------------------------- /project_AXI_DMA.srcs/sources_1/new/axi_slave.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.srcs/sources_1/new/axi_slave.v -------------------------------------------------------------------------------- /project_AXI_DMA.srcs/sources_1/new/ram.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.srcs/sources_1/new/ram.v -------------------------------------------------------------------------------- /project_AXI_DMA.srcs/sources_1/new/top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.srcs/sources_1/new/top.v -------------------------------------------------------------------------------- /project_AXI_DMA.xpr: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/project_AXI_DMA.xpr -------------------------------------------------------------------------------- /test_behav.wcfg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Jefferyy-Peng/AXI_DMA_CONTROLLER/HEAD/test_behav.wcfg --------------------------------------------------------------------------------