├── .gitignore ├── alloy ├── RunCommandLine$1.class ├── RunCommandLine.class ├── tests │ ├── races.test │ ├── noncohrmwfail.test │ ├── ssw2.test │ ├── ssw3.test │ ├── privpo.test │ ├── cbarinst.test │ ├── noncohcoww.test │ ├── ssw0.test │ ├── noncohandatom.test │ ├── mpnotinscope2.test │ ├── ssw6.test │ ├── mp.test │ ├── mpinscope1.test │ ├── noncohrmw.test │ ├── ssw1.test │ ├── atomicsc.test │ ├── mpsc1.test │ ├── mpinscope2.test │ ├── noncohmp.test │ ├── ssw4.test │ ├── mpnotinscope1.test │ ├── test14.test │ ├── mpinscope3.test │ ├── mpnotinscope3.test │ ├── qfmp.test │ ├── test16.test │ ├── test11.test │ ├── test17.test │ ├── noncohmp2.test │ ├── test12.test │ ├── fencefence.test │ ├── noncohmpbarsg.test │ ├── qfmpscopedev.test │ ├── test18.test │ ├── ssw8.test │ ├── privmp.test │ ├── ssw7.test │ ├── fencefence2.test │ ├── noncohmp3.test │ ├── privwar.test │ ├── ssw5.test │ ├── fencefencebroken.test │ ├── noncohmpbar.test │ ├── noncohmpfail2.test │ ├── mpinscope4.test │ ├── noncohwar.test │ ├── mpnotinscope4.test │ ├── test0.test │ ├── mpinscope5.test │ ├── noncohmpfail.test │ ├── test1.test │ ├── test21.test │ ├── mpnotinscope5.test │ ├── mpnotinscope6.test │ ├── coww.test │ ├── test20.test │ ├── scopeaccum.test │ ├── qfmpfail.test │ ├── samethread.test │ ├── test9.test │ ├── releaseseq2.test │ ├── mp3.test │ ├── test3.test │ ├── asmo.test │ ├── releaseseq1.test │ ├── test2.test │ ├── cowr.test │ ├── samethread2.test │ ├── test19.test │ ├── mp3acqrel.test │ ├── fencefence3.test │ ├── test13.test │ ├── releaseseq3.test │ ├── test6.test │ ├── corw.test │ ├── scnottransitive.test │ ├── test10.test │ ├── releaseseq4.test │ ├── test7.test │ ├── test5.test │ ├── atomwrongsc.test │ ├── test4.test │ ├── corr.test │ ├── waw.test │ ├── mp3transitive3.test │ ├── mp3transitive.test │ ├── mp3transitivefail.test │ ├── mp3transitivefail2.test │ ├── mp3transitive2.test │ └── mp3transitive4.test ├── Makefile ├── RunCommandLine.java ├── spirv.als └── litmus.cpp ├── CODE_OF_CONDUCT.md ├── .gitattributes ├── README.md └── COPYING.md /.gitignore: -------------------------------------------------------------------------------- 1 | tags 2 | build/ 3 | out 4 | *.swp 5 | .DS_Store 6 | -------------------------------------------------------------------------------- /alloy/RunCommandLine$1.class: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/KhronosGroup/Vulkan-MemoryModel/HEAD/alloy/RunCommandLine$1.class -------------------------------------------------------------------------------- /alloy/RunCommandLine.class: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/KhronosGroup/Vulkan-MemoryModel/HEAD/alloy/RunCommandLine.class -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | A reminder that this issue tracker is managed by the Khronos Group. Interactions here should follow the Khronos Code of Conduct (https://www.khronos.org/developers/code-of-conduct), which prohibits aggressive or derogatory language. Please keep the discussion friendly and civil. 2 | -------------------------------------------------------------------------------- /alloy/tests/races.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2025 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.sc0 x = 1 9 | st.sc0 x = 2 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | st.sc0 x = 3 14 | st.sc0 x = 4 15 | SATISFIABLE consistent[X] && #dr>0 -------------------------------------------------------------------------------- /alloy/tests/noncohrmwfail.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopewg.sc0 x = 1 9 | cbar.acq.rel.scopewg.semsc0 0 10 | rmw.scopewg.sc0 x = 1 2 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | rmw.scopewg.sc0 x = 1 2 15 | NOSOLUTION consistent[X] -------------------------------------------------------------------------------- /alloy/tests/ssw2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails because no availability/visibility 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | st.sc0 x = 1 10 | NEWSG 11 | NEWTHREAD 1 12 | ld.sc0 x 13 | SSW 0 1 14 | NOSOLUTION consistent[X] && #dr=0 15 | SATISFIABLE consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/ssw3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes, SSW between W+AV -> VIS+R 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | st.av.scopedev.sc0 x = 1 10 | NEWSG 11 | NEWTHREAD 1 12 | ld.vis.scopedev.sc0 x 13 | SSW 0 1 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/privpo.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass: private memory accesses still obey program-order 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | ld.sc0 x = 0 10 | st.sc0 x = 1 11 | ld.sc0 x = 1 12 | st.nonpriv.sc0 x = 2 13 | SATISFIABLE consistent[X] && #dr=0 14 | NOSOLUTION consistent[X] && #dr>0 15 | -------------------------------------------------------------------------------- /alloy/tests/cbarinst.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | cbar.scopewg 1 9 | cbar.scopewg 2 10 | cbar.scopewg 3 11 | NEWSG 12 | NEWTHREAD 13 | cbar.scopewg 1 14 | cbar.scopewg 2 15 | cbar.scopewg 3 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/noncohcoww.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // CoWW litmus test with mixed atomic and non-atomic accesses. 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopewg.sc0 x = 1 10 | st.atom.scopewg.sc0 x = 2 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.scopewg.sc0 x = 2 14 | ld.vis.scopewg.sc0 x = 1 15 | NOSOLUTION consistent[X] -------------------------------------------------------------------------------- /alloy/tests/ssw0.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 0 8 | st.sc0 x = 1 9 | NEWSG 10 | NEWTHREAD 1 11 | avdevice 12 | visdevice 13 | NEWSG 14 | NEWTHREAD 2 15 | ld.sc0 x 16 | SSW 0 1 17 | SSW 1 2 18 | SATISFIABLE consistent[X] && #dr=0 19 | NOSOLUTION consistent[X] && #dr>0 20 | -------------------------------------------------------------------------------- /alloy/tests/noncohandatom.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Mixing atomics and noncoherent/private load/store in the same thread 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.nonpriv.sc0 y = 1 10 | rmw.scopewg.sc0 y = 1 2 11 | ld.sc0 y = 2 12 | SATISFIABLE consistent[X] && #dr=0 13 | NOSOLUTION consistent[X] && #dr>0 14 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopewg.sc0.semsc0 x = 1 9 | st.atom.rel.scopedev.sc0.semsc0 y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 14 | ld.atom.acq.scopewg.sc0.semsc0 x = 0 15 | SATISFIABLE consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/ssw6.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass: write-after-read hazard of private memory accesses with SSW in between 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | ld.sc0 x 10 | NEWSG 11 | NEWTHREAD 1 12 | st.sc0 x = 1 13 | SSW 0 1 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/mp.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | st.atom.rel.scopewg.sc0.semsc0 y = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.scopewg.sc0.semsc0 y = 1 13 | ld.vis.scopedev.sc0 x 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/mpinscope1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopedev.sc0.semsc0 x = 1 9 | st.atom.rel.scopedev.sc0.semsc0 y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 14 | ld.atom.acq.scopedev.sc0.semsc0 x = 0 15 | NOSOLUTION consistent[X] 16 | -------------------------------------------------------------------------------- /alloy/tests/noncohrmw.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopewg.sc0 x = 1 9 | cbar.acq.rel.scopewg.semsc0 0 10 | rmw.scopewg.sc0 x = 2 3 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | rmw.scopewg.sc0 x = 1 2 15 | SATISFIABLE consistent[X] && #dr=0 16 | NOSOLUTION consistent[X] && #dr>0 -------------------------------------------------------------------------------- /alloy/tests/ssw1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 0 8 | st.sc0 x = 1 9 | NEWSG 10 | NEWTHREAD 1 11 | avdevice 12 | visdevice 13 | NEWSG 14 | NEWTHREAD 2 15 | ld.sc1 y 16 | SSW 0 1 17 | SSW 1 2 18 | SLOC x y 19 | SATISFIABLE consistent[X] && #dr=0 20 | NOSOLUTION consistent[X] && #dr>0 21 | -------------------------------------------------------------------------------- /alloy/tests/atomicsc.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | st.atom.rel.scopewg.sc1.semsc0 y = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.scopewg.sc1.semsc0 y = 1 13 | ld.vis.scopedev.sc0 x 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/mpsc1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc1 x = 1 9 | st.atom.rel.scopewg.sc1.semsc1 y = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.scopewg.sc1.semsc1 y = 1 13 | ld.vis.scopedev.sc1 x 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/mpinscope2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopedev.sc0.semsc0 x = 1 9 | st.atom.rel.scopedev.sc0.semsc1 y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc1 y = 1 14 | ld.atom.acq.scopedev.sc0.semsc0 x = 0 15 | SATISFIABLE consistent[X] && #dr=0 16 | -------------------------------------------------------------------------------- /alloy/tests/noncohmp.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.nonpriv.sc0 x = 1 9 | st.atom.rel.semav.scopewg.sc0.semsc0 y = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.semvis.scopewg.sc0.semsc0 y = 1 13 | ld.nonpriv.sc0 x 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/ssw4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails, needs av/visDEVICE for different references 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | st.av.scopedev.sc0 x = 1 10 | NEWSG 11 | NEWTHREAD 1 12 | ld.vis.scopedev.sc1 y 13 | SSW 0 1 14 | SLOC x y 15 | NOSOLUTION consistent[X] && #dr=0 16 | SATISFIABLE consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopewg.sc0.semsc0 x = 1 9 | st.atom.rel.scopedev.sc0.semsc0.semav y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc0.semvis y = 1 14 | ld.atom.acq.scopewg.sc0.semsc0 x = 0 15 | NOSOLUTION consistent[X] 16 | -------------------------------------------------------------------------------- /alloy/tests/test14.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | st.atom.rel.scopewg.sc1.semsc0 b = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopewg.sc1.semsc0 b = 1 14 | ld.vis.scopedev.sc0 a 15 | SATISFIABLE consistent[X] && #dr=0 16 | NOSOLUTION consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/mpinscope3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopedev.sc0.semsc0.semav x = 1 9 | st.atom.rel.scopedev.sc0.semsc1 y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc1 y = 1 14 | ld.atom.acq.scopedev.sc0.semsc0.semvis x = 0 15 | SATISFIABLE consistent[X] && #dr=0 16 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopewg.sc0.semsc0.semav x = 1 9 | st.atom.rel.scopedev.sc0.semsc0 y = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 14 | ld.atom.acq.scopewg.sc0.semsc0.semvis x = 0 15 | SATISFIABLE consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/qfmp.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWQF 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopeqf.sc0 x = 1 10 | st.atom.rel.scopeqf.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopeqf.sc0.semsc0 y = 1 15 | ld.vis.scopeqf.sc0 x 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/test16.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails because there is no availability operation from the atomic 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.scopewg.sc0 a = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.scopewg.sc0 a = 1 13 | ld.vis.scopedev.sc0 a 14 | NOSOLUTION consistent[X] && #dr=0 15 | SATISFIABLE consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/test11.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | ld.vis.scopedev.sc0 a 10 | cbar.acq.rel.scopewg.semsc0.semsc1 0 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0.semsc1 0 14 | st.av.scopedev.sc1 b = 1 15 | SLOC a b 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/test17.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes because the atomic store is implicitly coherent 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.rel.scopewg.sc0.semsc0 a = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.scopewg.sc0.semsc0 a = 1 13 | ld.vis.scopewg.sc0 a 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/noncohmp2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.nonpriv.sc0 x = 1 9 | st.nonpriv.sc0 x = 2 10 | st.atom.rel.semav.scopewg.sc0.semsc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.semvis.scopewg.sc0.semsc0 y = 1 14 | ld.nonpriv.sc0 x = 2 15 | SATISFIABLE consistent[X] && #dr=0 16 | NOSOLUTION consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/test12.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | membar.rel.scopewg.semsc0 11 | cbar.scopewg 0 12 | NEWSG 13 | NEWTHREAD 14 | cbar.scopewg 0 15 | membar.acq.scopewg.semsc0 16 | ld.vis.scopedev.sc0 a 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/fencefence.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | membar.rel.scopewg.semsc0 10 | st.atom.scopewg.sc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.scopewg.sc0 y = 1 14 | membar.acq.scopewg.semsc0 15 | ld.vis.scopedev.sc0 x 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/noncohmpbarsg.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Tests subgroup-scope control barrier 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.nonpriv.sc0 x = 1 10 | cbar.acq.rel.scopesg.semvis.semav.semsc0 0 11 | NEWTHREAD 12 | cbar.acq.rel.scopesg.semvis.semav.semsc0 0 13 | ld.nonpriv.sc0 x 14 | SATISFIABLE consistent[X] && #dr=0 15 | NOSOLUTION consistent[X] && #dr>0 16 | -------------------------------------------------------------------------------- /alloy/tests/qfmpscopedev.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWQF 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWQF 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 16 | ld.vis.scopedev.sc0 x 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/test18.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes because the atomic store is implicitly coherent 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.rel.scopedev.sc0.semsc0 a = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopedev.sc0.semsc0 a = 1 14 | ld.vis.scopedev.sc0 a 15 | SATISFIABLE consistent[X] && #dr=0 16 | NOSOLUTION consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/ssw8.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes, SSW between W+AV -> VIS+R 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | st.nonpriv.sc0 x = 1 10 | membar.rel.semav.scopeqf.semsc0 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 1 14 | membar.acq.semvis.scopeqf.semsc0 15 | ld.nonpriv.sc0 x 16 | SSW 0 1 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/privmp.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fail: private variables can't be used for message passing 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.sc0 x = 1 10 | st.atom.rel.semav.scopewg.sc0.semsc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.semvis.scopewg.sc0.semsc0 y = 1 14 | ld.sc0 x 15 | NOSOLUTION consistent[X] && #dr=0 16 | SATISFIABLE consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/ssw7.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass: write-after-read hazard of private memory accesses with SSW.SSW in between 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 0 9 | ld.sc0 x 10 | NEWSG 11 | NEWTHREAD 1 12 | ld.sc0 y = 0 13 | NEWSG 14 | NEWTHREAD 2 15 | st.sc0 x = 1 16 | SSW 0 1 17 | SSW 1 2 18 | SATISFIABLE consistent[X] && #dr=0 19 | NOSOLUTION consistent[X] && #dr>0 20 | -------------------------------------------------------------------------------- /alloy/tests/fencefence2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | membar.rel.scopewg.semsc0.semsc1 10 | st.atom.scopewg.sc1 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.scopewg.sc1 y = 1 14 | membar.acq.scopewg.semsc0.semsc1 15 | ld.vis.scopedev.sc0 x 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/noncohmp3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.nonpriv.sc0 x = 1 9 | st.av.scopedev.sc0 x = 2 10 | st.atom.rel.scopewg.sc0.semsc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopewg.sc0.semsc0 y = 1 14 | ld.vis.scopedev.sc0 x = 2 15 | ld.nonpriv.sc0 x = 2 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/privwar.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fail: private variables require SSW for write-after-read hazard 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | ld.sc0 x 10 | st.atom.rel.semav.scopewg.sc0.semsc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.semvis.scopewg.sc0.semsc0 y = 1 14 | st.sc0 x = 1 15 | NOSOLUTION consistent[X] && #dr=0 16 | SATISFIABLE consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/ssw5.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 0 8 | st.sc0 x = 1 9 | // dummy store 10 | st.sc1 y = 1 11 | NEWSG 12 | NEWTHREAD 1 13 | avdevice 14 | visdevice 15 | NEWSG 16 | NEWTHREAD 2 17 | // dummy store 18 | st.sc1 z = 1 19 | ld.sc0 x 20 | SSW 0 1 21 | SSW 1 2 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | -------------------------------------------------------------------------------- /alloy/tests/fencefencebroken.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | membar.rel.scopewg.semsc0 10 | st.atom.scopedev.sc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.scopedev.sc0 y = 1 15 | membar.acq.scopewg.semsc0 16 | ld.vis.scopedev.sc0 x 17 | NOSOLUTION consistent[X] && #dr=0 18 | SATISFIABLE consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/noncohmpbar.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.nonpriv.sc0 x = 1 9 | membar.rel.scopedev.semav.semsc0 10 | st.atom.scopedev.sc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.scopedev.sc0 y = 1 15 | membar.acq.scopedev.semvis.semsc0 16 | ld.nonpriv.sc0 x 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/noncohmpfail2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // fails due to wrong semsc on the release 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.nonpriv.sc0 x = 1 10 | st.atom.rel.scopewg.semav.sc0.semsc1 z = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopewg.semvis.sc0.semsc0 z = 1 14 | ld.nonpriv.sc0 x = 1 15 | NOSOLUTION consistent[X] && #dr=0 16 | SATISFIABLE consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/mpinscope4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopedev.sc0.semsc0 x = 1 9 | membar.rel.scopedev.semsc0.semav 10 | st.atom.rel.scopedev.sc0.semsc1 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc1 y = 1 15 | membar.acq.scopedev.semsc0.semvis 16 | ld.atom.acq.scopedev.sc0.semsc0 x = 0 17 | NOSOLUTION consistent[X] -------------------------------------------------------------------------------- /alloy/tests/noncohwar.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass: write-after-read hazard for noncoherent nonprivate 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | ld.nonpriv.sc0 x 10 | st.atom.rel.semav.scopewg.sc0.semsc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.semvis.scopewg.sc0.semsc0 y = 1 14 | st.nonpriv.sc0 x = 1 15 | SATISFIABLE consistent[X] && #dr=0 16 | NOSOLUTION consistent[X] && #dr>0 17 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopewg.sc0.semsc0 x = 1 9 | membar.rel.scopedev.semsc0.semav 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 15 | membar.acq.scopedev.semsc0.semvis 16 | ld.atom.acq.scopewg.sc0.semsc0 x = 0 17 | NOSOLUTION consistent[X] 18 | -------------------------------------------------------------------------------- /alloy/tests/test0.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails: Release is missing sc0 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | st.av.scopedev.sc1 b = 1 11 | st.atom.rel.scopewg.sc1.semsc1 c = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 c = 1 15 | ld.vis.scopedev.sc0 a 16 | NOSOLUTION consistent[X] && #dr=0 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/mpinscope5.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | membar.rel.scopedev.semsc0.semav 9 | st.atom.rel.scopedev.sc0.semsc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc1 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc1 y = 1 15 | ld.atom.acq.scopedev.sc0.semsc0 x = 0 16 | membar.acq.scopedev.semsc0.semvis 17 | SATISFIABLE consistent[X] && #dr=0 -------------------------------------------------------------------------------- /alloy/tests/noncohmpfail.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // coh on y does not make x available 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.nonpriv.sc0 x = 1 10 | st.av.scopedev.sc0 y = 1 11 | st.atom.rel.scopewg.sc0.semsc0 z = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc0.semsc0 z = 1 15 | ld.vis.scopedev.sc0 x = 1 16 | NOSOLUTION consistent[X] && #dr=0 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/test1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails: Acquire is missing sc0 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | st.atom.rel.scopewg.sc1.semsc0 b = 1 11 | st.atom.rel.scopewg.sc0.semsc1 c = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc0.semsc1 c = 1 15 | ld.vis.scopedev.sc0 a 16 | NOSOLUTION consistent[X] && #dr=0 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/test21.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails because the scope of the av/vis ops aren't big enough 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopewg.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 15 | ld.vis.scopewg.sc0 x 16 | NOSOLUTION consistent[X] && #dr=0 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope5.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | membar.rel.scopewg.semsc0.semav 9 | st.atom.rel.scopewg.sc0.semsc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 15 | ld.atom.acq.scopewg.sc0.semsc0 x = 0 16 | membar.acq.scopewg.semsc0.semvis 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/mpnotinscope6.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.atom.rel.scopewg.sc0.semsc0 x = 1 9 | membar.rel.scopewg.semsc0.semav 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 15 | membar.acq.scopewg.semsc0.semvis 16 | ld.atom.acq.scopewg.sc0.semsc0 x = 0 17 | SATISFIABLE consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/coww.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // CoWW litmus test. Coherence order for x is 2,1, and is "enforced" by the 6 | // second invocation observing it. Invocation 0 stores 1,2. 7 | NEWWG 8 | NEWSG 9 | NEWTHREAD 10 | st.atom.scopedev.sc0 x = 1 11 | st.atom.scopedev.sc0 x = 2 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | ld.atom.scopedev.sc0 x = 2 16 | ld.atom.scopedev.sc0 x = 1 17 | NOSOLUTION consistent[X] 18 | -------------------------------------------------------------------------------- /alloy/tests/test20.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes because the second atomic performs an av op on the first atomic 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.scopedev.sc0 a = 1 10 | st.atom.rel.scopedev.semav.sc0.semsc0 b = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 b = 1 15 | ld.vis.scopedev.sc0 a 16 | SATISFIABLE consistent[X] && #dr=0 17 | NOSOLUTION consistent[X] && #dr>0 18 | -------------------------------------------------------------------------------- /alloy/tests/scopeaccum.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | cbar.scopewg.semsc0.rel.acq 1 10 | NEWSG 11 | NEWTHREAD 12 | cbar.scopewg.semsc0.rel.acq 1 13 | cbar.scopedev.semsc0.rel.acq 2 14 | NEWWG 15 | NEWSG 16 | NEWTHREAD 17 | cbar.scopedev.semsc0.rel.acq 2 18 | ld.vis.scopedev.sc0 x 19 | SATISFIABLE consistent[X] && #dr=0 20 | NOSOLUTION consistent[X] && #dr>0 21 | -------------------------------------------------------------------------------- /alloy/tests/qfmpfail.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails because it uses queuefamily scope but different queue families 6 | NEWQF 7 | NEWWG 8 | NEWSG 9 | NEWTHREAD 10 | st.av.scopeqf.sc0 x = 1 11 | st.atom.rel.scopeqf.sc0.semsc0 y = 1 12 | NEWQF 13 | NEWWG 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.acq.scopeqf.sc0.semsc0 y = 1 17 | ld.vis.scopeqf.sc0 x 18 | NOSOLUTION consistent[X] && #dr=0 19 | SATISFIABLE consistent[X] && #dr>0 20 | -------------------------------------------------------------------------------- /alloy/tests/samethread.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | st.atom.rel.scopewg.sc0.semsc0 y = 1 10 | ld.atom.acq.scopewg.sc0.semsc0 z = 1 11 | ld.vis.scopedev.sc0 x = 2 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc0.semsc0 y = 1 15 | st.av.scopedev.sc0 x = 2 16 | st.atom.rel.scopewg.sc0.semsc0 z = 1 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/test9.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | cbar.acq.rel.scopewg.semsc0 0 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | st.atom.rel.scopedev.sc1.semsc0 b = 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc1.semsc0 b = 1 19 | ld.vis.scopedev.sc0 a 20 | SATISFIABLE consistent[X] && #dr=0 21 | NOSOLUTION consistent[X] && #dr>0 22 | -------------------------------------------------------------------------------- /alloy/tests/releaseseq2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Exercise release sequence. RMW in another thread reads the atomic before store in the same thread 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.rel.scopewg.sc0.semsc0 y = 1 10 | st.atom.scopewg.sc0 y = 3 11 | NEWSG 12 | NEWTHREAD 13 | rmw.scopewg.sc0 y = 1 2 14 | SATISFIABLE consistent[X] && #dr=0 15 | // the release and the RMW are in the release sequence 16 | SATISFIABLE consistent[X] && (#rs=2) 17 | -------------------------------------------------------------------------------- /alloy/tests/mp3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | st.atom.rel.scopewg.sc1.semsc0.semsc1 y = 1 10 | NEWSG 11 | NEWTHREAD 12 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 y = 1 13 | st.atom.rel.scopewg.sc1.semsc0.semsc1 z = 1 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 z = 1 17 | ld.vis.scopedev.sc0 x 18 | SATISFIABLE consistent[X] && #dr=0 19 | NOSOLUTION consistent[X] && #dr>0 20 | -------------------------------------------------------------------------------- /alloy/tests/test3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | membar.rel.scopedev.semsc0 11 | st.atom.scopewg.sc0 b = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc0.semsc0 b = 1 15 | st.atom.rel.scopedev.sc0.semsc0 c = 1 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopedev.sc0.semsc0 c = 1 20 | ld.vis.scopedev.sc0 a 21 | SATISFIABLE consistent[X] && #dr=0 22 | NOSOLUTION consistent[X] && #dr>0 23 | -------------------------------------------------------------------------------- /alloy/tests/asmo.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Test that threads 3 and 4 can't read updates to x in conflicting order 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.scopedev.sc0 x = 1 10 | NEWWG 11 | NEWSG 12 | NEWTHREAD 13 | st.atom.scopedev.sc0 x = 2 14 | NEWWG 15 | NEWSG 16 | NEWTHREAD 17 | ld.atom.scopedev.sc0 x = 1 18 | ld.atom.scopedev.sc0 x = 2 19 | NEWWG 20 | NEWSG 21 | NEWTHREAD 22 | ld.atom.scopedev.sc0 x = 2 23 | ld.atom.scopedev.sc0 x = 1 24 | NOSOLUTION consistent[X] -------------------------------------------------------------------------------- /alloy/tests/releaseseq1.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Exercise release sequence. Store in the same thread writes before the RMW in another thread. 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.atom.rel.scopewg.sc0.semsc0 y = 1 10 | st.atom.scopewg.sc0 y = 2 11 | NEWSG 12 | NEWTHREAD 13 | st.ld.atom.scopewg.sc0 y = 2 3 14 | SATISFIABLE consistent[X] && #dr=0 15 | // With simplified release sequences, only the release itself is in the release sequence 16 | NOSOLUTION consistent[X] && (#rs>1) 17 | -------------------------------------------------------------------------------- /alloy/tests/test2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails: Acquire is missing sc0 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | st.atom.rel.scopewg.sc1.semsc0 b = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 b = 1 14 | st.atom.rel.scopedev.sc1.semsc1 c = 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc1.semsc1 c = 1 19 | ld.vis.scopedev.sc0 a 20 | NOSOLUTION consistent[X] && #dr=0 21 | SATISFIABLE consistent[X] && #dr>0 22 | -------------------------------------------------------------------------------- /.gitattributes: -------------------------------------------------------------------------------- 1 | # test files have a mix of lf/crlf, and that's a good thing, for testing, don't mess with it 2 | # bash scripts need lines ending with lf, and that's correct for Windows too, e.g., under Cygwin 3 | # (scripts often don't have a suffix) 4 | * -text 5 | *.sh text eof=lf 6 | 7 | # txt files should be native and normalized 8 | *.txt text 9 | 10 | # source code can be native and normalized, but simpler if lf everywhere 11 | *.asciidoc text eof=lf 12 | *.html text eof=lf 13 | *.xml text eof=lf 14 | *.h text eof=lf 15 | *.hpp text eof=lf 16 | *.hpp11 text eof=lf 17 | *.json text eof=lf 18 | *.lua text eof=lf 19 | *.py text eof=lf 20 | *.c text eof=lf 21 | *.cpp text eof=lf 22 | -------------------------------------------------------------------------------- /alloy/tests/cowr.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // CoWR litmus test. Coherence order for x is 2,1, and is "enforced" by the 6 | // third invocation observing it. Invocation 0 can't see 2 after it stores 1. 7 | NEWWG 8 | NEWSG 9 | NEWTHREAD 10 | st.atom.scopedev.sc0 x = 1 11 | ld.atom.scopedev.sc0 x = 2 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | st.atom.scopedev.sc0 x = 2 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.scopedev.sc0 x = 2 20 | ld.atom.scopedev.sc0 x = 1 21 | NOSOLUTION consistent[X] 22 | -------------------------------------------------------------------------------- /alloy/tests/samethread2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Stores to x in the first thread can't be coalesced 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | ld.atom.acq.scopedev.sc0.semsc0 y = 2 12 | st.av.scopedev.sc0 x = 3 13 | NEWWG 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 17 | st.av.scopedev.sc0 x = 2 18 | st.atom.rel.scopedev.sc0.semsc0 y = 2 19 | SATISFIABLE consistent[X] && #dr=0 20 | NOSOLUTION #dr>0 21 | -------------------------------------------------------------------------------- /alloy/tests/test19.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Passes because the atomic store is implicitly coherent 6 | // NOTE: This test was more interesting as a negative test 7 | // showing that the semav did not 'flush' the atomic write. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | st.atom.rel.scopedev.semav.sc0.semsc0 a = 1 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | ld.atom.acq.scopedev.sc0.semsc0 a = 1 16 | ld.vis.scopedev.sc0 a 17 | SATISFIABLE consistent[X] && #dr=0 18 | NOSOLUTION consistent[X] && #dr>0 19 | -------------------------------------------------------------------------------- /alloy/tests/mp3acqrel.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Message passing between three threads where the second thread uses AcquireRelease 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | rmw.acq.rel.scopedev.sc0.semsc0 y = 1 2 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc0.semsc0 y = 2 19 | ld.vis.scopedev.sc0 x 20 | SATISFIABLE consistent[X] && #dr=0 21 | NOSOLUTION consistent[X] && #dr>0 22 | -------------------------------------------------------------------------------- /alloy/tests/fencefence3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | NEWWG 6 | NEWSG 7 | NEWTHREAD 8 | st.av.scopedev.sc0 x = 1 9 | membar.rel.scopewg.semsc0 10 | st.atom.scopewg.sc0 y = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.scopewg.sc0 y = 1 14 | membar.acq.scopewg.semsc0 15 | membar.rel.scopewg.semsc0 16 | st.atom.scopewg.sc0 z = 1 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.scopewg.sc0 z = 1 20 | membar.acq.scopewg.semsc0 21 | ld.vis.scopedev.sc0 x 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | -------------------------------------------------------------------------------- /alloy/tests/test13.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | membar.rel.scopewg.semsc0.semsc1 11 | st.atom.scopewg.sc1 b = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc1.semsc0 b = 1 15 | st.atom.rel.scopedev.sc0.semsc0 c = 1 16 | membar.acq.scopewg.semsc0 17 | NEWWG 18 | NEWSG 19 | NEWTHREAD 20 | ld.atom.acq.scopedev.sc0.semsc0 c = 1 21 | ld.vis.scopedev.sc0 a 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | -------------------------------------------------------------------------------- /alloy/tests/releaseseq3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Exercise release sequence. The RMW in the second thread is in the release sequence of the atomic release 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | rmw.scopedev.sc0 y = 1 2 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc0.semsc0 y = 2 19 | ld.vis.scopedev.sc0 x 20 | SATISFIABLE consistent[X] && #dr=0 21 | NOSOLUTION consistent[X] && #dr>0 22 | -------------------------------------------------------------------------------- /alloy/tests/test6.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | cbar.acq.rel.scopewg.semsc0 0 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | cbar.acq.rel.scopedev.semsc0 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | cbar.acq.rel.scopedev.semsc0 1 19 | cbar.acq.rel.scopewg.semsc0 2 20 | NEWSG 21 | NEWTHREAD 22 | cbar.acq.rel.scopewg.semsc0 2 23 | ld.vis.scopedev.sc0 a 24 | SATISFIABLE consistent[X] && #dr=0 25 | NOSOLUTION consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/corw.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // CoRW litmus test. Coherence order for x is 1,2, and is "enforced" by the 6 | // third invocation observing it. Invocation 0 reads x=2 before it writes 7 | // x=1, which is forbidden. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | ld.atom.scopedev.sc0 x = 2 12 | st.atom.scopedev.sc0 x = 1 13 | NEWWG 14 | NEWSG 15 | NEWTHREAD 16 | st.atom.scopedev.sc0 x = 2 17 | NEWWG 18 | NEWSG 19 | NEWTHREAD 20 | ld.atom.scopedev.sc0 x = 1 21 | ld.atom.scopedev.sc0 x = 2 22 | NOSOLUTION consistent[X] 23 | -------------------------------------------------------------------------------- /alloy/tests/scnottransitive.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fails because the membars do not transitively order the store against the sw 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | membar.scopewg.semsc0.semsc1.rel 11 | membar.scopedev.semsc1.rel 12 | st.atom.scopedev.sc1 b = 1 13 | NEWWG 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.scopedev.sc1 b = 1 17 | membar.scopedev.semsc1.acq 18 | membar.scopewg.semsc0.semsc1.acq 19 | ld.vis.scopedev.sc0 a 20 | NOSOLUTION consistent[X] && #dr=0 21 | SATISFIABLE #dr>0 22 | -------------------------------------------------------------------------------- /alloy/tests/test10.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | cbar.acq.rel.scopewg.semsc0 0 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | st.atom.rel.scopedev.sc1.semsc0 b = 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc1.semsc0 b = 1 19 | cbar.acq.rel.scopewg.semsc0 1 20 | NEWSG 21 | NEWTHREAD 22 | cbar.acq.rel.scopewg.semsc0 1 23 | ld.vis.scopedev.sc0 a 24 | SATISFIABLE consistent[X] && #dr=0 25 | NOSOLUTION consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/releaseseq4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Exercise release sequence. The RMW in the second thread is in the hypothetical release sequence of the relaxed atomic 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | membar.rel.scopedev.semsc0 11 | st.atom.scopedev.sc0 y = 1 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | rmw.scopedev.sc0 y = 1 2 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopedev.sc0.semsc0 y = 2 20 | ld.vis.scopedev.sc0 x 21 | SATISFIABLE consistent[X] && #dr=0 22 | NOSOLUTION consistent[X] && #dr>0 23 | -------------------------------------------------------------------------------- /alloy/tests/test7.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Fail: Wrong storage class semantics 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | cbar.acq.rel.scopewg.semsc0 0 11 | NEWSG 12 | NEWTHREAD 13 | cbar.acq.rel.scopewg.semsc0 0 14 | cbar.acq.rel.scopedev.semsc1 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | cbar.acq.rel.scopedev.semsc1 1 19 | cbar.acq.rel.scopewg.semsc0 2 20 | NEWSG 21 | NEWTHREAD 22 | cbar.acq.rel.scopewg.semsc0 2 23 | ld.vis.scopedev.sc0 a 24 | NOSOLUTION consistent[X] && #dr=0 25 | SATISFIABLE consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/test5.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | st.atom.rel.scopewg.sc0.semsc0 b = 1 11 | NEWSG 12 | NEWTHREAD 13 | ld.atom.acq.scopewg.sc0.semsc0 b = 1 14 | st.atom.rel.scopedev.sc0.semsc0 c = 1 15 | NEWWG 16 | NEWSG 17 | NEWTHREAD 18 | ld.atom.acq.scopedev.sc0.semsc0 c = 1 19 | st.atom.rel.scopewg.sc0.semsc0 d = 1 20 | NEWSG 21 | NEWTHREAD 22 | ld.atom.acq.scopewg.sc0.semsc0 d = 1 23 | ld.vis.scopedev.sc0 a 24 | SATISFIABLE consistent[X] && #dr=0 25 | NOSOLUTION consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/atomwrongsc.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // There's a WaR hazard between an atomic load and a non-atomic store. 6 | // This test exercises that using only semsc0 is sufficient to synchronize 7 | // them, because the atomic also has semsc0 in its semantics. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | ld.atom.acq.scopewg.sc1.semsc0 x = 0 12 | st.atom.rel.scopewg.sc0.semsc0 y = 1 13 | NEWSG 14 | NEWTHREAD 15 | ld.atom.acq.scopewg.sc0.semsc0 y = 1 16 | st.av.scopedev.sc0 z = 1 17 | SLOC x z 18 | SATISFIABLE consistent[X] && #dr=0 19 | NOSOLUTION consistent[X] && #dr>0 20 | -------------------------------------------------------------------------------- /alloy/tests/test4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Pass 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 a = 1 10 | membar.rel.scopedev.semsc0 11 | st.atom.scopewg.sc0 b = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc0.semsc0 b = 1 15 | st.atom.rel.scopedev.sc0.semsc0 c = 1 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopedev.sc0.semsc0 c = 1 20 | st.atom.rel.scopewg.sc0.semsc0 d = 1 21 | NEWSG 22 | NEWTHREAD 23 | ld.atom.acq.scopewg.sc0.semsc0 d = 1 24 | ld.vis.scopedev.sc0 a 25 | SATISFIABLE consistent[X] && #dr=0 26 | NOSOLUTION consistent[X] && #dr>0 27 | -------------------------------------------------------------------------------- /alloy/tests/corr.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // CoRR litmus test. Coherence order for x is 1,2, and is "enforced" by the 6 | // second invocation observing it. The first invocation can't see the stores 7 | // out of order. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | ld.atom.scopedev.sc0 x = 2 12 | ld.atom.scopedev.sc0 x = 1 13 | NEWWG 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.scopedev.sc0 x = 1 17 | ld.atom.scopedev.sc0 x = 2 18 | NEWWG 19 | NEWSG 20 | NEWTHREAD 21 | st.atom.scopedev.sc0 x = 2 22 | NEWWG 23 | NEWSG 24 | NEWTHREAD 25 | st.atom.scopedev.sc0 x = 1 26 | NOSOLUTION consistent[X] 27 | -------------------------------------------------------------------------------- /alloy/tests/waw.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // WaW hazard between the first two threads. The third thread should see the write from the second thread. 6 | NEWWG 7 | NEWSG 8 | NEWTHREAD 9 | st.av.scopedev.sc0 x = 1 10 | st.atom.rel.scopedev.sc0.semsc0 y = 1 11 | NEWWG 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopedev.sc0.semsc0 y = 1 15 | st.av.scopedev.sc0 x = 2 16 | st.atom.rel.scopedev.sc0.semsc0 z = 1 17 | NEWWG 18 | NEWSG 19 | NEWTHREAD 20 | ld.atom.acq.scopedev.sc0.semsc0 z = 1 21 | ld.vis.scopedev.sc0 x = 2 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitive3.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Invocation 0 makes the write x=1 available to invocation 1. 6 | // Invocation 1 then does a bulk av operation with device scope. 7 | // Invocation 2 does a bulk vis op with device scope. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | st.av.scopewg.sc0 x = 1 12 | cbar.acq.rel.scopewg.semsc0 0 13 | NEWSG 14 | NEWTHREAD 15 | cbar.acq.rel.scopewg.semsc0 0 16 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 17 | NEWWG 18 | NEWSG 19 | NEWTHREAD 20 | ld.atom.acq.scopedev.sc1.semsc0.semsc1 z = 1 21 | ld.vis.scopedev.sc0 x 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 25 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitive.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Invocation 0 makes the write x=1 available to invocation 1. 6 | // Invocation 1 then does a bulk av operation with device scope. 7 | // This is enough to make x=1 visible to invocation 2. 8 | NEWWG 9 | NEWSG 10 | NEWTHREAD 11 | st.av.scopewg.sc0 x = 1 12 | st.atom.rel.scopewg.sc1.semsc0.semsc1 y = 1 13 | NEWSG 14 | NEWTHREAD 15 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 y = 1 16 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 17 | NEWWG 18 | NEWSG 19 | NEWTHREAD 20 | ld.atom.acq.scopedev.sc1.semsc0.semsc1 z = 1 21 | ld.vis.scopedev.sc0 x 22 | SATISFIABLE consistent[X] && #dr=0 23 | NOSOLUTION consistent[X] && #dr>0 24 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 25 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 26 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitivefail.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Missing AVWG in invocation 0, so AVDEV in invocation 1 isn't 6 | // sufficient 7 | NEWWG 8 | NEWSG 9 | NEWTHREAD 10 | st.nonpriv.sc0 x = 1 11 | st.atom.rel.scopewg.sc1.semsc0.semsc1 y = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 y = 1 15 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopedev.sc1.semsc0.semsc1.semvis z = 1 20 | st.atom.rel.scopewg.sc1.semsc0.semsc1 w = 1 21 | NEWSG 22 | NEWTHREAD 23 | ld.atom.acq.scopewg.sc1.semsc0.semsc1.semvis w = 1 24 | ld.nonpriv.sc0 x 25 | NOSOLUTION consistent[X] && #dr=0 26 | SATISFIABLE consistent[X] && #dr>0 27 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 28 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 29 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitivefail2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Missing VISWG in invocation 3, so VISDEV in invocation 2 isn't 6 | // sufficient 7 | NEWWG 8 | NEWSG 9 | NEWTHREAD 10 | st.nonpriv.sc0 x = 1 11 | st.atom.rel.scopewg.sc1.semsc0.semsc1.semav y = 1 12 | NEWSG 13 | NEWTHREAD 14 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 y = 1 15 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 16 | NEWWG 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopedev.sc1.semsc0.semsc1.semvis z = 1 20 | st.atom.rel.scopewg.sc1.semsc0.semsc1 w = 1 21 | NEWSG 22 | NEWTHREAD 23 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 w = 1 24 | ld.nonpriv.sc0 x 25 | NOSOLUTION consistent[X] && #dr=0 26 | SATISFIABLE consistent[X] && #dr>0 27 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 28 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 29 | 30 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitive2.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Invocation 0 makes the write x=1 available to invocation 1. 6 | // Invocation 1 then does a bulk av operation with device scope. 7 | // Invocation 2 does a bulk vis op with device scope. 8 | // Invocation 3 does a bulk vis op with workgroup scope 9 | NEWWG 10 | NEWSG 11 | NEWTHREAD 12 | st.nonpriv.sc0 x = 1 13 | st.atom.rel.scopewg.sc1.semsc0.semsc1.semav y = 1 14 | NEWSG 15 | NEWTHREAD 16 | ld.atom.acq.scopewg.sc1.semsc0.semsc1 y = 1 17 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 18 | NEWWG 19 | NEWSG 20 | NEWTHREAD 21 | ld.atom.acq.scopedev.sc1.semsc0.semsc1.semvis z = 1 22 | st.atom.rel.scopewg.sc1.semsc0.semsc1 w = 1 23 | NEWSG 24 | NEWTHREAD 25 | ld.atom.acq.scopewg.sc1.semsc0.semsc1.semvis w = 1 26 | ld.nonpriv.sc0 x 27 | SATISFIABLE consistent[X] && #dr=0 28 | NOSOLUTION consistent[X] && #dr>0 29 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 30 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 31 | 32 | -------------------------------------------------------------------------------- /alloy/tests/mp3transitive4.test: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Invocation 0 makes the write x=1 available to invocation 1. 6 | // Invocation 1 then does a bulk av operation with device scope. 7 | // Invocation 2->3 does happens-before 8 | // Invocation 3 does a bulk vis op with device scope 9 | // Invocation 4 does a bulk vis op with workgroup scope 10 | // The happens-before is sufficient even though it uses different 11 | // storage class semantics. 12 | NEWWG 13 | NEWSG 14 | NEWTHREAD 15 | st.nonpriv.sc0 x = 1 16 | st.atom.rel.scopewg.sc0.semsc0.semav y = 1 17 | NEWSG 18 | NEWTHREAD 19 | ld.atom.acq.scopewg.sc0.semsc0 y = 1 20 | st.atom.rel.scopedev.sc1.semsc0.semsc1.semav z = 1 21 | NEWWG 22 | NEWSG 23 | NEWTHREAD 24 | ld.atom.acq.scopedev.sc1.semsc1 z = 1 25 | st.atom.rel.scopedev.sc1.semsc1 v = 1 26 | NEWWG 27 | NEWSG 28 | NEWTHREAD 29 | ld.atom.acq.scopedev.sc1.semsc0.semsc1.semvis v = 1 30 | st.atom.rel.scopewg.sc0.semsc0 w = 1 31 | NEWSG 32 | NEWTHREAD 33 | ld.atom.acq.scopewg.sc0.semsc0.semvis w = 1 34 | ld.nonpriv.sc0 x 35 | SATISFIABLE consistent[X] && #dr=0 36 | NOSOLUTION consistent[X] && #dr>0 37 | NOSOLUTION NOCHAINS consistent[X] && #dr=0 38 | SATISFIABLE NOCHAINS consistent[X] && #dr>0 39 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Vulkan-MemoryModel 2 | 3 | The Vulkan-MemoryModel repo includes documentation and tools related to the 4 | Vulkan Memory Model that are not built into the core specification. The core 5 | specification is available at 6 | https://www.khronos.org/registry/vulkan/specs/1.1-extensions/html/vkspec.html#VK_KHR_vulkan_memory_model. 7 | Other Khronos-maintained specifications and software projects that have been 8 | extended to support this model are listed in the 9 | [extension release checklist](https://github.com/KhronosGroup/Vulkan-Docs/issues/787). 10 | 11 | ## Alloy Model 12 | 13 | The [alloy](alloy) subdirectory includes an 14 | [Alloy](http://alloy.lcs.mit.edu/alloy/index.html) [implementation](alloy/spirv.als) 15 | of the memory model, a set of [litmus tests](alloy/tests) written in a 16 | rudimentary syntax, [C++ source](alloy/litmus.cpp) for a tool to translate 17 | the litmus tests to alloy, and a [makefile](alloy/Makefile) to execute the 18 | tests. A java class to run the alloy tests is compiled against 19 | https://oss.sonatype.org/content/repositories/snapshots/org/alloytools/org.alloytools.alloy.dist/5.0.0-SNAPSHOT/org.alloytools.alloy.dist-5.0.0-20190619.101010-34.jar. 20 | Download this jar file and place it in the [alloy](alloy) subdirectory. 21 | Simply run "make -j4" from the [alloy](alloy) subdirectory to run the 22 | tests. Required dependencies are just g++, GNU make, alloy, and a Java runtime. 23 | 24 | ## License 25 | 26 | This repo is treated as an offshoot of the Vulkan-Docs repo, and uses the 27 | same Creative Commons Attribution 4.0 license. See [COPYING.md](COPYING.md). 28 | 29 | [Alloy](http://alloy.lcs.mit.edu/alloy/index.html) is a third-party tool 30 | used in this repo, and is available from 31 | https://github.com/AlloyTools/org.alloytools.alloy. -------------------------------------------------------------------------------- /COPYING.md: -------------------------------------------------------------------------------- 1 | The files in, and generated output documents from this Vulkan-MemoryModel 2 | project are under a mix of copyright and license statements. Refer to 3 | the individual files for specific information. As a general 4 | guideline: 5 | 6 | * The Vulkan Specification asciidoc sources, as well as other documentation 7 | which we expect people may wish to regenerate and distributed in other 8 | formats - such as the reference pages generated from the Specification 9 | source - are under a Creative Commons Attribution 4.0 license. 10 | ** The specification sources have only recently (as of June 2017) been 11 | placed under this license. We will now be able to accept pull requests on 12 | Github, but there is a related Contribution License Agreement which 13 | people proposing PRs to the Vulkan-Docs repository must execute as part 14 | of opening the PR. 15 | * Generated output documents, including the official Vulkan Specification 16 | PDF and HTML documents, are under a proprietary Khronos license. See 17 | https://www.khronos.org/registry/speccopyright.html . Only Specification 18 | documents posted in the Vulkan Registry are official. 19 | * The Vulkan headers, spec build tools, and spec and registry configuration 20 | files are, for the most part, under the Apache 2 license. Some older files 21 | are under BSD-like licenses which may eventually be updated to Apache 2 as 22 | we have time. 23 | * There may be some configuration files customized from material shipped 24 | with the asciidoc and dblatex distributions. Such files continue under 25 | their original copyrights. 26 | * Some generated, transient files produced during the course of building 27 | the specification, headers, or other targets may not have copyrights. 28 | These are typically very short asciidoc fragments describing parts of 29 | the Vulkan API, and are incorporated by reference into specification 30 | or reference page builds. 31 | * If something is missing a copyright statement and that poses an 32 | *actual problem* for whatever you're doing, file an issue on GitHub 33 | and we'll eventually correct it in some fashion. 34 | 35 | Working with the different Khronos member company IP lawyers to make 36 | license changes is a very slow process constrained by the Khronos Member 37 | Agreement and IP Policy as well as by individual company concerns about 38 | their IP. Do not expect rapid changes in anything having to to with 39 | copyrights and licensing. 40 | -------------------------------------------------------------------------------- /alloy/Makefile: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | # Creative Commons Attribution 4.0 International License; see 3 | # http://creativecommons.org/licenses/by/4.0/ 4 | 5 | # Makefile to execute litmus tests 6 | # 7 | # foreach *.test, run litmus.exe generating the alloy inputs and "reference" 8 | # results (SATISFIABLE/NOSOLUTION) in a temporary directory, then run alloy 9 | # and diff the alloy output against the reference result to determine 10 | # pass/fail. 11 | 12 | default: runtests 13 | 14 | litmustests = $(addsuffix .gen, $(notdir $(sort $(wildcard tests/*.test)))) 15 | 16 | build/litmus.exe : litmus.cpp 17 | @mkdir -p build 18 | g++ litmus.cpp -std=c++11 -Wall -o build/litmus.exe 19 | 20 | Assert%: pre 21 | @echo "$@" 22 | @printf "open spirv\ncheck $@ for 8 but 1 Exec" > build/$@.als 23 | @echo "NOSOLUTION" > build/$@.ref 24 | @java -cp "org.alloytools.alloy.dist-5.0.0-20190619.101010-34.jar$(JAVACPSEPARATOR)." RunCommandLine build/$@.als > build/$@.out 25 | @diff --strip-trailing-cr build/$@.ref build/$@.out || echo "Test $@ failed" 26 | 27 | asserts: AssertLocordSameLoc AssertLocordAcyclic AssertLocordComplete1 AssertLocordComplete2 AssertVisTo 28 | 29 | # runtests is the default build target. The build include a "pre" step to 30 | # prep, and otherwise the test executions can run in parallel with each 31 | # other. 32 | runtests: asserts $(litmustests) 33 | 34 | # Create a scratch directory. Copy spirv.als there, since Alloy seems to be unable 35 | # to open files in a relative path when running from the command line. 36 | pre: 37 | @mkdir -p build 38 | @cp spirv.als build 39 | 40 | clean: 41 | @rm -f build/* 42 | @!(test -d "build") || rmdir build 43 | 44 | # Java's path separator depends on the OS. Windows is semi-colon, other OSes 45 | # use a colon. 46 | ifneq (,$(findstring Windows, $(OS))) 47 | JAVACPSEPARATOR = ; 48 | else 49 | JAVACPSEPARATOR = : 50 | endif 51 | 52 | # Generate the temp files in ./build, run Alloy from the command line, and 53 | # diff the generated output against the .ref file (generated from the tests) 54 | %.test.gen : tests/%.test build/litmus.exe pre 55 | $(eval test = $(notdir $<)) 56 | @echo $(test) 57 | @./build/litmus.exe $(test) tests build 58 | @java -cp "org.alloytools.alloy.dist-5.0.0-20190619.101010-34.jar$(JAVACPSEPARATOR)." RunCommandLine build/$(test).gen > build/$(test).out 59 | @diff --strip-trailing-cr build/$(test).ref build/$(test).out || echo "Test $@ failed" 60 | -------------------------------------------------------------------------------- /alloy/RunCommandLine.java: -------------------------------------------------------------------------------- 1 | /* Alloy Analyzer 4 -- Copyright (c) 2006-2009, Felix Chang 2 | * 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files 4 | * (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, 5 | * merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is 6 | * furnished to do so, subject to the following conditions: 7 | * 8 | * The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. 9 | * 10 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 11 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 12 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 13 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 14 | */ 15 | /* 16 | * Modified from Alloy's ExampleUsingTheCompiler.java 17 | * Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 18 | * Creative Commons Attribution 4.0 International License; see 19 | * http://creativecommons.org/licenses/by/4.0/ 20 | */ 21 | 22 | import edu.mit.csail.sdg.alloy4.A4Reporter; 23 | import edu.mit.csail.sdg.alloy4.Err; 24 | import edu.mit.csail.sdg.alloy4.ErrorWarning; 25 | import edu.mit.csail.sdg.alloy4viz.VizGUI; 26 | import edu.mit.csail.sdg.ast.Command; 27 | import edu.mit.csail.sdg.ast.Module; 28 | import edu.mit.csail.sdg.parser.CompUtil; 29 | import edu.mit.csail.sdg.translator.A4Options; 30 | import edu.mit.csail.sdg.translator.A4Solution; 31 | import edu.mit.csail.sdg.translator.TranslateAlloyToKodkod; 32 | 33 | /** This class demonstrates how to access Alloy4 via the compiler methods. */ 34 | 35 | public final class RunCommandLine { 36 | 37 | /* 38 | * Execute every command in every file. 39 | * 40 | * This method parses every file, then execute every command. 41 | * 42 | * If there are syntax or type errors, it may throw 43 | * a ErrorSyntax or ErrorType or ErrorAPI or ErrorFatal exception. 44 | * You should catch them and display them, 45 | * and they may contain filename/line/column information. 46 | */ 47 | public static void main(String[] args) throws Err { 48 | 49 | // The visualizer (We will initialize it to nonnull when we visualize an Alloy solution) 50 | VizGUI viz = null; 51 | 52 | // Alloy4 sends diagnostic messages and progress reports to the A4Reporter. 53 | // By default, the A4Reporter ignores all these events (but you can extend the A4Reporter to display the event for the user) 54 | A4Reporter rep = new A4Reporter() { 55 | // For example, here we choose to display each "warning" by printing it to System.out 56 | @Override public void warning(ErrorWarning msg) { 57 | System.out.print("Relevance Warning:\n"+(msg.toString().trim())+"\n\n"); 58 | System.out.flush(); 59 | } 60 | }; 61 | 62 | for(String filename:args) { 63 | 64 | // Parse+typecheck the model 65 | Module world = CompUtil.parseEverything_fromFile(rep, null, filename); 66 | 67 | // Choose some default options for how you want to execute the commands 68 | A4Options options = new A4Options(); 69 | 70 | options.solver = A4Options.SatSolver.SAT4J; 71 | 72 | for (Command command: world.getAllCommands()) { 73 | // Execute the command 74 | A4Solution ans = TranslateAlloyToKodkod.execute_command(rep, world.getAllReachableSigs(), command, options); 75 | 76 | if (ans.satisfiable()) { 77 | System.out.println("SATISFIABLE"); 78 | } else { 79 | System.out.println("NOSOLUTION"); 80 | } 81 | } 82 | } 83 | } 84 | } 85 | -------------------------------------------------------------------------------- /alloy/spirv.als: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2019 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Vulkan + SPIR-V Memory Model 6 | 7 | // Inspired by: Wickerson et al, Automatically Comparing Memory Consistency Models, POPL`17 8 | // https://johnwickerson.github.io/papers/memalloy.pdf 9 | // https://github.com/johnwickerson/memalloy 10 | 11 | open util/relation 12 | 13 | pred is_acyclic[r : E -> E] { 14 | acyclic[r, E] 15 | } 16 | 17 | pred strict_partial_order[r : E -> E] { 18 | is_acyclic[r] 19 | transitive[r] 20 | } 21 | 22 | pred is_equivalence[r : E -> E, s : set E] { 23 | equivalence[r,s] 24 | r in s->s 25 | } 26 | 27 | // stor = "set to relation", (s,s) for all s in E 28 | // lift a set to a relation (the [_] operator in Herd) 29 | fun stor[s : set E] : E -> E { 30 | s <: iden 31 | } 32 | 33 | // a chain of two or more hops through a relation 34 | fun twoplus[r : E -> E] : E -> E { 35 | r.^r 36 | } 37 | 38 | // reduce a transitive relation to those immediately related 39 | fun imm[r : E -> E] : E -> E{ 40 | r - (r.^r) 41 | } 42 | 43 | // reflexive closure (the ?-operator in Herd) 44 | fun rc[r : E -> E] : E -> E { 45 | r + (E <: iden) 46 | } 47 | 48 | // Relation-And-Inverse 49 | fun rai[r : E -> E] : E -> E { 50 | r + ~r 51 | } 52 | 53 | // An "event" (instruction) 54 | sig E {} 55 | 56 | // An execution 57 | sig Exec { 58 | EV : set E, // everything 59 | W, R, F : set E, // write, read, fence 60 | A, ACQ, REL: set E, // atomic, acquire, release 61 | SC0, SC1 : set E, // storage classes 0 and 1 62 | SEMSC0, SEMSC1, SEMSC01 : set E, // storage class semantics 0, 1, 0 and 1 63 | SCOPESG, SCOPEWG, SCOPEQF, SCOPEDEV : set E, // subgroup/workgroup/queuefamily/device scopes 64 | CBAR : set E, // control barrier 65 | RFINIT : set E, // reads that read-from the initial value 66 | AV, VIS : set E, // per-instruction availability/visibility operations 67 | AVSHADER, VISSHADER : set E, // availability/visibility op to shader domain 68 | AVQF, VISQF : set E, // availability/visibility op to queuefamily instance domain 69 | AVWG, VISWG : set E, // availability/visibility op to workgroup instance domain 70 | AVSG, VISSG : set E, // availability/visibility op to subgroup instance domain 71 | SEMAV, SEMVIS : set E, // memory semantics for availability/visibility operations 72 | AVDEVICE, VISDEVICE : set E, // availability/visibility op to device domain 73 | NONPRIV, PRIV : set E, // non-private (participates in inter-thread ordering) vs private 74 | 75 | // relations statically defined by a "program" 76 | sthd : E->E, // same thread 77 | immpo: E->E, // program order, only immediate neighbors 78 | pgmsloc : E->E, // same location specified in program source (see also sloc) 79 | ssg : E->E, // same subgroup 80 | swg : E->E, // same workgroup 81 | sqf : E->E, // same queuefamily 82 | ssw : E->E, // system-synchronizes-with 83 | scbarinst : E->E, // same control barrier dynamic instance 84 | pgmsref : E->E, // same reference specified in program source (see also sref) 85 | chains : E->E, // What availability/visibility chains are supported based on device state. 86 | // chains is either EV->EV (if chains are supported) or stor[EV] (if not) 87 | 88 | // derived static relations 89 | po : E->E, // program order (^immpo) 90 | posctosem : E->E, // program order & (SC->SEM) 91 | posemtosc : E->E, // program order & (SEM->SC) 92 | inscope : E->E, // are a,b in each other's memory scope instance 93 | mutordatom : E->E, // mututally ordered atomics (same loc, inscope) 94 | sloc : E->E, // same location (roughly, transitive closure of pgmsloc) 95 | sref : E->E, // same reference (roughly, transitive closure of pgmsref + stor[R+W]) 96 | avvisinc : E->E, // relates av/vis ops with those operations they may include 97 | 98 | // dynamic relations established at runtime 99 | rf : E->E, // reads-from 100 | asmo: E->E, // A's scoped modification order 101 | rs : E->E, // release sequence 102 | hypors : E->E, // hypothetical release sequence 103 | fr: E->E, // from-read 104 | sw: E->E, // synchronizes-with 105 | ithbsemsc0 : E->E, // inter-thread-happens-before (templated by storage class mask) 106 | ithbsemsc1 : E->E, 107 | ithbsemsc01 : E->E, 108 | hb: E->E, // happens-before 109 | avsg: E->E, // chain of instructions producing subgroup availability 110 | avwg: E->E, // chain of instructions producing workgroup availability 111 | avqf: E->E, // chain of instructions producing queue family availability 112 | avsh: E->E, // chain of instructions producing shader availability 113 | avdv: E->E, // device availability 114 | vissg: E->E, // chain of instructions producing subgroup visibility 115 | viswg: E->E, // chain of instructions producing workgroup visibility 116 | visqf: E->E, // chain of instructions producing queue family visibility 117 | vissh: E->E, // chain of instructions producing shader visibility 118 | visdv: E->E, // device visibility 119 | locord: E->E, // location-ordered 120 | dr: E->E, // data-race 121 | visto: E->E, // visible-to 122 | } { 123 | 124 | // reads, writes, fences, barriers, and av/vis ops are the entire set of events 125 | R+W+F+CBAR+AVDEVICE+VISDEVICE = EV 126 | 127 | // memory accesses are disjoint from barriers 128 | // NOTE: Some CBARs are fences 129 | no ((R+W)&(F+CBAR)) 130 | 131 | // program order is a subset of same-thread 132 | po in sthd 133 | 134 | // immpo is only "immediate" program order links, to reduce noise when visualizing 135 | // and to make it easier to specify. po is its transitive closure 136 | po = ^immpo 137 | 138 | // program order is a strict partial order 139 | strict_partial_order[po] 140 | // po relates everything in a thread 141 | (sthd - iden) = rai[po] 142 | 143 | // sthd is an equivalence relation 144 | is_equivalence[sthd, EV] 145 | 146 | // sloc is the transitive closure of all slocs specified in pgmsloc (and its 147 | // inverse) and add the identity over R+W 148 | sloc = ^(rai[pgmsloc]) + stor[R+W] 149 | // sloc is an equivalence relation over R+W 150 | is_equivalence[sloc, R+W] 151 | 152 | // sref is the transitive closure of all srefs specified in pgmsref (and its 153 | // inverse) and add the identity over R+W 154 | sref = ^(rai[pgmsref]) + stor[R+W] 155 | 156 | // AVDEVICE operation applies to all operations that are ordered before 157 | // the current operation, but not to the current operation itself. 158 | // VISDEVICE operation applies to all operations that are ordered after 159 | // the current operation, but not to the current operation itself. 160 | // SEMAV operation with SEMSCi applies to all operations in SCi that are ordered before 161 | // the current operation, but not to the current operation itself. 162 | // SEMVIS operation with SEMSCi applies to all operations in SCi that are ordered after 163 | // the current operation, but not to the current operation itself. 164 | // AV+VIS ops (per-instruction) are avvisinc with themselves (av/vis op happens in the right order) 165 | // and with those operations on the same reference. 166 | // Note that this complexity exists in part because we don't split out implicit av/vis 167 | // ops as distinct instructions. 168 | avvisinc = ((SC0+SC1)->AVDEVICE) + (VISDEVICE->(SC0+SC1)) + 169 | (SC0->(SEMSC0&SEMAV)) + ((SEMSC0&SEMVIS)->SC0) + 170 | (SC1->(SEMSC1&SEMAV)) + ((SEMSC1&SEMVIS)->SC1) + 171 | (rai[stor[AV+VIS] . (sref & sloc)]) 172 | 173 | // same thread is a subset of same subgroup which is a subset of same workgroup 174 | sthd in ssg 175 | ssg in swg 176 | swg in sqf 177 | 178 | // same subgroup/workgroup/queuefamily are equivalence relationships 179 | is_equivalence[ssg, EV] 180 | is_equivalence[swg, EV] 181 | is_equivalence[sqf, EV] 182 | 183 | // reads-from maps writes to reads (that don't read-from init) 184 | // at the same location. 185 | rf in (W->(R-RFINIT)) & (sloc-iden) 186 | 187 | // reads-from is one-to-one 188 | rf . ~rf in iden 189 | 190 | // reads may read from the initial value 191 | RFINIT in R 192 | 193 | // All reads must read from some write or from init (the size of rf and 194 | // RFINIT must equal the size of R) 195 | #(rf + (stor[RFINIT])) = #R 196 | 197 | // RMW atomics in A 198 | (R&W) in A 199 | 200 | // Atomics are reads and writes, not fences 201 | A in R+W 202 | 203 | // acquire can be used on atomic reads or fences 204 | ACQ in ((R&A)+F) 205 | 206 | // releases can be used on atomic writes or fences 207 | REL in ((W&A)+F) 208 | 209 | // Fences must release or acquire 210 | F in (ACQ+REL) 211 | 212 | // Only writes/reads can have explicit availability/visibility ops, respectively 213 | AV in W 214 | VIS in R 215 | 216 | // nonpriv is only meaningful for memory accesses 217 | NONPRIV in R+W 218 | // PRIV is the complement of NONPRIV 219 | PRIV = R+W-NONPRIV 220 | 221 | // Atomic operations are always considered non-private 222 | A in NONPRIV 223 | 224 | // Atomic operations implicitly have availability/visibility operations 225 | (W&A) in AV 226 | (R&A) in VIS 227 | 228 | // availability/visibility semantics in REL/ACQ only, respectively 229 | SEMAV in REL 230 | SEMVIS in ACQ 231 | 232 | // All coherent ops have implicit availability/visibility ops (AV, VIS). 233 | // Barriers/atomics can also include availability/visibility ops via their semantics (SEMAV, SEMVIS). 234 | AVSHADER = (AV+SEMAV) & SCOPEDEV 235 | VISSHADER = (VIS+SEMVIS) & SCOPEDEV 236 | 237 | AVQF = (AV+SEMAV) & (SCOPEDEV + SCOPEQF) 238 | VISQF = (VIS+SEMVIS) & (SCOPEDEV + SCOPEQF) 239 | 240 | AVWG = (AV+SEMAV) & (SCOPEDEV + SCOPEQF + SCOPEWG) 241 | VISWG = (VIS+SEMVIS) & (SCOPEDEV + SCOPEQF + SCOPEWG) 242 | 243 | AVSG = AV+SEMAV 244 | VISSG = VIS+SEMVIS 245 | 246 | // AV/VISDEVICE are not reads/writes, don't have storage classes, etc. They are 247 | // special operation invoked outside of a shader. 248 | no (R+W+F+CBAR+AV+VIS+RFINIT+ACQ+REL+SC0+SC1+SEMSC0+SEMSC1)&(AVDEVICE+VISDEVICE) 249 | no AVDEVICE&VISDEVICE 250 | 251 | // scbarinst relates pairs of control barriers 252 | is_equivalence[scbarinst, CBAR] 253 | // no pair of the same control barrier instance can be in the same thread 254 | no scbarinst & rai[po] 255 | // can't have two cbars where one comes first in po in one thread and 256 | // second in po in another thread 257 | no (po.scbarinst.po & scbarinst) 258 | // the same instance of a control barrier must have same scope, acq/rel, semantics 259 | no scbarinst & (SCOPEDEV -> (EV-SCOPEDEV)) 260 | no scbarinst & (SCOPEQF -> (EV-SCOPEQF)) 261 | no scbarinst & (SCOPEWG -> (EV-SCOPEWG)) 262 | no scbarinst & (SCOPESG -> (EV-SCOPESG)) 263 | no scbarinst & (ACQ -> (EV-ACQ)) 264 | no scbarinst & (REL -> (EV-REL)) 265 | no scbarinst & (SEMSC0 -> (EV-SEMSC0)) 266 | no scbarinst & (SEMSC1 -> (EV-SEMSC1)) 267 | 268 | // There is a unique storage class for each memory access. 269 | SC0+SC1 = R+W 270 | no SC0&SC1 271 | 272 | // All acquire/release ops have one or more semantics storage classes 273 | ACQ+REL = SEMSC0+SEMSC1 274 | SEMSC01 = SEMSC0&SEMSC1 275 | 276 | // All atomics and fences have a single scope 277 | A+F+CBAR in SCOPESG+SCOPEWG+SCOPEQF+SCOPEDEV 278 | no SCOPEQF&SCOPEDEV 279 | no SCOPEWG&SCOPEDEV 280 | no SCOPESG&SCOPEDEV 281 | no SCOPEWG&SCOPEQF 282 | no SCOPESG&SCOPEQF 283 | no SCOPESG&SCOPEWG 284 | 285 | // two ops are in scope with each other if they are both scope device or are 286 | // in the "same group" and have "group or greater" scope. 287 | inscope = (SCOPEDEV -> SCOPEDEV) + 288 | (sqf & ((SCOPEDEV+SCOPEQF) -> (SCOPEDEV+SCOPEQF))) + 289 | (swg & ((SCOPEDEV+SCOPEQF+SCOPEWG) -> (SCOPEDEV+SCOPEQF+SCOPEWG))) + 290 | (ssg & ((SCOPEDEV+SCOPEQF+SCOPEWG+SCOPESG) -> (SCOPEDEV+SCOPEQF+SCOPEWG+SCOPESG))) 291 | 292 | // mutually ordered atomics are to the same location and same reference and in scope 293 | mutordatom = (sloc & sref & (A -> A) & inscope) - iden 294 | 295 | posctosem = po & ((SC0 -> SEMSC0) + (SC1 -> SEMSC1)) 296 | posemtosc = po & ((SEMSC0 -> SC0) + (SEMSC1 -> SC1)) 297 | 298 | // A's scoped modification order: 299 | // - must be a strict partial order 300 | // - must relate all mutually ordered atomic writes at the same location 301 | strict_partial_order[asmo] 302 | rai[asmo] = ((A&W) -> (A&W)) & mutordatom 303 | 304 | // Release sequence starts with an atomic release followed by the reflexive 305 | // transitive closure of immediate asmo limited to RMWs. Leaving out C++'s 306 | // same-thread-atomic-write aspect of release sequences. hypors is the same 307 | // for "hypothetical release sequences" where the release happens in a fence 308 | // earlier in the same invocation. 309 | rs = (stor[REL&A]) . *((imm[asmo]) . (stor[R&W])) 310 | hypors = (stor[W&A]) . *((imm[asmo]) . (stor[R&W])) 311 | 312 | // synchronizes-with is similar to C++, with an additional case for fence->cbar->cbar->fence 313 | sw = inscope & ( 314 | // atomic->atomic 315 | ((stor[REL&A]) . rs . (rf & mutordatom) . (stor[ACQ&A])) + 316 | // fence->atomic 317 | ((stor[REL&F]) . posemtosc . (stor[A&W]) . hypors . (rf & mutordatom) . (stor[ACQ&A])) + 318 | // atomic->fence 319 | ((stor[REL&A]) . rs . (rf & mutordatom) . (stor[A&R]) . posctosem . (stor[ACQ&F])) + 320 | // fence->fence 321 | ((stor[REL&F]) . posemtosc . (stor[A&W]) . hypors . (rf & mutordatom) . (stor[A&R]) . posctosem . (stor[ACQ&F])) + 322 | // fence->cbar->cbar->fence 323 | // (stor[CBAR]) terms are redundant because scbarinst is an equivalence relation on scbarinst, 324 | // but they make the sequence of instructions more clear. 325 | ((stor[REL&F]) . (rc[po]) . (stor[CBAR]) . (scbarinst & inscope - iden) . (stor[CBAR]) . (rc[po]) . (stor[ACQ&F]))) 326 | 327 | // inter-thread-happens-before = 328 | // system-synchronizes-with 329 | // synchronizes-with where both sides have SC in semantics 330 | // SC||SEMSC -> programorder -> release 331 | // acquire -> programorder -> SC||SEMSC 332 | 333 | ithbsemsc0 = ^(ssw + 334 | (stor[SEMSC0]).sw.(stor[SEMSC0]) + 335 | (stor[SC0+SEMSC0]).po.(stor[REL&SEMSC0]) + 336 | (stor[ACQ&SEMSC0]).po.(stor[SC0+SEMSC0])) 337 | 338 | ithbsemsc1 = ^(ssw + 339 | (stor[SEMSC1]).sw.(stor[SEMSC1]) + 340 | (stor[SC1+SEMSC1]).po.(stor[REL&SEMSC1]) + 341 | (stor[ACQ&SEMSC1]).po.(stor[SC1+SEMSC1])) 342 | 343 | ithbsemsc01 = ^(ssw + 344 | (stor[SEMSC01]).sw.(stor[SEMSC01]) + 345 | (stor[SC0+SC1+SEMSC01]).po.(stor[REL&SEMSC01]) + 346 | (stor[ACQ&SEMSC01]).po.(stor[SC0+SC1+SEMSC01])) 347 | 348 | // happens-before = ithb or program order 349 | hb = ithbsemsc0 + ithbsemsc1 + ithbsemsc01 + po 350 | 351 | // Chains of instructions that produce the desired availability/visibility. 352 | // Example: An AVWG that happens before an AVSH in the same workgroup is 353 | // enough to make the original write available to the shader domain. 354 | // "chains & ..." effectively "turns off" nontrivial chains when the feature 355 | // is not supported by ANDing with the identity relation. 356 | avsg = stor[AVSG] 357 | avwg = (chains & (rc[avsg . (hb & ssg & avvisinc)])) . (stor[AVWG]) 358 | avqf = (chains & (rc[avsg . (hb & ssg & avvisinc)]) . (rc[avwg . (hb & swg & avvisinc)])) . (stor[AVQF]) 359 | avsh = (chains & (rc[avsg . (hb & ssg & avvisinc)]) . (rc[avwg . (hb & swg & avvisinc)]) . (rc[avqf . (hb & sqf & avvisinc)])) . (stor[AVSHADER]) 360 | avdv = stor[AVDEVICE] 361 | 362 | vissg = stor[VISSG] 363 | viswg = (stor[VISWG]) . (chains & (rc[(hb & ssg & avvisinc) . vissg])) 364 | visqf = (stor[VISQF]) . (chains & (rc[(hb & swg & avvisinc) . viswg]) . (rc[(hb & ssg & avvisinc) . vissg])) 365 | vissh = (stor[VISSHADER]) . (chains & (rc[(hb & sqf & avvisinc) . visqf]) . (rc[(hb & swg & avvisinc) . viswg]) . (rc[(hb & ssg & avvisinc) . vissg])) 366 | visdv = stor[VISDEVICE] 367 | 368 | locord = sloc & // relates memory accesses to the same location 369 | ((hb & sthd & sref) + // single-thread case 370 | ((stor[R-PRIV]) . hb . (stor[R+W-PRIV])) + // RaR, WaR (non-private) 371 | ((stor[R]) . ^ssw . (stor[R+W])) + // RaR, WaR (any) 372 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avsg . (hb & ssg) . (stor[W-PRIV]))) + // WaW (via subgroup instance domain) 373 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avsg . (hb & ssg) . vissg . (rc[po] & avvisinc) . (stor[R-PRIV]))) + // RaW (via subgroup instance domain) 374 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avwg . (hb & swg) . (stor[W-PRIV]))) + // WaW (via workgroup instance domain) 375 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avwg . (hb & swg) . viswg . (rc[po] & avvisinc) . (stor[R-PRIV]))) + // RaW (via workgroup instance domain) 376 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avqf . (hb & sqf) . (stor[W-PRIV]))) + // WaW (via queue family instance domain) 377 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avqf . (hb & sqf) . visqf . (rc[po] & avvisinc) . (stor[R-PRIV]))) + // RaW (via queue family instance domain) 378 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avsh . (hb ) . (stor[W-PRIV]))) + // WaW (via shader domain) 379 | (sref & ((stor[W-PRIV]) . (rc[po] & avvisinc) . avsh . (hb ) . vissh . (rc[po] & avvisinc) . (stor[R-PRIV]))) + // RaW (via shader domain) 380 | ( (stor[W]) . (hb & avvisinc) . avdv . (hb ) . (stor[W])) + // WaW (via device domain) 381 | ( (stor[W]) . (hb & avvisinc) . avdv . (hb ) . visdv . (hb & avvisinc) . (stor[R]))) // RaW (via device domain) 382 | 383 | // From-read (aka reads-before) are (read,write) pairs where the read reads a 384 | // value before the write in atomic modification order or ordered writes to the same location 385 | // (i.e. the inverse of reads-from joined with asmo or locord). 386 | // For reads that read-from init, they from-read all writes at the same location. 387 | fr = (~rf . ((W -> W) & locord)) + (~rf . asmo) + ((stor[RFINIT]) . sloc . (stor[W])) - iden 388 | 389 | // data race = same location, at least one is a write, not equal, 390 | // not mutually ordered atomics, not location ordered either direction 391 | dr = sloc & ((W -> W) + (W -> R) + (R -> W) - mutordatom - iden - rai[locord]) 392 | 393 | // visible to = location ordered W->R with no intervening write (W->W->R) 394 | visto = imm[(stor[W]) . locord] . (stor[R]) 395 | } 396 | 397 | pred consistent[X:Exec] { 398 | // consistency: locord, rf, fr, asmo must not form cycles 399 | is_acyclic[X.locord + X.rf + X.fr + X.asmo] 400 | 401 | // consistency: non-atomic cannot read-from a value that is shadowed by another write 402 | no (X.rf . (stor[X.R - X.A])) & twoplus[stor[X.W] . (X.locord)] 403 | } 404 | 405 | pred racefree[X:Exec] { 406 | no X.dr 407 | } 408 | 409 | pred locordcomplete[X:Exec] { 410 | // In a race-free program, any reads and writes at the same location must 411 | // be ordered by locord and/or mutordatom 412 | rai[X.locord]+X.mutordatom-((X.R-X.W)->(X.R-X.W)) = X.sloc-iden-((X.R-X.W)->(X.R-X.W)) 413 | } 414 | 415 | // Asserts that should be true for all executions: 416 | 417 | // locord only relates operations at the same location 418 | assert AssertLocordSameLoc { all X : Exec | X.locord in X.sloc } 419 | 420 | // locord is acyclic 421 | assert AssertLocordAcyclic { all X : Exec | !consistent[X] || is_acyclic[X.locord] } 422 | 423 | // if (consistent && racefree) locordcomplete 424 | assert AssertLocordComplete1 { all X : Exec | !(racefree[X] && consistent[X]) || locordcomplete[X] } 425 | 426 | // if (locordcomplete && consistent) racefree 427 | assert AssertLocordComplete2 { all X : Exec | !(locordcomplete[X] && consistent[X]) || racefree[X] } 428 | 429 | // can't synchronize-with yourself 430 | // (too slow to run, in practice) 431 | assert AssertNoSwSelf { all X : Exec | !consistent[X] || no ((X.sw) & iden) } 432 | 433 | // no (W->W->R) in visto 434 | assert AssertVisTo { all X : Exec | no ((X.visto) & ((stor[X.W]) . (X.locord) . (stor[X.W]) . (X.locord) . (stor[X.R]))) } 435 | -------------------------------------------------------------------------------- /alloy/litmus.cpp: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2017-2018 Khronos Group. This work is licensed under a 2 | // Creative Commons Attribution 4.0 International License; see 3 | // http://creativecommons.org/licenses/by/4.0/ 4 | 5 | // Vulkan Memory Model 6 | // Convert an assembly-like syntax to the Alloy model. 7 | // 8 | // Name from first command line argument, input path in second argument, 9 | // output to files in directory specified by third argument 10 | 11 | // Input format: 12 | // 13 | // Comments: "//" must be the first two characters on a comment line. 14 | // 15 | // "NEWQF"/"NEWWG"/"NEWSG"/"NEWTHREAD" switch to a new queue family/workgroup/subgroup/thread. 16 | // No way to switch back to previous thread/group. 17 | // NEWTHREAD takes an optional thread number, which can 18 | // be used with SSW. If a thread number is not present, the initial thread is 19 | // assigned number zero and other threads are assigned a thread number one 20 | // greater than the previous thread. Within a thread, instructions are listed 21 | // in program order. 22 | // 23 | // An instruction is of the form: 24 | // 25 | // token[.token]^N [variable [= value [value2]]] [cbarinstancenumber] 26 | // 27 | // That is, the opcode consists of an arbitrary number of '.'-separated tokens. 28 | // Load/store/atomic operations take a variable name (any string), which is 29 | // used to determine which instructions access the same memory locations. Those 30 | // operations also optionally take "= value" where value is an integer. 31 | // Matching store/load values are used to form reads-from edges. A load with 32 | // "= 0" reads-from the initial value. Loads and/or stores without a value 33 | // assignment are less constrained. 34 | // 35 | // Atomic RMWs can be expressed as either "ld.st.atom" (or any permutation of 36 | // that), or simply as "rmw". They accept the additional "value2" (write 37 | // value), and treat "value" as the read value. 38 | // 39 | // "cbar" instructions don't take a variable, and instead take an "instance 40 | // number" which is an integer value used to match control barrier instructions 41 | // from the same dynamic instance as specified in multiple threads. 42 | // 43 | // Valid tokens are: 44 | // 45 | // "st" - store/write 46 | // "ld" - load/read 47 | // "membar" - OpMemoryBarrier ("fence") 48 | // "atom" - atomic. Used with st and/or ld to indicate the type of atomic 49 | // "rmw" - read and write and atomic (alias for setting these separately) 50 | // "acq" - acquire semantics 51 | // "rel" - release semantics (can use both acq and rel with membar/cbar) 52 | // "sc0" - storage class 0 53 | // "sc1" - storage class 1 54 | // "semsc0" - storage class 0 in semantics 55 | // "semsc1" - storage class 1 in semantics 56 | // "scopesg" - Subgroup scope (for atomics/barriers) 57 | // "scopewg" - Workgroup scope (for atomics/barriers) 58 | // "scopeqf" - QueueFamily scope (for atomics/barriers) 59 | // "scopedev" - Device scope (for atomics/barriers) 60 | // "cbar" - OpControlBarrier 61 | // "avdevice" - device domain availability operation 62 | // "visdevice" - device domain visibility operation 63 | // "semav" - availability operation specified in memory semantics 64 | // "semvis" - visibility operation specified in memory semantics 65 | // "av" - per-instruction availability operation 66 | // "vis" - per-instruction visibility operation 67 | // "nonpriv" - obeys inter-thread ordering (default for av/vis, must be set for noncoherent) 68 | // 69 | // There is limited validation of the input. See InstructionState::warn. 70 | // For example, it checks some basic rules like "all atomics and barriers 71 | // must specify a scope" which, if violated, makes an execution trivially 72 | // unsatisfiable. 73 | // 74 | // "SLOC", "SSW", "SATISFIABLE", "NOSOLUTION", and "NOCHAINS" are non-instruction 75 | // directives. 76 | // 77 | // "SLOC" takes two variable name strings and specifies that they access 78 | // the same memory location (but are different references). Each variable 79 | // name is always a unique reference. By default, each variable name is 80 | // also a unique location. SLOC allows declaring that two distinct variable 81 | // names (references) share the same location. 82 | // 83 | // "SSW" takes two integer operands which are thread numbers, and specifies 84 | // that the first thread system-synchronizes-with the second thread. 85 | // 86 | // "SATISFIABLE", and "NOSOLUTION" begin specification of a unit test, and 87 | // indicates whether alloy should find a solution. The remainder of the 88 | // line is code pasted directly into the predicate, along 89 | // with the program info. For example, a common test is: 90 | // 91 | // SATISFIABLE consistent[X] && #dr=0 92 | // 93 | // indicating that the program can be satisfied by a consistent execution 94 | // with no data races. Each line is an independent test. 95 | // 96 | // "NOCHAINS" can be put after SATISFIABLE or NOSOLUTION to indicate that 97 | // the test should run assuming the implementation does not support 98 | // availability and visibility chains with more than one element. 99 | // 100 | #include 101 | #include 102 | #include 103 | #include 104 | #include 105 | #include 106 | #include 107 | #include 108 | #include 109 | #include 110 | #include 111 | 112 | using namespace std; 113 | 114 | // Track what variable/value is used for a load or store. Used to 115 | // determine read-from edges. Also used to track control barrier 116 | // instances. 117 | class LoadStore { 118 | public: 119 | LoadStore() : var(), value(-1), value2(-1), cbarInstance(-1) {} 120 | string var; 121 | int value; 122 | int value2; 123 | int cbarInstance; 124 | }; 125 | 126 | // Track what instruction fields are set for each instruction. 127 | class InstructionState { 128 | public: 129 | 130 | InstructionState() : loadStore(100), threads(100) {} 131 | 132 | set W, R, F, A, ACQ, REL, SC0, SC1, SEMSC0, SEMSC1, SCOPESG, SCOPEWG, SCOPEQF, SCOPEDEV, CBAR, AVDEVICE, VISDEVICE, SEMAV, SEMVIS, AV, VIS, NONPRIV; 133 | 134 | vector loadStore; 135 | 136 | // Track the set of instructions in each thread 137 | vector > threads; 138 | 139 | bool isRead(int instnum) const { return R.find(instnum) != R.end(); } 140 | bool isWrite(int instnum) const { return W.find(instnum) != W.end(); } 141 | int getReadValue(int instnum) const 142 | { 143 | if (!isRead(instnum)) { 144 | printf("WARNING: calling getReadValue on a non-read"); 145 | } 146 | return loadStore[instnum].value; 147 | } 148 | int getWriteValue(int instnum) const 149 | { 150 | if (!isWrite(instnum)) { 151 | printf("WARNING: calling getWriteValue on a non-write"); 152 | } 153 | return (isRead(instnum) && isWrite(instnum)) ? loadStore[instnum].value2 : loadStore[instnum].value; 154 | } 155 | 156 | void processToken(const string &token, int instnum) 157 | { 158 | #define CASE(X, Y) if (token == Y) { X.insert(instnum); } 159 | CASE(W, "st") 160 | CASE(R, "ld") 161 | CASE(F, "membar") 162 | CASE(A, "atom") 163 | CASE(ACQ, "acq") 164 | CASE(REL, "rel") 165 | CASE(SC0, "sc0") 166 | CASE(SC1, "sc1") 167 | CASE(SEMSC0, "semsc0") 168 | CASE(SEMSC1, "semsc1") 169 | CASE(SCOPESG, "scopesg") 170 | CASE(SCOPEWG, "scopewg") 171 | CASE(SCOPEQF, "scopeqf") 172 | CASE(SCOPEDEV, "scopedev") 173 | CASE(CBAR, "cbar") 174 | // "rmw" is an alias for R, W, and A 175 | CASE(R, "rmw") 176 | CASE(W, "rmw") 177 | CASE(A, "rmw") 178 | CASE(AVDEVICE, "avdevice") 179 | CASE(VISDEVICE, "visdevice") 180 | CASE(SEMAV, "semav") 181 | CASE(SEMVIS, "semvis") 182 | CASE(AV, "av") 183 | CASE(VIS, "vis") 184 | CASE(NONPRIV, "nonpriv") 185 | #undef CASE 186 | 187 | // CBARs are also treated as fences if they acq/rel 188 | if ((ACQ.find(instnum) != ACQ.end() || REL.find(instnum) != REL.end()) && 189 | CBAR.find(instnum) != CBAR.end()) { 190 | F.insert(instnum); 191 | } 192 | // Atomics implicitly have AV/VIS ops 193 | if (A.find(instnum) != A.end()) { 194 | if (W.find(instnum) != W.end()) { 195 | AV.insert(instnum); 196 | } 197 | if (R.find(instnum) != R.end()) { 198 | VIS.insert(instnum); 199 | } 200 | } 201 | // AV, VIS, and atomics are all implicitly nonpriv 202 | if (AV.find(instnum) != AV.end() || 203 | VIS.find(instnum) != VIS.end() || 204 | A.find(instnum) != A.end()) { 205 | NONPRIV.insert(instnum); 206 | } 207 | } 208 | 209 | // print "X.name = E2+...+En" or "X.name = none" 210 | void printOne(stringstream &o, const set &s, string name) 211 | { 212 | o << " X." << name << " = "; 213 | set::iterator it; 214 | if (s.begin() == s.end()) { 215 | o << "none"; 216 | } else { 217 | for (it = s.begin(); it != s.end();) { 218 | o << "E" << *it; 219 | it++; 220 | if (it != s.end()) { 221 | o << "+"; 222 | } 223 | } 224 | } 225 | o << endl; 226 | } 227 | 228 | void print(stringstream &o) 229 | { 230 | #define CASE(X) printOne(o, X, #X); 231 | CASE(W) 232 | CASE(R) 233 | CASE(F) 234 | CASE(A) 235 | CASE(ACQ) 236 | CASE(REL) 237 | CASE(SC0) 238 | CASE(SC1) 239 | CASE(SEMSC0) 240 | CASE(SEMSC1) 241 | CASE(SCOPESG) 242 | CASE(SCOPEWG) 243 | CASE(SCOPEQF) 244 | CASE(SCOPEDEV) 245 | CASE(CBAR) 246 | CASE(AVDEVICE) 247 | CASE(VISDEVICE) 248 | CASE(SEMAV) 249 | CASE(SEMVIS) 250 | CASE(AV) 251 | CASE(VIS) 252 | CASE(NONPRIV) 253 | #undef CASE 254 | } 255 | 256 | void warn(int instnum) 257 | { 258 | if ((A.find(instnum) != A.end() || 259 | F.find(instnum) != F.end() || 260 | CBAR.find(instnum) != CBAR.end() || 261 | AV.find(instnum) != AV.end() || 262 | VIS.find(instnum) != VIS.end()) && 263 | (SCOPESG.find(instnum) == SCOPESG.end() && 264 | SCOPEWG.find(instnum) == SCOPEWG.end() && 265 | SCOPEQF.find(instnum) == SCOPEQF.end() && 266 | SCOPEDEV.find(instnum) == SCOPEDEV.end())) { 267 | fprintf(stderr, "WARNING: atomic or barrier or av/vis without scope\n"); 268 | } 269 | if (R.find(instnum) != R.end() || 270 | W.find(instnum) != W.end()) { 271 | if (SC0.find(instnum) == SC0.end() && SC1.find(instnum) == SC1.end()) { 272 | fprintf(stderr, "WARNING: read or write without storage class\n"); 273 | } 274 | if (loadStore[instnum].var == "") { 275 | fprintf(stderr, "WARNING: read or write without variable\n"); 276 | } 277 | } 278 | if (CBAR.find(instnum) != CBAR.end() && 279 | loadStore[instnum].cbarInstance == -1) { 280 | fprintf(stderr, "WARNING: cbar without instance\n"); 281 | } 282 | if (F.find(instnum) != F.end() && 283 | (ACQ.find(instnum) == ACQ.end() && REL.find(instnum) == REL.end())) { 284 | fprintf(stderr, "WARNING: membar without acq or rel\n"); 285 | } 286 | if (loadStore[instnum].value2 != -1 && 287 | (A.find(instnum) == A.end() || 288 | R.find(instnum) == R.end() || 289 | W.find(instnum) == W.end())) { 290 | fprintf(stderr, "WARNING: second value requires RMW atomic\n"); 291 | } 292 | if ((SEMSC0.find(instnum) != SEMSC0.end() || SEMSC1.find(instnum) != SEMSC1.end()) && 293 | !(ACQ.find(instnum) != ACQ.end() || REL.find(instnum) != REL.end())) { 294 | fprintf(stderr, "WARNING: ACQ+REL = SEMSC0+SEMSC1\n"); 295 | } 296 | if (SEMAV.find(instnum) != SEMAV.end() && REL.find(instnum) == REL.end()) { 297 | fprintf(stderr, "WARNING: SEMAV in REL\n"); 298 | } 299 | if (SEMVIS.find(instnum) != SEMVIS.end() && ACQ.find(instnum) == ACQ.end()) { 300 | fprintf(stderr, "WARNING: SEMVIS in ACQ\n"); 301 | } 302 | } 303 | }; 304 | 305 | // If allB is false, print the sequence Ea->Ea+1->...Eb-1. If allB is true, 306 | // print Ea->Eb, Ea+1->Eb, ... Eb-1->Eb 307 | void sequenceInSuffix(stringstream &o, int a, int b, bool allB, string suffix) 308 | { 309 | if (a == b) { 310 | return; 311 | } 312 | for (int i = a; i < b; ++i) { 313 | int j = allB ? b : (i+1); 314 | o << "(E" << i << "->E" << j << ")"; 315 | if (i != b-1) { 316 | o << "+"; 317 | } 318 | } 319 | 320 | o << suffix << "\n"; 321 | } 322 | 323 | int main(int argc, char *argv[]) 324 | { 325 | string line; 326 | InstructionState instState; 327 | int instnum = -1; 328 | int firstInstInThread = 0; 329 | int firstInstInSG = 0; 330 | int firstInstInWG = 0; 331 | int firstInstInQF = 0; 332 | 333 | if (argc != 4) { 334 | printf("usage: litmus name inputdir outputdir\n"); 335 | return 1; 336 | } 337 | 338 | ifstream in; 339 | in.open(string(argv[2])+"/"+argv[1]); 340 | 341 | stringstream o; 342 | 343 | int threadnum = 0; 344 | int numEvents = 0; 345 | int bitwidth = 0; 346 | 347 | vector sswInputs; 348 | vector slocInputs; 349 | vector testInputs; 350 | 351 | while (getline(in, line)) { 352 | // skip comments 353 | if (line.length() < 2 || line.substr(0, 2) == "//") { 354 | continue; 355 | } 356 | 357 | while (line.back() == '\r' || line.back() == '\n') { 358 | line.pop_back(); 359 | } 360 | 361 | if (line.find("SATISFIABLE") == 0 || line.find("NOSOLUTION") == 0) { 362 | testInputs.push_back(line); 363 | continue; 364 | } 365 | 366 | if (line.find("SSW") == 0) { 367 | sswInputs.push_back(line); 368 | continue; 369 | } 370 | 371 | if (line.find("SLOC") == 0) { 372 | slocInputs.push_back(line); 373 | continue; 374 | } 375 | 376 | // Close a queue family 377 | if (line.find("NEWQF") != string::npos) { 378 | if (instnum != -1) { 379 | o << " "; sequenceInSuffix(o, firstInstInQF, instnum, false, " in X.sqf"); 380 | o << " no ("; sequenceInSuffix(o, 0, instnum+1, true, ") & X.sqf"); 381 | firstInstInQF = instnum+1; 382 | } 383 | continue; 384 | } 385 | 386 | // Close a workgroup 387 | if (line.find("NEWWG") != string::npos) { 388 | if (instnum != -1) { 389 | o << " "; sequenceInSuffix(o, firstInstInWG, instnum, false, " in X.swg"); 390 | o << " no ("; sequenceInSuffix(o, 0, instnum+1, true, ") & X.swg"); 391 | firstInstInWG = instnum+1; 392 | } 393 | continue; 394 | } 395 | 396 | // Close a subgroup 397 | if (line.find("NEWSG") != string::npos) { 398 | if (instnum != -1) { 399 | o << " "; sequenceInSuffix(o, firstInstInSG, instnum, false, " in X.ssg"); 400 | o << " no ("; sequenceInSuffix(o, 0, instnum+1, true, ") & X.ssg"); 401 | firstInstInSG = instnum+1; 402 | } 403 | continue; 404 | } 405 | 406 | // Close a thread 407 | if (line.find("NEWTHREAD") != string::npos) { 408 | if (instnum != -1) { 409 | o << " "; sequenceInSuffix(o, firstInstInThread, instnum, false, " in X.immpo"); 410 | o << " no ("; sequenceInSuffix(o, 0, instnum+1, true, ") & X.immpo"); 411 | firstInstInThread = instnum+1; 412 | } 413 | // look for a thread number, otherwise just increment to the next 414 | // thread number 415 | size_t nextpos = line.find_first_of("0123456789"); 416 | if (nextpos != string::npos) { 417 | line = line.substr(nextpos); 418 | threadnum = atoi(line.c_str()); 419 | } else { 420 | threadnum++; 421 | } 422 | assert(instState.threads[threadnum].empty()); 423 | continue; 424 | } 425 | 426 | // parse an instruction 427 | instnum++; 428 | 429 | instState.threads[threadnum].insert(instnum); 430 | 431 | // Peel out the instruction (everything before the first space) 432 | // and look at each token (separated by '.') 433 | size_t firstspace = line.find(' '); 434 | string inst = line.substr(0, firstspace); 435 | 436 | while (true) { 437 | size_t nextpos = inst.find('.'); 438 | string token = inst.substr(0, nextpos); 439 | 440 | instState.processToken(token, instnum); 441 | 442 | if (nextpos == string::npos) { 443 | break; 444 | } 445 | inst = inst.substr(nextpos+1); 446 | } 447 | 448 | // Look for a variable assignment (e.g. "x = 1") or 449 | // a control barrier dynamic instance number 450 | if (line.length() > firstspace) { 451 | if (instState.CBAR.find(instnum) != instState.CBAR.end()) { 452 | line = line.substr(firstspace); 453 | line = line.substr(line.find_first_not_of(" ")); 454 | instState.loadStore[instnum].cbarInstance = atoi(line.c_str()); 455 | } else { 456 | line = line.substr(firstspace); 457 | line = line.substr(line.find_first_not_of(" =")); 458 | string var = line.substr(0, line.find_first_of(" =")); 459 | 460 | instState.loadStore[instnum].var = var; 461 | 462 | line = line.substr(var.length()); 463 | 464 | if (line.find('=') != string::npos) { 465 | line = line.substr(line.find_first_not_of(" =")); 466 | 467 | instState.loadStore[instnum].value = atoi(line.c_str()); 468 | } 469 | // Look for whitespace and another value 470 | if (line.find(' ') != string::npos) { 471 | line = line.substr(line.find(' ')); 472 | 473 | if (line.find_first_of("1234567890")) { 474 | line = line.substr(line.find_first_not_of(" ")); 475 | instState.loadStore[instnum].value2 = atoi(line.c_str()); 476 | } 477 | } 478 | } 479 | } 480 | 481 | instState.warn(instnum); 482 | } 483 | 484 | numEvents = instnum+1; 485 | bitwidth = ceil(log2(numEvents * numEvents + 1) + 1); 486 | 487 | stringstream ssw; 488 | for (size_t i = 0; i < sswInputs.size(); ++i) { 489 | line = sswInputs[i]; 490 | int threadA, threadB; 491 | line = line.substr(strlen("SSW")); 492 | line = line.substr(line.find_first_of("1234567890")); 493 | threadA = atoi(line.c_str()); 494 | line = line.substr(line.find(" ")); 495 | line = line.substr(line.find_first_of("1234567890")); 496 | threadB = atoi(line.c_str()); 497 | 498 | if (ssw.str().length() != 0) { 499 | ssw << "+"; 500 | } 501 | bool first = true; 502 | // SSW from each instruction of threadA to each instruction of threadB 503 | for (int i = *instState.threads[threadA].begin(); i <= *instState.threads[threadA].rbegin(); ++i) { 504 | for (int j = *instState.threads[threadB].begin(); j <= *instState.threads[threadB].rbegin(); ++j) { 505 | if (!first) { 506 | ssw << "+"; 507 | } 508 | first = false; 509 | ssw << "E" << i << "->E" << j; 510 | } 511 | } 512 | } 513 | if (ssw.str().length() == 0) { 514 | o << " no X.ssw\n"; 515 | } else { 516 | o << " X.ssw = " << ssw.str() << "\n"; 517 | } 518 | 519 | // Close the last QF/WG/SG/thread 520 | o << " "; sequenceInSuffix(o, firstInstInQF, instnum, false, " in X.sqf"); 521 | o << " "; sequenceInSuffix(o, firstInstInWG, instnum, false, " in X.swg"); 522 | o << " "; sequenceInSuffix(o, firstInstInSG, instnum, false, " in X.ssg"); 523 | o << " "; sequenceInSuffix(o, firstInstInThread, instnum, false, " in X.immpo"); 524 | 525 | // no backwards/self edges (En->Em with n>=m) in immpo 526 | o << " no *("; 527 | for (int i = 1; i <= instnum; ++i) { 528 | o << "(E" << i << "->E" << i-1 << ")"; 529 | if (i != instnum) o << "+"; 530 | } 531 | o << ") & X.immpo\n"; 532 | 533 | 534 | // print simple state for all instructions 535 | instState.print(o); 536 | 537 | // Determine read-from and RFINIT from the variable load/stores 538 | for (int i = 0; i <= instnum; ++i) { 539 | for (int j = 0; j <= instnum; ++j) { 540 | if (instState.loadStore[j].var != "") { 541 | if (instState.loadStore[i].var == instState.loadStore[j].var && 542 | instState.isWrite(i) && instState.isRead(j) && 543 | instState.getWriteValue(i) == instState.getReadValue(j)) { 544 | o << " (E" << i << "->E" << j << ") in X.rf\n"; 545 | } else if (i == j && instState.isRead(j) && instState.getReadValue(j) == 0) { 546 | o << " E" << j << " in X.RFINIT\n"; 547 | } 548 | } 549 | } 550 | } 551 | 552 | // Find each new variable and put all uses of it in X.pgmsref 553 | set variables; 554 | bool firstSref = true; 555 | for (int j = 0; j <= instnum; ++j) { 556 | string v = instState.loadStore[j].var; 557 | if (v != "" && variables.find(v) == variables.end()) { 558 | variables.insert(v); 559 | for (int i = j+1; i <= instnum; ++i) { 560 | if (instState.loadStore[i].var == v) { 561 | if (firstSref) { 562 | o << " X.pgmsref = "; 563 | } else { 564 | o << "+"; 565 | } 566 | firstSref = false; 567 | o << "(E" << i << "->E" << j << ")"; 568 | } 569 | } 570 | } 571 | } 572 | if (firstSref) { 573 | o << " no X.pgmsref"; 574 | } 575 | o << "\n"; 576 | o << " X.pgmsloc = X.pgmsref"; 577 | 578 | stringstream sloc; 579 | for (size_t i = 0; i < slocInputs.size(); ++i) { 580 | line = slocInputs[i]; 581 | 582 | string locA, locB; 583 | line = line.substr(strlen("SLOC")); 584 | line = line.substr(line.find_first_not_of(" ")); 585 | locA = line.substr(0, line.find(" ")); 586 | line = line.substr(line.find(" ")); 587 | line = line.substr(line.find_first_not_of(" ")); 588 | locB = line.substr(0, line.find(" ")); 589 | 590 | for (int i = 0; i <= instnum; ++i) { 591 | for (int j = 0; j <= instnum; ++j) { 592 | if (instState.loadStore[i].var == locA && 593 | instState.loadStore[j].var == locB) { 594 | o << "+(E" << i << "->E" << j << ")"; 595 | } 596 | } 597 | } 598 | } 599 | o << "\n"; 600 | 601 | // print groups of related control barrier instances 602 | set cbarInsts; 603 | for (int j = 0; j <= instnum; ++j) { 604 | int v = instState.loadStore[j].cbarInstance; 605 | if (v != -1 && cbarInsts.find(v) == cbarInsts.end()) { 606 | cbarInsts.insert(v); 607 | o << " "; 608 | bool first = true; 609 | for (int i = j+1; i <= instnum; ++i) { 610 | if (instState.loadStore[i].cbarInstance == v) { 611 | if (!first) { 612 | o << "+"; 613 | } 614 | first = false; 615 | o << "(E" << i << "->E" << j << ")"; 616 | } 617 | } 618 | o << " in X.scbarinst\n"; 619 | 620 | if (j != 0) { 621 | o << " no ("; sequenceInSuffix(o, 0, j, true, ") & X.scbarinst"); 622 | } 623 | } 624 | } 625 | 626 | ofstream outals, outreference; 627 | // outputdir/filename.gen 628 | outals.open(string(argv[3])+"/"+argv[1]+".gen"); 629 | // outputdir/filename.ref 630 | outreference.open(string(argv[3])+"/"+argv[1]+".ref"); 631 | 632 | outals << "open spirv\n"; 633 | int testnum = 0; 634 | for (size_t i = 0; i < testInputs.size(); ++i) { 635 | line = testInputs[i]; 636 | 637 | if (line.find("SATISFIABLE") != 0 && line.find("NOSOLUTION") != 0) { 638 | printf("error in tests\n"); 639 | return 1; 640 | } 641 | if (line.find("SATISFIABLE") == 0) { 642 | line = line.substr(strlen("SATISFIABLE")); 643 | outreference << "SATISFIABLE\n"; 644 | } else { 645 | line = line.substr(strlen("NOSOLUTION")); 646 | outreference << "NOSOLUTION\n"; 647 | } 648 | 649 | bool noChains = false; 650 | if (line.find("NOCHAINS") != string::npos) { 651 | noChains = true; 652 | line = line.substr(line.find("NOCHAINS") + strlen("NOCHAINS")); 653 | } 654 | 655 | outals << "pred gentest" << testnum << "[X:Exec] {\n"; 656 | outals << " #Exec = 1\n"; 657 | outals << " #E = " << numEvents << "\n"; 658 | outals << " some disj "; 659 | 660 | for (int i = 0; i < numEvents; ++i) { 661 | outals << "E" << i; 662 | if (i != numEvents-1) { 663 | outals << ","; 664 | } 665 | } 666 | outals << " : E {\n"; 667 | outals << o.str(); 668 | if (noChains) { 669 | outals << " X.chains = stor[X.EV]\n"; 670 | } else { 671 | outals << " X.chains = (X.EV -> X.EV)\n"; 672 | } 673 | outals << " }\n"; 674 | outals << " " << line << "\n"; 675 | outals << "}\n"; 676 | outals << "run gentest" << testnum << " "; 677 | outals << "for exactly 1 spirv/Exec, "; 678 | outals << "exactly " << numEvents << " spirv/E, "; 679 | outals << bitwidth << " int" << "\n"; 680 | testnum++; 681 | } 682 | 683 | return 0; 684 | } 685 | --------------------------------------------------------------------------------