├── .gitignore ├── .travis.yml ├── README.md ├── avr ├── README.md ├── boards.txt ├── bootloaders │ └── optiboot │ │ ├── ATmega1284.md │ │ ├── Makefile │ │ ├── Makefile.isp │ │ ├── README.md │ │ ├── baudcheck.c │ │ ├── boot.h │ │ ├── makeall │ │ ├── omake │ │ ├── omake.bat │ │ ├── optiboot.c │ │ ├── optiboot_atmega1284p.hex │ │ ├── optiboot_atmega1284p.lst │ │ ├── optiboot_atmega1284p_8m.hex │ │ ├── optiboot_atmega1284p_8m.lst │ │ ├── optiboot_atmega644.hex │ │ ├── optiboot_atmega644.lst │ │ ├── optiboot_atmega644_8m.hex │ │ ├── optiboot_atmega644_8m.lst │ │ ├── optiboot_atmega644p.hex │ │ ├── optiboot_atmega644p.lst │ │ ├── optiboot_atmega644p_8m.hex │ │ ├── optiboot_atmega644p_8m.lst │ │ ├── optiboot_balanduino.hex │ │ ├── optiboot_balanduino.lst │ │ ├── optiboot_balanduino644.hex │ │ ├── optiboot_balanduino644.lst │ │ ├── pin_defs.h │ │ └── stk500.h ├── libraries │ └── README.md └── variants │ └── sanguino │ └── pins_arduino.h ├── boards.txt ├── bootloaders └── optiboot │ ├── ATmega1284.md │ ├── Makefile │ ├── Makefile.isp │ ├── README.md │ ├── baudcheck.c │ ├── boot.h │ ├── makeall │ ├── omake │ ├── omake.bat │ ├── optiboot.c │ ├── optiboot_atmega1284p.hex │ ├── optiboot_atmega1284p.lst │ ├── optiboot_atmega1284p_8m.hex │ ├── optiboot_atmega1284p_8m.lst │ ├── optiboot_atmega644.hex │ ├── optiboot_atmega644.lst │ ├── optiboot_atmega644_8m.hex │ ├── optiboot_atmega644_8m.lst │ ├── optiboot_atmega644p.hex │ ├── optiboot_atmega644p.lst │ ├── optiboot_atmega644p_8m.hex │ ├── optiboot_atmega644p_8m.lst │ ├── optiboot_balanduino.hex │ ├── optiboot_balanduino.lst │ ├── optiboot_balanduino644.hex │ ├── optiboot_balanduino644.lst │ ├── pin_defs.h │ └── stk500.h ├── gpl2.txt ├── package_lauszus_sanguino_index.json ├── release.sh └── variants └── sanguino └── pins_arduino.h /.gitignore: -------------------------------------------------------------------------------- 1 | baudcheck.tmp.sh -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | language: c 2 | 3 | sudo: false 4 | 5 | before_install: 6 | - source <(curl -SLs https://raw.githubusercontent.com/fede2cr/travis-ci-arduino/master/install.sh) 7 | 8 | install: 9 | - arduino --pref "boardsmanager.additional.urls=https://raw.githubusercontent.com/Lauszus/Sanguino/master/package_lauszus_sanguino_index.json" --save-prefs 10 | - arduino --install-boards Sanguino:avr 11 | - export BLINK=$(find $HOME/arduino_ide -type f -name 'Blink.ino' -print -quit) 12 | - echo "Compiling \"$BLINK\"" 13 | 14 | script: 15 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega644 $BLINK 16 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega644_8m $BLINK 17 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega644p $BLINK 18 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega644p_8m $BLINK 19 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega1284p $BLINK 20 | - arduino --verify --board Sanguino:avr:sanguino:cpu=atmega1284p_8m $BLINK 21 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Sanguino 2 | #### Developed by Kristian Sloth Lauszus, 2012 3 | 4 | The code is released under the GNU General Public License. 5 | _________ 6 | [![Build Status](https://travis-ci.org/Lauszus/Sanguino.svg?branch=master)](https://travis-ci.org/Lauszus/Sanguino) 7 | 8 | This is a Sanguino third-party hardware add-on for the Arduino IDE. 9 | 10 | To use this add-on simply add the following url: to the Arduino boards manager. Please see the following page for more information: . 11 | 12 | Advanced users can install the hardware add-on manually by creating a folder named "hardware" inside your sketchbook directory. Now move the Sanguino directory inside that folder. The structure would look like this: 13 | 14 | * Arduino/ 15 | * hardware/ 16 | * Sanguino/ 17 | * avr/ 18 | * bootloaders/ 19 | * variants/ 20 | * README.md 21 | * boards.txt 22 | 23 | ## PlatformIO 24 | 25 | It is also possible to use this add-on with [PlatformIO](https://platformio.org/). For instace you can use the Sanguino ATmega644 or ATmega644A running at 16 MHz by creating the following entry in your platformio.ini file: 26 | 27 | ```ini 28 | [env:sanguino_atmega644p] 29 | platform = atmelavr 30 | framework = arduino 31 | board = sanguino_atmega644p 32 | ``` 33 | 34 | This will also allow you to specify the upload speed by adding the following entry: 35 | 36 | ```ini 37 | upload_speed = 57600 38 | ``` 39 | 40 | This is needed if you have not burned the Optiboot bootloader. 41 | 42 | The list of boards can be found here: . 43 | 44 | ## ATmega1284 45 | 46 | Since the ATmega1284 is not supported by Avrdude. You will have to burn the bootloader manually from the command line. See this file for help: [ATmega1284.md](bootloaders/optiboot/ATmega1284.md). 47 | 48 | Also check out the following site for more information: . 49 | 50 | For more information see the following site: [http://www.arduino.cc/en/Guide/Environment#thirdpartyhardware](http://www.arduino.cc/en/Guide/Environment#thirdpartyhardware) 51 | or send me an email at lauszus@gmail.com. 52 | -------------------------------------------------------------------------------- /avr/README.md: -------------------------------------------------------------------------------- 1 | #### Developed by Kristian Sloth Lauszus, 2012 2 | 3 | The code is released under the GNU General Public License. 4 | _________ 5 | 6 | This content is needed so it's compatible with the Arduino IDE 1.5.x. 7 | 8 | For more information see the following sites: [http://www.arduino.cc/en/Guide/Environment#thirdpartyhardware](http://www.arduino.cc/en/Guide/Environment#thirdpartyhardware) and [http://code.google.com/p/arduino/wiki/Platforms1](http://code.google.com/p/arduino/wiki/Platforms1) 9 | or send me an email at lauszus@gmail.com. -------------------------------------------------------------------------------- /avr/boards.txt: -------------------------------------------------------------------------------- 1 | menu.cpu=Processor 2 | 3 | ############################################################## 4 | 5 | sanguino.name=Sanguino 6 | 7 | sanguino.upload.tool=arduino:avrdude 8 | sanguino.upload.protocol=arduino 9 | 10 | sanguino.bootloader.tool=arduino:avrdude 11 | sanguino.bootloader.low_fuses=0xFF 12 | sanguino.bootloader.high_fuses=0xDE 13 | sanguino.bootloader.extended_fuses=0xFD 14 | sanguino.bootloader.unlock_bits=0x3F 15 | sanguino.bootloader.lock_bits=0x0F 16 | 17 | sanguino.build.board=AVR_SANGUINO 18 | sanguino.build.core=arduino:arduino 19 | sanguino.build.variant=sanguino 20 | 21 | ###### ATmega644x 22 | 23 | ## Sanguino W/ ATmega644 or ATmega644A (16MHz) 24 | sanguino.menu.cpu.atmega644=ATmega644 or ATmega644A (16 MHz) 25 | 26 | sanguino.menu.cpu.atmega644.upload.maximum_size=64512 27 | sanguino.menu.cpu.atmega644.upload.maximum_data_size=4096 28 | sanguino.menu.cpu.atmega644.upload.speed=115200 29 | 30 | sanguino.menu.cpu.atmega644.bootloader.file=optiboot/optiboot_atmega644.hex 31 | 32 | sanguino.menu.cpu.atmega644.build.mcu=atmega644 33 | sanguino.menu.cpu.atmega644.build.f_cpu=16000000L 34 | 35 | ## Sanguino W/ ATmega644 or ATmega644A (8MHz) 36 | sanguino.menu.cpu.atmega644_8m=ATmega644 or ATmega644A (8 MHz) 37 | 38 | sanguino.menu.cpu.atmega644_8m.upload.maximum_size=64512 39 | sanguino.menu.cpu.atmega644_8m.upload.maximum_data_size=4096 40 | sanguino.menu.cpu.atmega644_8m.upload.speed=57600 41 | 42 | sanguino.menu.cpu.atmega644_8m.bootloader.file=optiboot/optiboot_atmega644_8m.hex 43 | 44 | sanguino.menu.cpu.atmega644_8m.build.mcu=atmega644 45 | sanguino.menu.cpu.atmega644_8m.build.f_cpu=8000000L 46 | 47 | ## Sanguino W/ ATmega644P or ATmega644PA (16MHz) 48 | sanguino.menu.cpu.atmega644p=ATmega644P or ATmega644PA (16 MHz) 49 | 50 | sanguino.menu.cpu.atmega644p.upload.maximum_size=64512 51 | sanguino.menu.cpu.atmega644p.upload.maximum_data_size=4096 52 | sanguino.menu.cpu.atmega644p.upload.speed=115200 53 | 54 | sanguino.menu.cpu.atmega644p.bootloader.file=optiboot/optiboot_atmega644p.hex 55 | 56 | sanguino.menu.cpu.atmega644p.build.mcu=atmega644p 57 | sanguino.menu.cpu.atmega644p.build.f_cpu=16000000L 58 | 59 | ## Sanguino W/ ATmega644P or ATmega644PA (8MHz) 60 | sanguino.menu.cpu.atmega644p_8m=ATmega644P or ATmega644PA (8 MHz) 61 | 62 | sanguino.menu.cpu.atmega644p_8m.upload.maximum_size=64512 63 | sanguino.menu.cpu.atmega644p_8m.upload.maximum_data_size=4096 64 | sanguino.menu.cpu.atmega644p_8m.upload.speed=57600 65 | 66 | sanguino.menu.cpu.atmega644p_8m.bootloader.file=optiboot/optiboot_atmega644p_8m.hex 67 | 68 | sanguino.menu.cpu.atmega644p_8m.build.mcu=atmega644p 69 | sanguino.menu.cpu.atmega644p_8m.build.f_cpu=8000000L 70 | 71 | ###### ATmega1284x 72 | 73 | ## Sanguino W/ ATmega1284 or ATmega1284P 16MHz 74 | sanguino.menu.cpu.atmega1284p=ATmega1284 or ATmega1284P (16 MHz) 75 | 76 | sanguino.menu.cpu.atmega1284p.upload.maximum_size=130048 77 | sanguino.menu.cpu.atmega1284p.upload.maximum_data_size=16384 78 | sanguino.menu.cpu.atmega1284p.upload.speed=115200 79 | 80 | sanguino.menu.cpu.atmega1284p.bootloader.file=optiboot/optiboot_atmega1284p.hex 81 | 82 | sanguino.menu.cpu.atmega1284p.build.mcu=atmega1284p 83 | sanguino.menu.cpu.atmega1284p.build.f_cpu=16000000L 84 | 85 | ## Sanguino W/ ATmega1284 or ATmega1284P 8MHz 86 | sanguino.menu.cpu.atmega1284p_8m=ATmega1284 or ATmega1284P (8 MHz) 87 | 88 | sanguino.menu.cpu.atmega1284p_8m.upload.maximum_size=130048 89 | sanguino.menu.cpu.atmega1284p_8m.upload.maximum_data_size=16384 90 | sanguino.menu.cpu.atmega1284p_8m.upload.speed=57600 91 | 92 | sanguino.menu.cpu.atmega1284p_8m.bootloader.file=optiboot/optiboot_atmega1284p_8m.hex 93 | 94 | sanguino.menu.cpu.atmega1284p_8m.build.mcu=atmega1284p 95 | sanguino.menu.cpu.atmega1284p_8m.build.f_cpu=8000000L 96 | 97 | ############################################################ -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/ATmega1284.md: -------------------------------------------------------------------------------- 1 | To burn the bootloader for the ATmega1284 running at 16MHz use the following command: 2 | 3 | ``` 4 | make atmega1284p_isp ISPPORT=/dev/tty.usbmodem26411 5 | ``` 6 | 7 | To burn the 8MHz bootloader use the following command: 8 | 9 | ``` 10 | make atmega1284p_8m_isp ISPPORT=/dev/tty.usbmodem26411 11 | ``` 12 | 13 | Also make sure to add -F to ISPFUSES and ISPFLASH in [Makefile.isp](Makefile.isp). -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/Makefile.isp: -------------------------------------------------------------------------------- 1 | # Makefile.isp for Optiboot 2 | # Bill Westfield (WestfW@yahoo.com) March, 2013 3 | # $Id$ 4 | # 5 | # Instructions: 6 | # 7 | # This is a "daughter" Makefile that burns the bootloader using a ISP 8 | # device programmer. It is designed to inherit assorted variables from 9 | # the parent optiboot "Makefile"... Using a daughter makefile makes 10 | # certain variable manipulations more obvious. 11 | # 12 | # To burn bootloader .hex file, invoke the main Makefile using: 13 | # make diecimila_isp 14 | # make lilypad_isp 15 | # make ng_isp 16 | # etc... 17 | 18 | # 19 | # Note: inherit paths/etc from parent Makefile. 20 | # 21 | 22 | #--------------------------------------------------------------------------- 23 | 24 | # enter the parameters for the avrdude isp tool -b19200 25 | # 26 | 27 | # Inherit avrdude paths from top-level makefile 28 | AVRDUDE_ROOT ?= $(GCCROOT) 29 | AVRDUDE_CONF ?= -C$(TOOLROOT)/avr/etc/avrdude.conf 30 | 31 | # These are the parameters for a usb-based STK500v2 programmer. 32 | # Exact type unknown. (historical Makefile values.) 33 | #ISPTOOL = stk500v2 34 | #ISPPORT = usb 35 | #ISPSPEED = -b 115200 36 | # 37 | # 38 | # These are parameters for using an Arduino with the ArduinoISP sketch 39 | # as the programmer. On a mac, for a particular Uno as programmer. 40 | ISPTOOL ?= stk500v1 41 | ISPPORT ?= /dev/tty.usbmodemfd3141 42 | ISPSPEED ?= -b19200 43 | 44 | 45 | 46 | # Not all chips have EFUSE. 47 | 48 | ifdef EFUSE 49 | EFUSE_CMD= -U efuse:w:0x$(EFUSE):m 50 | endif 51 | 52 | 53 | # There are certain complicated caused by the fact that the default state 54 | # of a fuse is a "1" rather than a "0", especially with respect to fuse bits 55 | # that have not been implemented. Those would normally not be included, but 56 | # unimplemented fuses still default to being "1" 57 | # 58 | # the efuse should really be 0xf8; since, however, only the lower 59 | # three bits of that byte are used on the atmega168, avrdude gets 60 | # confused if you specify 1's for the higher bits, see: 61 | # http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ 62 | # 63 | # similarly, the lock bits should be 0xff instead of 0x3f (to 64 | # unlock the bootloader section) and 0xcf instead of 0x2f (to 65 | # lock it), but since the high two bits of the lock byte are 66 | # unused, avrdude would get confused. 67 | 68 | # Set fuses and unlock memory 69 | ISPFUSES = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ 70 | -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ 71 | -e -u -U lock:w:0x3f:m $(EFUSE_CMD) \ 72 | -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m 73 | # program flash and lock memory. 74 | ISPFLASH = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ 75 | -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ 76 | -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m 77 | 78 | isp: $(PROGRAM)_$(TARGET).hex 79 | $(ISPFUSES) 80 | $(ISPFLASH) 81 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/README.md: -------------------------------------------------------------------------------- 1 | Forked from official Optiboot repo: . 2 | 3 | # Original text 4 | 5 | ------------------------------------------------------------ 6 | 7 | This directory contains the Optiboot small bootloader for AVR 8 | microcontrollers, somewhat modified specifically for the Arduino 9 | environment. 10 | 11 | Optiboot is more fully described here: 12 | and is the work of Peter Knight (aka Cathedrow), building on work of Jason P 13 | Kyle, Spiff, and Ladyada. Arduino-specific modification are by Bill 14 | Westfield (aka WestfW) 15 | 16 | Arduino-specific issues are tracked as part of the Arduino project 17 | at 18 | 19 | 20 | ------------------------------------------------------------ 21 | Building optiboot for Arduino. 22 | 23 | Production builds of optiboot for Arduino are done on a Mac in "unix mode" 24 | using CrossPack-AVR-20100115. CrossPack tracks WINAVR (for windows), which 25 | is just a package of avr-gcc and related utilities, so similar builds should 26 | work on Windows or Linux systems. 27 | 28 | One of the Arduino-specific changes is modifications to the makefile to 29 | allow building optiboot using only the tools installed as part of the 30 | Arduino environment, or the Arduino source development tree. All three 31 | build procedures should yield identical binaries (.hex files) (although 32 | this may change if compiler versions drift apart between CrossPack and 33 | the Arduino IDE.) 34 | 35 | 36 | Building Optiboot in the Arduino IDE Install. 37 | 38 | Work in the .../hardware/arduino/bootloaders/optiboot/ and use the 39 | "omake <targets>" command, which just generates a command that uses 40 | the arduino-included "make" utility with a command like: 41 | make OS=windows ENV=arduino <targets> 42 | or make OS=macosx ENV=arduino <targets> 43 | On windows, this assumes you're using the windows command shell. If 44 | you're using a cygwin or mingw shell, or have one of those in your 45 | path, the build will probably break due to slash vs backslash issues. 46 | On a Mac, if you have the developer tools installed, you can use the 47 | Apple-supplied version of make. 48 | The makefile uses relative paths ("../../../tools/" and such) to find 49 | the programs it needs, so you need to work in the existing optiboot 50 | directory (or something created at the same "level") for it to work. 51 | 52 | 53 | Building Optiboot in the Arduino Source Development Install. 54 | 55 | In this case, there is no special shell script, and you're assumed to 56 | have "make" installed somewhere in your path. 57 | Build the Arduino source ("ant build") to unpack the tools into the 58 | expected directory. 59 | Work in Arduino/hardware/arduino/bootloaders/optiboot and use 60 | make OS=windows ENV=arduinodev <targets> 61 | or make OS=macosx ENV=arduinodev <targets> 62 | 63 | 64 | Programming Chips Using the \_isp Targets 65 | 66 | The CPU targets have corresponding ISP targets that will actuall 67 | program the bootloader into a chip. "atmega328\_isp" for the atmega328, 68 | for example. These will set the fuses and lock bits as appropriate as 69 | well as uploading the bootloader code. 70 | 71 | ISP Targets in Version 5.0 and later: 72 | 73 | The isp targets are now built using a separate "Makefile.isp" makefile, 74 | which should make modification easier and more obvious. This also fixes 75 | the atmega8\_isp target problem mentioned below. The default 76 | configuration assumes an ArduinoISP setup, but you will probably need to 77 | update at least the serial port, since those are different for each 78 | Arduino board and/or system/ 79 | 80 | 81 | ISP Targets in Version 4.6 and earlier: 82 | 83 | The older makefiles default to using a USB programmer, but you can use a 84 | serial programmer like ArduinoISP by changing the appropriate variables 85 | when you invoke make: 86 | 87 | ``` 88 | make ISPTOOL=stk500v1 ISPPORT=/dev/tty.usbserial-A20e1eAN ISPSPEED=-b19200 atmega328_isp 89 | ``` 90 | 91 | The "atmega8\_isp" target does not currently work, because the mega8 92 | doesn't have the "extended" fuse that the generic ISP target wants to 93 | pass on to avrdude. You'll need to run avrdude manually. 94 | 95 | 96 | Standard Targets 97 | 98 | I've reduced the pre-built and source-version-controlled targets 99 | (.hex and .lst files included in the git repository) to just the 100 | three basic 16MHz targets: atmega8, atmega16, atmega328. 101 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/baudcheck.c: -------------------------------------------------------------------------------- 1 | /* 2 | * baudcheck.c 3 | * Mar, 2013 by Bill Westfield (WestfW@yahoo.com) 4 | * Exercises in executing arithmetic code on a system that we can't count 5 | * on having the usual languages or tools installed. 6 | * 7 | * This little "C program" is run through the C preprocessor using the same 8 | * arguments as our "real" target (which should assure that it gets the 9 | * same values for clock speed and desired baud rate), and produces as 10 | * output a shell script that can be run through bash, and THAT in turn 11 | * writes the desired output... 12 | * 13 | * Note that the C-style comments are stripped by the C preprocessor. 14 | */ 15 | 16 | /* 17 | * First strip any trailing "L" from the defined constants. To do this 18 | * we need to make the constants into shell variables first. 19 | */ 20 | bpsx=BAUD_RATE 21 | bps=${bpsx/L/} 22 | fcpux=F_CPU 23 | fcpu=${fcpux/L/} 24 | 25 | // echo f_cpu = $fcpu, baud = $bps 26 | /* 27 | * Compute the divisor 28 | */ 29 | BAUD_SETTING=$(( ( ($fcpu + $bps * 4) / (($bps * 8))) - 1 )) 30 | // echo baud setting = $BAUD_SETTING 31 | 32 | /* 33 | * Based on the computer divisor, calculate the actual bitrate, 34 | * And the error. Since we're all integers, we have to calculate 35 | * the tenths part of the error separately. 36 | */ 37 | BAUD_ACTUAL=$(( ($fcpu/(8 * (($BAUD_SETTING)+1))) )) 38 | BAUD_ERROR=$(( (( 100*($bps - $BAUD_ACTUAL) ) / $bps) )) 39 | ERR_TS=$(( ((( 1000*($bps - $BAUD_ACTUAL) ) / $bps) - $BAUD_ERROR * 10) )) 40 | ERR_TENTHS=$(( ERR_TS > 0 ? ERR_TS: -ERR_TS )) 41 | 42 | /* 43 | * Print a nice message containing the info we've calculated 44 | */ 45 | echo BAUD RATE CHECK: Desired: $bps, Real: $BAUD_ACTUAL, UBRRL = $BAUD_SETTING, Error=$BAUD_ERROR.$ERR_TENTHS\% 46 | 47 | 48 | 49 | 50 | 51 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/makeall: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | make clean 3 | # 4 | # buildable platforms of somewhat questionable support level 5 | #make lilypad 6 | #make pro8 7 | #make pro16 8 | #make pro20 9 | #make atmega328_pro8 10 | #make sanguino 11 | #make mega 12 | #make atmega88 13 | #make luminet 14 | #make diecimila 15 | # 16 | # The "big three" standard bootloaders. 17 | # These need to be built AFTER the platforms, or they'll get removed 18 | #make atmega8 19 | #make atmega168 20 | #make atmega328 21 | 22 | make balanduino644 23 | make balanduino 24 | 25 | make atmega644_8m 26 | make atmega644p_8m 27 | make atmega1284p_8m 28 | 29 | make atmega644 30 | make atmega644p 31 | make atmega1284p -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/omake: -------------------------------------------------------------------------------- 1 | echo ../../../tools/avr/bin/make OS=macosx ENV=arduino $* 2 | ../../../tools/avr/bin/make OS=macosx ENV=arduino $* 3 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/omake.bat: -------------------------------------------------------------------------------- 1 | ..\..\..\tools\avr\utils\bin\make OS=windows ENV=arduino %* 2 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega1284p.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C20080E18093C4008EE032 5 | :10FC3000B8D0209A26E080E39CEF31E090938500D5 6 | :10FC40008093840036BBB09BFECF189AA8952150B4 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega1284p_8m.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C20080E18093C4008EE032 5 | :10FC3000B8D0209A26E088E19EEF31E090938500CD 6 | :10FC40008093840036BBB09BFECF189AA8952150B4 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega644.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E080E39CEF31E090938500DA 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega644.lst: -------------------------------------------------------------------------------- 1 | 2 | optiboot_atmega644.elf: file format elf32-avr 3 | 4 | Sections: 5 | Idx Name Size VMA LMA File off Algn 6 | 0 .data 00000000 00800100 0000fdce 00000242 2**0 7 | CONTENTS, ALLOC, LOAD, DATA 8 | 1 .text 000001ce 0000fc00 0000fc00 00000074 2**1 9 | CONTENTS, ALLOC, LOAD, READONLY, CODE 10 | 2 .version 00000002 0000fffe 0000fffe 00000242 2**0 11 | CONTENTS, READONLY 12 | 3 .comment 00000011 00000000 00000000 00000244 2**0 13 | CONTENTS, READONLY 14 | 4 .debug_aranges 00000028 00000000 00000000 00000255 2**0 15 | CONTENTS, READONLY, DEBUGGING 16 | 5 .debug_info 0000041f 00000000 00000000 0000027d 2**0 17 | CONTENTS, READONLY, DEBUGGING 18 | 6 .debug_abbrev 000001cb 00000000 00000000 0000069c 2**0 19 | CONTENTS, READONLY, DEBUGGING 20 | 7 .debug_line 00000190 00000000 00000000 00000867 2**0 21 | CONTENTS, READONLY, DEBUGGING 22 | 8 .debug_frame 00000094 00000000 00000000 000009f8 2**2 23 | CONTENTS, READONLY, DEBUGGING 24 | 9 .debug_str 00000121 00000000 00000000 00000a8c 2**0 25 | CONTENTS, READONLY, DEBUGGING 26 | 10 .debug_loc 0000023b 00000000 00000000 00000bad 2**0 27 | CONTENTS, READONLY, DEBUGGING 28 | 11 .debug_ranges 00000048 00000000 00000000 00000de8 2**0 29 | CONTENTS, READONLY, DEBUGGING 30 | 31 | Disassembly of section .text: 32 | 33 | 0000fc00
: 34 | # define UART_SRL UBRR3L 35 | # define UART_UDR UDR3 36 | #endif 37 | 38 | /* main program starts here */ 39 | int main(void) { 40 | fc00: 1f 92 push r1 41 | fc02: cd b7 in r28, 0x3d ; 61 42 | fc04: de b7 in r29, 0x3e ; 62 43 | // SP points to RAMEND 44 | // r1 contains zero 45 | // 46 | // If not, uncomment the following instructions: 47 | // cli(); 48 | asm volatile ("clr __zero_reg__"); 49 | fc06: 11 24 eor r1, r1 50 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 51 | SP=RAMEND; // This is done by hardware reset 52 | #endif 53 | 54 | // Adaboot no-wait mod 55 | ch = MCUSR; 56 | fc08: 84 b7 in r24, 0x34 ; 52 57 | MCUSR = 0; 58 | fc0a: 14 be out 0x34, r1 ; 52 59 | if (!(ch & _BV(EXTRF))) appStart(ch); 60 | fc0c: 81 ff sbrs r24, 1 61 | fc0e: d9 d0 rcall .+434 ; 0xfdc2 62 | 63 | #if LED_START_FLASHES > 0 64 | // Set up Timer 1 for timeout counter 65 | TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 66 | fc10: 85 e0 ldi r24, 0x05 ; 5 67 | fc12: 80 93 81 00 sts 0x0081, r24 68 | UCSRA = _BV(U2X); //Double speed mode USART 69 | UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx 70 | UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 71 | UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 72 | #else 73 | UART_SRA = _BV(U2X0); //Double speed mode USART0 74 | fc16: 82 e0 ldi r24, 0x02 ; 2 75 | fc18: 80 93 c0 00 sts 0x00C0, r24 76 | UART_SRB = _BV(RXEN0) | _BV(TXEN0); 77 | fc1c: 88 e1 ldi r24, 0x18 ; 24 78 | fc1e: 80 93 c1 00 sts 0x00C1, r24 79 | UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); 80 | fc22: 86 e0 ldi r24, 0x06 ; 6 81 | fc24: 80 93 c2 00 sts 0x00C2, r24 82 | UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 83 | fc28: 80 e1 ldi r24, 0x10 ; 16 84 | fc2a: 80 93 c4 00 sts 0x00C4, r24 85 | #endif 86 | #endif 87 | 88 | // Set up watchdog to trigger after 500ms 89 | watchdogConfig(WATCHDOG_1S); 90 | fc2e: 8e e0 ldi r24, 0x0E ; 14 91 | fc30: b3 d0 rcall .+358 ; 0xfd98 92 | 93 | #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) 94 | /* Set LED pin as output */ 95 | LED_DDR |= _BV(LED); 96 | fc32: 20 9a sbi 0x04, 0 ; 4 97 | fc34: 26 e0 ldi r18, 0x06 ; 6 98 | } 99 | 100 | #if LED_START_FLASHES > 0 101 | void flash_led(uint8_t count) { 102 | do { 103 | TCNT1 = -(F_CPU/(1024*16)); 104 | fc36: 80 e3 ldi r24, 0x30 ; 48 105 | fc38: 9c ef ldi r25, 0xFC ; 252 106 | TIFR1 = _BV(TOV1); 107 | fc3a: 31 e0 ldi r19, 0x01 ; 1 108 | } 109 | 110 | #if LED_START_FLASHES > 0 111 | void flash_led(uint8_t count) { 112 | do { 113 | TCNT1 = -(F_CPU/(1024*16)); 114 | fc3c: 90 93 85 00 sts 0x0085, r25 115 | fc40: 80 93 84 00 sts 0x0084, r24 116 | TIFR1 = _BV(TOV1); 117 | fc44: 36 bb out 0x16, r19 ; 22 118 | while(!(TIFR1 & _BV(TOV1))); 119 | fc46: b0 9b sbis 0x16, 0 ; 22 120 | fc48: fe cf rjmp .-4 ; 0xfc46 121 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 122 | LED_PORT ^= _BV(LED); 123 | #else 124 | LED_PIN |= _BV(LED); 125 | fc4a: 18 9a sbi 0x03, 0 ; 3 126 | } 127 | #endif 128 | 129 | // Watchdog functions. These are only safe with interrupts turned off. 130 | void watchdogReset() { 131 | __asm__ __volatile__ ( 132 | fc4c: a8 95 wdr 133 | fc4e: 21 50 subi r18, 0x01 ; 1 134 | LED_PORT ^= _BV(LED); 135 | #else 136 | LED_PIN |= _BV(LED); 137 | #endif 138 | watchdogReset(); 139 | } while (--count); 140 | fc50: a9 f7 brne .-22 ; 0xfc3c 141 | fc52: 81 2c mov r8, r1 142 | fc54: 91 2c mov r9, r1 143 | ch = SPM_PAGESIZE / 2; 144 | do { 145 | uint16_t a; 146 | a = *bufPtr++; 147 | a |= (*bufPtr++) << 8; 148 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 149 | fc56: ee 24 eor r14, r14 150 | fc58: e3 94 inc r14 151 | addrPtr += 2; 152 | } while (--ch); 153 | 154 | // Write from programming buffer 155 | __boot_page_write_short((uint16_t)(void*)address); 156 | fc5a: 95 e0 ldi r25, 0x05 ; 5 157 | fc5c: d9 2e mov r13, r25 158 | boot_spm_busy_wait(); 159 | 160 | #if defined(RWWSRE) 161 | // Reenable read access to flash 162 | boot_rww_enable(); 163 | fc5e: 21 e1 ldi r18, 0x11 ; 17 164 | fc60: c2 2e mov r12, r18 165 | 166 | // If we are in NRWW section, page erase has to be delayed until now. 167 | // Todo: Take RAMPZ into account (not doing so just means that we will 168 | // treat the top of both "pages" of flash as NRWW, for a slight speed 169 | // decrease, so fixing this is not urgent.) 170 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 171 | fc62: 33 e0 ldi r19, 0x03 ; 3 172 | fc64: f3 2e mov r15, r19 173 | #endif 174 | 175 | /* Forever loop */ 176 | for (;;) { 177 | /* get character from UART */ 178 | ch = getch(); 179 | fc66: 8c d0 rcall .+280 ; 0xfd80 180 | 181 | if(ch == STK_GET_PARAMETER) { 182 | fc68: 81 34 cpi r24, 0x41 ; 65 183 | fc6a: 71 f4 brne .+28 ; 0xfc88 184 | unsigned char which = getch(); 185 | fc6c: 89 d0 rcall .+274 ; 0xfd80 186 | verifySpace(); 187 | fc6e: 89 83 std Y+1, r24 ; 0x01 188 | fc70: 99 d0 rcall .+306 ; 0xfda4 189 | if (which == 0x82) { 190 | fc72: 89 81 ldd r24, Y+1 ; 0x01 191 | fc74: 82 38 cpi r24, 0x82 ; 130 192 | fc76: 09 f4 brne .+2 ; 0xfc7a 193 | fc78: 1e c0 rjmp .+60 ; 0xfcb6 194 | /* 195 | * Send optiboot version as "minor SW version" 196 | */ 197 | putch(OPTIBOOT_MINVER); 198 | } else if (which == 0x81) { 199 | fc7a: 81 38 cpi r24, 0x81 ; 129 200 | fc7c: 11 f4 brne .+4 ; 0xfc82 201 | putch(OPTIBOOT_MAJVER); 202 | fc7e: 85 e0 ldi r24, 0x05 ; 5 203 | fc80: 01 c0 rjmp .+2 ; 0xfc84 204 | } else { 205 | /* 206 | * GET PARAMETER returns a generic 0x03 reply for 207 | * other parameters - enough to keep Avrdude happy 208 | */ 209 | putch(0x03); 210 | fc82: 83 e0 ldi r24, 0x03 ; 3 211 | fc84: 76 d0 rcall .+236 ; 0xfd72 212 | fc86: 72 c0 rjmp .+228 ; 0xfd6c 213 | } 214 | } 215 | else if(ch == STK_SET_DEVICE) { 216 | fc88: 82 34 cpi r24, 0x42 ; 66 217 | fc8a: 11 f4 brne .+4 ; 0xfc90 218 | // SET DEVICE is ignored 219 | getNch(20); 220 | fc8c: 84 e1 ldi r24, 0x14 ; 20 221 | fc8e: 03 c0 rjmp .+6 ; 0xfc96 222 | } 223 | else if(ch == STK_SET_DEVICE_EXT) { 224 | fc90: 85 34 cpi r24, 0x45 ; 69 225 | fc92: 19 f4 brne .+6 ; 0xfc9a 226 | // SET DEVICE EXT is ignored 227 | getNch(5); 228 | fc94: 85 e0 ldi r24, 0x05 ; 5 229 | fc96: 8e d0 rcall .+284 ; 0xfdb4 230 | fc98: 69 c0 rjmp .+210 ; 0xfd6c 231 | } 232 | else if(ch == STK_LOAD_ADDRESS) { 233 | fc9a: 85 35 cpi r24, 0x55 ; 85 234 | fc9c: 41 f4 brne .+16 ; 0xfcae 235 | // LOAD ADDRESS 236 | uint16_t newAddress; 237 | newAddress = getch(); 238 | fc9e: 70 d0 rcall .+224 ; 0xfd80 239 | fca0: 88 2e mov r8, r24 240 | newAddress = (newAddress & 0xff) | (getch() << 8); 241 | fca2: 6e d0 rcall .+220 ; 0xfd80 242 | fca4: 91 2c mov r9, r1 243 | fca6: 98 2a or r9, r24 244 | #ifdef RAMPZ 245 | // Transfer top bit to RAMPZ 246 | RAMPZ = (newAddress & 0x8000) ? 1 : 0; 247 | #endif 248 | newAddress += newAddress; // Convert from word address to byte address 249 | fca8: 88 0c add r8, r8 250 | fcaa: 99 1c adc r9, r9 251 | fcac: 5e c0 rjmp .+188 ; 0xfd6a 252 | address = newAddress; 253 | verifySpace(); 254 | } 255 | else if(ch == STK_UNIVERSAL) { 256 | fcae: 86 35 cpi r24, 0x56 ; 86 257 | fcb0: 21 f4 brne .+8 ; 0xfcba 258 | // UNIVERSAL command is ignored 259 | getNch(4); 260 | fcb2: 84 e0 ldi r24, 0x04 ; 4 261 | fcb4: 7f d0 rcall .+254 ; 0xfdb4 262 | putch(0x00); 263 | fcb6: 80 e0 ldi r24, 0x00 ; 0 264 | fcb8: e5 cf rjmp .-54 ; 0xfc84 265 | } 266 | /* Write memory, length is big endian and is in bytes */ 267 | else if(ch == STK_PROG_PAGE) { 268 | fcba: 84 36 cpi r24, 0x64 ; 100 269 | fcbc: 09 f0 breq .+2 ; 0xfcc0 270 | fcbe: 3a c0 rjmp .+116 ; 0xfd34 271 | // PROGRAM PAGE - we support flash programming only, not EEPROM 272 | uint8_t *bufPtr; 273 | uint16_t addrPtr; 274 | 275 | getch(); /* getlen() */ 276 | fcc0: 5f d0 rcall .+190 ; 0xfd80 277 | length = getch(); 278 | fcc2: 5e d0 rcall .+188 ; 0xfd80 279 | fcc4: b8 2e mov r11, r24 280 | getch(); 281 | fcc6: 5c d0 rcall .+184 ; 0xfd80 282 | 283 | // If we are in RWW section, immediately start page erase 284 | if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 285 | fcc8: 81 14 cp r8, r1 286 | fcca: 80 ee ldi r24, 0xE0 ; 224 287 | fccc: 98 06 cpc r9, r24 288 | fcce: 18 f4 brcc .+6 ; 0xfcd6 289 | fcd0: f4 01 movw r30, r8 290 | fcd2: f7 be out 0x37, r15 ; 55 291 | fcd4: e8 95 spm 292 | fcd6: 00 e0 ldi r16, 0x00 ; 0 293 | fcd8: 11 e0 ldi r17, 0x01 ; 1 294 | 295 | // While that is going on, read in page contents 296 | bufPtr = buff; 297 | do *bufPtr++ = getch(); 298 | fcda: 52 d0 rcall .+164 ; 0xfd80 299 | fcdc: f8 01 movw r30, r16 300 | fcde: 81 93 st Z+, r24 301 | fce0: 8f 01 movw r16, r30 302 | while (--length); 303 | fce2: be 12 cpse r11, r30 304 | fce4: fa cf rjmp .-12 ; 0xfcda 305 | 306 | // If we are in NRWW section, page erase has to be delayed until now. 307 | // Todo: Take RAMPZ into account (not doing so just means that we will 308 | // treat the top of both "pages" of flash as NRWW, for a slight speed 309 | // decrease, so fixing this is not urgent.) 310 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 311 | fce6: 81 14 cp r8, r1 312 | fce8: f0 ee ldi r31, 0xE0 ; 224 313 | fcea: 9f 06 cpc r9, r31 314 | fcec: 18 f0 brcs .+6 ; 0xfcf4 315 | fcee: f4 01 movw r30, r8 316 | fcf0: f7 be out 0x37, r15 ; 55 317 | fcf2: e8 95 spm 318 | 319 | // Read command terminator, start reply 320 | verifySpace(); 321 | fcf4: 57 d0 rcall .+174 ; 0xfda4 322 | 323 | // If only a partial page is to be programmed, the erase might not be complete. 324 | // So check that here 325 | boot_spm_busy_wait(); 326 | fcf6: 07 b6 in r0, 0x37 ; 55 327 | fcf8: 00 fc sbrc r0, 0 328 | fcfa: fd cf rjmp .-6 ; 0xfcf6 329 | fcfc: f4 01 movw r30, r8 330 | fcfe: a0 e0 ldi r26, 0x00 ; 0 331 | fd00: b1 e0 ldi r27, 0x01 ; 1 332 | bufPtr = buff; 333 | addrPtr = (uint16_t)(void*)address; 334 | ch = SPM_PAGESIZE / 2; 335 | do { 336 | uint16_t a; 337 | a = *bufPtr++; 338 | fd02: 8c 91 ld r24, X 339 | a |= (*bufPtr++) << 8; 340 | fd04: 11 96 adiw r26, 0x01 ; 1 341 | fd06: 2c 91 ld r18, X 342 | fd08: 11 97 sbiw r26, 0x01 ; 1 343 | fd0a: 90 e0 ldi r25, 0x00 ; 0 344 | fd0c: 92 2b or r25, r18 345 | # define UART_SRL UBRR3L 346 | # define UART_UDR UDR3 347 | #endif 348 | 349 | /* main program starts here */ 350 | int main(void) { 351 | fd0e: 12 96 adiw r26, 0x02 ; 2 352 | ch = SPM_PAGESIZE / 2; 353 | do { 354 | uint16_t a; 355 | a = *bufPtr++; 356 | a |= (*bufPtr++) << 8; 357 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 358 | fd10: 0c 01 movw r0, r24 359 | fd12: e7 be out 0x37, r14 ; 55 360 | fd14: e8 95 spm 361 | fd16: 11 24 eor r1, r1 362 | addrPtr += 2; 363 | fd18: 32 96 adiw r30, 0x02 ; 2 364 | } while (--ch); 365 | fd1a: a1 15 cp r26, r1 366 | fd1c: 82 e0 ldi r24, 0x02 ; 2 367 | fd1e: b8 07 cpc r27, r24 368 | fd20: 81 f7 brne .-32 ; 0xfd02 369 | 370 | // Write from programming buffer 371 | __boot_page_write_short((uint16_t)(void*)address); 372 | fd22: f4 01 movw r30, r8 373 | fd24: d7 be out 0x37, r13 ; 55 374 | fd26: e8 95 spm 375 | boot_spm_busy_wait(); 376 | fd28: 07 b6 in r0, 0x37 ; 55 377 | fd2a: 00 fc sbrc r0, 0 378 | fd2c: fd cf rjmp .-6 ; 0xfd28 379 | 380 | #if defined(RWWSRE) 381 | // Reenable read access to flash 382 | boot_rww_enable(); 383 | fd2e: c7 be out 0x37, r12 ; 55 384 | fd30: e8 95 spm 385 | fd32: 1c c0 rjmp .+56 ; 0xfd6c 386 | #endif 387 | 388 | } 389 | /* Read memory block mode, length is big endian. */ 390 | else if(ch == STK_READ_PAGE) { 391 | fd34: 84 37 cpi r24, 0x74 ; 116 392 | fd36: 61 f4 brne .+24 ; 0xfd50 393 | // READ PAGE - we only read flash 394 | getch(); /* getlen() */ 395 | fd38: 23 d0 rcall .+70 ; 0xfd80 396 | length = getch(); 397 | fd3a: 22 d0 rcall .+68 ; 0xfd80 398 | fd3c: 18 2f mov r17, r24 399 | getch(); 400 | fd3e: 20 d0 rcall .+64 ; 0xfd80 401 | 402 | verifySpace(); 403 | fd40: 31 d0 rcall .+98 ; 0xfda4 404 | __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 405 | #else 406 | // read a Flash byte and increment the address 407 | __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 408 | #endif 409 | putch(ch); 410 | fd42: f4 01 movw r30, r8 411 | fd44: 85 91 lpm r24, Z+ 412 | fd46: 4f 01 movw r8, r30 413 | fd48: 14 d0 rcall .+40 ; 0xfd72 414 | } while (--length); 415 | fd4a: 11 50 subi r17, 0x01 ; 1 416 | fd4c: d1 f7 brne .-12 ; 0xfd42 417 | fd4e: 0e c0 rjmp .+28 ; 0xfd6c 418 | } 419 | 420 | /* Get device signature bytes */ 421 | else if(ch == STK_READ_SIGN) { 422 | fd50: 85 37 cpi r24, 0x75 ; 117 423 | fd52: 39 f4 brne .+14 ; 0xfd62 424 | // READ SIGN - return what Avrdude wants to hear 425 | verifySpace(); 426 | fd54: 27 d0 rcall .+78 ; 0xfda4 427 | putch(SIGNATURE_0); 428 | fd56: 8e e1 ldi r24, 0x1E ; 30 429 | fd58: 0c d0 rcall .+24 ; 0xfd72 430 | putch(SIGNATURE_1); 431 | fd5a: 86 e9 ldi r24, 0x96 ; 150 432 | fd5c: 0a d0 rcall .+20 ; 0xfd72 433 | putch(SIGNATURE_2); 434 | fd5e: 89 e0 ldi r24, 0x09 ; 9 435 | fd60: 91 cf rjmp .-222 ; 0xfc84 436 | } 437 | else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ 438 | fd62: 81 35 cpi r24, 0x51 ; 81 439 | fd64: 11 f4 brne .+4 ; 0xfd6a 440 | // Adaboot no-wait mod 441 | watchdogConfig(WATCHDOG_16MS); 442 | fd66: 88 e0 ldi r24, 0x08 ; 8 443 | fd68: 17 d0 rcall .+46 ; 0xfd98 444 | verifySpace(); 445 | } 446 | else { 447 | // This covers the response to commands like STK_ENTER_PROGMODE 448 | verifySpace(); 449 | fd6a: 1c d0 rcall .+56 ; 0xfda4 450 | } 451 | putch(STK_OK); 452 | fd6c: 80 e1 ldi r24, 0x10 ; 16 453 | fd6e: 01 d0 rcall .+2 ; 0xfd72 454 | } 455 | fd70: 7a cf rjmp .-268 ; 0xfc66 456 | 457 | 0000fd72 : 458 | } 459 | 460 | void putch(char ch) { 461 | #ifndef SOFT_UART 462 | while (!(UART_SRA & _BV(UDRE0))); 463 | fd72: 90 91 c0 00 lds r25, 0x00C0 464 | fd76: 95 ff sbrs r25, 5 465 | fd78: fc cf rjmp .-8 ; 0xfd72 466 | UART_UDR = ch; 467 | fd7a: 80 93 c6 00 sts 0x00C6, r24 468 | fd7e: 08 95 ret 469 | 470 | 0000fd80 : 471 | [uartBit] "I" (UART_RX_BIT) 472 | : 473 | "r25" 474 | ); 475 | #else 476 | while(!(UART_SRA & _BV(RXC0))) 477 | fd80: 80 91 c0 00 lds r24, 0x00C0 478 | fd84: 87 ff sbrs r24, 7 479 | fd86: fc cf rjmp .-8 ; 0xfd80 480 | ; 481 | if (!(UART_SRA & _BV(FE0))) { 482 | fd88: 80 91 c0 00 lds r24, 0x00C0 483 | fd8c: 84 fd sbrc r24, 4 484 | fd8e: 01 c0 rjmp .+2 ; 0xfd92 485 | } 486 | #endif 487 | 488 | // Watchdog functions. These are only safe with interrupts turned off. 489 | void watchdogReset() { 490 | __asm__ __volatile__ ( 491 | fd90: a8 95 wdr 492 | * don't care that an invalid char is returned...) 493 | */ 494 | watchdogReset(); 495 | } 496 | 497 | ch = UART_UDR; 498 | fd92: 80 91 c6 00 lds r24, 0x00C6 499 | LED_PIN |= _BV(LED); 500 | #endif 501 | #endif 502 | 503 | return ch; 504 | } 505 | fd96: 08 95 ret 506 | 507 | 0000fd98 : 508 | "wdr\n" 509 | ); 510 | } 511 | 512 | void watchdogConfig(uint8_t x) { 513 | WDTCSR = _BV(WDCE) | _BV(WDE); 514 | fd98: e0 e6 ldi r30, 0x60 ; 96 515 | fd9a: f0 e0 ldi r31, 0x00 ; 0 516 | fd9c: 98 e1 ldi r25, 0x18 ; 24 517 | fd9e: 90 83 st Z, r25 518 | WDTCSR = x; 519 | fda0: 80 83 st Z, r24 520 | fda2: 08 95 ret 521 | 522 | 0000fda4 : 523 | do getch(); while (--count); 524 | verifySpace(); 525 | } 526 | 527 | void verifySpace() { 528 | if (getch() != CRC_EOP) { 529 | fda4: ed df rcall .-38 ; 0xfd80 530 | fda6: 80 32 cpi r24, 0x20 ; 32 531 | fda8: 19 f0 breq .+6 ; 0xfdb0 532 | watchdogConfig(WATCHDOG_16MS); // shorten WD timeout 533 | fdaa: 88 e0 ldi r24, 0x08 ; 8 534 | fdac: f5 df rcall .-22 ; 0xfd98 535 | fdae: ff cf rjmp .-2 ; 0xfdae 536 | while (1) // and busy-loop so that WD causes 537 | ; // a reset and app start. 538 | } 539 | putch(STK_INSYNC); 540 | fdb0: 84 e1 ldi r24, 0x14 ; 20 541 | fdb2: df cf rjmp .-66 ; 0xfd72 542 | 543 | 0000fdb4 : 544 | ::[count] "M" (UART_B_VALUE) 545 | ); 546 | } 547 | #endif 548 | 549 | void getNch(uint8_t count) { 550 | fdb4: cf 93 push r28 551 | fdb6: c8 2f mov r28, r24 552 | do getch(); while (--count); 553 | fdb8: e3 df rcall .-58 ; 0xfd80 554 | fdba: c1 50 subi r28, 0x01 ; 1 555 | fdbc: e9 f7 brne .-6 ; 0xfdb8 556 | verifySpace(); 557 | } 558 | fdbe: cf 91 pop r28 559 | } 560 | #endif 561 | 562 | void getNch(uint8_t count) { 563 | do getch(); while (--count); 564 | verifySpace(); 565 | fdc0: f1 cf rjmp .-30 ; 0xfda4 566 | 567 | 0000fdc2 : 568 | 569 | void appStart(uint8_t rstFlags) { 570 | // save the reset flags in the designated register 571 | // This can be saved in a main program by putting code in .init0 (which 572 | // executes before normal c init code) to save R2 to a global variable. 573 | __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); 574 | fdc2: 28 2e mov r2, r24 575 | 576 | watchdogConfig(WATCHDOG_OFF); 577 | fdc4: 80 e0 ldi r24, 0x00 ; 0 578 | fdc6: e8 df rcall .-48 ; 0xfd98 579 | __asm__ __volatile__ ( 580 | fdc8: ee 27 eor r30, r30 581 | fdca: ff 27 eor r31, r31 582 | fdcc: 09 94 ijmp 583 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega644_8m.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E088E19EEF31E090938500D2 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega644p.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E080E39CEF31E090938500DA 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD08AE0C5 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_atmega644p_8m.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E088E19EEF31E090938500D2 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD08AE0C5 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_balanduino.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C2008AE08093C4008EE029 5 | :10FC3000B8D0249A26E08EE99DEF31E090938500BC 6 | :10FC40008093840036BBB09BFECF1C9AA8952150B0 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/optiboot_balanduino644.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0249A26E088E19EEF31E090938500CE 5 | :10FC40008093840036BBB09BFECF1C9AA8952150B0 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/pin_defs.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------ */ 2 | #if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) 3 | /*------------------------------------------------------------------------ */ 4 | 5 | /* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove 6 | */ 7 | #if !defined(LED) 8 | #define LED B5 9 | #endif 10 | 11 | /* Ports for soft UART */ 12 | #ifdef SOFT_UART 13 | #define UART_PORT PORTD 14 | #define UART_PIN PIND 15 | #define UART_DDR DDRD 16 | #define UART_TX_BIT 1 17 | #define UART_RX_BIT 0 18 | #endif 19 | #endif 20 | 21 | #if defined(__AVR_ATmega8__) || defined(__AVR_ATmega32__) 22 | //Name conversion R.Wiersma 23 | #define UCSR0A UCSRA 24 | #define UDR0 UDR 25 | #define UDRE0 UDRE 26 | #define RXC0 RXC 27 | #define FE0 FE 28 | #define TIFR1 TIFR 29 | #define WDTCSR WDTCR 30 | #endif 31 | #if defined(__AVR_ATmega32__) 32 | #define WDCE WDTOE 33 | #endif 34 | 35 | /* Luminet support */ 36 | /*------------------------------------------------------------------------ */ 37 | #if defined(__AVR_ATtiny84__) 38 | /*------------------------------------------------------------------------ */ 39 | /* Red LED is connected to pin PA4 */ 40 | #if !defined(LED) 41 | #define LED A4 42 | #endif 43 | 44 | /* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */ 45 | #ifdef SOFT_UART 46 | #define UART_PORT PORTA 47 | #define UART_PIN PINA 48 | #define UART_DDR DDRA 49 | #define UART_TX_BIT 2 50 | #define UART_RX_BIT 3 51 | #endif 52 | #endif 53 | 54 | /*------------------------------------------------------------------------ */ 55 | /* Sanguino support (and other 40pin DIP cpus) */ 56 | #if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega32__) 57 | /*------------------------------------------------------------------------ */ 58 | /* Onboard LED is connected to pin PB0 on Sanguino */ 59 | #if !defined(LED) 60 | #define LED B0 61 | #endif 62 | 63 | /* Ports for soft UART */ 64 | #ifdef SOFT_UART 65 | #define UART_PORT PORTD 66 | #define UART_PIN PIND 67 | #define UART_DDR DDRD 68 | #define UART_TX_BIT 1 69 | #define UART_RX_BIT 0 70 | #endif 71 | #endif 72 | 73 | /*------------------------------------------------------------------------ */ 74 | /* Mega support */ 75 | #if defined(__AVR_ATmega1280__) 76 | /*------------------------------------------------------------------------ */ 77 | /* Onboard LED is connected to pin PB7 on Arduino Mega */ 78 | #if !defined(LED) 79 | #define LED B7 80 | #endif 81 | 82 | /* Ports for soft UART */ 83 | #ifdef SOFT_UART 84 | #define UART_PORT PORTE 85 | #define UART_PIN PINE 86 | #define UART_DDR DDRE 87 | #define UART_TX_BIT 1 88 | #define UART_RX_BIT 0 89 | #endif 90 | #endif 91 | 92 | /* 93 | * ------------------------------------------------------------------------ 94 | * A bunch of macros to enable the LED to be specifed as "B5" for bit 5 95 | * of port B, and similar. 96 | */ 97 | 98 | #define A0 0x100 99 | #define A1 0x101 100 | #define A2 0x102 101 | #define A3 0x103 102 | #define A4 0x104 103 | #define A5 0x105 104 | #define A6 0x106 105 | #define A7 0x107 106 | 107 | #define B0 0x200 108 | #define B1 0x201 109 | #define B2 0x202 110 | #define B3 0x203 111 | #define B4 0x204 112 | #define B5 0x205 113 | #define B6 0x206 114 | #define B7 0x207 115 | 116 | #define C0 0x300 117 | #define C1 0x301 118 | #define C2 0x302 119 | #define C3 0x303 120 | #define C4 0x304 121 | #define C5 0x305 122 | #define C6 0x306 123 | #define C7 0x307 124 | 125 | #define D0 0x400 126 | #define D1 0x401 127 | #define D2 0x402 128 | #define D3 0x403 129 | #define D4 0x404 130 | #define D5 0x405 131 | #define D6 0x406 132 | #define D7 0x407 133 | 134 | #define E0 0x500 135 | #define E1 0x501 136 | #define E2 0x502 137 | #define E3 0x503 138 | #define E4 0x504 139 | #define E5 0x505 140 | #define E6 0x506 141 | #define E7 0x507 142 | 143 | #define F0 0x600 144 | #define F1 0x601 145 | #define F2 0x602 146 | #define F3 0x603 147 | #define F4 0x604 148 | #define F5 0x605 149 | #define F6 0x606 150 | #define F7 0x607 151 | 152 | #define G0 0x700 153 | #define G1 0x701 154 | #define G2 0x702 155 | #define G3 0x703 156 | #define G4 0x704 157 | #define G5 0x705 158 | #define G6 0x706 159 | #define G7 0x707 160 | 161 | #define H0 0x800 162 | #define H1 0x801 163 | #define H2 0x802 164 | #define H3 0x803 165 | #define H4 0x804 166 | #define H5 0x805 167 | #define H6 0x806 168 | #define H7 0x807 169 | 170 | #define J0 0xA00 171 | #define J1 0xA01 172 | #define J2 0xA02 173 | #define J3 0xA03 174 | #define J4 0xA04 175 | #define J5 0xA05 176 | #define J6 0xA06 177 | #define J7 0xA07 178 | 179 | #define K0 0xB00 180 | #define K1 0xB01 181 | #define K2 0xB02 182 | #define K3 0xB03 183 | #define K4 0xB04 184 | #define K5 0xB05 185 | #define K6 0xB06 186 | #define K7 0xB07 187 | 188 | #define L0 0xC00 189 | #define L1 0xC01 190 | #define L2 0xC02 191 | #define L3 0xC03 192 | #define L4 0xC04 193 | #define L5 0xC05 194 | #define L6 0xC06 195 | #define L7 0xC07 196 | 197 | 198 | 199 | #if LED == B0 200 | #undef LED 201 | #define LED_DDR DDRB 202 | #define LED_PORT PORTB 203 | #define LED_PIN PINB 204 | #define LED PINB0 205 | #elif LED == B1 206 | #undef LED 207 | #define LED_DDR DDRB 208 | #define LED_PORT PORTB 209 | #define LED_PIN PINB 210 | #define LED PINB1 211 | #elif LED == B2 212 | #undef LED 213 | #define LED_DDR DDRB 214 | #define LED_PORT PORTB 215 | #define LED_PIN PINB 216 | #define LED PINB2 217 | #elif LED == B3 218 | #undef LED 219 | #define LED_DDR DDRB 220 | #define LED_PORT PORTB 221 | #define LED_PIN PINB 222 | #define LED PINB3 223 | #elif LED == B4 224 | #undef LED 225 | #define LED_DDR DDRB 226 | #define LED_PORT PORTB 227 | #define LED_PIN PINB 228 | #define LED PINB4 229 | #elif LED == B5 230 | #undef LED 231 | #define LED_DDR DDRB 232 | #define LED_PORT PORTB 233 | #define LED_PIN PINB 234 | #define LED PINB5 235 | #elif LED == B6 236 | #undef LED 237 | #define LED_DDR DDRB 238 | #define LED_PORT PORTB 239 | #define LED_PIN PINB 240 | #define LED PINB6 241 | #elif LED == B7 242 | #undef LED 243 | #define LED_DDR DDRB 244 | #define LED_PORT PORTB 245 | #define LED_PIN PINB 246 | #define LED PINB7 247 | 248 | #elif LED == C0 249 | #undef LED 250 | #define LED_DDR DDRC 251 | #define LED_PORT PORTC 252 | #define LED_PIN PINC 253 | #define LED PINC0 254 | #elif LED == C1 255 | #undef LED 256 | #define LED_DDR DDRC 257 | #define LED_PORT PORTC 258 | #define LED_PIN PINC 259 | #define LED PINC1 260 | #elif LED == C2 261 | #undef LED 262 | #define LED_DDR DDRC 263 | #define LED_PORT PORTC 264 | #define LED_PIN PINC 265 | #define LED PINC2 266 | #elif LED == C3 267 | #undef LED 268 | #define LED_DDR DDRC 269 | #define LED_PORT PORTC 270 | #define LED_PIN PINC 271 | #define LED PINC3 272 | #elif LED == C4 273 | #undef LED 274 | #define LED_DDR DDRC 275 | #define LED_PORT PORTC 276 | #define LED_PIN PINC 277 | #define LED PINC4 278 | #elif LED == C5 279 | #undef LED 280 | #define LED_DDR DDRC 281 | #define LED_PORT PORTC 282 | #define LED_PIN PINC 283 | #define LED PINC5 284 | #elif LED == C6 285 | #undef LED 286 | #define LED_DDR DDRC 287 | #define LED_PORT PORTC 288 | #define LED_PIN PINC 289 | #define LED PINC6 290 | #elif LED == C7 291 | #undef LED 292 | #define LED_DDR DDRC 293 | #define LED_PORT PORTC 294 | #define LED_PIN PINC 295 | #define LED PINC7 296 | 297 | #elif LED == D0 298 | #undef LED 299 | #define LED_DDR DDRD 300 | #define LED_PORT PORTD 301 | #define LED_PIN PIND 302 | #define LED PIND0 303 | #elif LED == D1 304 | #undef LED 305 | #define LED_DDR DDRD 306 | #define LED_PORT PORTD 307 | #define LED_PIN PIND 308 | #define LED PIND1 309 | #elif LED == D2 310 | #undef LED 311 | #define LED_DDR DDRD 312 | #define LED_PORT PORTD 313 | #define LED_PIN PIND 314 | #define LED PIND2 315 | #elif LED == D3 316 | #undef LED 317 | #define LED_DDR DDRD 318 | #define LED_PORT PORTD 319 | #define LED_PIN PIND 320 | #define LED PIND3 321 | #elif LED == D4 322 | #undef LED 323 | #define LED_DDR DDRD 324 | #define LED_PORT PORTD 325 | #define LED_PIN PIND 326 | #define LED PIND4 327 | #elif LED == D5 328 | #undef LED 329 | #define LED_DDR DDRD 330 | #define LED_PORT PORTD 331 | #define LED_PIN PIND 332 | #define LED PIND5 333 | #elif LED == D6 334 | #undef LED 335 | #define LED_DDR DDRD 336 | #define LED_PORT PORTD 337 | #define LED_PIN PIND 338 | #define LED PIND6 339 | #elif LED == D7 340 | #undef LED 341 | #define LED_DDR DDRD 342 | #define LED_PORT PORTD 343 | #define LED_PIN PIND 344 | #define LED PIND7 345 | 346 | #elif LED == E0 347 | #undef LED 348 | #define LED_DDR DDRE 349 | #define LED_PORT PORTE 350 | #define LED_PIN PINE 351 | #define LED PINE0 352 | #elif LED == E1 353 | #undef LED 354 | #define LED_DDR DDRE 355 | #define LED_PORT PORTE 356 | #define LED_PIN PINE 357 | #define LED PINE1 358 | #elif LED == E2 359 | #undef LED 360 | #define LED_DDR DDRE 361 | #define LED_PORT PORTE 362 | #define LED_PIN PINE 363 | #define LED PINE2 364 | #elif LED == E3 365 | #undef LED 366 | #define LED_DDR DDRE 367 | #define LED_PORT PORTE 368 | #define LED_PIN PINE 369 | #define LED PINE3 370 | #elif LED == E4 371 | #undef LED 372 | #define LED_DDR DDRE 373 | #define LED_PORT PORTE 374 | #define LED_PIN PINE 375 | #define LED PINE4 376 | #elif LED == E5 377 | #undef LED 378 | #define LED_DDR DDRE 379 | #define LED_PORT PORTE 380 | #define LED_PIN PINE 381 | #define LED PINE5 382 | #elif LED == E6 383 | #undef LED 384 | #define LED_DDR DDRE 385 | #define LED_PORT PORTE 386 | #define LED_PIN PINE 387 | #define LED PINE6 388 | #elif LED == E7 389 | #undef LED 390 | #define LED_DDR DDRE 391 | #define LED_PORT PORTE 392 | #define LED_PIN PINE 393 | #define LED PINE7 394 | 395 | #elif LED == F0 396 | #undef LED 397 | #define LED_DDR DDRF 398 | #define LED_PORT PORTF 399 | #define LED_PIN PINF 400 | #define LED PINF0 401 | #elif LED == F1 402 | #undef LED 403 | #define LED_DDR DDRF 404 | #define LED_PORT PORTF 405 | #define LED_PIN PINF 406 | #define LED PINF1 407 | #elif LED == F2 408 | #undef LED 409 | #define LED_DDR DDRF 410 | #define LED_PORT PORTF 411 | #define LED_PIN PINF 412 | #define LED PINF2 413 | #elif LED == F3 414 | #undef LED 415 | #define LED_DDR DDRF 416 | #define LED_PORT PORTF 417 | #define LED_PIN PINF 418 | #define LED PINF3 419 | #elif LED == F4 420 | #undef LED 421 | #define LED_DDR DDRF 422 | #define LED_PORT PORTF 423 | #define LED_PIN PINF 424 | #define LED PINF4 425 | #elif LED == F5 426 | #undef LED 427 | #define LED_DDR DDRF 428 | #define LED_PORT PORTF 429 | #define LED_PIN PINF 430 | #define LED PINF5 431 | #elif LED == F6 432 | #undef LED 433 | #define LED_DDR DDRF 434 | #define LED_PORT PORTF 435 | #define LED_PIN PINF 436 | #define LED PINF6 437 | #elif LED == F7 438 | #undef LED 439 | #define LED_DDR DDRF 440 | #define LED_PORT PORTF 441 | #define LED_PIN PINF 442 | #define LED PINF7 443 | 444 | #elif LED == G0 445 | #undef LED 446 | #define LED_DDR DDRG 447 | #define LED_PORT PORTG 448 | #define LED_PIN PING 449 | #define LED PING0 450 | #elif LED == G1 451 | #undef LED 452 | #define LED_DDR DDRG 453 | #define LED_PORT PORTG 454 | #define LED_PIN PING 455 | #define LED PING1 456 | #elif LED == G2 457 | #undef LED 458 | #define LED_DDR DDRG 459 | #define LED_PORT PORTG 460 | #define LED_PIN PING 461 | #define LED PING2 462 | #elif LED == G3 463 | #undef LED 464 | #define LED_DDR DDRG 465 | #define LED_PORT PORTG 466 | #define LED_PIN PING 467 | #define LED PING3 468 | #elif LED == G4 469 | #undef LED 470 | #define LED_DDR DDRG 471 | #define LED_PORT PORTG 472 | #define LED_PIN PING 473 | #define LED PING4 474 | #elif LED == G5 475 | #undef LED 476 | #define LED_DDR DDRG 477 | #define LED_PORT PORTG 478 | #define LED_PIN PING 479 | #define LED PING5 480 | #elif LED == G6 481 | #undef LED 482 | #define LED_DDR DDRG 483 | #define LED_PORT PORTG 484 | #define LED_PIN PING 485 | #define LED PING6 486 | #elif LED == G7 487 | #undef LED 488 | #define LED_DDR DDRG 489 | #define LED_PORT PORTG 490 | #define LED_PIN PING 491 | #define LED PING7 492 | 493 | #elif LED == H0 494 | #undef LED 495 | #define LED_DDR DDRH 496 | #define LED_PORT PORTH 497 | #define LED_PIN PINH 498 | #define LED PINH0 499 | #elif LED == H1 500 | #undef LED 501 | #define LED_DDR DDRH 502 | #define LED_PORT PORTH 503 | #define LED_PIN PINH 504 | #define LED PINH1 505 | #elif LED == H2 506 | #undef LED 507 | #define LED_DDR DDRH 508 | #define LED_PORT PORTH 509 | #define LED_PIN PINH 510 | #define LED PINH2 511 | #elif LED == H3 512 | #undef LED 513 | #define LED_DDR DDRH 514 | #define LED_PORT PORTH 515 | #define LED_PIN PINH 516 | #define LED PINH3 517 | #elif LED == H4 518 | #undef LED 519 | #define LED_DDR DDRH 520 | #define LED_PORT PORTH 521 | #define LED_PIN PINH 522 | #define LED PINH4 523 | #elif LED == H5 524 | #undef LED 525 | #define LED_DDR DDRH 526 | #define LED_PORT PORTH 527 | #define LED_PIN PINH 528 | #define LED PINH5 529 | #elif LED == H6 530 | #undef LED 531 | #define LED_DDR DDRH 532 | #define LED_PORT PORTH 533 | #define LED_PIN PINH 534 | #define LED PINH6 535 | #elif LED == H7 536 | #undef LED 537 | #define LED_DDR DDRH 538 | #define LED_PORT PORTH 539 | #define LED_PIN PINH 540 | #define LED PINH7 541 | 542 | #elif LED == J0 543 | #undef LED 544 | #define LED_DDR DDRJ 545 | #define LED_PORT PORTJ 546 | #define LED_PIN PINJ 547 | #define LED PINJ0 548 | #elif LED == J1 549 | #undef LED 550 | #define LED_DDR DDRJ 551 | #define LED_PORT PORTJ 552 | #define LED_PIN PINJ 553 | #define LED PINJ1 554 | #elif LED == J2 555 | #undef LED 556 | #define LED_DDR DDRJ 557 | #define LED_PORT PORTJ 558 | #define LED_PIN PINJ 559 | #define LED PINJ2 560 | #elif LED == J3 561 | #undef LED 562 | #define LED_DDR DDRJ 563 | #define LED_PORT PORTJ 564 | #define LED_PIN PINJ 565 | #define LED PINJ3 566 | #elif LED == J4 567 | #undef LED 568 | #define LED_DDR DDRJ 569 | #define LED_PORT PORTJ 570 | #define LED_PIN PINJ 571 | #define LED PINJ4 572 | #elif LED == J5 573 | #undef LED 574 | #define LED_DDR DDRJ 575 | #define LED_PORT PORTJ 576 | #define LED_PIN PINJ 577 | #define LED PINJ5 578 | #elif LED == J6 579 | #undef LED 580 | #define LED_DDR DDRJ 581 | #define LED_PORT PORTJ 582 | #define LED_PIN PINJ 583 | #define LED PINJ6 584 | #elif LED == J7 585 | #undef LED 586 | #define LED_DDR DDRJ 587 | #define LED_PORT PORTJ 588 | #define LED_PIN PINJ 589 | #define LED PINJ7 590 | 591 | #elif LED == K0 592 | #undef LED 593 | #define LED_DDR DDRK 594 | #define LED_PORT PORTK 595 | #define LED_PIN PINK 596 | #define LED PINK0 597 | #elif LED == K1 598 | #undef LED 599 | #define LED_DDR DDRK 600 | #define LED_PORT PORTK 601 | #define LED_PIN PINK 602 | #define LED PINK1 603 | #elif LED == K2 604 | #undef LED 605 | #define LED_DDR DDRK 606 | #define LED_PORT PORTK 607 | #define LED_PIN PINK 608 | #define LED PINK2 609 | #elif LED == K3 610 | #undef LED 611 | #define LED_DDR DDRK 612 | #define LED_PORT PORTK 613 | #define LED_PIN PINK 614 | #define LED PINK3 615 | #elif LED == K4 616 | #undef LED 617 | #define LED_DDR DDRK 618 | #define LED_PORT PORTK 619 | #define LED_PIN PINK 620 | #define LED PINK4 621 | #elif LED == K5 622 | #undef LED 623 | #define LED_DDR DDRK 624 | #define LED_PORT PORTK 625 | #define LED_PIN PINK 626 | #define LED PINK5 627 | #elif LED == K6 628 | #undef LED 629 | #define LED_DDR DDRK 630 | #define LED_PORT PORTK 631 | #define LED_PIN PINK 632 | #define LED PINK6 633 | #elif LED == K7 634 | #undef LED 635 | #define LED_DDR DDRK 636 | #define LED_PORT PORTK 637 | #define LED_PIN PINK 638 | #define LED PINK7 639 | 640 | #elif LED == L0 641 | #undef LED 642 | #define LED_DDR DDRL 643 | #define LED_PORT PORTL 644 | #define LED_PIN PINL 645 | #define LED PINL0 646 | #elif LED == L1 647 | #undef LED 648 | #define LED_DDR DDRL 649 | #define LED_PORT PORTL 650 | #define LED_PIN PINL 651 | #define LED PINL1 652 | #elif LED == L2 653 | #undef LED 654 | #define LED_DDR DDRL 655 | #define LED_PORT PORTL 656 | #define LED_PIN PINL 657 | #define LED PINL2 658 | #elif LED == L3 659 | #undef LED 660 | #define LED_DDR DDRL 661 | #define LED_PORT PORTL 662 | #define LED_PIN PINL 663 | #define LED PINL3 664 | #elif LED == L4 665 | #undef LED 666 | #define LED_DDR DDRL 667 | #define LED_PORT PORTL 668 | #define LED_PIN PINL 669 | #define LED PINL4 670 | #elif LED == L5 671 | #undef LED 672 | #define LED_DDR DDRL 673 | #define LED_PORT PORTL 674 | #define LED_PIN PINL 675 | #define LED PINL5 676 | #elif LED == L6 677 | #undef LED 678 | #define LED_DDR DDRL 679 | #define LED_PORT PORTL 680 | #define LED_PIN PINL 681 | #define LED PINL6 682 | #elif LED == L7 683 | #undef LED 684 | #define LED_DDR DDRL 685 | #define LED_PORT PORTL 686 | #define LED_PIN PINL 687 | #define LED PINL7 688 | 689 | #elif LED == A0 690 | #undef LED 691 | #define LED_DDR DDRA 692 | #define LED_PORT PORTA 693 | #define LED_PIN PINA 694 | #define LED PINA0 695 | #elif LED == A1 696 | #undef LED 697 | #define LED_DDR DDRA 698 | #define LED_PORT PORTA 699 | #define LED_PIN PINA 700 | #define LED PINA1 701 | #elif LED == A2 702 | #undef LED 703 | #define LED_DDR DDRA 704 | #define LED_PORT PORTA 705 | #define LED_PIN PINA 706 | #define LED PINA2 707 | #elif LED == A3 708 | #undef LED 709 | #define LED_DDR DDRA 710 | #define LED_PORT PORTA 711 | #define LED_PIN PINA 712 | #define LED PINA3 713 | #elif LED == A4 714 | #undef LED 715 | #define LED_DDR DDRA 716 | #define LED_PORT PORTA 717 | #define LED_PIN PINA 718 | #define LED PINA4 719 | #elif LED == A5 720 | #undef LED 721 | #define LED_DDR DDRA 722 | #define LED_PORT PORTA 723 | #define LED_PIN PINA 724 | #define LED PINA5 725 | #elif LED == A6 726 | #undef LED 727 | #define LED_DDR DDRA 728 | #define LED_PORT PORTA 729 | #define LED_PIN PINA 730 | #define LED PINA6 731 | #elif LED == A7 732 | #undef LED 733 | #define LED_DDR DDRA 734 | #define LED_PORT PORTA 735 | #define LED_PIN PINA 736 | #define LED PINA7 737 | 738 | #else 739 | #error ------------------------------------------- 740 | #error Unrecognized LED name. Should be like "B5" 741 | #error ------------------------------------------- 742 | #endif 743 | -------------------------------------------------------------------------------- /avr/bootloaders/optiboot/stk500.h: -------------------------------------------------------------------------------- 1 | /* STK500 constants list, from AVRDUDE */ 2 | #define STK_OK 0x10 3 | #define STK_FAILED 0x11 // Not used 4 | #define STK_UNKNOWN 0x12 // Not used 5 | #define STK_NODEVICE 0x13 // Not used 6 | #define STK_INSYNC 0x14 // ' ' 7 | #define STK_NOSYNC 0x15 // Not used 8 | #define ADC_CHANNEL_ERROR 0x16 // Not used 9 | #define ADC_MEASURE_OK 0x17 // Not used 10 | #define PWM_CHANNEL_ERROR 0x18 // Not used 11 | #define PWM_ADJUST_OK 0x19 // Not used 12 | #define CRC_EOP 0x20 // 'SPACE' 13 | #define STK_GET_SYNC 0x30 // '0' 14 | #define STK_GET_SIGN_ON 0x31 // '1' 15 | #define STK_SET_PARAMETER 0x40 // '@' 16 | #define STK_GET_PARAMETER 0x41 // 'A' 17 | #define STK_SET_DEVICE 0x42 // 'B' 18 | #define STK_SET_DEVICE_EXT 0x45 // 'E' 19 | #define STK_ENTER_PROGMODE 0x50 // 'P' 20 | #define STK_LEAVE_PROGMODE 0x51 // 'Q' 21 | #define STK_CHIP_ERASE 0x52 // 'R' 22 | #define STK_CHECK_AUTOINC 0x53 // 'S' 23 | #define STK_LOAD_ADDRESS 0x55 // 'U' 24 | #define STK_UNIVERSAL 0x56 // 'V' 25 | #define STK_PROG_FLASH 0x60 // '`' 26 | #define STK_PROG_DATA 0x61 // 'a' 27 | #define STK_PROG_FUSE 0x62 // 'b' 28 | #define STK_PROG_LOCK 0x63 // 'c' 29 | #define STK_PROG_PAGE 0x64 // 'd' 30 | #define STK_PROG_FUSE_EXT 0x65 // 'e' 31 | #define STK_READ_FLASH 0x70 // 'p' 32 | #define STK_READ_DATA 0x71 // 'q' 33 | #define STK_READ_FUSE 0x72 // 'r' 34 | #define STK_READ_LOCK 0x73 // 's' 35 | #define STK_READ_PAGE 0x74 // 't' 36 | #define STK_READ_SIGN 0x75 // 'u' 37 | #define STK_READ_OSCCAL 0x76 // 'v' 38 | #define STK_READ_FUSE_EXT 0x77 // 'w' 39 | #define STK_READ_OSCCAL_EXT 0x78 // 'x' 40 | -------------------------------------------------------------------------------- /avr/libraries/README.md: -------------------------------------------------------------------------------- 1 | Specific libraries for Sanguino can be put inside this folder -------------------------------------------------------------------------------- /avr/variants/sanguino/pins_arduino.h: -------------------------------------------------------------------------------- 1 | /* 2 | pins_arduino.h - Pin definition functions for Arduino 3 | Part of Arduino - http://www.arduino.cc/ 4 | 5 | Copyright (c) 2007 David A. Mellis 6 | 7 | This library is free software; you can redistribute it and/or 8 | modify it under the terms of the GNU Lesser General Public 9 | License as published by the Free Software Foundation; either 10 | version 2.1 of the License, or (at your option) any later version. 11 | 12 | This library is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 | Lesser General Public License for more details. 16 | 17 | You should have received a copy of the GNU Lesser General 18 | Public License along with this library; if not, write to the 19 | Free Software Foundation, Inc., 59 Temple Place, Suite 330, 20 | Boston, MA 02111-1307 USA 21 | 22 | $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ 23 | 24 | Changelog 25 | ----------- 26 | 11/25/11 - ryan@ryanmsutton.com - Add pins for Sanguino 644P and 1284P 27 | 07/15/12 - ryan@ryanmsutton.com - Updated for arduino0101 28 | 12/24/16 - bob.kuhn@att.net - add 1284 PWMs 29 | 30 | Improvements by Kristian Sloth Lauszus, lauszus@gmail.com 31 | */ 32 | 33 | #ifndef Pins_Arduino_h 34 | #define Pins_Arduino_h 35 | 36 | #include 37 | 38 | 39 | #define PIN_SPI_SS (4) 40 | #define PIN_SPI_MOSI (5) 41 | #define PIN_SPI_MISO (6) 42 | #define PIN_SPI_SCK (7) 43 | 44 | static const uint8_t SS = PIN_SPI_SS; 45 | static const uint8_t MOSI = PIN_SPI_MOSI; 46 | static const uint8_t MISO = PIN_SPI_MISO; 47 | static const uint8_t SCK = PIN_SPI_SCK; 48 | 49 | #define PIN_WIRE_SDA (17) 50 | #define PIN_WIRE_SCL (16) 51 | 52 | static const uint8_t SDA = PIN_WIRE_SDA; 53 | static const uint8_t SCL = PIN_WIRE_SCL; 54 | 55 | #define LED_BUILTIN 0 56 | 57 | #define PIN_A0 (31) 58 | #define PIN_A1 (30) 59 | #define PIN_A2 (29) 60 | #define PIN_A3 (28) 61 | #define PIN_A4 (27) 62 | #define PIN_A5 (26) 63 | #define PIN_A6 (25) 64 | #define PIN_A7 (24) 65 | 66 | static const uint8_t A0 = PIN_A0; 67 | static const uint8_t A1 = PIN_A1; 68 | static const uint8_t A2 = PIN_A2; 69 | static const uint8_t A3 = PIN_A3; 70 | static const uint8_t A4 = PIN_A4; 71 | static const uint8_t A5 = PIN_A5; 72 | static const uint8_t A6 = PIN_A6; 73 | static const uint8_t A7 = PIN_A7; 74 | 75 | // ATMEL ATMEGA644/ATMEGA1284 / SANGUINO 76 | // 77 | // +---\/---+ 78 | // (D 0) PB0 1| |40 PA0 (AI 0 / D31) 79 | // (D 1) PB1 2| |39 PA1 (AI 1 / D30) 80 | // INT2 (D 2) PB2 3| |38 PA2 (AI 2 / D29) 81 | // PWM (D 3) PB3 4| |37 PA3 (AI 3 / D28) 82 | // SS PWM (D 4) PB4 5| |36 PA4 (AI 4 / D27) 83 | // MOSI (D 5) PB5 6| |35 PA5 (AI 5 / D26) 84 | // MISO (D 6) PB6 7| |34 PA6 (AI 6 / D25) 85 | // SCK (D 7) PB7 8| |33 PA7 (AI 7 / D24) 86 | // RST 9| |32 AREF 87 | // VCC 10| |31 GND 88 | // GND 11| |30 AVCC 89 | // XTAL2 12| |29 PC7 (D 23) 90 | // XTAL1 13| |28 PC6 (D 22) 91 | // RX0 (D 8) PD0 14| |27 PC5 (D 21) TDI 92 | // TX0 (D 9) PD1 15| |26 PC4 (D 20) TDO 93 | // INT0 RX1 (D 10) PD2 16| |25 PC3 (D 19) TMS 94 | // INT1 TX1 (D 11) PD3 17| |24 PC2 (D 18) TCK 95 | // PWM (D 12) PD4 18| |23 PC1 (D 17) SDA 96 | // PWM (D 13) PD5 19| |22 PC0 (D 16) SCL 97 | // PWM (D 14) PD6 20| |21 PD7 (D 15) PWM 98 | // +--------+ 99 | // 100 | #define NUM_DIGITAL_PINS 32 101 | #define NUM_ANALOG_INPUTS 8 102 | 103 | #define analogInputToDigitalPin(p) ((p < 8) ? 31 - (p): -1) 104 | #define analogPinToChannel(p) ((p) < 8 ? (p) : (p) >= 24 ? 31 - (p) : -1) 105 | 106 | #if defined(TCCR3A) 107 | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 7 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) 108 | #else 109 | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) 110 | #endif 111 | 112 | #define digitalPinToPCICR(p) ( (((p) >= 0) && ((p) <= 31)) ? (&PCICR) : ((uint8_t *)0) ) 113 | 114 | #define digitalPinToPCICRbit(p) ( (((p) >= 24) && ((p) <= 31)) ? 0 : \ 115 | ( (((p) >= 0) && ((p) <= 7)) ? 1 : \ 116 | ( (((p) >= 16) && ((p) <= 23)) ? 2 : \ 117 | ( (((p) >= 8) && ((p) <= 15)) ? 3 : \ 118 | 0 ) ) ) ) 119 | 120 | #define digitalPinToPCMSK(p) ( (((p) >= 24) && ((p) <= 31)) ? (&PCMSK0) : \ 121 | ( (((p) >= 0) && ((p) <= 7)) ? (&PCMSK1) : \ 122 | ( (((p) >= 16) && ((p) <= 23)) ? (&PCMSK2) : \ 123 | ( (((p) >= 8) && ((p) <= 15)) ? (&PCMSK3) : \ 124 | ((uint8_t *)0) ) ) ) ) 125 | 126 | 127 | #define digitalPinToPCMSKbit(p) ( (((p) >= 24) && ((p) <= 31)) ? (31 - (p)) : \ 128 | ( (((p) >= 0) && ((p) <= 7)) ? (p) : \ 129 | ( (((p) >= 16) && ((p) <= 23)) ? ((p) - 16) : \ 130 | ( (((p) >= 8) && ((p) <= 15)) ? ((p) - 8) : \ 131 | 0 ) ) ) ) 132 | 133 | #define digitalPinToInterrupt(p) ((p) == 10 ? 0 : ((p) == 11 ? 1 : ((p) == 2 ? 2 : NOT_AN_INTERRUPT))) 134 | 135 | #ifdef ARDUINO_MAIN 136 | // these arrays map port names (e.g. port B) to the 137 | // appropriate addresses for various functions (e.g. reading 138 | // and writing) 139 | const uint16_t PROGMEM port_to_mode_PGM[] = 140 | { 141 | NOT_A_PORT, 142 | (uint16_t) &DDRA, 143 | (uint16_t) &DDRB, 144 | (uint16_t) &DDRC, 145 | (uint16_t) &DDRD, 146 | }; 147 | 148 | const uint16_t PROGMEM port_to_output_PGM[] = 149 | { 150 | NOT_A_PORT, 151 | (uint16_t) &PORTA, 152 | (uint16_t) &PORTB, 153 | (uint16_t) &PORTC, 154 | (uint16_t) &PORTD, 155 | }; 156 | const uint16_t PROGMEM port_to_input_PGM[] = 157 | { 158 | NOT_A_PORT, 159 | (uint16_t) &PINA, 160 | (uint16_t) &PINB, 161 | (uint16_t) &PINC, 162 | (uint16_t) &PIND, 163 | }; 164 | const uint8_t PROGMEM digital_pin_to_port_PGM[] = 165 | { 166 | PB, /* 0 */ 167 | PB, 168 | PB, 169 | PB, 170 | PB, 171 | PB, 172 | PB, 173 | PB, 174 | PD, /* 8 */ 175 | PD, 176 | PD, 177 | PD, 178 | PD, 179 | PD, 180 | PD, 181 | PD, 182 | PC, /* 16 */ 183 | PC, 184 | PC, 185 | PC, 186 | PC, 187 | PC, 188 | PC, 189 | PC, 190 | PA, /* 24 */ 191 | PA, 192 | PA, 193 | PA, 194 | PA, 195 | PA, 196 | PA, 197 | PA /* 31 */ 198 | }; 199 | const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = 200 | { 201 | _BV(0), /* 0, port B */ 202 | _BV(1), 203 | _BV(2), 204 | _BV(3), 205 | _BV(4), 206 | _BV(5), 207 | _BV(6), 208 | _BV(7), 209 | _BV(0), /* 8, port D */ 210 | _BV(1), 211 | _BV(2), 212 | _BV(3), 213 | _BV(4), 214 | _BV(5), 215 | _BV(6), 216 | _BV(7), 217 | _BV(0), /* 16, port C */ 218 | _BV(1), 219 | _BV(2), 220 | _BV(3), 221 | _BV(4), 222 | _BV(5), 223 | _BV(6), 224 | _BV(7), 225 | _BV(7), /* 24, port A */ 226 | _BV(6), 227 | _BV(5), 228 | _BV(4), 229 | _BV(3), 230 | _BV(2), 231 | _BV(1), 232 | _BV(0) 233 | }; 234 | const uint8_t PROGMEM digital_pin_to_timer_PGM[] = 235 | { 236 | NOT_ON_TIMER, /* 0 - PB0 */ 237 | NOT_ON_TIMER, /* 1 - PB1 */ 238 | NOT_ON_TIMER, /* 2 - PB2 */ 239 | TIMER0A, /* 3 - PB3 */ 240 | TIMER0B, /* 4 - PB4 */ 241 | NOT_ON_TIMER, /* 5 - PB5 */ 242 | #if defined(TCCR3A) 243 | TIMER3A, /* 6 - PB6 */ 244 | TIMER3B, /* 7 - PB7 */ 245 | #else 246 | NOT_ON_TIMER, /* 6 - PB6 */ 247 | NOT_ON_TIMER, /* 7 - PB7 */ 248 | #endif 249 | NOT_ON_TIMER, /* 8 - PD0 */ 250 | NOT_ON_TIMER, /* 9 - PD1 */ 251 | NOT_ON_TIMER, /* 10 - PD2 */ 252 | NOT_ON_TIMER, /* 11 - PD3 */ 253 | TIMER1B, /* 12 - PD4 */ 254 | TIMER1A, /* 13 - PD5 */ 255 | TIMER2B, /* 14 - PD6 */ 256 | TIMER2A, /* 15 - PD7 */ 257 | NOT_ON_TIMER, /* 16 - PC0 */ 258 | NOT_ON_TIMER, /* 17 - PC1 */ 259 | NOT_ON_TIMER, /* 18 - PC2 */ 260 | NOT_ON_TIMER, /* 19 - PC3 */ 261 | NOT_ON_TIMER, /* 20 - PC4 */ 262 | NOT_ON_TIMER, /* 21 - PC5 */ 263 | NOT_ON_TIMER, /* 22 - PC6 */ 264 | NOT_ON_TIMER, /* 23 - PC7 */ 265 | NOT_ON_TIMER, /* 24 - PA0 */ 266 | NOT_ON_TIMER, /* 25 - PA1 */ 267 | NOT_ON_TIMER, /* 26 - PA2 */ 268 | NOT_ON_TIMER, /* 27 - PA3 */ 269 | NOT_ON_TIMER, /* 28 - PA4 */ 270 | NOT_ON_TIMER, /* 29 - PA5 */ 271 | NOT_ON_TIMER, /* 30 - PA6 */ 272 | NOT_ON_TIMER /* 31 - PA7 */ 273 | }; 274 | #endif 275 | 276 | // These serial port names are intended to allow libraries and architecture-neutral 277 | // sketches to automatically default to the correct port name for a particular type 278 | // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, 279 | // the first hardware serial port whose RX/TX pins are not dedicated to another use. 280 | // 281 | // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor 282 | // 283 | // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial 284 | // 285 | // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library 286 | // 287 | // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. 288 | // 289 | // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX 290 | // pins are NOT connected to anything by default. 291 | 292 | #define SERIAL_PORT_MONITOR Serial 293 | #define SERIAL_PORT_HARDWARE Serial 294 | 295 | #if defined(UBRR1H) 296 | #define SERIAL_PORT_HARDWARE1 Serial1 297 | #define SERIAL_PORT_HARDWARE_OPEN Serial1 298 | #endif 299 | 300 | #endif 301 | -------------------------------------------------------------------------------- /boards.txt: -------------------------------------------------------------------------------- 1 | ############################################################ 2 | 3 | atmega644.name=Sanguino W/ ATmega644 or ATmega644A (16 MHz) 4 | 5 | atmega644.upload.maximum_size=64512 6 | atmega644.upload.maximum_data_size=4096 7 | 8 | atmega644.upload.protocol=arduino 9 | atmega644.upload.speed=115200 10 | atmega644.bootloader.path=optiboot 11 | atmega644.bootloader.file=optiboot_atmega644.hex 12 | 13 | atmega644.bootloader.low_fuses=0xFF 14 | atmega644.bootloader.high_fuses=0xDE 15 | atmega644.bootloader.extended_fuses=0xFD 16 | atmega644.bootloader.unlock_bits=0x3F 17 | atmega644.bootloader.lock_bits=0x0F 18 | 19 | atmega644.build.mcu=atmega644 20 | atmega644.build.f_cpu=16000000L 21 | atmega644.build.board=AVR_SANGUINO 22 | atmega644.build.core=arduino:arduino 23 | atmega644.build.variant=sanguino 24 | 25 | ############################################################ 26 | 27 | atmega644_8m.name=Sanguino W/ ATmega644 or ATmega644A (8 MHz) 28 | 29 | atmega644_8m.upload.maximum_size=64512 30 | atmega644_8m.upload.maximum_data_size=4096 31 | 32 | atmega644_8m.upload.protocol=arduino 33 | atmega644_8m.upload.speed=57600 34 | atmega644_8m.bootloader.path=optiboot 35 | atmega644_8m.bootloader.file=optiboot_atmega644_8m.hex 36 | 37 | atmega644_8m.bootloader.low_fuses=0xFF 38 | atmega644_8m.bootloader.high_fuses=0xDE 39 | atmega644_8m.bootloader.extended_fuses=0xFD 40 | atmega644_8m.bootloader.unlock_bits=0x3F 41 | atmega644_8m.bootloader.lock_bits=0x0F 42 | 43 | atmega644_8m.build.mcu=atmega644 44 | atmega644_8m.build.f_cpu=8000000L 45 | atmega644_8m.build.board=AVR_SANGUINO 46 | atmega644_8m.build.core=arduino:arduino 47 | atmega644_8m.build.variant=sanguino 48 | 49 | ############################################################## 50 | 51 | atmega644p.name=Sanguino W/ ATmega644P or ATmega644PA (16 MHz) 52 | 53 | atmega644p.upload.maximum_size=64512 54 | atmega644p.upload.maximum_data_size=4096 55 | 56 | atmega644p.upload.protocol=arduino 57 | atmega644p.upload.speed=115200 58 | atmega644p.bootloader.path=optiboot 59 | atmega644p.bootloader.file=optiboot_atmega644p.hex 60 | 61 | atmega644p.bootloader.low_fuses=0xFF 62 | atmega644p.bootloader.high_fuses=0xDE 63 | atmega644p.bootloader.extended_fuses=0xFD 64 | atmega644p.bootloader.unlock_bits=0x3F 65 | atmega644p.bootloader.lock_bits=0x0F 66 | 67 | atmega644p.build.mcu=atmega644p 68 | atmega644p.build.f_cpu=16000000L 69 | atmega644p.build.board=AVR_SANGUINO 70 | atmega644p.build.core=arduino:arduino 71 | atmega644p.build.variant=sanguino 72 | 73 | ############################################################## 74 | 75 | atmega644p_8m.name=Sanguino W/ ATmega644P or ATmega644PA (8 MHz) 76 | 77 | atmega644p_8m.upload.maximum_size=64512 78 | atmega644p_8m.upload.maximum_data_size=4096 79 | 80 | atmega644p_8m.upload.protocol=arduino 81 | atmega644p_8m.upload.speed=57600 82 | atmega644p_8m.bootloader.path=optiboot 83 | atmega644p_8m.bootloader.file=optiboot_atmega644p_8m.hex 84 | 85 | atmega644p_8m.bootloader.low_fuses=0xFF 86 | atmega644p_8m.bootloader.high_fuses=0xDE 87 | atmega644p_8m.bootloader.extended_fuses=0xFD 88 | atmega644p_8m.bootloader.unlock_bits=0x3F 89 | atmega644p_8m.bootloader.lock_bits=0x0F 90 | 91 | atmega644p_8m.build.mcu=atmega644p 92 | atmega644p_8m.build.f_cpu=8000000L 93 | atmega644p_8m.build.board=AVR_SANGUINO 94 | atmega644p_8m.build.core=arduino:arduino 95 | atmega644p_8m.build.variant=sanguino 96 | 97 | ############################################################## 98 | 99 | atmega1284p.name=Sanguino W/ ATmega1284 or ATmega1284P (16MHz) 100 | 101 | atmega1284p.upload.maximum_size=130048 102 | atmega1284p.upload.maximum_data_size=16384 103 | 104 | atmega1284p.upload.protocol=arduino 105 | atmega1284p.upload.speed=115200 106 | atmega1284p.bootloader.path=optiboot 107 | atmega1284p.bootloader.file=optiboot_atmega1284p.hex 108 | 109 | atmega1284p.bootloader.low_fuses=0xFF 110 | atmega1284p.bootloader.high_fuses=0xDE 111 | atmega1284p.bootloader.extended_fuses=0xFD 112 | atmega1284p.bootloader.unlock_bits=0x3F 113 | atmega1284p.bootloader.lock_bits=0x0F 114 | 115 | atmega1284p.build.mcu=atmega1284p 116 | atmega1284p.build.f_cpu=16000000L 117 | atmega1284p.build.board=AVR_SANGUINO 118 | atmega1284p.build.core=arduino:arduino 119 | atmega1284p.build.variant=sanguino 120 | 121 | ############################################################ 122 | 123 | atmega1284p_8m.name=Sanguino W/ ATmega1284 or ATmega1284P (8MHz) 124 | 125 | atmega1284p_8m.upload.maximum_size=130048 126 | atmega1284p_8m.upload.maximum_data_size=16384 127 | 128 | atmega1284p_8m.upload.protocol=arduino 129 | atmega1284p_8m.upload.speed=57600 130 | atmega1284p_8m.bootloader.path=optiboot 131 | atmega1284p_8m.bootloader.file=optiboot_atmega1284p_8m.hex 132 | 133 | atmega1284p_8m.bootloader.low_fuses=0xFF 134 | atmega1284p_8m.bootloader.high_fuses=0xDE 135 | atmega1284p_8m.bootloader.extended_fuses=0xFD 136 | atmega1284p_8m.bootloader.unlock_bits=0x3F 137 | atmega1284p_8m.bootloader.lock_bits=0x0F 138 | 139 | atmega1284p_8m.build.mcu=atmega1284p 140 | atmega1284p_8m.build.f_cpu=8000000L 141 | atmega1284p_8m.build.board=AVR_SANGUINO 142 | atmega1284p_8m.build.core=arduino:arduino 143 | atmega1284p_8m.build.variant=sanguino 144 | 145 | ############################################################ -------------------------------------------------------------------------------- /bootloaders/optiboot/ATmega1284.md: -------------------------------------------------------------------------------- 1 | To burn the bootloader for the ATmega1284 running at 16MHz use the following command: 2 | 3 | ``` 4 | make atmega1284p_isp ISPPORT=/dev/tty.usbmodem26411 5 | ``` 6 | 7 | To burn the 8MHz bootloader use the following command: 8 | 9 | ``` 10 | make atmega1284p_8m_isp ISPPORT=/dev/tty.usbmodem26411 11 | ``` 12 | 13 | Also make sure to add -F to ISPFUSES and ISPFLASH in [Makefile.isp](Makefile.isp). -------------------------------------------------------------------------------- /bootloaders/optiboot/Makefile.isp: -------------------------------------------------------------------------------- 1 | # Makefile.isp for Optiboot 2 | # Bill Westfield (WestfW@yahoo.com) March, 2013 3 | # $Id$ 4 | # 5 | # Instructions: 6 | # 7 | # This is a "daughter" Makefile that burns the bootloader using a ISP 8 | # device programmer. It is designed to inherit assorted variables from 9 | # the parent optiboot "Makefile"... Using a daughter makefile makes 10 | # certain variable manipulations more obvious. 11 | # 12 | # To burn bootloader .hex file, invoke the main Makefile using: 13 | # make diecimila_isp 14 | # make lilypad_isp 15 | # make ng_isp 16 | # etc... 17 | 18 | # 19 | # Note: inherit paths/etc from parent Makefile. 20 | # 21 | 22 | #--------------------------------------------------------------------------- 23 | 24 | # enter the parameters for the avrdude isp tool -b19200 25 | # 26 | 27 | # Inherit avrdude paths from top-level makefile 28 | AVRDUDE_ROOT ?= $(GCCROOT) 29 | AVRDUDE_CONF ?= -C$(TOOLROOT)/avr/etc/avrdude.conf 30 | 31 | # These are the parameters for a usb-based STK500v2 programmer. 32 | # Exact type unknown. (historical Makefile values.) 33 | #ISPTOOL = stk500v2 34 | #ISPPORT = usb 35 | #ISPSPEED = -b 115200 36 | # 37 | # 38 | # These are parameters for using an Arduino with the ArduinoISP sketch 39 | # as the programmer. On a mac, for a particular Uno as programmer. 40 | ISPTOOL ?= stk500v1 41 | ISPPORT ?= /dev/tty.usbmodemfd3141 42 | ISPSPEED ?= -b19200 43 | 44 | 45 | 46 | # Not all chips have EFUSE. 47 | 48 | ifdef EFUSE 49 | EFUSE_CMD= -U efuse:w:0x$(EFUSE):m 50 | endif 51 | 52 | 53 | # There are certain complicated caused by the fact that the default state 54 | # of a fuse is a "1" rather than a "0", especially with respect to fuse bits 55 | # that have not been implemented. Those would normally not be included, but 56 | # unimplemented fuses still default to being "1" 57 | # 58 | # the efuse should really be 0xf8; since, however, only the lower 59 | # three bits of that byte are used on the atmega168, avrdude gets 60 | # confused if you specify 1's for the higher bits, see: 61 | # http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ 62 | # 63 | # similarly, the lock bits should be 0xff instead of 0x3f (to 64 | # unlock the bootloader section) and 0xcf instead of 0x2f (to 65 | # lock it), but since the high two bits of the lock byte are 66 | # unused, avrdude would get confused. 67 | 68 | # Set fuses and unlock memory 69 | ISPFUSES = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ 70 | -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ 71 | -e -u -U lock:w:0x3f:m $(EFUSE_CMD) \ 72 | -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m 73 | # program flash and lock memory. 74 | ISPFLASH = $(AVRDUDE_ROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ 75 | -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ 76 | -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m 77 | 78 | isp: $(PROGRAM)_$(TARGET).hex 79 | $(ISPFUSES) 80 | $(ISPFLASH) 81 | -------------------------------------------------------------------------------- /bootloaders/optiboot/README.md: -------------------------------------------------------------------------------- 1 | Forked from official Optiboot repo: . 2 | 3 | # Original text 4 | 5 | ------------------------------------------------------------ 6 | 7 | This directory contains the Optiboot small bootloader for AVR 8 | microcontrollers, somewhat modified specifically for the Arduino 9 | environment. 10 | 11 | Optiboot is more fully described here: 12 | and is the work of Peter Knight (aka Cathedrow), building on work of Jason P 13 | Kyle, Spiff, and Ladyada. Arduino-specific modification are by Bill 14 | Westfield (aka WestfW) 15 | 16 | Arduino-specific issues are tracked as part of the Arduino project 17 | at 18 | 19 | 20 | ------------------------------------------------------------ 21 | Building optiboot for Arduino. 22 | 23 | Production builds of optiboot for Arduino are done on a Mac in "unix mode" 24 | using CrossPack-AVR-20100115. CrossPack tracks WINAVR (for windows), which 25 | is just a package of avr-gcc and related utilities, so similar builds should 26 | work on Windows or Linux systems. 27 | 28 | One of the Arduino-specific changes is modifications to the makefile to 29 | allow building optiboot using only the tools installed as part of the 30 | Arduino environment, or the Arduino source development tree. All three 31 | build procedures should yield identical binaries (.hex files) (although 32 | this may change if compiler versions drift apart between CrossPack and 33 | the Arduino IDE.) 34 | 35 | 36 | Building Optiboot in the Arduino IDE Install. 37 | 38 | Work in the .../hardware/arduino/bootloaders/optiboot/ and use the 39 | "omake <targets>" command, which just generates a command that uses 40 | the arduino-included "make" utility with a command like: 41 | make OS=windows ENV=arduino <targets> 42 | or make OS=macosx ENV=arduino <targets> 43 | On windows, this assumes you're using the windows command shell. If 44 | you're using a cygwin or mingw shell, or have one of those in your 45 | path, the build will probably break due to slash vs backslash issues. 46 | On a Mac, if you have the developer tools installed, you can use the 47 | Apple-supplied version of make. 48 | The makefile uses relative paths ("../../../tools/" and such) to find 49 | the programs it needs, so you need to work in the existing optiboot 50 | directory (or something created at the same "level") for it to work. 51 | 52 | 53 | Building Optiboot in the Arduino Source Development Install. 54 | 55 | In this case, there is no special shell script, and you're assumed to 56 | have "make" installed somewhere in your path. 57 | Build the Arduino source ("ant build") to unpack the tools into the 58 | expected directory. 59 | Work in Arduino/hardware/arduino/bootloaders/optiboot and use 60 | make OS=windows ENV=arduinodev <targets> 61 | or make OS=macosx ENV=arduinodev <targets> 62 | 63 | 64 | Programming Chips Using the \_isp Targets 65 | 66 | The CPU targets have corresponding ISP targets that will actuall 67 | program the bootloader into a chip. "atmega328\_isp" for the atmega328, 68 | for example. These will set the fuses and lock bits as appropriate as 69 | well as uploading the bootloader code. 70 | 71 | ISP Targets in Version 5.0 and later: 72 | 73 | The isp targets are now built using a separate "Makefile.isp" makefile, 74 | which should make modification easier and more obvious. This also fixes 75 | the atmega8\_isp target problem mentioned below. The default 76 | configuration assumes an ArduinoISP setup, but you will probably need to 77 | update at least the serial port, since those are different for each 78 | Arduino board and/or system/ 79 | 80 | 81 | ISP Targets in Version 4.6 and earlier: 82 | 83 | The older makefiles default to using a USB programmer, but you can use a 84 | serial programmer like ArduinoISP by changing the appropriate variables 85 | when you invoke make: 86 | 87 | ``` 88 | make ISPTOOL=stk500v1 ISPPORT=/dev/tty.usbserial-A20e1eAN ISPSPEED=-b19200 atmega328_isp 89 | ``` 90 | 91 | The "atmega8\_isp" target does not currently work, because the mega8 92 | doesn't have the "extended" fuse that the generic ISP target wants to 93 | pass on to avrdude. You'll need to run avrdude manually. 94 | 95 | 96 | Standard Targets 97 | 98 | I've reduced the pre-built and source-version-controlled targets 99 | (.hex and .lst files included in the git repository) to just the 100 | three basic 16MHz targets: atmega8, atmega16, atmega328. 101 | -------------------------------------------------------------------------------- /bootloaders/optiboot/baudcheck.c: -------------------------------------------------------------------------------- 1 | /* 2 | * baudcheck.c 3 | * Mar, 2013 by Bill Westfield (WestfW@yahoo.com) 4 | * Exercises in executing arithmetic code on a system that we can't count 5 | * on having the usual languages or tools installed. 6 | * 7 | * This little "C program" is run through the C preprocessor using the same 8 | * arguments as our "real" target (which should assure that it gets the 9 | * same values for clock speed and desired baud rate), and produces as 10 | * output a shell script that can be run through bash, and THAT in turn 11 | * writes the desired output... 12 | * 13 | * Note that the C-style comments are stripped by the C preprocessor. 14 | */ 15 | 16 | /* 17 | * First strip any trailing "L" from the defined constants. To do this 18 | * we need to make the constants into shell variables first. 19 | */ 20 | bpsx=BAUD_RATE 21 | bps=${bpsx/L/} 22 | fcpux=F_CPU 23 | fcpu=${fcpux/L/} 24 | 25 | // echo f_cpu = $fcpu, baud = $bps 26 | /* 27 | * Compute the divisor 28 | */ 29 | BAUD_SETTING=$(( ( ($fcpu + $bps * 4) / (($bps * 8))) - 1 )) 30 | // echo baud setting = $BAUD_SETTING 31 | 32 | /* 33 | * Based on the computer divisor, calculate the actual bitrate, 34 | * And the error. Since we're all integers, we have to calculate 35 | * the tenths part of the error separately. 36 | */ 37 | BAUD_ACTUAL=$(( ($fcpu/(8 * (($BAUD_SETTING)+1))) )) 38 | BAUD_ERROR=$(( (( 100*($bps - $BAUD_ACTUAL) ) / $bps) )) 39 | ERR_TS=$(( ((( 1000*($bps - $BAUD_ACTUAL) ) / $bps) - $BAUD_ERROR * 10) )) 40 | ERR_TENTHS=$(( ERR_TS > 0 ? ERR_TS: -ERR_TS )) 41 | 42 | /* 43 | * Print a nice message containing the info we've calculated 44 | */ 45 | echo BAUD RATE CHECK: Desired: $bps, Real: $BAUD_ACTUAL, UBRRL = $BAUD_SETTING, Error=$BAUD_ERROR.$ERR_TENTHS\% 46 | 47 | 48 | 49 | 50 | 51 | -------------------------------------------------------------------------------- /bootloaders/optiboot/makeall: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | make clean 3 | # 4 | # buildable platforms of somewhat questionable support level 5 | #make lilypad 6 | #make pro8 7 | #make pro16 8 | #make pro20 9 | #make atmega328_pro8 10 | #make sanguino 11 | #make mega 12 | #make atmega88 13 | #make luminet 14 | #make diecimila 15 | # 16 | # The "big three" standard bootloaders. 17 | # These need to be built AFTER the platforms, or they'll get removed 18 | #make atmega8 19 | #make atmega168 20 | #make atmega328 21 | 22 | make balanduino644 23 | make balanduino 24 | 25 | make atmega644_8m 26 | make atmega644p_8m 27 | make atmega1284p_8m 28 | 29 | make atmega644 30 | make atmega644p 31 | make atmega1284p -------------------------------------------------------------------------------- /bootloaders/optiboot/omake: -------------------------------------------------------------------------------- 1 | echo ../../../tools/avr/bin/make OS=macosx ENV=arduino $* 2 | ../../../tools/avr/bin/make OS=macosx ENV=arduino $* 3 | -------------------------------------------------------------------------------- /bootloaders/optiboot/omake.bat: -------------------------------------------------------------------------------- 1 | ..\..\..\tools\avr\utils\bin\make OS=windows ENV=arduino %* 2 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega1284p.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C20080E18093C4008EE032 5 | :10FC3000B8D0209A26E080E39CEF31E090938500D5 6 | :10FC40008093840036BBB09BFECF189AA8952150B4 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega1284p_8m.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C20080E18093C4008EE032 5 | :10FC3000B8D0209A26E088E19EEF31E090938500CD 6 | :10FC40008093840036BBB09BFECF189AA8952150B4 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E080E39CEF31E090938500DA 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644.lst: -------------------------------------------------------------------------------- 1 | 2 | optiboot_atmega644.elf: file format elf32-avr 3 | 4 | Sections: 5 | Idx Name Size VMA LMA File off Algn 6 | 0 .data 00000000 00800100 0000fdce 00000242 2**0 7 | CONTENTS, ALLOC, LOAD, DATA 8 | 1 .text 000001ce 0000fc00 0000fc00 00000074 2**1 9 | CONTENTS, ALLOC, LOAD, READONLY, CODE 10 | 2 .version 00000002 0000fffe 0000fffe 00000242 2**0 11 | CONTENTS, READONLY 12 | 3 .comment 00000011 00000000 00000000 00000244 2**0 13 | CONTENTS, READONLY 14 | 4 .debug_aranges 00000028 00000000 00000000 00000255 2**0 15 | CONTENTS, READONLY, DEBUGGING 16 | 5 .debug_info 0000041f 00000000 00000000 0000027d 2**0 17 | CONTENTS, READONLY, DEBUGGING 18 | 6 .debug_abbrev 000001cb 00000000 00000000 0000069c 2**0 19 | CONTENTS, READONLY, DEBUGGING 20 | 7 .debug_line 00000190 00000000 00000000 00000867 2**0 21 | CONTENTS, READONLY, DEBUGGING 22 | 8 .debug_frame 00000094 00000000 00000000 000009f8 2**2 23 | CONTENTS, READONLY, DEBUGGING 24 | 9 .debug_str 00000121 00000000 00000000 00000a8c 2**0 25 | CONTENTS, READONLY, DEBUGGING 26 | 10 .debug_loc 0000023b 00000000 00000000 00000bad 2**0 27 | CONTENTS, READONLY, DEBUGGING 28 | 11 .debug_ranges 00000048 00000000 00000000 00000de8 2**0 29 | CONTENTS, READONLY, DEBUGGING 30 | 31 | Disassembly of section .text: 32 | 33 | 0000fc00
: 34 | # define UART_SRL UBRR3L 35 | # define UART_UDR UDR3 36 | #endif 37 | 38 | /* main program starts here */ 39 | int main(void) { 40 | fc00: 1f 92 push r1 41 | fc02: cd b7 in r28, 0x3d ; 61 42 | fc04: de b7 in r29, 0x3e ; 62 43 | // SP points to RAMEND 44 | // r1 contains zero 45 | // 46 | // If not, uncomment the following instructions: 47 | // cli(); 48 | asm volatile ("clr __zero_reg__"); 49 | fc06: 11 24 eor r1, r1 50 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 51 | SP=RAMEND; // This is done by hardware reset 52 | #endif 53 | 54 | // Adaboot no-wait mod 55 | ch = MCUSR; 56 | fc08: 84 b7 in r24, 0x34 ; 52 57 | MCUSR = 0; 58 | fc0a: 14 be out 0x34, r1 ; 52 59 | if (!(ch & _BV(EXTRF))) appStart(ch); 60 | fc0c: 81 ff sbrs r24, 1 61 | fc0e: d9 d0 rcall .+434 ; 0xfdc2 62 | 63 | #if LED_START_FLASHES > 0 64 | // Set up Timer 1 for timeout counter 65 | TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 66 | fc10: 85 e0 ldi r24, 0x05 ; 5 67 | fc12: 80 93 81 00 sts 0x0081, r24 68 | UCSRA = _BV(U2X); //Double speed mode USART 69 | UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx 70 | UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 71 | UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 72 | #else 73 | UART_SRA = _BV(U2X0); //Double speed mode USART0 74 | fc16: 82 e0 ldi r24, 0x02 ; 2 75 | fc18: 80 93 c0 00 sts 0x00C0, r24 76 | UART_SRB = _BV(RXEN0) | _BV(TXEN0); 77 | fc1c: 88 e1 ldi r24, 0x18 ; 24 78 | fc1e: 80 93 c1 00 sts 0x00C1, r24 79 | UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); 80 | fc22: 86 e0 ldi r24, 0x06 ; 6 81 | fc24: 80 93 c2 00 sts 0x00C2, r24 82 | UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 83 | fc28: 80 e1 ldi r24, 0x10 ; 16 84 | fc2a: 80 93 c4 00 sts 0x00C4, r24 85 | #endif 86 | #endif 87 | 88 | // Set up watchdog to trigger after 500ms 89 | watchdogConfig(WATCHDOG_1S); 90 | fc2e: 8e e0 ldi r24, 0x0E ; 14 91 | fc30: b3 d0 rcall .+358 ; 0xfd98 92 | 93 | #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) 94 | /* Set LED pin as output */ 95 | LED_DDR |= _BV(LED); 96 | fc32: 20 9a sbi 0x04, 0 ; 4 97 | fc34: 26 e0 ldi r18, 0x06 ; 6 98 | } 99 | 100 | #if LED_START_FLASHES > 0 101 | void flash_led(uint8_t count) { 102 | do { 103 | TCNT1 = -(F_CPU/(1024*16)); 104 | fc36: 80 e3 ldi r24, 0x30 ; 48 105 | fc38: 9c ef ldi r25, 0xFC ; 252 106 | TIFR1 = _BV(TOV1); 107 | fc3a: 31 e0 ldi r19, 0x01 ; 1 108 | } 109 | 110 | #if LED_START_FLASHES > 0 111 | void flash_led(uint8_t count) { 112 | do { 113 | TCNT1 = -(F_CPU/(1024*16)); 114 | fc3c: 90 93 85 00 sts 0x0085, r25 115 | fc40: 80 93 84 00 sts 0x0084, r24 116 | TIFR1 = _BV(TOV1); 117 | fc44: 36 bb out 0x16, r19 ; 22 118 | while(!(TIFR1 & _BV(TOV1))); 119 | fc46: b0 9b sbis 0x16, 0 ; 22 120 | fc48: fe cf rjmp .-4 ; 0xfc46 121 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 122 | LED_PORT ^= _BV(LED); 123 | #else 124 | LED_PIN |= _BV(LED); 125 | fc4a: 18 9a sbi 0x03, 0 ; 3 126 | } 127 | #endif 128 | 129 | // Watchdog functions. These are only safe with interrupts turned off. 130 | void watchdogReset() { 131 | __asm__ __volatile__ ( 132 | fc4c: a8 95 wdr 133 | fc4e: 21 50 subi r18, 0x01 ; 1 134 | LED_PORT ^= _BV(LED); 135 | #else 136 | LED_PIN |= _BV(LED); 137 | #endif 138 | watchdogReset(); 139 | } while (--count); 140 | fc50: a9 f7 brne .-22 ; 0xfc3c 141 | fc52: 81 2c mov r8, r1 142 | fc54: 91 2c mov r9, r1 143 | ch = SPM_PAGESIZE / 2; 144 | do { 145 | uint16_t a; 146 | a = *bufPtr++; 147 | a |= (*bufPtr++) << 8; 148 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 149 | fc56: ee 24 eor r14, r14 150 | fc58: e3 94 inc r14 151 | addrPtr += 2; 152 | } while (--ch); 153 | 154 | // Write from programming buffer 155 | __boot_page_write_short((uint16_t)(void*)address); 156 | fc5a: 95 e0 ldi r25, 0x05 ; 5 157 | fc5c: d9 2e mov r13, r25 158 | boot_spm_busy_wait(); 159 | 160 | #if defined(RWWSRE) 161 | // Reenable read access to flash 162 | boot_rww_enable(); 163 | fc5e: 21 e1 ldi r18, 0x11 ; 17 164 | fc60: c2 2e mov r12, r18 165 | 166 | // If we are in NRWW section, page erase has to be delayed until now. 167 | // Todo: Take RAMPZ into account (not doing so just means that we will 168 | // treat the top of both "pages" of flash as NRWW, for a slight speed 169 | // decrease, so fixing this is not urgent.) 170 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 171 | fc62: 33 e0 ldi r19, 0x03 ; 3 172 | fc64: f3 2e mov r15, r19 173 | #endif 174 | 175 | /* Forever loop */ 176 | for (;;) { 177 | /* get character from UART */ 178 | ch = getch(); 179 | fc66: 8c d0 rcall .+280 ; 0xfd80 180 | 181 | if(ch == STK_GET_PARAMETER) { 182 | fc68: 81 34 cpi r24, 0x41 ; 65 183 | fc6a: 71 f4 brne .+28 ; 0xfc88 184 | unsigned char which = getch(); 185 | fc6c: 89 d0 rcall .+274 ; 0xfd80 186 | verifySpace(); 187 | fc6e: 89 83 std Y+1, r24 ; 0x01 188 | fc70: 99 d0 rcall .+306 ; 0xfda4 189 | if (which == 0x82) { 190 | fc72: 89 81 ldd r24, Y+1 ; 0x01 191 | fc74: 82 38 cpi r24, 0x82 ; 130 192 | fc76: 09 f4 brne .+2 ; 0xfc7a 193 | fc78: 1e c0 rjmp .+60 ; 0xfcb6 194 | /* 195 | * Send optiboot version as "minor SW version" 196 | */ 197 | putch(OPTIBOOT_MINVER); 198 | } else if (which == 0x81) { 199 | fc7a: 81 38 cpi r24, 0x81 ; 129 200 | fc7c: 11 f4 brne .+4 ; 0xfc82 201 | putch(OPTIBOOT_MAJVER); 202 | fc7e: 85 e0 ldi r24, 0x05 ; 5 203 | fc80: 01 c0 rjmp .+2 ; 0xfc84 204 | } else { 205 | /* 206 | * GET PARAMETER returns a generic 0x03 reply for 207 | * other parameters - enough to keep Avrdude happy 208 | */ 209 | putch(0x03); 210 | fc82: 83 e0 ldi r24, 0x03 ; 3 211 | fc84: 76 d0 rcall .+236 ; 0xfd72 212 | fc86: 72 c0 rjmp .+228 ; 0xfd6c 213 | } 214 | } 215 | else if(ch == STK_SET_DEVICE) { 216 | fc88: 82 34 cpi r24, 0x42 ; 66 217 | fc8a: 11 f4 brne .+4 ; 0xfc90 218 | // SET DEVICE is ignored 219 | getNch(20); 220 | fc8c: 84 e1 ldi r24, 0x14 ; 20 221 | fc8e: 03 c0 rjmp .+6 ; 0xfc96 222 | } 223 | else if(ch == STK_SET_DEVICE_EXT) { 224 | fc90: 85 34 cpi r24, 0x45 ; 69 225 | fc92: 19 f4 brne .+6 ; 0xfc9a 226 | // SET DEVICE EXT is ignored 227 | getNch(5); 228 | fc94: 85 e0 ldi r24, 0x05 ; 5 229 | fc96: 8e d0 rcall .+284 ; 0xfdb4 230 | fc98: 69 c0 rjmp .+210 ; 0xfd6c 231 | } 232 | else if(ch == STK_LOAD_ADDRESS) { 233 | fc9a: 85 35 cpi r24, 0x55 ; 85 234 | fc9c: 41 f4 brne .+16 ; 0xfcae 235 | // LOAD ADDRESS 236 | uint16_t newAddress; 237 | newAddress = getch(); 238 | fc9e: 70 d0 rcall .+224 ; 0xfd80 239 | fca0: 88 2e mov r8, r24 240 | newAddress = (newAddress & 0xff) | (getch() << 8); 241 | fca2: 6e d0 rcall .+220 ; 0xfd80 242 | fca4: 91 2c mov r9, r1 243 | fca6: 98 2a or r9, r24 244 | #ifdef RAMPZ 245 | // Transfer top bit to RAMPZ 246 | RAMPZ = (newAddress & 0x8000) ? 1 : 0; 247 | #endif 248 | newAddress += newAddress; // Convert from word address to byte address 249 | fca8: 88 0c add r8, r8 250 | fcaa: 99 1c adc r9, r9 251 | fcac: 5e c0 rjmp .+188 ; 0xfd6a 252 | address = newAddress; 253 | verifySpace(); 254 | } 255 | else if(ch == STK_UNIVERSAL) { 256 | fcae: 86 35 cpi r24, 0x56 ; 86 257 | fcb0: 21 f4 brne .+8 ; 0xfcba 258 | // UNIVERSAL command is ignored 259 | getNch(4); 260 | fcb2: 84 e0 ldi r24, 0x04 ; 4 261 | fcb4: 7f d0 rcall .+254 ; 0xfdb4 262 | putch(0x00); 263 | fcb6: 80 e0 ldi r24, 0x00 ; 0 264 | fcb8: e5 cf rjmp .-54 ; 0xfc84 265 | } 266 | /* Write memory, length is big endian and is in bytes */ 267 | else if(ch == STK_PROG_PAGE) { 268 | fcba: 84 36 cpi r24, 0x64 ; 100 269 | fcbc: 09 f0 breq .+2 ; 0xfcc0 270 | fcbe: 3a c0 rjmp .+116 ; 0xfd34 271 | // PROGRAM PAGE - we support flash programming only, not EEPROM 272 | uint8_t *bufPtr; 273 | uint16_t addrPtr; 274 | 275 | getch(); /* getlen() */ 276 | fcc0: 5f d0 rcall .+190 ; 0xfd80 277 | length = getch(); 278 | fcc2: 5e d0 rcall .+188 ; 0xfd80 279 | fcc4: b8 2e mov r11, r24 280 | getch(); 281 | fcc6: 5c d0 rcall .+184 ; 0xfd80 282 | 283 | // If we are in RWW section, immediately start page erase 284 | if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 285 | fcc8: 81 14 cp r8, r1 286 | fcca: 80 ee ldi r24, 0xE0 ; 224 287 | fccc: 98 06 cpc r9, r24 288 | fcce: 18 f4 brcc .+6 ; 0xfcd6 289 | fcd0: f4 01 movw r30, r8 290 | fcd2: f7 be out 0x37, r15 ; 55 291 | fcd4: e8 95 spm 292 | fcd6: 00 e0 ldi r16, 0x00 ; 0 293 | fcd8: 11 e0 ldi r17, 0x01 ; 1 294 | 295 | // While that is going on, read in page contents 296 | bufPtr = buff; 297 | do *bufPtr++ = getch(); 298 | fcda: 52 d0 rcall .+164 ; 0xfd80 299 | fcdc: f8 01 movw r30, r16 300 | fcde: 81 93 st Z+, r24 301 | fce0: 8f 01 movw r16, r30 302 | while (--length); 303 | fce2: be 12 cpse r11, r30 304 | fce4: fa cf rjmp .-12 ; 0xfcda 305 | 306 | // If we are in NRWW section, page erase has to be delayed until now. 307 | // Todo: Take RAMPZ into account (not doing so just means that we will 308 | // treat the top of both "pages" of flash as NRWW, for a slight speed 309 | // decrease, so fixing this is not urgent.) 310 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 311 | fce6: 81 14 cp r8, r1 312 | fce8: f0 ee ldi r31, 0xE0 ; 224 313 | fcea: 9f 06 cpc r9, r31 314 | fcec: 18 f0 brcs .+6 ; 0xfcf4 315 | fcee: f4 01 movw r30, r8 316 | fcf0: f7 be out 0x37, r15 ; 55 317 | fcf2: e8 95 spm 318 | 319 | // Read command terminator, start reply 320 | verifySpace(); 321 | fcf4: 57 d0 rcall .+174 ; 0xfda4 322 | 323 | // If only a partial page is to be programmed, the erase might not be complete. 324 | // So check that here 325 | boot_spm_busy_wait(); 326 | fcf6: 07 b6 in r0, 0x37 ; 55 327 | fcf8: 00 fc sbrc r0, 0 328 | fcfa: fd cf rjmp .-6 ; 0xfcf6 329 | fcfc: f4 01 movw r30, r8 330 | fcfe: a0 e0 ldi r26, 0x00 ; 0 331 | fd00: b1 e0 ldi r27, 0x01 ; 1 332 | bufPtr = buff; 333 | addrPtr = (uint16_t)(void*)address; 334 | ch = SPM_PAGESIZE / 2; 335 | do { 336 | uint16_t a; 337 | a = *bufPtr++; 338 | fd02: 8c 91 ld r24, X 339 | a |= (*bufPtr++) << 8; 340 | fd04: 11 96 adiw r26, 0x01 ; 1 341 | fd06: 2c 91 ld r18, X 342 | fd08: 11 97 sbiw r26, 0x01 ; 1 343 | fd0a: 90 e0 ldi r25, 0x00 ; 0 344 | fd0c: 92 2b or r25, r18 345 | # define UART_SRL UBRR3L 346 | # define UART_UDR UDR3 347 | #endif 348 | 349 | /* main program starts here */ 350 | int main(void) { 351 | fd0e: 12 96 adiw r26, 0x02 ; 2 352 | ch = SPM_PAGESIZE / 2; 353 | do { 354 | uint16_t a; 355 | a = *bufPtr++; 356 | a |= (*bufPtr++) << 8; 357 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 358 | fd10: 0c 01 movw r0, r24 359 | fd12: e7 be out 0x37, r14 ; 55 360 | fd14: e8 95 spm 361 | fd16: 11 24 eor r1, r1 362 | addrPtr += 2; 363 | fd18: 32 96 adiw r30, 0x02 ; 2 364 | } while (--ch); 365 | fd1a: a1 15 cp r26, r1 366 | fd1c: 82 e0 ldi r24, 0x02 ; 2 367 | fd1e: b8 07 cpc r27, r24 368 | fd20: 81 f7 brne .-32 ; 0xfd02 369 | 370 | // Write from programming buffer 371 | __boot_page_write_short((uint16_t)(void*)address); 372 | fd22: f4 01 movw r30, r8 373 | fd24: d7 be out 0x37, r13 ; 55 374 | fd26: e8 95 spm 375 | boot_spm_busy_wait(); 376 | fd28: 07 b6 in r0, 0x37 ; 55 377 | fd2a: 00 fc sbrc r0, 0 378 | fd2c: fd cf rjmp .-6 ; 0xfd28 379 | 380 | #if defined(RWWSRE) 381 | // Reenable read access to flash 382 | boot_rww_enable(); 383 | fd2e: c7 be out 0x37, r12 ; 55 384 | fd30: e8 95 spm 385 | fd32: 1c c0 rjmp .+56 ; 0xfd6c 386 | #endif 387 | 388 | } 389 | /* Read memory block mode, length is big endian. */ 390 | else if(ch == STK_READ_PAGE) { 391 | fd34: 84 37 cpi r24, 0x74 ; 116 392 | fd36: 61 f4 brne .+24 ; 0xfd50 393 | // READ PAGE - we only read flash 394 | getch(); /* getlen() */ 395 | fd38: 23 d0 rcall .+70 ; 0xfd80 396 | length = getch(); 397 | fd3a: 22 d0 rcall .+68 ; 0xfd80 398 | fd3c: 18 2f mov r17, r24 399 | getch(); 400 | fd3e: 20 d0 rcall .+64 ; 0xfd80 401 | 402 | verifySpace(); 403 | fd40: 31 d0 rcall .+98 ; 0xfda4 404 | __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 405 | #else 406 | // read a Flash byte and increment the address 407 | __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 408 | #endif 409 | putch(ch); 410 | fd42: f4 01 movw r30, r8 411 | fd44: 85 91 lpm r24, Z+ 412 | fd46: 4f 01 movw r8, r30 413 | fd48: 14 d0 rcall .+40 ; 0xfd72 414 | } while (--length); 415 | fd4a: 11 50 subi r17, 0x01 ; 1 416 | fd4c: d1 f7 brne .-12 ; 0xfd42 417 | fd4e: 0e c0 rjmp .+28 ; 0xfd6c 418 | } 419 | 420 | /* Get device signature bytes */ 421 | else if(ch == STK_READ_SIGN) { 422 | fd50: 85 37 cpi r24, 0x75 ; 117 423 | fd52: 39 f4 brne .+14 ; 0xfd62 424 | // READ SIGN - return what Avrdude wants to hear 425 | verifySpace(); 426 | fd54: 27 d0 rcall .+78 ; 0xfda4 427 | putch(SIGNATURE_0); 428 | fd56: 8e e1 ldi r24, 0x1E ; 30 429 | fd58: 0c d0 rcall .+24 ; 0xfd72 430 | putch(SIGNATURE_1); 431 | fd5a: 86 e9 ldi r24, 0x96 ; 150 432 | fd5c: 0a d0 rcall .+20 ; 0xfd72 433 | putch(SIGNATURE_2); 434 | fd5e: 89 e0 ldi r24, 0x09 ; 9 435 | fd60: 91 cf rjmp .-222 ; 0xfc84 436 | } 437 | else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ 438 | fd62: 81 35 cpi r24, 0x51 ; 81 439 | fd64: 11 f4 brne .+4 ; 0xfd6a 440 | // Adaboot no-wait mod 441 | watchdogConfig(WATCHDOG_16MS); 442 | fd66: 88 e0 ldi r24, 0x08 ; 8 443 | fd68: 17 d0 rcall .+46 ; 0xfd98 444 | verifySpace(); 445 | } 446 | else { 447 | // This covers the response to commands like STK_ENTER_PROGMODE 448 | verifySpace(); 449 | fd6a: 1c d0 rcall .+56 ; 0xfda4 450 | } 451 | putch(STK_OK); 452 | fd6c: 80 e1 ldi r24, 0x10 ; 16 453 | fd6e: 01 d0 rcall .+2 ; 0xfd72 454 | } 455 | fd70: 7a cf rjmp .-268 ; 0xfc66 456 | 457 | 0000fd72 : 458 | } 459 | 460 | void putch(char ch) { 461 | #ifndef SOFT_UART 462 | while (!(UART_SRA & _BV(UDRE0))); 463 | fd72: 90 91 c0 00 lds r25, 0x00C0 464 | fd76: 95 ff sbrs r25, 5 465 | fd78: fc cf rjmp .-8 ; 0xfd72 466 | UART_UDR = ch; 467 | fd7a: 80 93 c6 00 sts 0x00C6, r24 468 | fd7e: 08 95 ret 469 | 470 | 0000fd80 : 471 | [uartBit] "I" (UART_RX_BIT) 472 | : 473 | "r25" 474 | ); 475 | #else 476 | while(!(UART_SRA & _BV(RXC0))) 477 | fd80: 80 91 c0 00 lds r24, 0x00C0 478 | fd84: 87 ff sbrs r24, 7 479 | fd86: fc cf rjmp .-8 ; 0xfd80 480 | ; 481 | if (!(UART_SRA & _BV(FE0))) { 482 | fd88: 80 91 c0 00 lds r24, 0x00C0 483 | fd8c: 84 fd sbrc r24, 4 484 | fd8e: 01 c0 rjmp .+2 ; 0xfd92 485 | } 486 | #endif 487 | 488 | // Watchdog functions. These are only safe with interrupts turned off. 489 | void watchdogReset() { 490 | __asm__ __volatile__ ( 491 | fd90: a8 95 wdr 492 | * don't care that an invalid char is returned...) 493 | */ 494 | watchdogReset(); 495 | } 496 | 497 | ch = UART_UDR; 498 | fd92: 80 91 c6 00 lds r24, 0x00C6 499 | LED_PIN |= _BV(LED); 500 | #endif 501 | #endif 502 | 503 | return ch; 504 | } 505 | fd96: 08 95 ret 506 | 507 | 0000fd98 : 508 | "wdr\n" 509 | ); 510 | } 511 | 512 | void watchdogConfig(uint8_t x) { 513 | WDTCSR = _BV(WDCE) | _BV(WDE); 514 | fd98: e0 e6 ldi r30, 0x60 ; 96 515 | fd9a: f0 e0 ldi r31, 0x00 ; 0 516 | fd9c: 98 e1 ldi r25, 0x18 ; 24 517 | fd9e: 90 83 st Z, r25 518 | WDTCSR = x; 519 | fda0: 80 83 st Z, r24 520 | fda2: 08 95 ret 521 | 522 | 0000fda4 : 523 | do getch(); while (--count); 524 | verifySpace(); 525 | } 526 | 527 | void verifySpace() { 528 | if (getch() != CRC_EOP) { 529 | fda4: ed df rcall .-38 ; 0xfd80 530 | fda6: 80 32 cpi r24, 0x20 ; 32 531 | fda8: 19 f0 breq .+6 ; 0xfdb0 532 | watchdogConfig(WATCHDOG_16MS); // shorten WD timeout 533 | fdaa: 88 e0 ldi r24, 0x08 ; 8 534 | fdac: f5 df rcall .-22 ; 0xfd98 535 | fdae: ff cf rjmp .-2 ; 0xfdae 536 | while (1) // and busy-loop so that WD causes 537 | ; // a reset and app start. 538 | } 539 | putch(STK_INSYNC); 540 | fdb0: 84 e1 ldi r24, 0x14 ; 20 541 | fdb2: df cf rjmp .-66 ; 0xfd72 542 | 543 | 0000fdb4 : 544 | ::[count] "M" (UART_B_VALUE) 545 | ); 546 | } 547 | #endif 548 | 549 | void getNch(uint8_t count) { 550 | fdb4: cf 93 push r28 551 | fdb6: c8 2f mov r28, r24 552 | do getch(); while (--count); 553 | fdb8: e3 df rcall .-58 ; 0xfd80 554 | fdba: c1 50 subi r28, 0x01 ; 1 555 | fdbc: e9 f7 brne .-6 ; 0xfdb8 556 | verifySpace(); 557 | } 558 | fdbe: cf 91 pop r28 559 | } 560 | #endif 561 | 562 | void getNch(uint8_t count) { 563 | do getch(); while (--count); 564 | verifySpace(); 565 | fdc0: f1 cf rjmp .-30 ; 0xfda4 566 | 567 | 0000fdc2 : 568 | 569 | void appStart(uint8_t rstFlags) { 570 | // save the reset flags in the designated register 571 | // This can be saved in a main program by putting code in .init0 (which 572 | // executes before normal c init code) to save R2 to a global variable. 573 | __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); 574 | fdc2: 28 2e mov r2, r24 575 | 576 | watchdogConfig(WATCHDOG_OFF); 577 | fdc4: 80 e0 ldi r24, 0x00 ; 0 578 | fdc6: e8 df rcall .-48 ; 0xfd98 579 | __asm__ __volatile__ ( 580 | fdc8: ee 27 eor r30, r30 581 | fdca: ff 27 eor r31, r31 582 | fdcc: 09 94 ijmp 583 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644_8m.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E088E19EEF31E090938500D2 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644_8m.lst: -------------------------------------------------------------------------------- 1 | 2 | optiboot_atmega644.elf: file format elf32-avr 3 | 4 | Sections: 5 | Idx Name Size VMA LMA File off Algn 6 | 0 .data 00000000 00800100 0000fdce 00000242 2**0 7 | CONTENTS, ALLOC, LOAD, DATA 8 | 1 .text 000001ce 0000fc00 0000fc00 00000074 2**1 9 | CONTENTS, ALLOC, LOAD, READONLY, CODE 10 | 2 .version 00000002 0000fffe 0000fffe 00000242 2**0 11 | CONTENTS, READONLY 12 | 3 .comment 00000011 00000000 00000000 00000244 2**0 13 | CONTENTS, READONLY 14 | 4 .debug_aranges 00000028 00000000 00000000 00000255 2**0 15 | CONTENTS, READONLY, DEBUGGING 16 | 5 .debug_info 0000041f 00000000 00000000 0000027d 2**0 17 | CONTENTS, READONLY, DEBUGGING 18 | 6 .debug_abbrev 000001cb 00000000 00000000 0000069c 2**0 19 | CONTENTS, READONLY, DEBUGGING 20 | 7 .debug_line 00000190 00000000 00000000 00000867 2**0 21 | CONTENTS, READONLY, DEBUGGING 22 | 8 .debug_frame 00000094 00000000 00000000 000009f8 2**2 23 | CONTENTS, READONLY, DEBUGGING 24 | 9 .debug_str 00000121 00000000 00000000 00000a8c 2**0 25 | CONTENTS, READONLY, DEBUGGING 26 | 10 .debug_loc 0000023b 00000000 00000000 00000bad 2**0 27 | CONTENTS, READONLY, DEBUGGING 28 | 11 .debug_ranges 00000048 00000000 00000000 00000de8 2**0 29 | CONTENTS, READONLY, DEBUGGING 30 | 31 | Disassembly of section .text: 32 | 33 | 0000fc00
: 34 | # define UART_SRL UBRR3L 35 | # define UART_UDR UDR3 36 | #endif 37 | 38 | /* main program starts here */ 39 | int main(void) { 40 | fc00: 1f 92 push r1 41 | fc02: cd b7 in r28, 0x3d ; 61 42 | fc04: de b7 in r29, 0x3e ; 62 43 | // SP points to RAMEND 44 | // r1 contains zero 45 | // 46 | // If not, uncomment the following instructions: 47 | // cli(); 48 | asm volatile ("clr __zero_reg__"); 49 | fc06: 11 24 eor r1, r1 50 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 51 | SP=RAMEND; // This is done by hardware reset 52 | #endif 53 | 54 | // Adaboot no-wait mod 55 | ch = MCUSR; 56 | fc08: 84 b7 in r24, 0x34 ; 52 57 | MCUSR = 0; 58 | fc0a: 14 be out 0x34, r1 ; 52 59 | if (!(ch & _BV(EXTRF))) appStart(ch); 60 | fc0c: 81 ff sbrs r24, 1 61 | fc0e: d9 d0 rcall .+434 ; 0xfdc2 62 | 63 | #if LED_START_FLASHES > 0 64 | // Set up Timer 1 for timeout counter 65 | TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 66 | fc10: 85 e0 ldi r24, 0x05 ; 5 67 | fc12: 80 93 81 00 sts 0x0081, r24 68 | UCSRA = _BV(U2X); //Double speed mode USART 69 | UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx 70 | UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 71 | UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 72 | #else 73 | UART_SRA = _BV(U2X0); //Double speed mode USART0 74 | fc16: 82 e0 ldi r24, 0x02 ; 2 75 | fc18: 80 93 c0 00 sts 0x00C0, r24 76 | UART_SRB = _BV(RXEN0) | _BV(TXEN0); 77 | fc1c: 88 e1 ldi r24, 0x18 ; 24 78 | fc1e: 80 93 c1 00 sts 0x00C1, r24 79 | UART_SRC = _BV(UCSZ00) | _BV(UCSZ01); 80 | fc22: 86 e0 ldi r24, 0x06 ; 6 81 | fc24: 80 93 c2 00 sts 0x00C2, r24 82 | UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); 83 | fc28: 80 e1 ldi r24, 0x10 ; 16 84 | fc2a: 80 93 c4 00 sts 0x00C4, r24 85 | #endif 86 | #endif 87 | 88 | // Set up watchdog to trigger after 500ms 89 | watchdogConfig(WATCHDOG_1S); 90 | fc2e: 8e e0 ldi r24, 0x0E ; 14 91 | fc30: b3 d0 rcall .+358 ; 0xfd98 92 | 93 | #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH) 94 | /* Set LED pin as output */ 95 | LED_DDR |= _BV(LED); 96 | fc32: 20 9a sbi 0x04, 0 ; 4 97 | fc34: 26 e0 ldi r18, 0x06 ; 6 98 | } 99 | 100 | #if LED_START_FLASHES > 0 101 | void flash_led(uint8_t count) { 102 | do { 103 | TCNT1 = -(F_CPU/(1024*16)); 104 | fc36: 88 e1 ldi r24, 0x18 ; 24 105 | fc38: 9e ef ldi r25, 0xFE ; 254 106 | TIFR1 = _BV(TOV1); 107 | fc3a: 31 e0 ldi r19, 0x01 ; 1 108 | } 109 | 110 | #if LED_START_FLASHES > 0 111 | void flash_led(uint8_t count) { 112 | do { 113 | TCNT1 = -(F_CPU/(1024*16)); 114 | fc3c: 90 93 85 00 sts 0x0085, r25 115 | fc40: 80 93 84 00 sts 0x0084, r24 116 | TIFR1 = _BV(TOV1); 117 | fc44: 36 bb out 0x16, r19 ; 22 118 | while(!(TIFR1 & _BV(TOV1))); 119 | fc46: b0 9b sbis 0x16, 0 ; 22 120 | fc48: fe cf rjmp .-4 ; 0xfc46 121 | #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__) 122 | LED_PORT ^= _BV(LED); 123 | #else 124 | LED_PIN |= _BV(LED); 125 | fc4a: 18 9a sbi 0x03, 0 ; 3 126 | } 127 | #endif 128 | 129 | // Watchdog functions. These are only safe with interrupts turned off. 130 | void watchdogReset() { 131 | __asm__ __volatile__ ( 132 | fc4c: a8 95 wdr 133 | fc4e: 21 50 subi r18, 0x01 ; 1 134 | LED_PORT ^= _BV(LED); 135 | #else 136 | LED_PIN |= _BV(LED); 137 | #endif 138 | watchdogReset(); 139 | } while (--count); 140 | fc50: a9 f7 brne .-22 ; 0xfc3c 141 | fc52: 81 2c mov r8, r1 142 | fc54: 91 2c mov r9, r1 143 | ch = SPM_PAGESIZE / 2; 144 | do { 145 | uint16_t a; 146 | a = *bufPtr++; 147 | a |= (*bufPtr++) << 8; 148 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 149 | fc56: ee 24 eor r14, r14 150 | fc58: e3 94 inc r14 151 | addrPtr += 2; 152 | } while (--ch); 153 | 154 | // Write from programming buffer 155 | __boot_page_write_short((uint16_t)(void*)address); 156 | fc5a: 95 e0 ldi r25, 0x05 ; 5 157 | fc5c: d9 2e mov r13, r25 158 | boot_spm_busy_wait(); 159 | 160 | #if defined(RWWSRE) 161 | // Reenable read access to flash 162 | boot_rww_enable(); 163 | fc5e: 21 e1 ldi r18, 0x11 ; 17 164 | fc60: c2 2e mov r12, r18 165 | 166 | // If we are in NRWW section, page erase has to be delayed until now. 167 | // Todo: Take RAMPZ into account (not doing so just means that we will 168 | // treat the top of both "pages" of flash as NRWW, for a slight speed 169 | // decrease, so fixing this is not urgent.) 170 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 171 | fc62: 33 e0 ldi r19, 0x03 ; 3 172 | fc64: f3 2e mov r15, r19 173 | #endif 174 | 175 | /* Forever loop */ 176 | for (;;) { 177 | /* get character from UART */ 178 | ch = getch(); 179 | fc66: 8c d0 rcall .+280 ; 0xfd80 180 | 181 | if(ch == STK_GET_PARAMETER) { 182 | fc68: 81 34 cpi r24, 0x41 ; 65 183 | fc6a: 71 f4 brne .+28 ; 0xfc88 184 | unsigned char which = getch(); 185 | fc6c: 89 d0 rcall .+274 ; 0xfd80 186 | verifySpace(); 187 | fc6e: 89 83 std Y+1, r24 ; 0x01 188 | fc70: 99 d0 rcall .+306 ; 0xfda4 189 | if (which == 0x82) { 190 | fc72: 89 81 ldd r24, Y+1 ; 0x01 191 | fc74: 82 38 cpi r24, 0x82 ; 130 192 | fc76: 09 f4 brne .+2 ; 0xfc7a 193 | fc78: 1e c0 rjmp .+60 ; 0xfcb6 194 | /* 195 | * Send optiboot version as "minor SW version" 196 | */ 197 | putch(OPTIBOOT_MINVER); 198 | } else if (which == 0x81) { 199 | fc7a: 81 38 cpi r24, 0x81 ; 129 200 | fc7c: 11 f4 brne .+4 ; 0xfc82 201 | putch(OPTIBOOT_MAJVER); 202 | fc7e: 85 e0 ldi r24, 0x05 ; 5 203 | fc80: 01 c0 rjmp .+2 ; 0xfc84 204 | } else { 205 | /* 206 | * GET PARAMETER returns a generic 0x03 reply for 207 | * other parameters - enough to keep Avrdude happy 208 | */ 209 | putch(0x03); 210 | fc82: 83 e0 ldi r24, 0x03 ; 3 211 | fc84: 76 d0 rcall .+236 ; 0xfd72 212 | fc86: 72 c0 rjmp .+228 ; 0xfd6c 213 | } 214 | } 215 | else if(ch == STK_SET_DEVICE) { 216 | fc88: 82 34 cpi r24, 0x42 ; 66 217 | fc8a: 11 f4 brne .+4 ; 0xfc90 218 | // SET DEVICE is ignored 219 | getNch(20); 220 | fc8c: 84 e1 ldi r24, 0x14 ; 20 221 | fc8e: 03 c0 rjmp .+6 ; 0xfc96 222 | } 223 | else if(ch == STK_SET_DEVICE_EXT) { 224 | fc90: 85 34 cpi r24, 0x45 ; 69 225 | fc92: 19 f4 brne .+6 ; 0xfc9a 226 | // SET DEVICE EXT is ignored 227 | getNch(5); 228 | fc94: 85 e0 ldi r24, 0x05 ; 5 229 | fc96: 8e d0 rcall .+284 ; 0xfdb4 230 | fc98: 69 c0 rjmp .+210 ; 0xfd6c 231 | } 232 | else if(ch == STK_LOAD_ADDRESS) { 233 | fc9a: 85 35 cpi r24, 0x55 ; 85 234 | fc9c: 41 f4 brne .+16 ; 0xfcae 235 | // LOAD ADDRESS 236 | uint16_t newAddress; 237 | newAddress = getch(); 238 | fc9e: 70 d0 rcall .+224 ; 0xfd80 239 | fca0: 88 2e mov r8, r24 240 | newAddress = (newAddress & 0xff) | (getch() << 8); 241 | fca2: 6e d0 rcall .+220 ; 0xfd80 242 | fca4: 91 2c mov r9, r1 243 | fca6: 98 2a or r9, r24 244 | #ifdef RAMPZ 245 | // Transfer top bit to RAMPZ 246 | RAMPZ = (newAddress & 0x8000) ? 1 : 0; 247 | #endif 248 | newAddress += newAddress; // Convert from word address to byte address 249 | fca8: 88 0c add r8, r8 250 | fcaa: 99 1c adc r9, r9 251 | fcac: 5e c0 rjmp .+188 ; 0xfd6a 252 | address = newAddress; 253 | verifySpace(); 254 | } 255 | else if(ch == STK_UNIVERSAL) { 256 | fcae: 86 35 cpi r24, 0x56 ; 86 257 | fcb0: 21 f4 brne .+8 ; 0xfcba 258 | // UNIVERSAL command is ignored 259 | getNch(4); 260 | fcb2: 84 e0 ldi r24, 0x04 ; 4 261 | fcb4: 7f d0 rcall .+254 ; 0xfdb4 262 | putch(0x00); 263 | fcb6: 80 e0 ldi r24, 0x00 ; 0 264 | fcb8: e5 cf rjmp .-54 ; 0xfc84 265 | } 266 | /* Write memory, length is big endian and is in bytes */ 267 | else if(ch == STK_PROG_PAGE) { 268 | fcba: 84 36 cpi r24, 0x64 ; 100 269 | fcbc: 09 f0 breq .+2 ; 0xfcc0 270 | fcbe: 3a c0 rjmp .+116 ; 0xfd34 271 | // PROGRAM PAGE - we support flash programming only, not EEPROM 272 | uint8_t *bufPtr; 273 | uint16_t addrPtr; 274 | 275 | getch(); /* getlen() */ 276 | fcc0: 5f d0 rcall .+190 ; 0xfd80 277 | length = getch(); 278 | fcc2: 5e d0 rcall .+188 ; 0xfd80 279 | fcc4: b8 2e mov r11, r24 280 | getch(); 281 | fcc6: 5c d0 rcall .+184 ; 0xfd80 282 | 283 | // If we are in RWW section, immediately start page erase 284 | if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 285 | fcc8: 81 14 cp r8, r1 286 | fcca: 80 ee ldi r24, 0xE0 ; 224 287 | fccc: 98 06 cpc r9, r24 288 | fcce: 18 f4 brcc .+6 ; 0xfcd6 289 | fcd0: f4 01 movw r30, r8 290 | fcd2: f7 be out 0x37, r15 ; 55 291 | fcd4: e8 95 spm 292 | fcd6: 00 e0 ldi r16, 0x00 ; 0 293 | fcd8: 11 e0 ldi r17, 0x01 ; 1 294 | 295 | // While that is going on, read in page contents 296 | bufPtr = buff; 297 | do *bufPtr++ = getch(); 298 | fcda: 52 d0 rcall .+164 ; 0xfd80 299 | fcdc: f8 01 movw r30, r16 300 | fcde: 81 93 st Z+, r24 301 | fce0: 8f 01 movw r16, r30 302 | while (--length); 303 | fce2: be 12 cpse r11, r30 304 | fce4: fa cf rjmp .-12 ; 0xfcda 305 | 306 | // If we are in NRWW section, page erase has to be delayed until now. 307 | // Todo: Take RAMPZ into account (not doing so just means that we will 308 | // treat the top of both "pages" of flash as NRWW, for a slight speed 309 | // decrease, so fixing this is not urgent.) 310 | if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); 311 | fce6: 81 14 cp r8, r1 312 | fce8: f0 ee ldi r31, 0xE0 ; 224 313 | fcea: 9f 06 cpc r9, r31 314 | fcec: 18 f0 brcs .+6 ; 0xfcf4 315 | fcee: f4 01 movw r30, r8 316 | fcf0: f7 be out 0x37, r15 ; 55 317 | fcf2: e8 95 spm 318 | 319 | // Read command terminator, start reply 320 | verifySpace(); 321 | fcf4: 57 d0 rcall .+174 ; 0xfda4 322 | 323 | // If only a partial page is to be programmed, the erase might not be complete. 324 | // So check that here 325 | boot_spm_busy_wait(); 326 | fcf6: 07 b6 in r0, 0x37 ; 55 327 | fcf8: 00 fc sbrc r0, 0 328 | fcfa: fd cf rjmp .-6 ; 0xfcf6 329 | fcfc: f4 01 movw r30, r8 330 | fcfe: a0 e0 ldi r26, 0x00 ; 0 331 | fd00: b1 e0 ldi r27, 0x01 ; 1 332 | bufPtr = buff; 333 | addrPtr = (uint16_t)(void*)address; 334 | ch = SPM_PAGESIZE / 2; 335 | do { 336 | uint16_t a; 337 | a = *bufPtr++; 338 | fd02: 8c 91 ld r24, X 339 | a |= (*bufPtr++) << 8; 340 | fd04: 11 96 adiw r26, 0x01 ; 1 341 | fd06: 2c 91 ld r18, X 342 | fd08: 11 97 sbiw r26, 0x01 ; 1 343 | fd0a: 90 e0 ldi r25, 0x00 ; 0 344 | fd0c: 92 2b or r25, r18 345 | # define UART_SRL UBRR3L 346 | # define UART_UDR UDR3 347 | #endif 348 | 349 | /* main program starts here */ 350 | int main(void) { 351 | fd0e: 12 96 adiw r26, 0x02 ; 2 352 | ch = SPM_PAGESIZE / 2; 353 | do { 354 | uint16_t a; 355 | a = *bufPtr++; 356 | a |= (*bufPtr++) << 8; 357 | __boot_page_fill_short((uint16_t)(void*)addrPtr,a); 358 | fd10: 0c 01 movw r0, r24 359 | fd12: e7 be out 0x37, r14 ; 55 360 | fd14: e8 95 spm 361 | fd16: 11 24 eor r1, r1 362 | addrPtr += 2; 363 | fd18: 32 96 adiw r30, 0x02 ; 2 364 | } while (--ch); 365 | fd1a: a1 15 cp r26, r1 366 | fd1c: 82 e0 ldi r24, 0x02 ; 2 367 | fd1e: b8 07 cpc r27, r24 368 | fd20: 81 f7 brne .-32 ; 0xfd02 369 | 370 | // Write from programming buffer 371 | __boot_page_write_short((uint16_t)(void*)address); 372 | fd22: f4 01 movw r30, r8 373 | fd24: d7 be out 0x37, r13 ; 55 374 | fd26: e8 95 spm 375 | boot_spm_busy_wait(); 376 | fd28: 07 b6 in r0, 0x37 ; 55 377 | fd2a: 00 fc sbrc r0, 0 378 | fd2c: fd cf rjmp .-6 ; 0xfd28 379 | 380 | #if defined(RWWSRE) 381 | // Reenable read access to flash 382 | boot_rww_enable(); 383 | fd2e: c7 be out 0x37, r12 ; 55 384 | fd30: e8 95 spm 385 | fd32: 1c c0 rjmp .+56 ; 0xfd6c 386 | #endif 387 | 388 | } 389 | /* Read memory block mode, length is big endian. */ 390 | else if(ch == STK_READ_PAGE) { 391 | fd34: 84 37 cpi r24, 0x74 ; 116 392 | fd36: 61 f4 brne .+24 ; 0xfd50 393 | // READ PAGE - we only read flash 394 | getch(); /* getlen() */ 395 | fd38: 23 d0 rcall .+70 ; 0xfd80 396 | length = getch(); 397 | fd3a: 22 d0 rcall .+68 ; 0xfd80 398 | fd3c: 18 2f mov r17, r24 399 | getch(); 400 | fd3e: 20 d0 rcall .+64 ; 0xfd80 401 | 402 | verifySpace(); 403 | fd40: 31 d0 rcall .+98 ; 0xfda4 404 | __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 405 | #else 406 | // read a Flash byte and increment the address 407 | __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address)); 408 | #endif 409 | putch(ch); 410 | fd42: f4 01 movw r30, r8 411 | fd44: 85 91 lpm r24, Z+ 412 | fd46: 4f 01 movw r8, r30 413 | fd48: 14 d0 rcall .+40 ; 0xfd72 414 | } while (--length); 415 | fd4a: 11 50 subi r17, 0x01 ; 1 416 | fd4c: d1 f7 brne .-12 ; 0xfd42 417 | fd4e: 0e c0 rjmp .+28 ; 0xfd6c 418 | } 419 | 420 | /* Get device signature bytes */ 421 | else if(ch == STK_READ_SIGN) { 422 | fd50: 85 37 cpi r24, 0x75 ; 117 423 | fd52: 39 f4 brne .+14 ; 0xfd62 424 | // READ SIGN - return what Avrdude wants to hear 425 | verifySpace(); 426 | fd54: 27 d0 rcall .+78 ; 0xfda4 427 | putch(SIGNATURE_0); 428 | fd56: 8e e1 ldi r24, 0x1E ; 30 429 | fd58: 0c d0 rcall .+24 ; 0xfd72 430 | putch(SIGNATURE_1); 431 | fd5a: 86 e9 ldi r24, 0x96 ; 150 432 | fd5c: 0a d0 rcall .+20 ; 0xfd72 433 | putch(SIGNATURE_2); 434 | fd5e: 89 e0 ldi r24, 0x09 ; 9 435 | fd60: 91 cf rjmp .-222 ; 0xfc84 436 | } 437 | else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */ 438 | fd62: 81 35 cpi r24, 0x51 ; 81 439 | fd64: 11 f4 brne .+4 ; 0xfd6a 440 | // Adaboot no-wait mod 441 | watchdogConfig(WATCHDOG_16MS); 442 | fd66: 88 e0 ldi r24, 0x08 ; 8 443 | fd68: 17 d0 rcall .+46 ; 0xfd98 444 | verifySpace(); 445 | } 446 | else { 447 | // This covers the response to commands like STK_ENTER_PROGMODE 448 | verifySpace(); 449 | fd6a: 1c d0 rcall .+56 ; 0xfda4 450 | } 451 | putch(STK_OK); 452 | fd6c: 80 e1 ldi r24, 0x10 ; 16 453 | fd6e: 01 d0 rcall .+2 ; 0xfd72 454 | } 455 | fd70: 7a cf rjmp .-268 ; 0xfc66 456 | 457 | 0000fd72 : 458 | } 459 | 460 | void putch(char ch) { 461 | #ifndef SOFT_UART 462 | while (!(UART_SRA & _BV(UDRE0))); 463 | fd72: 90 91 c0 00 lds r25, 0x00C0 464 | fd76: 95 ff sbrs r25, 5 465 | fd78: fc cf rjmp .-8 ; 0xfd72 466 | UART_UDR = ch; 467 | fd7a: 80 93 c6 00 sts 0x00C6, r24 468 | fd7e: 08 95 ret 469 | 470 | 0000fd80 : 471 | [uartBit] "I" (UART_RX_BIT) 472 | : 473 | "r25" 474 | ); 475 | #else 476 | while(!(UART_SRA & _BV(RXC0))) 477 | fd80: 80 91 c0 00 lds r24, 0x00C0 478 | fd84: 87 ff sbrs r24, 7 479 | fd86: fc cf rjmp .-8 ; 0xfd80 480 | ; 481 | if (!(UART_SRA & _BV(FE0))) { 482 | fd88: 80 91 c0 00 lds r24, 0x00C0 483 | fd8c: 84 fd sbrc r24, 4 484 | fd8e: 01 c0 rjmp .+2 ; 0xfd92 485 | } 486 | #endif 487 | 488 | // Watchdog functions. These are only safe with interrupts turned off. 489 | void watchdogReset() { 490 | __asm__ __volatile__ ( 491 | fd90: a8 95 wdr 492 | * don't care that an invalid char is returned...) 493 | */ 494 | watchdogReset(); 495 | } 496 | 497 | ch = UART_UDR; 498 | fd92: 80 91 c6 00 lds r24, 0x00C6 499 | LED_PIN |= _BV(LED); 500 | #endif 501 | #endif 502 | 503 | return ch; 504 | } 505 | fd96: 08 95 ret 506 | 507 | 0000fd98 : 508 | "wdr\n" 509 | ); 510 | } 511 | 512 | void watchdogConfig(uint8_t x) { 513 | WDTCSR = _BV(WDCE) | _BV(WDE); 514 | fd98: e0 e6 ldi r30, 0x60 ; 96 515 | fd9a: f0 e0 ldi r31, 0x00 ; 0 516 | fd9c: 98 e1 ldi r25, 0x18 ; 24 517 | fd9e: 90 83 st Z, r25 518 | WDTCSR = x; 519 | fda0: 80 83 st Z, r24 520 | fda2: 08 95 ret 521 | 522 | 0000fda4 : 523 | do getch(); while (--count); 524 | verifySpace(); 525 | } 526 | 527 | void verifySpace() { 528 | if (getch() != CRC_EOP) { 529 | fda4: ed df rcall .-38 ; 0xfd80 530 | fda6: 80 32 cpi r24, 0x20 ; 32 531 | fda8: 19 f0 breq .+6 ; 0xfdb0 532 | watchdogConfig(WATCHDOG_16MS); // shorten WD timeout 533 | fdaa: 88 e0 ldi r24, 0x08 ; 8 534 | fdac: f5 df rcall .-22 ; 0xfd98 535 | fdae: ff cf rjmp .-2 ; 0xfdae 536 | while (1) // and busy-loop so that WD causes 537 | ; // a reset and app start. 538 | } 539 | putch(STK_INSYNC); 540 | fdb0: 84 e1 ldi r24, 0x14 ; 20 541 | fdb2: df cf rjmp .-66 ; 0xfd72 542 | 543 | 0000fdb4 : 544 | ::[count] "M" (UART_B_VALUE) 545 | ); 546 | } 547 | #endif 548 | 549 | void getNch(uint8_t count) { 550 | fdb4: cf 93 push r28 551 | fdb6: c8 2f mov r28, r24 552 | do getch(); while (--count); 553 | fdb8: e3 df rcall .-58 ; 0xfd80 554 | fdba: c1 50 subi r28, 0x01 ; 1 555 | fdbc: e9 f7 brne .-6 ; 0xfdb8 556 | verifySpace(); 557 | } 558 | fdbe: cf 91 pop r28 559 | } 560 | #endif 561 | 562 | void getNch(uint8_t count) { 563 | do getch(); while (--count); 564 | verifySpace(); 565 | fdc0: f1 cf rjmp .-30 ; 0xfda4 566 | 567 | 0000fdc2 : 568 | 569 | void appStart(uint8_t rstFlags) { 570 | // save the reset flags in the designated register 571 | // This can be saved in a main program by putting code in .init0 (which 572 | // executes before normal c init code) to save R2 to a global variable. 573 | __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags)); 574 | fdc2: 28 2e mov r2, r24 575 | 576 | watchdogConfig(WATCHDOG_OFF); 577 | fdc4: 80 e0 ldi r24, 0x00 ; 0 578 | fdc6: e8 df rcall .-48 ; 0xfd98 579 | __asm__ __volatile__ ( 580 | fdc8: ee 27 eor r30, r30 581 | fdca: ff 27 eor r31, r31 582 | fdcc: 09 94 ijmp 583 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644p.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E080E39CEF31E090938500DA 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD08AE0C5 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_atmega644p_8m.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0209A26E088E19EEF31E090938500D2 5 | :10FC40008093840036BBB09BFECF189AA8952150B4 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD08AE0C5 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_balanduino.hex: -------------------------------------------------------------------------------- 1 | :020000021000EC 2 | :10FC00001F92CDB7DEB7112484B714BE81FFDED0BA 3 | :10FC100085E08093810082E08093C00088E180933A 4 | :10FC2000C10086E08093C2008AE08093C4008EE029 5 | :10FC3000B8D0249A26E08EE99DEF31E090938500BC 6 | :10FC40008093840036BBB09BFECF1C9AA8952150B0 7 | :10FC5000A9F7A12CB12CEE24E39491E1D92E23E055 8 | :10FC6000F22E93D0813469F490D08983A0D0898119 9 | :10FC7000823809F424C0813809F476C083E07ED04C 10 | :10FC80007AC0823411F484E103C0853419F485E02C 11 | :10FC900096D071C0853579F478D0182F76D0212F81 12 | :10FCA00030E0382B832F881F8827881F8BBF59018E 13 | :10FCB000AA0CBB1C5FC0863521F484E080D080E0B4 14 | :10FCC000DECF843609F03BC060D05FD0C82E5DD057 15 | :10FCD000A11480EEB80618F4F501F7BEE89500E02F 16 | :10FCE00011E053D0F80181938F01CE12FACFA11405 17 | :10FCF000F0EEBF0618F0F501F7BEE89558D007B64C 18 | :10FD000000FCFDCFF501A0E0B1E08C9111962C91A3 19 | :10FD1000119790E0922B12960C01E7BEE895112402 20 | :10FD20003296A11582E0B80781F785E0F50187BF1B 21 | :10FD3000E89507B600FCFDCFD7BEE8951CC0843718 22 | :10FD400061F423D022D0182F20D031D0F501879133 23 | :10FD50005F0114D01150D1F70EC0853739F427D088 24 | :10FD60008EE10CD087E90AD085E089CF813511F486 25 | :10FD700088E017D01CD080E101D073CF9091C000F3 26 | :10FD800095FFFCCF8093C60008958091C00087FF47 27 | :10FD9000FCCF8091C00084FD01C0A8958091C60071 28 | :10FDA0000895E0E6F0E098E1908380830895EDDF28 29 | :10FDB000803219F088E0F5DFFFCF84E1DFCFCF9309 30 | :10FDC000C82FE3DFC150E9F7CF91F1CF282E80E0B3 31 | :08FDD000E8DFEE27FF2709948C 32 | :02FFFE000005FC 33 | :040000031000FC00ED 34 | :00000001FF 35 | -------------------------------------------------------------------------------- /bootloaders/optiboot/optiboot_balanduino644.hex: -------------------------------------------------------------------------------- 1 | :10FC00001F92CDB7DEB7112484B714BE81FFD9D0BF 2 | :10FC100085E08093810082E08093C00088E180933A 3 | :10FC2000C10086E08093C20080E18093C4008EE032 4 | :10FC3000B3D0249A26E088E19EEF31E090938500CE 5 | :10FC40008093840036BBB09BFECF1C9AA8952150B0 6 | :10FC5000A9F7812C912CEE24E39495E0D92E21E193 7 | :10FC6000C22E33E0F32E8CD0813471F489D0898395 8 | :10FC700099D08981823809F41EC0813811F485E059 9 | :10FC800001C083E076D072C0823411F484E103C0F5 10 | :10FC9000853419F485E08ED069C0853541F470D083 11 | :10FCA000882E6ED0912C982A880C991C5EC08635BF 12 | :10FCB00021F484E07FD080E0E5CF843609F03AC0BB 13 | :10FCC0005FD05ED0B82E5CD0811480EE980618F418 14 | :10FCD000F401F7BEE89500E011E052D0F8018193FD 15 | :10FCE0008F01BE12FACF8114F0EE9F0618F0F401D6 16 | :10FCF000F7BEE89557D007B600FCFDCFF401A0E0B1 17 | :10FD0000B1E08C9111962C91119790E0922B129664 18 | :10FD10000C01E7BEE89511243296A11582E0B807E0 19 | :10FD200081F7F401D7BEE89507B600FCFDCFC7BE4A 20 | :10FD3000E8951CC0843761F423D022D0182F20D03E 21 | :10FD400031D0F40185914F0114D01150D1F70EC07C 22 | :10FD5000853739F427D08EE10CD086E90AD089E0C6 23 | :10FD600091CF813511F488E017D01CD080E101D00B 24 | :10FD70007ACF9091C00095FFFCCF8093C600089584 25 | :10FD80008091C00087FFFCCF8091C00084FD01C03E 26 | :10FD9000A8958091C6000895E0E6F0E098E1908390 27 | :10FDA00080830895EDDF803219F088E0F5DFFFCF22 28 | :10FDB00084E1DFCFCF93C82FE3DFC150E9F7CF91C4 29 | :0EFDC000F1CF282E80E0E8DFEE27FF27099420 30 | :02FFFE000005FC 31 | :040000030000FC00FD 32 | :00000001FF 33 | -------------------------------------------------------------------------------- /bootloaders/optiboot/pin_defs.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------ */ 2 | #if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) 3 | /*------------------------------------------------------------------------ */ 4 | 5 | /* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove 6 | */ 7 | #if !defined(LED) 8 | #define LED B5 9 | #endif 10 | 11 | /* Ports for soft UART */ 12 | #ifdef SOFT_UART 13 | #define UART_PORT PORTD 14 | #define UART_PIN PIND 15 | #define UART_DDR DDRD 16 | #define UART_TX_BIT 1 17 | #define UART_RX_BIT 0 18 | #endif 19 | #endif 20 | 21 | #if defined(__AVR_ATmega8__) || defined(__AVR_ATmega32__) 22 | //Name conversion R.Wiersma 23 | #define UCSR0A UCSRA 24 | #define UDR0 UDR 25 | #define UDRE0 UDRE 26 | #define RXC0 RXC 27 | #define FE0 FE 28 | #define TIFR1 TIFR 29 | #define WDTCSR WDTCR 30 | #endif 31 | #if defined(__AVR_ATmega32__) 32 | #define WDCE WDTOE 33 | #endif 34 | 35 | /* Luminet support */ 36 | /*------------------------------------------------------------------------ */ 37 | #if defined(__AVR_ATtiny84__) 38 | /*------------------------------------------------------------------------ */ 39 | /* Red LED is connected to pin PA4 */ 40 | #if !defined(LED) 41 | #define LED A4 42 | #endif 43 | 44 | /* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */ 45 | #ifdef SOFT_UART 46 | #define UART_PORT PORTA 47 | #define UART_PIN PINA 48 | #define UART_DDR DDRA 49 | #define UART_TX_BIT 2 50 | #define UART_RX_BIT 3 51 | #endif 52 | #endif 53 | 54 | /*------------------------------------------------------------------------ */ 55 | /* Sanguino support (and other 40pin DIP cpus) */ 56 | #if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega32__) 57 | /*------------------------------------------------------------------------ */ 58 | /* Onboard LED is connected to pin PB0 on Sanguino */ 59 | #if !defined(LED) 60 | #define LED B0 61 | #endif 62 | 63 | /* Ports for soft UART */ 64 | #ifdef SOFT_UART 65 | #define UART_PORT PORTD 66 | #define UART_PIN PIND 67 | #define UART_DDR DDRD 68 | #define UART_TX_BIT 1 69 | #define UART_RX_BIT 0 70 | #endif 71 | #endif 72 | 73 | /*------------------------------------------------------------------------ */ 74 | /* Mega support */ 75 | #if defined(__AVR_ATmega1280__) 76 | /*------------------------------------------------------------------------ */ 77 | /* Onboard LED is connected to pin PB7 on Arduino Mega */ 78 | #if !defined(LED) 79 | #define LED B7 80 | #endif 81 | 82 | /* Ports for soft UART */ 83 | #ifdef SOFT_UART 84 | #define UART_PORT PORTE 85 | #define UART_PIN PINE 86 | #define UART_DDR DDRE 87 | #define UART_TX_BIT 1 88 | #define UART_RX_BIT 0 89 | #endif 90 | #endif 91 | 92 | /* 93 | * ------------------------------------------------------------------------ 94 | * A bunch of macros to enable the LED to be specifed as "B5" for bit 5 95 | * of port B, and similar. 96 | */ 97 | 98 | #define A0 0x100 99 | #define A1 0x101 100 | #define A2 0x102 101 | #define A3 0x103 102 | #define A4 0x104 103 | #define A5 0x105 104 | #define A6 0x106 105 | #define A7 0x107 106 | 107 | #define B0 0x200 108 | #define B1 0x201 109 | #define B2 0x202 110 | #define B3 0x203 111 | #define B4 0x204 112 | #define B5 0x205 113 | #define B6 0x206 114 | #define B7 0x207 115 | 116 | #define C0 0x300 117 | #define C1 0x301 118 | #define C2 0x302 119 | #define C3 0x303 120 | #define C4 0x304 121 | #define C5 0x305 122 | #define C6 0x306 123 | #define C7 0x307 124 | 125 | #define D0 0x400 126 | #define D1 0x401 127 | #define D2 0x402 128 | #define D3 0x403 129 | #define D4 0x404 130 | #define D5 0x405 131 | #define D6 0x406 132 | #define D7 0x407 133 | 134 | #define E0 0x500 135 | #define E1 0x501 136 | #define E2 0x502 137 | #define E3 0x503 138 | #define E4 0x504 139 | #define E5 0x505 140 | #define E6 0x506 141 | #define E7 0x507 142 | 143 | #define F0 0x600 144 | #define F1 0x601 145 | #define F2 0x602 146 | #define F3 0x603 147 | #define F4 0x604 148 | #define F5 0x605 149 | #define F6 0x606 150 | #define F7 0x607 151 | 152 | #define G0 0x700 153 | #define G1 0x701 154 | #define G2 0x702 155 | #define G3 0x703 156 | #define G4 0x704 157 | #define G5 0x705 158 | #define G6 0x706 159 | #define G7 0x707 160 | 161 | #define H0 0x800 162 | #define H1 0x801 163 | #define H2 0x802 164 | #define H3 0x803 165 | #define H4 0x804 166 | #define H5 0x805 167 | #define H6 0x806 168 | #define H7 0x807 169 | 170 | #define J0 0xA00 171 | #define J1 0xA01 172 | #define J2 0xA02 173 | #define J3 0xA03 174 | #define J4 0xA04 175 | #define J5 0xA05 176 | #define J6 0xA06 177 | #define J7 0xA07 178 | 179 | #define K0 0xB00 180 | #define K1 0xB01 181 | #define K2 0xB02 182 | #define K3 0xB03 183 | #define K4 0xB04 184 | #define K5 0xB05 185 | #define K6 0xB06 186 | #define K7 0xB07 187 | 188 | #define L0 0xC00 189 | #define L1 0xC01 190 | #define L2 0xC02 191 | #define L3 0xC03 192 | #define L4 0xC04 193 | #define L5 0xC05 194 | #define L6 0xC06 195 | #define L7 0xC07 196 | 197 | 198 | 199 | #if LED == B0 200 | #undef LED 201 | #define LED_DDR DDRB 202 | #define LED_PORT PORTB 203 | #define LED_PIN PINB 204 | #define LED PINB0 205 | #elif LED == B1 206 | #undef LED 207 | #define LED_DDR DDRB 208 | #define LED_PORT PORTB 209 | #define LED_PIN PINB 210 | #define LED PINB1 211 | #elif LED == B2 212 | #undef LED 213 | #define LED_DDR DDRB 214 | #define LED_PORT PORTB 215 | #define LED_PIN PINB 216 | #define LED PINB2 217 | #elif LED == B3 218 | #undef LED 219 | #define LED_DDR DDRB 220 | #define LED_PORT PORTB 221 | #define LED_PIN PINB 222 | #define LED PINB3 223 | #elif LED == B4 224 | #undef LED 225 | #define LED_DDR DDRB 226 | #define LED_PORT PORTB 227 | #define LED_PIN PINB 228 | #define LED PINB4 229 | #elif LED == B5 230 | #undef LED 231 | #define LED_DDR DDRB 232 | #define LED_PORT PORTB 233 | #define LED_PIN PINB 234 | #define LED PINB5 235 | #elif LED == B6 236 | #undef LED 237 | #define LED_DDR DDRB 238 | #define LED_PORT PORTB 239 | #define LED_PIN PINB 240 | #define LED PINB6 241 | #elif LED == B7 242 | #undef LED 243 | #define LED_DDR DDRB 244 | #define LED_PORT PORTB 245 | #define LED_PIN PINB 246 | #define LED PINB7 247 | 248 | #elif LED == C0 249 | #undef LED 250 | #define LED_DDR DDRC 251 | #define LED_PORT PORTC 252 | #define LED_PIN PINC 253 | #define LED PINC0 254 | #elif LED == C1 255 | #undef LED 256 | #define LED_DDR DDRC 257 | #define LED_PORT PORTC 258 | #define LED_PIN PINC 259 | #define LED PINC1 260 | #elif LED == C2 261 | #undef LED 262 | #define LED_DDR DDRC 263 | #define LED_PORT PORTC 264 | #define LED_PIN PINC 265 | #define LED PINC2 266 | #elif LED == C3 267 | #undef LED 268 | #define LED_DDR DDRC 269 | #define LED_PORT PORTC 270 | #define LED_PIN PINC 271 | #define LED PINC3 272 | #elif LED == C4 273 | #undef LED 274 | #define LED_DDR DDRC 275 | #define LED_PORT PORTC 276 | #define LED_PIN PINC 277 | #define LED PINC4 278 | #elif LED == C5 279 | #undef LED 280 | #define LED_DDR DDRC 281 | #define LED_PORT PORTC 282 | #define LED_PIN PINC 283 | #define LED PINC5 284 | #elif LED == C6 285 | #undef LED 286 | #define LED_DDR DDRC 287 | #define LED_PORT PORTC 288 | #define LED_PIN PINC 289 | #define LED PINC6 290 | #elif LED == C7 291 | #undef LED 292 | #define LED_DDR DDRC 293 | #define LED_PORT PORTC 294 | #define LED_PIN PINC 295 | #define LED PINC7 296 | 297 | #elif LED == D0 298 | #undef LED 299 | #define LED_DDR DDRD 300 | #define LED_PORT PORTD 301 | #define LED_PIN PIND 302 | #define LED PIND0 303 | #elif LED == D1 304 | #undef LED 305 | #define LED_DDR DDRD 306 | #define LED_PORT PORTD 307 | #define LED_PIN PIND 308 | #define LED PIND1 309 | #elif LED == D2 310 | #undef LED 311 | #define LED_DDR DDRD 312 | #define LED_PORT PORTD 313 | #define LED_PIN PIND 314 | #define LED PIND2 315 | #elif LED == D3 316 | #undef LED 317 | #define LED_DDR DDRD 318 | #define LED_PORT PORTD 319 | #define LED_PIN PIND 320 | #define LED PIND3 321 | #elif LED == D4 322 | #undef LED 323 | #define LED_DDR DDRD 324 | #define LED_PORT PORTD 325 | #define LED_PIN PIND 326 | #define LED PIND4 327 | #elif LED == D5 328 | #undef LED 329 | #define LED_DDR DDRD 330 | #define LED_PORT PORTD 331 | #define LED_PIN PIND 332 | #define LED PIND5 333 | #elif LED == D6 334 | #undef LED 335 | #define LED_DDR DDRD 336 | #define LED_PORT PORTD 337 | #define LED_PIN PIND 338 | #define LED PIND6 339 | #elif LED == D7 340 | #undef LED 341 | #define LED_DDR DDRD 342 | #define LED_PORT PORTD 343 | #define LED_PIN PIND 344 | #define LED PIND7 345 | 346 | #elif LED == E0 347 | #undef LED 348 | #define LED_DDR DDRE 349 | #define LED_PORT PORTE 350 | #define LED_PIN PINE 351 | #define LED PINE0 352 | #elif LED == E1 353 | #undef LED 354 | #define LED_DDR DDRE 355 | #define LED_PORT PORTE 356 | #define LED_PIN PINE 357 | #define LED PINE1 358 | #elif LED == E2 359 | #undef LED 360 | #define LED_DDR DDRE 361 | #define LED_PORT PORTE 362 | #define LED_PIN PINE 363 | #define LED PINE2 364 | #elif LED == E3 365 | #undef LED 366 | #define LED_DDR DDRE 367 | #define LED_PORT PORTE 368 | #define LED_PIN PINE 369 | #define LED PINE3 370 | #elif LED == E4 371 | #undef LED 372 | #define LED_DDR DDRE 373 | #define LED_PORT PORTE 374 | #define LED_PIN PINE 375 | #define LED PINE4 376 | #elif LED == E5 377 | #undef LED 378 | #define LED_DDR DDRE 379 | #define LED_PORT PORTE 380 | #define LED_PIN PINE 381 | #define LED PINE5 382 | #elif LED == E6 383 | #undef LED 384 | #define LED_DDR DDRE 385 | #define LED_PORT PORTE 386 | #define LED_PIN PINE 387 | #define LED PINE6 388 | #elif LED == E7 389 | #undef LED 390 | #define LED_DDR DDRE 391 | #define LED_PORT PORTE 392 | #define LED_PIN PINE 393 | #define LED PINE7 394 | 395 | #elif LED == F0 396 | #undef LED 397 | #define LED_DDR DDRF 398 | #define LED_PORT PORTF 399 | #define LED_PIN PINF 400 | #define LED PINF0 401 | #elif LED == F1 402 | #undef LED 403 | #define LED_DDR DDRF 404 | #define LED_PORT PORTF 405 | #define LED_PIN PINF 406 | #define LED PINF1 407 | #elif LED == F2 408 | #undef LED 409 | #define LED_DDR DDRF 410 | #define LED_PORT PORTF 411 | #define LED_PIN PINF 412 | #define LED PINF2 413 | #elif LED == F3 414 | #undef LED 415 | #define LED_DDR DDRF 416 | #define LED_PORT PORTF 417 | #define LED_PIN PINF 418 | #define LED PINF3 419 | #elif LED == F4 420 | #undef LED 421 | #define LED_DDR DDRF 422 | #define LED_PORT PORTF 423 | #define LED_PIN PINF 424 | #define LED PINF4 425 | #elif LED == F5 426 | #undef LED 427 | #define LED_DDR DDRF 428 | #define LED_PORT PORTF 429 | #define LED_PIN PINF 430 | #define LED PINF5 431 | #elif LED == F6 432 | #undef LED 433 | #define LED_DDR DDRF 434 | #define LED_PORT PORTF 435 | #define LED_PIN PINF 436 | #define LED PINF6 437 | #elif LED == F7 438 | #undef LED 439 | #define LED_DDR DDRF 440 | #define LED_PORT PORTF 441 | #define LED_PIN PINF 442 | #define LED PINF7 443 | 444 | #elif LED == G0 445 | #undef LED 446 | #define LED_DDR DDRG 447 | #define LED_PORT PORTG 448 | #define LED_PIN PING 449 | #define LED PING0 450 | #elif LED == G1 451 | #undef LED 452 | #define LED_DDR DDRG 453 | #define LED_PORT PORTG 454 | #define LED_PIN PING 455 | #define LED PING1 456 | #elif LED == G2 457 | #undef LED 458 | #define LED_DDR DDRG 459 | #define LED_PORT PORTG 460 | #define LED_PIN PING 461 | #define LED PING2 462 | #elif LED == G3 463 | #undef LED 464 | #define LED_DDR DDRG 465 | #define LED_PORT PORTG 466 | #define LED_PIN PING 467 | #define LED PING3 468 | #elif LED == G4 469 | #undef LED 470 | #define LED_DDR DDRG 471 | #define LED_PORT PORTG 472 | #define LED_PIN PING 473 | #define LED PING4 474 | #elif LED == G5 475 | #undef LED 476 | #define LED_DDR DDRG 477 | #define LED_PORT PORTG 478 | #define LED_PIN PING 479 | #define LED PING5 480 | #elif LED == G6 481 | #undef LED 482 | #define LED_DDR DDRG 483 | #define LED_PORT PORTG 484 | #define LED_PIN PING 485 | #define LED PING6 486 | #elif LED == G7 487 | #undef LED 488 | #define LED_DDR DDRG 489 | #define LED_PORT PORTG 490 | #define LED_PIN PING 491 | #define LED PING7 492 | 493 | #elif LED == H0 494 | #undef LED 495 | #define LED_DDR DDRH 496 | #define LED_PORT PORTH 497 | #define LED_PIN PINH 498 | #define LED PINH0 499 | #elif LED == H1 500 | #undef LED 501 | #define LED_DDR DDRH 502 | #define LED_PORT PORTH 503 | #define LED_PIN PINH 504 | #define LED PINH1 505 | #elif LED == H2 506 | #undef LED 507 | #define LED_DDR DDRH 508 | #define LED_PORT PORTH 509 | #define LED_PIN PINH 510 | #define LED PINH2 511 | #elif LED == H3 512 | #undef LED 513 | #define LED_DDR DDRH 514 | #define LED_PORT PORTH 515 | #define LED_PIN PINH 516 | #define LED PINH3 517 | #elif LED == H4 518 | #undef LED 519 | #define LED_DDR DDRH 520 | #define LED_PORT PORTH 521 | #define LED_PIN PINH 522 | #define LED PINH4 523 | #elif LED == H5 524 | #undef LED 525 | #define LED_DDR DDRH 526 | #define LED_PORT PORTH 527 | #define LED_PIN PINH 528 | #define LED PINH5 529 | #elif LED == H6 530 | #undef LED 531 | #define LED_DDR DDRH 532 | #define LED_PORT PORTH 533 | #define LED_PIN PINH 534 | #define LED PINH6 535 | #elif LED == H7 536 | #undef LED 537 | #define LED_DDR DDRH 538 | #define LED_PORT PORTH 539 | #define LED_PIN PINH 540 | #define LED PINH7 541 | 542 | #elif LED == J0 543 | #undef LED 544 | #define LED_DDR DDRJ 545 | #define LED_PORT PORTJ 546 | #define LED_PIN PINJ 547 | #define LED PINJ0 548 | #elif LED == J1 549 | #undef LED 550 | #define LED_DDR DDRJ 551 | #define LED_PORT PORTJ 552 | #define LED_PIN PINJ 553 | #define LED PINJ1 554 | #elif LED == J2 555 | #undef LED 556 | #define LED_DDR DDRJ 557 | #define LED_PORT PORTJ 558 | #define LED_PIN PINJ 559 | #define LED PINJ2 560 | #elif LED == J3 561 | #undef LED 562 | #define LED_DDR DDRJ 563 | #define LED_PORT PORTJ 564 | #define LED_PIN PINJ 565 | #define LED PINJ3 566 | #elif LED == J4 567 | #undef LED 568 | #define LED_DDR DDRJ 569 | #define LED_PORT PORTJ 570 | #define LED_PIN PINJ 571 | #define LED PINJ4 572 | #elif LED == J5 573 | #undef LED 574 | #define LED_DDR DDRJ 575 | #define LED_PORT PORTJ 576 | #define LED_PIN PINJ 577 | #define LED PINJ5 578 | #elif LED == J6 579 | #undef LED 580 | #define LED_DDR DDRJ 581 | #define LED_PORT PORTJ 582 | #define LED_PIN PINJ 583 | #define LED PINJ6 584 | #elif LED == J7 585 | #undef LED 586 | #define LED_DDR DDRJ 587 | #define LED_PORT PORTJ 588 | #define LED_PIN PINJ 589 | #define LED PINJ7 590 | 591 | #elif LED == K0 592 | #undef LED 593 | #define LED_DDR DDRK 594 | #define LED_PORT PORTK 595 | #define LED_PIN PINK 596 | #define LED PINK0 597 | #elif LED == K1 598 | #undef LED 599 | #define LED_DDR DDRK 600 | #define LED_PORT PORTK 601 | #define LED_PIN PINK 602 | #define LED PINK1 603 | #elif LED == K2 604 | #undef LED 605 | #define LED_DDR DDRK 606 | #define LED_PORT PORTK 607 | #define LED_PIN PINK 608 | #define LED PINK2 609 | #elif LED == K3 610 | #undef LED 611 | #define LED_DDR DDRK 612 | #define LED_PORT PORTK 613 | #define LED_PIN PINK 614 | #define LED PINK3 615 | #elif LED == K4 616 | #undef LED 617 | #define LED_DDR DDRK 618 | #define LED_PORT PORTK 619 | #define LED_PIN PINK 620 | #define LED PINK4 621 | #elif LED == K5 622 | #undef LED 623 | #define LED_DDR DDRK 624 | #define LED_PORT PORTK 625 | #define LED_PIN PINK 626 | #define LED PINK5 627 | #elif LED == K6 628 | #undef LED 629 | #define LED_DDR DDRK 630 | #define LED_PORT PORTK 631 | #define LED_PIN PINK 632 | #define LED PINK6 633 | #elif LED == K7 634 | #undef LED 635 | #define LED_DDR DDRK 636 | #define LED_PORT PORTK 637 | #define LED_PIN PINK 638 | #define LED PINK7 639 | 640 | #elif LED == L0 641 | #undef LED 642 | #define LED_DDR DDRL 643 | #define LED_PORT PORTL 644 | #define LED_PIN PINL 645 | #define LED PINL0 646 | #elif LED == L1 647 | #undef LED 648 | #define LED_DDR DDRL 649 | #define LED_PORT PORTL 650 | #define LED_PIN PINL 651 | #define LED PINL1 652 | #elif LED == L2 653 | #undef LED 654 | #define LED_DDR DDRL 655 | #define LED_PORT PORTL 656 | #define LED_PIN PINL 657 | #define LED PINL2 658 | #elif LED == L3 659 | #undef LED 660 | #define LED_DDR DDRL 661 | #define LED_PORT PORTL 662 | #define LED_PIN PINL 663 | #define LED PINL3 664 | #elif LED == L4 665 | #undef LED 666 | #define LED_DDR DDRL 667 | #define LED_PORT PORTL 668 | #define LED_PIN PINL 669 | #define LED PINL4 670 | #elif LED == L5 671 | #undef LED 672 | #define LED_DDR DDRL 673 | #define LED_PORT PORTL 674 | #define LED_PIN PINL 675 | #define LED PINL5 676 | #elif LED == L6 677 | #undef LED 678 | #define LED_DDR DDRL 679 | #define LED_PORT PORTL 680 | #define LED_PIN PINL 681 | #define LED PINL6 682 | #elif LED == L7 683 | #undef LED 684 | #define LED_DDR DDRL 685 | #define LED_PORT PORTL 686 | #define LED_PIN PINL 687 | #define LED PINL7 688 | 689 | #elif LED == A0 690 | #undef LED 691 | #define LED_DDR DDRA 692 | #define LED_PORT PORTA 693 | #define LED_PIN PINA 694 | #define LED PINA0 695 | #elif LED == A1 696 | #undef LED 697 | #define LED_DDR DDRA 698 | #define LED_PORT PORTA 699 | #define LED_PIN PINA 700 | #define LED PINA1 701 | #elif LED == A2 702 | #undef LED 703 | #define LED_DDR DDRA 704 | #define LED_PORT PORTA 705 | #define LED_PIN PINA 706 | #define LED PINA2 707 | #elif LED == A3 708 | #undef LED 709 | #define LED_DDR DDRA 710 | #define LED_PORT PORTA 711 | #define LED_PIN PINA 712 | #define LED PINA3 713 | #elif LED == A4 714 | #undef LED 715 | #define LED_DDR DDRA 716 | #define LED_PORT PORTA 717 | #define LED_PIN PINA 718 | #define LED PINA4 719 | #elif LED == A5 720 | #undef LED 721 | #define LED_DDR DDRA 722 | #define LED_PORT PORTA 723 | #define LED_PIN PINA 724 | #define LED PINA5 725 | #elif LED == A6 726 | #undef LED 727 | #define LED_DDR DDRA 728 | #define LED_PORT PORTA 729 | #define LED_PIN PINA 730 | #define LED PINA6 731 | #elif LED == A7 732 | #undef LED 733 | #define LED_DDR DDRA 734 | #define LED_PORT PORTA 735 | #define LED_PIN PINA 736 | #define LED PINA7 737 | 738 | #else 739 | #error ------------------------------------------- 740 | #error Unrecognized LED name. Should be like "B5" 741 | #error ------------------------------------------- 742 | #endif 743 | -------------------------------------------------------------------------------- /bootloaders/optiboot/stk500.h: -------------------------------------------------------------------------------- 1 | /* STK500 constants list, from AVRDUDE */ 2 | #define STK_OK 0x10 3 | #define STK_FAILED 0x11 // Not used 4 | #define STK_UNKNOWN 0x12 // Not used 5 | #define STK_NODEVICE 0x13 // Not used 6 | #define STK_INSYNC 0x14 // ' ' 7 | #define STK_NOSYNC 0x15 // Not used 8 | #define ADC_CHANNEL_ERROR 0x16 // Not used 9 | #define ADC_MEASURE_OK 0x17 // Not used 10 | #define PWM_CHANNEL_ERROR 0x18 // Not used 11 | #define PWM_ADJUST_OK 0x19 // Not used 12 | #define CRC_EOP 0x20 // 'SPACE' 13 | #define STK_GET_SYNC 0x30 // '0' 14 | #define STK_GET_SIGN_ON 0x31 // '1' 15 | #define STK_SET_PARAMETER 0x40 // '@' 16 | #define STK_GET_PARAMETER 0x41 // 'A' 17 | #define STK_SET_DEVICE 0x42 // 'B' 18 | #define STK_SET_DEVICE_EXT 0x45 // 'E' 19 | #define STK_ENTER_PROGMODE 0x50 // 'P' 20 | #define STK_LEAVE_PROGMODE 0x51 // 'Q' 21 | #define STK_CHIP_ERASE 0x52 // 'R' 22 | #define STK_CHECK_AUTOINC 0x53 // 'S' 23 | #define STK_LOAD_ADDRESS 0x55 // 'U' 24 | #define STK_UNIVERSAL 0x56 // 'V' 25 | #define STK_PROG_FLASH 0x60 // '`' 26 | #define STK_PROG_DATA 0x61 // 'a' 27 | #define STK_PROG_FUSE 0x62 // 'b' 28 | #define STK_PROG_LOCK 0x63 // 'c' 29 | #define STK_PROG_PAGE 0x64 // 'd' 30 | #define STK_PROG_FUSE_EXT 0x65 // 'e' 31 | #define STK_READ_FLASH 0x70 // 'p' 32 | #define STK_READ_DATA 0x71 // 'q' 33 | #define STK_READ_FUSE 0x72 // 'r' 34 | #define STK_READ_LOCK 0x73 // 's' 35 | #define STK_READ_PAGE 0x74 // 't' 36 | #define STK_READ_SIGN 0x75 // 'u' 37 | #define STK_READ_OSCCAL 0x76 // 'v' 38 | #define STK_READ_FUSE_EXT 0x77 // 'w' 39 | #define STK_READ_OSCCAL_EXT 0x78 // 'x' 40 | -------------------------------------------------------------------------------- /gpl2.txt: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 2, June 1991 3 | 4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc. 5 | 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The licenses for most software are designed to take away your 12 | freedom to share and change it. By contrast, the GNU General Public 13 | License is intended to guarantee your freedom to share and change free 14 | software--to make sure the software is free for all its users. This 15 | General Public License applies to most of the Free Software 16 | Foundation's software and to any other program whose authors commit to 17 | using it. (Some other Free Software Foundation software is covered by 18 | the GNU Library General Public License instead.) You can apply it to 19 | your programs, too. 20 | 21 | When we speak of free software, we are referring to freedom, not 22 | price. Our General Public Licenses are designed to make sure that you 23 | have the freedom to distribute copies of free software (and charge for 24 | this service if you wish), that you receive source code or can get it 25 | if you want it, that you can change the software or use pieces of it 26 | in new free programs; and that you know you can do these things. 27 | 28 | To protect your rights, we need to make restrictions that forbid 29 | anyone to deny you these rights or to ask you to surrender the rights. 30 | These restrictions translate to certain responsibilities for you if you 31 | distribute copies of the software, or if you modify it. 32 | 33 | For example, if you distribute copies of such a program, whether 34 | gratis or for a fee, you must give the recipients all the rights that 35 | you have. You must make sure that they, too, receive or can get the 36 | source code. And you must show them these terms so they know their 37 | rights. 38 | 39 | We protect your rights with two steps: (1) copyright the software, and 40 | (2) offer you this license which gives you legal permission to copy, 41 | distribute and/or modify the software. 42 | 43 | Also, for each author's protection and ours, we want to make certain 44 | that everyone understands that there is no warranty for this free 45 | software. If the software is modified by someone else and passed on, we 46 | want its recipients to know that what they have is not the original, so 47 | that any problems introduced by others will not reflect on the original 48 | authors' reputations. 49 | 50 | Finally, any free program is threatened constantly by software 51 | patents. We wish to avoid the danger that redistributors of a free 52 | program will individually obtain patent licenses, in effect making the 53 | program proprietary. To prevent this, we have made it clear that any 54 | patent must be licensed for everyone's free use or not licensed at all. 55 | 56 | The precise terms and conditions for copying, distribution and 57 | modification follow. 58 | 59 | GNU GENERAL PUBLIC LICENSE 60 | TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 61 | 62 | 0. This License applies to any program or other work which contains 63 | a notice placed by the copyright holder saying it may be distributed 64 | under the terms of this General Public License. The "Program", below, 65 | refers to any such program or work, and a "work based on the Program" 66 | means either the Program or any derivative work under copyright law: 67 | that is to say, a work containing the Program or a portion of it, 68 | either verbatim or with modifications and/or translated into another 69 | language. (Hereinafter, translation is included without limitation in 70 | the term "modification".) Each licensee is addressed as "you". 71 | 72 | Activities other than copying, distribution and modification are not 73 | covered by this License; they are outside its scope. The act of 74 | running the Program is not restricted, and the output from the Program 75 | is covered only if its contents constitute a work based on the 76 | Program (independent of having been made by running the Program). 77 | Whether that is true depends on what the Program does. 78 | 79 | 1. You may copy and distribute verbatim copies of the Program's 80 | source code as you receive it, in any medium, provided that you 81 | conspicuously and appropriately publish on each copy an appropriate 82 | copyright notice and disclaimer of warranty; keep intact all the 83 | notices that refer to this License and to the absence of any warranty; 84 | and give any other recipients of the Program a copy of this License 85 | along with the Program. 86 | 87 | You may charge a fee for the physical act of transferring a copy, and 88 | you may at your option offer warranty protection in exchange for a fee. 89 | 90 | 2. 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(Exception: if the Program itself is interactive but 111 | does not normally print such an announcement, your work based on 112 | the Program is not required to print an announcement.) 113 | 114 | These requirements apply to the modified work as a whole. If 115 | identifiable sections of that work are not derived from the Program, 116 | and can be reasonably considered independent and separate works in 117 | themselves, then this License, and its terms, do not apply to those 118 | sections when you distribute them as separate works. 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You may copy and distribute the Program (or a work based on it, 135 | under Section 2) in object code or executable form under the terms of 136 | Sections 1 and 2 above provided that you also do one of the following: 137 | 138 | a) Accompany it with the complete corresponding machine-readable 139 | source code, which must be distributed under the terms of Sections 140 | 1 and 2 above on a medium customarily used for software interchange; or, 141 | 142 | b) Accompany it with a written offer, valid for at least three 143 | years, to give any third party, for a charge no more than your 144 | cost of physically performing source distribution, a complete 145 | machine-readable copy of the corresponding source code, to be 146 | distributed under the terms of Sections 1 and 2 above on a medium 147 | customarily used for software interchange; or, 148 | 149 | c) Accompany it with the information you received as to the offer 150 | to distribute corresponding source code. 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Many people have made 220 | generous contributions to the wide range of software distributed 221 | through that system in reliance on consistent application of that 222 | system; it is up to the author/donor to decide if he or she is willing 223 | to distribute software through any other system and a licensee cannot 224 | impose that choice. 225 | 226 | This section is intended to make thoroughly clear what is believed to 227 | be a consequence of the rest of this License. 228 | 229 | 8. If the distribution and/or use of the Program is restricted in 230 | certain countries either by patents or by copyrighted interfaces, the 231 | original copyright holder who places the Program under this License 232 | may add an explicit geographical distribution limitation excluding 233 | those countries, so that distribution is permitted only in or among 234 | countries not thus excluded. In such case, this License incorporates 235 | the limitation as if written in the body of this License. 236 | 237 | 9. The Free Software Foundation may publish revised and/or new versions 238 | of the General Public License from time to time. Such new versions will 239 | be similar in spirit to the present version, but may differ in detail to 240 | address new problems or concerns. 241 | 242 | Each version is given a distinguishing version number. If the Program 243 | specifies a version number of this License which applies to it and "any 244 | later version", you have the option of following the terms and conditions 245 | either of that version or of any later version published by the Free 246 | Software Foundation. If the Program does not specify a version number of 247 | this License, you may choose any version ever published by the Free Software 248 | Foundation. 249 | 250 | 10. If you wish to incorporate parts of the Program into other free 251 | programs whose distribution conditions are different, write to the author 252 | to ask for permission. For software which is copyrighted by the Free 253 | Software Foundation, write to the Free Software Foundation; we sometimes 254 | make exceptions for this. Our decision will be guided by the two goals 255 | of preserving the free status of all derivatives of our free software and 256 | of promoting the sharing and reuse of software generally. 257 | 258 | NO WARRANTY 259 | 260 | 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY 261 | FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN 262 | OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES 263 | PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED 264 | OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 265 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS 266 | TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE 267 | PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, 268 | REPAIR OR CORRECTION. 269 | 270 | 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 271 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR 272 | REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, 273 | INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING 274 | OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED 275 | TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY 276 | YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER 277 | PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE 278 | POSSIBILITY OF SUCH DAMAGES. 279 | 280 | END OF TERMS AND CONDITIONS 281 | 282 | How to Apply These Terms to Your New Programs 283 | 284 | If you develop a new program, and you want it to be of the greatest 285 | possible use to the public, the best way to achieve this is to make it 286 | free software which everyone can redistribute and change under these terms. 287 | 288 | To do so, attach the following notices to the program. It is safest 289 | to attach them to the start of each source file to most effectively 290 | convey the exclusion of warranty; and each file should have at least 291 | the "copyright" line and a pointer to where the full notice is found. 292 | 293 | 294 | Copyright (C) 295 | 296 | This program is free software; you can redistribute it and/or modify 297 | it under the terms of the GNU General Public License as published by 298 | the Free Software Foundation; either version 2 of the License, or 299 | (at your option) any later version. 300 | 301 | This program is distributed in the hope that it will be useful, 302 | but WITHOUT ANY WARRANTY; without even the implied warranty of 303 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 304 | GNU General Public License for more details. 305 | 306 | You should have received a copy of the GNU General Public License 307 | along with this program; if not, write to the Free Software 308 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 309 | 310 | 311 | Also add information on how to contact you by electronic and paper mail. 312 | 313 | If the program is interactive, make it output a short notice like this 314 | when it starts in an interactive mode: 315 | 316 | Gnomovision version 69, Copyright (C) year name of author 317 | Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 318 | This is free software, and you are welcome to redistribute it 319 | under certain conditions; type `show c' for details. 320 | 321 | The hypothetical commands `show w' and `show c' should show the appropriate 322 | parts of the General Public License. Of course, the commands you use may 323 | be called something other than `show w' and `show c'; they could even be 324 | mouse-clicks or menu items--whatever suits your program. 325 | 326 | You should also get your employer (if you work as a programmer) or your 327 | school, if any, to sign a "copyright disclaimer" for the program, if 328 | necessary. Here is a sample; alter the names: 329 | 330 | Yoyodyne, Inc., hereby disclaims all copyright interest in the program 331 | `Gnomovision' (which makes passes at compilers) written by James Hacker. 332 | 333 | , 1 April 1989 334 | Ty Coon, President of Vice 335 | 336 | This General Public License does not permit incorporating your program into 337 | proprietary programs. If your program is a subroutine library, you may 338 | consider it more useful to permit linking proprietary applications with the 339 | library. If this is what you want to do, use the GNU Library General 340 | Public License instead of this License. 341 | -------------------------------------------------------------------------------- /package_lauszus_sanguino_index.json: -------------------------------------------------------------------------------- 1 | { 2 | "packages": [ 3 | { 4 | "name": "Sanguino", 5 | "maintainer": "Kristian Sloth Lauszus", 6 | "websiteURL": "http://lauszus.github.io/Sanguino/", 7 | "email": "kristianl@tkjelectronics.dk", 8 | "help": { 9 | "online": "https://github.com/Lauszus/sanguino/" 10 | }, 11 | "platforms": [ 12 | { 13 | "name": "Sanguino", 14 | "architecture": "avr", 15 | "version": "1.0.0", 16 | "category": "Sanguino", 17 | "help": { 18 | "online": "https://github.com/Lauszus/sanguino/" 19 | }, 20 | "url": "https://github.com/Lauszus/Sanguino/releases/download/1.0.0/Sanguino-1.0.0.zip", 21 | "archiveFileName": "Sanguino-1.0.0.zip", 22 | "checksum": "SHA-256:1bfe7707894907a2792884fc726e1fe9251842fac75eaf5ef451bba0c18cbb4e", 23 | "size": "92824", 24 | "boards": [ 25 | {"name": "Sanguino"} 26 | ], 27 | "toolsDependencies": [ 28 | { 29 | "packager": "arduino", 30 | "name": "avr-gcc", 31 | "version": "4.8.1-arduino5" 32 | }, 33 | { 34 | "packager": "arduino", 35 | "name": "avrdude", 36 | "version": "6.0.1-arduino5" 37 | } 38 | ] 39 | }, 40 | { 41 | "name": "Sanguino", 42 | "architecture": "avr", 43 | "version": "1.0.1", 44 | "category": "Sanguino", 45 | "help": { 46 | "online": "https://github.com/Lauszus/sanguino/" 47 | }, 48 | "url": "https://github.com/Lauszus/Sanguino/releases/download/1.0.1/Sanguino-1.0.1.zip", 49 | "archiveFileName": "Sanguino-1.0.1.zip", 50 | "checksum": "SHA-256:f4ff1b1f7810eb13a580939a7bb46161d7554c51de070ed16acdb6834a25023f", 51 | "size": "91766", 52 | "boards": [ 53 | {"name": "Sanguino"} 54 | ], 55 | "toolsDependencies": [ 56 | { 57 | "packager": "arduino", 58 | "name": "avr-gcc", 59 | "version": "4.8.1-arduino5" 60 | }, 61 | { 62 | "packager": "arduino", 63 | "name": "avrdude", 64 | "version": "6.0.1-arduino5" 65 | } 66 | ] 67 | }, 68 | { 69 | "name": "Sanguino", 70 | "architecture": "avr", 71 | "version": "1.0.2", 72 | "category": "Sanguino", 73 | "help": { 74 | "online": "https://github.com/Lauszus/sanguino/" 75 | }, 76 | "url": "https://github.com/Lauszus/Sanguino/releases/download/1.0.2/Sanguino-1.0.2.zip", 77 | "archiveFileName": "Sanguino-1.0.2.zip", 78 | "checksum": "SHA-256:35eaab65d621450820ab094bdaa8d93993e2191b57a161c2ab201ba7626206e0", 79 | "size": "91859", 80 | "boards": [ 81 | {"name": "Sanguino"} 82 | ], 83 | "toolsDependencies": [ 84 | { 85 | "packager": "arduino", 86 | "name": "avr-gcc", 87 | "version": "4.8.1-arduino5" 88 | }, 89 | { 90 | "packager": "arduino", 91 | "name": "avrdude", 92 | "version": "6.0.1-arduino5" 93 | } 94 | ] 95 | }, 96 | { 97 | "name": "Sanguino", 98 | "architecture": "avr", 99 | "version": "1.0.3", 100 | "category": "Sanguino", 101 | "help": { 102 | "online": "https://github.com/Lauszus/sanguino/" 103 | }, 104 | "url": "https://github.com/Lauszus/Sanguino/releases/download/1.0.3/Sanguino-1.0.3.zip", 105 | "archiveFileName": "Sanguino-1.0.3.zip", 106 | "checksum": "SHA-256:53426df03a85f320cafc6c0eb847bff507ce4e53e87aafcd37d69b7e901edc6d", 107 | "size": "91841", 108 | "boards": [ 109 | {"name": "Sanguino"} 110 | ], 111 | "toolsDependencies": [ 112 | { 113 | "packager": "arduino", 114 | "name": "avr-gcc", 115 | "version": "5.4.0-atmel3.6.1-arduino2" 116 | }, 117 | { 118 | "packager": "arduino", 119 | "name": "avrdude", 120 | "version": "6.3.0-arduino14" 121 | } 122 | ] 123 | } 124 | ], 125 | "tools": [] 126 | } 127 | ] 128 | } 129 | -------------------------------------------------------------------------------- /release.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh -e 2 | # Script to automatically download the project including all submodules 3 | # It then zips the hardware add-on and calculate the SHA-256 and file size 4 | # This is used with the Arduino Boards Manager 5 | 6 | url=https://github.com/Lauszus/Sanguino.git 7 | hardware_add_on_path=avr 8 | 9 | dir="$(cd "$(dirname "$0")" && pwd)" 10 | echo "Working path: $dir" 11 | 12 | name=$(echo $(echo $url | rev | cut -d'/' -f 1 | rev) | cut -d'.' -f 1) 13 | echo "\nClone Project: $name\n" 14 | git clone --depth 1 --single-branch -b master --recursive $url || exit 1 15 | cd "$name" 16 | 17 | echo "\nRemove git files" 18 | find . -name .git | xargs rm -rf 19 | find . -name .gitmodules | xargs rm -rf 20 | find . -name .gitignore | xargs rm -rf 21 | find . -name .gitattributes | xargs rm -rf 22 | 23 | cd "$dir" 24 | mv "$name/$hardware_add_on_path" "$dir/$name-hardware" # Rename avr directory and move out of folder 25 | 26 | echo "Remove \"$name\" directory" 27 | rm -rf $name 28 | 29 | mv "$dir/$name-hardware" "$dir/$name" # Rename hardware directory to the original name 30 | 31 | echo "ZIP hardware directory" 32 | zip -rq "$name" "$name" # Zip the hardware add-on 33 | 34 | echo "Remove hardware directory" 35 | rm -rf "$name" 36 | 37 | # Calculate SHA-256 and file size of hardware add-on used for "package_lauszus_sanguino_index.json" 38 | echo \"checksum\": \"SHA-256:`shasum -a 256 $name.zip | awk '{print $1}'`\", 39 | echo \"size\": \"`ls -l $name.zip | awk '{print $5}'`\", 40 | -------------------------------------------------------------------------------- /variants/sanguino/pins_arduino.h: -------------------------------------------------------------------------------- 1 | /* 2 | pins_arduino.h - Pin definition functions for Arduino 3 | Part of Arduino - http://www.arduino.cc/ 4 | 5 | Copyright (c) 2007 David A. Mellis 6 | 7 | This library is free software; you can redistribute it and/or 8 | modify it under the terms of the GNU Lesser General Public 9 | License as published by the Free Software Foundation; either 10 | version 2.1 of the License, or (at your option) any later version. 11 | 12 | This library is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 | Lesser General Public License for more details. 16 | 17 | You should have received a copy of the GNU Lesser General 18 | Public License along with this library; if not, write to the 19 | Free Software Foundation, Inc., 59 Temple Place, Suite 330, 20 | Boston, MA 02111-1307 USA 21 | 22 | $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ 23 | 24 | Changelog 25 | ----------- 26 | 11/25/11 - ryan@ryanmsutton.com - Add pins for Sanguino 644P and 1284P 27 | 07/15/12 - ryan@ryanmsutton.com - Updated for arduino0101 28 | 12/24/16 - bob.kuhn@att.net - add 1284 PWMs 29 | 30 | Improvements by Kristian Sloth Lauszus, lauszus@gmail.com 31 | */ 32 | 33 | #ifndef Pins_Arduino_h 34 | #define Pins_Arduino_h 35 | 36 | #include 37 | 38 | 39 | #define PIN_SPI_SS (4) 40 | #define PIN_SPI_MOSI (5) 41 | #define PIN_SPI_MISO (6) 42 | #define PIN_SPI_SCK (7) 43 | 44 | static const uint8_t SS = PIN_SPI_SS; 45 | static const uint8_t MOSI = PIN_SPI_MOSI; 46 | static const uint8_t MISO = PIN_SPI_MISO; 47 | static const uint8_t SCK = PIN_SPI_SCK; 48 | 49 | #define PIN_WIRE_SDA (17) 50 | #define PIN_WIRE_SCL (16) 51 | 52 | static const uint8_t SDA = PIN_WIRE_SDA; 53 | static const uint8_t SCL = PIN_WIRE_SCL; 54 | 55 | #define LED_BUILTIN 0 56 | 57 | #define PIN_A0 (31) 58 | #define PIN_A1 (30) 59 | #define PIN_A2 (29) 60 | #define PIN_A3 (28) 61 | #define PIN_A4 (27) 62 | #define PIN_A5 (26) 63 | #define PIN_A6 (25) 64 | #define PIN_A7 (24) 65 | 66 | static const uint8_t A0 = PIN_A0; 67 | static const uint8_t A1 = PIN_A1; 68 | static const uint8_t A2 = PIN_A2; 69 | static const uint8_t A3 = PIN_A3; 70 | static const uint8_t A4 = PIN_A4; 71 | static const uint8_t A5 = PIN_A5; 72 | static const uint8_t A6 = PIN_A6; 73 | static const uint8_t A7 = PIN_A7; 74 | 75 | // ATMEL ATMEGA644/ATMEGA1284 / SANGUINO 76 | // 77 | // +---\/---+ 78 | // (D 0) PB0 1| |40 PA0 (AI 0 / D31) 79 | // (D 1) PB1 2| |39 PA1 (AI 1 / D30) 80 | // INT2 (D 2) PB2 3| |38 PA2 (AI 2 / D29) 81 | // PWM (D 3) PB3 4| |37 PA3 (AI 3 / D28) 82 | // SS PWM (D 4) PB4 5| |36 PA4 (AI 4 / D27) 83 | // MOSI (D 5) PB5 6| |35 PA5 (AI 5 / D26) 84 | // MISO (D 6) PB6 7| |34 PA6 (AI 6 / D25) 85 | // SCK (D 7) PB7 8| |33 PA7 (AI 7 / D24) 86 | // RST 9| |32 AREF 87 | // VCC 10| |31 GND 88 | // GND 11| |30 AVCC 89 | // XTAL2 12| |29 PC7 (D 23) 90 | // XTAL1 13| |28 PC6 (D 22) 91 | // RX0 (D 8) PD0 14| |27 PC5 (D 21) TDI 92 | // TX0 (D 9) PD1 15| |26 PC4 (D 20) TDO 93 | // INT0 RX1 (D 10) PD2 16| |25 PC3 (D 19) TMS 94 | // INT1 TX1 (D 11) PD3 17| |24 PC2 (D 18) TCK 95 | // PWM (D 12) PD4 18| |23 PC1 (D 17) SDA 96 | // PWM (D 13) PD5 19| |22 PC0 (D 16) SCL 97 | // PWM (D 14) PD6 20| |21 PD7 (D 15) PWM 98 | // +--------+ 99 | // 100 | #define NUM_DIGITAL_PINS 32 101 | #define NUM_ANALOG_INPUTS 8 102 | 103 | #define analogInputToDigitalPin(p) ((p < 8) ? 31 - (p): -1) 104 | #define analogPinToChannel(p) ((p) < 8 ? (p) : (p) >= 24 ? 31 - (p) : -1) 105 | 106 | #if defined(TCCR3A) 107 | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 6 || (p) == 7 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) 108 | #else 109 | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 4 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) 110 | #endif 111 | 112 | #define digitalPinToPCICR(p) ( (((p) >= 0) && ((p) <= 31)) ? (&PCICR) : ((uint8_t *)0) ) 113 | 114 | #define digitalPinToPCICRbit(p) ( (((p) >= 24) && ((p) <= 31)) ? 0 : \ 115 | ( (((p) >= 0) && ((p) <= 7)) ? 1 : \ 116 | ( (((p) >= 16) && ((p) <= 23)) ? 2 : \ 117 | ( (((p) >= 8) && ((p) <= 15)) ? 3 : \ 118 | 0 ) ) ) ) 119 | 120 | #define digitalPinToPCMSK(p) ( (((p) >= 24) && ((p) <= 31)) ? (&PCMSK0) : \ 121 | ( (((p) >= 0) && ((p) <= 7)) ? (&PCMSK1) : \ 122 | ( (((p) >= 16) && ((p) <= 23)) ? (&PCMSK2) : \ 123 | ( (((p) >= 8) && ((p) <= 15)) ? (&PCMSK3) : \ 124 | ((uint8_t *)0) ) ) ) ) 125 | 126 | 127 | #define digitalPinToPCMSKbit(p) ( (((p) >= 24) && ((p) <= 31)) ? (31 - (p)) : \ 128 | ( (((p) >= 0) && ((p) <= 7)) ? (p) : \ 129 | ( (((p) >= 16) && ((p) <= 23)) ? ((p) - 16) : \ 130 | ( (((p) >= 8) && ((p) <= 15)) ? ((p) - 8) : \ 131 | 0 ) ) ) ) 132 | 133 | #define digitalPinToInterrupt(p) ((p) == 10 ? 0 : ((p) == 11 ? 1 : ((p) == 2 ? 2 : NOT_AN_INTERRUPT))) 134 | 135 | #ifdef ARDUINO_MAIN 136 | // these arrays map port names (e.g. port B) to the 137 | // appropriate addresses for various functions (e.g. reading 138 | // and writing) 139 | const uint16_t PROGMEM port_to_mode_PGM[] = 140 | { 141 | NOT_A_PORT, 142 | (uint16_t) &DDRA, 143 | (uint16_t) &DDRB, 144 | (uint16_t) &DDRC, 145 | (uint16_t) &DDRD, 146 | }; 147 | 148 | const uint16_t PROGMEM port_to_output_PGM[] = 149 | { 150 | NOT_A_PORT, 151 | (uint16_t) &PORTA, 152 | (uint16_t) &PORTB, 153 | (uint16_t) &PORTC, 154 | (uint16_t) &PORTD, 155 | }; 156 | const uint16_t PROGMEM port_to_input_PGM[] = 157 | { 158 | NOT_A_PORT, 159 | (uint16_t) &PINA, 160 | (uint16_t) &PINB, 161 | (uint16_t) &PINC, 162 | (uint16_t) &PIND, 163 | }; 164 | const uint8_t PROGMEM digital_pin_to_port_PGM[] = 165 | { 166 | PB, /* 0 */ 167 | PB, 168 | PB, 169 | PB, 170 | PB, 171 | PB, 172 | PB, 173 | PB, 174 | PD, /* 8 */ 175 | PD, 176 | PD, 177 | PD, 178 | PD, 179 | PD, 180 | PD, 181 | PD, 182 | PC, /* 16 */ 183 | PC, 184 | PC, 185 | PC, 186 | PC, 187 | PC, 188 | PC, 189 | PC, 190 | PA, /* 24 */ 191 | PA, 192 | PA, 193 | PA, 194 | PA, 195 | PA, 196 | PA, 197 | PA /* 31 */ 198 | }; 199 | const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = 200 | { 201 | _BV(0), /* 0, port B */ 202 | _BV(1), 203 | _BV(2), 204 | _BV(3), 205 | _BV(4), 206 | _BV(5), 207 | _BV(6), 208 | _BV(7), 209 | _BV(0), /* 8, port D */ 210 | _BV(1), 211 | _BV(2), 212 | _BV(3), 213 | _BV(4), 214 | _BV(5), 215 | _BV(6), 216 | _BV(7), 217 | _BV(0), /* 16, port C */ 218 | _BV(1), 219 | _BV(2), 220 | _BV(3), 221 | _BV(4), 222 | _BV(5), 223 | _BV(6), 224 | _BV(7), 225 | _BV(7), /* 24, port A */ 226 | _BV(6), 227 | _BV(5), 228 | _BV(4), 229 | _BV(3), 230 | _BV(2), 231 | _BV(1), 232 | _BV(0) 233 | }; 234 | const uint8_t PROGMEM digital_pin_to_timer_PGM[] = 235 | { 236 | NOT_ON_TIMER, /* 0 - PB0 */ 237 | NOT_ON_TIMER, /* 1 - PB1 */ 238 | NOT_ON_TIMER, /* 2 - PB2 */ 239 | TIMER0A, /* 3 - PB3 */ 240 | TIMER0B, /* 4 - PB4 */ 241 | NOT_ON_TIMER, /* 5 - PB5 */ 242 | #if defined(TCCR3A) 243 | TIMER3A, /* 6 - PB6 */ 244 | TIMER3B, /* 7 - PB7 */ 245 | #else 246 | NOT_ON_TIMER, /* 6 - PB6 */ 247 | NOT_ON_TIMER, /* 7 - PB7 */ 248 | #endif 249 | NOT_ON_TIMER, /* 8 - PD0 */ 250 | NOT_ON_TIMER, /* 9 - PD1 */ 251 | NOT_ON_TIMER, /* 10 - PD2 */ 252 | NOT_ON_TIMER, /* 11 - PD3 */ 253 | TIMER1B, /* 12 - PD4 */ 254 | TIMER1A, /* 13 - PD5 */ 255 | TIMER2B, /* 14 - PD6 */ 256 | TIMER2A, /* 15 - PD7 */ 257 | NOT_ON_TIMER, /* 16 - PC0 */ 258 | NOT_ON_TIMER, /* 17 - PC1 */ 259 | NOT_ON_TIMER, /* 18 - PC2 */ 260 | NOT_ON_TIMER, /* 19 - PC3 */ 261 | NOT_ON_TIMER, /* 20 - PC4 */ 262 | NOT_ON_TIMER, /* 21 - PC5 */ 263 | NOT_ON_TIMER, /* 22 - PC6 */ 264 | NOT_ON_TIMER, /* 23 - PC7 */ 265 | NOT_ON_TIMER, /* 24 - PA0 */ 266 | NOT_ON_TIMER, /* 25 - PA1 */ 267 | NOT_ON_TIMER, /* 26 - PA2 */ 268 | NOT_ON_TIMER, /* 27 - PA3 */ 269 | NOT_ON_TIMER, /* 28 - PA4 */ 270 | NOT_ON_TIMER, /* 29 - PA5 */ 271 | NOT_ON_TIMER, /* 30 - PA6 */ 272 | NOT_ON_TIMER /* 31 - PA7 */ 273 | }; 274 | #endif 275 | 276 | // These serial port names are intended to allow libraries and architecture-neutral 277 | // sketches to automatically default to the correct port name for a particular type 278 | // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, 279 | // the first hardware serial port whose RX/TX pins are not dedicated to another use. 280 | // 281 | // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor 282 | // 283 | // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial 284 | // 285 | // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library 286 | // 287 | // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. 288 | // 289 | // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX 290 | // pins are NOT connected to anything by default. 291 | 292 | #define SERIAL_PORT_MONITOR Serial 293 | #define SERIAL_PORT_HARDWARE Serial 294 | 295 | #if defined(UBRR1H) 296 | #define SERIAL_PORT_HARDWARE1 Serial1 297 | #define SERIAL_PORT_HARDWARE_OPEN Serial1 298 | #endif 299 | 300 | #endif 301 | --------------------------------------------------------------------------------