├── Makefile ├── Makefile.68000 ├── Makefile.68k ├── Makefile.Cygwin ├── Makefile.Haiku ├── Makefile.MOS ├── Makefile.MiNT ├── Makefile.OS4 ├── Makefile.PUp ├── Makefile.Pelles ├── Makefile.TOS ├── Makefile.WOS ├── Makefile.Win32 ├── Makefile.Win32FromLinux ├── atom.c ├── atom.h ├── cond.c ├── cond.h ├── cpus ├── 6502 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── 6800 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── 6809 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ ├── opcodes.h │ └── registers.h ├── arm │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── c16x │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── jagrisc │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── m68k │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ ├── cpu_models.h │ ├── opcodes.h │ ├── operands.h │ └── specregs.h ├── pdp11 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── ppc │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ ├── opcodes.h │ └── operands.h ├── qnice │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── test │ ├── cpu.c │ ├── cpu.h │ └── cpu_errors.h ├── tr3200 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── vidcore │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ └── opcodes.h ├── x86 │ ├── cpu.c │ ├── cpu.h │ ├── cpu_errors.h │ ├── opcodes.h │ └── registers.h └── z80 │ ├── cpu.c │ ├── cpu.h │ └── cpu_errors.h ├── doc ├── cpu_6502.texi ├── cpu_6800.texi ├── cpu_6809.texi ├── cpu_arm.texi ├── cpu_c16x.texi ├── cpu_jagrisc.texi ├── cpu_m68k.texi ├── cpu_pdp11.texi ├── cpu_ppc.texi ├── cpu_tr3200.texi ├── cpu_x86.texi ├── cpu_z80.texi ├── interface.texi ├── output_aout.texi ├── output_bin.texi ├── output_cdef.texi ├── output_elf.texi ├── output_gst.texi ├── output_hunk.texi ├── output_ihex.texi ├── output_o65.texi ├── output_srec.texi ├── output_test.texi ├── output_tos.texi ├── output_vobj.texi ├── output_xfile.texi ├── syntax_madmac.texi ├── syntax_mot.texi ├── syntax_oldstyle.texi ├── syntax_std.texi ├── vasm.texi └── vasm_main.texi ├── dwarf.c ├── dwarf.h ├── elf_reloc_386.h ├── elf_reloc_68k.h ├── elf_reloc_arm.h ├── elf_reloc_jag.h ├── elf_reloc_ppc.h ├── elf_reloc_x86_64.h ├── error.c ├── error.h ├── expr.c ├── expr.h ├── general_errors.h ├── history ├── hugeint.c ├── hugeint.h ├── listing.c ├── listing.h ├── make.rules ├── obj └── .dummy ├── osdep.c ├── osdep.h ├── output_aout.c ├── output_aout.h ├── output_bin.c ├── output_cdef.c ├── output_elf.c ├── output_elf.h ├── output_errors.h ├── output_gst.c ├── output_gst.h ├── output_hunk.c ├── output_hunk.h ├── output_ihex.c ├── output_o65.c ├── output_srec.c ├── output_test.c ├── output_tos.c ├── output_tos.h ├── output_vobj.c ├── output_xfile.c ├── output_xfile.h ├── parse.c ├── parse.h ├── reloc.c ├── reloc.h ├── source.c ├── source.h ├── stabs.h ├── supp.c ├── supp.h ├── symbol.c ├── symbol.h ├── symtab.c ├── symtab.h ├── syntax ├── madmac │ ├── syntax.c │ ├── syntax.h │ └── syntax_errors.h ├── mot │ ├── syntax.c │ ├── syntax.h │ └── syntax_errors.h ├── oldstyle │ ├── syntax.c │ ├── syntax.h │ └── syntax_errors.h ├── std │ ├── syntax.c │ ├── syntax.h │ └── syntax_errors.h └── test │ ├── syntax.c │ ├── syntax.h │ └── syntax_errors.h ├── tfloat.h ├── vasm.c ├── vasm.h ├── vobjdump.c └── vobjdump.h /Makefile: -------------------------------------------------------------------------------- 1 | # Unix, using gcc 2 | 3 | CC = gcc 4 | TARGET = 5 | TARGETEXTENSION = 6 | 7 | CCOUT = -o $(DUMMY) 8 | COPTS = -c -std=c90 -O2 -pedantic -Wno-long-long -DUNIX $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.68000: -------------------------------------------------------------------------------- 1 | # AmigaOS/68000 low memory 2 | 3 | TARGET = _aos68000 4 | TARGETEXTENSION = 5 | 6 | CC = vc +aos68k 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -size -DLOWMEM -DAMIGA -DOUTBIN -DOUTHUNK -DOUTVOBJ -O1 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lmieee 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.68k: -------------------------------------------------------------------------------- 1 | # AmigaOS/68k 2 | 3 | TARGET = _os3 4 | TARGETEXTENSION = 5 | 6 | CC = vc +aos68k 7 | CCOUT = -o= 8 | COPTS = -c -cpu=68020 -merge-strings -DAMIGA $(OUTFMTS) -O1 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lmieee 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.Cygwin: -------------------------------------------------------------------------------- 1 | # Windows compiled with gcc 2 | 3 | TARGET = _win32 4 | TARGETEXTENSION = .exe 5 | 6 | CC = gcc 7 | CCOUT = -o $(DUMMY) 8 | COPTS = -c -O2 -DUNIX $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.Haiku: -------------------------------------------------------------------------------- 1 | # Unix 2 | 3 | TARGET = 4 | TARGETEXTENSION = 5 | 6 | CC = gcc 7 | CCOUT = -o $(DUMMY) 8 | COPTS = -c -O2 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.MOS: -------------------------------------------------------------------------------- 1 | # MorphOS 2 | 3 | TARGET = _mos 4 | TARGETEXTENSION = 5 | 6 | CC = vc +morphos 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -DAMIGA -O1 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.MiNT: -------------------------------------------------------------------------------- 1 | # Atari TOS/MiNT 2 | 3 | TARGET = _MiNT 4 | TARGETEXTENSION = 5 | 6 | CC = vc +mint 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -cpu=68020 -O1 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.OS4: -------------------------------------------------------------------------------- 1 | # AmigaOS 4.x/PPC 2 | 3 | TARGET = _os4 4 | TARGETEXTENSION = 5 | 6 | CC = vc +aosppc 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -DAMIGA -D__USE_INLINE__ -O1 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.PUp: -------------------------------------------------------------------------------- 1 | # PowerUp 2 | 3 | TARGET = _pup 4 | TARGETEXTENSION = 5 | 6 | CC = vc +powerup 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -DAMIGA -O1 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm -lamiga 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.Pelles: -------------------------------------------------------------------------------- 1 | # Windows compiled with gcc 2 | 3 | TARGET = _win32 4 | TARGETEXTENSION = .exe 5 | 6 | CC = pocc 7 | CCOUT = -Fo 8 | COPTS = -W0 -Ze -c -O2 -D_WIN32 $(OUTFMTS) 9 | 10 | LD = cc 11 | LDOUT = -Fe 12 | LDFLAGS = 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.TOS: -------------------------------------------------------------------------------- 1 | # Atari TOS 68000 low memory 2 | 3 | TARGET = _TOS 4 | TARGETEXTENSION = .ttp 5 | 6 | CC = vc +tos 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -O1 -size -DATARI -DLOWMEM -DOUTBIN -DOUTAOUT -DOUTTOS -DOUTVOBJ 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm 13 | 14 | RM = rm -f 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.WOS: -------------------------------------------------------------------------------- 1 | # WarpOS 2 | 3 | TARGET = _wos 4 | TARGETEXTENSION = 5 | 6 | CC = vc +warpos 7 | CCOUT = -o= 8 | COPTS = -c -merge-strings -DAMIGA -O1 $(OUTFMTS) 9 | 10 | LD = $(CC) 11 | LDOUT = $(CCOUT) 12 | LDFLAGS = -lm -lamiga 13 | 14 | RM = delete force quiet 15 | 16 | include make.rules 17 | -------------------------------------------------------------------------------- /Makefile.Win32: -------------------------------------------------------------------------------- 1 | # Windows 2 | # Tested with Visual Studio 2017: works fine under the Developer Command Prompt for VS2017 3 | # Tested with Visual Studio 2005 Express Edition: works fine 4 | # Tested with Visual C++ Toolkit 2003: works fine, but needs an external make tool (nmake is not included) 5 | 6 | TARGET = _win32 7 | TARGETEXTENSION = .exe 8 | 9 | # If Visual Studio is unable to find when compiling vlink, try enabling the two 10 | # lines below, and point them to where you have installed the Win32 Platform SDK. 11 | 12 | #WIN32_PLATFORMSDK_INCLUDE = "/IC:\Code\Win32 Platform SDK\Include" 13 | #WIN32_PLATFORMSDK_LIB = "/LIBPATH:C:\Code\Win32 Platform SDK\Lib" 14 | 15 | CC = cl 16 | CCOUT = /Fo 17 | COPTS = $(OUTFMTS) /nologo /O2 /MT /c 18 | COPTS = $(COPTS) /wd4996 # Disable warning regarding deprecated functions 19 | # ("use strcpy_s instead of strcpy" etc) 20 | COPTS = $(COPTS) $(WIN32_PLATFORMSDK_INCLUDE) 21 | 22 | LD = link 23 | LDOUT = /OUT: 24 | LDFLAGS = /NOLOGO $(WIN32_PLATFORMSDK_LIB) 25 | 26 | RM = rem 27 | 28 | include make.rules 29 | -------------------------------------------------------------------------------- /Makefile.Win32FromLinux: -------------------------------------------------------------------------------- 1 | # Windows compiled on a Linux machine with mingw 2 | 3 | TARGET = _win32 4 | TARGETEXTENSION = .exe 5 | 6 | 7 | #CC = /usr/bin/i586-mingw32msvc-gcc 8 | CC = /usr/bin/i686-w64-mingw32-gcc 9 | CCOUT = -o $(DUMMY) 10 | COPTS = -c -O2 $(OUTFMTS) 11 | 12 | LD = $(CC) 13 | LDOUT = $(CCOUT) 14 | LDFLAGS = -lm 15 | 16 | RM = rm -f 17 | 18 | 19 | 20 | include make.rules 21 | -------------------------------------------------------------------------------- /atom.h: -------------------------------------------------------------------------------- 1 | /* atom.h - atomic objects from source */ 2 | /* (c) in 2010-2022 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef ATOM_H 5 | #define ATOM_H 6 | 7 | /* types of atoms */ 8 | #define VASMDEBUG 0 9 | #define LABEL 1 10 | #define DATA 2 11 | #define INSTRUCTION 3 12 | #define SPACE 4 13 | #define DATADEF 5 14 | #define LINE 6 15 | #define OPTS 7 16 | #define PRINTTEXT 8 17 | #define PRINTEXPR 9 18 | #define ROFFS 10 19 | #define RORG 11 20 | #define RORGEND 12 21 | #define ASSERT 13 22 | #define NLIST 14 23 | 24 | /* a machine instruction */ 25 | typedef struct instruction { 26 | int code; 27 | #if MAX_QUALIFIERS!=0 28 | char *qualifiers[MAX_QUALIFIERS]; 29 | #endif 30 | #if MAX_OPERANDS!=0 31 | operand *op[MAX_OPERANDS]; 32 | #endif 33 | #if HAVE_INSTRUCTION_EXTENSION 34 | instruction_ext ext; 35 | #endif 36 | } instruction; 37 | 38 | typedef struct defblock { 39 | size_t bitsize; 40 | operand *op; 41 | } defblock; 42 | 43 | struct dblock { 44 | size_t size; 45 | unsigned char *data; 46 | rlist *relocs; 47 | }; 48 | 49 | struct sblock { 50 | size_t space; 51 | expr *space_exp; /* copied to space, when evaluated as constant */ 52 | size_t size; 53 | uint8_t fill[MAXPADBYTES]; 54 | expr *fill_exp; /* copied to fill, when evaluated - may be NULL */ 55 | rlist *relocs; 56 | taddr maxalignbytes; 57 | uint32_t flags; 58 | }; 59 | /* Space is completely uninitialized - may be used as hint by output modules */ 60 | #define SPC_UNINITIALIZED 1 61 | /* Space should be stored as a zeroed extension to a text/data section */ 62 | #define SPC_DATABSS 2 63 | 64 | typedef struct reloffs { 65 | expr *offset; 66 | expr *fillval; 67 | } reloffs; 68 | 69 | typedef struct printexpr { 70 | expr *print_exp; 71 | short type; /* hex, signed, unsigned */ 72 | short size; /* precision in bits */ 73 | } printexpr; 74 | #define PEXP_HEX 0 75 | #define PEXP_SDEC 1 76 | #define PEXP_UDEC 2 77 | #define PEXP_BIN 3 78 | #define PEXP_ASC 4 79 | 80 | typedef struct assertion { 81 | expr *assert_exp; 82 | char *expstr; 83 | char *msgstr; 84 | } assertion; 85 | 86 | typedef struct aoutnlist { 87 | char *name; 88 | int type; 89 | int other; 90 | int desc; 91 | expr *value; 92 | } aoutnlist; 93 | 94 | /* an atomic element of data */ 95 | typedef struct atom { 96 | struct atom *next; 97 | int type; 98 | taddr align; 99 | size_t lastsize; 100 | unsigned changes; 101 | source *src; 102 | int line; 103 | listing *list; 104 | union { 105 | instruction *inst; 106 | dblock *db; 107 | symbol *label; 108 | sblock *sb; 109 | defblock *defb; 110 | void *opts; 111 | int srcline; 112 | char *ptext; 113 | printexpr *pexpr; 114 | reloffs *roffs; 115 | taddr *rorg; 116 | assertion *assert; 117 | aoutnlist *nlist; 118 | } content; 119 | } atom; 120 | 121 | #define MAXSIZECHANGES 5 /* warning, when atom changed size so many times */ 122 | 123 | enum { 124 | PO_CORRUPT=-1,PO_NOMATCH=0,PO_MATCH,PO_SKIP,PO_COMB_OPT,PO_COMB_REQ,PO_NEXT 125 | }; 126 | instruction *new_inst(char *inst,int len,int op_cnt,char **op,int *op_len); 127 | instruction *copy_inst(instruction *); 128 | dblock *new_dblock(); 129 | sblock *new_sblock(expr *,size_t,expr *); 130 | 131 | atom *new_atom(int,taddr); 132 | void add_atom(section *,atom *); 133 | void add_or_save_atom(atom *); 134 | size_t atom_size(atom *,section *,taddr); 135 | void print_atom(FILE *,atom *); 136 | void atom_printexpr(printexpr *,section *,taddr); 137 | atom *clone_atom(atom *); 138 | 139 | atom *add_data_atom(section *,size_t,taddr,taddr); 140 | void add_leb128_atom(section *,taddr); 141 | void add_sleb128_atom(section *,taddr); 142 | atom *add_bytes_atom(section *,void *,size_t); 143 | #define add_string_atom(s,p) add_bytes_atom(s,p,strlen(p)+1) 144 | 145 | atom *new_inst_atom(instruction *); 146 | atom *new_data_atom(dblock *,taddr); 147 | atom *new_label_atom(symbol *); 148 | atom *new_space_atom(expr *,size_t,expr *); 149 | atom *new_datadef_atom(size_t,operand *); 150 | atom *new_srcline_atom(int); 151 | atom *new_opts_atom(void *); 152 | atom *new_text_atom(char *); 153 | atom *new_expr_atom(expr *,int,int); 154 | atom *new_roffs_atom(expr *,expr *); 155 | atom *new_rorg_atom(taddr); 156 | atom *new_rorgend_atom(void); 157 | atom *new_assert_atom(expr *,char *,char *); 158 | atom *new_nlist_atom(char *,int,int,int,expr *); 159 | 160 | #endif 161 | -------------------------------------------------------------------------------- /cond.c: -------------------------------------------------------------------------------- 1 | /* cond.c - conditional assembly support routines */ 2 | /* (c) in 2015,2023 by Frank Wille */ 3 | 4 | #include "vasm.h" 5 | 6 | int clev; /* conditional level */ 7 | 8 | static signed char cond[MAXCONDLEV+1]; 9 | static char *condsrc[MAXCONDLEV+1]; 10 | static int condline[MAXCONDLEV+1]; 11 | static int ifnesting; 12 | 13 | 14 | /* initialize conditional assembly */ 15 | void cond_init(void) 16 | { 17 | cond[0] = 1; 18 | clev = ifnesting = 0; 19 | } 20 | 21 | 22 | /* return true, when current level allows assembling */ 23 | int cond_state(void) 24 | { 25 | return cond[clev] > 0; 26 | } 27 | 28 | 29 | /* ensures that all conditional block are closed at the end of the source */ 30 | void cond_check(void) 31 | { 32 | if (clev > 0) 33 | general_error(66,condsrc[clev],condline[clev]); /* "endc/endif missing */ 34 | } 35 | 36 | 37 | /* establish a new level of conditional assembly */ 38 | void cond_if(char flag) 39 | { 40 | if (++clev >= MAXCONDLEV) 41 | general_error(65,clev); /* nesting depth exceeded */ 42 | 43 | cond[clev] = flag!=0; 44 | condsrc[clev] = cur_src->name; 45 | condline[clev] = cur_src->line; 46 | } 47 | 48 | 49 | /* handle skipped if statement */ 50 | void cond_skipif(void) 51 | { 52 | ifnesting++; 53 | } 54 | 55 | 56 | /* handle else statement after skipped if-branch */ 57 | void cond_else(void) 58 | { 59 | if (ifnesting == 0) 60 | cond[clev] = cond[clev] ? -1 : 1; 61 | } 62 | 63 | 64 | /* handle else statement after assembled if-branch */ 65 | void cond_skipelse(void) 66 | { 67 | if (clev > 0) 68 | cond[clev] = -1; 69 | else 70 | general_error(63); /* else without if */ 71 | } 72 | 73 | 74 | /* handle else-if statement */ 75 | void cond_elseif(char flag) 76 | { 77 | if (clev > 0) { 78 | if (!cond[clev]) 79 | cond[clev] = flag!=0; 80 | else 81 | cond[clev] = -1; 82 | } 83 | else 84 | general_error(63); /* else without if */ 85 | } 86 | 87 | 88 | /* handle end-if statement */ 89 | void cond_endif(void) 90 | { 91 | if (ifnesting == 0) { 92 | if (clev > 0) 93 | clev--; 94 | else 95 | general_error(64); /* unexpected endif without if */ 96 | } 97 | else /* the whole conditional block was ignored */ 98 | ifnesting--; 99 | } 100 | -------------------------------------------------------------------------------- /cond.h: -------------------------------------------------------------------------------- 1 | /* cond.h - conditional assembly support routines */ 2 | /* (c) in 2015,2023 by Frank Wille */ 3 | 4 | #ifndef COND_H 5 | #define COND_H 6 | 7 | /* defines */ 8 | #ifndef MAXCONDLEV 9 | #define MAXCONDLEV 63 10 | #endif 11 | 12 | /* global variables */ 13 | extern int clev; 14 | 15 | /* functions */ 16 | void cond_init(void); 17 | int cond_state(void); 18 | void cond_check(void); 19 | void cond_if(char); 20 | void cond_skipif(void); 21 | void cond_else(void); 22 | void cond_skipelse(void); 23 | void cond_elseif(char); 24 | void cond_endif(void); 25 | 26 | #endif /* COND_H */ 27 | -------------------------------------------------------------------------------- /cpus/6502/cpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | ** cpu.h 650x/65C02/6280/45gs02/65816 cpu-description header-file 3 | ** (c) in 2002,2008,2009,2014,2018,2020,2021,2022 by Frank Wille 4 | */ 5 | 6 | #define BIGENDIAN 0 7 | #define LITTLEENDIAN 1 8 | #define VASM_CPU_650X 1 9 | 10 | /* maximum number of operands for one mnemonic */ 11 | #define MAX_OPERANDS 3 12 | 13 | /* maximum number of mnemonic-qualifiers per mnemonic */ 14 | #define MAX_QUALIFIERS 0 15 | 16 | /* data type to represent a target-address */ 17 | typedef int32_t taddr; 18 | typedef uint32_t utaddr; 19 | 20 | /* we use OPTS atoms for cpu-specific options */ 21 | #define HAVE_CPU_OPTS 1 22 | typedef struct { 23 | uint16_t dpage; 24 | char asize; 25 | char xsize; 26 | } cpuopts; 27 | 28 | /* minimum instruction alignment */ 29 | #define INST_ALIGN 1 30 | 31 | /* default alignment for n-bit data */ 32 | #define DATA_ALIGN(n) 1 33 | 34 | /* operand class for n-bit data definitions */ 35 | #define DATA_OPERAND(n) DATAOP 36 | 37 | /* make sure operands are cleared when parsing a new mnemonic */ 38 | #define CLEAR_OPERANDS_ON_MNEMO 1 39 | 40 | /* returns true when instruction is valid for selected cpu */ 41 | #define MNEMONIC_VALID(i) cpu_available(i) 42 | 43 | /* parse cpu-specific directives with label */ 44 | #define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s) 45 | 46 | /* we define three additional unary operations, '<', '>' and '^' */ 47 | int ext_unary_name(char *); 48 | int ext_unary_type(char *); 49 | int ext_unary_eval(int,taddr,taddr *,int); 50 | int ext_find_base(symbol **,expr *,section *,taddr); 51 | #define LOBYTE (LAST_EXP_TYPE+1) 52 | #define HIBYTE (LAST_EXP_TYPE+2) 53 | #define BANKBYTE (LAST_EXP_TYPE+3) 54 | #define EXT_UNARY_NAME(s) ext_unary_name(s) 55 | #define EXT_UNARY_TYPE(s) ext_unary_type(s) 56 | #define EXT_UNARY_EVAL(t,v,r,c) ext_unary_eval(t,v,r,c) 57 | #define EXT_FIND_BASE(b,e,s,p) ext_find_base(b,e,s,p) 58 | 59 | /* type to store each operand */ 60 | typedef struct { 61 | int type; 62 | unsigned flags; 63 | expr *value; 64 | } operand; 65 | 66 | /* operand flags */ 67 | #define OF_LO (1<<0) 68 | #define OF_HI (1<<1) 69 | #define OF_BK (1<<2) 70 | #define OF_PC (1<<3) 71 | 72 | 73 | /* additional mnemonic data */ 74 | typedef struct { 75 | uint8_t opcode; 76 | uint8_t zp_opcode; /* !=0 means optimization to zero page allowed */ 77 | uint8_t al_opcode; /* !=0 means translation to absolute long allowed */ 78 | uint16_t available; 79 | } mnemonic_extension; 80 | 81 | /* available */ 82 | #define M6502 1 /* standard 6502 instruction set */ 83 | #define ILL 2 /* illegal 6502 instructions */ 84 | #define DTV 4 /* C64 DTV instruction set extension */ 85 | #define M65C02 8 /* basic 65C02 extensions on 6502 instruction set */ 86 | #define WDC02 16 /* basic WDC65C02 extensions on 65C02 instr. set */ 87 | #define WDC02ALL 32 /* all WDC65C02 extensions on 65C02 instr. set */ 88 | #define CSGCE02 64 /* CSG65CE02 extensions on WDC65C02 instruction set */ 89 | #define HU6280 128 /* HuC6280 extensions on WDC65C02 instruction set */ 90 | #define M45GS02 256 /* MEGA65 45GS02 extensions on basic WDC02 instr.set */ 91 | #define WDC65816 512 /* WDC65816/65802 extensions on WDC65C02 instr. set */ 92 | 93 | 94 | /* addressing modes */ 95 | enum { 96 | IMPLIED=0, /* no operand, must be zero */ 97 | DATAOP, /* data operand */ 98 | ABS, /* $1234 */ 99 | ABSX, /* $1234,X */ 100 | ABSY, /* $1234,Y */ 101 | ABSZ, /* $1234,Z */ 102 | LABS, /* $123456 - add LABS-ABS to translate from ABS/ABSX */ 103 | LABSX, /* $123456,X */ 104 | DPAGE, /* $12 - add DPAGE-ABS to optimize ABS/ABSX/ABSY/ABSZ */ 105 | DPAGEX, /* $12,X */ 106 | DPAGEY, /* $12,Y */ 107 | DPAGEZ, /* $12,Z */ 108 | SR, /* $12,S */ 109 | INDIR, /* ($1234) - JMP only */ 110 | DPINDX, /* ($12,X) */ 111 | DPINDY, /* ($12),Y */ 112 | DPINDZ, /* ($12),Z */ 113 | DPIND, /* ($12) */ 114 | SRINDY, /* ($12,S),Y */ 115 | INDIRX, /* ($1234,X) - JMP only */ 116 | LINDIR, /* [$1234] - JML only */ 117 | LDPINDY, /* [$12],Y */ 118 | QDPINDZ, /* [$12],Z - 45GS02 with prefix */ 119 | LDPIND, /* [$12] */ 120 | RELJMP, /* B!cc/JMP construction */ 121 | REL8, /* $1234 - 8-bit signed relative branch */ 122 | REL16, /* $1234 - 16-bit signed relative branch */ 123 | IMMED, /* #$12 or #$1234 in 65816 Accumulator 16-bit mode */ 124 | IMMEDX, /* #$12 or #$1234 in 65816 Index 16-bit mode */ 125 | IMMED8, /* #$12 */ 126 | IMMED16, /* #$1234 */ 127 | WBIT, /* bit-number (WDC65C02) */ 128 | MVBANK, /* memory bank number for WDC65816 MVN/MVP */ 129 | ACCU /* A - all following addressing modes don't need a value! */ 130 | }; 131 | #define IS_ABS(x) ((x)>=ABS && (x)<=ABSZ) 132 | /* check for a MEGA65 quad instruction - maybe make that nicer some time ... */ 133 | #define ISQINST(c) (mnemonics[c].name[3]=='q' || (mnemonics[c].name[2] == 'q' && mnemonics[c].name[0] != 'b')) 134 | #define FIRST_INDIR INDIR 135 | #define LAST_INDIR INDIRX 136 | #define FIRST_SQIND LINDIR 137 | #define LAST_SQIND LDPIND 138 | /* CAUTION: 139 | - Do not change the order of ABS,ABSX/Y/Z, LABS/X and DPAGE,DPAGEX/Y/Z 140 | - All addressing modes >=ACCU (and IMPLIED) do not require a value! 141 | - All indirect addressing modes are between FIRST_INDIR and LAST_INDIR! 142 | - All indirect long (square brackets) addressing modes are between 143 | FIRST_SQIND and LAST_SQIND 144 | */ 145 | 146 | /* cpu-specific symbol-flags */ 147 | #define ZPAGESYM (RSRVD_C<<0) /* symbol will reside in the zero/direct-page */ 148 | 149 | 150 | /* exported by cpu.c */ 151 | extern uint16_t cpu_type; 152 | int cpu_available(int); 153 | int parse_cpu_label(char *,char **); 154 | -------------------------------------------------------------------------------- /cpus/6502/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "instruction not supported on selected architecture",ERROR, 2 | "trailing garbage in operand",WARNING, 3 | "addressing mode selector ignored",WARNING, 4 | "data size %d not supported",ERROR, 5 | "relocation does not allow hi/lo modifier",ERROR, 6 | "operand doesn't fit into %d bits",ERROR, /* 05 */ 7 | "branch destination out of range",ERROR, 8 | "illegal bit number",ERROR, 9 | "identifier expected",ERROR, 10 | "multiple hi/lo modifiers",WARNING, 11 | "zero/direct-page addressing not available",ERROR, /* 10 */ 12 | "operand not in zero/direct-page range",ERROR, 13 | "absolute-long addressing not available",ERROR, 14 | -------------------------------------------------------------------------------- /cpus/6800/cpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | * cpu.h 6800 cpu description file 3 | * (c) in 2013-2014 by Esben Norby and Frank Wille 4 | */ 5 | 6 | #define BIGENDIAN 1 7 | #define LITTLEENDIAN 0 8 | #define VASM_CPU_6800 1 9 | #define MNEMOHTABSIZE 0x2000 10 | 11 | /* maximum number of operands for one mnemonic */ 12 | #define MAX_OPERANDS 4 13 | 14 | /* maximum number of mnemonic-qualifiers per mnemonic */ 15 | #define MAX_QUALIFIERS 0 16 | 17 | /* data type to represent a target-address */ 18 | typedef int16_t taddr; 19 | typedef uint16_t utaddr; 20 | 21 | /* minimum instruction alignment */ 22 | #define INST_ALIGN 1 23 | 24 | /* default alignment for n-bit data */ 25 | #define DATA_ALIGN(n) 1 26 | 27 | /* operand class for n-bit data definitions */ 28 | #define DATA_OPERAND(n) DATAOP 29 | 30 | /* returns true when instruction is valid for selected cpu */ 31 | #define MNEMONIC_VALID(i) cpu_available(i) 32 | 33 | /* allow commas and blanks at the same time to separate instruction operands */ 34 | #define OPERSEP_COMMA 1 35 | #define OPERSEP_BLANK 1 36 | 37 | /* we define two additional unary operations, '<' and '>' */ 38 | int ext_unary_eval(int,taddr,taddr *,int); 39 | int ext_find_base(symbol **,expr *,section *,taddr); 40 | #define LOBYTE (LAST_EXP_TYPE+1) 41 | #define HIBYTE (LAST_EXP_TYPE+2) 42 | #define EXT_UNARY_NAME(s) (*s=='<'||*s=='>') 43 | #define EXT_UNARY_TYPE(s) (*s=='<'?LOBYTE:HIBYTE) 44 | #define EXT_UNARY_EVAL(t,v,r,c) ext_unary_eval(t,v,r,c) 45 | #define EXT_FIND_BASE(b,e,s,p) ext_find_base(b,e,s,p) 46 | 47 | /* type to store each operand */ 48 | typedef struct { 49 | uint16_t type; 50 | uint8_t code[2]; 51 | expr *value; 52 | } operand; 53 | 54 | 55 | /* additional mnemonic data */ 56 | typedef struct { 57 | unsigned char prebyte; 58 | unsigned char opcode; 59 | unsigned char dir_opcode; /* !=0 means optimization to DIR allowed */ 60 | uint8_t available; 61 | } mnemonic_extension; 62 | 63 | /* available */ 64 | #define M6800 1 65 | #define M6801 2 /* 6801/6803: Adds D register and some extras */ 66 | #define M68HC11 4 /* standard 68HC11 instruction set */ 67 | 68 | /* addressing modes */ 69 | #define INH 0 70 | #define IMM 1 /* #$12 */ /* IMM ii */ 71 | #define IMM16 2 /* #$1234 */ /* IMM jj kk */ 72 | #define ADDR 3 73 | #define EXT 4 /* EXT hh */ 74 | #define DIR 5 /* DIR dd */ 75 | #define REL 6 /* REL rr */ 76 | #define REGX 7 77 | #define REGY 8 78 | #define DATAOP 9 /* data operand */ 79 | 80 | /* exported by cpu.c */ 81 | int cpu_available(int); 82 | -------------------------------------------------------------------------------- /cpus/6800/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "trailing garbage in operand",WARNING, 2 | "data size %d not supported",ERROR, 3 | "operand doesn't fit into 8-bits",ERROR, 4 | "branch destination out of range",ERROR, 5 | -------------------------------------------------------------------------------- /cpus/6809/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "trailing garbage in operand",WARNING, 2 | "] expected for indirect addressing mode",ERROR, 3 | "missing valid index register",ERROR, 4 | "pc-relative offset out of range: %ld",ERROR, 5 | "constant offset out of range: %ld",ERROR, 6 | "bad auto decrement/increment value: %d",ERROR, /* 05 */ 7 | "indirect addressing not allowed",ERROR, 8 | "auto increment/decrement not allowed",ERROR, 9 | "short branch out of range: %ld",ERROR, 10 | "long branch out of range: %ld",ERROR, 11 | "decrement branch out of range: %ld",ERROR, /* 10 */ 12 | "data size %d not supported",ERROR, 13 | "data expression doesn't fit into %d bits",ERROR, 14 | "illegal bit number specification: %d",ERROR, 15 | "omitted offset taken as 5-bit zero offset",WARNING, 16 | "immediate expression doesn't fit into %d bits",ERROR, /* 15 */ 17 | "directive ignored as selected CPU has no DP register",WARNING, 18 | "double size modifier ignored",WARNING, 19 | "addressing mode not supported",ERROR, 20 | -------------------------------------------------------------------------------- /cpus/6809/registers.h: -------------------------------------------------------------------------------- 1 | { "A", 1, REG_A, R_OFF|R_BMP|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 2 | { "A", 1, REG_A, R_DOFF|R_IRP|R_DBR, HC12 }, 3 | { "B", 1, REG_B, R_OFF|R_BMP|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 4 | { "B", 1, REG_B, R_DOFF|R_IRP|R_DBR, HC12 }, 5 | { "CC", 2, REG_CC, R_BMP|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 6 | { "CCR",3, REG_CC, R_IRP, HC12 }, 7 | { "D", 1, REG_D, R_OFF|R_IRP|R_STK|R_DBR, M6809|TURBO9|HD6309|HC12 }, 8 | { "E", 1, REG_E, R_OFF|R_IRP, HD6309 }, 9 | { "F", 1, REG_F, R_OFF|R_IRP, HD6309 }, 10 | { "DP", 2, REG_DP, R_IRP|R_STK, M6809|TURBO9|HD6309 }, 11 | { "PC", 2, REG_PC, R_IDXPCR|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 12 | { "PCR",3, REG_PC, R_IDXPCR|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 13 | { "PC", 2, REG_PC, R_IDX12PC, HC12 }, 14 | { "S", 1, REG_S, R_IDX09|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 15 | { "SP", 2, REG_S, R_IDX12|R_IRP|R_DBR, HC12 }, 16 | { "U", 1, REG_U, R_IDX09|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 17 | { "V", 1, REG_V, R_IRP, HD6309 }, 18 | { "W", 1, REG_W, R_OFF|R_IDXW|R_IRP, HD6309 }, 19 | { "X", 1, REG_X, R_IDX09|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 20 | { "X", 1, REG_X, R_IDX12|R_IRP|R_DBR, HC12 }, 21 | { "Y", 1, REG_Y, R_IDX09|R_IRP|R_STK, M6809|TURBO9|HD6309 }, 22 | { "Y", 1, REG_Y, R_IDX12|R_IRP|R_DBR, HC12 }, 23 | { "0", 1, REG_0, R_IRP, HD6309 } 24 | -------------------------------------------------------------------------------- /cpus/arm/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "instruction not supported on selected architecture",ERROR, 2 | "trailing garbage in operand",WARNING, 3 | "label from current section required",ERROR, 4 | "branch offset (%ld) is out of range",ERROR, 5 | "PC-relative load/store (offset %ld) out of range",ERROR, 6 | "cannot make rotated immediate from PC-relative offset (0x%lx)",ERROR,/*05*/ 7 | "constant integer expression required",ERROR, 8 | "constant (0x%lx) not suitable for 8-bit rotated immediate",ERROR, 9 | "branch to an unaligned address (offset %ld)",ERROR, 10 | "not a valid ARM register",ERROR, 11 | "PC (r15) not allowed in this mode",ERROR, /*10*/ 12 | "PC (r15) not allowed for offset register Rm",ERROR, 13 | "PC (r15) not allowed with write-back",ERROR, 14 | "register r%ld was used multiple times",ERROR, 15 | "illegal immediate shift count (%ld)",ERROR, 16 | "not a valid shift register",ERROR, /*15*/ 17 | "24-bit unsigned immediate expected",ERROR, 18 | "data size %d not supported",ERROR, 19 | "illegal addressing mode: %s",ERROR, 20 | "signed/halfword ldr/str doesn't support shifts",ERROR, 21 | "%d-bit immediate offset out of range (%ld)",ERROR, /*20*/ 22 | "post-indexed addressing mode expected",ERROR, 23 | "operation not allowed on external symbols",ERROR, 24 | "ldc/stc offset has to be a multiple of 4",ERROR, 25 | "illegal coprocessor operation mode or type: %ld\n",ERROR, 26 | "%d-bit unsigned immediate offset out of range (%ld)",ERROR, /*25*/ 27 | "offset has to be a multiple of %d",ERROR, 28 | "instruction at unaligned address",ERROR, 29 | "TSTP/TEQP/CMNP/CMPP deprecated on 32-bit architectures",WARNING, 30 | "rotate constant must be an even number between 0 and 30: %ld",ERROR, 31 | "%d-bit unsigned constant required: %ld",ERROR, /*30*/ 32 | -------------------------------------------------------------------------------- /cpus/c16x/cpu.h: -------------------------------------------------------------------------------- 1 | /* cpu.h c16x/st10 cpu-description header-file */ 2 | /* (c) in 2002 by Volker Barthelmann */ 3 | 4 | 5 | /* maximum number of operands in one mnemonic */ 6 | #define MAX_OPERANDS 3 7 | 8 | /* maximum number of mnemonic-qualifiers per mnemonic */ 9 | #define MAX_QUALIFIERS 0 10 | 11 | /* maximum number of additional command-line-flags for this cpu */ 12 | 13 | /* data type to represent a target-address */ 14 | typedef int32_t taddr; 15 | typedef uint32_t utaddr; 16 | 17 | #define LITTLEENDIAN 1 18 | #define BIGENDIAN 0 19 | #define VASM_CPU_C16X 1 20 | 21 | /* minimum instruction alignment */ 22 | #define INST_ALIGN 2 23 | 24 | /* default alignment for n-bit data */ 25 | #define DATA_ALIGN(n) ((n)<=8?1:2) 26 | 27 | /* operand class for n-bit data definitions */ 28 | #define DATA_OPERAND(n) OP_ABS 29 | 30 | #define cc reg 31 | 32 | /* type to store each operand */ 33 | typedef struct { 34 | int type; 35 | int mod; 36 | int reg,regsfr; /* also cc and boff */ 37 | expr *offset,*boffset; 38 | } operand; 39 | 40 | /* operand-types */ 41 | #define OP_GPR 1 42 | #define OP_BGPR 2 43 | #define OP_SFR 3 44 | #define OP_BSFR 4 45 | #define OP_ABS 5 46 | #define OP_SEG OP_ABS 47 | #define OP_BABS 6 48 | #define OP_REGDISP 7 49 | #define OP_REGIND 8 50 | #define OP_REG03IND 9 51 | #define OP_BWORD 10 52 | #define OP_BADDR 11 53 | #define OP_IMM2 12 54 | #define OP_IMM3 13 55 | #define OP_IMM4 14 56 | #define OP_IMM7 15 57 | #define OP_IMM8 16 58 | #define OP_IMM16 17 59 | #define OP_CC 18 60 | #define OP_REL 19 61 | #define OP_JADDR 20 62 | #define OP_POSTINC03 21 63 | #define OP_PREDEC03 22 64 | #define OP_POSTINC 23 65 | #define OP_PREDEC 24 66 | #define OP_PROTECTED 0 67 | 68 | /* mod types */ 69 | #define MOD_SOF 1 70 | #define MOD_SEG 2 71 | #define MOD_DPP0 3 72 | #define MOD_DPP1 4 73 | #define MOD_DPP2 5 74 | #define MOD_DPP3 6 75 | #define MOD_DPPX 7 76 | 77 | #define CPU_C166 1 78 | #define CPU_C167 2 79 | #define CPU_ALL (-1) 80 | 81 | typedef struct { 82 | unsigned int len; 83 | unsigned int opcode; 84 | unsigned int match; 85 | unsigned int lose; 86 | unsigned int encoding; 87 | unsigned int available; 88 | } mnemonic_extension; 89 | -------------------------------------------------------------------------------- /cpus/c16x/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand",ERROR, 2 | "word register expected",ERROR, 3 | "",ERROR, 4 | "value does not find in %d bits",WARNING, 5 | "data size not supported",ERROR, 6 | "illegal use of SOF",WARNING, 7 | "illegal use of SEG",WARNING, 8 | "illegal use of DPP prefix",WARNING, 9 | -------------------------------------------------------------------------------- /cpus/jagrisc/cpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | ** cpu.h Jaguar RISC cpu-description header-file 3 | ** (c) in 2014-2017 by Frank Wille 4 | */ 5 | 6 | extern int jag_big_endian; 7 | #define BIGENDIAN (jag_big_endian) 8 | #define LITTLEENDIAN (!jag_big_endian) 9 | #define VASM_CPU_JAGRISC 1 10 | 11 | /* maximum number of operands for one mnemonic */ 12 | #define MAX_OPERANDS 2 13 | 14 | /* maximum number of mnemonic-qualifiers per mnemonic */ 15 | #define MAX_QUALIFIERS 0 16 | 17 | /* data type to represent a target-address */ 18 | typedef int32_t taddr; 19 | typedef uint32_t utaddr; 20 | 21 | /* minimum instruction alignment */ 22 | #define INST_ALIGN 2 23 | 24 | /* default alignment for n-bit data */ 25 | #define DATA_ALIGN(n) ((n<=8)?1:2) 26 | 27 | /* operand class for n-bit data definitions */ 28 | int jag_data_operand(int); 29 | #define DATA_OPERAND(n) jag_data_operand(n) 30 | 31 | /* returns true when instruction is valid for selected cpu */ 32 | #define MNEMONIC_VALID(i) cpu_available(i) 33 | 34 | /* type to store each operand */ 35 | typedef struct { 36 | uint8_t type; 37 | int8_t reg; 38 | expr *val; 39 | } operand; 40 | 41 | /* operand types */ 42 | enum { 43 | NO_OP=0, 44 | DATA_OP, 45 | DATA64_OP, 46 | DATAI_OP, /* 32-bit with swapped halfwords */ 47 | REG, /* register Rn */ 48 | IMM0, /* 5-bit immediate expression (0-31) */ 49 | IMM1, /* 5-bit immediate expression (1-32) */ 50 | IMM1S, /* 5-bit immediate expression 32-(1-32) for SHLQ */ 51 | SIMM, /* 5-bit signed immediate expression (-16 - 15) */ 52 | IMMLW, /* 32-bit immediate expression in extra longword */ 53 | IREG, /* register indirect (Rn) */ 54 | IR14D, /* register R14 plus displacement indirect (R14+n) */ 55 | IR15D, /* register R15 plus displacement indirect (R15+n) */ 56 | IR14R, /* register R14 plus register Rn indirect (R14+Rn) */ 57 | IR15R, /* register R15 plus register Rn indirect (R15+Rn) */ 58 | CC, /* condition code, t, cc, cs, eq, ne, mi, pl, hi */ 59 | REL, /* relative branch, PC + 2 + (-16..15) words */ 60 | PC /* PC register */ 61 | }; 62 | 63 | /* additional mnemonic data */ 64 | typedef struct { 65 | uint8_t opcode; 66 | uint8_t flags; 67 | } mnemonic_extension; 68 | 69 | /* Values defined for the 'flags' field of mnemonic_extension. */ 70 | #define GPU 1 71 | #define DSP 2 72 | #define ANY GPU|DSP 73 | 74 | #define OPSWAP 128 /* swapped operands in instruction word encoding */ 75 | 76 | /* Register symbols */ 77 | #define HAVE_REGSYMS 78 | #define REGSYMHTSIZE 64 79 | #define RTYPE_R 0 /* R0-R31 */ 80 | #define RTYPE_CC 1 /* condition codes (0-31) */ 81 | 82 | /* Prototypes */ 83 | int cpu_available(int); 84 | 85 | int parse_cpu_label(char *,char **); 86 | #define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s) 87 | -------------------------------------------------------------------------------- /cpus/jagrisc/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "data size %d not supported",ERROR, 2 | "value from %ld to %ld required",ERROR, 3 | "register expected",ERROR, 4 | -------------------------------------------------------------------------------- /cpus/jagrisc/opcodes.h: -------------------------------------------------------------------------------- 1 | "abs", { REG }, { 22, ANY }, 2 | "add", { REG, REG }, { 0, ANY }, 3 | "addc", { REG, REG }, { 1, ANY }, 4 | "addq", { IMM1, REG }, { 2, ANY }, 5 | "addqmod", { IMM1, REG }, { 63, DSP }, 6 | "addqt", { IMM1, REG }, { 3, ANY }, 7 | "and", { REG, REG }, { 9, ANY }, 8 | "bclr", { IMM0, REG }, { 15, ANY }, 9 | "bset", { IMM0, REG }, { 14, ANY }, 10 | "btst", { IMM0, REG }, { 13, ANY }, 11 | "cmp", { REG, REG }, { 30, ANY }, 12 | "cmpq", { SIMM, REG }, { 31, ANY }, 13 | "div", { REG, REG }, { 21, ANY }, 14 | "imacn", { REG, REG }, { 20, ANY }, 15 | "imult", { REG, REG }, { 17, ANY }, 16 | "imultn", { REG, REG }, { 18, ANY }, 17 | "jr", { REL }, { 53, ANY|OPSWAP }, 18 | "jr", { CC, REL }, { 53, ANY|OPSWAP }, 19 | "jump", { IREG }, { 52, ANY|OPSWAP }, 20 | "jump", { CC, IREG }, { 52, ANY|OPSWAP }, 21 | /* Order of "load" matters! Refer to @OPT1@ in cpu.c */ 22 | "load", { IREG, REG }, { 41, ANY }, 23 | "load", { IR14R, REG }, { 58, ANY }, 24 | "load", { IR15R, REG }, { 59, ANY }, 25 | "load", { IR14D, REG }, { 43, ANY }, 26 | "load", { IR15D, REG }, { 44, ANY }, 27 | "loadb", { IREG, REG }, { 39, ANY }, 28 | "loadp", { IREG, REG }, { 42, GPU }, 29 | "loadw", { IREG, REG }, { 40, ANY }, 30 | "mirror", { REG, IREG }, { 48, DSP|OPSWAP }, 31 | "mmult", { REG, REG }, { 54, ANY }, 32 | "move", { REG, REG }, { 34, ANY }, 33 | "move", { PC, REG }, { 51, ANY }, 34 | "movefa", { REG, REG }, { 37, ANY }, 35 | "movei", { IMMLW, REG }, { 38, ANY }, 36 | "moveq", { IMM0, REG }, { 35, ANY }, 37 | "moveta", { REG, REG }, { 36, ANY }, 38 | "mtoi", { REG, REG }, { 55, ANY }, 39 | "mult", { REG, REG }, { 16, ANY }, 40 | "neg", { REG }, { 8, ANY }, 41 | "nop", { NO_OP }, { 57, ANY }, 42 | "normi", { REG, REG }, { 56, ANY }, 43 | "not", { REG }, { 12, ANY }, 44 | "or", { REG, REG }, { 10, ANY }, 45 | "pack", { REG }, { 63, GPU }, 46 | "resmac", { REG }, { 19, ANY }, 47 | "ror", { REG, REG }, { 28, ANY }, 48 | "rorq", { IMM1, REG }, { 29, ANY }, 49 | "sat8", { REG }, { 32, GPU }, 50 | "sat16", { REG }, { 33, GPU }, 51 | "sat16s", { REG }, { 33, DSP }, 52 | "sat24", { REG }, { 62, GPU }, 53 | "sat32s", { REG }, { 42, DSP }, 54 | "sh", { REG, REG }, { 23, ANY }, 55 | "sha", { REG, REG }, { 26, ANY }, 56 | "sharq", { IMM1, REG }, { 27, ANY }, 57 | "shlq", { IMM1S, REG }, { 24, ANY }, 58 | "shrq", { IMM1, REG }, { 25, ANY }, 59 | /* Order of "store" matters! Refer to @OPT1@ in cpu.c */ 60 | "store", { REG, IREG }, { 47, ANY|OPSWAP }, 61 | "store", { REG, IR14R }, { 60, ANY|OPSWAP }, 62 | "store", { REG, IR15R }, { 61, ANY|OPSWAP }, 63 | "store", { REG, IR14D }, { 49, ANY|OPSWAP }, 64 | "store", { REG, IR15D }, { 50, ANY|OPSWAP }, 65 | "storeb", { REG, IREG }, { 45, ANY|OPSWAP }, 66 | "storep", { REG, IREG }, { 48, GPU|OPSWAP }, 67 | "storew", { REG, IREG }, { 46, ANY|OPSWAP }, 68 | "sub", { REG, REG }, { 4, ANY }, 69 | "subc", { REG, REG }, { 5, ANY }, 70 | "subq", { IMM1, REG }, { 6, ANY }, 71 | "subqmod", { IMM1, REG }, { 32, DSP }, 72 | "subqt", { IMM1, REG }, { 7, ANY }, 73 | "unpack", { REG }, { 63, GPU }, 74 | "xor", { REG, REG }, { 11, ANY }, 75 | -------------------------------------------------------------------------------- /cpus/m68k/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "instruction not supported on selected architecture",FATAL|ERROR, 2 | "illegal addressing mode",ERROR, 3 | "invalid register list",ERROR, 4 | "missing ) in register indirect addressing mode",ERROR, 5 | "address register required",ERROR, 6 | "bad size extension",ERROR, /* 05 */ 7 | "displacement at bad position",WARNING, 8 | "base or index register expected",ERROR, 9 | "missing ] in memory indirect addressing mode",ERROR, 10 | "no extension allowed here",WARNING, 11 | "illegal scale factor",ERROR, /* 10 */ 12 | "can't scale PC register",WARNING, 13 | "index register expected",ERROR, 14 | "too many ] in memory indirect addressing mode",ERROR, 15 | "missing outer displacement",ERROR, 16 | "%c expected",ERROR, /* 15 */ 17 | "can't use PC register as index",ERROR, 18 | "double registers in list",WARNING, 19 | "data register required",ERROR, 20 | "illegal bitfield width/offset",ERROR, 21 | "constant integer expression required",ERROR, /* 20 */ 22 | "value from -64 to 63 required for k-factor",ERROR, 23 | "need 32 bits to reference a program label",WARNING, 24 | "option expected",ERROR, 25 | "absolute value expected",ERROR, 26 | "operand value out of range: %ld (valid: %ld..%ld)",ERROR, /* 25 */ 27 | "label in operand required",ERROR, 28 | "using signed operand as unsigned: %ld (valid: %ld..%ld), " 29 | "%ld to fix",WARNING, 30 | "branch destination out of range",ERROR, 31 | "displacement out of range",ERROR, 32 | "absolute displacement expected",ERROR, /* 30 */ 33 | "unknown option %c%c ignored",WARNING, 34 | "absolute short address out of range",ERROR, 35 | "deprecated instruction alias",WARNING, 36 | "illegal opcode extension",FATAL|ERROR, 37 | "extension for unsized instruction ignored",WARNING, /* 35 */ 38 | "immediate operand out of range",ERROR, 39 | "immediate operand has illegal type or size",ERROR, 40 | "data objects with %d bits size are not supported",ERROR, 41 | "data out of range",ERROR, 42 | "data has illegal type",ERROR, /* 40 */ 43 | "illegal combination of ColdFire addressing modes",ERROR, 44 | "FP register required",ERROR, 45 | "unknown cpu type",ERROR, 46 | "register expected",ERROR, 47 | "link.w changed to link.l",WARNING, /* 45 */ 48 | "branch out of range changed to jmp",WARNING, 49 | "lea-displacement out of range, changed into move/add",WARNING, 50 | "translated (A%d) into (0,A%d) for movep",WARNING, 51 | "operand optimized: %s",MESSAGE, 52 | "operand translated: %s",MESSAGE, /* 50 */ 53 | "instruction optimized: %s",MESSAGE, 54 | "instruction translated: %s",MESSAGE, 55 | "branch optimized into: b.%c",MESSAGE, 56 | "branch translated into: b.%c",MESSAGE, 57 | "basereg A%d already in use",ERROR, /* 55 */ 58 | "basereg A%d is already free",WARNING, 59 | "short-branch to following instruction turned into a nop",WARNING, 60 | "not a valid small data register",ERROR, 61 | "small data mode is not enabled",ERROR, 62 | "division by zero",WARNING, /* 60 */ 63 | "can't use B%d register as index",ERROR, 64 | "register list on both sides",ERROR, 65 | "\"%s\" directive was replaced by an instruction with the same name",NOLINE|WARNING, 66 | "Addr.reg. operand at level #0 causes F-line exception",WARNING, 67 | "Dr and Dq are identical, transforming DIVxL.L effectively into " 68 | "DIVx.L",WARNING, /* 65 */ 69 | "not a valid register list symbol",ERROR, 70 | "trailing garbage in operand",WARNING, 71 | "encoding absolute displacement directly",WARNING, 72 | "internal symbol %s has been modified",WARNING, 73 | "instruction too large for bank prefix",ERROR, /* 70 */ 74 | "bad FPU id %d for selected cpu type",ERROR, 75 | -------------------------------------------------------------------------------- /cpus/m68k/cpu_models.h: -------------------------------------------------------------------------------- 1 | { "68000", m68000 }, 2 | { "68008", m68000 }, 3 | { "68010", m68010 }, 4 | { "68020", m68020 }, 5 | { "68030", m68030 }, 6 | { "68040", m68040 }, 7 | { "68060", m68060 }, 8 | 9 | { "68020up", m68020up & ~apollo }, 10 | 11 | { "68881", m68881 }, 12 | { "68882", m68881 }, 13 | { "68851", m68851 }, 14 | 15 | { "68302", m68000 }, 16 | { "68306", m68000 }, 17 | { "68307", m68000 }, 18 | { "6830x", m68000 }, 19 | { "68322", m68000 }, 20 | { "68356", m68000 }, 21 | 22 | { "cpu32", cpu32 }, 23 | { "68328", cpu32 }, 24 | { "68330", cpu32 }, 25 | { "68331", cpu32 }, 26 | { "68332", cpu32 }, 27 | { "68333", cpu32 }, 28 | { "68334", cpu32 }, 29 | { "68336", cpu32 }, 30 | { "6833x", cpu32 }, 31 | { "68340", cpu32 }, 32 | { "68349", cpu32 }, 33 | { "68360", cpu32 }, 34 | { "683xx", cpu32 }, 35 | 36 | { "68080", ac68080 }, 37 | 38 | { "5202", mcfa }, 39 | { "5204", mcfa }, 40 | { "5206", mcfa }, 41 | { "520x", mcfa }, 42 | { "5206e", mcfa|mcfhwdiv|mcfmac }, 43 | { "5207", mcfaplus|mcfhwdiv|mcfemac }, 44 | { "5208", mcfaplus|mcfhwdiv|mcfemac }, 45 | { "5210a", mcfaplus|mcfhwdiv|mcfmac }, 46 | { "5211a", mcfaplus|mcfhwdiv|mcfmac }, 47 | { "5211", mcfaplus|mcfhwdiv|mcfmac }, 48 | { "5212", mcfaplus|mcfhwdiv|mcfmac }, 49 | { "5213", mcfaplus|mcfhwdiv|mcfmac }, 50 | { "5214", mcfaplus|mcfhwdiv|mcfemac }, 51 | { "5216", mcfaplus|mcfhwdiv|mcfemac }, 52 | { "5224", mcfaplus|mcfhwdiv|mcfmac }, 53 | { "5225", mcfaplus|mcfhwdiv|mcfmac }, 54 | { "5232", mcfaplus|mcfhwdiv|mcfemac }, 55 | { "5233", mcfaplus|mcfhwdiv|mcfemac }, 56 | { "5234", mcfaplus|mcfhwdiv|mcfemac }, 57 | { "5235", mcfaplus|mcfhwdiv|mcfemac }, 58 | { "523x", mcfaplus|mcfhwdiv|mcfemac }, 59 | { "5249", mcfa|mcfhwdiv|mcfemac }, 60 | { "5250", mcfa|mcfhwdiv|mcfemac }, 61 | { "5253", mcfa|mcfhwdiv|mcfemac }, 62 | { "5270", mcfaplus|mcfhwdiv|mcfemac }, 63 | { "5271", mcfaplus|mcfhwdiv }, 64 | { "5272", mcfa|mcfhwdiv|mcfmac }, 65 | { "5274", mcfaplus|mcfhwdiv|mcfemac }, 66 | { "5275", mcfaplus|mcfhwdiv|mcfemac }, 67 | { "5280", mcfaplus|mcfhwdiv|mcfemac }, 68 | { "5281", mcfaplus|mcfhwdiv|mcfemac }, 69 | { "5282", mcfaplus|mcfhwdiv|mcfemac }, 70 | { "528x", mcfaplus|mcfhwdiv|mcfemac }, 71 | { "52221", mcfaplus|mcfhwdiv|mcfmac }, 72 | { "52223", mcfaplus|mcfhwdiv|mcfmac }, 73 | { "52230", mcfaplus|mcfhwdiv|mcfemac }, 74 | { "52231", mcfaplus|mcfhwdiv|mcfemac }, 75 | { "52232", mcfaplus|mcfhwdiv|mcfemac }, 76 | { "52233", mcfaplus|mcfhwdiv|mcfemac }, 77 | { "52234", mcfaplus|mcfhwdiv|mcfemac }, 78 | { "52235", mcfaplus|mcfhwdiv|mcfemac }, 79 | { "52252", mcfaplus|mcfhwdiv|mcfemac }, 80 | { "52254", mcfaplus|mcfhwdiv|mcfemac }, 81 | { "52255", mcfaplus|mcfhwdiv|mcfemac }, 82 | { "52256", mcfaplus|mcfhwdiv|mcfemac }, 83 | { "52258", mcfaplus|mcfhwdiv|mcfemac }, 84 | { "52259", mcfaplus|mcfhwdiv|mcfemac }, 85 | { "52274", mcfaplus|mcfhwdiv|mcfemac }, 86 | { "52277", mcfaplus|mcfhwdiv|mcfemac }, 87 | { "v2", mcfa }, 88 | 89 | { "5307", mcfa|mcfhwdiv|mcfmac }, 90 | { "5327", mcfaplus|mcfhwdiv|mcfemac }, 91 | { "5328", mcfaplus|mcfhwdiv|mcfemac }, 92 | { "5329", mcfaplus|mcfhwdiv|mcfemac }, 93 | { "532x", mcfaplus|mcfhwdiv|mcfemac }, 94 | { "5372", mcfaplus|mcfhwdiv|mcfemac }, 95 | { "5373", mcfaplus|mcfhwdiv|mcfemac }, 96 | { "537x", mcfaplus|mcfhwdiv|mcfemac }, 97 | { "53011", mcfaplus|mcfhwdiv|mcfemac }, 98 | { "53012", mcfaplus|mcfhwdiv|mcfemac }, 99 | { "53013", mcfaplus|mcfhwdiv|mcfemac }, 100 | { "53014", mcfaplus|mcfhwdiv|mcfemac }, 101 | { "53015", mcfaplus|mcfhwdiv|mcfemac }, 102 | { "53016", mcfaplus|mcfhwdiv|mcfemac }, 103 | { "53017", mcfaplus|mcfhwdiv|mcfemac }, 104 | { "5301x", mcfaplus|mcfhwdiv|mcfemac }, 105 | { "v3", mcfaplus|mcfhwdiv|mcfemac }, 106 | 107 | { "5407", mcfb|mcfhwdiv|mcfmac }, 108 | { "v4", mcfb|mcfhwdiv|mcfmac }, 109 | { "5470", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 110 | { "5471", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 111 | { "5472", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 112 | { "5473", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 113 | { "5474", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 114 | { "5475", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 115 | { "547x", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 116 | { "5480", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 117 | { "5481", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 118 | { "5482", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 119 | { "5483", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 120 | { "5484", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 121 | { "5485", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 122 | { "548x", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 123 | { "v4e", mcfb|mcfhwdiv|mcfemac|mcfusp|mcffpu|mcfmmu }, 124 | { "54450", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 125 | { "54451", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 126 | { "54452", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 127 | { "54453", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 128 | { "54454", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 129 | { "5445x", mcfc|mcfhwdiv|mcfemac|mcfusp|mcfmmu }, 130 | -------------------------------------------------------------------------------- /cpus/pdp11/cpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | ** cpu.h PDP-11 cpu-description header-file 3 | ** (c) in 2020 by Frank Wille 4 | */ 5 | 6 | #define BIGENDIAN 0 7 | #define LITTLEENDIAN 1 8 | #define VASM_CPU_PDP11 1 9 | 10 | /* maximum number of operands for one mnemonic */ 11 | #define MAX_OPERANDS 2 12 | 13 | /* maximum number of mnemonic-qualifiers per mnemonic */ 14 | #define MAX_QUALIFIERS 0 15 | 16 | /* data type to represent a target-address */ 17 | typedef int32_t taddr; 18 | typedef uint32_t utaddr; 19 | 20 | /* minimum instruction alignment */ 21 | #define INST_ALIGN 2 22 | 23 | /* default alignment for n-bit data */ 24 | #define DATA_ALIGN(n) ((n)<=8?1:2) 25 | 26 | /* operand class for n-bit data definitions */ 27 | #define DATA_OPERAND(n) EXP 28 | 29 | /* returns true when instruction is valid for selected cpu */ 30 | #define MNEMONIC_VALID(i) cpu_available(i) 31 | 32 | /* parse cpu-specific directives with label */ 33 | /*#define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s)*/ 34 | 35 | 36 | /* operand types */ 37 | enum { 38 | _NO_OP=0, /* no operand */ 39 | ANY, /* any addressing mode */ 40 | REG, /* register R0-R7 */ 41 | EXP /* numeric expression */ 42 | }; 43 | 44 | /* type to store each operand */ 45 | typedef struct { 46 | uint8_t mode; 47 | int8_t reg; 48 | expr *value; 49 | } operand; 50 | 51 | /* real addressing modes */ 52 | #define MMASK 7 /* mask for real addressing modes */ 53 | #define MREG 0 /* Rn : register direct */ 54 | #define MREGD 1 /* (Rn) or @Rn : register deferred */ 55 | #define MAINC 2 /* (Rn)+ : autoincrement */ 56 | #define MAINCD 3 /* @(Rn)+ : autoincrement deferred */ 57 | #define MADEC 4 /* -(Rn) : autodecrement */ 58 | #define MADECD 5 /* @-(Rn) : autodecrement deferred */ 59 | #define MIDX 6 /* d(Rn) : indexed */ 60 | #define MIDXD 7 /* @d(Rn) : indexed deferred */ 61 | /* pseudo addressing modes */ 62 | #define MPC 8 /* PC-based pseudo addressing modes, reg=7 */ 63 | #define MIMM (MPC+2) /* #x : immediate */ 64 | #define MABS (MPC+3) /* @#a : absolute address */ 65 | #define MREL (MPC+6) /* a : pc-relative address */ 66 | #define MRELD (MPC+7) /* @a : pc-relative address deferred */ 67 | #define MEXP 0x10 /* x : a numeric expression */ 68 | #define MBCCJMP 0x11 /* a : pc-relative address for B!cc .+6, JMP a */ 69 | 70 | /* evaluated expressions */ 71 | struct MyOpVal { 72 | taddr value; 73 | symbol *base; 74 | int btype; 75 | }; 76 | 77 | 78 | /* additional mnemonic data */ 79 | typedef struct { 80 | uint16_t opcode; 81 | uint8_t format; 82 | uint8_t flags; 83 | } mnemonic_extension; 84 | 85 | /* instruction format */ 86 | enum { 87 | NO, /* oooooooooooooooo: no operand */ 88 | DO, /* oooommmrrrmmmrrr: double operand */ 89 | RO, /* ooooooorrrmmmrrr: register and operand */ 90 | SO, /* oooooooooommmrrr: single operand */ 91 | RG, /* ooooooooooooorrr: register only */ 92 | BR, /* oooooooobbbbbbbb: branches */ 93 | RB, /* ooooooorrrbbbbbb: register and branch */ 94 | TP /* oooooooocccccccc: traps */ 95 | }; 96 | 97 | /* flags: cpu availability */ 98 | #define STD 1 /* standard PDP-11 instruction set */ 99 | #define EIS 2 /* extended instruction set */ 100 | #define FIS 4 /* floating instruction set */ 101 | #define FPP 8 /* floating point processor */ 102 | #define CIS 16 /* commercial instruction set */ 103 | #define PSW 32 /* processor status word instructions */ 104 | #define MSP 64 /* memory space instructions */ 105 | 106 | 107 | /* register symbols */ 108 | #define HAVE_REGSYMS 109 | #define REGSYMHTSIZE 64 110 | #define RTYPE_R 0 /* Register R0..R7 */ 111 | 112 | 113 | /* exported by cpu.c */ 114 | int cpu_available(int); 115 | /*int parse_cpu_label(char *,char **);*/ 116 | -------------------------------------------------------------------------------- /cpus/pdp11/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "bad addressing mode",ERROR, 2 | "bad register",ERROR, 3 | "pc-relative destination out of range: %ld (valid: %d..%d)",ERROR, 4 | "bad trap code %ld (valid: %d..%d)",ERROR, 5 | "displacement out of range: %ld",ERROR, 6 | "immediate value out of range: %ld",ERROR, /* 05 */ 7 | "absolute address out of range: %ld",ERROR, 8 | "data size %d not supported",ERROR, 9 | "data expression doesn't fit into %d bits",ERROR, 10 | -------------------------------------------------------------------------------- /cpus/pdp11/opcodes.h: -------------------------------------------------------------------------------- 1 | /* double operand */ 2 | "mov", {ANY,ANY}, {0010000,DO,STD}, 3 | "cmp", {ANY,ANY}, {0020000,DO,STD}, 4 | "bit", {ANY,ANY}, {0030000,DO,STD}, 5 | "bic", {ANY,ANY}, {0040000,DO,STD}, 6 | "bis", {ANY,ANY}, {0050000,DO,STD}, 7 | "add", {ANY,ANY}, {0060000,DO,STD}, 8 | "movb", {ANY,ANY}, {0110000,DO,STD}, 9 | "cmpb", {ANY,ANY}, {0120000,DO,STD}, 10 | "bitb", {ANY,ANY}, {0130000,DO,STD}, 11 | "bicb", {ANY,ANY}, {0140000,DO,STD}, 12 | "bisb", {ANY,ANY}, {0150000,DO,STD}, 13 | "sub", {ANY,ANY}, {0160000,DO,STD}, 14 | 15 | /* register source or destination */ 16 | "jsr", {REG,ANY}, {0004000,RO,STD}, 17 | "mul", {ANY,REG}, {0070000,RO,EIS}, 18 | "div", {ANY,REG}, {0071000,RO,EIS}, 19 | "ash", {ANY,REG}, {0072000,RO,EIS}, 20 | "ashc", {ANY,REG}, {0073000,RO,EIS}, 21 | "xor", {REG,ANY}, {0074000,RO,STD}, 22 | 23 | /* single oprand */ 24 | "jmp", {ANY,0}, {0000100,SO,STD}, 25 | "swab", {ANY,0}, {0000300,SO,STD}, 26 | "clr", {ANY,0}, {0005000,SO,STD}, 27 | "com", {ANY,0}, {0005100,SO,STD}, 28 | "inc", {ANY,0}, {0005200,SO,STD}, 29 | "dec", {ANY,0}, {0005300,SO,STD}, 30 | "neg", {ANY,0}, {0005400,SO,STD}, 31 | "adc", {ANY,0}, {0005500,SO,STD}, 32 | "sbc", {ANY,0}, {0005600,SO,STD}, 33 | "tst", {ANY,0}, {0005700,SO,STD}, 34 | "ror", {ANY,0}, {0006000,SO,STD}, 35 | "rol", {ANY,0}, {0006100,SO,STD}, 36 | "asr", {ANY,0}, {0006200,SO,STD}, 37 | "asl", {ANY,0}, {0006300,SO,STD}, 38 | "mfpi", {ANY,0}, {0006500,SO,MSP}, 39 | "mtpi", {ANY,0}, {0006600,SO,MSP}, 40 | "sxt", {ANY,0}, {0006700,SO,STD}, 41 | "clrb", {ANY,0}, {0105000,SO,STD}, 42 | "comb", {ANY,0}, {0105100,SO,STD}, 43 | "incb", {ANY,0}, {0105200,SO,STD}, 44 | "decb", {ANY,0}, {0105300,SO,STD}, 45 | "negb", {ANY,0}, {0105400,SO,STD}, 46 | "adcb", {ANY,0}, {0105500,SO,STD}, 47 | "sbcb", {ANY,0}, {0105600,SO,STD}, 48 | "tstb", {ANY,0}, {0105700,SO,STD}, 49 | "rorb", {ANY,0}, {0106000,SO,STD}, 50 | "rolb", {ANY,0}, {0106100,SO,STD}, 51 | "asrb", {ANY,0}, {0106200,SO,STD}, 52 | "aslb", {ANY,0}, {0106300,SO,STD}, 53 | "mtps", {ANY,0}, {0106400,SO,PSW}, 54 | "mfpd", {ANY,0}, {0106500,SO,MSP}, 55 | "mtpd", {ANY,0}, {0106600,SO,MSP}, 56 | "mfps", {ANY,0}, {0106700,SO,PSW}, 57 | 58 | /* branches */ 59 | "br", {EXP,0}, {0000400,BR,STD}, 60 | "bne", {EXP,0}, {0001000,BR,STD}, 61 | "beq", {EXP,0}, {0001400,BR,STD}, 62 | "bge", {EXP,0}, {0002000,BR,STD}, 63 | "blt", {EXP,0}, {0002400,BR,STD}, 64 | "bgt", {EXP,0}, {0003000,BR,STD}, 65 | "ble", {EXP,0}, {0003400,BR,STD}, 66 | "bpl", {EXP,0}, {0100000,BR,STD}, 67 | "bmi", {EXP,0}, {0100400,BR,STD}, 68 | "bhi", {EXP,0}, {0101000,BR,STD}, 69 | "blos", {EXP,0}, {0101400,BR,STD}, 70 | "bvc", {EXP,0}, {0102000,BR,STD}, 71 | "bvs", {EXP,0}, {0102400,BR,STD}, 72 | "bcc", {EXP,0}, {0103000,BR,STD}, 73 | "bcs", {EXP,0}, {0103400,BR,STD}, 74 | "bhis", {EXP,0}, {0103000,BR,STD}, 75 | "blo", {EXP,0}, {0103400,BR,STD}, 76 | 77 | /* register and branch */ 78 | "sob", {REG,EXP}, {0077000,RB,STD}, 79 | 80 | /* single register */ 81 | "rts", {REG,0}, {0000200,RG,STD}, 82 | "fadd", {REG,0}, {0075000,RG,FIS}, 83 | "fsub", {REG,0}, {0075010,RG,FIS}, 84 | "fmul", {REG,0}, {0075020,RG,FIS}, 85 | "fdiv", {REG,0}, {0075030,RG,FIS}, 86 | 87 | /* traps */ 88 | "emt", {EXP,0}, {0104000,TP,STD}, 89 | "trap", {EXP,0}, {0104400,TP,STD}, 90 | 91 | /* no operand */ 92 | "halt", {0}, {0000000,NO,STD}, 93 | "wait", {0}, {0000001,NO,STD}, 94 | "rti", {0}, {0000002,NO,STD}, 95 | "bpt", {0}, {0000003,NO,STD}, 96 | "iot", {0}, {0000004,NO,STD}, 97 | "reset",{0}, {0000005,NO,STD}, 98 | "rtt", {0}, {0000006,NO,STD}, 99 | "nop", {0}, {0000240,NO,STD}, 100 | "clc", {0}, {0000241,NO,STD}, 101 | "clv", {0}, {0000242,NO,STD}, 102 | "clz", {0}, {0000244,NO,STD}, 103 | "cln", {0}, {0000250,NO,STD}, 104 | "ccc", {0}, {0000257,NO,STD}, 105 | "sec", {0}, {0000261,NO,STD}, 106 | "sev", {0}, {0000262,NO,STD}, 107 | "sez", {0}, {0000264,NO,STD}, 108 | "sen", {0}, {0000270,NO,STD}, 109 | "scc", {0}, {0000277,NO,STD}, 110 | -------------------------------------------------------------------------------- /cpus/ppc/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "%s",WARNING, 2 | "instruction not supported on selected architecture",ERROR, 3 | "constant integer expression required",ERROR, 4 | "trailing garbage in operand",WARNING, 5 | "illegal operand type",ERROR, 6 | "missing closing parenthesis in load/store addressing mode",ERROR, /* 05 */ 7 | "relocation does not allow hi/lo modifier",ERROR, 8 | "multiple relocation attributes",ERROR, 9 | "multiple hi/lo modifiers",ERROR, 10 | "data size %d not supported",ERROR, 11 | "data has illegal type",ERROR, /* 10 */ 12 | "relocation attribute not supported by operand",ERROR, 13 | "operand out of range: %ld (allowed: %ld to %ld)",ERROR, 14 | "not a valid register (0-31)",ERROR, 15 | "missing base register in load/store addressing mode",ERROR, 16 | "missing mandatory operand",ERROR, /* 15 */ 17 | "ignoring fake operand",WARNING, 18 | -------------------------------------------------------------------------------- /cpus/qnice/cpu.h: -------------------------------------------------------------------------------- 1 | /* cpu.h qnice cpu-description header-file */ 2 | /* (c) in 2016 by Volker Barthelmann */ 3 | 4 | 5 | /* maximum number of operands in one mnemonic */ 6 | #define MAX_OPERANDS 2 7 | 8 | /* maximum number of mnemonic-qualifiers per mnemonic */ 9 | #define MAX_QUALIFIERS 0 10 | 11 | /* maximum number of additional command-line-flags for this cpu */ 12 | 13 | /* data type to represent a target-address */ 14 | typedef int32_t taddr; 15 | typedef uint32_t utaddr; 16 | 17 | #define LITTLEENDIAN 1 18 | #define BIGENDIAN 0 19 | #define VASM_CPU_QNICE 1 20 | 21 | /* minimum instruction alignment */ 22 | #define INST_ALIGN 2 23 | 24 | /* default alignment for n-bit data */ 25 | #define DATA_ALIGN(n) ((n)<=8?1:2) 26 | 27 | /* operand class for n-bit data definitions */ 28 | #define DATA_OPERAND(n) OP_ABS 29 | 30 | #define cc reg 31 | 32 | /* type to store each operand */ 33 | typedef struct { 34 | int type; 35 | int reg; /* also cc */ 36 | expr *offset; 37 | } operand; 38 | 39 | /* operand-types */ 40 | 41 | #define OP_REG 1 42 | #define OP_REGIND 2 43 | #define OP_POSTINC 3 44 | #define OP_PREDEC 4 45 | #define OP_ABS 5 46 | #define OP_CC 6 47 | #define OP_REL 7 48 | #define OP_GEN 8 49 | #define OP_DGEN 9 50 | #define OP_PROTECTED 0 51 | 52 | /* no derivates yet */ 53 | #define CPU_ALL (-1) 54 | 55 | typedef struct { 56 | unsigned int opcode; 57 | unsigned int encoding; 58 | } mnemonic_extension; 59 | -------------------------------------------------------------------------------- /cpus/qnice/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand",ERROR, 2 | "word register expected",ERROR, 3 | "",ERROR, 4 | "value does not find in %d bits",WARNING, 5 | "data size not supported",ERROR, 6 | 7 | -------------------------------------------------------------------------------- /cpus/qnice/opcodes.h: -------------------------------------------------------------------------------- 1 | "move",OP_GEN,OP_DGEN,0,0, 2 | "add",OP_GEN,OP_DGEN,1,0, 3 | "addc",OP_GEN,OP_DGEN,2,0, 4 | "sub",OP_GEN,OP_DGEN,3,0, 5 | "subc",OP_GEN,OP_DGEN,4,0, 6 | "shl",OP_GEN,OP_DGEN,5,0, 7 | "shr",OP_GEN,OP_DGEN,6,0, 8 | "swap",OP_GEN,OP_DGEN,7,0, 9 | "not",OP_GEN,OP_DGEN,8,0, 10 | "and",OP_GEN,OP_DGEN,9,0, 11 | "or",OP_GEN,OP_DGEN,10,0, 12 | "xor",OP_GEN,OP_DGEN,11,0, 13 | "cmp",OP_GEN,OP_GEN,12,0, 14 | "halt",0,0,14,0, 15 | "rti",0,0,14,(1<<2)+1, 16 | "int",OP_GEN,0,14,(2<<2)+1, 17 | "incrb",0,0,14,(3<<2)+1, 18 | "decrb",0,0,14,(4<<2)+1, 19 | "abra",OP_GEN,OP_CC,15,1, 20 | "asub",OP_GEN,OP_CC,15,2, 21 | "rbra",OP_REL,OP_CC,15,3, 22 | "rsub",OP_REL,OP_CC,15,4, 23 | -------------------------------------------------------------------------------- /cpus/test/cpu.h: -------------------------------------------------------------------------------- 1 | /* cpu.h example cpu-description header-file */ 2 | /* (c) in 2002 by Volker Barthelmann */ 3 | 4 | #define LITTLEENDIAN 1 5 | #define BIGENDIAN 0 6 | #define VASM_CPU_TEST 1 7 | 8 | /* maximum number of operands in one mnemonic */ 9 | #define MAX_OPERANDS 2 10 | 11 | /* maximum number of mnemonic-qualifiers per mnemonic */ 12 | #define MAX_QUALIFIERS 1 13 | 14 | /* maximum number of additional command-line-flags for this cpu */ 15 | 16 | /* data type to represent a target-address */ 17 | typedef int32_t taddr; 18 | typedef uint32_t utaddr; 19 | 20 | /* minimum instruction alignment */ 21 | #define INST_ALIGN 2 22 | 23 | /* default alignment for n-bit data */ 24 | #define DATA_ALIGN(n) ((n)<=8?1:2) 25 | 26 | /* operand class for n-bit data definitions */ 27 | #define DATA_OPERAND(n) OP_ABS 28 | 29 | /* type to store each operand */ 30 | typedef struct { 31 | int type; 32 | int basereg; 33 | expr *offset; 34 | } operand; 35 | 36 | /* operand-types (stupid example) */ 37 | #define OP_IMM32 1 38 | #define OP_REG 2 39 | #define OP_ABS 3 40 | #define OP_REGIND 4 41 | /* supersets of other operands */ 42 | #define OP_MEM 100 43 | #define OP_ALL 200 44 | #define OP_ALL_DEST 300 45 | 46 | #define OP_ISMEM(x) ((x)==OP_ABS||(x)==OP_REGIND) 47 | 48 | #define CPU_SMALL 1 49 | #define CPU_LARGE 2 50 | #define CPU_ALL (-1) 51 | 52 | typedef struct { 53 | unsigned int available; 54 | unsigned int opcode; 55 | } mnemonic_extension; 56 | -------------------------------------------------------------------------------- /cpus/test/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand",ERROR, 2 | "illegal qualifier <%s>",ERROR, 3 | "data size not supported",ERROR, 4 | -------------------------------------------------------------------------------- /cpus/tr3200/cpu.h: -------------------------------------------------------------------------------- 1 | /* cpu.h TR3200 cpu-description header-file */ 2 | /* (c) in 2014 by Luis Panadero Guardeno */ 3 | 4 | #define LITTLEENDIAN 1 5 | #define BIGENDIAN 0 6 | #define VASM_CPU_TR3200 1 7 | 8 | /* maximum number of operands in one mnemonic */ 9 | #define MAX_OPERANDS 3 10 | 11 | /* maximum number of mnemonic-qualifiers per mnemonic */ 12 | #define MAX_QUALIFIERS 0 13 | 14 | /* maximum number of additional command-line-flags for this cpu */ 15 | 16 | /* data type to represent a target-address */ 17 | typedef int32_t taddr; 18 | typedef uint32_t utaddr; 19 | 20 | /* minimum instruction alignment */ 21 | #define INST_ALIGN 4 22 | 23 | /* default alignment for n-bit data */ 24 | #define DATA_ALIGN(n) ((n)<=8 ? 1 : ((n)<=16 ? 2 : 4)) 25 | 26 | 27 | /* type to store each operand */ 28 | typedef struct { 29 | int16_t type; /* type of operand from mnemonic.operand_type */ 30 | uint8_t reg; /* Register number if there is one */ 31 | expr *value; /* single register, immed. val. or branch loc.*/ 32 | } operand; 33 | 34 | /* operand types */ 35 | #define NO_OP (0) 36 | #define OP_GPR (1) /* %r0 to %r15 or %y, %bp %sp, %ia %flags */ 37 | #define OP_IMM (2) 38 | 39 | /* operand class for n-bit data definitions */ 40 | #define DATA_OPERAND(n) OP_IMM 41 | 42 | #define CPU_ALL (-1) 43 | 44 | typedef struct { 45 | unsigned char opcode; /* OpCode */ 46 | unsigned char rn_pos; /* Position of Rn */ 47 | unsigned char available; /* CPU variants were is available */ 48 | } mnemonic_extension; 49 | -------------------------------------------------------------------------------- /cpus/tr3200/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand",ERROR, 2 | "illegal qualifier <%s>",ERROR, 3 | "data size not supported",ERROR, 4 | -------------------------------------------------------------------------------- /cpus/vidcore/cpu.h: -------------------------------------------------------------------------------- 1 | /* cpu.h VideoCore IV cpu-description header-file */ 2 | /* (c) in 2013 by Volker Barthelmann */ 3 | 4 | 5 | /* maximum number of operands in one mnemonic */ 6 | #define MAX_OPERANDS 4 7 | 8 | /* maximum number of mnemonic-qualifiers per mnemonic */ 9 | #define MAX_QUALIFIERS 2 10 | 11 | /* maximum number of additional command-line-flags for this cpu */ 12 | 13 | /* data type to represent a target-address */ 14 | typedef int32_t taddr; 15 | typedef uint32_t utaddr; 16 | 17 | #define LITTLEENDIAN 1 18 | #define BIGENDIAN 0 19 | #define VASM_CPU_VC4 1 20 | 21 | /* minimum instruction alignment */ 22 | #define INST_ALIGN 2 23 | 24 | /* default alignment for n-bit data */ 25 | #define DATA_ALIGN(n) ((n)<=8?1:(n<=16?2:4)) 26 | 27 | /* operand class for n-bit data definitions */ 28 | #define DATA_OPERAND(n) OP_ABS 29 | 30 | #define cc reg 31 | 32 | /* type to store each operand */ 33 | typedef struct { 34 | int type; 35 | int reg; 36 | int dreg; 37 | long vecmod; 38 | expr *offset; 39 | } operand; 40 | 41 | /* vecmod: 42 | 0-15: f_i or add-reg for vload/vstore 43 | 16-18: rep 44 | 20: setf 45 | 46 | for 80-bit 'A' registers, 'dreg' is formatted as 47 | 0-5: flags 48 | 6-9: ra_x 49 | */ 50 | 51 | /* operand-types */ 52 | enum { 53 | OP_REG=1, 54 | OP_SREG, 55 | OP_PC, 56 | OP_LR, 57 | OP_MREG, 58 | OP_VREG, 59 | OP_VREGA80, 60 | OP_VREGM, 61 | OP_VREGMM, 62 | OP_ABS, 63 | OP_REL, 64 | OP_IMM4, 65 | OP_IMM5, 66 | OP_IMM6, 67 | OP_IMM32M, 68 | OP_IMM32, 69 | OP_REGIND, 70 | OP_IMMINDPC, 71 | OP_IMMINDSP, 72 | OP_IMMINDSD, 73 | OP_IMMINDR0, 74 | OP_IMMINDS, 75 | OP_IMMIND, 76 | OP_PREDEC, 77 | OP_POSTINC, 78 | OP_IND, 79 | OP_VIND, 80 | OP_DISP5, 81 | OP_DISP12, 82 | OP_DISP16, 83 | OP_DISP27 84 | }; 85 | 86 | 87 | #define CPU_VC4 1 88 | #define CPU_ALL (-1) 89 | 90 | enum { 91 | EN_ARITHR16, 92 | EN_ARITHI16, 93 | EN_FIX16, 94 | EN_LEA16, 95 | EN_IBRANCH16, 96 | EN_RBRANCH16, 97 | EN_TABLE16, 98 | EN_MREG16, 99 | EN_MEMSTACK16, 100 | EN_MEMREG16, 101 | EN_MEMDISP16, 102 | EN_CONDR32, 103 | EN_CONDI32, 104 | EN_RBRANCH32, 105 | EN_ADDCMPB32, 106 | EN_MEMREG32, 107 | EN_MEMDISP32, 108 | EN_MEMPREDEC, 109 | EN_MEMPOSTINC, 110 | EN_MEM12DISP32, 111 | EN_MEM16DISP32, 112 | EN_FUNARY32, 113 | EN_ARITHR32, 114 | EN_ARITHI32, 115 | EN_LEA48, 116 | EN_MEM48, 117 | EN_ARITHI48, 118 | EN_ADD48, 119 | EN_VLOAD48, 120 | EN_VSTORE48, 121 | EN_VREAD48, 122 | EN_VWRITE48, 123 | EN_VREADI48, 124 | EN_VWRITEI48, 125 | EN_VARITHR48, 126 | EN_VARITHI48, 127 | EN_ADDCMPB64, 128 | EN_VLOAD80, 129 | EN_VSTORE80, 130 | EN_VREAD80, 131 | EN_VWRITE80, 132 | EN_VREADI80, 133 | EN_VWRITEI80, 134 | EN_VARITHR80, 135 | EN_VARITHI80 136 | }; 137 | 138 | typedef struct { 139 | unsigned int encoding; 140 | unsigned int code; 141 | unsigned int available; 142 | } mnemonic_extension; 143 | -------------------------------------------------------------------------------- /cpus/vidcore/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand",ERROR, 2 | "value does not find in %d bits",WARNING, 3 | "data size not supported",ERROR, 4 | "condition not allowed here",ERROR, 5 | "Invalid increment",ERROR, 6 | -------------------------------------------------------------------------------- /cpus/x86/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "instruction not supported on selected architecture",ERROR, 2 | "trailing garbage in operand",WARNING, 3 | "same type of prefix used twice",WARNING, 4 | "immediate operand illegal with absolute jump",ERROR, 5 | "base register expected",ERROR, 6 | "scale factor without index register",ERROR, /* 5 */ 7 | "missing ')' in baseindex addressing mode",ERROR, 8 | "redundant %s prefix ignored",WARNING, 9 | "unknown register specified",ERROR, 10 | "using register %%%s instead of %%%s due to '%c' suffix",WARNING, 11 | "%%%s not allowed with '%c' suffix",ERROR, /* 10 */ 12 | "illegal suffix '%c'",ERROR, 13 | "instruction has no suffix and no register operands - size is unknown",ERROR, 14 | "UNUSED",ERROR, 15 | "memory operand expected",ERROR, 16 | "you cannot pop %%%s",ERROR, /* 15 */ 17 | "translating to %s %%%s,%%%s",WARNING, 18 | "translating to %s %%%s",WARNING, 19 | "absolute scale factor required",ERROR, 20 | "illegal scale factor (valid: 1,2,4,8)",ERROR, 21 | "data objects with %d bits size are not supported",ERROR, /* 20 */ 22 | "need at least %d bits for a relocatable symbol",ERROR, 23 | "pc-relative jump destination out of range (%lld)",ERROR, 24 | "instruction doesn't support these operand sizes",ERROR, 25 | "cannot determine immediate operand size without a suffix",ERROR, 26 | "displacement doesn't fit into %d bits",ERROR, /* 25 */ 27 | -------------------------------------------------------------------------------- /cpus/x86/registers.h: -------------------------------------------------------------------------------- 1 | {"st", FloatReg|FloatAcc, 0, 0}, 2 | /* 8 bit regs */ 3 | #define AL_INDEX 1 4 | {"al", Reg8|Acc, 0, 0}, 5 | {"cl", Reg8|ShiftCntReg, 0, 1}, 6 | {"dl", Reg8, 0, 2}, 7 | {"bl", Reg8, 0, 3}, 8 | {"ah", Reg8, 0, 4}, 9 | {"ch", Reg8, 0, 5}, 10 | {"dh", Reg8, 0, 6}, 11 | {"bh", Reg8, 0, 7}, 12 | {"axl", Reg8|Acc, RegRex64, 0}, 13 | {"cxl", Reg8, RegRex64, 1}, 14 | {"dxl", Reg8, RegRex64, 2}, 15 | {"bxl", Reg8, RegRex64, 3}, 16 | {"spl", Reg8, RegRex64, 4}, 17 | {"bpl", Reg8, RegRex64, 5}, 18 | {"sil", Reg8, RegRex64, 6}, 19 | {"dil", Reg8, RegRex64, 7}, 20 | {"r8b", Reg8, RegRex64|RegRex, 0}, 21 | {"r9b", Reg8, RegRex64|RegRex, 1}, 22 | {"r10b", Reg8, RegRex64|RegRex, 2}, 23 | {"r11b", Reg8, RegRex64|RegRex, 3}, 24 | {"r12b", Reg8, RegRex64|RegRex, 4}, 25 | {"r13b", Reg8, RegRex64|RegRex, 5}, 26 | {"r14b", Reg8, RegRex64|RegRex, 6}, 27 | {"r15b", Reg8, RegRex64|RegRex, 7}, 28 | /* 16 bit regs */ 29 | #define AX_INDEX 25 30 | {"ax", Reg16|Acc, 0, 0}, 31 | {"cx", Reg16, 0, 1}, 32 | {"dx", Reg16|IOPortReg, 0, 2}, 33 | {"bx", Reg16|BaseIndex, 0, 3}, 34 | {"sp", Reg16, 0, 4}, 35 | {"bp", Reg16|BaseIndex, 0, 5}, 36 | {"si", Reg16|BaseIndex, 0, 6}, 37 | {"di", Reg16|BaseIndex, 0, 7}, 38 | {"r8w", Reg16, RegRex, 0}, 39 | {"r9w", Reg16, RegRex, 1}, 40 | {"r10w", Reg16, RegRex, 2}, 41 | {"r11w", Reg16, RegRex, 3}, 42 | {"r12w", Reg16, RegRex, 4}, 43 | {"r13w", Reg16, RegRex, 5}, 44 | {"r14w", Reg16, RegRex, 6}, 45 | {"r15w", Reg16, RegRex, 7}, 46 | /* 32 bit regs */ 47 | #define EAX_INDEX 41 48 | {"eax", Reg32|BaseIndex|Acc, 0, 0}, 49 | {"ecx", Reg32|BaseIndex, 0, 1}, 50 | {"edx", Reg32|BaseIndex, 0, 2}, 51 | {"ebx", Reg32|BaseIndex, 0, 3}, 52 | {"esp", Reg32, 0, 4}, 53 | {"ebp", Reg32|BaseIndex, 0, 5}, 54 | {"esi", Reg32|BaseIndex, 0, 6}, 55 | {"edi", Reg32|BaseIndex, 0, 7}, 56 | {"r8d", Reg32|BaseIndex, RegRex, 0}, 57 | {"r9d", Reg32|BaseIndex, RegRex, 1}, 58 | {"r10d", Reg32|BaseIndex, RegRex, 2}, 59 | {"r11d", Reg32|BaseIndex, RegRex, 3}, 60 | {"r12d", Reg32|BaseIndex, RegRex, 4}, 61 | {"r13d", Reg32|BaseIndex, RegRex, 5}, 62 | {"r14d", Reg32|BaseIndex, RegRex, 6}, 63 | {"r15d", Reg32|BaseIndex, RegRex, 7}, 64 | {"rax", Reg64|BaseIndex|Acc, 0, 0}, 65 | {"rcx", Reg64|BaseIndex, 0, 1}, 66 | {"rdx", Reg64|BaseIndex, 0, 2}, 67 | {"rbx", Reg64|BaseIndex, 0, 3}, 68 | {"rsp", Reg64, 0, 4}, 69 | {"rbp", Reg64|BaseIndex, 0, 5}, 70 | {"rsi", Reg64|BaseIndex, 0, 6}, 71 | {"rdi", Reg64|BaseIndex, 0, 7}, 72 | {"r8", Reg64|BaseIndex, RegRex, 0}, 73 | {"r9", Reg64|BaseIndex, RegRex, 1}, 74 | {"r10", Reg64|BaseIndex, RegRex, 2}, 75 | {"r11", Reg64|BaseIndex, RegRex, 3}, 76 | {"r12", Reg64|BaseIndex, RegRex, 4}, 77 | {"r13", Reg64|BaseIndex, RegRex, 5}, 78 | {"r14", Reg64|BaseIndex, RegRex, 6}, 79 | {"r15", Reg64|BaseIndex, RegRex, 7}, 80 | /* segment registers */ 81 | {"es", SegReg2, 0, 0}, 82 | {"cs", SegReg2, 0, 1}, 83 | {"ss", SegReg2, 0, 2}, 84 | {"ds", SegReg2, 0, 3}, 85 | {"fs", SegReg3, 0, 4}, 86 | {"gs", SegReg3, 0, 5}, 87 | /* control registers */ 88 | {"cr0", CtrlReg, 0, 0}, 89 | {"cr1", CtrlReg, 0, 1}, 90 | {"cr2", CtrlReg, 0, 2}, 91 | {"cr3", CtrlReg, 0, 3}, 92 | {"cr4", CtrlReg, 0, 4}, 93 | {"cr5", CtrlReg, 0, 5}, 94 | {"cr6", CtrlReg, 0, 6}, 95 | {"cr7", CtrlReg, 0, 7}, 96 | {"cr8", CtrlReg, RegRex, 0}, 97 | {"cr9", CtrlReg, RegRex, 1}, 98 | {"cr10", CtrlReg, RegRex, 2}, 99 | {"cr11", CtrlReg, RegRex, 3}, 100 | {"cr12", CtrlReg, RegRex, 4}, 101 | {"cr13", CtrlReg, RegRex, 5}, 102 | {"cr14", CtrlReg, RegRex, 6}, 103 | {"cr15", CtrlReg, RegRex, 7}, 104 | /* debug registers */ 105 | {"db0", DebugReg, 0, 0}, 106 | {"db1", DebugReg, 0, 1}, 107 | {"db2", DebugReg, 0, 2}, 108 | {"db3", DebugReg, 0, 3}, 109 | {"db4", DebugReg, 0, 4}, 110 | {"db5", DebugReg, 0, 5}, 111 | {"db6", DebugReg, 0, 6}, 112 | {"db7", DebugReg, 0, 7}, 113 | {"db8", DebugReg, RegRex, 0}, 114 | {"db9", DebugReg, RegRex, 1}, 115 | {"db10", DebugReg, RegRex, 2}, 116 | {"db11", DebugReg, RegRex, 3}, 117 | {"db12", DebugReg, RegRex, 4}, 118 | {"db13", DebugReg, RegRex, 5}, 119 | {"db14", DebugReg, RegRex, 6}, 120 | {"db15", DebugReg, RegRex, 7}, 121 | {"dr0", DebugReg, 0, 0}, 122 | {"dr1", DebugReg, 0, 1}, 123 | {"dr2", DebugReg, 0, 2}, 124 | {"dr3", DebugReg, 0, 3}, 125 | {"dr4", DebugReg, 0, 4}, 126 | {"dr5", DebugReg, 0, 5}, 127 | {"dr6", DebugReg, 0, 6}, 128 | {"dr7", DebugReg, 0, 7}, 129 | {"dr8", DebugReg, RegRex, 0}, 130 | {"dr9", DebugReg, RegRex, 1}, 131 | {"dr10", DebugReg, RegRex, 2}, 132 | {"dr11", DebugReg, RegRex, 3}, 133 | {"dr12", DebugReg, RegRex, 4}, 134 | {"dr13", DebugReg, RegRex, 5}, 135 | {"dr14", DebugReg, RegRex, 6}, 136 | {"dr15", DebugReg, RegRex, 7}, 137 | /* test registers */ 138 | {"tr0", TestReg, 0, 0}, 139 | {"tr1", TestReg, 0, 1}, 140 | {"tr2", TestReg, 0, 2}, 141 | {"tr3", TestReg, 0, 3}, 142 | {"tr4", TestReg, 0, 4}, 143 | {"tr5", TestReg, 0, 5}, 144 | {"tr6", TestReg, 0, 6}, 145 | {"tr7", TestReg, 0, 7}, 146 | /* mmx and simd registers */ 147 | {"mm0", MMXReg, 0, 0}, 148 | {"mm1", MMXReg, 0, 1}, 149 | {"mm2", MMXReg, 0, 2}, 150 | {"mm3", MMXReg, 0, 3}, 151 | {"mm4", MMXReg, 0, 4}, 152 | {"mm5", MMXReg, 0, 5}, 153 | {"mm6", MMXReg, 0, 6}, 154 | {"mm7", MMXReg, 0, 7}, 155 | {"xmm0", XMMReg, 0, 0}, 156 | {"xmm1", XMMReg, 0, 1}, 157 | {"xmm2", XMMReg, 0, 2}, 158 | {"xmm3", XMMReg, 0, 3}, 159 | {"xmm4", XMMReg, 0, 4}, 160 | {"xmm5", XMMReg, 0, 5}, 161 | {"xmm6", XMMReg, 0, 6}, 162 | {"xmm7", XMMReg, 0, 7}, 163 | {"xmm8", XMMReg, RegRex, 0}, 164 | {"xmm9", XMMReg, RegRex, 1}, 165 | {"xmm10", XMMReg, RegRex, 2}, 166 | {"xmm11", XMMReg, RegRex, 3}, 167 | {"xmm12", XMMReg, RegRex, 4}, 168 | {"xmm13", XMMReg, RegRex, 5}, 169 | {"xmm14", XMMReg, RegRex, 6}, 170 | {"xmm15", XMMReg, RegRex, 7}, 171 | {"st(0)", FloatReg|FloatAcc, 0, 0}, 172 | {"st(1)", FloatReg, 0, 1}, 173 | {"st(2)", FloatReg, 0, 2}, 174 | {"st(3)", FloatReg, 0, 3}, 175 | {"st(4)", FloatReg, 0, 4}, 176 | {"st(5)", FloatReg, 0, 5}, 177 | {"st(6)", FloatReg, 0, 6}, 178 | {"st(7)", FloatReg, 0, 7}, 179 | {"rip", BaseIndex, 0, 0}, 180 | {NULL, 0, 0, 0} 181 | -------------------------------------------------------------------------------- /cpus/z80/cpu_errors.h: -------------------------------------------------------------------------------- 1 | "trailing garbage in operand",WARNING, 2 | "Opcode not supported by %s (%s)",ERROR, 3 | "Index registers not available on %s",ERROR, 4 | "out of range for 8 bit expression (%d)",ERROR, 5 | "invalid bit number (%d) should be in range 0..7",ERROR, 6 | "rst value out of range (%d/0x%02x)",ERROR, /* 5 */ 7 | "%s value out of range (%d)",ERROR, 8 | "index offset should be a constant",ERROR, 9 | "invalid branch type for %s",ERROR, 10 | "Rabbit target doesn't support rst %d",ERROR, 11 | "Rabbit target doesn't support 8 bit index registers",ERROR, /* 10 */ 12 | "z180 target doesn't support 8 bit index registers",ERROR, 13 | "altd specifier cannot be used with index registers",WARNING, 14 | "Opcode not supported by %s (%s) but it can be emulated (-rcmemu)",ERROR, 15 | "%s specifier is only valid for Rabbit processors",ERROR, 16 | "Only one of ioi and ioe can be specified at a time",ERROR, /* 15 */ 17 | "%s specifier is not valid for the opcode %s",ERROR, 18 | "%s specifier redundant for the opcode %s",WARNING, 19 | "%s specifier has no effect on the opcode %s",WARNING, 20 | "Operand value must evaluate to a constant for opcode %s",ERROR, 21 | "Unhandled operand type wanted 0x%x got 0x%x",ERROR, /* 20 */ 22 | "Missed matched index registers on %s",ERROR, 23 | "Only out (c),0 is supported for the opcode %s",ERROR, 24 | "Operations between different index registers are forbidden",ERROR, 25 | "Operations between ix/iy/hl are forbidden", ERROR, 26 | "Double indirection forbidden", ERROR, /* 25 */ 27 | "Instruction %s will be assembled as '%s'", WARNING, 28 | "index offset out of bounds (%d)",ERROR, 29 | -------------------------------------------------------------------------------- /doc/cpu_6800.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the backend for the Motorola 6800 2 | microprocessor family. 3 | 4 | @section Legal 5 | 6 | This module is written in 2013-2016,2021 by Esben Norby and Frank Wille 7 | and is covered by the vasm copyright without modifications. 8 | 9 | 10 | @section Additional options for this module 11 | 12 | This module provides the following additional options: 13 | 14 | @table @option 15 | @item -m6800 16 | Generate code for the 6800 CPU (default setting). 17 | @item -m6801 18 | Generate code for the 6801 CPU. 19 | @item -m68hc11 20 | Generate code for the 68HC11 CPU. 21 | @end table 22 | 23 | @section General 24 | 25 | This backend accepts 6800 family instructions for the following CPUs: 26 | 27 | @itemize 28 | 29 | @item 6800 code generation: 6800, 6802, 6808. 30 | @item 6801 code generation: 6801, 6803. 31 | @item 68HC11. 32 | 33 | @end itemize 34 | 35 | The 6804, 6805 and 68HC08 are not supported, they use a similar 36 | instruction set, but are not opcode compatible. 37 | 38 | The target address type is 16 bit. 39 | 40 | Instructions consist of one up to five bytes and require no alignment. 41 | There is also no alignment requirement for sections and data. 42 | 43 | @section Extensions 44 | 45 | This backend provides the following specific extensions: 46 | 47 | @itemize @minus 48 | 49 | @item When an instruction supports direct and extended addressing mode 50 | the @code{<} character can be used to force direct mode and the 51 | @code{>} character forces extended mode. Otherwise the assembler selects 52 | the best mode automatically, which defaults to extended mode for external 53 | symbols. 54 | 55 | @item When applying the operation @code{/256}, @code{%256} or @code{&256} 56 | on a label, an appropriate lo/hi-byte relocation will automatically be 57 | generated. 58 | 59 | @end itemize 60 | 61 | @section Optimizations 62 | 63 | None. 64 | 65 | @section Known Problems 66 | 67 | Some known problems of this module at the moment: 68 | 69 | @itemize @minus 70 | 71 | @item None? 72 | 73 | @end itemize 74 | 75 | @section Error Messages 76 | 77 | This module has the following error messages: 78 | 79 | @itemize @minus 80 | 81 | @item 2001: trailing garbage in operand 82 | @item 2002: data size %d not supported 83 | @item 2003: operand doesn't fit into 8-bits 84 | @item 2004: branch destination out of range 85 | 86 | @end itemize 87 | -------------------------------------------------------------------------------- /doc/cpu_c16x.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the Backend for the c16x/st10 microcontroller family. 2 | 3 | Note that this module is not yet fully completed! 4 | 5 | @section Legal 6 | 7 | This module is written in 2002-2004 by Volker Barthelmann and 8 | is covered by the vasm copyright without modifications. 9 | 10 | 11 | @section Additional options for this module 12 | 13 | This module provides the following additional options: 14 | 15 | @table @option 16 | 17 | @item -no-translations 18 | Do not translate between jump instructions. 19 | If the offset of a @code{jmpr} 20 | instruction is too large, it will not be translated to 21 | @code{jmps} but an error will be emitted. 22 | 23 | Also, @code{jmpa} will not be optimized to @code{jmpr}. 24 | 25 | The pseudo-instruction @code{jmp} will still be translated. 26 | 27 | @item -jmpa 28 | A @code{jmp} or @code{jmpr} instruction that is translated due to 29 | its offset being larger than 8 bits will be translated to a 30 | @code{jmpa} rather than a @code{jmps}, if possible. 31 | 32 | @end table 33 | 34 | @section General 35 | 36 | This backend accepts c16x/st10 instructions as described in the 37 | Infineon instruction set manuals. 38 | 39 | The target address type is 32bit. 40 | 41 | Default alignment for sections and instructions is 2 bytes. 42 | 43 | @section Extensions 44 | 45 | This backend provides the following specific extensions: 46 | 47 | @itemize @minus 48 | 49 | @item 50 | There is a pseudo instruction @code{jmp} that will be translated 51 | either to a @code{jmpr} or @code{jmpa} instruction, depending on 52 | the offset. 53 | 54 | @item 55 | The @code{sfr} pseudo opcode can be used to declare special function 56 | registers. It has two, three of four arguments. The first argument 57 | is the identifier to be declared as special function register. 58 | The second argument is either the 16bit sfr address or its 8bit base 59 | address (0xfe for normal sfrs and 60 | 0xf0 for extended special function registers). In the latter case, 61 | the third argument is 62 | the 8bit sfr number. If another argument is given, it specifies the 63 | bit-number in the sfr (i.e. the declaration declares a single bit). 64 | 65 | Example: 66 | @example 67 | .sfr zeros,0xfe,0x8e 68 | @end example 69 | 70 | @item 71 | @code{SEG} and @code{SOF} can be used to obtain the segment or 72 | segment offset of a full address. 73 | Example: 74 | @example 75 | mov r3,#SEG farfunc 76 | @end example 77 | 78 | @end itemize 79 | 80 | @section Optimizations 81 | 82 | This backend performs the following optimizations: 83 | 84 | @itemize @minus 85 | 86 | @item 87 | @code{jmp} is translated to @code{jmpr}, if possible. Also, if 88 | @option{-no-translations} was not specified, @code{jmpr} and 89 | @code{jmpa} are translated. 90 | 91 | @item 92 | Relative jump instructions with an offset that does not fit into 93 | 8 bits are translated to a @code{jmps} instruction or an inverted 94 | jump around a @code{jmps} instruction. 95 | 96 | @item 97 | For instruction that have two forms @code{gpr,#IMM3/4} and 98 | @code{reg,#IMM16} the smaller form is used, if possible. 99 | 100 | @end itemize 101 | 102 | @section Known Problems 103 | 104 | Some known problems of this module at the moment: 105 | 106 | @itemize @minus 107 | 108 | @item Lots... 109 | 110 | @end itemize 111 | 112 | @section Error Messages 113 | 114 | This module has the following error messages: 115 | 116 | @itemize @minus 117 | @item 2001: illegal operand 118 | @item 2002: word register expected 119 | @item 2004: value does not find in %d bits 120 | @item 2005: data size not supported 121 | @item 2006: illegal use of SOF 122 | @item 2007: illegal use of SEG 123 | @item 2008: illegal use of DPP prefix 124 | @end itemize 125 | -------------------------------------------------------------------------------- /doc/cpu_jagrisc.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the backend for the Atari Jaguar GPU/DSP RISC processor. 2 | 3 | @section Legal 4 | 5 | This module is written in 2014-2017,2020,2021 by Frank Wille and 6 | is covered by the vasm copyright without modifications. 7 | 8 | 9 | @section Additional options for this module 10 | 11 | This module provides the following additional options: 12 | 13 | @table @option 14 | @item -big 15 | Output big-endian code and data (default). 16 | 17 | @item -little 18 | Output little-endian code and data. 19 | 20 | @item -many 21 | Generate code for GPU or DSP RISC. All instructions are accepted 22 | (default). 23 | 24 | @item -mdsp 25 | @itemx -mjerry 26 | Generate code for the DSP RISC (part of Jerry). 27 | 28 | @item -mgpu 29 | @itemx -mtom 30 | Generate code for the GPU RISC (part of Tom). 31 | 32 | @end table 33 | 34 | 35 | @section General 36 | 37 | This backend accepts RISC instructions for the GPU or DSP in Atari's 38 | Jaguar custom chip set according to the "Jaguar Technical Reference Manual 39 | for Tom & Jerry", Revision 8. Documentation bugs were fixed by using 40 | various sources on the net. 41 | 42 | The target address type is 32 bits. 43 | 44 | Default alignment for instructions is 2 bytes. 45 | Data is aligned to its natural alignment by default. 46 | 47 | 48 | @section Optimizations 49 | 50 | This backend performs the following optimizations and translations for 51 | the GPU/DSP RISC instruction set: 52 | 53 | @itemize @minus 54 | 55 | @item @code{load (Rn+0),Rm} is optimized to @code{load (Rn),Rm}. 56 | 57 | @item @code{store Rn,(Rm+0)} is optimized to @code{store Rn,(Rm)}. 58 | 59 | @end itemize 60 | 61 | 62 | @section Extensions 63 | 64 | This backend extends the selected syntax module by the following 65 | directives (note that a leading dot is optional): 66 | 67 | @table @code 68 | @item ccdef 69 | Allows defining a symbol for the condition codes used in @code{jump} 70 | and @code{jr} instructions. Must be constant number in the range of 71 | 0 to 31 or another condition code symbol. 72 | 73 | @item ccundef 74 | Undefine a condition code symbol previously defined via @code{ccdef}. 75 | 76 | @item dsp 77 | Select DSP instruction set. 78 | 79 | @item equr 80 | Define a new symbol named and assign the address register 81 | @code{Rn} to it. may also be another register symbol. 82 | Note that a register symbol must be defined before it can be used. 83 | 84 | @item equrundef 85 | Undefine a register symbol previously defined via @code{equr}. 86 | 87 | @item gpu 88 | Select GPU instruction set. 89 | 90 | @item regequ 91 | Equivalent to @code{equr}. 92 | 93 | @item regundef 94 | Undefine a register symbol previously defined via @code{regequ}. 95 | 96 | @end table 97 | 98 | All directives may be optionally preceded by a dot (@code{.}), for 99 | compatibility with various syntax modules. 100 | 101 | 102 | @section Known Problems 103 | 104 | Some known problems of this module at the moment: 105 | 106 | @itemize @minus 107 | 108 | @item Encoding of @code{MOVEI} instruction in little-endian mode is unknown. 109 | @item The developer has to provide the necessary @code{NOP} instructions 110 | after jumps, or @code{OR} instructions to work around hardware bugs, 111 | her/himself. 112 | 113 | @end itemize 114 | 115 | @section Error Messages 116 | 117 | This module has the following error messages: 118 | 119 | @itemize @minus 120 | 121 | @item 2001: data size %d not supported 122 | @item 2002: value from %ld to %ld required 123 | 124 | @end itemize 125 | -------------------------------------------------------------------------------- /doc/cpu_pdp11.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the backend for the PDP-11 CPU architecture. 2 | 3 | @section Legal 4 | This module is written in 2020 by Frank Wille 5 | and is covered by the vasm copyright without modifications. 6 | 7 | 8 | @section Additional options for this module 9 | 10 | This module provides the following additional options: 11 | 12 | @table @option 13 | @item -eis 14 | Enables the Extended Instruction Set option (EIS). 15 | @item -fis 16 | Enables the Floating point Instruction Set option (FIS). 17 | @item -msp 18 | Enables additional memory space instructions. 19 | @item -opt-branch 20 | Enables optimization of @code{jmp} instructions to @code{br} when 21 | possible and translates @code{br} instructions to @code{jmp} when 22 | required. 23 | It will also translate conditional branches, where the destination 24 | is out of range, into a @code{jmp} instruction and a negated 25 | conditional branch over this @code{jmp}. 26 | @end table 27 | 28 | @section General 29 | 30 | This backend accepts PDP-11 instructions as described in the 31 | PDP11/40 Processor Handbook, by Digital Equipment Corporation. 32 | 33 | The target address type is 16 bit. 34 | 35 | Instructions consist of two up to six bytes and required 16-bit alignment. 36 | Data, when not accessed as single bytes, also requires 16-bit alignment. 37 | 38 | @section Known Problems 39 | 40 | Some known problems of this module at the moment: 41 | 42 | @itemize @minus 43 | @item Doesn't support all PDP-11 extensions. 44 | @end itemize 45 | 46 | @section Error Messages 47 | 48 | This module has the following error messages: 49 | 50 | @itemize @minus 51 | 52 | @item 2001: bad addressing mode 53 | @item 2002: bad register 54 | @item 2003: pc-relative destination out of range: %ld (valid: %d..%d) 55 | @item 2004: bad trap code %ld (valid: %d..%d) 56 | @item 2005: displacement out of range: %ld 57 | @item 2006: immediate value out of range: %ld 58 | @item 2007: absolute address out of range: %ld 59 | @item 2008: data size %d not supported 60 | @item 2009: data expression doesn't fit into %d bits 61 | 62 | @end itemize 63 | -------------------------------------------------------------------------------- /doc/cpu_ppc.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the Backend for the PowerPC microprocessor family. 2 | 3 | @section Legal 4 | 5 | This module is written in 2002-2016 by Frank Wille and 6 | is covered by the vasm copyright without modifications. 7 | 8 | 9 | @section Additional options for this module 10 | 11 | This module provides the following additional options: 12 | 13 | @table @option 14 | 15 | @item -big 16 | Select big-endian mode. 17 | 18 | @item -little 19 | Select little-endian mode. 20 | 21 | @item -many 22 | Allow both, 32- and 64-bit instructions. 23 | 24 | @item -mavec, -maltivec 25 | Generate code for the Altivec unit. 26 | 27 | @item -mcom 28 | Allow only common PPC instructions. 29 | 30 | @item -m601 31 | Generate code for the PPC 601. 32 | 33 | @item -mppc32, -mppc, -m603, -m604 34 | Generate code for the 32-bit PowerPC 6xx family. 35 | 36 | @item -mppc64, -m620 37 | Generate code for the 64-bit PowerPC 600 family. 38 | 39 | @item -m7400, -m7410, -m7455 40 | Generate code for the 32-bit PowerPC 74xx (G4) family. 41 | 42 | @item -m7450 43 | Generate code for the 32-bit PowerPC 7450. 44 | 45 | @item -m403, -m405 46 | Generate code for the IBM/AMCC 32-bit embedded 40x family. 47 | 48 | @item -m440, -m460 49 | Generate code for the AMCC 32-bit embedded 440/460 family. 50 | 51 | @item -m821, -m850, -m860 52 | Generate code for the 32-bit MPC8xx PowerQUICC I family. 53 | 54 | @item -mbooke 55 | Generate code for the 32-bit Book-E architecture. 56 | 57 | @item -me300 58 | Generate code for the 32-bit e300 core (MPC51xx, MPC52xx, MPC83xx). 59 | 60 | @item -me500 61 | Generate code for the 32-bit e500 core (MPC85xx), including SPE, 62 | EFS and PMR. 63 | 64 | @item -mpwr 65 | Generate code for the POWER family. 66 | 67 | @item -mpwrx, -mpwr2 68 | Generate code for the POWER2 family. 69 | 70 | @item -no-regnames 71 | Don't predefine any register-name symbols. 72 | 73 | @item -opt-branch 74 | Enables translation of 16-bit branches into 75 | "B $+8 ; B label" sequences when destination is out of range. 76 | 77 | @item -sd2reg= 78 | Sets the 2nd small data base register to @code{Rn}. 79 | 80 | @item -sdreg= 81 | Sets small data base register to @code{Rn}. 82 | 83 | @end table 84 | The default setting is to generate code for a 32-bit PPC G2, G3, G4 CPU 85 | with Altivec support. 86 | 87 | @section General 88 | 89 | This backend accepts PowerPC instructions as described in the 90 | instruction set manuals from IBM, Motorola, Freescale and AMCC. 91 | 92 | The full instruction set of the following families is supported: 93 | POWER, POWER2, 40x, 44x, 46x, 60x, 620, 750, 74xx, 860, Book-E, 94 | e300 and e500. 95 | 96 | The target address type is 32 or 64 bits, depending on the selected 97 | CPU model. Floating point constants in instructions and data are 98 | supported and encoded in IEEE format. 99 | 100 | Default alignment for sections and instructions is 4 bytes. Data is 101 | aligned to its natural alignment by default. 102 | 103 | @section Extensions 104 | 105 | This backend provides the following specific extensions: 106 | 107 | @itemize @minus 108 | 109 | @item When not disabled by the option @code{-no-regnames}, the registers r0 - r31, 110 | f0 - f31, v0 - v31, cr0 - cr7, vrsave, sp, rtoc, fp, fpscr, xer, lr, ctr, 111 | and the symbols lt, gt, so and un will be predefined on startup and may 112 | be referenced by the program. 113 | 114 | @end itemize 115 | 116 | This backend extends the selected syntax module by the following 117 | directives: 118 | 119 | @table @code 120 | @item .sdreg 121 | Sets the small data base register to @code{Rn}. 122 | 123 | @item .sd2reg 124 | Sets the 2nd small data base register to @code{Rn}. 125 | 126 | @end table 127 | 128 | 129 | @section Optimizations 130 | 131 | This backend performs the following optimizations: 132 | 133 | @itemize @minus 134 | 135 | @item 16-bit branches, where the destination is out of range, are translated 136 | into @code{B $+8} and a 26-bit unconditional branch. 137 | 138 | @end itemize 139 | 140 | @section Known Problems 141 | 142 | Some known problems of this module at the moment: 143 | 144 | @itemize @minus 145 | 146 | @item No real differentiation between 403, 750, 860 instructions 147 | at the moment. 148 | @item There may still be some unsupported PPC models. 149 | 150 | @end itemize 151 | 152 | @section Error Messages 153 | 154 | This module has the following error messages: 155 | 156 | @itemize @minus 157 | @item 2002: instruction not supported on selected architecture 158 | @item 2003: constant integer expression required 159 | @item 2004: trailing garbage in operand 160 | @item 2005: illegal operand type 161 | @item 2006: missing closing parenthesis in load/store addressing mode 162 | @item 2007: relocation does not allow hi/lo modifier 163 | @item 2008: multiple relocation attributes 164 | @item 2009: multiple hi/lo modifiers 165 | @item 2010: data size %d not supported 166 | @item 2011: data has illegal type 167 | @item 2012: relocation attribute not supported by operand 168 | @item 2013: operand out of range: %ld (allowed: %ld to %ld) 169 | @item 2014: not a valid register (0-31) 170 | @item 2015: missing base register in load/store addressing mode 171 | @item 2016: missing mandatory operand 172 | @item 2017: ignoring fake operand 173 | @end itemize 174 | -------------------------------------------------------------------------------- /doc/cpu_tr3200.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the Backend for the TR3200 cpu. 2 | 3 | @section Legal 4 | 5 | This module is written in 2014 by Luis Panadero Guarde@~no and 6 | is covered by the vasm copyright without modifications. 7 | 8 | 9 | @section General 10 | 11 | This backend accepts TR3200 instructions as described in the 12 | @uref{https://github.com/trillek-team/trillek-computer, TR3200 specification} 13 | 14 | The target address type is 32 bits. 15 | 16 | Default alignment for sections is 4 bytes. Instructions alignment is 4 bytes. 17 | Data is aligned to its natural alignment by default, i.e. 2 byte wide data 18 | alignment is 2 bytes and 4 byte wide data alignment is 4 byte. 19 | 20 | The backend uses TR3200 syntax! This means the left operands are always the 21 | destination and the right operand is the source (except for single operand 22 | instructions). Register names have to be prefixed by a '@code{%}' 23 | (@code{%bp}, @code{%r0}, etc.) 24 | This means that it should accept WaveAsm assembly files if oldstyle syntax module 25 | is being used. The instructions are lowercase, @option{-dotdir} option is being used 26 | and directives are not in the first column. 27 | 28 | @section Extensions 29 | 30 | Predefined register symbols in this backend: 31 | 32 | @itemize @minus 33 | @item register by number: @code{r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15} 34 | @item special registers by name: @code{bp sp y ia flags} 35 | @end itemize 36 | 37 | @section Known Problems 38 | 39 | Some known problems of this module at the moment: 40 | 41 | @itemize @minus 42 | 43 | @item This module need to be fully checked, but has been tested building a full 44 | program that could be found here : @uref{https://github.com/Zardoz89/trillek-firmware} 45 | @item Instruction relocations are missing. 46 | 47 | @end itemize 48 | 49 | 50 | @section Error Messages 51 | 52 | This module has the following error messages: 53 | 54 | @itemize @minus 55 | @item 2001: illegal operand 56 | @item 2002: illegal qualifier <%s> 57 | @item 2003: data size not supported 58 | @end itemize 59 | 60 | @section Example 61 | 62 | It follows a little example to illustrate TR3200 assembly using 63 | the oldstyle syntax module (option @option{-dotdir} required): 64 | 65 | @example 66 | const .equ 0xBEBACAFE ; A constant 67 | an_addr .equ 0x100 ; Other constant 68 | 69 | ; ROM code 70 | .org 0x100000 71 | .text 72 | _start ; Label with or without a ending ":" 73 | mov %sp, 0x1000 ; Set the initial stack 74 | 75 | mov %r0, 0 76 | mov %r1, 0xA5 77 | mov %r2, 0 78 | storeb %r0, an_addr, %r1 79 | 80 | add %r0, %r2, %bp 81 | add %r0, %r2, 0 82 | add %r0, %r0, 10 83 | add %r0, %r0, 10h 84 | add %r0, %r0, 0x100010 85 | add %r0, %r0, (256 + 100) ; vasm parses math expressions 86 | 87 | mov %r2, 0 88 | mov %r3, 0x10200 89 | 90 | loadb %r6, 0x100200 91 | loadb %r1, %r2, 0x100200 92 | loadb %r1, %r2, %r3 93 | loadb %r4, var1 94 | 95 | push %r0 96 | .repeat 2 ; directives to repeat stuff! 97 | push const 98 | .endrepeat 99 | 100 | .repeat 2 101 | pop %r5 102 | .endrepeat 103 | pop %r0 104 | 105 | rcall foo ; Relative call/jump! 106 | sleep 107 | 108 | foo: ; Subrutine 109 | ifneq %r5, 0 110 | mul %r5, %r5, 2 111 | sub %r5, %r5, 1 112 | 113 | ret 114 | 115 | ; ROM data 116 | .org 0x100500 117 | var1 .db 0x20 ; A byte size variable 118 | .even ; Enforce to align to even address 119 | var3 .dw 0x1020 ; A word size variable 120 | var4 .dd 0x0A0B0C20 ; A double word size variable 121 | str1 .asciiz "Hello world!" ; ASCII string with null termination 122 | str2 .string "Hello world!" ; ASCII string with null termination 123 | .fill 5, 0xFF ; Fill 5 bytes with 0xFF 124 | .reserve 5 ; Reserves space for 5 byte 125 | 126 | @end example 127 | -------------------------------------------------------------------------------- /doc/cpu_x86.texi: -------------------------------------------------------------------------------- 1 | This chapter documents the Backend for the 80x86 microprocessor family. 2 | 3 | @section Legal 4 | 5 | This module is written in 2005-2006,2011,2015-2016 by Frank Wille and 6 | is covered by the vasm copyright without modifications. 7 | 8 | 9 | @section Additional options for this module 10 | 11 | This module provides the following additional options: 12 | 13 | @table @option 14 | 15 | @item -cpudebug= 16 | Enables debugging output. 17 | 18 | @item -m8086 19 | Generate code for the 8086 CPU. 20 | 21 | @item -mi186 22 | Generate code for the 80186 CPU. 23 | 24 | @item -mi286 25 | Generate code for the 80286 CPU. 26 | 27 | @item -mi386 28 | Generate code for the 80386 CPU. 29 | 30 | @item -mi486 31 | Generate code for the 80486 CPU. 32 | 33 | @item -mi586 34 | Generate code for the Pentium. 35 | 36 | @item -mi686 37 | Generate code for the PentiumPro. 38 | 39 | @item -mpentium 40 | Generate code for the Pentium. 41 | 42 | @item -mpentiumpro 43 | Generate code for the PentiumPro. 44 | 45 | @item -mk6 46 | Generate code for the AMD K6. 47 | 48 | @item -mathlon 49 | Generate code for the AMD Athlon. 50 | 51 | @item -msledgehammer 52 | Generate code for the Sledgehammer CPU. 53 | 54 | @item -m64 55 | Generate code for 64-bit architectures (x86_64). 56 | 57 | @end table 58 | 59 | @section General 60 | 61 | This backend accepts 80x86 instructions as described in the 62 | Intel Architecture Software Developer's Manual. 63 | 64 | The target address type is 32 bits. It is 64 bits when the x86_64 65 | architecture was selected (@option{-m64}). Floating point constants in 66 | instructions and data are supported and encoded in IEEE format. 67 | 68 | Instructions do not need any alignment. Data is aligned to its natural 69 | alignment by default. 70 | 71 | The backend uses MIT-syntax! This means the left operands are always the 72 | source and the right operand is the destination. Register names have to 73 | be prefixed by a '%'. 74 | 75 | The operation size is indicated by a 'b', 'w', 'l', etc. suffix directly 76 | appended to the mnemonic. The assembler can also determine the operation 77 | size from the size of the registers being used. 78 | 79 | @section Extensions 80 | 81 | Predefined register symbols in this backend: 82 | 83 | @itemize @minus 84 | @item 8-bit registers: @code{al cl dl bl ah ch dh bh axl cxl dxl spl bpl sil dil r8b r9b r10b r11b r12b r13b r14b r15b} 85 | @item 16-bit registers: @code{ax cx dx bx sp bp si di r8w r9w r10w r11w r12w r13w r14w r15w} 86 | @item 32-bit registers: @code{eax ecx edx ebx esp ebp esi edi r8d r9d r10d r11d r12d r13d r14d r15d} 87 | @item 64-bit registers: @code{rax rcx rdx rbx rsp ebp rsi rdi r8 r9 r10 r11 r12 r13 r14 r15} 88 | @item segment registers: @code{es cs ss ds fs gs} 89 | @item control registers: @code{cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7 cr8 cr9 cr10 cr11 cr12 cr13 cr14 cr15} 90 | @item debug registers: @code{dr0 dr1 dr2 dr3 dr4 dr5 dr6 dr7 dr8 dr9 dr10 dr11 dr12 dr13 dr14 dr15} 91 | @item test registers: @code{tr0 tr1 tr2 tr3 tr4 tr5 tr6 tr7} 92 | @item MMX and SIMD registers: @code{mm0 mm1 mm2 mm3 mm4 mm5 mm6 mm7 xmm0 xmm1 xmm2 xmm3 xmm4 xmm5 xmm6 xmm7 xmm8 xmm9 xmm10 xmm11 xmm12 xmm13 xmm14 xmm15} 93 | @item FPU registers: @code{st st(0) st(1) st(2) st(3) st(4) st(5) st(6) st(7)} 94 | @end itemize 95 | 96 | This backend extends the selected syntax module by the following 97 | directives: 98 | 99 | @table @code 100 | @item .code16 101 | Sets the assembler to 16-bit addressing mode. 102 | 103 | @item .code32 104 | Sets the assembler to 32-bit addressing mode, which is the default. 105 | 106 | @item .code64 107 | Sets the assembler to 64-bit addressing mode. 108 | 109 | @end table 110 | 111 | 112 | @section Optimizations 113 | 114 | This backend performs the following optimizations: 115 | 116 | @itemize @minus 117 | 118 | @item Immediate operands are optimized to the smallest size which can 119 | still represent the absolute value. 120 | 121 | @item Displacement operands are optimized to the smallest size which 122 | can still represent the absolute value. 123 | 124 | @item Jump instructions are optimized to 8-bit displacements, when possible. 125 | 126 | @end itemize 127 | 128 | @section Known Problems 129 | 130 | Some known problems of this module at the moment: 131 | 132 | @itemize @minus 133 | 134 | @item 64-bit operations are incomplete and experimental. 135 | 136 | @end itemize 137 | 138 | @section Error Messages 139 | 140 | This module has the following error messages: 141 | 142 | @itemize @minus 143 | @item 2001: instruction not supported on selected architecture 144 | @item 2002: trailing garbage in operand 145 | @item 2003: same type of prefix used twice 146 | @item 2004: immediate operand illegal with absolute jump 147 | @item 2005: base register expected 148 | @item 2006: scale factor without index register 149 | @item 2007: missing ')' in baseindex addressing mode 150 | @item 2008: redundant %s prefix ignored 151 | @item 2009: unknown register specified 152 | @item 2010: using register %%%s instead of %%%s due to '%c' suffix 153 | @item 2011: %%%s not allowed with '%c' suffix 154 | @item 2012: illegal suffix '%c' 155 | @item 2013: instruction has no suffix and no register operands - size is unknown 156 | @item 2015: memory operand expected 157 | @item 2016: you cannot pop %%%s 158 | @item 2017: translating to %s %%%s,%%%s 159 | @item 2018: translating to %s %%%s 160 | @item 2019: absolute scale factor required 161 | @item 2020: illegal scale factor (valid: 1,2,4,8) 162 | @item 2021: data objects with %d bits size are not supported 163 | @item 2022: need at least %d bits for a relocatable symbol 164 | @item 2023: pc-relative jump destination out of range (%lld) 165 | @item 2024: instruction doesn't support these operand sizes 166 | @item 2025: cannot determine immediate operand size without a suffix 167 | @item 2026: displacement doesn't fit into %d bits 168 | 169 | @end itemize 170 | -------------------------------------------------------------------------------- /doc/output_aout.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the a.out output module which can be 2 | selected with the @option{-Faout} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2008-2016,2020,2021 by Frank Wille and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | @table @option 12 | @item -mid= 13 | Sets the MID field of the a.out header to the specified value. 14 | The MID defaults to 2 (Sun020 big-endian) for M68k and to 100 15 | (PC386 little-endian) for x86. 16 | @end table 17 | 18 | @section General 19 | 20 | This output module emits the @code{a.out} (assembler output) 21 | format, which is an older 32-bit format for Unix-like operating systems, 22 | originally invented by AT&T. 23 | 24 | @section Restrictions 25 | 26 | The @code{a.out} output format, as implemented in vasm, currently supports 27 | the following architectures: 28 | 29 | @itemize @minus 30 | @item M68k 31 | @item i386 32 | @end itemize 33 | 34 | The following standard relocations are supported by default: 35 | @itemize @minus 36 | @item absolute, 8, 16, 32 bits 37 | @item pc-relative, 8, 16, 32 bits 38 | @item base-relative 39 | @end itemize 40 | 41 | Standard relocation table entries occupy 8 bytes and don't include an addend, 42 | so they are not suitable for most RISC CPUs. The extended relocations 43 | format occupies 12 bytes and also allows more relocation types. 44 | 45 | @section Known Problems 46 | 47 | Some known problems of this module at the moment: 48 | 49 | @itemize @minus 50 | @item The extended relocation format is not supported. 51 | @end itemize 52 | 53 | @section Error Messages 54 | 55 | This module has the following error messages: 56 | 57 | @itemize @minus 58 | @item 3004: section attributes not supported 59 | @item 3008: output module doesn't allow multiple sections of the same type 60 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 61 | @end itemize 62 | -------------------------------------------------------------------------------- /doc/output_bin.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the simple binary output module which can be 2 | selected with the @option{-Fbin} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2002-2023 by Volker Barthelmann and 7 | Frank Wille and is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | @table @option 12 | @item -apple-bin 13 | Writes an Apple DOS 3.3 binary file header preceding the output 14 | file, which consists of a 16-bit start/load address and a 16-bit 15 | file length in little-endian order. 16 | @item -atari-com 17 | Writes an Atari DOS COM header preceding the output file. It has 18 | a standard header (@code{0xFFFF}), which is followed by any 19 | number of sections. Each section starts with two little-endian 20 | words defining the address of the first and last byte in memory. 21 | @item -cbm-prg 22 | Writes a Commodore PRG header preceding the output file, which 23 | consists of two bytes in little-endian order, defining the load 24 | address of the program. 25 | @item -coco-ml 26 | Writes a Tandy Color Computer machine language file, which has 27 | a header with load address and length for each section and is 28 | terminated by a trailer with the execution address. 29 | @item -dragon-bin 30 | Writes a Dragon DOS header preceding the output file, where the 31 | file type is set to @code{$02} for binary. The load address is 32 | taken from the first section's start address. This will also be 33 | the execute-address, when not specified otherwise. Refer to 34 | option @option{-exec}. 35 | @item -exec= 36 | Use the given symbol @code{} as entry point of the program, 37 | for those output format headers which support it. Otherwise this 38 | option will be silently ignored. 39 | Omitting this option will usually define the execution address 40 | to be the same as the load address. 41 | @item -foenix-pgx 42 | Writes a simple, single-segment format for the 65816-based Foenix 43 | computers. The header defines the program's load address, which is 44 | also the start address. 45 | @item -foenix-pgz 46 | Write a multi-segment format for the 65816-based Foenix computers. 47 | The format is derived from binary format used by Western Design 48 | Center's C compiler. Every segment is stored with load address and 49 | size, and there is also a start address defined. 50 | @item -oric-mc 51 | Writes a machine code file header for Oric-1, Oric-Atmos and 52 | compatible systems. It includes the file type and name, as well as 53 | the first and last address of the program to load. Note, that the 54 | name defaults to the output file name, limited to 15 characters. 55 | A ".tap" extension will be removed automatically. 56 | @item -oric-mcx 57 | Same as @option{-oric-mc}, but sets the auto-execute flag in 58 | the header. 59 | @end table 60 | 61 | @section General 62 | 63 | This output module outputs the contents of all sections as simple 64 | binary data, by default without any header or additional information. 65 | When there are multiple sections, they must not overlap. Gaps between 66 | sections are filled with zero bytes, when not using a special header 67 | format, like Atari COM. Undefined symbols are not allowed. 68 | 69 | @section Known Problems 70 | 71 | Some known problems of this module at the moment: 72 | 73 | @itemize @minus 74 | 75 | @item None. 76 | 77 | @end itemize 78 | 79 | @section Error Messages 80 | 81 | This module has the following error messages: 82 | 83 | @itemize @minus 84 | @item 3001: sections must not overlap 85 | @item 3007: undefined symbol <%s> 86 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 87 | @end itemize 88 | -------------------------------------------------------------------------------- /doc/output_cdef.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the C #define output module which can be 2 | selected with the @option{-Fcdef} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2020 by Volker Barthelmann and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | There are currently no additional options for this output module. 12 | 13 | @section General 14 | 15 | This output module outputs the values of absolute symbols as a series of 16 | @code{#define} directives that can be included in a C compiler. No code is generated. 17 | 18 | @section Known Problems 19 | 20 | Some known problems of this module at the moment: 21 | 22 | @itemize @minus 23 | 24 | @item None. 25 | 26 | @end itemize 27 | 28 | @section Error Messages 29 | 30 | This module has no error messages: 31 | -------------------------------------------------------------------------------- /doc/output_elf.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the ELF output module which can be 2 | selected with the @option{-Felf} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2002-2016 by Frank Wille and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | @table @option 11 | @item -keepempty 12 | Do not delete empty sections without any symbol definition. 13 | @end table 14 | 15 | @section General 16 | 17 | This output module outputs the @code{ELF} (Executable and Linkable Format) 18 | format, which is a portable object file format and works for a variety 19 | of 32- and 64-bit operating systems. 20 | 21 | @section Restrictions 22 | 23 | The @code{ELF} output format, as implemented in vasm, currently supports 24 | the following architectures: 25 | 26 | @itemize @minus 27 | 28 | @item PowerPC 29 | @item M68k 30 | @item ARM 31 | @item i386 32 | @item x86_64 33 | @item Jaguar RISC 34 | 35 | @end itemize 36 | 37 | The supported relocation types depend on the selected architecture. 38 | 39 | @section Known Problems 40 | 41 | Some known problems of this module at the moment: 42 | 43 | @itemize @minus 44 | 45 | @item None. 46 | 47 | @end itemize 48 | 49 | @section Error Messages 50 | 51 | This module has the following error messages: 52 | 53 | @itemize @minus 54 | @item 3002: output module doesn't support cpu 55 | @item 3003: write error 56 | @item 3005: reloc type , size , mask (symbol + ) not supported 57 | @item 3006: reloc type not supported 58 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 59 | @end itemize 60 | -------------------------------------------------------------------------------- /doc/output_gst.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the gst output module which can be 2 | selected with the @option{-Fgst} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2023 by Frank Wille and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | None. 12 | 13 | @section General 14 | 15 | This module outputs the GST object file format by GST Software, which 16 | was used by several development tools on the Atari M68k computers. 17 | For example by the GST assembler and Devpac. 18 | 19 | @section Restrictions 20 | 21 | @itemize @minus 22 | @item Although there can be multiple sections, they don't have a type. 23 | @item Maximum size of section and symbol names is 255 characters. 24 | @item Only absolute, pc-relative and common-symbol relocations are 25 | supported at the moment. 26 | @item Possible relocation sizes are 8, 16 and 32 bits. 27 | @end itemize 28 | 29 | @section Known Problems 30 | 31 | Some known problems of this module at the moment: 32 | 33 | @itemize @minus 34 | @item Needs testing. 35 | @item Missing support for base-relative relocations. 36 | @end itemize 37 | 38 | @section Error Messages 39 | 40 | This module has the following error messages: 41 | 42 | @itemize @minus 43 | @item 3002: output module doesn't support cpu %s 44 | @item 3011: weak symbol <%s> not supported by output format, treating as global 45 | @item 3013: reloc type %d, mask 0x%lx to symbol %s + 0x%lx does not fit into %u bits 46 | @end itemize 47 | -------------------------------------------------------------------------------- /doc/output_hunk.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the AmigaOS hunk-format output module which can be 2 | selected with the @option{-Fhunk} option to generate objects and with the 3 | @option{-Fhunkexe} option to generate executable files. 4 | 5 | @section Legal 6 | 7 | This module is written in 2002-2022 by Frank Wille and 8 | is covered by the vasm copyright without modifications. 9 | 10 | @section Additional options for this module 11 | @table @option 12 | @item -hunkpad= 13 | Sets a two-byte code used for aligning a code hunk to the 14 | next 32-bit border. Defaults to 0x4e71 for M68k code sections, to 15 | allow linking of functions which extend over two object files. 16 | Otherwise it defaults to zero. 17 | @item -keepempty 18 | Do not delete empty sections without any symbol definition. 19 | @item -kick1hunks 20 | Use only those hunk types and external reference types which have 21 | been valid at the time of Kickstart 1.x for compatibility with 22 | old assembler sources and old linkers. For example: no longer 23 | differentiate between absolute and relative references. 24 | In executables it will prevent the assembler from using 25 | 16-bit relocation offsets in hunks and rejects 32-bit PC-relative 26 | relocations. 27 | @item -linedebug 28 | Automatically generate an SAS/C-compatible LINE DEBUG hunk for 29 | the input source. Overrides any line debugging directives from 30 | the source text. 31 | @end table 32 | 33 | These options are valid for the @code{hunkexe} module only: 34 | @table @option 35 | @item -databss 36 | Try to shorten sections in the output file by removing zero words 37 | without relocation from the end. This technique is only supported 38 | by AmigaOS 2.0 and higher. 39 | @end table 40 | 41 | @section General 42 | 43 | This output module outputs the @code{hunk} object (standard for @code{M68k} 44 | and extended for @code{PowerPC}) and @code{hunkexe} executable format, which 45 | is a proprietary file format used by AmigaOS and WarpOS. 46 | 47 | The @code{hunkexe} module will generate directly executable files, without 48 | the need for another linker run. But you have to make sure that there are 49 | no undefined symbols, common symbols, or unusual relocations (e.g. small 50 | data) left. 51 | 52 | It is allowed to define sections with the same name but different 53 | attributes. They will be regarded as different entities. 54 | 55 | 56 | @section Restrictions 57 | 58 | The @code{hunk}/@code{hunkexe} output format is only intended for @code{M68k} 59 | and @code{PowerPC} cpu modules and will abort when used otherwise. 60 | 61 | The @code{hunk} module supports the following relocation types: 62 | 63 | @itemize @minus 64 | 65 | @item absolute, 32-bit 66 | 67 | @item absolute, 16-bit 68 | 69 | @item absolute, 8-bit 70 | 71 | @item relative, 8-bit 72 | 73 | @item relative, 14-bit (mask 0xfffc) for PPC branch instructions. 74 | 75 | @item relative, 16-bit 76 | 77 | @item relative, 24-bit (mask 0x3fffffc) for PPC branch instructions. 78 | 79 | @item relative, 32-bit 80 | 81 | @item base-relative, 16-bit 82 | 83 | @item common symbols are supported as 32-bit absolute and relative 84 | references 85 | 86 | @end itemize 87 | 88 | The @code{hunkexe} module supports absolute 32-bit relocations only. 89 | 90 | @section Known Problems 91 | 92 | Some known problems of this module at the moment: 93 | 94 | @itemize @minus 95 | 96 | @item The @code{hunkexe} module won't process common symbols and allocate 97 | them in a @code{BSS} section. Use a real linker for that. 98 | 99 | @end itemize 100 | 101 | @section Error Messages 102 | 103 | This module has the following error messages: 104 | 105 | @itemize @minus 106 | @item 3001: multiple sections not supported by this format 107 | @item 3002: output module doesn't support cpu 108 | @item 3003: write error 109 | @item 3004: section attributes not supported 110 | @item 3005: reloc type , size , mask (symbol + ) not supported 111 | @item 3006: reloc type not supported 112 | @item 3009: undefined symbol <%s> at %s+0x%lx, reloc type %d 113 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 114 | @item 3011: weak symbol <%s> not supported by output format, treating as global 115 | @item 3014: data definition following a databss space directive 116 | @item 3016: absolute file path exceeds maximum size of %d characters 117 | @item 3017: converting NONE relocation <%s> to 8-bit ABS with zero addend 118 | @item 3018: no additional space in section to convert NONE relocation <%s> to ABS 119 | @item 3019: section <%s>: kickstart 1.x cannot initialize bss sections >256k to zero 120 | 121 | @end itemize 122 | -------------------------------------------------------------------------------- /doc/output_ihex.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the Intel Hex output module which can be 2 | selected with the @option{-Fihex} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2020 by Rida Dzhaafar and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | @table @option 12 | @item -crlf 13 | Enforce Carriage-Return and Line-Feed (@code{"\r\n"}) line 14 | endings. Default is to use the host's line endings. 15 | @item -i8hex 16 | Selects a format supporting 16-bit address space (default). 17 | @item -i16hex 18 | Selects a format supporting 20-bit address space. 19 | @item -i32hex 20 | Selects a format supporting 32-bit address space. 21 | @item -record-size= 22 | Sets the number of bytes per record to @code{n}. 23 | Defaults to 32 bytes. 24 | @end table 25 | 26 | @section General 27 | 28 | This output module outputs the contents of all sections in Intel hex 29 | format, which is a simple ASCII output of hexadecimal digits. 30 | 31 | @section Known Problems 32 | 33 | Some known problems of this module at the moment: 34 | 35 | @itemize @minus 36 | 37 | @item None? 38 | 39 | @end itemize 40 | 41 | @section Error Messages 42 | 43 | This module has the following error messages: 44 | 45 | @itemize @minus 46 | @item 3001: sections must not overlap 47 | @item 3002: output module doesn't support cpu %s 48 | @item 3007: undefined symbol <%s> 49 | @item 3012: address 0x%llx out of range for selected format 50 | @end itemize 51 | -------------------------------------------------------------------------------- /doc/output_o65.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the O65 binary relocation format V1.3 for the 6502 2 | family, as defined by Andre Fachat on 6502.org. 3 | Option @option{-Fo65} outputs object files suitable for another linker pass, 4 | while @option{-Fo65exe} outputs executable files for an O65 loader. The 5 | difference is just a flag which declares the file being an object, and 6 | vasm will make sure that the load-addresses of sections in an executable 7 | will be consecutive and do not overlay. 8 | 9 | @section Legal 10 | 11 | This module is written in 2021 by Frank Wille and 12 | is covered by the vasm copyright without modifications. 13 | 14 | @section Additional options for this module 15 | @table @option 16 | @item -bss= 17 | Sets a start address for the @code{bss} section. 18 | @item -data= 19 | Sets a start address for the @code{data} section. 20 | @item -fopts 21 | Enable informational header options, generated by the assembler: 22 | file name, assembler name and version, creation date. 23 | @item -foauthor= 24 | Write author's name to the header options. 25 | @item -foname= 26 | Write file name to the header options. Overwrites the real file 27 | name, which would be set by @option{-fopts}. 28 | @item -paged 29 | Make the output file use paged alignment and simplified paged 30 | relocations. 31 | @item -secalign= 32 | Set minimum alignment for all sections as number of least significant 33 | bits which have to be zero. @code{align} may be 0, 1, 2, 8. 34 | The default behaviour is to use the maximum alignment given by the 35 | input sections. 36 | @item -stack= 37 | Store required stack size in the header. 38 | @item -text= 39 | Sets a start address for the @code{text} section. 40 | @item -zero= 41 | Sets a start address for the @code{zero} (zero/direct page) section. 42 | @end table 43 | 44 | These options are valid for the @code{o65exe} module only: 45 | @table @option 46 | @item -bsszero 47 | Set a flag in the header which requests automatic clearing of the 48 | @code{bss} section. 49 | @end table 50 | 51 | 52 | @section General 53 | 54 | This output module outputs the @code{o65} object file and @code{o65exe} 55 | executable file format for 6502-family processors and the 65816. 56 | The processor type is determined by the selected CPU of the active backend 57 | and stored in the header. 58 | 59 | The @code{o65exe} module generates executable files for a o65-loader, 60 | which is present in some 6502 operating systems (e.g. Lunix, SMOS, OS/A65). 61 | Unresolved symbols are allowed in o65 object- and executable-files. 62 | In the latter case the o65-loader is responsible to resolve them. 63 | Common symbols, weak symbol and most relocation types, except absolute 64 | addresses, are not supported by o65. 65 | 66 | The o65 format recognizes four different sections by their attributes 67 | or name: 68 | @itemize @minus 69 | @item text, sections which have executable code and/or are not 70 | writable (@code{acrx}). 71 | @item data, sections which have initialized data and may be read and 72 | written (@code{adrw}). 73 | @item bss, sections which have uninitialized data and may be read and 74 | written (@code{aurw}). 75 | @item zero, sections which have uninitialized data, may be read 76 | and written, and do not have the string @code{"bss"} anywhere in 77 | their name (@code{aurw}). 78 | @end itemize 79 | 80 | Up to two absolute sections (@code{ORG} directive) can be stored in 81 | the @code{text} and @code{data} slots, in the order of occurrence. 82 | 83 | 84 | @section Restrictions 85 | 86 | Currently the @code{o65}/@code{o65exe} output module is only intended to 87 | work with the @code{6502} cpu module and will abort when used otherwise. 88 | 89 | It supports all relocation types defined by o65, which are: 90 | @itemize @minus 91 | @item 0x20: absolute, 8-bit value or low-byte of 16-bit address 92 | @item 0x40: absolute, 8-bit high-byte of 16-bit address 93 | @item 0x80: absolute, 16-bit address 94 | @item 0xa0: absolute, 8-bit segment-byte of 24-bit address 95 | @item 0xc0: absolute, 24-bit address 96 | @end itemize 97 | 98 | Common or weak symbols are not supported. 99 | 100 | 101 | @section Known Problems 102 | 103 | Some known problems of this module at the moment: 104 | 105 | @itemize @minus 106 | @item Needs a better way to set start addresses for the sections 107 | in the assembler. 108 | @end itemize 109 | 110 | 111 | @section Error Messages 112 | 113 | This module has the following error messages: 114 | 115 | @itemize @minus 116 | @item 3004: section attributes not supported 117 | @item 3008: output module doesn't allow multiple sections of the same type (%s) 118 | @item 3011: weak symbol <%s> not supported by output format, treating as global 119 | @item 3015: file option %d max size exceeded: %lu 120 | @end itemize 121 | -------------------------------------------------------------------------------- /doc/output_srec.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the Motorola srecord output module which can be 2 | selected with the @option{-Fsrec} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2015 by Joseph Zatarski and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | @table @option 12 | @item -crlf 13 | Enforce Carriage-Return and Line-Feed (@code{"\r\n"}) line 14 | endings. Default is to use the host's line endings. 15 | @item -exec[=] 16 | Use the given symbol as entry point of the program. 17 | This start address will be written into the trailer record, 18 | which is otherwise zero. 19 | When the symbol assignment is omitted, then the default symbol 20 | @code{start} will be used. 21 | @item -s19 22 | Writes S1 data records and S9 trailers with 16-bit addresses. 23 | @item -s28 24 | Writes S2 data records and S8 trailers with 24-bit addresses. 25 | @item -s37 26 | Writes S3 data records and S7 trailers with 32-bit addresses. 27 | This is the default setting. 28 | @end table 29 | 30 | @section General 31 | 32 | This output module outputs the contents of all sections in Motorola srecord 33 | format, which is a simple ASCII output of hexadecimal digits. Each record 34 | starts with '@code{S}' and a one-digit ID. It is followed by the data 35 | and terminated by a checksum and a newline character. 36 | Every section starts with a new header record. 37 | 38 | @section Known Problems 39 | 40 | Some known problems of this module at the moment: 41 | 42 | @itemize @minus 43 | 44 | @item A new header is written for every new section. This may cause 45 | compatibility issues. 46 | 47 | @end itemize 48 | 49 | @section Error Messages 50 | 51 | This module has the following error messages: 52 | 53 | @itemize @minus 54 | @item 3007: undefined symbol <%s> 55 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 56 | @item 3012: address 0x%llx out of range for selected format 57 | @end itemize 58 | -------------------------------------------------------------------------------- /doc/output_test.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the test output module which can be 2 | selected with the @option{-Ftest} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2002 by Volker Barthelmann and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | This output module provides no additional options. 12 | 13 | @section General 14 | 15 | This output module outputs a textual description of the contents of 16 | all sections. It is mainly intended for debugging. 17 | 18 | 19 | @section Restrictions 20 | 21 | None. 22 | 23 | @section Known Problems 24 | 25 | Some known problems of this module at the moment: 26 | 27 | @itemize @minus 28 | 29 | @item None. 30 | 31 | @end itemize 32 | 33 | @section Error Messages 34 | 35 | This module has the following error messages: 36 | @itemize @minus 37 | @item None. 38 | @end itemize 39 | -------------------------------------------------------------------------------- /doc/output_tos.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the TOS output module, which can be 2 | selected with option @option{-Ftos} to generate executable Atari TOS 3 | executable files, or with option{-Fdri} to generate DRI-format object 4 | files. 5 | 6 | @section Legal 7 | 8 | This module is written in 2009-2016,2020,2021,2023 by Frank Wille and 9 | is covered by the vasm copyright without modifications. 10 | 11 | @section Additional options for this module 12 | 13 | All these options only have an effect in executable files. 14 | @table @option 15 | @item -monst 16 | Write Devpac "MonST"-compatible symbols. 17 | @item -stdsymbols 18 | Do not write HiSoft extended symbol names. Cut at 8 characters. 19 | @item -tos-flags= 20 | Sets the flags field in the TOS file header. Defaults to 0. 21 | Overwrites a TOS flags definition in the assembler source. 22 | @end table 23 | 24 | @section General 25 | 26 | @table @option 27 | @item -Ftos 28 | The TOS executable file format is used on Atari 16/32-bit computers 29 | with 68000 up to 68060 CPU running any TOS, MiNT or any compatible 30 | operating system. The symbol table is in DRI format and may use 31 | HiSoft extended symbol names. 32 | @item -Fdri 33 | The object file format defined by Digital Research for Atari M68k 34 | systems. 35 | @end table 36 | 37 | @section Restrictions 38 | 39 | @itemize @minus 40 | @item These file formats only support a single Text (code), Data and BSS 41 | section. 42 | @item For @code{tos} all symbols must be defined, otherwise the generation 43 | of the executable fails. Unknown symbols are listed by vasm. 44 | @item The only relocations allowed in @code{tos} are 32-bit absolute. For 45 | @code{dri} all 16- and 32-bit absolute and PC-relative relocations 46 | are supported. 16-bit base-relative appears as a 16-bit absolute symbol 47 | reference. 48 | @item The maximum symbol length is 8 characters only. The @code{tos} 49 | format increases the maximum length to 22 by using an extension 50 | created by HiSoft, unless forbidden by @option{-stdsymbols}. 51 | @item Symbol references in @code{dri} object files are limited to a 52 | maximum of 8192 symbols. 53 | @end itemize 54 | All these restrictions are defined by the file format itself. 55 | 56 | @section Known Problems 57 | 58 | Some known problems of this module at the moment: 59 | 60 | @itemize @minus 61 | @item None. 62 | @end itemize 63 | 64 | @section Error Messages 65 | 66 | This module has the following error messages: 67 | 68 | @itemize @minus 69 | @item 3004: section attributes not supported 70 | @item 3005: reloc type %d, size %d, mask 0x%lx (symbol %s + 0x%lx) not supported 71 | @item 3006: reloc type %d not supported 72 | @item 3007: undefined symbol <%s> 73 | @item 3008: output module doesn't allow multiple sections of the same type 74 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 75 | @item 3011: weak symbol <%s> not supported by output format, treating as global 76 | @item 3020: too many symbols for selected output file format 77 | @end itemize 78 | -------------------------------------------------------------------------------- /doc/output_vobj.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the simple binary output module which can be 2 | selected with the @option{-Fvobj} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2002-2014 by Volker Barthelmann and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | None. 11 | 12 | @section General 13 | 14 | This output module outputs the @code{vobj} object format, a simple 15 | portable proprietary object file format of @code{vasm}. 16 | 17 | As this format is not yet fixed, it is not described here. 18 | 19 | @section Restrictions 20 | 21 | None. 22 | 23 | @section Known Problems 24 | 25 | Some known problems of this module at the moment: 26 | 27 | @itemize @minus 28 | 29 | @item None. 30 | 31 | @end itemize 32 | 33 | @section Error Messages 34 | 35 | This module has the following error messages: 36 | @itemize @minus 37 | @item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx 38 | @end itemize 39 | -------------------------------------------------------------------------------- /doc/output_xfile.texi: -------------------------------------------------------------------------------- 1 | This chapter describes the Xfile output module which can be 2 | selected with the @option{-Fxfile} option. 3 | 4 | @section Legal 5 | 6 | This module is written in 2018,2020,2021 by Frank Wille and 7 | is covered by the vasm copyright without modifications. 8 | 9 | @section Additional options for this module 10 | 11 | None. 12 | 13 | @section General 14 | 15 | This module outputs the Xfile executable file format, which is used 16 | on Sharp X68000 16/32-bit computer with 68000 up to 68040 CPU. 17 | 18 | @section Restrictions 19 | 20 | @itemize @minus 21 | @item The source must not define more than one code, data and bss section 22 | each. More complex sources with @code{.rdata} or @code{.stack} sections 23 | require a linker. 24 | @item All symbols must be defined, otherwise the generation of the executable 25 | fails. Unknown symbols are listed by vasm. 26 | @item The only relocations allowed in this format are 32-bit absolute. 27 | @end itemize 28 | 29 | @section Known Problems 30 | 31 | Some known problems of this module at the moment: 32 | 33 | @itemize @minus 34 | @item None. 35 | @end itemize 36 | 37 | @section Error Messages 38 | 39 | This module has the following error messages: 40 | 41 | @itemize @minus 42 | @item 3004: section attributes not supported 43 | @item 3005: reloc type %d, size %d, mask 0x%lx (symbol %s + 0x%lx) not supported 44 | @item 3006: reloc type %d not supported 45 | @item 3007: undefined symbol <%s> 46 | @item 3008: output module doesn't allow multiple sections of the same type 47 | @item 3011: weak symbol <%s> not supported by output format, treating as global 48 | @item 3013: reloc type %d, mask 0x%lx to symbol %s + 0x%lx does not fit into %u bits 49 | @end itemize 50 | -------------------------------------------------------------------------------- /dwarf.h: -------------------------------------------------------------------------------- 1 | /* dwarf.h - DWARF debugging sections */ 2 | /* (c) in 2018 by Frank Wille */ 3 | 4 | 5 | struct dwarf_info { 6 | int version; 7 | char *producer; 8 | section *asec; 9 | void *range_length; 10 | section *lsec; 11 | void *line_length; 12 | section *rsec; 13 | int code_sections; 14 | atom *lowpc_atom,*highpc_atom; 15 | unsigned addr_len; 16 | unsigned min_inst_len; 17 | unsigned char default_is_stmt; 18 | signed char line_base; 19 | unsigned char line_range; 20 | unsigned char opcode_base; 21 | int max_pcadvance; 22 | int max_lnadvance_hipc; 23 | taddr address; 24 | int file,line,column,is_stmt,basic_block,end_sequence; 25 | }; 26 | 27 | /* debug information tags and attributes */ 28 | #define DW_TAG_compile_unit 0x11 29 | 30 | #define DW_AT_name 0x03 31 | #define DW_AT_stmt_list 0x10 32 | #define DW_AT_low_pc 0x11 33 | #define DW_AT_high_pc 0x12 34 | #define DW_AT_language 0x13 35 | #define DW_AT_comp_dir 0x1b 36 | #define DW_AT_producer 0x25 37 | #define DW_AT_ranges 0x55 /* DWARF3 */ 38 | 39 | /* debug abbreviation forms */ 40 | #define DW_FORM_addr 1 41 | #define DW_FORM_data2 5 42 | #define DW_FORM_data4 6 43 | #define DW_FORM_string 8 44 | 45 | /* DW_AT_language */ 46 | #define DW_LANG_C89 1 47 | #define DW_LANG_C 2 48 | #define DW_LANG_ASSEMBLER 0x8001 /* originally def. as MIPS assembler */ 49 | 50 | /* statement machine opcodes */ 51 | #define DW_LNS_copy 1 52 | #define DW_LNS_advance_pc 2 53 | #define DW_LNS_advance_line 3 54 | #define DW_LNS_set_file 4 55 | #define DW_LNS_const_add_pc 8 56 | 57 | #define DW_LNE_end_sequence 1 58 | #define DW_LNE_set_address 2 59 | 60 | 61 | /* functions */ 62 | void dwarf_init(struct dwarf_info *,struct include_path *,struct source_file *); 63 | void dwarf_finish(struct dwarf_info *); 64 | void dwarf_end_sequence(struct dwarf_info *,section *); 65 | void dwarf_line(struct dwarf_info *,section *,int,int); 66 | -------------------------------------------------------------------------------- /elf_reloc_386.h: -------------------------------------------------------------------------------- 1 | /* elf_reloc_386.h ELF relocation types for i386 */ 2 | /* (c) in 2005 by Frank Wille */ 3 | 4 | #define R_386_NONE 0 5 | #define R_386_32 1 6 | #define R_386_PC32 2 7 | #define R_386_GOT32 3 8 | #define R_386_PLT32 4 9 | #define R_386_COPY 5 10 | #define R_386_GLOB_DAT 6 11 | #define R_386_JMP_SLOT 7 12 | #define R_386_RELATIVE 8 13 | #define R_386_GOTOFF 9 14 | #define R_386_GOTPC 10 15 | #define R_386_16 20 16 | #define R_386_PC16 21 17 | #define R_386_8 22 18 | #define R_386_PC8 23 19 | 20 | 21 | if ((*rl)->type <= LAST_STANDARD_RELOC) { 22 | nreloc *r = (nreloc *)(*rl)->reloc; 23 | 24 | *refsym = r->sym; 25 | *addend = r->addend; 26 | pos = r->bitoffset; 27 | size = r->size; 28 | *roffset = r->byteoffset; 29 | mask = r->mask; 30 | 31 | switch ((*rl)->type) { 32 | 33 | case REL_NONE: 34 | t = R_386_NONE; 35 | break; 36 | 37 | case REL_ABS: 38 | if (pos==0 && mask==~0) { 39 | if (size == 32) 40 | t = R_386_32; 41 | else if (size == 16) 42 | t = R_386_16; 43 | else if (size == 8) 44 | t = R_386_8; 45 | } 46 | break; 47 | 48 | case REL_PC: 49 | if (pos==0 && mask==~0) { 50 | if (size == 32) 51 | t = R_386_PC32; 52 | else if (size == 16) 53 | t = R_386_PC16; 54 | else if (size == 8) 55 | t = R_386_PC8; 56 | } 57 | break; 58 | 59 | case REL_GOT: 60 | if (pos==0 && mask==~0) { 61 | if (size == 32) 62 | t = R_386_GOT32; 63 | } 64 | break; 65 | 66 | case REL_GOTPC: 67 | if (pos==0 && mask==~0) { 68 | if (size == 32) 69 | t = R_386_GOTPC; 70 | } 71 | break; 72 | 73 | case REL_PLT: 74 | if (pos==0 && mask==~0) { 75 | if (size == 32) 76 | t = R_386_PLT32; 77 | } 78 | break; 79 | 80 | } 81 | } 82 | -------------------------------------------------------------------------------- /elf_reloc_68k.h: -------------------------------------------------------------------------------- 1 | /* elf_reloc_68k.h ELF relocation types for M68k */ 2 | /* (c) in 2002 by Frank Wille */ 3 | 4 | #define R_68K_NONE 0 /* No reloc */ 5 | #define R_68K_32 1 /* Direct 32 bit */ 6 | #define R_68K_16 2 /* Direct 16 bit */ 7 | #define R_68K_8 3 /* Direct 8 bit */ 8 | #define R_68K_PC32 4 /* PC relative 32 bit */ 9 | #define R_68K_PC16 5 /* PC relative 16 bit */ 10 | #define R_68K_PC8 6 /* PC relative 8 bit */ 11 | #define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */ 12 | #define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */ 13 | #define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */ 14 | #define R_68K_GOT32O 10 /* 32 bit GOT offset */ 15 | #define R_68K_GOT16O 11 /* 16 bit GOT offset */ 16 | #define R_68K_GOT8O 12 /* 8 bit GOT offset */ 17 | #define R_68K_PLT32 13 /* 32 bit PC relative PLT address */ 18 | #define R_68K_PLT16 14 /* 16 bit PC relative PLT address */ 19 | #define R_68K_PLT8 15 /* 8 bit PC relative PLT address */ 20 | #define R_68K_PLT32O 16 /* 32 bit PLT offset */ 21 | #define R_68K_PLT16O 17 /* 16 bit PLT offset */ 22 | #define R_68K_PLT8O 18 /* 8 bit PLT offset */ 23 | #define R_68K_COPY 19 /* Copy symbol at runtime */ 24 | #define R_68K_GLOB_DAT 20 /* Create GOT entry */ 25 | #define R_68K_JMP_SLOT 21 /* Create PLT entry */ 26 | #define R_68K_RELATIVE 22 /* Adjust by program base */ 27 | 28 | 29 | if ((*rl)->type <= LAST_STANDARD_RELOC) { 30 | nreloc *r = (nreloc *)(*rl)->reloc; 31 | 32 | *refsym = r->sym; 33 | *addend = r->addend; 34 | pos = r->bitoffset; 35 | size = r->size; 36 | *roffset = r->byteoffset; 37 | mask = r->mask; 38 | 39 | switch ((*rl)->type) { 40 | 41 | case REL_NONE: 42 | t = R_68K_NONE; 43 | break; 44 | 45 | case REL_ABS: 46 | if (pos==0 && mask==~0) { 47 | if (size == 32) 48 | t = R_68K_32; 49 | else if (size == 16) 50 | t = R_68K_16; 51 | else if (size == 8) 52 | t = R_68K_8; 53 | } 54 | break; 55 | 56 | case REL_PC: 57 | if (pos==0 && mask==~0) { 58 | if (size == 32) 59 | t = R_68K_PC32; 60 | else if (size == 16) 61 | t = R_68K_PC16; 62 | else if (size == 8) 63 | t = R_68K_PC8; 64 | } 65 | break; 66 | 67 | case REL_GOTOFF: 68 | if (pos==0 && mask==~0) { 69 | if (size == 32) 70 | t = R_68K_GOT32O; 71 | else if (size == 16) 72 | t = R_68K_GOT16O; 73 | else if (size == 8) 74 | t = R_68K_GOT8O; 75 | } 76 | break; 77 | 78 | case REL_GOT: 79 | if (pos==0 && mask==~0) { 80 | if (size == 32) 81 | t = R_68K_GOT32; 82 | else if (size == 16) 83 | t = R_68K_GOT16; 84 | else if (size == 8) 85 | t = R_68K_GOT8; 86 | } 87 | break; 88 | 89 | case REL_PLTOFF: 90 | if (pos==0 && mask==~0) { 91 | if (size == 32) 92 | t = R_68K_PLT32O; 93 | else if (size == 16) 94 | t = R_68K_PLT16O; 95 | else if (size == 8) 96 | t = R_68K_PLT8O; 97 | } 98 | break; 99 | 100 | case REL_PLT: 101 | if (pos==0 && mask==~0) { 102 | if (size == 32) 103 | t = R_68K_PLT32; 104 | else if (size == 16) 105 | t = R_68K_PLT16; 106 | else if (size == 8) 107 | t = R_68K_PLT8; 108 | } 109 | break; 110 | 111 | } 112 | } 113 | -------------------------------------------------------------------------------- /elf_reloc_arm.h: -------------------------------------------------------------------------------- 1 | /* elf_reloc_arm.h ELF relocation types for ARM */ 2 | /* (c) in 2004,2016 by Frank Wille */ 3 | 4 | #define R_ARM_NONE 0 5 | #define R_ARM_PC24 1 6 | #define R_ARM_ABS32 2 7 | #define R_ARM_REL32 3 8 | #define R_ARM_PC13 4 9 | #define R_ARM_ABS16 5 10 | #define R_ARM_ABS12 6 11 | #define R_ARM_THM_ABS5 7 12 | #define R_ARM_ABS8 8 13 | #define R_ARM_SBREL32 9 14 | #define R_ARM_THM_PC22 10 15 | #define R_ARM_THM_PC8 11 16 | #define R_ARM_SWI24 13 17 | #define R_ARM_THM_SWI8 14 18 | #define R_ARM_ALU_PCREL_7_0 32 19 | #define R_ARM_ALU_PCREL_15_8 33 20 | #define R_ARM_ALU_PCREL_23_15 34 21 | #define R_ARM_LDR_SBREL_11_0 35 22 | #define R_ARM_LDR_SBREL_19_12 36 23 | #define R_ARM_LDR_SBREL_27_20 37 24 | #define R_ARM_RELABS32 38 25 | #define R_ARM_ROSEGREL32 39 26 | #define R_ARM_V4BX 40 27 | 28 | #define AFLD(p,s) (BIGENDIAN?(size==(s)&&(pos&31)==(p)):(size==(s)&&(pos&31)==(32-(p)-(s)))) 29 | #define TFLD(p,s) (BIGENDIAN?(size==(s)&&(pos&15)==(p)):(size==(s)&&(pos&15)==(16-(p)-(s)))) 30 | 31 | 32 | if ((*rl)->type <= LAST_STANDARD_RELOC) { 33 | nreloc *r = (nreloc *)(*rl)->reloc; 34 | 35 | *refsym = r->sym; 36 | *addend = r->addend; 37 | pos = r->bitoffset; 38 | size = r->size; 39 | *roffset = r->byteoffset; 40 | mask = r->mask; 41 | 42 | switch ((*rl)->type) { 43 | 44 | case REL_NONE: 45 | t = R_ARM_NONE; 46 | break; 47 | 48 | case REL_ABS: 49 | if (pos==0 && mask==~0) { 50 | if (size == 32) 51 | t = R_ARM_ABS32; 52 | else if (size == 16) 53 | t = R_ARM_ABS16; 54 | else if (size == 8) 55 | t = R_ARM_ABS8; 56 | } 57 | else if (AFLD(8,24) && mask==0xffffff) 58 | t = R_ARM_SWI24; 59 | else if (AFLD(20,12) && mask==0xfff) 60 | t = R_ARM_ABS12; 61 | else if (TFLD(8,8) && mask==0xff) 62 | t = R_ARM_THM_SWI8; 63 | else if (TFLD(5,5) && mask==0x1f) 64 | t = R_ARM_THM_ABS5; 65 | break; 66 | 67 | case REL_PC: 68 | if (size==32 && pos==0 && mask==~0) 69 | t = R_ARM_REL32; 70 | else if (AFLD(8,24) && mask==0x3fffffc) 71 | t = R_ARM_PC24; 72 | else if (AFLD(20,12) && mask==0x1fff) 73 | t = R_ARM_PC13; 74 | else if (AFLD(24,8) && mask==0xff) 75 | t = R_ARM_ALU_PCREL_7_0; 76 | else if (AFLD(24,8) && mask==0xff00) 77 | t = R_ARM_ALU_PCREL_15_8; 78 | else if (AFLD(24,8) && mask==0xff0000) 79 | t = R_ARM_ALU_PCREL_23_15; 80 | else if (TFLD(8,8) && mask==0x3fc) 81 | t = R_ARM_THM_PC8; 82 | else if (TFLD(5,11)) { 83 | if (rl2 = (*rl)->next) { 84 | nreloc *r2 = (nreloc *)rl2->reloc; 85 | if (rl2->type==(*rl)->type 86 | && r2->size==size && (r2->bitoffset&15)==(pos&15)) { 87 | if ((mask==0x7ff000 && r2->mask==0xffe) || 88 | (mask==0xffe && r2->mask==0x7ff000)) { 89 | t = R_ARM_THM_PC22; 90 | *rl = (*rl)->next; 91 | } 92 | } 93 | } 94 | } 95 | break; 96 | } 97 | } 98 | 99 | #undef AFLD 100 | #undef TFLD 101 | -------------------------------------------------------------------------------- /elf_reloc_jag.h: -------------------------------------------------------------------------------- 1 | /* elf_reloc_jag.h ELF relocation types for Jaguar RISC */ 2 | /* (c) in 2015 by Frank Wille */ 3 | 4 | #define R_JAG_NONE 0 /* No reloc */ 5 | #define R_JAG_ABS32 1 /* Direct 32 bit */ 6 | #define R_JAG_ABS16 2 /* Direct 16 bit */ 7 | #define R_JAG_ABS8 3 /* Direct 8 bit */ 8 | #define R_JAG_REL32 4 /* PC relative 32 bit */ 9 | #define R_JAG_REL16 5 /* PC relative 16 bit */ 10 | #define R_JAG_REL8 6 /* PC relative 8 bit */ 11 | #define R_JAG_ABS5 7 /* Direct 5 bit */ 12 | #define R_JAG_REL5 8 /* PC relative 5 bit */ 13 | #define R_JAG_JR 9 /* PC relative branch (distance / 2), 5 bit */ 14 | #define R_JAG_ABS32SWP 10 /* 32 bit direct, halfwords swapped as in MOVEI */ 15 | #define R_JAG_REL32SWP 11 /* 32 bit PC rel., halfwords swapped as in MOVEI */ 16 | 17 | #define RFLD(p,s) (BIGENDIAN?(size==(s)&&(pos&15)==(p)):(size==(s)&&(pos&15)==(16-(p)-(s)))) 18 | 19 | 20 | if ((*rl)->type <= LAST_STANDARD_RELOC) { 21 | nreloc *r = (nreloc *)(*rl)->reloc; 22 | 23 | *refsym = r->sym; 24 | *addend = r->addend; 25 | pos = r->bitoffset; 26 | size = r->size; 27 | *roffset = r->byteoffset; 28 | mask = r->mask; 29 | 30 | switch ((*rl)->type) { 31 | 32 | case REL_NONE: 33 | t = R_JAG_NONE; 34 | break; 35 | 36 | case REL_ABS: 37 | if (pos==0 && mask==~0) { 38 | if (size == 32) 39 | t = R_JAG_ABS32; 40 | else if (size == 16) 41 | t = R_JAG_ABS16; 42 | else if (size == 8) 43 | t = R_JAG_ABS8; 44 | } 45 | else if (RFLD(6,5) && mask==0x1f) 46 | t = R_JAG_ABS5; 47 | else if (RFLD(0,16) && (mask==0xffff || mask==0xffff0000) 48 | && (rl2=(*rl)->next)!=NULL 49 | && (*rl)->type==(*rl)->next->type) { 50 | nreloc *r2 = (nreloc *)rl2->reloc; 51 | if ((mask==0xffff0000 && r2->mask==0xffff && r2->size==16 52 | && r2->bitoffset==0) || 53 | (mask==0xffff && r2->mask==0xffff0000 && r2->size==16 54 | && r2->bitoffset==16)) { 55 | t = R_JAG_ABS32SWP; 56 | *rl = (*rl)->next; 57 | } 58 | } 59 | break; 60 | 61 | case REL_PC: 62 | if (pos==0 && mask==~0) { 63 | if (size == 32) 64 | t = R_JAG_REL32; 65 | else if (size == 16) 66 | t = R_JAG_REL16; 67 | else if (size == 8) 68 | t = R_JAG_REL8; 69 | } 70 | else if (RFLD(6,5) && mask==0x1f) 71 | t = R_JAG_REL5; 72 | else if (RFLD(6,5) && mask==0x3e) 73 | t = R_JAG_JR; 74 | else if (RFLD(0,16) && (mask==0xffff || mask==0xffff0000) 75 | && (rl2=(*rl)->next)!=NULL 76 | && (*rl)->type==(*rl)->next->type) { 77 | nreloc *r2 = (nreloc *)rl2->reloc; 78 | if ((mask==0xffff0000 && r2->mask==0xffff && r2->size==16 79 | && r2->bitoffset==0) || 80 | (mask==0xffff && r2->mask==0xffff0000 && r2->size==16 81 | && r2->bitoffset==16)) { 82 | t = R_JAG_REL32SWP; 83 | *rl = (*rl)->next; 84 | } 85 | } 86 | break; 87 | } 88 | } 89 | 90 | #undef RFLD 91 | -------------------------------------------------------------------------------- /elf_reloc_x86_64.h: -------------------------------------------------------------------------------- 1 | /* elf_reloc_x86_64.h ELF relocation types for x86 64-bit architecture */ 2 | /* (c) in 2011 by Frank Wille */ 3 | 4 | #define R_X86_64_NONE 0 5 | #define R_X86_64_64 1 6 | #define R_X86_64_PC32 2 7 | #define R_X86_64_GOT32 3 8 | #define R_X86_64_PLT32 4 9 | #define R_X86_64_COPY 5 10 | #define R_X86_64_GLOB_DAT 6 11 | #define R_X86_64_JUMP_SLOT 7 12 | #define R_X86_64_RELATIVE 8 13 | #define R_X86_64_GOTPCREL 9 14 | #define R_X86_64_32 10 15 | #define R_X86_64_32S 11 16 | #define R_X86_64_16 12 17 | #define R_X86_64_PC16 13 18 | #define R_X86_64_8 14 19 | #define R_X86_64_PC8 15 20 | 21 | /* TLS relocations */ 22 | #define R_X86_64_DTPMOD64 16 23 | #define R_X86_64_DTPOFF64 17 24 | #define R_X86_64_TPOFF64 18 25 | #define R_X86_64_TLSGD 19 26 | #define R_X86_64_TLSLD 20 27 | #define R_X86_64_DTPOFF32 21 28 | #define R_X86_64_GOTTPOFF 22 29 | #define R_X86_64_TPOFF32 23 30 | 31 | 32 | if ((*rl)->type <= LAST_STANDARD_RELOC) { 33 | nreloc *r = (nreloc *)(*rl)->reloc; 34 | 35 | *refsym = r->sym; 36 | *addend = r->addend; 37 | pos = r->bitoffset; 38 | size = r->size; 39 | *roffset = r->byteoffset; 40 | mask = r->mask; 41 | 42 | switch ((*rl)->type) { 43 | 44 | case REL_NONE: 45 | t = R_X86_64_NONE; 46 | break; 47 | 48 | case REL_ABS: 49 | if (pos==0 && mask==~0) { 50 | if (size == 64) 51 | t = R_X86_64_64; 52 | else if (size == 32) 53 | t = R_X86_64_32; 54 | else if (size == 16) 55 | t = R_X86_64_16; 56 | else if (size == 8) 57 | t = R_X86_64_8; 58 | } 59 | break; 60 | 61 | case REL_PC: 62 | if (pos==0 && mask==~0) { 63 | if (size == 32) 64 | t = R_X86_64_PC32; 65 | else if (size == 16) 66 | t = R_X86_64_PC16; 67 | else if (size == 8) 68 | t = R_X86_64_PC8; 69 | } 70 | break; 71 | 72 | case REL_GOT: 73 | if (pos==0 && mask==~0) { 74 | if (size == 32) 75 | t = R_X86_64_GOT32; 76 | } 77 | break; 78 | 79 | case REL_GOTPC: 80 | if (pos==0 && mask==~0) { 81 | if (size == 32) 82 | t = R_X86_64_GOTPCREL; 83 | } 84 | break; 85 | 86 | case REL_PLT: 87 | if (pos==0 && mask==~0) { 88 | if (size == 32) 89 | t = R_X86_64_PLT32; 90 | } 91 | break; 92 | 93 | } 94 | } 95 | -------------------------------------------------------------------------------- /error.h: -------------------------------------------------------------------------------- 1 | /* error.h - error output and modification routines */ 2 | /* (c) in 2002-2009,2015,2018,2020 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef ERROR_H 5 | #define ERROR_H 6 | 7 | #define FIRST_GENERAL_ERROR 1 8 | #define FIRST_SYNTAX_ERROR 1001 9 | #define FIRST_CPU_ERROR 2001 10 | #define FIRST_OUTPUT_ERROR 3001 11 | 12 | struct err_out { 13 | char *text; 14 | int flags; 15 | }; 16 | /* Flags for err_out.flags */ 17 | #define ERROR 1 18 | #define WARNING 2 19 | #define INTERNAL 8 20 | #define FATAL 16 21 | #define MESSAGE 32 22 | #define DISABLED 64 23 | #define NOLINE 256 24 | 25 | #endif 26 | -------------------------------------------------------------------------------- /expr.h: -------------------------------------------------------------------------------- 1 | /* expr.h expression handling for vasm */ 2 | /* (c) in 2002-2020 by Volker Barthelmann and Frank Wille */ 3 | 4 | #include "hugeint.h" 5 | 6 | enum { 7 | ADD,SUB,MUL,DIV,MOD,NEG,CPL,LAND,LOR,BAND,BOR,XOR,NOT,LSH,RSH,RSHU, 8 | LT,GT,LEQ,GEQ,NEQ,EQ,NUM,HUG,FLT,SYM 9 | }; 10 | #define LAST_EXP_TYPE SYM 11 | 12 | struct expr { 13 | int type; 14 | struct expr *left; 15 | struct expr *right; 16 | union { 17 | taddr val; 18 | tfloat flt; 19 | thuge huge; 20 | symbol *sym; 21 | } c; 22 | }; 23 | 24 | /* strbuf-number to use for the expression parser only in 25 | parse_identifier() and get_local_label() */ 26 | #define EXPBUFNO 2 27 | 28 | /* Macros for extending the unary operation types (e.g. '<' and '>' for 6502). 29 | Cpu module has to define EXT_UNARY_EVAL(type,val,res,c) for evaluation. */ 30 | #ifndef EXT_UNARY_NAME 31 | #define EXT_UNARY_NAME(s) 0 32 | #endif 33 | #ifndef EXT_UNARY_TYPE 34 | #define EXT_UNARY_TYPE(s) NOT 35 | #endif 36 | 37 | /* global variables */ 38 | extern char current_pc_char; 39 | extern int unsigned_shift; 40 | 41 | /* functions */ 42 | expr *new_expr(void); 43 | expr *make_expr(int,expr *,expr *); 44 | expr *copy_tree(expr *); 45 | expr *new_sym_expr(symbol *); 46 | expr *curpc_expr(void); 47 | expr *parse_expr(char **); 48 | expr *parse_expr_tmplab(char **); 49 | expr *parse_expr_huge(char **); 50 | expr *parse_expr_float(char **); 51 | taddr parse_constexpr(char **); 52 | expr *number_expr(taddr); 53 | expr *huge_expr(thuge); 54 | void free_expr(expr *); 55 | int type_of_expr(expr *); 56 | expr **find_sym_expr(expr **,char *); 57 | void simplify_expr(expr *); 58 | int eval_expr(expr *,taddr *,section *,taddr); 59 | int eval_expr_huge(expr *,thuge *); 60 | void print_expr(FILE *,expr *); 61 | int find_base(expr *,symbol **,section *,taddr); 62 | #if FLOAT_PARSER 63 | expr *float_expr(tfloat); 64 | int eval_expr_float(expr *,tfloat *); 65 | #endif 66 | 67 | /* find_base return codes */ 68 | #define BASE_ILLEGAL 0 69 | #define BASE_OK 1 70 | #define BASE_PCREL 2 71 | #define BASE_NONE -1 /* no base-symbol assigned, all labels are absolute */ 72 | -------------------------------------------------------------------------------- /general_errors.h: -------------------------------------------------------------------------------- 1 | "illegal operand types",ERROR, 2 | "unknown mnemonic <%s>",ERROR, 3 | "unknown section <%s>",ERROR, 4 | "no current section specified",ERROR, 5 | "internal error %d in line %d of %s",ERROR|FATAL, 6 | "symbol <%s> redefined",WARNING, /* 5 */ 7 | "%c expected",WARNING, 8 | "cannot resolve section <%s>, maximum number of passes reached",NOLINE|ERROR|FATAL, 9 | "instruction not supported on selected architecture",ERROR, 10 | "number or identifier expected",ERROR, 11 | "could not initialize %s module",NOLINE|ERROR|FATAL, /* 10 */ 12 | "multiple input files",NOLINE|ERROR, 13 | "could not open <%s> for input",ERROR|FATAL, 14 | "could not open <%s> for output",NOLINE|ERROR|FATAL, 15 | "unknown option <%s>",NOLINE|ERROR, 16 | "",NOLINE|ERROR|FATAL, /* 15 */ 17 | "could not initialize output module <%s>",NOLINE|ERROR|FATAL, 18 | "out of memory",NOLINE|ERROR|FATAL, 19 | "symbol <%s> recursively defined",ERROR|FATAL, 20 | "fail: %s",ERROR, 21 | "section offset is lower than current pc",ERROR|FATAL, /* 20 */ 22 | "target data type overflow (%d bits)",WARNING, 23 | "undefined symbol <%s>",NOLINE|ERROR, 24 | "trailing garbage after option -%c",NOLINE|WARNING, 25 | "missing macro parameters",ERROR, 26 | "missing end directive for macro \"%s\"",ERROR|FATAL, /* 25 */ 27 | "macro definition inside macro \"%s\"",ERROR|FATAL, 28 | "maximum number of %d macro arguments exceeded",ERROR, 29 | "option %s was specified twice",NOLINE|WARNING, 30 | "read error on <%s>",NOLINE|ERROR|FATAL, 31 | "expression must be constant",ERROR, /* 30 */ 32 | "initialized data in bss",WARNING, 33 | "missing end directive in repeat-block",ERROR|FATAL, 34 | "#%d is not a valid %smessage",NOLINE|ERROR, 35 | "relocation not allowed",ERROR, 36 | "illegal escape sequence \\%c",WARNING, /* 35 */ 37 | "no current macro to exit",ERROR, 38 | "internal symbol %s redefined by user",ERROR|FATAL, 39 | "illegal relocation",ERROR, 40 | "label name conflicts with mnemonic",WARNING, 41 | "label name conflicts with directive",WARNING, /* 40 */ 42 | "division by zero",ERROR, 43 | "illegal macro argument",ERROR, 44 | "reloc org is already set",ERROR|FATAL, 45 | "reloc org was not set",ERROR, 46 | "address space overflow",ERROR, /* 45 */ 47 | "bad file-offset argument",ERROR, 48 | "assertion \"%s\" failed: %s",ERROR, 49 | "cannot declare structure within structure",ERROR, 50 | "no structure",ERROR, 51 | "instruction has been auto-aligned",WARNING, /* 50 */ 52 | "macro name conflicts with mnemonic",WARNING, 53 | "macro name conflicts with directive",WARNING, 54 | "non-relocatable expression in equate <%s>",NOLINE|ERROR, 55 | "initialized data in offset section",WARNING, 56 | "illegal structure recursion",ERROR|FATAL, /* 55 */ 57 | "maximum number of macro recursions (%d) reached",ERROR|FATAL, 58 | "data has been auto-aligned",WARNING, 59 | "register symbol <%s> redefined",ERROR, 60 | "cannot evaluate constant huge integer expression",ERROR, 61 | "cannot evaluate floating point expression",ERROR, /* 60 */ 62 | "imported symbol <%s> was not referenced",NOLINE|WARNING, 63 | "symbol <%s> already defined with %s scope",WARNING, 64 | "unexpected \"else\" without \"if\"",ERROR, 65 | "unexpected \"endif\" without \"if\"",ERROR, 66 | "maximum if-nesting depth exceeded (%d levels)",FATAL|ERROR, /* 65 */ 67 | "\"endif\" missing for conditional block started at %s line %d",ERROR, 68 | "repeatedly defined symbol <%s>",ERROR, 69 | "macro <%s> does not exist",ERROR, 70 | "register <%s> does not exist",ERROR, 71 | "register symbol <%s> has wrong type",ERROR, /* 70 */ 72 | "cannot mix positional and keyword arguments",ERROR, 73 | "undefined macro argument name",ERROR, 74 | "required macro argument %d was left out",ERROR, 75 | "label <%s> redefined",ERROR, 76 | "base %d numerical term expected",ERROR, /* 75 */ 77 | "section stack overflow",ERROR, 78 | "section stack is empty",ERROR, 79 | "illegal value for option: %s",NOLINE|ERROR, 80 | "%s backend does not support floating point",ERROR|FATAL, 81 | "unknown listing file format \"%s\" ignored",NOLINE|WARNING, /* 80 */ 82 | "cannot export equate based on imported symbol: <%s>",NOLINE|ERROR, 83 | "label definition not allowed here",ERROR, 84 | "label defined on the same line as a new section",WARNING, 85 | "no debug output possible with source from stdin",WARNING, 86 | "external symbol <%s> must not be defined",ERROR, /* 85 */ 87 | "missing definition for symbol <%s>",NOLINE|WARNING, 88 | -------------------------------------------------------------------------------- /hugeint.h: -------------------------------------------------------------------------------- 1 | /* hugeint.h implements huge integer operations at 128 bits */ 2 | /* (c) in 2014 by Frank Wille */ 3 | 4 | #ifndef HUGEINT_H 5 | #define HUGEINT_H 6 | 7 | #include "tfloat.h" 8 | 9 | typedef struct thuge { 10 | uint64_t hi,lo; 11 | } thuge; 12 | 13 | #define HUGEBITS 128 14 | #define HUGESIGN(h) ((h.hi & 0x8000000000000000LL) != 0) 15 | #define MAX_UINT64_FLOAT 1.8446744073709551616e+19 16 | 17 | 18 | thuge huge_zero(void); 19 | thuge huge_from_int(int64_t); 20 | int64_t huge_to_int(thuge); 21 | #if FLOAT_PARSER 22 | thuge huge_from_float(tfloat); 23 | tfloat huge_to_float(thuge); 24 | #endif 25 | thuge huge_from_mem(int,void *,size_t); 26 | void *huge_to_mem(int,void *,size_t,thuge); 27 | int huge_chkrange(thuge,int); 28 | 29 | thuge hneg(thuge); 30 | thuge hcpl(thuge); 31 | thuge hnot(thuge); 32 | thuge hand(thuge,thuge); 33 | thuge hor(thuge,thuge); 34 | thuge hxor(thuge,thuge); 35 | thuge haddi(thuge,int64_t); 36 | thuge hadd(thuge,thuge); 37 | thuge hsub(thuge,thuge); 38 | int hcmp(thuge,thuge); 39 | thuge hshra(thuge,int); 40 | thuge hshr(thuge,int); 41 | thuge hshl(thuge,int); 42 | thuge hmuli(thuge,int64_t); 43 | thuge hmul(thuge,thuge); 44 | thuge hdiv(thuge,thuge); 45 | thuge hmod(thuge,thuge); 46 | 47 | #endif 48 | -------------------------------------------------------------------------------- /listing.h: -------------------------------------------------------------------------------- 1 | /* listing.h - listing file */ 2 | /* (c) in 2020 by Volker Barthelmann */ 3 | 4 | #ifndef LISTING_H 5 | #define LISTING_H 6 | 7 | /* listing table */ 8 | #define MAXLISTSRC 120 9 | 10 | struct listing { 11 | listing *next; 12 | source *src; 13 | int line; 14 | int error; 15 | atom *atom; 16 | section *sec; 17 | taddr pc; 18 | char txt[MAXLISTSRC]; 19 | }; 20 | 21 | extern int produce_listing,listena; 22 | extern int listformfeed,listlinesperpage,listnosyms; 23 | extern listing *first_listing,*last_listing,*cur_listing; 24 | 25 | int listing_option(char *); 26 | listing *new_listing(source *,int); 27 | void set_listing(int); 28 | void set_list_title(char *,int); 29 | void set_listformat(const char *); 30 | void write_listing(char *,section *); 31 | 32 | #endif /* LISTING_H */ 33 | -------------------------------------------------------------------------------- /obj/.dummy: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Leffmann/vasm/685a87e5ed14285350ccdb6581c9771bc8df6c7d/obj/.dummy -------------------------------------------------------------------------------- /osdep.c: -------------------------------------------------------------------------------- 1 | /* osdep.c - OS-dependant routines */ 2 | /* (c) in 2018,2020 by Frank Wille */ 3 | 4 | #include 5 | char *mystrdup(const char *); 6 | void *mymalloc(size_t); 7 | struct symbol *internal_abs(char *); 8 | 9 | #define MAX_WORKDIR_LEN 1024 10 | 11 | #if defined(UNIX) 12 | #include 13 | 14 | #elif defined(AMIGA) 15 | #include 16 | #include 17 | #include 18 | #ifdef __amigaos4__ 19 | #include 20 | #endif 21 | 22 | #elif defined(ATARI) 23 | #include 24 | 25 | #elif defined(_WIN32) 26 | #define WIN32_LEAN_AND_MEAN 27 | #include 28 | #endif 29 | 30 | 31 | char *convert_path(const char *path) 32 | { 33 | char *newpath; 34 | 35 | #if defined(AMIGA) 36 | char *p = newpath = mymalloc(strlen(path)+1); 37 | 38 | while (*path) { 39 | if (*path=='.') { 40 | if (*(path+1)=='\0') { 41 | path++; 42 | continue; 43 | } 44 | else if (*(path+1)=='/' || *(path+1)=='\\') { 45 | path += 2; 46 | continue; 47 | } 48 | else if (*(path+1)=='.' && 49 | (*(path+2)=='/' || *(path+2)=='\\')) 50 | path += 2; 51 | } 52 | if (*path == '\\') { 53 | *p++ = '/'; 54 | path++; 55 | } 56 | else 57 | *p++ = *path++; 58 | } 59 | *p = '\0'; 60 | 61 | #elif defined(MSDOS) || defined(ATARI) || defined(_WIN32) 62 | char *p; 63 | 64 | newpath = mystrdup(path); 65 | for (p=newpath; *p; p++) { 66 | if (*p == '/') 67 | *p = '\\'; 68 | } 69 | 70 | #else /* Unixish */ 71 | char *p; 72 | 73 | newpath = mystrdup(path); 74 | for (p=newpath; *p; p++) { 75 | if (*p == '\\') 76 | *p = '/'; 77 | } 78 | #endif 79 | 80 | return newpath; 81 | } 82 | 83 | 84 | char *append_path_delimiter(const char *old) 85 | { 86 | int len = strlen(old); 87 | char *new; 88 | 89 | #if defined(AMIGA) 90 | if (len>0 && old[len-1]!='/' && old[len-1]!=':') { 91 | new = mymalloc(len+2); 92 | strcpy(new,old); 93 | new[len] = '/'; 94 | new[len+1] = '\0'; 95 | } 96 | #elif defined(MSDOS) || defined(ATARI) || defined(_WIN32) 97 | if (len>0 && old[len-1]!='\\' && old[len-1]!=':') { 98 | new = mymalloc(len+2); 99 | strcpy(new,old); 100 | new[len] = '\\'; 101 | new[len+1] = '\0'; 102 | } 103 | #else 104 | if (len>0 && old[len-1]!='/') { 105 | new = mymalloc(len+2); 106 | strcpy(new,old); 107 | new[len] = '/'; 108 | new[len+1] = '\0'; 109 | } 110 | #endif 111 | else 112 | new = mystrdup(old); 113 | 114 | return new; 115 | } 116 | 117 | 118 | char *remove_path_delimiter(const char *old) 119 | { 120 | int len = strlen(old); 121 | char *new; 122 | 123 | #if defined(AMIGA) 124 | if (len>1 && (old[len-1]=='/' || old[len-1]==':')) { 125 | #elif defined(MSDOS) || defined(ATARI) || defined(_WIN32) 126 | if (len>1 && (old[len-1]=='\\' || old[len-1]==':')) { 127 | #else 128 | if (len>1 && old[len-1]=='/') { 129 | #endif 130 | new = mymalloc(len); 131 | memcpy(new,old,len-1); 132 | new[len-1] = '\0'; 133 | } 134 | else 135 | new = mystrdup(old); 136 | 137 | return new; 138 | } 139 | 140 | 141 | char *get_filepart(char *path) 142 | { 143 | char *filepart; 144 | 145 | if ((filepart = strrchr(path,'/')) != NULL || 146 | (filepart = strrchr(path,'\\')) != NULL || 147 | (filepart = strrchr(path,':')) != NULL) 148 | return filepart+1; 149 | return path; 150 | } 151 | 152 | 153 | #if defined(UNIX) 154 | char *get_workdir(void) 155 | { 156 | static char buf[MAX_WORKDIR_LEN]; 157 | 158 | if (getcwd(buf,MAX_WORKDIR_LEN) == NULL) 159 | buf[0] = '\0'; 160 | return buf; 161 | } 162 | 163 | #elif defined(AMIGA) 164 | char *get_workdir(void) 165 | { 166 | static char buf[MAX_WORKDIR_LEN]; 167 | 168 | #ifndef __amigaos4__ 169 | if (DOSBase->dl_lib.lib_Version < 36) 170 | buf[0] = '\0'; 171 | else 172 | #endif 173 | if (!GetCurrentDirName(buf,MAX_WORKDIR_LEN)) 174 | buf[0] = '\0'; 175 | return buf; 176 | } 177 | 178 | #elif defined(ATARI) 179 | char *get_workdir(void) 180 | { 181 | static char buf[MAX_WORKDIR_LEN]; 182 | WORD drv = Dgetdrv(); 183 | 184 | buf[0] = 'A' + drv; 185 | buf[1] = ':'; 186 | Dgetpath(buf+2,drv+1); 187 | return buf; 188 | } 189 | 190 | #elif defined(_WIN32) 191 | char *get_workdir(void) 192 | { 193 | static char buf[MAX_WORKDIR_LEN]; 194 | 195 | GetCurrentDirectoryA(MAX_WORKDIR_LEN,buf); 196 | return buf; 197 | } 198 | 199 | #else /* portable default */ 200 | char *get_workdir(void) 201 | { 202 | return ""; 203 | } 204 | #endif 205 | 206 | int init_osdep(void) 207 | { 208 | #if defined(UNIX) 209 | internal_abs("__UNIXFS"); 210 | #elif defined(AMIGA) 211 | internal_abs("__AMIGAFS"); 212 | #elif defined(MSDOS) || defined(ATARI) || defined(_WIN32) 213 | internal_abs("__MSDOSFS"); 214 | #endif 215 | return 1; 216 | } 217 | -------------------------------------------------------------------------------- /osdep.h: -------------------------------------------------------------------------------- 1 | /* osdep.h - OS-dependant routines */ 2 | /* (c) in 2018,2020 by Frank Wille */ 3 | 4 | #if defined(AMIGA) || defined(MSDOS) || defined(ATARI) || defined(_WIN32) 5 | #define filenamecmp(a,b) stricmp(a,b) 6 | #else 7 | #define filenamecmp(a,b) strcmp(a,b) 8 | #endif 9 | 10 | char *convert_path(const char *); 11 | char *append_path_delimiter(const char *); 12 | char *remove_path_delimiter(const char *); 13 | char *get_filepart(char *); 14 | char *get_workdir(void); 15 | int init_osdep(void); 16 | -------------------------------------------------------------------------------- /output_aout.h: -------------------------------------------------------------------------------- 1 | /* output_aout.h header file for a.out objects */ 2 | /* (c) in 2008,2020 by Frank Wille */ 3 | 4 | #include "stabs.h" 5 | 6 | /* a.out header */ 7 | struct aout_hdr { 8 | uint8_t a_midmag[4]; 9 | uint8_t a_text[4]; 10 | uint8_t a_data[4]; 11 | uint8_t a_bss[4]; 12 | uint8_t a_syms[4]; 13 | uint8_t a_entry[4]; 14 | uint8_t a_trsize[4]; 15 | uint8_t a_drsize[4]; 16 | }; 17 | 18 | /* a_magic */ 19 | #define OMAGIC 0407 /* old impure format */ 20 | #define NMAGIC 0410 /* read-only text */ 21 | #define ZMAGIC 0413 /* demand load format */ 22 | #define QMAGIC 0314 /* not supported */ 23 | 24 | /* a_mid - machine id */ 25 | #define MID_SUN010 1 /* sun 68010/68020 binary */ 26 | #define MID_SUN020 2 /* sun 68020-only binary */ 27 | #define MID_PC386 100 /* 386 PC binary. (so quoth BFD) */ 28 | #define MID_HP200 200 /* hp200 (68010) BSD binary */ 29 | #define MID_I386 134 /* i386 BSD binary */ 30 | #define MID_M68K 135 /* m68k BSD binary with 8K page sizes */ 31 | #define MID_M68K4K 136 /* m68k BSD binary with 4K page sizes */ 32 | #define MID_NS32532 137 /* ns32532 */ 33 | #define MID_SPARC 138 /* sparc */ 34 | #define MID_PMAX 139 /* pmax */ 35 | #define MID_VAX1K 140 /* vax 1K page size binaries */ 36 | #define MID_ALPHA 141 /* Alpha BSD binary */ 37 | #define MID_MIPS 142 /* big-endian MIPS */ 38 | #define MID_ARM6 143 /* ARM6 */ 39 | #define MID_SH3 145 /* SH3 */ 40 | #define MID_POWERPC 149 /* big-endian PowerPC */ 41 | #define MID_VAX 150 /* vax */ 42 | #define MID_SPARC64 151 /* LP64 sparc */ 43 | #define MID_HP300 300 /* hp300 (68020+68881) BSD binary */ 44 | #define MID_HPUX 0x20C /* hp200/300 HP-UX binary */ 45 | #define MID_HPUX800 0x20B /* hp800 HP-UX binary */ 46 | 47 | /* a_flags */ 48 | #define EX_DYNAMIC 0x20 49 | #define EX_PIC 0x10 50 | #define EX_DPMASK 0x30 51 | 52 | /* a_midmag macros */ 53 | #define SETMIDMAG(a,mag,mid,flag) setval(1,(a)->a_midmag,4, \ 54 | ((flag)&0x3f)<<26|((mid)&0x3ff)<<16|((mag)&0xffff)) 55 | 56 | 57 | /* Relocation info structures */ 58 | struct relocation_info { 59 | uint8_t r_address[4]; 60 | uint8_t r_info[4]; 61 | }; 62 | 63 | #define RELB_symbolnum 0 /* ordinal number of add symbol */ 64 | #define RELS_symbolnum 24 65 | #define RELB_reloc 24 /* the whole reloc field */ 66 | #define RELS_reloc 8 67 | 68 | /* standard relocs: M68k, x86, ... */ 69 | #define RSTDB_pcrel 24 /* 1 if value should be pc-relative */ 70 | #define RSTDS_pcrel 1 71 | #define RSTDB_length 25 /* log base 2 of value's width */ 72 | #define RSTDS_length 2 73 | #define RSTDB_extern 27 /* 1 if need to add symbol to value */ 74 | #define RSTDS_extern 1 75 | #define RSTDB_baserel 28 /* linkage table relative */ 76 | #define RSTDS_baserel 1 77 | #define RSTDB_jmptable 29 /* relocate to jump table */ 78 | #define RSTDS_jmptable 1 79 | #define RSTDB_relative 30 /* load address relative */ 80 | #define RSTDS_relative 1 81 | #define RSTDB_copy 31 /* run time copy */ 82 | #define RSTDS_copy 1 83 | 84 | 85 | /* vasm specific - used to generate a.out files */ 86 | 87 | #define ASTRTABSIZE 0x10000 88 | #define ASYMTABSIZE 0x10000 89 | 90 | struct StrTabNode { 91 | struct node n; 92 | struct StrTabNode *hashchain; 93 | char *str; 94 | uint32_t offset; 95 | }; 96 | 97 | struct StrTabList { 98 | struct list l; 99 | struct StrTabNode **hashtab; 100 | uint32_t nextoffset; 101 | }; 102 | 103 | struct SymbolNode { 104 | struct node n; 105 | struct SymbolNode *hashchain; 106 | char *name; 107 | struct nlist32 s; 108 | uint32_t index; 109 | }; 110 | 111 | struct SymTabList { 112 | struct list l; 113 | struct SymbolNode **hashtab; 114 | uint32_t nextindex; 115 | }; 116 | 117 | struct RelocNode { 118 | struct node n; 119 | struct relocation_info r; 120 | }; 121 | 122 | 123 | #if defined(VASM_CPU_M68K) 124 | /* MID defined in cpus/m68k/cpu.h */ 125 | #elif defined(VASM_CPU_PPC) 126 | #define MID MID_POWERPC 127 | #elif defined(VASM_CPU_ARM) 128 | #define MID MID_ARM6 129 | #elif defined(VASM_CPU_X86) 130 | #define MID MID_PC386 131 | #elif defined(VASM_CPU_JAGRISC) 132 | #define MID (0) 133 | #endif 134 | -------------------------------------------------------------------------------- /output_cdef.c: -------------------------------------------------------------------------------- 1 | /* output_cdef.c #define output driver for vasm */ 2 | /* (c) in 2020 by Volker Barthelmann */ 3 | 4 | #include "vasm.h" 5 | 6 | static char *copyright="vasm cdef output module 0.1a (c) 2020 Volker Barthelmann"; 7 | 8 | static void write_output(FILE *f,section *sec,symbol *sym) 9 | { 10 | for(;sym;sym=sym->next){ 11 | if(!(sym->flags&VASMINTERN)&&sym->type==EXPRESSION&&sym->expr->type==NUM) 12 | fprintf(f,"#define %s\t0x%llx\n",sym->name,(unsigned long long)sym->expr->c.val); 13 | } 14 | } 15 | 16 | static int output_args(char *p) 17 | { 18 | /* no args */ 19 | return 0; 20 | } 21 | 22 | int init_output_cdef(char **cp,void (**wo)(FILE *,section *,symbol *),int (**oa)(char *)) 23 | { 24 | *cp=copyright; 25 | *wo=write_output; 26 | *oa=output_args; 27 | asciiout=1; 28 | return 1; 29 | } 30 | 31 | -------------------------------------------------------------------------------- /output_errors.h: -------------------------------------------------------------------------------- 1 | "sections must not overlap",FATAL|ERROR|NOLINE, 2 | "output module doesn't support cpu %s",ERROR|NOLINE, 3 | "write error",FATAL|ERROR|NOLINE, 4 | "section attributes <%s> not supported",ERROR|NOLINE, 5 | "reloc type %d, size %u, mask 0x%lx (symbol %s + 0x%lx) not supported",ERROR|NOLINE, 6 | "reloc type %d not supported",ERROR|NOLINE, /* 05 */ 7 | "undefined symbol <%s>",ERROR|NOLINE, 8 | "output module doesn't allow multiple sections of the same type (%s)",FATAL|ERROR|NOLINE, 9 | "undefined symbol <%s> at %s+0x%lx, reloc type %d",ERROR, 10 | "section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx",WARNING|NOLINE, 11 | "weak symbol <%s> not supported by output format, treating as global",WARNING|NOLINE, /* 10 */ 12 | "address 0x%llx out of range for selected format",ERROR|NOLINE, 13 | "reloc type %d, mask 0x%lx to symbol %s + 0x%lx does not fit into %u bits",ERROR, 14 | "data definition following a databss space directive",WARNING, 15 | "file option %d max size exceeded: %lu",WARNING, 16 | "absolute file path exceeds maximum size of %d characters",FATAL|ERROR|NOLINE, /* 15 */ 17 | "converting NONE relocation <%s> to 8-bit ABS with zero addend",WARNING|NOLINE, 18 | "no additional space in section to convert NONE relocation <%s> to ABS",ERROR|NOLINE, 19 | "section <%s>: kickstart 1.x cannot initialize bss sections >256k to zero",WARNING|NOLINE, 20 | "too many symbols for selected output file format",ERROR|NOLINE, 21 | -------------------------------------------------------------------------------- /output_gst.h: -------------------------------------------------------------------------------- 1 | /* output_gst.h header file for Atari GST format */ 2 | /* (c) in 2023 by Frank Wille */ 3 | 4 | #define GSTESC 0xfb /* Escape code for GST directives in the stream */ 5 | 6 | /* GST directives */ 7 | #define GST_SOURCE 0x01 /* string - source file name */ 8 | #define GST_COMMENT 0x02 /* string - comment to be ignored */ 9 | #define GST_ORG 0x03 /* long - start addr. of ORG section */ 10 | #define GST_SECTION 0x04 /* id - switch to section */ 11 | #define GST_OFFSET 0x05 /* long - move to absolute offset in section */ 12 | #define GST_XDEF 0x06 /* string long id - define symbol with value */ 13 | #define GST_XREF 0x07 /* long trunc-rule [op id] 0xfb - relocs/xrefs */ 14 | #define GST_DEFINE 0x10 /* id string - define section/symbol names */ 15 | #define GST_COMMON 0x12 /* id - switch to section for common symbol */ 16 | #define GST_END 0x13 /* end of current object module */ 17 | 18 | #define GSTOUT(f,d) fw16(f,(GSTESC<<8)|(d),1) 19 | 20 | /* GST_XREF-directive trunc-rule bits */ 21 | #define GSTR_BYTE 0x01 22 | #define GSTR_WORD 0x02 23 | #define GSTR_LONG 0x04 24 | #define GSTR_SIGNED 0x08 25 | #define GSTR_UNSIGNED 0x10 26 | #define GSTR_PCREL 0x20 27 | #define GSTR_ABS 0x40 28 | -------------------------------------------------------------------------------- /output_hunk.h: -------------------------------------------------------------------------------- 1 | /* output_hunk.h header file for AmigaOS hunk format */ 2 | /* (c) in 2002-2019 by Frank Wille */ 3 | 4 | /* hunk-format relocs */ 5 | struct hunkreloc { 6 | struct node n; 7 | rlist *rl; 8 | uint32_t hunk_id; 9 | uint32_t hunk_index; 10 | uint32_t hunk_offset; 11 | }; 12 | 13 | /* hunk-format external reference */ 14 | struct hunkxref { 15 | struct node n; 16 | char *name; 17 | uint32_t type; 18 | uint32_t size; 19 | uint32_t offset; 20 | }; 21 | 22 | /* line debug hunk */ 23 | struct linedb_block { 24 | struct node n; 25 | char *filename; 26 | uint32_t offset; 27 | int entries; 28 | struct list lines; 29 | }; 30 | struct linedb_entry { 31 | struct node n; 32 | uint32_t line; 33 | uint32_t offset; 34 | }; 35 | 36 | 37 | /* additional symbol flags */ 38 | #define COMM_REFERENCED (RSRVD_O<<0) /* common symbol was referenced */ 39 | 40 | /* additional section flags */ 41 | #define SEC_DELETED (SECRSRVD<<1) /* this section can be deleted */ 42 | 43 | 44 | /* Amiga DOS Hunks */ 45 | #define HUNK_UNIT 999 46 | #define HUNK_NAME 1000 47 | #define HUNK_CODE 1001 48 | #define HUNK_DATA 1002 49 | #define HUNK_BSS 1003 50 | #define HUNK_ABSRELOC32 1004 51 | #define HUNK_RELRELOC16 1005 52 | #define HUNK_RELRELOC8 1006 53 | #define HUNK_EXT 1007 54 | #define HUNK_SYMBOL 1008 55 | #define HUNK_DEBUG 1009 56 | #define HUNK_END 1010 57 | #define HUNK_HEADER 1011 58 | #define HUNK_DREL32 1015 59 | #define HUNK_DREL16 1016 60 | #define HUNK_DREL8 1017 61 | #define HUNK_RELRELOC32 1021 62 | #define HUNK_ABSRELOC16 1022 63 | 64 | /* EHF extensions */ 65 | #define HUNK_PPC_CODE 1257 66 | #define HUNK_RELRELOC26 1260 67 | 68 | /* memory type */ 69 | #define HUNKB_CHIP 30 70 | #define HUNKB_FAST 31 71 | #define HUNKF_CHIP (1L<<30) 72 | #define HUNKF_FAST (1L<<31) 73 | #define HUNKF_MEMTYPE (HUNKF_CHIP|HUNKF_FAST) 74 | 75 | /* AmigaOS memory flags */ 76 | #define MEMF_PUBLIC (1L<<0) 77 | #define MEMF_CHIP (1L<<1) 78 | #define MEMF_FAST (1L<<2) 79 | 80 | /* hunk_ext sub-types */ 81 | #define EXT_SYMB 0 82 | #define EXT_DEF 1 83 | #define EXT_ABS 2 84 | #define EXT_ABSREF32 129 85 | #define EXT_ABSCOMMON 130 86 | #define EXT_RELREF16 131 87 | #define EXT_RELREF8 132 88 | #define EXT_DEXT32 133 89 | #define EXT_DEXT16 134 90 | #define EXT_DEXT8 135 91 | #define EXT_RELREF32 136 92 | #define EXT_RELCOMMON 137 93 | #define EXT_ABSREF16 138 94 | #define EXT_ABSREF8 139 95 | 96 | /* EHF extensions */ 97 | #define EXT_RELREF26 229 98 | -------------------------------------------------------------------------------- /output_test.c: -------------------------------------------------------------------------------- 1 | /* output_test.c example output driver for vasm */ 2 | /* (c) in 2002 by Volker Barthelmann */ 3 | 4 | #include "vasm.h" 5 | 6 | static char *copyright="vasm test output module 1.0 (c) 2002 Volker Barthelmann"; 7 | 8 | static void write_output(FILE *f,section *sec,symbol *sym) 9 | { 10 | fprintf(f,"Sections:\n"); 11 | for(;sec;sec=sec->next) 12 | print_section(f,sec); 13 | 14 | fprintf(f,"Symbols:\n"); 15 | for(;sym;sym=sym->next){ 16 | print_symbol(f,sym); 17 | fprintf(f,"\n"); 18 | } 19 | } 20 | 21 | static int output_args(char *p) 22 | { 23 | /* no args */ 24 | return 0; 25 | } 26 | 27 | int init_output_test(char **cp,void (**wo)(FILE *,section *,symbol *),int (**oa)(char *)) 28 | { 29 | *cp=copyright; 30 | *wo=write_output; 31 | *oa=output_args; 32 | secname_attr = 1; /* attribute is used to differentiate between sections */ 33 | asciiout=1; 34 | return 1; 35 | } 36 | 37 | -------------------------------------------------------------------------------- /output_tos.h: -------------------------------------------------------------------------------- 1 | /* output_tos.h header file for Atari TOS format */ 2 | /* (c) in 2009,2012,2020 by Frank Wille */ 3 | 4 | 5 | /* TOS program header */ 6 | typedef struct 7 | { 8 | uint8_t ph_branch[2]; /* branch to start of program (0x601a) */ 9 | uint8_t ph_tlen[4]; /* .text length */ 10 | uint8_t ph_dlen[4]; /* .data length */ 11 | uint8_t ph_blen[4]; /* .bss length */ 12 | uint8_t ph_slen[4]; /* length of symbol table */ 13 | uint8_t ph_magic[4]; 14 | uint8_t ph_flags[4]; /* Atari special flags */ 15 | uint8_t ph_abs[2]; /* has to be 0, otherwise no relocation takes place */ 16 | } PH; 17 | 18 | 19 | /* DRI symbol table */ 20 | #define DRI_NAMELEN 8 21 | 22 | struct DRIsym 23 | { 24 | char name[DRI_NAMELEN]; 25 | uint8_t type[2]; 26 | uint8_t value[4]; 27 | }; 28 | 29 | #define STYP_UNDEF 0 30 | #define STYP_BSS 0x0100 31 | #define STYP_TEXT 0x0200 32 | #define STYP_DATA 0x0400 33 | #define STYP_EXTERNAL 0x0800 34 | #define STYP_REGISTER 0x1000 35 | #define STYP_GLOBAL 0x2000 36 | #define STYP_EQUATED 0x4000 37 | #define STYP_DEFINED 0x8000 38 | #define STYP_LONGNAME 0x0048 39 | #define STYP_TFILE 0x0280 40 | #define STYP_TFARC 0x02c0 41 | -------------------------------------------------------------------------------- /output_xfile.h: -------------------------------------------------------------------------------- 1 | /* output_xfile.h header file for the Sharp X68000 Xfile format */ 2 | /* (c) in 2018,2020 by Frank Wille */ 3 | 4 | 5 | /* Xfile program header, big endian */ 6 | typedef struct 7 | { 8 | uint8_t x_id[2]; /* 'H','U' - xfile identification */ 9 | uint8_t x_rsrvd1[2]; /* unused - always zero */ 10 | uint8_t x_baseaddr[4]; /* linker's base address */ 11 | uint8_t x_execaddr[4]; /* start address on base address */ 12 | uint8_t x_textsz[4]; /* .text size in bytes */ 13 | uint8_t x_datasz[4]; /* .data size in bytes */ 14 | uint8_t x_heapsz[4]; /* .bss and .stack size in bytes */ 15 | uint8_t x_relocsz[4]; /* relocation table size in bytes */ 16 | uint8_t x_syminfsz[4]; /* symbol info size in bytes */ 17 | uint8_t x_scdlinsz[4]; /* SCD line info size */ 18 | uint8_t x_scdsymsz[4]; /* SCD symbols size */ 19 | uint8_t x_scdstrsz[4]; /* SCD strings size */ 20 | uint8_t x_rsrvd2[20]; /* unused - always zero */ 21 | } XFILE; 22 | 23 | 24 | /* Xfile symbol table */ 25 | typedef struct 26 | { 27 | uint16_t type; 28 | uint32_t value; 29 | char name[1]; /* null-terminated symbol name, padded to even */ 30 | } Xsym; 31 | 32 | #define XSYM_ABS 0x0200 33 | #define XSYM_TEXT 0x0201 34 | #define XSYM_DATA 0x0202 35 | #define XSYM_BSS 0x0203 36 | #define XSYM_STACK 0x0204 37 | -------------------------------------------------------------------------------- /parse.h: -------------------------------------------------------------------------------- 1 | /* parse.h - global parser support functions */ 2 | /* (c) in 2009-2023 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef PARSE_H 5 | #define PARSE_H 6 | 7 | /* defines */ 8 | #define INITLINELEN 256 9 | #ifndef MAXMACPARAMS 10 | #define MAXMACPARAMS 9 11 | #endif 12 | #ifndef MAXMACRECURS 13 | #define MAXMACRECURS 1000 14 | #endif 15 | 16 | 17 | struct macarg { 18 | struct macarg *argnext; 19 | size_t arglen; 20 | char argname[1]; /* extended to real argument length + '\0' */ 21 | }; 22 | #define MACARG_REQUIRED 0xffff /* arglen: indicates there is no default */ 23 | 24 | struct macro { 25 | struct macro *next; 26 | char *name; 27 | char *text; 28 | size_t size; 29 | source *defsrc; 30 | int defline; 31 | int srcdebug; /* allow source-level debugging in macro */ 32 | int num_argnames; /* -1 for no named arguments used */ 33 | struct macarg *argnames; 34 | struct macarg *defaults; 35 | int vararg; 36 | int recursions; 37 | }; 38 | 39 | struct namelen { 40 | size_t len; 41 | char *name; 42 | }; 43 | 44 | /* global variables */ 45 | extern int esc_sequences,nocase_macros; 46 | extern int maxmacparams,maxmacrecurs; 47 | extern int msource_disable; 48 | 49 | /* functions */ 50 | char *escape(char *,char *); 51 | char *cut_trail_blanks(char *); 52 | strbuf *parse_name(int,char **); 53 | char *skip_line(char *); 54 | char *skip_identifier(char *); 55 | strbuf *parse_identifier(int,char **); 56 | strbuf *get_raw_string(char **,char); 57 | char *skip_string(char *,char,size_t *); 58 | char *read_string(char *,char *,char,int); 59 | dblock *parse_string(char **,char,int); 60 | char *parse_symbol(char **); 61 | char *parse_labeldef(char **,int); 62 | int check_indir(char *,char *); 63 | int real_line(void); 64 | void new_repeat(int,char *,char *,struct namelen *,struct namelen *); 65 | int find_macarg_name(source *,char *,size_t); 66 | struct macarg *addmacarg(struct macarg **,char *,char *); 67 | macro *new_macro(char *,struct namelen *,struct namelen *,char *); 68 | macro *find_macro(char *,int); 69 | int execute_macro(char *,int,char **,int *,int,char *); 70 | int leave_macro(void); 71 | int undef_macro(char *); 72 | int copy_macro_param(source *,int,char *,int); 73 | int copy_macro_qual(source *,int,char *,int); 74 | int new_structure(char *); 75 | int end_structure(section **); 76 | section *find_structure(char *,int); 77 | char *read_next_line(void); 78 | int init_parse(void); 79 | 80 | /* new_repeat() repeat-types, a standard repeat-loop has a counter >= 0 */ 81 | #define REPT_IRP -100 /* repetition with a list of values */ 82 | #define REPT_IRPC -101 /* repetition with a list of characters */ 83 | 84 | /* find_macarg_name(), copy_macro_param() for current REPT iterator value */ 85 | #define IRPVAL 10000 86 | 87 | /* macros which may be overwritten by the syntax module */ 88 | #ifndef SKIP_MACRO_ARGNAME 89 | #define SKIP_MACRO_ARGNAME(p) skip_identifier(p) 90 | #endif 91 | #ifndef MACRO_ARG_OPTS 92 | #define MACRO_ARG_OPTS(m,n,a,p) NULL 93 | #endif 94 | #ifndef MACRO_ARG_SEP 95 | #define MACRO_ARG_SEP(p) (*p==',' ? skip(p+1) : NULL) 96 | #endif 97 | #ifndef MACRO_PARAM_SEP 98 | #define MACRO_PARAM_SEP(p) (*p==',' ? skip(p+1) : NULL) 99 | #endif 100 | #ifndef EXEC_MACRO 101 | #define EXEC_MACRO(s) 102 | #endif 103 | 104 | #endif /* PARSE_H */ 105 | -------------------------------------------------------------------------------- /reloc.c: -------------------------------------------------------------------------------- 1 | /* reloc.c - relocation support functions */ 2 | /* (c) in 2010-2016,2020,2022 by Volker Barthelmann and Frank Wille */ 3 | 4 | #include "vasm.h" 5 | 6 | 7 | nreloc *new_nreloc(void) 8 | { 9 | nreloc *new = mymalloc(sizeof(*new)); 10 | new->mask = DEFMASK; 11 | new->byteoffset = new->bitoffset = new->size = 0; 12 | new->addend = 0; 13 | return new; 14 | } 15 | 16 | 17 | rlist *add_extnreloc(rlist **relocs,symbol *sym,taddr addend,int type, 18 | size_t bitoffs,size_t size,size_t byteoffs) 19 | /* add_extnreloc() can specify byteoffset and bitoffset directly. 20 | Use add_nreloc() for the old interface, which calculates 21 | byteoffset and bitoffset from offset. */ 22 | { 23 | rlist *rl; 24 | nreloc *r; 25 | 26 | if (sym->flags & ABSLABEL) 27 | return NULL; /* no relocation, when symbol is from an ORG-section */ 28 | 29 | /* mark symbol as referenced, so we can find unreferenced imported symbols */ 30 | sym->flags |= REFERENCED; 31 | 32 | r = new_nreloc(); 33 | r->byteoffset = byteoffs; 34 | r->bitoffset = bitoffs; 35 | r->size = size; 36 | r->sym = sym; 37 | r->addend = addend; 38 | rl = mymalloc(sizeof(rlist)); 39 | rl->type = type; 40 | rl->reloc = r; 41 | rl->next = *relocs; 42 | *relocs = rl; 43 | 44 | return rl; 45 | } 46 | 47 | 48 | rlist *add_extnreloc_masked(rlist **relocs,symbol *sym,taddr addend,int type, 49 | size_t bitoffs,size_t size,size_t byteoffs, 50 | utaddr mask) 51 | /* add_extnreloc_masked() can specify byteoffset and bitoffset directly. 52 | Use add_nreloc_masked() for the old interface, which calculates 53 | byteoffset and bitoffset from offset. */ 54 | { 55 | rlist *rl; 56 | nreloc *r; 57 | 58 | if (rl = add_extnreloc(relocs,sym,addend,type,bitoffs,size,byteoffs)) { 59 | r = rl->reloc; 60 | r->mask = mask; 61 | } 62 | return rl; 63 | } 64 | 65 | 66 | int is_pc_reloc(symbol *sym,section *cur_sec) 67 | /* Returns true when the symbol needs a REL_PC relocation to reference it 68 | pc-relative. This is the case when it is externally defined or a label 69 | from a different section (so the linker has to resolve the distance). */ 70 | { 71 | if (EXTREF(sym)) 72 | return 1; 73 | else if (LOCREF(sym)) 74 | return (cur_sec->flags & ABSOLUTE) ? 0 : sym->sec != cur_sec; 75 | ierror(0); 76 | return 0; 77 | } 78 | 79 | 80 | void do_pic_check(rlist *rl) 81 | /* generate an error on a non-PC-relative relocation */ 82 | { 83 | nreloc *r; 84 | int t; 85 | 86 | while (rl) { 87 | t = rl->type; 88 | if (t==REL_ABS || t==REL_UABS) { 89 | r = (nreloc *)rl->reloc; 90 | 91 | if (r->sym->type==LABSYM || 92 | (r->sym->type==IMPORT && (r->sym->flags&EXPORT))) 93 | general_error(34); /* relocation not allowed */ 94 | } 95 | rl = rl->next; 96 | } 97 | } 98 | 99 | 100 | taddr nreloc_real_addend(nreloc *nrel) 101 | { 102 | /* In vasm the addend includes the symbol's section offset for LABSYMs */ 103 | if (nrel->sym->type == LABSYM) 104 | return nrel->addend - nrel->sym->pc; 105 | return nrel->addend; 106 | } 107 | 108 | 109 | void unsupp_reloc_error(rlist *rl) 110 | { 111 | if (rl->type <= LAST_STANDARD_RELOC) { 112 | nreloc *r = (nreloc *)rl->reloc; 113 | 114 | /* reloc type not supported */ 115 | output_error(4,rl->type,r->size,(unsigned long)r->mask, 116 | r->sym->name,(unsigned long)r->addend); 117 | } 118 | else 119 | output_error(5,rl->type); 120 | } 121 | 122 | 123 | void print_reloc(FILE *f,int type,nreloc *p) 124 | { 125 | if (type==REL_NONE) 126 | fprintf(f,"rnone("); 127 | else if (type<=LAST_STANDARD_RELOC){ 128 | static const char *rname[] = { 129 | "abs","pc","got","gotrel","gotoff","globdat","plt","pltrel", 130 | "pltoff","sd","uabs","localpc","loadrel","copy","jmpslot","secoff" 131 | }; 132 | fprintf(f,"r%s(%u,%u-%u,0x%llx,0x%llx,",rname[type-1], 133 | (unsigned)p->byteoffset,(unsigned)p->bitoffset, 134 | (unsigned)(p->bitoffset+p->size-1), 135 | ULLTADDR(p->mask),ULLTADDR(p->addend)); 136 | } 137 | #ifdef VASM_CPU_PPC 138 | else if (type<=LAST_PPC_RELOC){ 139 | static const char *rname[] = { 140 | "sd2","sd21","sdi16","drel","brel" 141 | }; 142 | fprintf(f,"r%s(%u,%u-%u,0x%llx,0x%llx,", 143 | rname[type-(LAST_STANDARD_RELOC+1)], 144 | (unsigned)p->byteoffset,(unsigned)p->bitoffset, 145 | (unsigned)(p->bitoffset+p->size-1), 146 | ULLTADDR(p->mask),ULLTADDR(p->addend)); 147 | } 148 | #endif 149 | else 150 | fprintf(f,"unknown reloc("); 151 | 152 | print_symbol(f,p->sym); 153 | fprintf(f,") "); 154 | } 155 | -------------------------------------------------------------------------------- /reloc.h: -------------------------------------------------------------------------------- 1 | /* reloc.h reloc header file for vasm */ 2 | /* (c) in 2002,2005-8,2010,2011,2016 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef RELOC_H 5 | #define RELOC_H 6 | 7 | /* part of standard relocations */ 8 | 9 | #ifndef FIRST_STANDARD_RELOC 10 | #define FIRST_STANDARD_RELOC 0 11 | #endif 12 | 13 | #define REL_NONE FIRST_STANDARD_RELOC 14 | #define REL_ABS (REL_NONE+1) /* standard absolute relocation */ 15 | #define REL_PC (REL_ABS+1) /* PC-relative */ 16 | #define REL_GOT (REL_PC+1) /* symbol's pointer in global off.table */ 17 | #define REL_GOTPC (REL_GOT+1) /* global offset table PC-relative */ 18 | #define REL_GOTOFF (REL_GOTPC+1) /* offset to global offset table */ 19 | #define REL_GLOBDAT (REL_GOTOFF+1) /* global data */ 20 | #define REL_PLT (REL_GLOBDAT+1) /* procedure linkage table */ 21 | #define REL_PLTPC (REL_PLT+1) /* procedure linkage table PC-relative */ 22 | #define REL_PLTOFF (REL_PLTPC+1) /* offset to procedure linkage table */ 23 | #define REL_SD (REL_PLTOFF+1) /* small data base relative */ 24 | #define REL_UABS (REL_SD+1) /* unaligned absolute addr. relocation */ 25 | #define REL_LOCALPC (REL_UABS+1) /* pc-relative to local symbol */ 26 | #define REL_LOADREL (REL_LOCALPC+1) /* relative to load addr., no symbol */ 27 | #define REL_COPY (REL_LOADREL+1) /* copy from shared object */ 28 | #define REL_JMPSLOT (REL_COPY+1) /* procedure linkage table entry */ 29 | #define REL_SECOFF (REL_JMPSLOT+1) /* symbol's offset to start of section */ 30 | #define LAST_STANDARD_RELOC REL_SECOFF 31 | 32 | /* standard reloc struct */ 33 | typedef struct nreloc { 34 | size_t byteoffset; /* byte-offset in data atom to beginning of relocation */ 35 | size_t bitoffset; /* bit-offset adds to byte-off. - start of reloc.field */ 36 | size_t size; /* size of relocation field in bits */ 37 | utaddr mask; 38 | taddr addend; 39 | symbol *sym; 40 | } nreloc; 41 | 42 | typedef struct rlist { 43 | struct rlist *next; 44 | void *reloc; 45 | int type; 46 | } rlist; 47 | 48 | #define DEFMASK (~(utaddr)0) 49 | #define MAKEMASK(x) (((x)>=sizeof(unsigned long long)*CHAR_BIT)?(~(unsigned long long)0):((((unsigned long long)1)<<(x))-1u)) 50 | 51 | 52 | nreloc *new_nreloc(void); 53 | rlist *add_extnreloc(rlist **,symbol *,taddr,int,size_t,size_t,size_t); 54 | rlist *add_extnreloc_masked(rlist **,symbol *,taddr,int,size_t,size_t, 55 | size_t,utaddr); 56 | int is_pc_reloc(symbol *,section *); 57 | void do_pic_check(rlist *); 58 | taddr nreloc_real_addend(nreloc *); 59 | void unsupp_reloc_error(rlist *); 60 | void print_reloc(FILE *,int,nreloc *); 61 | 62 | /* old interface: byteoffset and bitoffset are calculated from offset 'o' */ 63 | #define add_nreloc(r,y,a,t,s,o) \ 64 | add_extnreloc(r,y,a,t,(o)%bitsperbyte,s,(o)/bitsperbyte) 65 | #define add_nreloc_masked(r,y,a,t,s,o,m) \ 66 | add_extnreloc_masked(r,y,a,t,(o)%bitsperbyte,s,(o)/bitsperbyte,m) 67 | 68 | #endif 69 | -------------------------------------------------------------------------------- /source.h: -------------------------------------------------------------------------------- 1 | /* source.h - source files, include paths and dependencies */ 2 | /* (c) in 2020,2022 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef SOURCE_H 5 | #define SOURCE_H 6 | 7 | /* include paths */ 8 | struct include_path { 9 | struct include_path *next; 10 | char *path; 11 | int compdir_based; 12 | }; 13 | 14 | /* source files */ 15 | struct source_file { 16 | struct source_file *next; 17 | struct include_path *incpath; 18 | int index; 19 | char *name; 20 | char *text; 21 | size_t size; 22 | }; 23 | 24 | /* source texts (main file, include files or macros) */ 25 | struct source { 26 | struct source *parent; 27 | int parent_line; 28 | struct source_file *srcfile; 29 | char *name; 30 | char *text; 31 | size_t size; 32 | struct source *defsrc; 33 | int defline; 34 | int srcdebug; 35 | macro *macro; 36 | unsigned long repeat; 37 | char *irpname; 38 | struct macarg *irpvals; 39 | int cond_level; 40 | struct macarg *argnames; 41 | int num_params; 42 | char *param[MAXMACPARAMS+1]; 43 | int param_len[MAXMACPARAMS+1]; 44 | #if MAX_QUALIFIERS > 0 45 | int num_quals; 46 | char *qual[MAX_QUALIFIERS]; 47 | int qual_len[MAX_QUALIFIERS]; 48 | #endif 49 | unsigned long id; 50 | char *srcptr; 51 | int line; 52 | size_t bufsize; 53 | char *linebuf; 54 | #ifdef CARGSYM 55 | expr *cargexp; 56 | #endif 57 | #ifdef REPTNSYM 58 | long reptn; 59 | #endif 60 | }; 61 | 62 | #define DEPEND_LIST 1 63 | #define DEPEND_MAKE 2 64 | struct deplist { 65 | struct deplist *next; 66 | char *filename; 67 | }; 68 | 69 | 70 | extern char *compile_dir; 71 | extern int ignore_multinc,nocompdir,depend,depend_all; 72 | 73 | void write_depends(FILE *); 74 | source *new_source(char *,struct source_file *,char *,size_t); 75 | void end_source(source *); 76 | source *stdin_source(void); 77 | source *include_source(char *); 78 | void include_binary_file(char *,long,unsigned long); 79 | void source_debug_init(int,void *); 80 | struct include_path *new_include_path(char *); 81 | 82 | #endif /* SOURCE_H */ 83 | -------------------------------------------------------------------------------- /stabs.h: -------------------------------------------------------------------------------- 1 | /* stabs.h a.out stabs */ 2 | /* (c) 2015 Frank Wille */ 3 | 4 | #ifndef STABS_H 5 | #define STABS_H 6 | 7 | /* stab definition node, created by .stab* directives */ 8 | struct stabdef { 9 | struct stabdef *next; 10 | union { 11 | char *ptr; 12 | int32_t idx; 13 | } name; 14 | int type; 15 | int other; 16 | int desc; 17 | symbol *base; 18 | taddr value; 19 | }; 20 | 21 | extern struct stabdef *first_nlist,*last_nlist; 22 | 23 | 24 | /* Symbol table entry format */ 25 | struct nlist32 { 26 | int32_t n_strx; /* string table offset */ 27 | uint8_t n_type; /* type defines */ 28 | int8_t n_other; /* spare */ 29 | int16_t n_desc; /* used by stab entries */ 30 | uint32_t n_value; /* address/value of the symbol */ 31 | }; 32 | 33 | #define N_EXT 0x01 /* external (global) bit, OR'ed in */ 34 | #define N_TYPE 0x1e /* mask for all the type bits */ 35 | #define N_STAB 0x0e0 /* mask for debugger symbols */ 36 | 37 | /* symbol types */ 38 | #define N_UNDF 0x00 /* undefined */ 39 | #define N_ABS 0x02 /* absolute address */ 40 | #define N_TEXT 0x04 /* text segment */ 41 | #define N_DATA 0x06 /* data segment */ 42 | #define N_BSS 0x08 /* bss segment */ 43 | #define N_INDR 0x0a /* alias definition */ 44 | #define N_SIZE 0x0c /* pseudo type, defines a symbol's size */ 45 | #define N_WEAKU 0x0d /* GNU: Weak undefined symbol */ 46 | #define N_WEAKA 0x0e /* GNU: Weak absolute symbol */ 47 | #define N_WEAKT 0x0f /* GNU: Weak text symbol */ 48 | #define N_WEAKD 0x10 /* GNU: Weak data symbol */ 49 | #define N_WEAKB 0x11 /* GNU: Weak bss symbol */ 50 | #define N_COMM 0x12 /* common reference */ 51 | #define N_SETA 0x14 /* absolute set element symbol */ 52 | #define N_SETT 0x16 /* text set element symbol */ 53 | #define N_SETD 0x18 /* data set element symbol */ 54 | #define N_SETB 0x1a /* bss set element symbol */ 55 | #define N_SETV 0x1c /* set vector symbol */ 56 | #define N_FN 0x1e /* file name (N_EXT on) */ 57 | #define N_WARN 0x1e /* warning message (N_EXT off) */ 58 | 59 | /* debugging symbols */ 60 | #define N_GSYM 0x20 /* global symbol */ 61 | #define N_FNAME 0x22 /* F77 function name */ 62 | #define N_FUN 0x24 /* procedure name */ 63 | #define N_STSYM 0x26 /* data segment variable */ 64 | #define N_LCSYM 0x28 /* bss segment variable */ 65 | #define N_MAIN 0x2a /* main function name */ 66 | #define N_PC 0x30 /* global Pascal symbol */ 67 | #define N_RSYM 0x40 /* register variable */ 68 | #define N_SLINE 0x44 /* text segment line number */ 69 | #define N_DSLINE 0x46 /* data segment line number */ 70 | #define N_BSLINE 0x48 /* bss segment line number */ 71 | #define N_SSYM 0x60 /* structure/union element */ 72 | #define N_SO 0x64 /* main source file name */ 73 | #define N_LSYM 0x80 /* stack variable */ 74 | #define N_BINCL 0x82 /* include file beginning */ 75 | #define N_SOL 0x84 /* included source file name */ 76 | #define N_PSYM 0xa0 /* parameter variable */ 77 | #define N_EINCL 0xa2 /* include file end */ 78 | #define N_ENTRY 0xa4 /* alternate entry point */ 79 | #define N_LBRAC 0xc0 /* left bracket */ 80 | #define N_EXCL 0xc2 /* deleted include file */ 81 | #define N_RBRAC 0xe0 /* right bracket */ 82 | #define N_BCOMM 0xe2 /* begin common */ 83 | #define N_ECOMM 0xe4 /* end common */ 84 | #define N_ECOML 0xe8 /* end common (local name) */ 85 | #define N_LENG 0xfe /* length of preceding entry */ 86 | 87 | /* n_other & 0x0f */ 88 | #define AUX_UNKNOWN 0 89 | #define AUX_OBJECT 1 90 | #define AUX_FUNC 2 91 | #define AUX_LABEL 3 92 | #define AUX_IGNORE 0xff /* vlink-specific, used to ignore this symbol */ 93 | /* n_other & 0xf0 >> 4 */ 94 | #define BIND_LOCAL 0 /* not used? */ 95 | #define BIND_GLOBAL 1 /* not used? */ 96 | #define BIND_WEAK 2 97 | 98 | #endif /* STABS_H */ 99 | -------------------------------------------------------------------------------- /supp.h: -------------------------------------------------------------------------------- 1 | /* supp.h miscellaneous support routines */ 2 | /* (c) in 2008-2023 by Frank Wille */ 3 | 4 | #ifndef SUPP_H 5 | #define SUPP_H 6 | 7 | struct node { 8 | struct node *next; 9 | struct node *pred; 10 | }; 11 | 12 | struct list { 13 | struct node *first; 14 | struct node *dummy; 15 | struct node *last; 16 | }; 17 | 18 | void initlist(struct list *); 19 | void addtail(struct list *,struct node *); 20 | struct node *remnode(struct node *); 21 | struct node *remhead(struct list *); 22 | 23 | void *mymalloc(size_t); 24 | void *mycalloc(size_t); 25 | void *myrealloc(void *,size_t); 26 | void myfree(void *); 27 | 28 | int field_overflow(int,size_t,taddr); 29 | taddr bf_sign_extend(taddr,int); 30 | uint64_t readval(int,void *,size_t); 31 | void *setval(int,void *,size_t,uint64_t); 32 | void *setval_signext(int,void *,size_t,size_t,int64_t); 33 | uint64_t readbits(int,void *,unsigned,unsigned,unsigned); 34 | void setbits(int,void *,unsigned,unsigned,unsigned,uint64_t); 35 | int countbits(taddr); 36 | void copy_cpu_taddr(void *,taddr,size_t); 37 | int patch_nreloc(atom *,rlist *,int,taddr,int); 38 | 39 | #if FLOAT_PARSER 40 | void conv2ieee32(int,uint8_t *,tfloat); 41 | void conv2ieee64(int,uint8_t *,tfloat); 42 | int flt_chkrange(tfloat,int); 43 | #endif 44 | 45 | void fw8(FILE *,uint8_t); 46 | void fw16(FILE *,uint16_t,int); 47 | void fw24(FILE *,uint32_t,int); 48 | void fw32(FILE *,uint32_t,int); 49 | void fwdata(FILE *,const void *,size_t); 50 | void fwsblock(FILE *,sblock *); 51 | void fwspace(FILE *,size_t); 52 | void fwalign(FILE *,taddr,taddr); 53 | int fwalignpattern(FILE *,taddr,uint8_t *,int); 54 | taddr fwpcalign(FILE *,atom *,section *,taddr); 55 | size_t filesize(FILE *); 56 | int abs_path(char *); 57 | 58 | int stricmp(const char *,const char *); 59 | int strnicmp(const char *,const char *,size_t); 60 | char *mystrdup(const char *); 61 | char *cnvstr(const char *,int); 62 | char *cutstr(strbuf *,const char *,size_t); 63 | char *strbuf_alloc(strbuf *,size_t); 64 | char *strtolower(char *); 65 | int str_is_graph(const char *); 66 | const char *trim(const char *); 67 | char *get_str_arg(const char *); 68 | 69 | taddr balign(taddr,taddr); 70 | taddr palign(taddr,int); 71 | taddr pcalign(atom *,taddr); 72 | int make_padding(taddr,uint8_t *,int); 73 | 74 | taddr get_sym_value(symbol *); 75 | taddr get_sym_size(symbol *); 76 | utaddr get_sec_size(section *); 77 | int get_sec_type(section *); 78 | 79 | /* section types returned by get_sec_type */ 80 | #define S_MISS -1 81 | #define S_TEXT 0 82 | #define S_DATA 1 83 | #define S_BSS 2 84 | #define S_ABS 3 85 | 86 | #endif 87 | -------------------------------------------------------------------------------- /symbol.h: -------------------------------------------------------------------------------- 1 | /* symbol.h - manage all kinds of symbols */ 2 | /* (c) in 2014-2023 by Volker Barthelmann and Frank Wille */ 3 | 4 | #ifndef SYMBOL_H 5 | #define SYMBOL_H 6 | 7 | /* symbol types */ 8 | #define LABSYM 1 9 | #define IMPORT 2 10 | #define EXPRESSION 3 11 | 12 | /* symbol flags */ 13 | #define TYPE_MASK 7 14 | #define TYPE_UNKNOWN 0 15 | #define TYPE_OBJECT 1 16 | #define TYPE_FUNCTION 2 17 | #define TYPE_SECTION 3 18 | #define TYPE_FILE 4 19 | #define TYPE_LAST 4 20 | #define TYPE(sym) ((sym)->flags&TYPE_MASK) 21 | 22 | #define EXPORT (1<<3) 23 | #define INEVAL (1<<4) 24 | #define COMMON (1<<5) 25 | #define WEAK (1<<6) 26 | #define LOCAL (1<<7) /* only informational */ 27 | #define VASMINTERN (1<<8) 28 | #define PROTECTED (1<<9) 29 | #define REFERENCED (1<<10) /* referenced by a relocation */ 30 | #define ABSLABEL (1<<11) 31 | #define EQUATE (1<<12) 32 | #define REGLIST (1<<13) 33 | #define USED (1<<14) /* used in any expression */ 34 | #define NEAR (1<<15) /* may refer symbol with near addressing modes */ 35 | #define XDEF (1<<16) /* must not remain at IMPORT-type */ 36 | #define XREF (1<<17) /* must stay IMPORT-type */ 37 | #define RSRVD_C (1L<<20) /* bits 20..23 are reserved for cpu modules */ 38 | #define RSRVD_S (1L<<24) /* bits 24..27 are reserved for syntax modules */ 39 | #define RSRVD_O (1L<<28) /* bits 28..31 are reserved for output modules */ 40 | 41 | struct symbol { 42 | struct symbol *next; 43 | int type; 44 | uint32_t flags; 45 | char *name; 46 | expr *expr; 47 | expr *size; 48 | section *sec; 49 | taddr pc; 50 | taddr align; 51 | unsigned long idx; /* usable by output module */ 52 | }; 53 | 54 | /* type of symbol references */ 55 | #define LOCREF(symp) ((symp)->type==LABSYM&&!((symp)->flags&WEAK)) 56 | #define EXTREF(symp) ((symp)->type==IMPORT||((symp)->flags&WEAK)) 57 | 58 | 59 | #ifdef HAVE_REGSYMS 60 | /* register symbols */ 61 | struct regsym { 62 | char *reg_name; 63 | int reg_type; 64 | unsigned int reg_flags; 65 | unsigned int reg_num; 66 | }; 67 | #endif /* HAVE_REGSYMS */ 68 | 69 | 70 | extern symbol *first_symbol; 71 | 72 | void print_symbol(FILE *,symbol *); 73 | const char *get_bind_name(symbol *); 74 | void add_symbol(symbol *); 75 | symbol *find_symbol(char *); 76 | void refer_symbol(symbol *,char *); 77 | void save_symbols(void); 78 | void restore_symbols(void); 79 | 80 | int check_symbol(char *); 81 | char *set_last_global_label(char *); 82 | int is_local_label(char *); 83 | strbuf *make_local_label(int,char *,int,char *,int); 84 | symbol *new_abs(char *,expr *); 85 | symbol *new_equate(char *,expr *); 86 | symbol *new_import(char *); 87 | symbol *new_labsym(section *,char *); 88 | symbol *new_tmplabel(section *); 89 | symbol *internal_abs(char *); 90 | expr *set_internal_abs(char *,taddr); 91 | 92 | #ifdef HAVE_REGSYMS 93 | void add_regsym(regsym *); 94 | regsym *find_regsym(char *,int); 95 | regsym *find_regsym_nc(char *,int); 96 | regsym *new_regsym(int,int,char *,int,unsigned int,unsigned int); 97 | int undef_regsym(char *,int,int); 98 | #endif /* HAVE_REGSYMS */ 99 | 100 | int init_symbol(void); 101 | void exit_symbol(void); 102 | 103 | #endif 104 | -------------------------------------------------------------------------------- /symtab.c: -------------------------------------------------------------------------------- 1 | /* symtab.c hashtable file for vasm */ 2 | /* (c) in 2002-2004,2008,2011,2014 by Volker Barthelmann and Frank Wille */ 3 | 4 | #include "vasm.h" 5 | 6 | hashtable *new_hashtable(size_t size) 7 | { 8 | hashtable *new = mymalloc(sizeof(*new)); 9 | 10 | #ifdef LOWMEM 11 | /* minimal hash tables */ 12 | if (size > 0x100) 13 | size = 0x100; 14 | #endif 15 | new->size = size; 16 | new->collisions = 0; 17 | new->entries = mycalloc(size*sizeof(*new->entries)); 18 | return new; 19 | } 20 | 21 | size_t hashcode(const char *name) 22 | { 23 | size_t h = 5381; 24 | int c; 25 | 26 | while (c = (unsigned char)*name++) 27 | h = ((h << 5) + h) + c; 28 | return h; 29 | } 30 | 31 | size_t hashcodelen(const char *name,int len) 32 | { 33 | size_t h = 5381; 34 | 35 | while (len--) 36 | h = ((h << 5) + h) + (unsigned char)*name++; 37 | return h; 38 | } 39 | 40 | size_t hashcode_nc(const char *name) 41 | { 42 | size_t h = 5381; 43 | int c; 44 | 45 | while (c = (unsigned char)*name++) 46 | h = ((h << 5) + h) + tolower(c); 47 | return h; 48 | } 49 | 50 | size_t hashcodelen_nc(const char *name,int len) 51 | { 52 | size_t h = 5381; 53 | 54 | while (len--) 55 | h = ((h << 5) + h) + tolower((unsigned char)*name++); 56 | return h; 57 | } 58 | 59 | /* add to hashtable; name must be unique */ 60 | void add_hashentry(hashtable *ht,const char *name,hashdata data) 61 | { 62 | size_t i=nocase?(hashcode_nc(name)%ht->size):(hashcode(name)%ht->size); 63 | hashentry *new=mymalloc(sizeof(*new)); 64 | new->name=name; 65 | new->data=data; 66 | if(debug){ 67 | if(ht->entries[i]) 68 | ht->collisions++; 69 | } 70 | new->next=ht->entries[i]; 71 | ht->entries[i]=new; 72 | } 73 | 74 | /* remove from hashtable; name must be unique */ 75 | void rem_hashentry(hashtable *ht,const char *name,int no_case) 76 | { 77 | size_t i=no_case?(hashcode_nc(name)%ht->size):(hashcode(name)%ht->size); 78 | hashentry *p,*last; 79 | 80 | for(p=ht->entries[i],last=NULL;p;p=p->next){ 81 | if(!strcmp(name,p->name)||(no_case&&!stricmp(name,p->name))){ 82 | if(last==NULL) 83 | ht->entries[i]=p->next; 84 | else 85 | last->next=p->next; 86 | myfree(p); 87 | return; 88 | } 89 | last=p; 90 | } 91 | ierror(0); 92 | } 93 | 94 | /* finds unique entry in hashtable */ 95 | int find_name(hashtable *ht,const char *name,hashdata *result) 96 | { 97 | if(nocase) 98 | return find_name_nc(ht,name,result); 99 | else{ 100 | size_t i=hashcode(name)%ht->size; 101 | hashentry *p; 102 | for(p=ht->entries[i];p;p=p->next){ 103 | if(!strcmp(name,p->name)){ 104 | *result=p->data; 105 | return 1; 106 | }else 107 | ht->collisions++; 108 | } 109 | } 110 | return 0; 111 | } 112 | 113 | /* same as above, but uses len instead of zero-terminated string */ 114 | int find_namelen(hashtable *ht,const char *name,int len,hashdata *result) 115 | { 116 | if(nocase) 117 | return find_namelen_nc(ht,name,len,result); 118 | else{ 119 | size_t i=hashcodelen(name,len)%ht->size; 120 | hashentry *p; 121 | for(p=ht->entries[i];p;p=p->next){ 122 | if(!strncmp(name,p->name,len)&&p->name[len]==0){ 123 | *result=p->data; 124 | return 1; 125 | }else 126 | ht->collisions++; 127 | } 128 | } 129 | return 0; 130 | } 131 | 132 | /* finds unique entry in hashtable - case insensitive */ 133 | int find_name_nc(hashtable *ht,const char *name,hashdata *result) 134 | { 135 | size_t i=hashcode_nc(name)%ht->size; 136 | hashentry *p; 137 | for(p=ht->entries[i];p;p=p->next){ 138 | if(!stricmp(name,p->name)){ 139 | *result=p->data; 140 | return 1; 141 | }else 142 | ht->collisions++; 143 | } 144 | return 0; 145 | } 146 | 147 | /* same as above, but uses len instead of zero-terminated string */ 148 | int find_namelen_nc(hashtable *ht,const char *name,int len,hashdata *result) 149 | { 150 | size_t i=hashcodelen_nc(name,len)%ht->size; 151 | hashentry *p; 152 | for(p=ht->entries[i];p;p=p->next){ 153 | if(!strnicmp(name,p->name,len)&&p->name[len]==0){ 154 | *result=p->data; 155 | return 1; 156 | }else 157 | ht->collisions++; 158 | } 159 | return 0; 160 | } 161 | -------------------------------------------------------------------------------- /symtab.h: -------------------------------------------------------------------------------- 1 | /* symtab.h hashtable header file for vasm */ 2 | /* (c) in 2002-2004,2008,2014 by Volker Barthelmann and Frank Wille */ 3 | 4 | #include 5 | 6 | typedef union hashdata { 7 | void *ptr; 8 | uint32_t idx; 9 | } hashdata; 10 | 11 | typedef struct hashentry { 12 | const char *name; 13 | hashdata data; 14 | struct hashentry *next; 15 | } hashentry; 16 | 17 | typedef struct hashtable { 18 | hashentry **entries; 19 | size_t size; 20 | int collisions; 21 | } hashtable; 22 | 23 | hashtable *new_hashtable(size_t); 24 | size_t hashcode(const char *); 25 | size_t hashcodelen(const char *,int); 26 | size_t hashcode_nc(const char *); 27 | size_t hashcodelen_nc(const char *,int); 28 | void add_hashentry(hashtable *,const char *,hashdata); 29 | void rem_hashentry(hashtable *,const char *,int); 30 | int find_name(hashtable *,const char *,hashdata *); 31 | int find_namelen(hashtable *,const char *,int,hashdata *); 32 | int find_name_nc(hashtable *,const char *,hashdata *); 33 | int find_namelen_nc(hashtable *,const char *,int,hashdata *); 34 | -------------------------------------------------------------------------------- /syntax/madmac/syntax.h: -------------------------------------------------------------------------------- 1 | /* syntax.h syntax header file for vasm */ 2 | /* (c) in 2015,2017 by Frank Wille */ 3 | 4 | /* macros to recognize identifiers */ 5 | #define ISIDSTART(x) ((x)=='.'||(x)=='?'||(x)=='_'||isalpha((unsigned char)(x))) 6 | #define ISIDCHAR(x) ((x)=='$'||(x)=='?'||(x)=='_'||isalnum((unsigned char)(x))) 7 | #define ISBADID(p,l) ((l)==1&&(*(p)=='.'||*(p)=='?'||*(p)=='_')) 8 | #define ISEOL(p) (*(p)=='\0' || *(p)==commentchar) 9 | 10 | /* result of a boolean operation */ 11 | #define BOOLEAN(x) (x) 12 | 13 | /* overwrite macro defaults */ 14 | #define MAXMACPARAMS 64 15 | -------------------------------------------------------------------------------- /syntax/madmac/syntax_errors.h: -------------------------------------------------------------------------------- 1 | "malformed immediate-if",ERROR, 2 | "cannot export local symbol",ERROR, 3 | "no space before operands",WARNING, 4 | "too many closing parentheses",WARNING, 5 | "missing closing parentheses",WARNING, 6 | "missing operand",ERROR, /* 5 */ 7 | "garbage at end of line",WARNING, 8 | "unknown print format flag \'%c\'",WARNING, 9 | "invalid data operand",ERROR, 10 | "print format corrupted",ERROR, 11 | "identifier expected",ERROR, /* 10 */ 12 | "",WARNING, 13 | "unexpected \"%s\" without \"%s\"",ERROR, 14 | -------------------------------------------------------------------------------- /syntax/mot/syntax.h: -------------------------------------------------------------------------------- 1 | /* syntax.h syntax header file for vasm */ 2 | /* (c) in 2002,2005,2009-2015,2017 3 | by Volker Barthelmann and Frank Wille */ 4 | 5 | /* macros to recognize identifiers */ 6 | int isidchar(char); 7 | int iscomment(char *); 8 | #define ISIDSTART(x) ((x)=='.'||(x)=='@'||(x)=='_'||isalpha((unsigned char)(x))) 9 | #define ISIDCHAR(x) isidchar(x) 10 | #define ISBADID(p,l) ((l)==1&&(*(p)=='.'||*(p)=='@'||*(p)=='_')) 11 | #define ISEOL(p) (*(p)=='\0'||iscomment(p)) 12 | #ifdef VASM_CPU_M68K 13 | char *chkidend(char *,char *); 14 | #define CHKIDEND(s,e) chkidend((s),(e)) 15 | #endif 16 | 17 | /* result of a boolean operation */ 18 | #define BOOLEAN(x) -(x) 19 | 20 | /* we have a special skip() function for expressions, called exp_skip() */ 21 | char *exp_skip(char *); 22 | #define EXPSKIP() s=exp_skip(s) 23 | 24 | /* ignore operand field, when the instruction has no operands */ 25 | #define IGNORE_FIRST_EXTRA_OP 1 26 | 27 | /* symbol which contains the number of macro arguments */ 28 | #define NARGSYM "NARG" 29 | 30 | /* symbol which contains the number of the current macro argument */ 31 | #define CARGSYM "CARG" 32 | 33 | /* symbol which contains the current rept-endr iteration count */ 34 | #define REPTNSYM "REPTN" 35 | 36 | /* overwrite macro defaults */ 37 | #define MAXMACPARAMS 35 38 | #define SKIP_MACRO_ARGNAME(p) (NULL) 39 | void my_exec_macro(source *); 40 | #define EXEC_MACRO(s) my_exec_macro(s) 41 | -------------------------------------------------------------------------------- /syntax/mot/syntax_errors.h: -------------------------------------------------------------------------------- 1 | "mnemonic expected",ERROR, 2 | "invalid extension",ERROR, 3 | "no space before operands",WARNING, 4 | "too many closing parentheses",WARNING, 5 | "missing closing parentheses",WARNING, 6 | "missing operand",ERROR, /* 5 */ 7 | "garbage at end of line",WARNING, 8 | "syntax error",ERROR, 9 | "invalid data operand",ERROR, 10 | ", expected",WARNING, 11 | "identifier expected",ERROR, /* 10 */ 12 | "directive has no effect",WARNING, 13 | "unexpected \"%s\" without \"%s\"",ERROR, 14 | "illegal section type",ERROR, 15 | "macro id insert on empty stack",ERROR, 16 | "illegal memory type",ERROR, /* 15 */ 17 | "macro id stack overflow",ERROR, 18 | "macro id pull without matching push",ERROR, 19 | "check comment",WARNING, 20 | "invalid numeric expansion",ERROR, 21 | "einline without inline",ERROR, /* 20 */ 22 | "missing %c",WARNING, 23 | "maximum inline nesting depth exceeded (%d)",ERROR, 24 | "skipping instruction in struct init",WARNING, 25 | "last %d bytes of string constant have been cut",WARNING, 26 | "conditional assembly for pass 1 is not really supported, " /* 25 */ 27 | "assuming true",WARNING, 28 | "conditional assembly for pass 2 is not really supported, assuming false", 29 | WARNING, 30 | "modified memory attributes for section \"%s\"",ERROR, 31 | -------------------------------------------------------------------------------- /syntax/oldstyle/syntax.h: -------------------------------------------------------------------------------- 1 | /* syntax.h syntax header file for vasm */ 2 | /* (c) in 2002,2012,2014,2017,2020 by Frank Wille */ 3 | 4 | /* macros to recognize identifiers */ 5 | int isidchar(char); 6 | #define ISIDSTART(x) ((x)=='.'||(x)=='_'||isalpha((unsigned char)(x))) 7 | #define ISIDCHAR(x) isidchar(x) 8 | #define ISBADID(p,l) ((l)==1&&(*(p)=='.'||*(p)=='_')) 9 | #define ISEOL(p) (*(p)=='\0' || *(p)==commentchar) 10 | 11 | /* result of a boolean operation */ 12 | #define BOOLEAN(x) -(x) 13 | 14 | /* we have a special skip() function for expressions, called exp_skip() */ 15 | char *exp_skip(char *); 16 | #define EXPSKIP() s=exp_skip(s) 17 | 18 | /* operator separation characters */ 19 | #ifndef OPERSEP_COMMA 20 | #define OPERSEP_COMMA 1 21 | #endif 22 | #ifndef OPERSEP_BLANK 23 | #define OPERSEP_BLANK 0 24 | #endif 25 | 26 | /* ignore operand field, when the instruction has no operands */ 27 | extern int igntrail; 28 | #define IGNORE_FIRST_EXTRA_OP (igntrail) 29 | 30 | /* symbol which contains the current rept-endr iteration count */ 31 | #define REPTNSYM "__RPTCNT" 32 | 33 | /* overwrite macro defaults */ 34 | #define MAXMACPARAMS 35 35 | char *my_skip_macro_arg(char *); 36 | #define SKIP_MACRO_ARGNAME(p) my_skip_macro_arg(p) 37 | -------------------------------------------------------------------------------- /syntax/oldstyle/syntax_errors.h: -------------------------------------------------------------------------------- 1 | "syntax error",ERROR, 2 | "invalid extension",ERROR, 3 | "no space before operands",WARNING, 4 | "too many closing parentheses",WARNING, 5 | "missing closing parentheses",WARNING, 6 | "missing operand",ERROR, /* 5 */ 7 | "garbage at end of line",WARNING, 8 | "%c expected",WARNING, 9 | "invalid data operand",ERROR, 10 | ", expected",WARNING, 11 | "identifier expected",ERROR, /* 10 */ 12 | "invalid numeric expansion",ERROR, 13 | "unexpected \"%s\" without \"%s\"",ERROR, 14 | "dsect already active",ERROR, 15 | "dend without dsect",ERROR, 16 | "missing dend",ERROR, /* 15 */ 17 | "maximum inline nesting depth exceeded (%d)",ERROR, 18 | "einline without inline",ERROR, 19 | "",ERROR, 20 | "",ERROR, 21 | "",WARNING, /* 20 */ 22 | "alignment too big",WARNING, 23 | "label <%s> has already been defined",WARNING, 24 | "skipping instruction in struct init",WARNING, 25 | "last %d bytes of string constant have been cut",WARNING, 26 | -------------------------------------------------------------------------------- /syntax/std/syntax.h: -------------------------------------------------------------------------------- 1 | /* syntax.h syntax header file for vasm */ 2 | /* (c) in 2002-2005,2015,2017 by Volker Barthelmann and Frank Wille */ 3 | 4 | /* macros to recognize identifiers */ 5 | #define ISIDSTART(x) ((x)=='.'||(x)=='_'||(x)=='$'||(x)=='@'||isalpha((unsigned char)(x))) 6 | #define ISIDCHAR(x) ((x)=='.'||(x)=='_'||(x)=='$'||isalnum((unsigned char)(x))) 7 | #define ISBADID(p,l) ((l)==1&&(*(p)=='.'||*(p)=='_'||*(p)=='$'||*(p)=='@')) 8 | #define ISEOL(p) (*(p)=='\0'||*(p)==commentchar) 9 | #if defined(VASM_CPU_M68K) 10 | char *chkidend(char *,char *); 11 | #define CHKIDEND(s,e) chkidend((s),(e)) 12 | #endif 13 | 14 | /* result of a boolean operation */ 15 | #define BOOLEAN(x) -(x) 16 | 17 | #ifndef CPU_DEF_ALIGN 18 | #define CPU_DEF_ALIGN 2 /* power2-alignment is default for .align */ 19 | #endif 20 | 21 | /* overwrite macro defaults */ 22 | #define MAXMACPARAMS 64 23 | char *macro_arg_opts(macro *,int,char *,char *); 24 | #define MACRO_ARG_OPTS(m,n,a,p) macro_arg_opts(m,n,a,p) 25 | #define MACRO_ARG_SEP(p) (*p==',' ? skip(p+1) : p) 26 | #define MACRO_PARAM_SEP(p) (*p==',' ? skip(p+1) : p) 27 | void my_exec_macro(source *); 28 | #define EXEC_MACRO(s) my_exec_macro(s) 29 | -------------------------------------------------------------------------------- /syntax/std/syntax_errors.h: -------------------------------------------------------------------------------- 1 | "mnemonic expected",ERROR, 2 | "invalid extension",ERROR, 3 | "no space before operands",WARNING, 4 | "too many closing parentheses",WARNING, 5 | "missing closing parentheses",WARNING, 6 | "missing operand",ERROR, /* 5 */ 7 | "scratch at end of line",WARNING, 8 | "section flags expected",ERROR, 9 | "invalid data operand",ERROR, 10 | "memory flags expected",ERROR, 11 | "identifier expected",ERROR, /* 10 */ 12 | "assembly aborted",ERROR, 13 | "unexpected \"%s\" without \"%s\"",ERROR, 14 | "pointless default value for required parameter <%s>",ERROR, 15 | "invalid section type ignored, assuming progbits",WARNING, 16 | "",ERROR, /* 15 */ 17 | "",ERROR, 18 | "",ERROR, 19 | "syntax error",ERROR, 20 | "",ERROR, 21 | "section name expected",ERROR, /* 20 */ 22 | ".fail %lld encountered",WARNING, 23 | ".fail %lld encountered",ERROR, 24 | "alignment too big",WARNING, 25 | -------------------------------------------------------------------------------- /syntax/test/syntax.h: -------------------------------------------------------------------------------- 1 | /* syntax.h syntax header file for vasm */ 2 | /* (c) in 2002 by Volker Barthelmann */ 3 | 4 | /* macros to recognize identifiers */ 5 | #define ISIDSTART(x) ((x)=='.'||(x)=='_'||isalpha((unsigned char)(x))) 6 | #define ISIDCHAR(x) ((x)=='.'||(x)=='_'||isalnum((unsigned char)(x))) 7 | #define ISBADID(p,l) ((l)==1&&(*(p)=='.'||*(p)=='_')) 8 | #define ISEOL(p) (*(p)=='\0'||*(p)==commentchar) 9 | 10 | /* result of a boolean operation */ 11 | #define BOOLEAN(x) (x) 12 | -------------------------------------------------------------------------------- /syntax/test/syntax_errors.h: -------------------------------------------------------------------------------- 1 | "mnemonic expected",ERROR, 2 | "invalid extension",ERROR, 3 | "no space before operands",WARNING, 4 | "too many closing parentheses",WARNING, 5 | "missing closing parentheses",WARNING, 6 | "missing operand",ERROR, /* 5 */ 7 | "scratch at end of line",WARNING, 8 | "\" expected",WARNING, 9 | "invalid data operand",ERROR, 10 | ", expected",WARNING, 11 | "identifier expected",ERROR, /* 10 */ 12 | "",WARNING, 13 | "expression must be constant",ERROR, 14 | -------------------------------------------------------------------------------- /tfloat.h: -------------------------------------------------------------------------------- 1 | /* tfloat.h Floating point type and string conversion function. */ 2 | /* (c) 2014 Frank Wille */ 3 | 4 | #if defined(__VBCC__) || (defined(_MSC_VER) && _MSC_VER < 1800) || defined(__CYGWIN__) 5 | typedef double tfloat; 6 | #define strtotfloat(n,e) strtod(n,e) 7 | #else 8 | typedef long double tfloat; 9 | #define strtotfloat(n,e) strtold(n,e) 10 | #endif 11 | -------------------------------------------------------------------------------- /vobjdump.h: -------------------------------------------------------------------------------- 1 | /* 2 | * vobjdump 3 | * Views the contents of a VOBJ file. 4 | * Written by Frank Wille . 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | 13 | /* symbol types */ 14 | #define LABSYM 1 15 | #define IMPORT 2 16 | #define EXPRESSION 3 17 | 18 | /* symbol flags */ 19 | #define TYPE(sym) ((sym)->flags&7) 20 | #define TYPE_UNKNOWN 0 21 | #define TYPE_OBJECT 1 22 | #define TYPE_FUNCTION 2 23 | #define TYPE_SECTION 3 24 | #define TYPE_FILE 4 25 | 26 | #define EXPORT 8 27 | #define INEVAL 16 28 | #define COMMON 32 29 | #define WEAK 64 30 | 31 | 32 | typedef int64_t taddr; 33 | typedef uint8_t ubyte; 34 | 35 | struct vobj_symbol { 36 | size_t offs; 37 | const char *name; 38 | int type,flags,sec,size; 39 | taddr val; 40 | }; 41 | 42 | struct vobj_section { 43 | size_t offs; 44 | const char *name; 45 | taddr dsize,fsize; 46 | }; 47 | 48 | #define makemask(x) ((taddr)(1LL<<(x))-1) 49 | --------------------------------------------------------------------------------