├── .gitattributes
├── .gitignore
├── README.md
└── STM32Serial
├── .mxproject
├── Drivers
├── CMSIS
│ ├── DSP_Lib
│ │ └── Source
│ │ │ ├── BasicMathFunctions
│ │ │ ├── arm_abs_f32.c
│ │ │ ├── arm_abs_q15.c
│ │ │ ├── arm_abs_q31.c
│ │ │ ├── arm_abs_q7.c
│ │ │ ├── arm_add_f32.c
│ │ │ ├── arm_add_q15.c
│ │ │ ├── arm_add_q31.c
│ │ │ ├── arm_add_q7.c
│ │ │ ├── arm_dot_prod_f32.c
│ │ │ ├── arm_dot_prod_q15.c
│ │ │ ├── arm_dot_prod_q31.c
│ │ │ ├── arm_dot_prod_q7.c
│ │ │ ├── arm_mult_f32.c
│ │ │ ├── arm_mult_q15.c
│ │ │ ├── arm_mult_q31.c
│ │ │ ├── arm_mult_q7.c
│ │ │ ├── arm_negate_f32.c
│ │ │ ├── arm_negate_q15.c
│ │ │ ├── arm_negate_q31.c
│ │ │ ├── arm_negate_q7.c
│ │ │ ├── arm_offset_f32.c
│ │ │ ├── arm_offset_q15.c
│ │ │ ├── arm_offset_q31.c
│ │ │ ├── arm_offset_q7.c
│ │ │ ├── arm_scale_f32.c
│ │ │ ├── arm_scale_q15.c
│ │ │ ├── arm_scale_q31.c
│ │ │ ├── arm_scale_q7.c
│ │ │ ├── arm_shift_q15.c
│ │ │ ├── arm_shift_q31.c
│ │ │ ├── arm_shift_q7.c
│ │ │ ├── arm_sub_f32.c
│ │ │ ├── arm_sub_q15.c
│ │ │ ├── arm_sub_q31.c
│ │ │ └── arm_sub_q7.c
│ │ │ ├── CommonTables
│ │ │ ├── arm_common_tables.c
│ │ │ └── arm_const_structs.c
│ │ │ ├── ComplexMathFunctions
│ │ │ ├── arm_cmplx_conj_f32.c
│ │ │ ├── arm_cmplx_conj_q15.c
│ │ │ ├── arm_cmplx_conj_q31.c
│ │ │ ├── arm_cmplx_dot_prod_f32.c
│ │ │ ├── arm_cmplx_dot_prod_q15.c
│ │ │ ├── arm_cmplx_dot_prod_q31.c
│ │ │ ├── arm_cmplx_mag_f32.c
│ │ │ ├── arm_cmplx_mag_q15.c
│ │ │ ├── arm_cmplx_mag_q31.c
│ │ │ ├── arm_cmplx_mag_squared_f32.c
│ │ │ ├── arm_cmplx_mag_squared_q15.c
│ │ │ ├── arm_cmplx_mag_squared_q31.c
│ │ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ │ ├── arm_cmplx_mult_real_f32.c
│ │ │ ├── arm_cmplx_mult_real_q15.c
│ │ │ └── arm_cmplx_mult_real_q31.c
│ │ │ ├── ControllerFunctions
│ │ │ ├── arm_pid_init_f32.c
│ │ │ ├── arm_pid_init_q15.c
│ │ │ ├── arm_pid_init_q31.c
│ │ │ ├── arm_pid_reset_f32.c
│ │ │ ├── arm_pid_reset_q15.c
│ │ │ ├── arm_pid_reset_q31.c
│ │ │ ├── arm_sin_cos_f32.c
│ │ │ └── arm_sin_cos_q31.c
│ │ │ ├── FastMathFunctions
│ │ │ ├── arm_cos_f32.c
│ │ │ ├── arm_cos_q15.c
│ │ │ ├── arm_cos_q31.c
│ │ │ ├── arm_sin_f32.c
│ │ │ ├── arm_sin_q15.c
│ │ │ ├── arm_sin_q31.c
│ │ │ ├── arm_sqrt_q15.c
│ │ │ └── arm_sqrt_q31.c
│ │ │ ├── FilteringFunctions
│ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ │ ├── arm_biquad_cascade_df1_f32.c
│ │ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ │ ├── arm_biquad_cascade_df1_q15.c
│ │ │ ├── arm_biquad_cascade_df1_q31.c
│ │ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ │ ├── arm_biquad_cascade_df2T_f64.c
│ │ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ │ ├── arm_biquad_cascade_df2T_init_f64.c
│ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c
│ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c
│ │ │ ├── arm_conv_f32.c
│ │ │ ├── arm_conv_fast_opt_q15.c
│ │ │ ├── arm_conv_fast_q15.c
│ │ │ ├── arm_conv_fast_q31.c
│ │ │ ├── arm_conv_opt_q15.c
│ │ │ ├── arm_conv_opt_q7.c
│ │ │ ├── arm_conv_partial_f32.c
│ │ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ │ ├── arm_conv_partial_fast_q15.c
│ │ │ ├── arm_conv_partial_fast_q31.c
│ │ │ ├── arm_conv_partial_opt_q15.c
│ │ │ ├── arm_conv_partial_opt_q7.c
│ │ │ ├── arm_conv_partial_q15.c
│ │ │ ├── arm_conv_partial_q31.c
│ │ │ ├── arm_conv_partial_q7.c
│ │ │ ├── arm_conv_q15.c
│ │ │ ├── arm_conv_q31.c
│ │ │ ├── arm_conv_q7.c
│ │ │ ├── arm_correlate_f32.c
│ │ │ ├── arm_correlate_fast_opt_q15.c
│ │ │ ├── arm_correlate_fast_q15.c
│ │ │ ├── arm_correlate_fast_q31.c
│ │ │ ├── arm_correlate_opt_q15.c
│ │ │ ├── arm_correlate_opt_q7.c
│ │ │ ├── arm_correlate_q15.c
│ │ │ ├── arm_correlate_q31.c
│ │ │ ├── arm_correlate_q7.c
│ │ │ ├── arm_fir_decimate_f32.c
│ │ │ ├── arm_fir_decimate_fast_q15.c
│ │ │ ├── arm_fir_decimate_fast_q31.c
│ │ │ ├── arm_fir_decimate_init_f32.c
│ │ │ ├── arm_fir_decimate_init_q15.c
│ │ │ ├── arm_fir_decimate_init_q31.c
│ │ │ ├── arm_fir_decimate_q15.c
│ │ │ ├── arm_fir_decimate_q31.c
│ │ │ ├── arm_fir_f32.c
│ │ │ ├── arm_fir_fast_q15.c
│ │ │ ├── arm_fir_fast_q31.c
│ │ │ ├── arm_fir_init_f32.c
│ │ │ ├── arm_fir_init_q15.c
│ │ │ ├── arm_fir_init_q31.c
│ │ │ ├── arm_fir_init_q7.c
│ │ │ ├── arm_fir_interpolate_f32.c
│ │ │ ├── arm_fir_interpolate_init_f32.c
│ │ │ ├── arm_fir_interpolate_init_q15.c
│ │ │ ├── arm_fir_interpolate_init_q31.c
│ │ │ ├── arm_fir_interpolate_q15.c
│ │ │ ├── arm_fir_interpolate_q31.c
│ │ │ ├── arm_fir_lattice_f32.c
│ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ ├── arm_fir_lattice_q15.c
│ │ │ ├── arm_fir_lattice_q31.c
│ │ │ ├── arm_fir_q15.c
│ │ │ ├── arm_fir_q31.c
│ │ │ ├── arm_fir_q7.c
│ │ │ ├── arm_fir_sparse_f32.c
│ │ │ ├── arm_fir_sparse_init_f32.c
│ │ │ ├── arm_fir_sparse_init_q15.c
│ │ │ ├── arm_fir_sparse_init_q31.c
│ │ │ ├── arm_fir_sparse_init_q7.c
│ │ │ ├── arm_fir_sparse_q15.c
│ │ │ ├── arm_fir_sparse_q31.c
│ │ │ ├── arm_fir_sparse_q7.c
│ │ │ ├── arm_iir_lattice_f32.c
│ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ ├── arm_iir_lattice_q15.c
│ │ │ ├── arm_iir_lattice_q31.c
│ │ │ ├── arm_lms_f32.c
│ │ │ ├── arm_lms_init_f32.c
│ │ │ ├── arm_lms_init_q15.c
│ │ │ ├── arm_lms_init_q31.c
│ │ │ ├── arm_lms_norm_f32.c
│ │ │ ├── arm_lms_norm_init_f32.c
│ │ │ ├── arm_lms_norm_init_q15.c
│ │ │ ├── arm_lms_norm_init_q31.c
│ │ │ ├── arm_lms_norm_q15.c
│ │ │ ├── arm_lms_norm_q31.c
│ │ │ ├── arm_lms_q15.c
│ │ │ └── arm_lms_q31.c
│ │ │ ├── MatrixFunctions
│ │ │ ├── arm_mat_add_f32.c
│ │ │ ├── arm_mat_add_q15.c
│ │ │ ├── arm_mat_add_q31.c
│ │ │ ├── arm_mat_cmplx_mult_f32.c
│ │ │ ├── arm_mat_cmplx_mult_q15.c
│ │ │ ├── arm_mat_cmplx_mult_q31.c
│ │ │ ├── arm_mat_init_f32.c
│ │ │ ├── arm_mat_init_q15.c
│ │ │ ├── arm_mat_init_q31.c
│ │ │ ├── arm_mat_inverse_f32.c
│ │ │ ├── arm_mat_inverse_f64.c
│ │ │ ├── arm_mat_mult_f32.c
│ │ │ ├── arm_mat_mult_fast_q15.c
│ │ │ ├── arm_mat_mult_fast_q31.c
│ │ │ ├── arm_mat_mult_q15.c
│ │ │ ├── arm_mat_mult_q31.c
│ │ │ ├── arm_mat_scale_f32.c
│ │ │ ├── arm_mat_scale_q15.c
│ │ │ ├── arm_mat_scale_q31.c
│ │ │ ├── arm_mat_sub_f32.c
│ │ │ ├── arm_mat_sub_q15.c
│ │ │ ├── arm_mat_sub_q31.c
│ │ │ ├── arm_mat_trans_f32.c
│ │ │ ├── arm_mat_trans_q15.c
│ │ │ └── arm_mat_trans_q31.c
│ │ │ ├── StatisticsFunctions
│ │ │ ├── arm_max_f32.c
│ │ │ ├── arm_max_q15.c
│ │ │ ├── arm_max_q31.c
│ │ │ ├── arm_max_q7.c
│ │ │ ├── arm_mean_f32.c
│ │ │ ├── arm_mean_q15.c
│ │ │ ├── arm_mean_q31.c
│ │ │ ├── arm_mean_q7.c
│ │ │ ├── arm_min_f32.c
│ │ │ ├── arm_min_q15.c
│ │ │ ├── arm_min_q31.c
│ │ │ ├── arm_min_q7.c
│ │ │ ├── arm_power_f32.c
│ │ │ ├── arm_power_q15.c
│ │ │ ├── arm_power_q31.c
│ │ │ ├── arm_power_q7.c
│ │ │ ├── arm_rms_f32.c
│ │ │ ├── arm_rms_q15.c
│ │ │ ├── arm_rms_q31.c
│ │ │ ├── arm_std_f32.c
│ │ │ ├── arm_std_q15.c
│ │ │ ├── arm_std_q31.c
│ │ │ ├── arm_var_f32.c
│ │ │ ├── arm_var_q15.c
│ │ │ └── arm_var_q31.c
│ │ │ ├── SupportFunctions
│ │ │ ├── arm_copy_f32.c
│ │ │ ├── arm_copy_q15.c
│ │ │ ├── arm_copy_q31.c
│ │ │ ├── arm_copy_q7.c
│ │ │ ├── arm_fill_f32.c
│ │ │ ├── arm_fill_q15.c
│ │ │ ├── arm_fill_q31.c
│ │ │ ├── arm_fill_q7.c
│ │ │ ├── arm_float_to_q15.c
│ │ │ ├── arm_float_to_q31.c
│ │ │ ├── arm_float_to_q7.c
│ │ │ ├── arm_q15_to_float.c
│ │ │ ├── arm_q15_to_q31.c
│ │ │ ├── arm_q15_to_q7.c
│ │ │ ├── arm_q31_to_float.c
│ │ │ ├── arm_q31_to_q15.c
│ │ │ ├── arm_q31_to_q7.c
│ │ │ ├── arm_q7_to_float.c
│ │ │ ├── arm_q7_to_q15.c
│ │ │ └── arm_q7_to_q31.c
│ │ │ └── TransformFunctions
│ │ │ ├── arm_bitreversal.c
│ │ │ ├── arm_cfft_f32.c
│ │ │ ├── arm_cfft_q15.c
│ │ │ ├── arm_cfft_q31.c
│ │ │ ├── arm_cfft_radix2_f32.c
│ │ │ ├── arm_cfft_radix2_init_f32.c
│ │ │ ├── arm_cfft_radix2_init_q15.c
│ │ │ ├── arm_cfft_radix2_init_q31.c
│ │ │ ├── arm_cfft_radix2_q15.c
│ │ │ ├── arm_cfft_radix2_q31.c
│ │ │ ├── arm_cfft_radix4_f32.c
│ │ │ ├── arm_cfft_radix4_init_f32.c
│ │ │ ├── arm_cfft_radix4_init_q15.c
│ │ │ ├── arm_cfft_radix4_init_q31.c
│ │ │ ├── arm_cfft_radix4_q15.c
│ │ │ ├── arm_cfft_radix4_q31.c
│ │ │ ├── arm_cfft_radix8_f32.c
│ │ │ ├── arm_dct4_f32.c
│ │ │ ├── arm_dct4_init_f32.c
│ │ │ ├── arm_dct4_init_q15.c
│ │ │ ├── arm_dct4_init_q31.c
│ │ │ ├── arm_dct4_q15.c
│ │ │ ├── arm_dct4_q31.c
│ │ │ ├── arm_rfft_f32.c
│ │ │ ├── arm_rfft_fast_f32.c
│ │ │ ├── arm_rfft_fast_init_f32.c
│ │ │ ├── arm_rfft_init_f32.c
│ │ │ ├── arm_rfft_init_q15.c
│ │ │ ├── arm_rfft_init_q31.c
│ │ │ ├── arm_rfft_q15.c
│ │ │ └── arm_rfft_q31.c
│ ├── Device
│ │ └── ST
│ │ │ └── STM32F1xx
│ │ │ ├── Include
│ │ │ ├── stm32f100xb.h
│ │ │ ├── stm32f100xe.h
│ │ │ ├── stm32f101x6.h
│ │ │ ├── stm32f101xb.h
│ │ │ ├── stm32f101xe.h
│ │ │ ├── stm32f101xg.h
│ │ │ ├── stm32f102x6.h
│ │ │ ├── stm32f102xb.h
│ │ │ ├── stm32f103x6.h
│ │ │ ├── stm32f103xb.h
│ │ │ ├── stm32f103xe.h
│ │ │ ├── stm32f103xg.h
│ │ │ ├── stm32f105xc.h
│ │ │ ├── stm32f107xc.h
│ │ │ ├── stm32f1xx.h
│ │ │ └── system_stm32f1xx.h
│ │ │ └── Source
│ │ │ └── Templates
│ │ │ ├── arm
│ │ │ ├── startup_stm32f100xb.s
│ │ │ ├── startup_stm32f100xe.s
│ │ │ ├── startup_stm32f101x6.s
│ │ │ ├── startup_stm32f101xb.s
│ │ │ ├── startup_stm32f101xe.s
│ │ │ ├── startup_stm32f101xg.s
│ │ │ ├── startup_stm32f102x6.s
│ │ │ ├── startup_stm32f102xb.s
│ │ │ ├── startup_stm32f103x6.s
│ │ │ ├── startup_stm32f103xb.s
│ │ │ ├── startup_stm32f103xe.s
│ │ │ ├── startup_stm32f103xg.s
│ │ │ ├── startup_stm32f105xc.s
│ │ │ └── startup_stm32f107xc.s
│ │ │ ├── gcc
│ │ │ ├── startup_stm32f100xb.s
│ │ │ ├── startup_stm32f100xe.s
│ │ │ ├── startup_stm32f101x6.s
│ │ │ ├── startup_stm32f101xb.s
│ │ │ ├── startup_stm32f101xe.s
│ │ │ ├── startup_stm32f101xg.s
│ │ │ ├── startup_stm32f102x6.s
│ │ │ ├── startup_stm32f102xb.s
│ │ │ ├── startup_stm32f103x6.s
│ │ │ ├── startup_stm32f103xb.s
│ │ │ ├── startup_stm32f103xe.s
│ │ │ ├── startup_stm32f103xg.s
│ │ │ ├── startup_stm32f105xc.s
│ │ │ └── startup_stm32f107xc.s
│ │ │ ├── iar
│ │ │ ├── linker
│ │ │ │ ├── stm32f100xb_flash.icf
│ │ │ │ ├── stm32f100xb_sram.icf
│ │ │ │ ├── stm32f100xe_flash.icf
│ │ │ │ ├── stm32f100xe_sram.icf
│ │ │ │ ├── stm32f101x6_flash.icf
│ │ │ │ ├── stm32f101x6_sram.icf
│ │ │ │ ├── stm32f101xb_flash.icf
│ │ │ │ ├── stm32f101xb_sram.icf
│ │ │ │ ├── stm32f101xe_flash.icf
│ │ │ │ ├── stm32f101xe_sram.icf
│ │ │ │ ├── stm32f101xg_flash.icf
│ │ │ │ ├── stm32f101xg_sram.icf
│ │ │ │ ├── stm32f102x6_flash.icf
│ │ │ │ ├── stm32f102x6_sram.icf
│ │ │ │ ├── stm32f102xb_flash.icf
│ │ │ │ ├── stm32f102xb_sram.icf
│ │ │ │ ├── stm32f103x6_flash.icf
│ │ │ │ ├── stm32f103x6_sram.icf
│ │ │ │ ├── stm32f103xb_flash.icf
│ │ │ │ ├── stm32f103xb_sram.icf
│ │ │ │ ├── stm32f103xe_flash.icf
│ │ │ │ ├── stm32f103xe_sram.icf
│ │ │ │ ├── stm32f103xg_flash.icf
│ │ │ │ ├── stm32f103xg_sram.icf
│ │ │ │ ├── stm32f105xc_flash.icf
│ │ │ │ ├── stm32f105xc_sram.icf
│ │ │ │ ├── stm32f107xc_flash.icf
│ │ │ │ └── stm32f107xc_sram.icf
│ │ │ ├── startup_stm32f100xb.s
│ │ │ ├── startup_stm32f100xe.s
│ │ │ ├── startup_stm32f101x6.s
│ │ │ ├── startup_stm32f101xb.s
│ │ │ ├── startup_stm32f101xe.s
│ │ │ ├── startup_stm32f101xg.s
│ │ │ ├── startup_stm32f102x6.s
│ │ │ ├── startup_stm32f102xb.s
│ │ │ ├── startup_stm32f103x6.s
│ │ │ ├── startup_stm32f103xb.s
│ │ │ ├── startup_stm32f103xe.s
│ │ │ ├── startup_stm32f103xg.s
│ │ │ ├── startup_stm32f105xc.s
│ │ │ └── startup_stm32f107xc.s
│ │ │ └── system_stm32f1xx.c
│ ├── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_const_structs.h
│ │ ├── arm_math.h
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armcc_V6.h
│ │ ├── cmsis_gcc.h
│ │ ├── core_cm0.h
│ │ ├── core_cm0plus.h
│ │ ├── core_cm3.h
│ │ ├── core_cm4.h
│ │ ├── core_cm7.h
│ │ ├── core_cmFunc.h
│ │ ├── core_cmInstr.h
│ │ ├── core_cmSimd.h
│ │ ├── core_sc000.h
│ │ └── core_sc300.h
│ ├── Lib
│ │ ├── ARM
│ │ │ ├── arm_cortexM3b_math.lib
│ │ │ └── arm_cortexM3l_math.lib
│ │ └── GCC
│ │ │ └── libarm_cortexM3l_math.a
│ └── RTOS
│ │ └── Template
│ │ └── cmsis_os.h
└── STM32F1xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32_assert_template.h
│ ├── stm32f1xx_hal.h
│ ├── stm32f1xx_hal_adc.h
│ ├── stm32f1xx_hal_adc_ex.h
│ ├── stm32f1xx_hal_can.h
│ ├── stm32f1xx_hal_can_ex.h
│ ├── stm32f1xx_hal_cec.h
│ ├── stm32f1xx_hal_conf_template.h
│ ├── stm32f1xx_hal_cortex.h
│ ├── stm32f1xx_hal_crc.h
│ ├── stm32f1xx_hal_dac.h
│ ├── stm32f1xx_hal_dac_ex.h
│ ├── stm32f1xx_hal_def.h
│ ├── stm32f1xx_hal_dma.h
│ ├── stm32f1xx_hal_dma_ex.h
│ ├── stm32f1xx_hal_eth.h
│ ├── stm32f1xx_hal_flash.h
│ ├── stm32f1xx_hal_flash_ex.h
│ ├── stm32f1xx_hal_gpio.h
│ ├── stm32f1xx_hal_gpio_ex.h
│ ├── stm32f1xx_hal_hcd.h
│ ├── stm32f1xx_hal_i2c.h
│ ├── stm32f1xx_hal_i2s.h
│ ├── stm32f1xx_hal_irda.h
│ ├── stm32f1xx_hal_iwdg.h
│ ├── stm32f1xx_hal_mmc.h
│ ├── stm32f1xx_hal_nand.h
│ ├── stm32f1xx_hal_nor.h
│ ├── stm32f1xx_hal_pccard.h
│ ├── stm32f1xx_hal_pcd.h
│ ├── stm32f1xx_hal_pcd_ex.h
│ ├── stm32f1xx_hal_pwr.h
│ ├── stm32f1xx_hal_rcc.h
│ ├── stm32f1xx_hal_rcc_ex.h
│ ├── stm32f1xx_hal_rtc.h
│ ├── stm32f1xx_hal_rtc_ex.h
│ ├── stm32f1xx_hal_sd.h
│ ├── stm32f1xx_hal_smartcard.h
│ ├── stm32f1xx_hal_spi.h
│ ├── stm32f1xx_hal_sram.h
│ ├── stm32f1xx_hal_tim.h
│ ├── stm32f1xx_hal_tim_ex.h
│ ├── stm32f1xx_hal_uart.h
│ ├── stm32f1xx_hal_usart.h
│ ├── stm32f1xx_hal_wwdg.h
│ ├── stm32f1xx_ll_adc.h
│ ├── stm32f1xx_ll_bus.h
│ ├── stm32f1xx_ll_cortex.h
│ ├── stm32f1xx_ll_crc.h
│ ├── stm32f1xx_ll_dac.h
│ ├── stm32f1xx_ll_dma.h
│ ├── stm32f1xx_ll_exti.h
│ ├── stm32f1xx_ll_fsmc.h
│ ├── stm32f1xx_ll_gpio.h
│ ├── stm32f1xx_ll_i2c.h
│ ├── stm32f1xx_ll_iwdg.h
│ ├── stm32f1xx_ll_pwr.h
│ ├── stm32f1xx_ll_rcc.h
│ ├── stm32f1xx_ll_rtc.h
│ ├── stm32f1xx_ll_sdmmc.h
│ ├── stm32f1xx_ll_spi.h
│ ├── stm32f1xx_ll_system.h
│ ├── stm32f1xx_ll_tim.h
│ ├── stm32f1xx_ll_usart.h
│ ├── stm32f1xx_ll_usb.h
│ ├── stm32f1xx_ll_utils.h
│ └── stm32f1xx_ll_wwdg.h
│ └── Src
│ ├── stm32f1xx_hal.c
│ ├── stm32f1xx_hal_adc.c
│ ├── stm32f1xx_hal_adc_ex.c
│ ├── stm32f1xx_hal_can.c
│ ├── stm32f1xx_hal_cec.c
│ ├── stm32f1xx_hal_cortex.c
│ ├── stm32f1xx_hal_crc.c
│ ├── stm32f1xx_hal_dac.c
│ ├── stm32f1xx_hal_dac_ex.c
│ ├── stm32f1xx_hal_dma.c
│ ├── stm32f1xx_hal_eth.c
│ ├── stm32f1xx_hal_flash.c
│ ├── stm32f1xx_hal_flash_ex.c
│ ├── stm32f1xx_hal_gpio.c
│ ├── stm32f1xx_hal_gpio_ex.c
│ ├── stm32f1xx_hal_hcd.c
│ ├── stm32f1xx_hal_i2c.c
│ ├── stm32f1xx_hal_i2s.c
│ ├── stm32f1xx_hal_irda.c
│ ├── stm32f1xx_hal_iwdg.c
│ ├── stm32f1xx_hal_mmc.c
│ ├── stm32f1xx_hal_msp_template.c
│ ├── stm32f1xx_hal_nand.c
│ ├── stm32f1xx_hal_nor.c
│ ├── stm32f1xx_hal_pccard.c
│ ├── stm32f1xx_hal_pcd.c
│ ├── stm32f1xx_hal_pcd_ex.c
│ ├── stm32f1xx_hal_pwr.c
│ ├── stm32f1xx_hal_rcc.c
│ ├── stm32f1xx_hal_rcc_ex.c
│ ├── stm32f1xx_hal_rtc.c
│ ├── stm32f1xx_hal_rtc_ex.c
│ ├── stm32f1xx_hal_sd.c
│ ├── stm32f1xx_hal_smartcard.c
│ ├── stm32f1xx_hal_spi.c
│ ├── stm32f1xx_hal_spi_ex.c
│ ├── stm32f1xx_hal_sram.c
│ ├── stm32f1xx_hal_tim.c
│ ├── stm32f1xx_hal_tim_ex.c
│ ├── stm32f1xx_hal_timebase_rtc_alarm_template.c
│ ├── stm32f1xx_hal_timebase_tim_template.c
│ ├── stm32f1xx_hal_uart.c
│ ├── stm32f1xx_hal_usart.c
│ ├── stm32f1xx_hal_wwdg.c
│ ├── stm32f1xx_ll_adc.c
│ ├── stm32f1xx_ll_crc.c
│ ├── stm32f1xx_ll_dac.c
│ ├── stm32f1xx_ll_dma.c
│ ├── stm32f1xx_ll_exti.c
│ ├── stm32f1xx_ll_fsmc.c
│ ├── stm32f1xx_ll_gpio.c
│ ├── stm32f1xx_ll_i2c.c
│ ├── stm32f1xx_ll_pwr.c
│ ├── stm32f1xx_ll_rcc.c
│ ├── stm32f1xx_ll_rtc.c
│ ├── stm32f1xx_ll_sdmmc.c
│ ├── stm32f1xx_ll_spi.c
│ ├── stm32f1xx_ll_tim.c
│ ├── stm32f1xx_ll_usart.c
│ ├── stm32f1xx_ll_usb.c
│ └── stm32f1xx_ll_utils.c
├── Inc
├── FreeRTOSConfig.h
├── main.h
├── stm32f1xx_hal_conf.h
└── stm32f1xx_it.h
├── MDK-ARM
├── RTE
│ └── RTE_Components.h
├── STM32Serial.uvguix.AWESOME
├── STM32Serial.uvoptx
├── STM32Serial.uvprojx
├── startup_stm32f103xb.lst
└── startup_stm32f103xb.s
├── Middlewares
└── Third_Party
│ └── FreeRTOS
│ └── Source
│ ├── CMSIS_RTOS
│ ├── cmsis_os.c
│ └── cmsis_os.h
│ ├── croutine.c
│ ├── event_groups.c
│ ├── include
│ ├── FreeRTOS.h
│ ├── FreeRTOSConfig_template.h
│ ├── StackMacros.h
│ ├── croutine.h
│ ├── deprecated_definitions.h
│ ├── event_groups.h
│ ├── list.h
│ ├── mpu_prototypes.h
│ ├── mpu_wrappers.h
│ ├── portable.h
│ ├── projdefs.h
│ ├── queue.h
│ ├── semphr.h
│ ├── task.h
│ └── timers.h
│ ├── list.c
│ ├── portable
│ ├── MemMang
│ │ ├── heap_1.c
│ │ ├── heap_2.c
│ │ ├── heap_3.c
│ │ ├── heap_4.c
│ │ └── heap_5.c
│ └── RVDS
│ │ └── ARM_CM3
│ │ ├── port.c
│ │ └── portmacro.h
│ ├── queue.c
│ ├── tasks.c
│ └── timers.c
├── STM32Serial.ioc
├── Src
├── HardwareConfig.c
├── HardwareConfig.h
├── LoopQueue.c
├── LoopQueue.h
├── UsartDriver.c
├── UsartDriver.h
├── UserTask.c
├── UserTask.h
├── freertos.c
├── main.c
├── stm32f1xx_hal_msp.c
├── stm32f1xx_it.c
└── system_stm32f1xx.c
├── mx.scratch
└── stm32f1xx_hal_uart.c
/.gitattributes:
--------------------------------------------------------------------------------
1 | # Auto detect text files and perform LF normalization
2 | * text=auto
3 |
--------------------------------------------------------------------------------
/.gitignore:
--------------------------------------------------------------------------------
1 | STM32Serial/MDK-ARM/STM32Serial
2 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # STM32_Serial_Frame
2 |
3 | #### 项目基于STM32F103C8T6芯片，可移植到其他芯片中。
4 |
5 | #### 项目基于FreeRTOS和STM32 CubeMX工具包，其中有修改stm32f1xx_hal_uart.c(文件在根目录下)文件，针对STM32CUBEMX工具自动生成的代码，只需将\Drivers\STM32F1xx_HAL_Driver\Src中的同名文件替换即可。
6 |
7 | #### 项目中采用循环队列方式存储收发数据，队列空间大小可在UsartDriver.c中进行修改。
8 |
9 | #### 项目代码可免费使用。
10 |
11 | ##### 如有Bug，望反馈交流（QQ：2281280195）。
12 |
13 | ##### 用户代码在文件 /src/UserTask.c， 用户可针对修改
14 |
15 | ##### 作者：Awesome
16 | ##### 时间： 2018-11-23
17 |
--------------------------------------------------------------------------------
/STM32Serial/.mxproject:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/.mxproject
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0, A1 A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q31.c
9 | *
10 | * Description: Q31 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for the Q31 PID Control.
50 | * @param[in,out] *S points to an instance of the Q31 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q31(
62 | arm_pid_instance_q31 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficient A1 */
74 | S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
75 |
76 |
77 | #else
78 |
79 | /* Run the below code for Cortex-M0 */
80 |
81 | q31_t temp;
82 |
83 | /* Derived coefficient A0 */
84 | temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
85 | S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
86 |
87 | /* Derived coefficient A1 */
88 | temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
89 | S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
90 |
91 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
92 |
93 | /* Derived coefficient A2 */
94 | S->A2 = S->Kd;
95 |
96 | /* Check whether state needs reset or not */
97 | if(resetStateFlag)
98 | {
99 | /* Clear the state buffer. The size will be always 3 samples */
100 | memset(S->state, 0, 3u * sizeof(q31_t));
101 | }
102 |
103 | }
104 |
105 | /**
106 | * @} end of PID group
107 | */
108 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState points to the array of state variables.
67 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q31.c
9 | *
10 | * Description: Q31 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs holds the filter coefficients and has length numTaps.
66 | * pState holds the filter's state variables and must be of length
67 | * maxDelay + blockSize, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize is the number of words processed by arm_fir_sparse_q31() function.
70 | */
71 |
72 | void arm_fir_sparse_init_q31(
73 | arm_fir_sparse_instance_q31 * S,
74 | uint16_t numTaps,
75 | q31_t * pCoeffs,
76 | q31_t * pState,
77 | int32_t * pTapDelay,
78 | uint16_t maxDelay,
79 | uint32_t blockSize)
80 | {
81 | /* Assign filter taps */
82 | S->numTaps = numTaps;
83 |
84 | /* Assign coefficient pointer */
85 | S->pCoeffs = pCoeffs;
86 |
87 | /* Assign TapDelay pointer */
88 | S->pTapDelay = pTapDelay;
89 |
90 | /* Assign MaxDelay */
91 | S->maxDelay = maxDelay;
92 |
93 | /* reset the stateIndex to 0 */
94 | S->stateIndex = 0u;
95 |
96 | /* Clear state buffer and size is always maxDelay + blockSize */
97 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
98 |
99 | /* Assign state pointer */
100 | S->pState = pState;
101 |
102 | }
103 |
104 | /**
105 | * @} end of FIR_Sparse group
106 | */
107 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * The initial filter coefficients serve as a starting point for the adaptive filter.
66 | * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q15.c
9 | *
10 | * Description: Q15 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 LMS filter.
54 | * @param[in] *S points to an instance of the Q15 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to the coefficient buffer.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to the array of state variables and size of array is
70 | * numTaps+blockSize-1 samples, where blockSize is the number of
71 | * input samples processed by each call to arm_lms_q15().
72 | */
73 |
74 | void arm_lms_init_q15(
75 | arm_lms_instance_q15 * S,
76 | uint16_t numTaps,
77 | q15_t * pCoeffs,
78 | q15_t * pState,
79 | q15_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q31.c
9 | *
10 | * Description: Q31 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for Q31 LMS filter.
54 | * @param[in] *S points to an instance of the Q31 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * The initial filter coefficients serve as a starting point for the adaptive filter.
69 | * pState points to an array of length numTaps+blockSize-1 samples,
70 | * where blockSize is the number of input samples processed by each call to
71 | * arm_lms_q31().
72 | */
73 |
74 | void arm_lms_init_q31(
75 | arm_lms_instance_q31 * S,
76 | uint16_t numTaps,
77 | q31_t * pCoeffs,
78 | q31_t * pState,
79 | q31_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_f32.c
9 | *
10 | * Description: Floating-point NLMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS_NORM
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for floating-point normalized LMS filter.
54 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | *
62 | * \par Description:
63 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
64 | *
65 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
66 | *
67 | * The initial filter coefficients serve as a starting point for the adaptive filter.
68 | * pState points to an array of length numTaps+blockSize-1 samples,
69 | * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
70 | */
71 |
72 | void arm_lms_norm_init_f32(
73 | arm_lms_norm_instance_f32 * S,
74 | uint16_t numTaps,
75 | float32_t * pCoeffs,
76 | float32_t * pState,
77 | float32_t mu,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | /* Assign Step size value */
93 | S->mu = mu;
94 |
95 | /* Initialise Energy to zero */
96 | S->energy = 0.0f;
97 |
98 | /* Initialise x0 to zero */
99 | S->x0 = 0.0f;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS_NORM group
105 | */
106 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q31.c
9 | *
10 | * Description: Copies the elements of a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q31 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q31(
62 | q31_t * pSrc,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1, in2, in3, in4;
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 | ** a second loop below computes the remaining 1 to 3 samples. */
79 | while(blkCnt > 0u)
80 | {
81 | /* C = A */
82 | /* Copy and then store the values in the destination buffer */
83 | in1 = *pSrc++;
84 | in2 = *pSrc++;
85 | in3 = *pSrc++;
86 | in4 = *pSrc++;
87 |
88 | *pDst++ = in1;
89 | *pDst++ = in2;
90 | *pDst++ = in3;
91 | *pDst++ = in4;
92 |
93 | /* Decrement the loop counter */
94 | blkCnt--;
95 | }
96 |
97 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 | ** No loop unrolling is used. */
99 | blkCnt = blockSize % 0x4u;
100 |
101 | #else
102 |
103 | /* Run the below code for Cortex-M0 */
104 |
105 | /* Loop over blockSize number of values */
106 | blkCnt = blockSize;
107 |
108 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109 |
110 | while(blkCnt > 0u)
111 | {
112 | /* C = A */
113 | /* Copy and then store the value in the destination buffer */
114 | *pDst++ = *pSrc++;
115 |
116 | /* Decrement the loop counter */
117 | blkCnt--;
118 | }
119 | }
120 |
121 | /**
122 | * @} end of BasicCopy group
123 | */
124 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q7.c
9 | *
10 | * Description: Copies the elements of a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q7 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q7(
62 | q7_t * pSrc,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | /*loop Unrolling */
73 | blkCnt = blockSize >> 2u;
74 |
75 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 | ** a second loop below computes the remaining 1 to 3 samples. */
77 | while(blkCnt > 0u)
78 | {
79 | /* C = A */
80 | /* Copy and then store the results in the destination buffer */
81 | /* 4 samples are copied and stored at a time using SIMD */
82 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83 |
84 | /* Decrement the loop counter */
85 | blkCnt--;
86 | }
87 |
88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 | ** No loop unrolling is used. */
90 | blkCnt = blockSize % 0x4u;
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 |
102 | while(blkCnt > 0u)
103 | {
104 | /* C = A */
105 | /* Copy and then store the results in the destination buffer */
106 | *pDst++ = *pSrc++;
107 |
108 | /* Decrement the loop counter */
109 | blkCnt--;
110 | }
111 | }
112 |
113 | /**
114 | * @} end of BasicCopy group
115 | */
116 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q15.c
9 | *
10 | * Description: Fills a constant value into a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q15 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q15(
62 | q15_t value,
63 | q15_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 |
75 | /*loop Unrolling */
76 | blkCnt = blockSize >> 2u;
77 |
78 | /* Packing two 16 bit values to 32 bit value in order to use SIMD */
79 | packedValue = __PKHBT(value, value, 16u);
80 |
81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 | ** a second loop below computes the remaining 1 to 3 samples. */
83 | while(blkCnt > 0u)
84 | {
85 | /* C = value */
86 | /* Fill the value in the destination buffer */
87 | *__SIMD32(pDst)++ = packedValue;
88 | *__SIMD32(pDst)++ = packedValue;
89 |
90 | /* Decrement the loop counter */
91 | blkCnt--;
92 | }
93 |
94 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
95 | ** No loop unrolling is used. */
96 | blkCnt = blockSize % 0x4u;
97 |
98 | #else
99 |
100 | /* Run the below code for Cortex-M0 */
101 |
102 | /* Loop over blockSize number of values */
103 | blkCnt = blockSize;
104 |
105 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
106 |
107 | while(blkCnt > 0u)
108 | {
109 | /* C = value */
110 | /* Fill the value in the destination buffer */
111 | *pDst++ = value;
112 |
113 | /* Decrement the loop counter */
114 | blkCnt--;
115 | }
116 | }
117 |
118 | /**
119 | * @} end of Fill group
120 | */
121 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q31.c
9 | *
10 | * Description: Fills a constant value into a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q31 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q31(
62 | q31_t value,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1 = value;
73 | q31_t in2 = value;
74 | q31_t in3 = value;
75 | q31_t in4 = value;
76 |
77 | /*loop Unrolling */
78 | blkCnt = blockSize >> 2u;
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *pDst++ = in1;
87 | *pDst++ = in2;
88 | *pDst++ = in3;
89 | *pDst++ = in4;
90 |
91 | /* Decrement the loop counter */
92 | blkCnt--;
93 | }
94 |
95 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
96 | ** No loop unrolling is used. */
97 | blkCnt = blockSize % 0x4u;
98 |
99 | #else
100 |
101 | /* Run the below code for Cortex-M0 */
102 |
103 | /* Loop over blockSize number of values */
104 | blkCnt = blockSize;
105 |
106 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
107 |
108 | while(blkCnt > 0u)
109 | {
110 | /* C = value */
111 | /* Fill the value in the destination buffer */
112 | *pDst++ = value;
113 |
114 | /* Decrement the loop counter */
115 | blkCnt--;
116 | }
117 | }
118 |
119 | /**
120 | * @} end of Fill group
121 | */
122 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q7.c
9 | *
10 | * Description: Fills a constant value into a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q7 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q7(
62 | q7_t value,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* Packing four 8 bit values to 32 bit value in order to use SIMD */
78 | packedValue = __PACKq7(value, value, value, value);
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *__SIMD32(pDst)++ = packedValue;
87 |
88 | /* Decrement the loop counter */
89 | blkCnt--;
90 | }
91 |
92 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
93 | ** No loop unrolling is used. */
94 | blkCnt = blockSize % 0x4u;
95 |
96 | #else
97 |
98 | /* Run the below code for Cortex-M0 */
99 |
100 | /* Loop over blockSize number of values */
101 | blkCnt = blockSize;
102 |
103 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
104 |
105 | while(blkCnt > 0u)
106 | {
107 | /* C = value */
108 | /* Fill the value in the destination buffer */
109 | *pDst++ = value;
110 |
111 | /* Decrement the loop counter */
112 | blkCnt--;
113 | }
114 | }
115 |
116 | /**
117 | * @} end of Fill group
118 | */
119 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.2.0
6 | * @date 31-March-2017
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2017 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /** @addtogroup CMSIS
39 | * @{
40 | */
41 |
42 | /** @addtogroup stm32f10x_system
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief Define to prevent recursive inclusion
48 | */
49 | #ifndef __SYSTEM_STM32F10X_H
50 | #define __SYSTEM_STM32F10X_H
51 |
52 | #ifdef __cplusplus
53 | extern "C" {
54 | #endif
55 |
56 | /** @addtogroup STM32F10x_System_Includes
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 |
65 | /** @addtogroup STM32F10x_System_Exported_types
66 | * @{
67 | */
68 |
69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /** @addtogroup STM32F10x_System_Exported_Constants
78 | * @{
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @addtogroup STM32F10x_System_Exported_Macros
86 | * @{
87 | */
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @addtogroup STM32F10x_System_Exported_Functions
94 | * @{
95 | */
96 |
97 | extern void SystemInit(void);
98 | extern void SystemCoreClockUpdate(void);
99 | /**
100 | * @}
101 | */
102 |
103 | #ifdef __cplusplus
104 | }
105 | #endif
106 |
107 | #endif /*__SYSTEM_STM32F10X_H */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
117 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
32 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Lib/ARM/arm_cortexM3b_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Lib/ARM/arm_cortexM3b_math.lib
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Lib/ARM/arm_cortexM3l_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Lib/ARM/arm_cortexM3l_math.lib
--------------------------------------------------------------------------------
/STM32Serial/Drivers/CMSIS/Lib/GCC/libarm_cortexM3l_math.a:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/CMSIS/Lib/GCC/libarm_cortexM3l_math.a
--------------------------------------------------------------------------------
/STM32Serial/Drivers/STM32F1xx_HAL_Driver/Inc/stm32_assert_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32_assert.h
4 | * @author MCD Application Team
5 | * @brief STM32 assert template file.
6 | * This file should be copied to the application folder and renamed
7 | * to stm32_assert.h.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32_ASSERT_H
40 | #define __STM32_ASSERT_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Exported types ------------------------------------------------------------*/
47 | /* Exported constants --------------------------------------------------------*/
48 | /* Includes ------------------------------------------------------------------*/
49 | /* Exported macro ------------------------------------------------------------*/
50 | #ifdef USE_FULL_ASSERT
51 | /**
52 | * @brief The assert_param macro is used for function's parameters check.
53 | * @param expr: If expr is false, it calls assert_failed function
54 | * which reports the name of the source file and the source
55 | * line number of the call that failed.
56 | * If expr is true, it returns no value.
57 | * @retval None
58 | */
59 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
60 | /* Exported functions ------------------------------------------------------- */
61 | void assert_failed(uint8_t *file, uint32_t line);
62 | #else
63 | #define assert_param(expr) ((void)0U)
64 | #endif /* USE_FULL_ASSERT */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32_ASSERT_H */
71 |
72 |
73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
74 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_msp_template.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_hal_msp_template.c
4 | * @author MCD Application Team
5 | * @brief HAL BSP module.
6 | * This file template is located in the HAL folder and should be copied
7 | * to the user folder.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Includes ------------------------------------------------------------------*/
39 | #include "stm32f1xx_hal.h"
40 |
41 | /** @addtogroup STM32F1xx_HAL_Driver
42 | * @{
43 | */
44 |
45 | /** @defgroup HAL_MSP HAL_MSP
46 | * @brief HAL MSP module.
47 | * @{
48 | */
49 |
50 | /* Private typedef -----------------------------------------------------------*/
51 | /* Private define ------------------------------------------------------------*/
52 | /* Private macro -------------------------------------------------------------*/
53 | /* Private variables ---------------------------------------------------------*/
54 | /* Private function prototypes -----------------------------------------------*/
55 | /* Private functions ---------------------------------------------------------*/
56 |
57 | /** @defgroup HAL_MSP_Exported_Functions HAL MSP Exported Functions
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Initializes the Global MSP.
63 | * @retval None
64 | */
65 | void HAL_MspInit(void)
66 | {
67 |
68 | }
69 |
70 | /**
71 | * @brief DeInitializes the Global MSP.
72 | * @retval None
73 | */
74 | void HAL_MspDeInit(void)
75 | {
76 |
77 | }
78 |
79 | /**
80 | * @brief Initializes the PPP MSP.
81 | * @retval None
82 | */
83 | void HAL_PPP_MspInit(void)
84 | {
85 |
86 | }
87 |
88 | /**
89 | * @brief DeInitializes the PPP MSP.
90 | * @retval None
91 | */
92 | void HAL_PPP_MspDeInit(void)
93 | {
94 |
95 | }
96 |
97 | /**
98 | * @}
99 | */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/STM32Serial/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c
--------------------------------------------------------------------------------
/STM32Serial/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_ll_pwr.c
4 | * @author MCD Application Team
5 | * @brief PWR LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 | #if defined(USE_FULL_LL_DRIVER)
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f1xx_ll_pwr.h"
39 | #include "stm32f1xx_ll_bus.h"
40 |
41 | /** @addtogroup STM32F1xx_LL_Driver
42 | * @{
43 | */
44 |
45 | #if defined(PWR)
46 |
47 | /** @defgroup PWR_LL PWR
48 | * @{
49 | */
50 |
51 | /* Private types -------------------------------------------------------------*/
52 | /* Private variables ---------------------------------------------------------*/
53 | /* Private constants ---------------------------------------------------------*/
54 | /* Private macros ------------------------------------------------------------*/
55 | /* Private function prototypes -----------------------------------------------*/
56 |
57 | /* Exported functions --------------------------------------------------------*/
58 | /** @addtogroup PWR_LL_Exported_Functions
59 | * @{
60 | */
61 |
62 | /** @addtogroup PWR_LL_EF_Init
63 | * @{
64 | */
65 |
66 | /**
67 | * @brief De-initialize the PWR registers to their default reset values.
68 | * @retval An ErrorStatus enumeration value:
69 | * - SUCCESS: PWR registers are de-initialized
70 | * - ERROR: not applicable
71 | */
72 | ErrorStatus LL_PWR_DeInit(void)
73 | {
74 | /* Force reset of PWR clock */
75 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
76 |
77 | /* Release reset of PWR clock */
78 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
79 |
80 | return SUCCESS;
81 | }
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 | #endif /* defined(PWR) */
95 | /**
96 | * @}
97 | */
98 |
99 | #endif /* USE_FULL_LL_DRIVER */
100 |
101 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
102 |
--------------------------------------------------------------------------------
/STM32Serial/Inc/main.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file : main.h
4 | * @brief : Header for main.c file.
5 | * This file contains the common defines of the application.
6 | ******************************************************************************
7 | * This notice applies to any and all portions of this file
8 | * that are not between comment pairs USER CODE BEGIN and
9 | * USER CODE END. Other portions of this file, whether
10 | * inserted by the user or by software development tools
11 | * are owned by their respective copyright owners.
12 | *
13 | * Copyright (c) 2018 STMicroelectronics International N.V.
14 | * All rights reserved.
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted, provided that the following conditions are met:
18 | *
19 | * 1. Redistribution of source code must retain the above copyright notice,
20 | * this list of conditions and the following disclaimer.
21 | * 2. Redistributions in binary form must reproduce the above copyright notice,
22 | * this list of conditions and the following disclaimer in the documentation
23 | * and/or other materials provided with the distribution.
24 | * 3. Neither the name of STMicroelectronics nor the names of other
25 | * contributors to this software may be used to endorse or promote products
26 | * derived from this software without specific written permission.
27 | * 4. This software, including modifications and/or derivative works of this
28 | * software, must execute solely and exclusively on microcontroller or
29 | * microprocessor devices manufactured by or for STMicroelectronics.
30 | * 5. Redistribution and use of this software other than as permitted under
31 | * this license is void and will automatically terminate your rights under
32 | * this license.
33 | *
34 | * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
35 | * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
36 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
37 | * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
38 | * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
39 | * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
40 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
42 | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
43 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
44 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
45 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 | *
47 | ******************************************************************************
48 | */
49 |
50 | /* Define to prevent recursive inclusion -------------------------------------*/
51 | #ifndef __MAIN_H__
52 | #define __MAIN_H__
53 |
54 | /* Includes ------------------------------------------------------------------*/
55 |
56 | /* USER CODE BEGIN Includes */
57 |
58 | /* USER CODE END Includes */
59 |
60 | /* Private define ------------------------------------------------------------*/
61 |
62 | /* ########################## Assert Selection ############################## */
63 | /**
64 | * @brief Uncomment the line below to expanse the "assert_param" macro in the
65 | * HAL drivers code
66 | */
67 | /* #define USE_FULL_ASSERT 1U */
68 |
69 | /* USER CODE BEGIN Private defines */
70 |
71 | /* USER CODE END Private defines */
72 |
73 | #ifdef __cplusplus
74 | extern "C" {
75 | #endif
76 | void _Error_Handler(char *, int);
77 |
78 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__)
79 | #ifdef __cplusplus
80 | }
81 | #endif
82 |
83 | #endif /* __MAIN_H__ */
84 |
85 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
86 |
--------------------------------------------------------------------------------
/STM32Serial/Inc/stm32f1xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f1xx_it.h
4 | * @brief This file contains the headers of the interrupt handlers.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2018 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __STM32F1xx_IT_H
36 | #define __STM32F1xx_IT_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f1xx_hal.h"
44 | #include "main.h"
45 | /* Exported types ------------------------------------------------------------*/
46 | /* Exported constants --------------------------------------------------------*/
47 | /* Exported macro ------------------------------------------------------------*/
48 | /* Exported functions ------------------------------------------------------- */
49 |
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void DebugMon_Handler(void);
56 | void SysTick_Handler(void);
57 | void DMA1_Channel2_IRQHandler(void);
58 | void DMA1_Channel4_IRQHandler(void);
59 | void DMA1_Channel7_IRQHandler(void);
60 | void TIM3_IRQHandler(void);
61 | void USART1_IRQHandler(void);
62 | void USART2_IRQHandler(void);
63 | void USART3_IRQHandler(void);
64 |
65 | #ifdef __cplusplus
66 | }
67 | #endif
68 |
69 | #endif /* __STM32F1xx_IT_H */
70 |
71 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
72 |
--------------------------------------------------------------------------------
/STM32Serial/MDK-ARM/RTE/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'STM32Serial'
7 | * Target: 'STM32Serial'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | #endif /* RTE_COMPONENTS_H */
15 |
--------------------------------------------------------------------------------
/STM32Serial/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
--------------------------------------------------------------------------------
/STM32Serial/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
--------------------------------------------------------------------------------
/STM32Serial/Src/HardwareConfig.c:
--------------------------------------------------------------------------------
1 |
2 | #include "HardwareConfig.h"
3 |
--------------------------------------------------------------------------------
/STM32Serial/Src/HardwareConfig.h:
--------------------------------------------------------------------------------
1 |
2 | #ifndef HARDWARE_CONFIG_H
3 | #define HARDWARE_CONFIG_H
4 |
5 | #include "stm32f1xx_hal.h"
6 | #include "UsartDriver.h"
7 |
8 |
9 | /* led io conifg */
10 |
11 | #define run_led 0
12 | #define status_led 1
13 |
14 | #define ledAction(led, sta) if(led==run_led)HAL_GPIO_WritePin(GPIOB, GPIO_PIN_1, sta);else HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12, sta);
15 |
16 | #define set_run_led() ledAction(run_led, GPIO_PIN_RESET)
17 | #define reset_run_led() ledAction(run_led, GPIO_PIN_SET)
18 |
19 | #define set_status_led() ledAction(status_led, GPIO_PIN_RESET)
20 | #define reset_status_led() ledAction(status_led, GPIO_PIN_SET)
21 |
22 | /* end led define */
23 |
24 | /* RGB1 */
25 |
26 | #define RGB1_RLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, sw)
27 | #define RGB1_GLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, sw)
28 | #define RGB1_BLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, sw)
29 |
30 | #define RGB1_Red() { RGB1_RLED((GPIO_PinState)1); RGB1_GLED((GPIO_PinState)0); RGB1_BLED((GPIO_PinState)0);}
31 | #define RGB1_Green() { RGB1_RLED((GPIO_PinState)0); RGB1_GLED((GPIO_PinState)1); RGB1_BLED((GPIO_PinState)0);}
32 | #define RGB1_Blue() { RGB1_RLED((GPIO_PinState)0); RGB1_GLED((GPIO_PinState)0); RGB1_BLED((GPIO_PinState)1);}
33 | #define RGB1_Close() { RGB1_RLED((GPIO_PinState)0); RGB1_GLED((GPIO_PinState)0); RGB1_BLED((GPIO_PinState)0);}
34 | #define RGB1_Yellow() { RGB1_RLED((GPIO_PinState)1); RGB1_GLED((GPIO_PinState)1); RGB1_BLED((GPIO_PinState)0);}
35 | #define RGB1_Purple() { RGB1_RLED((GPIO_PinState)1); RGB1_GLED((GPIO_PinState)1); RGB1_BLED((GPIO_PinState)1);}
36 |
37 | /* end RGB1 */
38 |
39 | /* RGB2 */
40 | #define RGB2_RLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, sw)
41 | #define RGB2_GLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_9, sw)
42 | #define RGB2_BLED(sw) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, sw)
43 |
44 | #define RGB2_Red() { RGB2_RLED((GPIO_PinState)1); RGB2_GLED((GPIO_PinState)0); RGB2_BLED((GPIO_PinState)0);}
45 | #define RGB2_Green() { RGB2_RLED((GPIO_PinState)0); RGB2_GLED((GPIO_PinState)1); RGB2_BLED((GPIO_PinState)0);}
46 | #define RGB2_Blue() { RGB2_RLED((GPIO_PinState)0); RGB2_GLED((GPIO_PinState)0); RGB2_BLED((GPIO_PinState)1);}
47 | #define RGB2_Close() { RGB2_RLED((GPIO_PinState)0); RGB2_GLED((GPIO_PinState)0); RGB2_BLED((GPIO_PinState)0);}
48 | #define RGB2_Yellow() { RGB2_RLED((GPIO_PinState)1); RGB2_GLED((GPIO_PinState)1); RGB2_BLED((GPIO_PinState)0);}
49 | #define RGB2_Purple() { RGB2_RLED((GPIO_PinState)1); RGB2_GLED((GPIO_PinState)1); RGB2_BLED((GPIO_PinState)1);}
50 |
51 | /* end RGB2 */
52 |
53 | /* beep io config */
54 |
55 | #define set_beep() {HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_SET);}
56 | #define reset_beep() {HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);}
57 |
58 | /* end beep define */
59 |
60 | #endif
61 |
62 |
--------------------------------------------------------------------------------
/STM32Serial/Src/LoopQueue.c:
--------------------------------------------------------------------------------
1 | #include "LoopQueue.h"
2 |
3 | #include "FreeRTOS.h"
4 | #include "task.h"
5 |
6 | /* init the loop queue */
7 | unsigned char init_loop_queue(LoopQueue* plp, DATA_TYPE* p_data, unsigned int len)
8 | {
9 | unsigned int i = 0;
10 |
11 | if((void*)0==plp || 0==len || (void*)0==p_data) return 0;
12 |
13 | plp->insert_index = 0;
14 | plp->read_index = 0;
15 | plp->count = 0;
16 | plp->max_len = len;
17 | plp->buffer = p_data;
18 |
19 | for( i=0; imax_len; ++i )
20 | {
21 | plp->buffer[i] = 0;
22 | }
23 |
24 | return 1;
25 | }
26 |
27 | /* insert a data to loop queue */
28 | unsigned char insert_element_loop_queue(LoopQueue* plp, DATA_TYPE ele)
29 | {
30 | if((void*)0==plp) return 0;
31 |
32 | if(0==space_loop_queue(plp)) return 0;
33 |
34 | if(plp->insert_index>=plp->max_len)
35 | plp->insert_index = 0;
36 |
37 | plp->buffer[plp->insert_index] = ele;
38 |
39 | ++plp->insert_index; /* the next data buffer index */
40 |
41 | taskDISABLE_INTERRUPTS();
42 | ++plp->count; /* wait process data count */
43 | taskENABLE_INTERRUPTS();
44 |
45 | //if(plp->count >= plp->max_len) plp->count = plp->max_len;
46 |
47 | return 1;
48 | }
49 |
50 | /* read a data from loop queue */
51 | DATA_TYPE read_element_loop_queue(LoopQueue* plp)
52 | {
53 | DATA_TYPE ele;
54 |
55 | if((void*)0==plp) return 0;
56 |
57 | //if( 0==plp->count ) return 0;
58 |
59 | if(plp->read_index>=plp->max_len)
60 | plp->read_index = 0;
61 |
62 | ele = plp->buffer[plp->read_index];
63 |
64 | ++plp->read_index;
65 |
66 | taskDISABLE_INTERRUPTS();
67 | --plp->count;
68 | taskENABLE_INTERRUPTS();
69 |
70 | return ele;
71 | }
72 |
73 | /* clear the loop queue */
74 | unsigned char clean_loop_queue(LoopQueue* plp)
75 | {
76 | if((void*)0==plp) return 0;
77 |
78 | plp->insert_index = 0;
79 | plp->read_index = 0;
80 | plp->count = 0;
81 |
82 | return 1;
83 | }
84 |
85 | /* return valid data count */
86 | unsigned int count_loop_queue(LoopQueue* plp)
87 | {
88 | if((void*)0==plp) return 0;
89 |
90 | return plp->count;
91 | }
92 |
93 | /* return queue space */
94 | unsigned int space_loop_queue(LoopQueue* plp)
95 | {
96 | if((void*)0==plp) return 0;
97 |
98 | if(plp->count>=plp->max_len) return 0;
99 |
100 | return (plp->max_len - plp->count);
101 | }
102 |
103 |
--------------------------------------------------------------------------------
/STM32Serial/Src/LoopQueue.h:
--------------------------------------------------------------------------------
1 | #ifndef LOOP_QUEUE_H
2 | #define LOOP_QUEUE_H
3 |
4 | typedef char DATA_TYPE;
5 |
6 | typedef struct _loop_queue
7 | {
8 | DATA_TYPE* buffer;
9 | unsigned int max_len;
10 | volatile unsigned int insert_index;
11 | volatile unsigned int read_index;
12 | volatile unsigned int count;
13 | }LoopQueue;
14 |
15 | unsigned char init_loop_queue(LoopQueue* plp, DATA_TYPE* p_data, unsigned int max_len); /* init the queue,point the buffer and data len */
16 | unsigned char insert_element_loop_queue(LoopQueue* plp, DATA_TYPE ele); /* insert a data to queue */
17 | DATA_TYPE read_element_loop_queue(LoopQueue* plp); /* read a data from queue */
18 |
19 |
20 | unsigned char clean_loop_queue(LoopQueue* plp); /* cean the queue */
21 | unsigned int count_loop_queue(LoopQueue* plp); /* read the queue the count of data */
22 | unsigned int space_loop_queue(LoopQueue* plp); /* return the queue the space of buffer, max_len-count */
23 |
24 | #endif
25 |
--------------------------------------------------------------------------------
/STM32Serial/Src/UsartDriver.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Src/UsartDriver.c
--------------------------------------------------------------------------------
/STM32Serial/Src/UsartDriver.h:
--------------------------------------------------------------------------------
1 |
2 | #ifndef USART_DRIVER_H
3 | #define USART_DRIVER_H
4 |
5 | #include "LoopQueue.h"
6 |
7 | #define USART1_ID 0
8 | #define USART2_ID 1
9 | #define USART3_ID 2
10 | #define USART_MAX_ID 4
11 |
12 | unsigned char initUsartBuff(unsigned char id);
13 | unsigned char write(unsigned char id, char* pc, unsigned int len);
14 | unsigned int read(unsigned char id, char* buff, unsigned int Len);
15 | unsigned int readBuffLen(unsigned char id);
16 | unsigned int writeBuffLen(unsigned char id);
17 | void usartClearRxBuff(unsigned char id);
18 | void usartClearTxBuff(unsigned char id);
19 |
20 | char write_char(unsigned char id, char c);
21 | char read_char(unsigned char id);
22 |
23 | LoopQueue* getUsartSendLoopQueue(unsigned char id);
24 | LoopQueue* getUsartRecLoopQueue(unsigned char id);
25 |
26 | #endif
27 |
--------------------------------------------------------------------------------
/STM32Serial/Src/UserTask.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Src/UserTask.c
--------------------------------------------------------------------------------
/STM32Serial/Src/UserTask.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/LeiOuYang/STM32_Serial_Frame/aa512187225c3962e90af4f27335159e0b6f8985/STM32Serial/Src/UserTask.h
--------------------------------------------------------------------------------
/STM32Serial/Src/freertos.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : freertos.c
4 | * Description : Code for freertos applications
5 | ******************************************************************************
6 | * This notice applies to any and all portions of this file
7 | * that are not between comment pairs USER CODE BEGIN and
8 | * USER CODE END. Other portions of this file, whether
9 | * inserted by the user or by software development tools
10 | * are owned by their respective copyright owners.
11 | *
12 | * Copyright (c) 2018 STMicroelectronics International N.V.
13 | * All rights reserved.
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted, provided that the following conditions are met:
17 | *
18 | * 1. Redistribution of source code must retain the above copyright notice,
19 | * this list of conditions and the following disclaimer.
20 | * 2. Redistributions in binary form must reproduce the above copyright notice,
21 | * this list of conditions and the following disclaimer in the documentation
22 | * and/or other materials provided with the distribution.
23 | * 3. Neither the name of STMicroelectronics nor the names of other
24 | * contributors to this software may be used to endorse or promote products
25 | * derived from this software without specific written permission.
26 | * 4. This software, including modifications and/or derivative works of this
27 | * software, must execute solely and exclusively on microcontroller or
28 | * microprocessor devices manufactured by or for STMicroelectronics.
29 | * 5. Redistribution and use of this software other than as permitted under
30 | * this license is void and will automatically terminate your rights under
31 | * this license.
32 | *
33 | * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
34 | * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
35 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
36 | * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
37 | * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
38 | * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
39 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
41 | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
42 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
43 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
44 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 | *
46 | ******************************************************************************
47 | */
48 |
49 | /* Includes ------------------------------------------------------------------*/
50 | #include "FreeRTOS.h"
51 | #include "task.h"
52 |
53 | /* USER CODE BEGIN Includes */
54 |
55 | /* USER CODE END Includes */
56 |
57 | /* Variables -----------------------------------------------------------------*/
58 |
59 | /* USER CODE BEGIN Variables */
60 |
61 | /* USER CODE END Variables */
62 |
63 | /* Function prototypes -------------------------------------------------------*/
64 |
65 | /* USER CODE BEGIN FunctionPrototypes */
66 |
67 | /* USER CODE END FunctionPrototypes */
68 |
69 | /* Hook prototypes */
70 |
71 | /* USER CODE BEGIN Application */
72 |
73 | /* USER CODE END Application */
74 |
75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
76 |
--------------------------------------------------------------------------------