├── README.md └── ual.md /README.md: -------------------------------------------------------------------------------- 1 | # ARM Documentation for Nintendo Homebrew 2 | 3 | ## Architecture Reference Manuals 4 | 5 | Covers the ARM architecture itself and includes comprehensive descriptions of all instructions. 6 | 7 | - [ARMv4 - ARMv6](https://developer.arm.com/documentation/ddi0100/latest) ([PDF](https://documentation-service.arm.com/static/5f8dacc8f86e16515cdb865a?token=)) GBA, NDS, 3DS 8 | 9 | ## Technical Reference Manuals 10 | 11 | Covers the processors used in the consoles and includes information on how to interact with the hardware. 12 | 13 | - [ARM7TDMI](https://developer.arm.com/documentation/ddi0210/latest) ([PDF](https://documentation-service.arm.com/static/5f4786a179ff4c392c0ff819?token=)) GBA, NDS 14 | - [ARM946E-S](https://developer.arm.com/documentation/ddi0201/latest) ([PDF](https://documentation-service.arm.com/static/5e8e3ee588295d1e18d3aa82?token=)) NDS, 3DS 15 | - [ARM11 MPCore](https://developer.arm.com/documentation/ddi0360/latest) ([PDF](https://documentation-service.arm.com/static/5e8e1e0388295d1e18d368b2?token=)) 3DS 16 | 17 | ## Other 18 | 19 | - [Unified Assembler Syntax (UAL)](./ual.md) 20 | - [Application Binary Interface (ABI)](https://github.com/ARM-software/abi-aa#abi-for-the-arm-32-bit-architecture) 21 | -------------------------------------------------------------------------------- /ual.md: -------------------------------------------------------------------------------- 1 | ⚠️ This information is taken verbatim from [ARM Compiler armasm User Guide Version 5.06](https://developer.arm.com/documentation/dui0473/m/writing-arm-assembly-language/assembly-language-changes-after-rvct-v2-1). 2 | While it applies more or less as-is to GNU as, the armasm documentation should *not* be used for writing assembly code targeting the GNU compiler toolchain. 3 | 4 | To use unified assembler language (UAL) in GNU as, place the `.syntax unified` directive at the top of the file. To use it for inline assembly in C and C++, pass the `-masm-syntax-unified` option to GCC. 5 | 6 | [GNU as documentation](https://sourceware.org/binutils/docs/as)\ 7 | [GCC ARM options](https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html) 8 | 9 | **Changes from earlier ARM assembly language** 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 |
ChangePre-UAL ARM syntaxPreferred UAL syntax
The default addressing mode for LDM and STM is IA
LDMIA, STMIA
LDM, STM
You can use PUSH and POP mnemonics for full, descending stack operations in ARM in addition to Thumb.
STMFD sp!, {reglist}
LDMFD sp!, {reglist}
PUSH {reglist}
POP {reglist}
You can use the LSL, LSR, ASR, ROR and RRX instruction mnemonics for instructions with rotations and no other operation, in ARM in addition to Thumb.
MOV Rd, Rn, LSL shift
MOV Rd, Rn, LSR shift
MOV Rd, Rn, ASR shift
MOV Rd, Rn, ROR shift
MOV Rd, Rn, RRX
LSL Rd, Rn, shift
LSR Rd, Rn, shift
ASR Rd, Rn, shift
ROR Rd, Rn, shift
RRX Rd, Rn
Use the label form for PC-relative addressing. Do not use the offset form in new code.
LDR Rd [pc, #offset]
LDR Rd, label
Specify both registers for doubleword memory accesses. You must still obey rules about the register combinations you can use.
LDRD Rd, addr_mode
LDRD Rd, Rd2, addr_mode
{cond}, if used, is always the last element of all instructions.
ADD{cond}S
LDR{cond}SB
ADDS{cond}
LDRSB{cond}
48 | 49 | **Relaxation of requirements** 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 |
RelaxationPermitted syntaxPreferred syntax
If the destination register is the same as the first operand, zou can use a two register form of the instruction.
ADD r1, r3
ADD r1, r1, r3
63 | 64 | **Differences between pre-UAL Thumb syntax aand UAL syntax** 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 | 100 | 101 |
ChangePre-UAL Thumb syntaxPreferred UAL syntax
The default addressing mode for LDM and STM is IA
LDMIA, STMIA
LDM, STM
You must use the S postfix on instructions that update the flags. This change is essential to avoid conflict with 32-bit Thumb instructions.
ADD r1, r2, r3
SUB r4, r5, #6
MOV r0, #1
LSR r1, r2, #1
ADDS r1, r2, r3
SUBS r4, r5, #6
MOVS r0, #1
LSRS r1, r2, #1
The preferred form for ALU instructions specifies three registers, even if the destination register is the same as the first operand. However, the UAL syntax allows the two register syntax.
ADD r7, r8
SUB r1, #80
ADD r7, r7, r8
SUBS r1, r1, #80
If Rd and Rn are both Lo registers, MOV Rd, Rn is disassembles as ADDS Rd, Rn, #0.
MOV r2, r3
MOV r8, r9
CPY r0, r1
LSL r2, r3, #0
ADDS r2, r3, #0
MOV r8, r9
MOV r0, r1
MOVS r2, r3
NEG Rd, Rn is disassembled as RSBS Rd, Rn, #0.
NEG Rd, Rn
RSBS Rd, Rn, #0
When using the LDR Rd, =const literal load pseudo-instruction, in pre-UAL syntax, the generated instruction might affect the condition code flags. In UAL syntax, the generated instruction sequence is guaranteed to not affect the condition code flags.
LDR r0, =0
; generates the instruction:
MOVS r0, #0
LDR r0, =0
; generates the instruction:
LDR r0, [pc, #n]
...
DCD 0
102 | 103 | **Optional hash with immediate constants** 104 | 105 | You do not have to specify a hash before an immediate constant in any instruction syntax. armasm 106 | 107 | You always have to specify a hash before an immediate constant in `divided` syntax. It is optional in `unified` syntax. GNU as 108 | --------------------------------------------------------------------------------