├── .gitattributes ├── .gitignore ├── 00-GSM_LIBRARY ├── buffer.c ├── buffer.h ├── gsm.c ├── gsm.h ├── gsm_config_template.h ├── gsm_ll_template.c ├── gsm_ll_template.h └── pt │ ├── lc-addrlabels.h │ ├── lc-switch.h │ ├── lc.h │ ├── pt-sem.h │ └── pt.h ├── 00-HAL_DRIVERS ├── CMSIS │ ├── Device │ │ └── ST │ │ │ ├── STM32F4xx │ │ │ ├── Include │ │ │ │ ├── stm32f401xc.h │ │ │ │ ├── stm32f401xe.h │ │ │ │ ├── stm32f405xx.h │ │ │ │ ├── stm32f407xx.h │ │ │ │ ├── stm32f410cx.h │ │ │ │ ├── stm32f410rx.h │ │ │ │ ├── stm32f410tx.h │ │ │ │ ├── stm32f411xe.h │ │ │ │ ├── stm32f415xx.h │ │ │ │ ├── stm32f417xx.h │ │ │ │ ├── stm32f427xx.h │ │ │ │ ├── stm32f429xx.h │ │ │ │ ├── stm32f437xx.h │ │ │ │ ├── stm32f439xx.h │ │ │ │ ├── stm32f446xx.h │ │ │ │ ├── stm32f469xx.h │ │ │ │ ├── stm32f479xx.h │ │ │ │ ├── stm32f4xx.h │ │ │ │ └── system_stm32f4xx.h │ │ │ ├── Release_Notes.html │ │ │ └── Source │ │ │ │ └── Templates │ │ │ │ ├── arm │ │ │ │ ├── startup_stm32f401xc.s │ │ │ │ ├── startup_stm32f401xe.s │ │ │ │ ├── startup_stm32f405xx.s │ │ │ │ ├── startup_stm32f407xx.s │ │ │ │ ├── startup_stm32f410cx.s │ │ │ │ ├── startup_stm32f410rx.s │ │ │ │ ├── startup_stm32f410tx.s │ │ │ │ ├── startup_stm32f411xe.s │ │ │ │ ├── startup_stm32f415xx.s │ │ │ │ ├── startup_stm32f417xx.s │ │ │ │ ├── startup_stm32f427xx.s │ │ │ │ ├── startup_stm32f429xx.s │ │ │ │ ├── startup_stm32f437xx.s │ │ │ │ ├── startup_stm32f439xx.s │ │ │ │ ├── startup_stm32f446xx.s │ │ │ │ ├── startup_stm32f469xx.s │ │ │ │ └── startup_stm32f479xx.s │ │ │ │ ├── gcc │ │ │ │ ├── startup_stm32f401xc.s │ │ │ │ ├── startup_stm32f401xe.s │ │ │ │ ├── startup_stm32f405xx.s │ │ │ │ ├── startup_stm32f407xx.s │ │ │ │ ├── startup_stm32f410cx.s │ │ │ │ ├── startup_stm32f410rx.s │ │ │ │ ├── startup_stm32f410tx.s │ │ │ │ ├── startup_stm32f411xe.s │ │ │ │ ├── startup_stm32f415xx.s │ │ │ │ ├── startup_stm32f417xx.s │ │ │ │ ├── startup_stm32f427xx.s │ │ │ │ ├── startup_stm32f429xx.s │ │ │ │ ├── startup_stm32f437xx.s │ │ │ │ ├── startup_stm32f439xx.s │ │ │ │ ├── startup_stm32f446xx.s │ │ │ │ ├── startup_stm32f469xx.s │ │ │ │ └── startup_stm32f479xx.s │ │ │ │ ├── iar │ │ │ │ ├── linker │ │ │ │ │ ├── stm32f401xc_flash.icf │ │ │ │ │ ├── stm32f401xc_sram.icf │ │ │ │ │ ├── stm32f401xe_flash.icf │ │ │ │ │ ├── stm32f401xe_sram.icf │ │ │ │ │ ├── stm32f405xx_flash.icf │ │ │ │ │ ├── stm32f405xx_sram.icf │ │ │ │ │ ├── stm32f407xx_flash.icf │ │ │ │ │ ├── stm32f407xx_sram.icf │ │ │ │ │ ├── stm32f410cx_flash.icf │ │ │ │ │ ├── stm32f410cx_sram.icf │ │ │ │ │ ├── stm32f410rx_flash.icf │ │ │ │ │ ├── stm32f410rx_sram.icf │ │ │ │ │ ├── stm32f410tx_flash.icf │ │ │ │ │ ├── stm32f410tx_sram.icf │ │ │ │ │ ├── stm32f411xe_flash.icf │ │ │ │ │ ├── stm32f411xe_sram.icf │ │ │ │ │ ├── stm32f415xx_flash.icf │ │ │ │ │ ├── stm32f415xx_sram.icf │ │ │ │ │ ├── stm32f417xx_flash.icf │ │ │ │ │ ├── stm32f417xx_sram.icf │ │ │ │ │ ├── stm32f427xx_flash.icf │ │ │ │ │ ├── stm32f427xx_sram.icf │ │ │ │ │ ├── stm32f429xx_flash.icf │ │ │ │ │ ├── stm32f429xx_sram.icf │ │ │ │ │ ├── stm32f437xx_flash.icf │ │ │ │ │ ├── stm32f437xx_sram.icf │ │ │ │ │ ├── stm32f439xx_flash.icf │ │ │ │ │ ├── stm32f439xx_sram.icf │ │ │ │ │ ├── stm32f446xx_flash.icf │ │ │ │ │ ├── stm32f446xx_sram.icf │ │ │ │ │ ├── stm32f469xx_flash.icf │ │ │ │ │ ├── stm32f469xx_sram.icf │ │ │ │ │ ├── stm32f479xx_flash.icf │ │ │ │ │ └── stm32f479xx_sram.icf │ │ │ │ ├── startup_stm32f401xc.s │ │ │ │ ├── startup_stm32f401xe.s │ │ │ │ ├── startup_stm32f405xx.s │ │ │ │ ├── startup_stm32f407xx.s │ │ │ │ ├── startup_stm32f410cx.s │ │ │ │ ├── startup_stm32f410rx.s │ │ │ │ ├── startup_stm32f410tx.s │ │ │ │ ├── startup_stm32f411xe.s │ │ │ │ ├── startup_stm32f415xx.s │ │ │ │ ├── startup_stm32f417xx.s │ │ │ │ ├── startup_stm32f427xx.s │ │ │ │ ├── startup_stm32f429xx.s │ │ │ │ ├── startup_stm32f437xx.s │ │ │ │ ├── startup_stm32f439xx.s │ │ │ │ ├── startup_stm32f446xx.s │ │ │ │ ├── startup_stm32f469xx.s │ │ │ │ └── startup_stm32f479xx.s │ │ │ │ └── system_stm32f4xx.c │ │ │ └── STM32F7xx │ │ │ ├── Include │ │ │ ├── stm32f745xx.h │ │ │ ├── stm32f746xx.h │ │ │ ├── stm32f756xx.h │ │ │ ├── stm32f7xx.h │ │ │ └── system_stm32f7xx.h │ │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f745xx.s │ │ │ ├── startup_stm32f746xx.s │ │ │ └── startup_stm32f756xx.s │ │ │ ├── gcc │ │ │ ├── startup_stm32f745xx.s │ │ │ ├── startup_stm32f746xx.s │ │ │ └── startup_stm32f756xx.s │ │ │ ├── iar │ │ │ ├── linker │ │ │ │ ├── stm32f745xx_ITCM_flash.icf │ │ │ │ ├── stm32f745xx_flash.icf │ │ │ │ ├── stm32f745xx_sram.icf │ │ │ │ ├── stm32f746xx_ITCM_flash.icf │ │ │ │ ├── stm32f746xx_flash.icf │ │ │ │ ├── stm32f746xx_sram.icf │ │ │ │ ├── stm32f756xx_ITCM_flash.icf │ │ │ │ ├── stm32f756xx_flash.icf │ │ │ │ └── stm32f756xx_sram.icf │ │ │ ├── startup_stm32f745xx.s │ │ │ ├── startup_stm32f746xx.s │ │ │ └── startup_stm32f756xx.s │ │ │ └── system_stm32f7xx.c │ ├── Include │ │ ├── arm_common_tables.h │ │ ├── arm_const_structs.h │ │ ├── arm_math.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_cmFunc.h │ │ ├── core_cmInstr.h │ │ ├── core_cmSimd.h │ │ ├── core_sc000.h │ │ └── core_sc300.h │ ├── README.txt │ ├── RTOS │ │ └── Template │ │ │ └── cmsis_os.h │ └── index.html ├── STM32F4xx_HAL_Driver │ ├── Inc │ │ ├── Legacy │ │ │ └── stm32_hal_legacy.h │ │ ├── stm32f4xx_hal.h │ │ ├── stm32f4xx_hal_adc.h │ │ ├── stm32f4xx_hal_adc_ex.h │ │ ├── stm32f4xx_hal_can.h │ │ ├── stm32f4xx_hal_cec.h │ │ ├── stm32f4xx_hal_conf.h │ │ ├── stm32f4xx_hal_conf_template.h │ │ ├── stm32f4xx_hal_cortex.h │ │ ├── stm32f4xx_hal_crc.h │ │ ├── stm32f4xx_hal_cryp.h │ │ ├── stm32f4xx_hal_cryp_ex.h │ │ ├── stm32f4xx_hal_dac.h │ │ ├── stm32f4xx_hal_dac_ex.h │ │ ├── stm32f4xx_hal_dcmi.h │ │ ├── stm32f4xx_hal_dcmi_ex.h │ │ ├── stm32f4xx_hal_def.h │ │ ├── stm32f4xx_hal_dma.h │ │ ├── stm32f4xx_hal_dma2d.h │ │ ├── stm32f4xx_hal_dma_ex.h │ │ ├── stm32f4xx_hal_dsi.h │ │ ├── stm32f4xx_hal_eth.h │ │ ├── stm32f4xx_hal_flash.h │ │ ├── stm32f4xx_hal_flash_ex.h │ │ ├── stm32f4xx_hal_flash_ramfunc.h │ │ ├── stm32f4xx_hal_fmpi2c.h │ │ ├── stm32f4xx_hal_fmpi2c_ex.h │ │ ├── stm32f4xx_hal_gpio.h │ │ ├── stm32f4xx_hal_gpio_ex.h │ │ ├── stm32f4xx_hal_hash.h │ │ ├── stm32f4xx_hal_hash_ex.h │ │ ├── stm32f4xx_hal_hcd.h │ │ ├── stm32f4xx_hal_i2c.h │ │ ├── stm32f4xx_hal_i2c_ex.h │ │ ├── stm32f4xx_hal_i2s.h │ │ ├── stm32f4xx_hal_i2s_ex.h │ │ ├── stm32f4xx_hal_irda.h │ │ ├── stm32f4xx_hal_iwdg.h │ │ ├── stm32f4xx_hal_lptim.h │ │ ├── stm32f4xx_hal_ltdc.h │ │ ├── stm32f4xx_hal_ltdc_ex.h │ │ ├── stm32f4xx_hal_nand.h │ │ ├── stm32f4xx_hal_nor.h │ │ ├── stm32f4xx_hal_pccard.h │ │ ├── stm32f4xx_hal_pcd.h │ │ ├── stm32f4xx_hal_pcd_ex.h │ │ ├── stm32f4xx_hal_pwr.h │ │ ├── stm32f4xx_hal_pwr_ex.h │ │ ├── stm32f4xx_hal_qspi.h │ │ ├── stm32f4xx_hal_rcc.h │ │ ├── stm32f4xx_hal_rcc_ex.h │ │ ├── stm32f4xx_hal_rng.h │ │ ├── stm32f4xx_hal_rtc.h │ │ ├── stm32f4xx_hal_rtc_ex.h │ │ ├── stm32f4xx_hal_sai.h │ │ ├── stm32f4xx_hal_sai_ex.h │ │ ├── stm32f4xx_hal_sd.h │ │ ├── stm32f4xx_hal_sdram.h │ │ ├── stm32f4xx_hal_smartcard.h │ │ ├── stm32f4xx_hal_spdifrx.h │ │ ├── stm32f4xx_hal_spi.h │ │ ├── stm32f4xx_hal_sram.h │ │ ├── stm32f4xx_hal_tim.h │ │ ├── stm32f4xx_hal_tim_ex.h │ │ ├── stm32f4xx_hal_uart.h │ │ ├── stm32f4xx_hal_usart.h │ │ ├── stm32f4xx_hal_wwdg.h │ │ ├── stm32f4xx_ll_fmc.h │ │ ├── stm32f4xx_ll_fsmc.h │ │ ├── stm32f4xx_ll_sdmmc.h │ │ └── stm32f4xx_ll_usb.h │ └── Src │ │ ├── stm32f4xx_hal.c │ │ ├── stm32f4xx_hal_adc.c │ │ ├── stm32f4xx_hal_adc_ex.c │ │ ├── stm32f4xx_hal_can.c │ │ ├── stm32f4xx_hal_cec.c │ │ ├── stm32f4xx_hal_cortex.c │ │ ├── stm32f4xx_hal_crc.c │ │ ├── stm32f4xx_hal_cryp.c │ │ ├── stm32f4xx_hal_cryp_ex.c │ │ ├── stm32f4xx_hal_dac.c │ │ ├── stm32f4xx_hal_dac_ex.c │ │ ├── stm32f4xx_hal_dcmi.c │ │ ├── stm32f4xx_hal_dcmi_ex.c │ │ ├── stm32f4xx_hal_dma.c │ │ ├── stm32f4xx_hal_dma2d.c │ │ ├── stm32f4xx_hal_dma_ex.c │ │ ├── stm32f4xx_hal_dsi.c │ │ ├── stm32f4xx_hal_eth.c │ │ ├── stm32f4xx_hal_flash.c │ │ ├── stm32f4xx_hal_flash_ex.c │ │ ├── stm32f4xx_hal_flash_ramfunc.c │ │ ├── stm32f4xx_hal_fmpi2c.c │ │ ├── stm32f4xx_hal_fmpi2c_ex.c │ │ ├── stm32f4xx_hal_gpio.c │ │ ├── stm32f4xx_hal_hash.c │ │ ├── stm32f4xx_hal_hash_ex.c │ │ ├── stm32f4xx_hal_hcd.c │ │ ├── stm32f4xx_hal_i2c.c │ │ ├── stm32f4xx_hal_i2c_ex.c │ │ ├── stm32f4xx_hal_i2s.c │ │ ├── stm32f4xx_hal_i2s_ex.c │ │ ├── stm32f4xx_hal_irda.c │ │ ├── stm32f4xx_hal_iwdg.c │ │ ├── stm32f4xx_hal_lptim.c │ │ ├── stm32f4xx_hal_ltdc.c │ │ ├── stm32f4xx_hal_ltdc_ex.c │ │ ├── stm32f4xx_hal_msp_template.c │ │ ├── stm32f4xx_hal_nand.c │ │ ├── stm32f4xx_hal_nor.c │ │ ├── stm32f4xx_hal_pccard.c │ │ ├── stm32f4xx_hal_pcd.c │ │ ├── stm32f4xx_hal_pcd_ex.c │ │ ├── stm32f4xx_hal_pwr.c │ │ ├── stm32f4xx_hal_pwr_ex.c │ │ ├── stm32f4xx_hal_qspi.c │ │ ├── stm32f4xx_hal_rcc.c │ │ ├── stm32f4xx_hal_rcc_ex.c │ │ ├── stm32f4xx_hal_rng.c │ │ ├── stm32f4xx_hal_rtc.c │ │ ├── stm32f4xx_hal_rtc_ex.c │ │ ├── stm32f4xx_hal_sai.c │ │ ├── stm32f4xx_hal_sai_ex.c │ │ ├── stm32f4xx_hal_sd.c │ │ ├── stm32f4xx_hal_sdram.c │ │ ├── stm32f4xx_hal_smartcard.c │ │ ├── stm32f4xx_hal_spdifrx.c │ │ ├── stm32f4xx_hal_spi.c │ │ ├── stm32f4xx_hal_sram.c │ │ ├── stm32f4xx_hal_tim.c │ │ ├── stm32f4xx_hal_tim_ex.c │ │ ├── stm32f4xx_hal_uart.c │ │ ├── stm32f4xx_hal_usart.c │ │ ├── stm32f4xx_hal_wwdg.c │ │ ├── stm32f4xx_ll_fmc.c │ │ ├── stm32f4xx_ll_fsmc.c │ │ ├── stm32f4xx_ll_sdmmc.c │ │ └── stm32f4xx_ll_usb.c └── STM32F7xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32f7xx_hal.h │ ├── stm32f7xx_hal_adc.h │ ├── stm32f7xx_hal_adc_ex.h │ ├── stm32f7xx_hal_can.h │ ├── stm32f7xx_hal_cec.h │ ├── stm32f7xx_hal_conf.h │ ├── stm32f7xx_hal_conf_template.h │ ├── stm32f7xx_hal_cortex.h │ ├── stm32f7xx_hal_crc.h │ ├── stm32f7xx_hal_crc_ex.h │ ├── stm32f7xx_hal_cryp.h │ ├── stm32f7xx_hal_cryp_ex.h │ ├── stm32f7xx_hal_dac.h │ ├── stm32f7xx_hal_dac_ex.h │ ├── stm32f7xx_hal_dcmi.h │ ├── stm32f7xx_hal_dcmi_ex.h │ ├── stm32f7xx_hal_def.h │ ├── stm32f7xx_hal_dma.h │ ├── stm32f7xx_hal_dma2d.h │ ├── stm32f7xx_hal_dma_ex.h │ ├── stm32f7xx_hal_eth.h │ ├── stm32f7xx_hal_flash.h │ ├── stm32f7xx_hal_flash_ex.h │ ├── stm32f7xx_hal_gpio.h │ ├── stm32f7xx_hal_gpio_ex.h │ ├── stm32f7xx_hal_hash.h │ ├── stm32f7xx_hal_hash_ex.h │ ├── stm32f7xx_hal_hcd.h │ ├── stm32f7xx_hal_i2c.h │ ├── stm32f7xx_hal_i2c_ex.h │ ├── stm32f7xx_hal_i2s.h │ ├── stm32f7xx_hal_irda.h │ ├── stm32f7xx_hal_irda_ex.h │ ├── stm32f7xx_hal_iwdg.h │ ├── stm32f7xx_hal_lptim.h │ ├── stm32f7xx_hal_ltdc.h │ ├── stm32f7xx_hal_nand.h │ ├── stm32f7xx_hal_nor.h │ ├── stm32f7xx_hal_pcd.h │ ├── stm32f7xx_hal_pcd_ex.h │ ├── stm32f7xx_hal_pwr.h │ ├── stm32f7xx_hal_pwr_ex.h │ ├── stm32f7xx_hal_qspi.h │ ├── stm32f7xx_hal_rcc.h │ ├── stm32f7xx_hal_rcc_ex.h │ ├── stm32f7xx_hal_rng.h │ ├── stm32f7xx_hal_rtc.h │ ├── stm32f7xx_hal_rtc_ex.h │ ├── stm32f7xx_hal_sai.h │ ├── stm32f7xx_hal_sai_ex.h │ ├── stm32f7xx_hal_sd.h │ ├── stm32f7xx_hal_sdram.h │ ├── stm32f7xx_hal_smartcard.h │ ├── stm32f7xx_hal_smartcard_ex.h │ ├── stm32f7xx_hal_spdifrx.h │ ├── stm32f7xx_hal_spi.h │ ├── stm32f7xx_hal_sram.h │ ├── stm32f7xx_hal_tim.h │ ├── stm32f7xx_hal_tim_ex.h │ ├── stm32f7xx_hal_uart.h │ ├── stm32f7xx_hal_uart_ex.h │ ├── stm32f7xx_hal_usart.h │ ├── stm32f7xx_hal_usart_ex.h │ ├── stm32f7xx_hal_wwdg.h │ ├── stm32f7xx_ll_fmc.h │ ├── stm32f7xx_ll_sdmmc.h │ └── stm32f7xx_ll_usb.h │ └── Src │ ├── stm32f7xx_hal.c │ ├── stm32f7xx_hal_adc.c │ ├── stm32f7xx_hal_adc_ex.c │ ├── stm32f7xx_hal_can.c │ ├── stm32f7xx_hal_cec.c │ ├── stm32f7xx_hal_cortex.c │ ├── stm32f7xx_hal_crc.c │ ├── stm32f7xx_hal_crc_ex.c │ ├── stm32f7xx_hal_cryp.c │ ├── stm32f7xx_hal_cryp_ex.c │ ├── stm32f7xx_hal_dac.c │ ├── stm32f7xx_hal_dac_ex.c │ ├── stm32f7xx_hal_dcmi.c │ ├── stm32f7xx_hal_dcmi_ex.c │ ├── stm32f7xx_hal_dma.c │ ├── stm32f7xx_hal_dma2d.c │ ├── stm32f7xx_hal_dma_ex.c │ ├── stm32f7xx_hal_eth.c │ ├── stm32f7xx_hal_flash.c │ ├── stm32f7xx_hal_flash_ex.c │ ├── stm32f7xx_hal_gpio.c │ ├── stm32f7xx_hal_hash.c │ ├── stm32f7xx_hal_hash_ex.c │ ├── stm32f7xx_hal_hcd.c │ ├── stm32f7xx_hal_i2c.c │ ├── stm32f7xx_hal_i2c_ex.c │ ├── stm32f7xx_hal_i2s.c │ ├── stm32f7xx_hal_irda.c │ ├── stm32f7xx_hal_iwdg.c │ ├── stm32f7xx_hal_lptim.c │ ├── stm32f7xx_hal_ltdc.c │ ├── stm32f7xx_hal_msp_template.c │ ├── stm32f7xx_hal_nand.c │ ├── stm32f7xx_hal_nor.c │ ├── stm32f7xx_hal_pcd.c │ ├── stm32f7xx_hal_pcd_ex.c │ ├── stm32f7xx_hal_pwr.c │ ├── stm32f7xx_hal_pwr_ex.c │ ├── stm32f7xx_hal_qspi.c │ ├── stm32f7xx_hal_rcc.c │ ├── stm32f7xx_hal_rcc_ex.c │ ├── stm32f7xx_hal_rng.c │ ├── stm32f7xx_hal_rtc.c │ ├── stm32f7xx_hal_rtc_ex.c │ ├── stm32f7xx_hal_sai.c │ ├── stm32f7xx_hal_sai_ex.c │ ├── stm32f7xx_hal_sd.c │ ├── stm32f7xx_hal_sdram.c │ ├── stm32f7xx_hal_smartcard.c │ ├── stm32f7xx_hal_smartcard_ex.c │ ├── stm32f7xx_hal_spdifrx.c │ ├── stm32f7xx_hal_spi.c │ ├── stm32f7xx_hal_sram.c │ ├── stm32f7xx_hal_tim.c │ ├── stm32f7xx_hal_tim_ex.c │ ├── stm32f7xx_hal_uart.c │ ├── stm32f7xx_hal_usart.c │ ├── stm32f7xx_hal_wwdg.c │ ├── stm32f7xx_ll_fmc.c │ ├── stm32f7xx_ll_sdmmc.c │ └── stm32f7xx_ll_usb.c ├── 00-STM32_LIBRARIES ├── FreeRTOS │ ├── CMSIS_RTOS │ │ ├── cmsis_os.c │ │ └── cmsis_os.h │ ├── croutine.c │ ├── event_groups.c │ ├── include │ │ ├── FreeRTOS.h │ │ ├── FreeRTOSConfig_template.h │ │ ├── StackMacros.h │ │ ├── croutine.h │ │ ├── deprecated_definitions.h │ │ ├── event_groups.h │ │ ├── list.h │ │ ├── mpu_wrappers.h │ │ ├── portable.h │ │ ├── projdefs.h │ │ ├── queue.h │ │ ├── semphr.h │ │ ├── stdint.readme │ │ ├── task.h │ │ ├── timers.h │ │ └── timers.h~RF124b6cc9.TMP │ ├── list.c │ ├── portable │ │ ├── GCC │ │ │ ├── ARM_CM0 │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM3 │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM3_MPU │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM4F │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ │ └── ARM_CM7 │ │ │ │ ├── ReadMe.txt │ │ │ │ └── r0p1 │ │ │ │ ├── port.c │ │ │ │ └── portmacro.h │ │ ├── IAR │ │ │ ├── ARM_CM0 │ │ │ │ ├── port.c │ │ │ │ ├── portasm.s │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM3 │ │ │ │ ├── port.c │ │ │ │ ├── portasm.s │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM4F │ │ │ │ ├── port.c │ │ │ │ ├── portasm.s │ │ │ │ └── portmacro.h │ │ │ └── ARM_CM7 │ │ │ │ ├── ReadMe.txt │ │ │ │ └── r0p1 │ │ │ │ ├── port.c │ │ │ │ ├── portasm.s │ │ │ │ └── portmacro.h │ │ ├── Keil │ │ │ └── See-also-the-RVDS-directory.txt │ │ ├── MemMang │ │ │ ├── heap_1.c │ │ │ ├── heap_2.c │ │ │ ├── heap_3.c │ │ │ ├── heap_4.c │ │ │ └── heap_5.c │ │ ├── RVDS │ │ │ ├── ARM_CM0 │ │ │ │ ├── port_cm0.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM3 │ │ │ │ ├── port_cm3.c │ │ │ │ └── portmacro.h │ │ │ ├── ARM_CM4F │ │ │ │ ├── port_cm4.c │ │ │ │ └── portmacro.h │ │ │ └── ARM_CM7 │ │ │ │ ├── port_cm7.c │ │ │ │ └── portmacro.h │ │ ├── Tasking │ │ │ └── ARM_CM4F │ │ │ │ ├── port.c │ │ │ │ ├── port_asm.asm │ │ │ │ └── portmacro.h │ │ └── readme.txt │ ├── queue.c │ ├── tasks.c │ └── timers.c ├── attributes.h ├── mainpage.h ├── stm32fxxx_hal.h ├── tm_stm32_buffer.c ├── tm_stm32_buffer.h ├── tm_stm32_delay.c ├── tm_stm32_delay.h ├── tm_stm32_disco.c ├── tm_stm32_disco.h ├── tm_stm32_dma.c ├── tm_stm32_dma.h ├── tm_stm32_general.c ├── tm_stm32_general.h ├── tm_stm32_gpio.c ├── tm_stm32_gpio.h ├── tm_stm32_rcc.c ├── tm_stm32_rcc.h ├── tm_stm32_usart.c ├── tm_stm32_usart.h ├── tm_stm32_usart_dma.c └── tm_stm32_usart_dma.h ├── 01-EXAMPLE_CALL_RTOS ├── 01-EXAMPLE_CALL_RTOS.uvoptx ├── 01-EXAMPLE_CALL_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_CALL_SMS_RTOS ├── 01-EXAMPLE_CALL_SMS_RTOS.uvoptx ├── 01-EXAMPLE_CALL_SMS_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_CLIENT_RTOS ├── 01-EXAMPLE_CLIENT_RTOS.uvoptx ├── 01-EXAMPLE_CLIENT_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_FTP_RTOS ├── 01-EXAMPLE_FTP_RTOS.uvoptx ├── 01-EXAMPLE_FTP_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_HTTP_RTOS ├── 01-EXAMPLE_HTTP_RTOS.uvoptx ├── 01-EXAMPLE_HTTP_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_PHONEBOOK_RTOS ├── 01-EXAMPLE_PHONEBOOK_RTOS.uvoptx ├── 01-EXAMPLE_PHONEBOOK_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_SMS_PT ├── 01-EXAMPLE_SMS_PT.uvoptx ├── 01-EXAMPLE_SMS_PT.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c ├── 01-EXAMPLE_SMS_RTOS ├── 01-EXAMPLE_SMS_RTOS.MajerleT ├── 01-EXAMPLE_SMS_RTOS.uvguix.MajerleT ├── 01-EXAMPLE_SMS_RTOS.uvoptx ├── 01-EXAMPLE_SMS_RTOS.uvprojx ├── DebugConfig │ ├── NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf │ ├── STM32F429_DISCOVERY_STM32F429ZITx.dbgconf │ └── STM32F4_DISCOVERY_STM32F407VGTx.dbgconf ├── TM │ └── readme.txt ├── Targets │ ├── F411_NUCLEO_HSE │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F429_Discovery │ │ ├── project.hex │ │ └── project.sct │ ├── STM32F4_DISCOVERY │ │ ├── project.hex │ │ └── project.sct │ └── STM32F7_DISCOVERY │ │ ├── project.hex │ │ └── project.sct └── User │ ├── FreeRTOSConfig.h │ ├── defines.h │ ├── gsm_config.h │ ├── gsm_ll.c │ ├── gsm_ll.h │ ├── main.c │ ├── main.h │ ├── stm32fxxx_it.c │ ├── stm32fxxx_it.h │ ├── system_stm32f0xx.c │ ├── system_stm32f4xx.c │ └── system_stm32f7xx.c └── README.md /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | 4 | # Custom for Visual Studio 5 | *.cs diff=csharp 6 | 7 | # Standard to msysgit 8 | *.doc diff=astextplain 9 | *.DOC diff=astextplain 10 | *.docx diff=astextplain 11 | *.DOCX diff=astextplain 12 | *.dot diff=astextplain 13 | *.DOT diff=astextplain 14 | *.pdf diff=astextplain 15 | *.PDF diff=astextplain 16 | *.rtf diff=astextplain 17 | *.RTF diff=astextplain 18 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.rar 2 | 3 | *.o 4 | *.d 5 | *.crf 6 | *.htm 7 | *.dep 8 | *.map 9 | *.bak 10 | *.axf 11 | *.lnp 12 | *.lst 13 | *.ini 14 | *.MajerleT 15 | 16 | 17 | .gitignore 18 | 19 | 00-DOCUMENTATIONSOURCE/ 20 | 00-DOCUMENTATION/ 21 | 00-RELEASES/ 22 | 01-DEV/ 23 | 01-DEV_RTOS/ 24 | 25 | SIM800_Series_AT_Command_Manual_V1.09.pdf 26 | .gitattributes 27 | delete_unused_files.bat 28 | 00-GSM_LIBRARY/x_application_note.h -------------------------------------------------------------------------------- /00-GSM_LIBRARY/pt/lc-addrlabels.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2004-2005, Swedish Institute of Computer Science. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without 6 | * modification, are permitted provided that the following conditions 7 | * are met: 8 | * 1. Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in the 12 | * documentation and/or other materials provided with the distribution. 13 | * 3. Neither the name of the Institute nor the names of its contributors 14 | * may be used to endorse or promote products derived from this software 15 | * without specific prior written permission. 16 | * 17 | * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 | * SUCH DAMAGE. 28 | * 29 | * This file is part of the Contiki operating system. 30 | * 31 | * Author: Adam Dunkels 32 | * 33 | * $Id: lc-addrlabels.h,v 1.4 2006/06/03 11:29:43 adam Exp $ 34 | */ 35 | 36 | /** 37 | * \addtogroup lc 38 | * @{ 39 | */ 40 | 41 | /** 42 | * \file 43 | * Implementation of local continuations based on the "Labels as 44 | * values" feature of gcc 45 | * \author 46 | * Adam Dunkels 47 | * 48 | * This implementation of local continuations is based on a special 49 | * feature of the GCC C compiler called "labels as values". This 50 | * feature allows assigning pointers with the address of the code 51 | * corresponding to a particular C label. 52 | * 53 | * For more information, see the GCC documentation: 54 | * http://gcc.gnu.org/onlinedocs/gcc/Labels-as-Values.html 55 | * 56 | */ 57 | 58 | #ifndef __LC_ADDRLABELS_H__ 59 | #define __LC_ADDRLABELS_H__ 60 | 61 | /** \hideinitializer */ 62 | typedef void * lc_t; 63 | 64 | #define LC_INIT(s) s = NULL 65 | 66 | #define LC_RESUME(s) \ 67 | do { \ 68 | if(s != NULL) { \ 69 | goto *s; \ 70 | } \ 71 | } while(0) 72 | 73 | #define LC_CONCAT2(s1, s2) s1##s2 74 | #define LC_CONCAT(s1, s2) LC_CONCAT2(s1, s2) 75 | 76 | #define LC_SET(s) \ 77 | do { \ 78 | LC_CONCAT(LC_LABEL, __LINE__): \ 79 | (s) = &&LC_CONCAT(LC_LABEL, __LINE__); \ 80 | } while(0) 81 | 82 | #define LC_END(s) 83 | 84 | #endif /* __LC_ADDRLABELS_H__ */ 85 | /** @} */ 86 | -------------------------------------------------------------------------------- /00-GSM_LIBRARY/pt/lc-switch.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2004-2005, Swedish Institute of Computer Science. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without 6 | * modification, are permitted provided that the following conditions 7 | * are met: 8 | * 1. Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in the 12 | * documentation and/or other materials provided with the distribution. 13 | * 3. Neither the name of the Institute nor the names of its contributors 14 | * may be used to endorse or promote products derived from this software 15 | * without specific prior written permission. 16 | * 17 | * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 | * SUCH DAMAGE. 28 | * 29 | * This file is part of the Contiki operating system. 30 | * 31 | * Author: Adam Dunkels 32 | * 33 | * $Id: lc-switch.h,v 1.4 2006/06/03 11:29:43 adam Exp $ 34 | */ 35 | 36 | /** 37 | * \addtogroup lc 38 | * @{ 39 | */ 40 | 41 | /** 42 | * \file 43 | * Implementation of local continuations based on switch() statment 44 | * \author Adam Dunkels 45 | * 46 | * This implementation of local continuations uses the C switch() 47 | * statement to resume execution of a function somewhere inside the 48 | * function's body. The implementation is based on the fact that 49 | * switch() statements are able to jump directly into the bodies of 50 | * control structures such as if() or while() statmenets. 51 | * 52 | * This implementation borrows heavily from Simon Tatham's coroutines 53 | * implementation in C: 54 | * http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html 55 | */ 56 | 57 | #ifndef __LC_SWITCH_H__ 58 | #define __LC_SWITCH_H__ 59 | 60 | /* WARNING! lc implementation using switch() does not work if an 61 | LC_SET() is done within another switch() statement! */ 62 | 63 | /** \hideinitializer */ 64 | typedef unsigned short lc_t; 65 | 66 | #define LC_INIT(s) s = 0; 67 | 68 | #define LC_RESUME(s) switch(s) { case 0: 69 | 70 | #define LC_SET(s) s = __LINE__; case __LINE__: 71 | 72 | #define LC_END(s) } 73 | 74 | #endif /* __LC_SWITCH_H__ */ 75 | 76 | /** @} */ 77 | -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Include/stm32f479xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f401xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f401xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20008000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f401xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f401xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f405xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f405xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f407xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f407xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410cx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410cx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20004000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410rx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410rx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20004000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410tx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f410tx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20004000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f411xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f411xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f415xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f415xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f417xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f417xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f427xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f427xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2001FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20020000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f429xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f429xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2001FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20020000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f437xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f437xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2001FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20020000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f439xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f439xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2001FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20020000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f446xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f446xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f469xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f469xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2003FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20040000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f479xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f479xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2003FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20040000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 12 | define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f745xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f745xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f756xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f756xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f745xx_ITCM_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x00200000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x00200000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x002FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f745xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f745xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2002FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20030000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f746xx_ITCM_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x00200000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x00200000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x002FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f746xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f746xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2002FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20030000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f756xx_ITCM_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x00200000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x00200000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x002FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f756xx_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/Device/ST/STM32F7xx/Source/Templates/iar/linker/stm32f756xx_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x2002FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20030000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; 11 | define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000; 12 | define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x00003FFF; 13 | /*-Sizes-*/ 14 | define symbol __ICFEDIT_size_cstack__ = 0x400; 15 | define symbol __ICFEDIT_size_heap__ = 0x200; 16 | /**** End of ICF editor section. ###ICF###*/ 17 | 18 | 19 | define memory mem with size = 4G; 20 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 21 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 22 | define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__]; 23 | 24 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 25 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 26 | 27 | initialize by copy { readwrite }; 28 | do not initialize { section .noinit }; 29 | 30 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 31 | 32 | place in ROM_region { readonly }; 33 | place in RAM_region { readwrite, 34 | block CSTACK, block HEAP }; 35 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/README.txt: -------------------------------------------------------------------------------- 1 | * ------------------------------------------------------------------- 2 | * Copyright (C) 2011-2014 ARM Limited. All rights reserved. 3 | * 4 | * Date: 17 February 2014 5 | * Revision: V4.00 6 | * 7 | * Project: Cortex Microcontroller Software Interface Standard (CMSIS) 8 | * Title: Release Note for CMSIS 9 | * 10 | * ------------------------------------------------------------------- 11 | 12 | 13 | NOTE - Open the index.html file to access CMSIS documentation 14 | 15 | 16 | The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all 17 | Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects 18 | and reduces time-to-market for new embedded applications. 19 | 20 | CMSIS is released under the terms of the end user license agreement ("CMSIS_END_USER_LICENCE_AGREEMENT.pdf"). 21 | Any user of the software package is bound to the terms and conditions of the end user license agreement. 22 | 23 | 24 | You will find the following sub-directories: 25 | 26 | Documentation - Contains CMSIS documentation. 27 | 28 | DSP_Lib - MDK project files, Examples and source files etc.. to build the 29 | CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors. 30 | 31 | Include - CMSIS Core Support and CMSIS DSP Include Files. 32 | 33 | Lib - CMSIS DSP Libraries. 34 | 35 | RTOS - CMSIS RTOS API template header file. 36 | 37 | Driver - CMSIS Peripheral Driver Interface. 38 | 39 | Pack - CMSIS Software Packs. 40 | Mechanism to install software, device support, APIs, and example projects. 41 | 42 | SVD - CMSIS SVD Schema files and Conversion Utility. 43 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/CMSIS/index.html: -------------------------------------------------------------------------------- 1 |  2 | 3 | 4 | Redirect to the CMSIS main page after 0 seconds 5 | 6 | 7 | 8 | 9 | 10 | 11 | If the automatic redirection is failing, click open CMSIS Documentation. 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h -------------------------------------------------------------------------------- /00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c -------------------------------------------------------------------------------- /00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_wwdg.c -------------------------------------------------------------------------------- /00-HAL_DRIVERS/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/00-HAL_DRIVERS/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/FreeRTOS/include/stdint.readme: -------------------------------------------------------------------------------- 1 | 2 | #ifndef FREERTOS_STDINT 3 | #define FREERTOS_STDINT 4 | 5 | /******************************************************************************* 6 | * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions 7 | * necessary to build the FreeRTOS code. It is provided to allow FreeRTOS to be 8 | * built using compilers that do not provide their own stdint.h definition. 9 | * 10 | * To use this file: 11 | * 12 | * 1) Copy this file into the directory that contains your FreeRTOSConfig.h 13 | * header file, as that directory will already be in the compilers include 14 | * path. 15 | * 16 | * 2) Rename the copied file stdint.h. 17 | * 18 | */ 19 | 20 | typedef signed char int8_t; 21 | typedef unsigned char uint8_t; 22 | typedef short int16_t; 23 | typedef unsigned short uint16_t; 24 | typedef long int32_t; 25 | typedef unsigned long uint32_t; 26 | 27 | #endif /* FREERTOS_STDINT */ 28 | -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/FreeRTOS/portable/GCC/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/GCC/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 18 | directory. -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/FreeRTOS/portable/IAR/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/IAR/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1 18 | directory. -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/FreeRTOS/portable/Keil/See-also-the-RVDS-directory.txt: -------------------------------------------------------------------------------- 1 | Nothing to see here. -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/FreeRTOS/portable/readme.txt: -------------------------------------------------------------------------------- 1 | Each real time kernel port consists of three files that contain the core kernel 2 | components and are common to every port, and one or more files that are 3 | specific to a particular microcontroller and/or compiler. 4 | 5 | 6 | + The FreeRTOS/Source/Portable/MemMang directory contains the three sample 7 | memory allocators as described on the http://www.FreeRTOS.org WEB site. 8 | 9 | + The other directories each contain files specific to a particular 10 | microcontroller or compiler. 11 | 12 | 13 | 14 | For example, if you are interested in the GCC port for the ATMega323 15 | microcontroller then the port specific files are contained in 16 | FreeRTOS/Source/Portable/GCC/ATMega323 directory. If this is the only 17 | port you are interested in then all the other directories can be 18 | ignored. 19 | 20 | -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/attributes.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Attributes for different compilers 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2014 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | * 28 | * Different compilers uses different special keywords for functions/variables. etc. 29 | * For this purpose that file has been made. On one place to all possible attributes used in my libs. 30 | */ 31 | #ifndef TM_ATTRIBUTES_H 32 | #define TM_ATTRIBUTES_H 33 | 34 | /* Check for GNUC */ 35 | #if defined (__GNUC__) 36 | #ifndef __weak 37 | #define __weak __attribute__((weak)) 38 | #endif /* Weak attribute */ 39 | #ifndef __packed 40 | #define __packed __attribute__((__packed__)) 41 | #endif /* Packed attribute */ 42 | #endif 43 | 44 | #endif 45 | -------------------------------------------------------------------------------- /00-STM32_LIBRARIES/mainpage.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \mainpage STM32Fxxx HAL Libraries API 3 | * 4 | * \section Introdution 5 | * 6 | * This website describes all functions, enumerations and structures used in HAL libraries from http://stm32f4-discovery.com website. 7 | * Each library described here with API functions, can be found on previous link for more info. 8 | * 9 | * \section Examples 10 | * 11 | * If you need to see example for any of libraries where API is described here, 12 | * check Github repository where you can also download entire repo with Keil uVision examples. 13 | */ -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_CALL_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_CALL_SMS_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_CALL_SMS_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_CLIENT_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_CLIENT_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/User/gsm_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \author Tilen Majerle 3 | * \email tilen@majerle.eu 4 | * \website 5 | * \license MIT 6 | * \brief GSM config 7 | * 8 | \verbatim 9 | ---------------------------------------------------------------------- 10 | Copyright (c) 2016 Tilen Majerle 11 | 12 | Permission is hereby granted, free of charge, to any person 13 | obtaining a copy of this software and associated documentation 14 | files (the "Software"), to deal in the Software without restriction, 15 | including without limitation the rights to use, copy, modify, merge, 16 | publish, distribute, sublicense, and/or sell copies of the Software, 17 | and to permit persons to whom the Software is furnished to do so, 18 | subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be 21 | included in all copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 25 | OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE 26 | AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 27 | HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 28 | WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 29 | FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 30 | OTHER DEALINGS IN THE SOFTWARE. 31 | ---------------------------------------------------------------------- 32 | \endverbatim 33 | */ 34 | #ifndef GSM_CONF_H 35 | #define GSM_CONF_H 100 36 | 37 | /* C++ detection */ 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /** 43 | * \defgroup CONFIG 44 | * \brief GSM Config 45 | * \{ 46 | */ 47 | 48 | /** 49 | * \brief GSM Receive buffer size in units of bytes for processing. 50 | * 51 | * Use as much as possible, but not less than 128 bytes. 52 | */ 53 | #define GSM_BUFFER_SIZE 512 54 | 55 | /** 56 | * \brief GSM RTOS support enabled (1) or disabled (0) 57 | */ 58 | #define GSM_RTOS 1 59 | 60 | /** 61 | * \brief RTOS sync object for mutex 62 | */ 63 | #define GSM_RTOS_SYNC_t osMutexDef_t 64 | 65 | /** 66 | * \brief Timeout in milliseconds for mutex to access API 67 | */ 68 | #define GSM_RTOS_TIMEOUT 180000 69 | 70 | /** 71 | * \brief Async data processing enabled (1) or disabled (0) 72 | * 73 | * \note This feature has sense when in non-RTOS mode and you wanna process income data async (in interrupt) 74 | */ 75 | #define GSM_ASYNC 1 76 | 77 | /** 78 | * \brief Maximal SMS length in units of bytes 79 | */ 80 | #define GSM_SMS_MAX_LENGTH 160 81 | 82 | /** 83 | * \brief Maximal number of stored informations about received SMS at a time 84 | * 85 | * When you are in other actions and you can't check SMS, 86 | * stack will save as many received SMS infos as possible (selected with this option) 87 | */ 88 | #define GSM_MAX_RECEIVED_SMS_INFO 3 89 | 90 | /** 91 | * \} 92 | */ 93 | 94 | /* C++ detection */ 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif 100 | -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_FTP_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_FTP_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/User/gsm_config.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \author Tilen Majerle 3 | * \email tilen@majerle.eu 4 | * \website 5 | * \license MIT 6 | * \brief GSM config 7 | * 8 | \verbatim 9 | ---------------------------------------------------------------------- 10 | Copyright (c) 2016 Tilen Majerle 11 | 12 | Permission is hereby granted, free of charge, to any person 13 | obtaining a copy of this software and associated documentation 14 | files (the "Software"), to deal in the Software without restriction, 15 | including without limitation the rights to use, copy, modify, merge, 16 | publish, distribute, sublicense, and/or sell copies of the Software, 17 | and to permit persons to whom the Software is furnished to do so, 18 | subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be 21 | included in all copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 25 | OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE 26 | AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 27 | HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 28 | WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 29 | FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 30 | OTHER DEALINGS IN THE SOFTWARE. 31 | ---------------------------------------------------------------------- 32 | \endverbatim 33 | */ 34 | #ifndef GSM_CONF_H 35 | #define GSM_CONF_H 100 36 | 37 | /* C++ detection */ 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /** 43 | * \defgroup CONFIG 44 | * \brief GSM Config 45 | * \{ 46 | */ 47 | 48 | /** 49 | * \brief GSM Receive buffer size in units of bytes for processing. 50 | * 51 | * Use as much as possible, but not less than 128 bytes. 52 | */ 53 | #define GSM_BUFFER_SIZE 512 54 | 55 | /** 56 | * \brief GSM RTOS support enabled (1) or disabled (0) 57 | */ 58 | #define GSM_RTOS 1 59 | 60 | /** 61 | * \brief RTOS sync object for mutex 62 | */ 63 | #define GSM_RTOS_SYNC_t osMutexDef_t 64 | 65 | /** 66 | * \brief Timeout in milliseconds for mutex to access API 67 | */ 68 | #define GSM_RTOS_TIMEOUT 180000 69 | 70 | /** 71 | * \brief Async data processing enabled (1) or disabled (0) 72 | * 73 | * \note This feature has sense when in non-RTOS mode and you wanna process income data async (in interrupt) 74 | */ 75 | #define GSM_ASYNC 1 76 | 77 | /** 78 | * \brief Maximal SMS length in units of bytes 79 | */ 80 | #define GSM_SMS_MAX_LENGTH 160 81 | 82 | /** 83 | * \brief Maximal number of stored informations about received SMS at a time 84 | * 85 | * When you are in other actions and you can't check SMS, 86 | * stack will save as many received SMS infos as possible (selected with this option) 87 | */ 88 | #define GSM_MAX_RECEIVED_SMS_INFO 3 89 | 90 | /** 91 | * \} 92 | */ 93 | 94 | /* C++ detection */ 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif 100 | -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_HTTP_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_HTTP_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_PHONEBOOK_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_PHONEBOOK_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_SMS_PT/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_PT/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/DebugConfig/NUCLEO_F411_HSE_8MHz_STM32F411RETx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_RTC_STOP RTC Stopped when Core is halted 16 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 17 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 18 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 20 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 21 | // 22 | DbgMCU_APB1_Fz = 0x00000000; 23 | 24 | 25 | // Debug MCU APB2 Freeze 26 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 27 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 28 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 29 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 30 | // 31 | DbgMCU_APB2_Fz = 0x00000000; 32 | 33 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/DebugConfig/STM32F429_DISCOVERY_STM32F429ZITx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/DebugConfig/STM32F4_DISCOVERY_STM32F407VGTx.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | 3 | // Debug MCU Configuration 4 | // DBG_SLEEP Debug Sleep Mode 5 | // DBG_STOP Debug Stop Mode 6 | // DBG_STANDBY Debug Standby Mode 7 | // 8 | DbgMCU_CR = 0x00000007; 9 | 10 | // Debug MCU APB1 Freeze 11 | // DBG_TIM2_STOP Timer 2 Stopped when Core is halted 12 | // DBG_TIM3_STOP Timer 3 Stopped when Core is halted 13 | // DBG_TIM4_STOP Timer 4 Stopped when Core is halted 14 | // DBG_TIM5_STOP Timer 5 Stopped when Core is halted 15 | // DBG_TIM6_STOP Timer 6 Stopped when Core is halted 16 | // DBG_TIM7_STOP Timer 7 Stopped when Core is halted 17 | // DBG_TIM12_STOP Timer 12 Stopped when Core is halted 18 | // DBG_TIM13_STOP Timer 13 Stopped when Core is halted 19 | // DBG_TIM14_STOP Timer 14 Stopped when Core is halted 20 | // DBG_RTC_STOP RTC Stopped when Core is halted 21 | // DBG_WWDG_STOP Window Watchdog Stopped when Core is halted 22 | // DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted 23 | // DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted 24 | // DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted 25 | // DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted 26 | // DBG_CAN1_STOP CAN1 Stopped when Core is halted 27 | // DBG_CAN2_STOP CAN2 Stopped when Core is halted 28 | // 29 | DbgMCU_APB1_Fz = 0x00000000; 30 | 31 | 32 | // Debug MCU APB2 Freeze 33 | // DBG_TIM1_STOP Timer 1 Stopped when Core is halted 34 | // DBG_TIM8_STOP Timer 8 Stopped when Core is halted 35 | // DBG_TIM9_STOP Timer 9 Stopped when Core is halted 36 | // DBG_TIM10_STOP Timer 10 Stopped when Core is halted 37 | // DBG_TIM11_STOP Timer 11 Stopped when Core is halted 38 | // 39 | DbgMCU_APB2_Fz = 0x00000000; 40 | 41 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/TM/readme.txt: -------------------------------------------------------------------------------- 1 | TM: 2 | Place your (my) libraries here, in this folder -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/Targets/F411_NUCLEO_HSE/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00080000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00080000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/Targets/STM32F429_Discovery/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00200000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00200000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00030000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/Targets/STM32F4_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00020000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/Targets/STM32F7_DISCOVERY/project.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00100000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00100000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20010000 0x00040000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/User/defines.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Defines for your entire project at one place 3 | * 4 | * @author Tilen Majerle 5 | * @email tilen@majerle.eu 6 | * @website http://stm32f4-discovery.com 7 | * @version v1.0 8 | * @ide Keil uVision 5 9 | * @license GNU GPL v3 10 | * 11 | * |---------------------------------------------------------------------- 12 | * | Copyright (C) Tilen Majerle, 2015 13 | * | 14 | * | This program is free software: you can redistribute it and/or modify 15 | * | it under the terms of the GNU General Public License as published by 16 | * | the Free Software Foundation, either version 3 of the License, or 17 | * | any later version. 18 | * | 19 | * | This program is distributed in the hope that it will be useful, 20 | * | but WITHOUT ANY WARRANTY; without even the implied warranty of 21 | * | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 | * | GNU General Public License for more details. 23 | * | 24 | * | You should have received a copy of the GNU General Public License 25 | * | along with this program. If not, see . 26 | * |---------------------------------------------------------------------- 27 | */ 28 | #ifndef TM_DEFINES_H 29 | #define TM_DEFINES_H 30 | 31 | /* Put your global defines for all libraries here used in your project */ 32 | 33 | /* Defines for RCC settings for system */ 34 | /* I've added these defines in options for target in Keil uVision for each target different settings */ 35 | //#define RCC_OSCILLATORTYPE RCC_OSCILLATORTYPE_HSE /*!< Used to select system oscillator type */ 36 | //#define RCC_PLLM 8 /*!< Used for PLL M parameter */ 37 | //#define RCC_PLLN 360 /*!< Used for PLL N parameter */ 38 | //#define RCC_PLLP 2 /*!< Used for PLL P parameter */ 39 | //#define RCC_PLLQ 7 /*!< Used for PLL Q parameter */ 40 | //#define RCC_PLLR 10 /*!< Used for PLL R parameter, available on STM32F446xx */ 41 | 42 | /* Use custom IRQ handler function for USART */ 43 | #define TM_USART1_USE_CUSTOM_IRQ 44 | 45 | #endif 46 | -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/User/main.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MaJerle/GSM_AT_commands_parser/7204fe0a304ee99adb481f592a1d639245fab582/01-EXAMPLE_SMS_RTOS/User/main.h -------------------------------------------------------------------------------- /01-EXAMPLE_SMS_RTOS/User/stm32fxxx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h 4 | * @author MCD Application Team 5 | * @version V1.3.0 6 | * @date 13-November-2013 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2013 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __STM32Fxxx_IT_H 30 | #define __STM32Fxxx_IT_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /* Includes ------------------------------------------------------------------*/ 37 | #include "stm32fxxx_hal.h" 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions ------------------------------------------------------- */ 43 | 44 | void NMI_Handler(void); 45 | void HardFault_Handler(void); 46 | void MemManage_Handler(void); 47 | void BusFault_Handler(void); 48 | void UsageFault_Handler(void); 49 | void SVC_Handler(void); 50 | void DebugMon_Handler(void); 51 | void PendSV_Handler(void); 52 | void SysTick_Handler(void); 53 | void TimingDelay_Decrement(void); 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __STM32F4xx_IT_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # GSM AT Commands parser 2 | Platform independent GSM AT Commands parser for embedded systems 3 | 4 | A full documentation is available on official website: 5 | http://majerle.eu/projects/gsm-at-commands-parser-for-embedded-systems 6 | --------------------------------------------------------------------------------