├── Example_Binary_Reading.png
├── Finished_Watch.png
├── Hardware
└── Eagle
│ ├── Layout.png
│ ├── MacroWatch_gerber.png
│ ├── Macro_Watch.brd
│ ├── Macro_Watch.sch
│ ├── README.md
│ ├── Schematic.png
│ └── camfiles
│ ├── Macro_Watch.BOR
│ ├── Macro_Watch.GBL
│ ├── Macro_Watch.GBO
│ ├── Macro_Watch.GBP
│ ├── Macro_Watch.GBS
│ ├── Macro_Watch.GML
│ ├── Macro_Watch.GTL
│ ├── Macro_Watch.GTO
│ ├── Macro_Watch.GTP
│ ├── Macro_Watch.GTS
│ ├── Macro_Watch.XLN
│ ├── Macro_Watch.dri
│ └── Macro_Watch.gpi
├── Instruction Card.pdf
├── LICENSE.md
├── MF_StateMachine.png
├── MW_Assembly_Parts.png
├── MW_Assembly_Step_1.png
├── MW_Assembly_Step_2.png
├── MW_Assembly_Step_3.png
├── MW_Assembly_Step_4.png
├── MacroFab_ED_600px.png
├── RA2_ISR.png
├── README.md
└── Software
├── MacroWatch.X
├── Makefile
├── build
│ └── default
│ │ └── production
│ │ ├── main.p1
│ │ ├── main.p1.d
│ │ ├── main.pre
│ │ ├── newmain1.p1
│ │ ├── newmain1.p1.d
│ │ └── newmain1.pre
├── dist
│ └── default
│ │ └── production
│ │ ├── MacroWatch.X.production.cmf
│ │ ├── MacroWatch.X.production.elf
│ │ ├── MacroWatch.X.production.hex
│ │ ├── MacroWatch.X.production.hxl
│ │ ├── MacroWatch.X.production.lst
│ │ ├── MacroWatch.X.production.map
│ │ ├── MacroWatch.X.production.mum
│ │ ├── MacroWatch.X.production.obj
│ │ ├── MacroWatch.X.production.rlf
│ │ ├── MacroWatch.X.production.sdb
│ │ ├── MacroWatch.X.production.sym
│ │ └── memoryfile.xml
├── main.c
└── nbproject
│ ├── Makefile-default.mk
│ ├── Makefile-genesis.properties
│ ├── Makefile-impl.mk
│ ├── Makefile-local-default.mk
│ ├── Makefile-variables.mk
│ ├── Package-default.bash
│ ├── configurations.xml
│ ├── private
│ ├── SuppressibleMessageMemo.properties
│ ├── configurations.xml
│ └── private.xml
│ └── project.xml
└── README.md
/Example_Binary_Reading.png:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/MacroFab/Macro_Watch/3c72dc63ae428d46f9e2b08dab70cc037fb625b8/Example_Binary_Reading.png
--------------------------------------------------------------------------------
/Finished_Watch.png:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/MacroFab/Macro_Watch/3c72dc63ae428d46f9e2b08dab70cc037fb625b8/Finished_Watch.png
--------------------------------------------------------------------------------
/Hardware/Eagle/Layout.png:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/MacroFab/Macro_Watch/3c72dc63ae428d46f9e2b08dab70cc037fb625b8/Hardware/Eagle/Layout.png
--------------------------------------------------------------------------------
/Hardware/Eagle/MacroWatch_gerber.png:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/MacroFab/Macro_Watch/3c72dc63ae428d46f9e2b08dab70cc037fb625b8/Hardware/Eagle/MacroWatch_gerber.png
--------------------------------------------------------------------------------
/Hardware/Eagle/README.md:
--------------------------------------------------------------------------------
1 | ###Macro_Watch Hardware
2 | ***
3 | **Low cost, binary watch based off the PIC16F527 MCU for promotional purposes at MacroFab, INC.**
4 |
5 | ***
6 | 
7 |
8 | ***
9 | 
10 |
11 | ***
12 | 
13 |
14 | Files are for Eagle V6.0+. Gerber files can be found in the camfiles directory. See main directory for licensing.
15 |
--------------------------------------------------------------------------------
/Hardware/Eagle/Schematic.png:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/MacroFab/Macro_Watch/3c72dc63ae428d46f9e2b08dab70cc037fb625b8/Hardware/Eagle/Schematic.png
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.BOR:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | D10*
12 | X001440Y000190D02*
13 | X000190Y001440D01*
14 | X000190Y014040D01*
15 | X001440Y015290D01*
16 | X009440Y015290D01*
17 | X010690Y014040D01*
18 | X010690Y001440D01*
19 | X009440Y000190D01*
20 | X001440Y000190D01*
21 | X001940Y001440D02*
22 | X001440Y001940D01*
23 | X001440Y002740D01*
24 | X001940Y003240D01*
25 | X008940Y003240D01*
26 | X009440Y002740D01*
27 | X009440Y001940D01*
28 | X008940Y001440D01*
29 | X001940Y001440D01*
30 | X001940Y012240D02*
31 | X001440Y012740D01*
32 | X001440Y013540D01*
33 | X001940Y014040D01*
34 | X008940Y014040D01*
35 | X009440Y013540D01*
36 | X009440Y012740D01*
37 | X008940Y012240D01*
38 | X001940Y012240D01*
39 | M02*
40 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GBO:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | %ADD11C,0.0050*%
12 | %ADD12C,0.0060*%
13 | D10*
14 | X001440Y000190D02*
15 | X000190Y001440D01*
16 | X000190Y014040D01*
17 | X001440Y015290D01*
18 | X009440Y015290D01*
19 | X010690Y014040D01*
20 | X010690Y001440D01*
21 | X009440Y000190D01*
22 | X001440Y000190D01*
23 | X001940Y001440D02*
24 | X001440Y001940D01*
25 | X001440Y002740D01*
26 | X001940Y003240D01*
27 | X008940Y003240D01*
28 | X009440Y002740D01*
29 | X009440Y001940D01*
30 | X008940Y001440D01*
31 | X001940Y001440D01*
32 | X001940Y012240D02*
33 | X001440Y012740D01*
34 | X001440Y013540D01*
35 | X001940Y014040D01*
36 | X008940Y014040D01*
37 | X009440Y013540D01*
38 | X009440Y012740D01*
39 | X008940Y012240D01*
40 | X001940Y012240D01*
41 | D11*
42 | X002483Y010740D02*
43 | X003340Y010740D01*
44 | X002483Y010740D02*
45 | X001290Y009547D01*
46 | X001290Y008940D01*
47 | X007540Y010740D02*
48 | X008397Y010740D01*
49 | X009590Y009547D01*
50 | X009590Y008940D01*
51 | D12*
52 | X009560Y011470D02*
53 | X009560Y011810D01*
54 | X009673Y011810D02*
55 | X009447Y011810D01*
56 | X009305Y011810D02*
57 | X009078Y011810D01*
58 | X009192Y011810D02*
59 | X009192Y011470D01*
60 | X008937Y011470D02*
61 | X008710Y011470D01*
62 | X008823Y011470D02*
63 | X008823Y011810D01*
64 | X008937Y011697D01*
65 | X009815Y011697D02*
66 | X009815Y011470D01*
67 | X009815Y011640D02*
68 | X010042Y011640D01*
69 | X010042Y011697D02*
70 | X009928Y011810D01*
71 | X009815Y011697D01*
72 | X010042Y011697D02*
73 | X010042Y011470D01*
74 | X010183Y011527D02*
75 | X010240Y011470D01*
76 | X010410Y011470D01*
77 | X010410Y011810D01*
78 | X010240Y011810D01*
79 | X010183Y011754D01*
80 | X010183Y011697D01*
81 | X010240Y011640D01*
82 | X010410Y011640D01*
83 | X010240Y011640D02*
84 | X010183Y011583D01*
85 | X010183Y011527D01*
86 | M02*
87 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GBP:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | %ADD11R,0.1000X0.2000*%
12 | D10*
13 | X001440Y000190D02*
14 | X000190Y001440D01*
15 | X000190Y014040D01*
16 | X001440Y015290D01*
17 | X009440Y015290D01*
18 | X010690Y014040D01*
19 | X010690Y001440D01*
20 | X009440Y000190D01*
21 | X001440Y000190D01*
22 | X001940Y001440D02*
23 | X001440Y001940D01*
24 | X001440Y002740D01*
25 | X001940Y003240D01*
26 | X008940Y003240D01*
27 | X009440Y002740D01*
28 | X009440Y001940D01*
29 | X008940Y001440D01*
30 | X001940Y001440D01*
31 | X001940Y012240D02*
32 | X001440Y012740D01*
33 | X001440Y013540D01*
34 | X001940Y014040D01*
35 | X008940Y014040D01*
36 | X009440Y013540D01*
37 | X009440Y012740D01*
38 | X008940Y012240D01*
39 | X001940Y012240D01*
40 | D11*
41 | X000940Y007740D03*
42 | X009940Y007740D03*
43 | M02*
44 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GBS:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | %ADD11C,0.3540*%
12 | %ADD12R,0.1040X0.2040*%
13 | %ADD13C,0.0631*%
14 | D10*
15 | X001440Y000190D02*
16 | X000190Y001440D01*
17 | X000190Y014040D01*
18 | X001440Y015290D01*
19 | X009440Y015290D01*
20 | X010690Y014040D01*
21 | X010690Y001440D01*
22 | X009440Y000190D01*
23 | X001440Y000190D01*
24 | X001940Y001440D02*
25 | X001440Y001940D01*
26 | X001440Y002740D01*
27 | X001940Y003240D01*
28 | X008940Y003240D01*
29 | X009440Y002740D01*
30 | X009440Y001940D01*
31 | X008940Y001440D01*
32 | X001940Y001440D01*
33 | X001940Y012240D02*
34 | X001440Y012740D01*
35 | X001440Y013540D01*
36 | X001940Y014040D01*
37 | X008940Y014040D01*
38 | X009440Y013540D01*
39 | X009440Y012740D01*
40 | X008940Y012240D01*
41 | X001940Y012240D01*
42 | D11*
43 | X005440Y007740D03*
44 | D12*
45 | X009940Y007740D03*
46 | X000940Y007740D03*
47 | D13*
48 | X002940Y011640D03*
49 | X003940Y011640D03*
50 | X004940Y011640D03*
51 | X005940Y011640D03*
52 | X006940Y011640D03*
53 | X007940Y011640D03*
54 | M02*
55 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GML:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | D10*
12 | X001440Y000190D02*
13 | X000190Y001440D01*
14 | X000190Y014040D01*
15 | X001440Y015290D01*
16 | X009440Y015290D01*
17 | X010690Y014040D01*
18 | X010690Y001440D01*
19 | X009440Y000190D01*
20 | X001440Y000190D01*
21 | X001940Y001440D02*
22 | X001440Y001940D01*
23 | X001440Y002740D01*
24 | X001940Y003240D01*
25 | X008940Y003240D01*
26 | X009440Y002740D01*
27 | X009440Y001940D01*
28 | X008940Y001440D01*
29 | X001940Y001440D01*
30 | X001940Y012240D02*
31 | X001440Y012740D01*
32 | X001440Y013540D01*
33 | X001940Y014040D01*
34 | X008940Y014040D01*
35 | X009440Y013540D01*
36 | X009440Y012740D01*
37 | X008940Y012240D01*
38 | X001940Y012240D01*
39 | M02*
40 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GTP:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | %ADD11R,0.0287X0.0118*%
12 | %ADD12R,0.0118X0.0287*%
13 | %ADD13C,0.0050*%
14 | %ADD14R,0.0236X0.0354*%
15 | %ADD15R,0.0413X0.0256*%
16 | %ADD16R,0.0354X0.0236*%
17 | %ADD17R,0.0433X0.0492*%
18 | %ADD18R,0.0512X0.0748*%
19 | D10*
20 | X001440Y000190D02*
21 | X000190Y001440D01*
22 | X000190Y014040D01*
23 | X001440Y015290D01*
24 | X009440Y015290D01*
25 | X010690Y014040D01*
26 | X010690Y001440D01*
27 | X009440Y000190D01*
28 | X001440Y000190D01*
29 | X001940Y001440D02*
30 | X001440Y001940D01*
31 | X001440Y002740D01*
32 | X001940Y003240D01*
33 | X008940Y003240D01*
34 | X009440Y002740D01*
35 | X009440Y001940D01*
36 | X008940Y001440D01*
37 | X001940Y001440D01*
38 | X001940Y012240D02*
39 | X001440Y012740D01*
40 | X001440Y013540D01*
41 | X001940Y014040D01*
42 | X008940Y014040D01*
43 | X009440Y013540D01*
44 | X009440Y012740D01*
45 | X008940Y012240D01*
46 | X001940Y012240D01*
47 | D11*
48 | X004668Y007684D03*
49 | X004668Y007487D03*
50 | X004668Y007290D03*
51 | X004668Y007093D03*
52 | X004668Y006896D03*
53 | X006212Y006896D03*
54 | X006212Y007093D03*
55 | X006212Y007290D03*
56 | X006212Y007487D03*
57 | X006212Y007684D03*
58 | D12*
59 | X005834Y008062D03*
60 | X005637Y008062D03*
61 | X005440Y008062D03*
62 | X005243Y008062D03*
63 | X005046Y008062D03*
64 | X005046Y006518D03*
65 | X005243Y006518D03*
66 | X005440Y006518D03*
67 | X005637Y006518D03*
68 | X005834Y006518D03*
69 | D13*
70 | X005834Y006896D02*
71 | X005834Y007192D01*
72 | X005538Y007192D01*
73 | X005538Y006896D01*
74 | X005834Y006896D01*
75 | X005834Y006932D02*
76 | X005538Y006932D01*
77 | X005538Y006980D02*
78 | X005834Y006980D01*
79 | X005834Y007029D02*
80 | X005538Y007029D01*
81 | X005538Y007077D02*
82 | X005834Y007077D01*
83 | X005834Y007126D02*
84 | X005538Y007126D01*
85 | X005538Y007174D02*
86 | X005834Y007174D01*
87 | X005834Y007388D02*
88 | X005538Y007388D01*
89 | X005538Y007684D01*
90 | X005834Y007684D01*
91 | X005834Y007388D01*
92 | X005834Y007417D02*
93 | X005538Y007417D01*
94 | X005538Y007465D02*
95 | X005834Y007465D01*
96 | X005834Y007514D02*
97 | X005538Y007514D01*
98 | X005538Y007562D02*
99 | X005834Y007562D01*
100 | X005834Y007611D02*
101 | X005538Y007611D01*
102 | X005538Y007659D02*
103 | X005834Y007659D01*
104 | X005342Y007659D02*
105 | X005046Y007659D01*
106 | X005046Y007684D02*
107 | X005342Y007684D01*
108 | X005342Y007388D01*
109 | X005046Y007388D01*
110 | X005046Y007684D01*
111 | X005046Y007611D02*
112 | X005342Y007611D01*
113 | X005342Y007562D02*
114 | X005046Y007562D01*
115 | X005046Y007514D02*
116 | X005342Y007514D01*
117 | X005342Y007465D02*
118 | X005046Y007465D01*
119 | X005046Y007417D02*
120 | X005342Y007417D01*
121 | X005342Y007192D02*
122 | X005342Y006896D01*
123 | X005046Y006896D01*
124 | X005046Y007192D01*
125 | X005342Y007192D01*
126 | X005342Y007174D02*
127 | X005046Y007174D01*
128 | X005046Y007126D02*
129 | X005342Y007126D01*
130 | X005342Y007077D02*
131 | X005046Y007077D01*
132 | X005046Y007029D02*
133 | X005342Y007029D01*
134 | X005342Y006980D02*
135 | X005046Y006980D01*
136 | X005046Y006932D02*
137 | X005342Y006932D01*
138 | D14*
139 | X005695Y008740D03*
140 | X006285Y008740D03*
141 | X006995Y004690D03*
142 | X007585Y004690D03*
143 | X002785Y010390D03*
144 | X002195Y010390D03*
145 | D15*
146 | X004573Y006013D03*
147 | X004573Y005167D03*
148 | X006207Y005167D03*
149 | X006207Y006013D03*
150 | D16*
151 | X006940Y005885D03*
152 | X006940Y005295D03*
153 | X004190Y009645D03*
154 | X004190Y010235D03*
155 | X003540Y010235D03*
156 | X003540Y009645D03*
157 | D17*
158 | X002632Y009540D03*
159 | X002632Y008340D03*
160 | X002632Y007140D03*
161 | X002632Y005940D03*
162 | X002632Y004740D03*
163 | X001648Y004740D03*
164 | X001648Y005940D03*
165 | X001648Y007140D03*
166 | X001648Y008340D03*
167 | X001648Y009540D03*
168 | X008248Y009540D03*
169 | X008248Y008340D03*
170 | X008248Y007140D03*
171 | X008248Y005940D03*
172 | X008248Y004740D03*
173 | X009232Y004740D03*
174 | X009232Y005940D03*
175 | X009232Y007140D03*
176 | X009232Y008340D03*
177 | X009232Y009540D03*
178 | X009232Y010740D03*
179 | X008248Y010740D03*
180 | D18*
181 | X007223Y010620D03*
182 | X007223Y009360D03*
183 | X005057Y009360D03*
184 | X005057Y010620D03*
185 | M02*
186 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.GTS:
--------------------------------------------------------------------------------
1 | G75*
2 | %MOIN*%
3 | %OFA0B0*%
4 | %FSLAX24Y24*%
5 | %IPPOS*%
6 | %LPD*%
7 | %AMOC8*
8 | 5,1,8,0,0,1.08239X$1,22.5*
9 | %
10 | %ADD10C,0.0040*%
11 | %ADD11R,0.0327X0.0158*%
12 | %ADD12R,0.0158X0.0327*%
13 | %ADD13R,0.1024X0.1024*%
14 | %ADD14R,0.0276X0.0394*%
15 | %ADD15C,0.0631*%
16 | %ADD16R,0.0453X0.0296*%
17 | %ADD17R,0.0394X0.0276*%
18 | %ADD18R,0.0473X0.0532*%
19 | %ADD19R,0.0552X0.0788*%
20 | %ADD20C,0.0237*%
21 | %ADD21C,0.0434*%
22 | D10*
23 | X001440Y000190D02*
24 | X000190Y001440D01*
25 | X000190Y014040D01*
26 | X001440Y015290D01*
27 | X009440Y015290D01*
28 | X010690Y014040D01*
29 | X010690Y001440D01*
30 | X009440Y000190D01*
31 | X001440Y000190D01*
32 | X001940Y001440D02*
33 | X001440Y001940D01*
34 | X001440Y002740D01*
35 | X001940Y003240D01*
36 | X008940Y003240D01*
37 | X009440Y002740D01*
38 | X009440Y001940D01*
39 | X008940Y001440D01*
40 | X001940Y001440D01*
41 | X001940Y012240D02*
42 | X001440Y012740D01*
43 | X001440Y013540D01*
44 | X001940Y014040D01*
45 | X008940Y014040D01*
46 | X009440Y013540D01*
47 | X009440Y012740D01*
48 | X008940Y012240D01*
49 | X001940Y012240D01*
50 | D11*
51 | X004668Y007684D03*
52 | X004668Y007487D03*
53 | X004668Y007290D03*
54 | X004668Y007093D03*
55 | X004668Y006896D03*
56 | X006212Y006896D03*
57 | X006212Y007093D03*
58 | X006212Y007290D03*
59 | X006212Y007487D03*
60 | X006212Y007684D03*
61 | D12*
62 | X005834Y008062D03*
63 | X005637Y008062D03*
64 | X005440Y008062D03*
65 | X005243Y008062D03*
66 | X005046Y008062D03*
67 | X005046Y006518D03*
68 | X005243Y006518D03*
69 | X005440Y006518D03*
70 | X005637Y006518D03*
71 | X005834Y006518D03*
72 | D13*
73 | X005440Y007290D03*
74 | D14*
75 | X005695Y008740D03*
76 | X006285Y008740D03*
77 | X006995Y004690D03*
78 | X007585Y004690D03*
79 | X002785Y010390D03*
80 | X002195Y010390D03*
81 | D15*
82 | X002940Y011640D03*
83 | X003940Y011640D03*
84 | X004940Y011640D03*
85 | X005940Y011640D03*
86 | X006940Y011640D03*
87 | X007940Y011640D03*
88 | D16*
89 | X006207Y006013D03*
90 | X006207Y005167D03*
91 | X004573Y005167D03*
92 | X004573Y006013D03*
93 | D17*
94 | X006940Y005885D03*
95 | X006940Y005295D03*
96 | X004190Y009645D03*
97 | X004190Y010235D03*
98 | X003540Y010235D03*
99 | X003540Y009645D03*
100 | D18*
101 | X002632Y009540D03*
102 | X002632Y008340D03*
103 | X002632Y007140D03*
104 | X002632Y005940D03*
105 | X002632Y004740D03*
106 | X001648Y004740D03*
107 | X001648Y005940D03*
108 | X001648Y007140D03*
109 | X001648Y008340D03*
110 | X001648Y009540D03*
111 | X008248Y009540D03*
112 | X008248Y008340D03*
113 | X008248Y007140D03*
114 | X008248Y005940D03*
115 | X008248Y004740D03*
116 | X009232Y004740D03*
117 | X009232Y005940D03*
118 | X009232Y007140D03*
119 | X009232Y008340D03*
120 | X009232Y009540D03*
121 | X009232Y010740D03*
122 | X008248Y010740D03*
123 | D19*
124 | X007223Y010620D03*
125 | X007223Y009360D03*
126 | X005057Y009360D03*
127 | X005057Y010620D03*
128 | D20*
129 | X001240Y014240D03*
130 | X009640Y014240D03*
131 | X009640Y001240D03*
132 | X001240Y001240D03*
133 | D21*
134 | X007290Y007890D03*
135 | M02*
136 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.XLN:
--------------------------------------------------------------------------------
1 | %
2 | M48
3 | M72
4 | T01C0.0197
5 | T02C0.0394
6 | %
7 | T01
8 | X3790Y4890
9 | X3440Y6440
10 | X3740Y6690
11 | X3140Y6890
12 | X2640Y6490
13 | X1690Y10540
14 | X3890Y10640
15 | X4290Y10640
16 | X6290Y9690
17 | X7740Y9540
18 | X7740Y8340
19 | X7740Y10740
20 | X6090Y5640
21 | X7740Y5290
22 | T02
23 | X2940Y11640
24 | X3940Y11640
25 | X4940Y11640
26 | X5940Y11640
27 | X6940Y11640
28 | X7940Y11640
29 | M30
30 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.dri:
--------------------------------------------------------------------------------
1 | Generated by EAGLE CAM Processor 6.5.0
2 |
3 | Drill Station Info File: C:/Users/MacroFab_00/Documents/GitHub/Macro_Watch/Hardware/camfiles/Macro_Watch.dri
4 |
5 | Date : 10/30/2015 12:46:59 PM
6 | Drills : generated
7 | Device : Excellon drill station
8 |
9 | Parameter settings:
10 |
11 | Tolerance Drill + : 0.00 %
12 | Tolerance Drill - : 0.00 %
13 | Rotate : no
14 | Mirror : no
15 | Optimize : yes
16 | Auto fit : yes
17 | OffsetX : 0inch
18 | OffsetY : 0inch
19 | Layers : Drills Holes
20 |
21 | Drill File Info:
22 |
23 | Data Mode : Absolute
24 | Units : 1/10000 Inch
25 |
26 | Drills used:
27 |
28 | Code Size used
29 |
30 | T01 0.0197inch 14
31 | T02 0.0394inch 6
32 |
33 | Total number of drills: 20
34 |
35 | Plotfiles:
36 |
37 | C:/Users/MacroFab_00/Documents/GitHub/Macro_Watch/Hardware/camfiles/Macro_Watch.XLN
38 |
--------------------------------------------------------------------------------
/Hardware/Eagle/camfiles/Macro_Watch.gpi:
--------------------------------------------------------------------------------
1 | Generated by EAGLE CAM Processor 6.5.0
2 |
3 | Photoplotter Info File: C:/Users/MacroFab_00/Documents/GitHub/Macro_Watch/Hardware/camfiles/Macro_Watch.gpi
4 |
5 | Date : 10/30/2015 12:47:01 PM
6 | Plotfile : C:/Users/MacroFab_00/Documents/GitHub/Macro_Watch/Hardware/camfiles/Macro_Watch.GTL
7 | Apertures : generated:
8 | Device : Gerber RS-274-X photoplotter, coordinate format 2.4 inch
9 |
10 | Parameter settings:
11 |
12 | Emulate Apertures : no
13 | Tolerance Draw + : 0.00 %
14 | Tolerance Draw - : 0.00 %
15 | Tolerance Flash + : 0.00 %
16 | Tolerance Flash - : 0.00 %
17 | Rotate : no
18 | Mirror : no
19 | Optimize : yes
20 | Auto fit : yes
21 | OffsetX : 0inch
22 | OffsetY : 0inch
23 |
24 | Plotfile Info:
25 |
26 | Coordinate Format : 2.4
27 | Coordinate Units : Inch
28 | Data Mode : Absolute
29 | Zero Suppression : None
30 | End Of Block : *
31 |
32 | Apertures used:
33 |
34 | Code Shape Size used
35 |
36 | D10 draw 0.0040inch 921
37 | D11 rectangle 0.0287inch x 0.0118inch 10
38 | D12 rectangle 0.0118inch x 0.0287inch 10
39 | D13 square 0.0984inch 1
40 | D14 rectangle 0.0236inch x 0.0354inch 6
41 | D15 round 0.0591inch 6
42 | D16 rectangle 0.0413inch x 0.0256inch 4
43 | D17 rectangle 0.0354inch x 0.0236inch 6
44 | D18 rectangle 0.0433inch x 0.0492inch 22
45 | D19 rectangle 0.0512inch x 0.0748inch 4
46 | D20 round 0.0197inch 4
47 | D21 round 0.0394inch 1
48 | D22 draw 0.0080inch 145
49 | D23 round 0.0317inch 14
50 | D24 draw 0.0100inch 15
51 |
52 |
--------------------------------------------------------------------------------
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/LICENSE.md:
--------------------------------------------------------------------------------
1 |
2 | 
3 |
4 |
5 | This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
6 |
--------------------------------------------------------------------------------
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/MW_Assembly_Step_1.png:
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/README.md:
--------------------------------------------------------------------------------
1 | 
2 | ***
3 | ###Macro_Watch
4 | ***
5 | **Low cost, binary watch based off the PIC16F527 MCU for promotional purposes at MacroFab, INC.**
6 |
7 | This repository contains all the documentation and instructions needed to build a Macro_Watch. The Macro_Watch is a binary style watch based off the [PIC16F527](http://ww1.microchip.com/downloads/en/DeviceDoc/41652A.pdf). It is designed to be low cost and easy to manufacture. The watch runs off of a single CR2032. The PIC16F527 is running in "LP" (Low Power Crystal Mode) which has an average power draw of ~15.8uA @ the 3.0V the watch runs at. The crystal is a 32.768kHz which allows for a clean conversion to a 1Hz signal for timekeeping. The Macro_Watch is designed to be mounted on an ESD wrist band.
8 |
9 | 
10 |
11 | ***
12 | **How to assemble the Macro_Watch Kit**
13 |
14 | To attach the wrist strap to the Macro_Watch follow the pictures below.
15 |
16 | 
17 |
18 | 
19 |
20 | 
21 |
22 | 
23 |
24 | 
25 |
26 | ***
27 | **Instructions on how to read and use the Macro_Watch**
28 |
29 | The Macro_Watch has 11 LEDs. Four LEDs for the Hour (H1 - H4), Six LEDs for the Minute (M1 - M6), and a single Seconds LED for timing purposes. This guide will not go into how to read binary but a good guide can be found [here](http://www.wikihow.com/Read-Binary). Pressing the switch on the front will lit up the LEDs for 10 seconds to allow reading of the time. Holding the switch for 3 seconds will allow setting the current time. The time advances with acceleration so the longer the button is pressed the faster the time will increase. There is no AM/PM indicator on the watch. The SEC LED can be repurposed for AM/PM use or the user can look outside and see if the sun is out.
30 |
31 | The LEDs represent the following numbers. The Seconds LED (SEC on the PCB) blinks every second.
32 |
33 | **Table of the LED layout on the Macro_Watch**
34 |
35 | | LED Identifier | Number | LED Identifier | Number
36 | |---|---|---|---|
37 | | N/A | N/A | M6 | 32 Minutes |
38 | | H4 | 8 Hours | M5 | 16 Minutes |
39 | | H3 | 4 Hours | M4 | 8 Minutes |
40 | | H2 | 2 Hours | M3 | 4 Minutes |
41 | | H1 | 1 Hour | M2 | 2 Minutes |
42 | | SEC | Second Blinker | M1 | 1 Minute |
43 |
44 | ***
45 |
46 | 
47 |
48 | The idea is to take the LEDs that are lit up and then add up the numbers they represent. If H3 and H1 LED are lit up that will be 4 + 1 = 5 so it is the 5th hour.
49 |
50 | ***
51 | **Theory of operation**
52 |
53 | The code works by using Timer0 on the PIC16F527 to time keep. Using a 32.768kHz oscillator and no timer prescaler (by setting the prescaler to work on the WDT instead of Timer0) the Timer0 ISR happens 32 times a second. The ISR counts 32 times and then adds one second to the current time. The pad labeled RA2 on the MacroWatch is high when ISR starts and goes low when the ISR finishes.
54 |
55 | 
56 |
57 | The main loop of the code is a small state machine that keeps track what mode the watch is currently in. The first state is the idle state where the watch poles the switch and awaits the users input. Once the button is pressed it moves to the second state which is to calculate how long the watch will display for and then it moves on to state three. State three does the bulk of the work by branching based on how much time the display has been on for and what the user is currently doing. The watch is also driving the LEDs in this state. If the user has held the button for more then 3 seconds the watch goes into state four. State four advances the time. The longer the button is pressed the faster the time advances. Below is a state machine diagram showing how the code branches.
58 |
59 | 
60 |
61 | ***
62 | **License Information**
63 |
64 | This project is under the [Creative Commons Attribution-ShareAlike 4.0 International License](LICENSE.md). This project is provided with no warranty and should be used at your own risk.
65 |
66 | ***
67 | **Directory listing of the repository**
68 |
69 | | Directory | Description |
70 | |---|---|
71 | | Hardware | Contains all the hardware files for the Macro_Watch. Designed with Eagle V6.0+. |
72 | | Software | Has all the firmware that needs to be loaded onto the Macro_Watch. Written in C for MPLAB X IDE V3.10. |
73 |
74 | ***
75 | **Credits**
76 |
77 | Designed by:
78 | Parker Dillmann
79 |
80 | Software by:
81 | Parker Dillmann
82 |
83 | ***
84 |
85 |
86 |
87 |
88 |
--------------------------------------------------------------------------------
/Software/MacroWatch.X/Makefile:
--------------------------------------------------------------------------------
1 | #
2 | # There exist several targets which are by default empty and which can be
3 | # used for execution of your targets. These targets are usually executed
4 | # before and after some main targets. They are:
5 | #
6 | # .build-pre: called before 'build' target
7 | # .build-post: called after 'build' target
8 | # .clean-pre: called before 'clean' target
9 | # .clean-post: called after 'clean' target
10 | # .clobber-pre: called before 'clobber' target
11 | # .clobber-post: called after 'clobber' target
12 | # .all-pre: called before 'all' target
13 | # .all-post: called after 'all' target
14 | # .help-pre: called before 'help' target
15 | # .help-post: called after 'help' target
16 | #
17 | # Targets beginning with '.' are not intended to be called on their own.
18 | #
19 | # Main targets can be executed directly, and they are:
20 | #
21 | # build build a specific configuration
22 | # clean remove built files from a configuration
23 | # clobber remove all built files
24 | # all build all configurations
25 | # help print help mesage
26 | #
27 | # Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and
28 | # .help-impl are implemented in nbproject/makefile-impl.mk.
29 | #
30 | # Available make variables:
31 | #
32 | # CND_BASEDIR base directory for relative paths
33 | # CND_DISTDIR default top distribution directory (build artifacts)
34 | # CND_BUILDDIR default top build directory (object files, ...)
35 | # CONF name of current configuration
36 | # CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration)
37 | # CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration)
38 | # CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration)
39 | # CND_PACKAGE_DIR_${CONF} directory of package (current configuration)
40 | # CND_PACKAGE_NAME_${CONF} name of package (current configuration)
41 | # CND_PACKAGE_PATH_${CONF} path to package (current configuration)
42 | #
43 | # NOCDDL
44 |
45 |
46 | # Environment
47 | MKDIR=mkdir
48 | CP=cp
49 | CCADMIN=CCadmin
50 | RANLIB=ranlib
51 |
52 |
53 | # build
54 | build: .build-post
55 |
56 | .build-pre:
57 | # Add your pre 'build' code here...
58 |
59 | .build-post: .build-impl
60 | # Add your post 'build' code here...
61 |
62 |
63 | # clean
64 | clean: .clean-post
65 |
66 | .clean-pre:
67 | # Add your pre 'clean' code here...
68 | # WARNING: the IDE does not call this target since it takes a long time to
69 | # simply run make. Instead, the IDE removes the configuration directories
70 | # under build and dist directly without calling make.
71 | # This target is left here so people can do a clean when running a clean
72 | # outside the IDE.
73 |
74 | .clean-post: .clean-impl
75 | # Add your post 'clean' code here...
76 |
77 |
78 | # clobber
79 | clobber: .clobber-post
80 |
81 | .clobber-pre:
82 | # Add your pre 'clobber' code here...
83 |
84 | .clobber-post: .clobber-impl
85 | # Add your post 'clobber' code here...
86 |
87 |
88 | # all
89 | all: .all-post
90 |
91 | .all-pre:
92 | # Add your pre 'all' code here...
93 |
94 | .all-post: .all-impl
95 | # Add your post 'all' code here...
96 |
97 |
98 | # help
99 | help: .help-post
100 |
101 | .help-pre:
102 | # Add your pre 'help' code here...
103 |
104 | .help-post: .help-impl
105 | # Add your post 'help' code here...
106 |
107 |
108 |
109 | # include project implementation makefile
110 | include nbproject/Makefile-impl.mk
111 |
112 | # include project make variables
113 | include nbproject/Makefile-variables.mk
114 |
--------------------------------------------------------------------------------
/Software/MacroWatch.X/build/default/production/main.p1.d:
--------------------------------------------------------------------------------
1 | build/default/production/main.d \
2 | build/default/production/main.p1: \
3 | main.c
--------------------------------------------------------------------------------
/Software/MacroWatch.X/build/default/production/main.pre:
--------------------------------------------------------------------------------
1 |
2 | # 1 "main.c"
3 |
4 | # 26 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\htc.h"
5 | extern const char __xc8_OPTIM_SPEED;
6 |
7 |
8 | # 13 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\xc8debug.h"
9 | #pragma intrinsic(__builtin_software_breakpoint)
10 | extern void __builtin_software_breakpoint(void);
11 |
12 | # 49 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic16f527.h"
13 | extern volatile unsigned char INDF @ 0x000;
14 |
15 | asm("INDF equ 00h");
16 |
17 |
18 | typedef union {
19 | struct {
20 | unsigned INDF :8;
21 | };
22 | } INDFbits_t;
23 | extern volatile INDFbits_t INDFbits @ 0x000;
24 |
25 | # 68
26 | extern volatile unsigned char TMR0 @ 0x001;
27 |
28 | asm("TMR0 equ 01h");
29 |
30 |
31 | typedef union {
32 | struct {
33 | unsigned TMR0 :8;
34 | };
35 | } TMR0bits_t;
36 | extern volatile TMR0bits_t TMR0bits @ 0x001;
37 |
38 | # 87
39 | extern volatile unsigned char PCL @ 0x002;
40 |
41 | asm("PCL equ 02h");
42 |
43 |
44 | typedef union {
45 | struct {
46 | unsigned PCL :8;
47 | };
48 | } PCLbits_t;
49 | extern volatile PCLbits_t PCLbits @ 0x002;
50 |
51 | # 106
52 | extern volatile unsigned char STATUS @ 0x003;
53 |
54 | asm("STATUS equ 03h");
55 |
56 |
57 | typedef union {
58 | struct {
59 | unsigned C :1;
60 | unsigned DC :1;
61 | unsigned Z :1;
62 | unsigned nPD :1;
63 | unsigned nTO :1;
64 | unsigned PA0 :1;
65 | unsigned PA1 :1;
66 | };
67 | struct {
68 | unsigned CARRY :1;
69 | };
70 | struct {
71 | unsigned :2;
72 | unsigned ZERO :1;
73 | };
74 | } STATUSbits_t;
75 | extern volatile STATUSbits_t STATUSbits @ 0x003;
76 |
77 | # 178
78 | extern volatile unsigned char FSR @ 0x004;
79 |
80 | asm("FSR equ 04h");
81 |
82 |
83 | typedef union {
84 | struct {
85 | unsigned FSR :7;
86 | };
87 | } FSRbits_t;
88 | extern volatile FSRbits_t FSRbits @ 0x004;
89 |
90 | # 197
91 | extern volatile unsigned char OSCCAL @ 0x005;
92 |
93 | asm("OSCCAL equ 05h");
94 |
95 |
96 | typedef union {
97 | struct {
98 | unsigned :1;
99 | unsigned CAL :7;
100 | };
101 | struct {
102 | unsigned :1;
103 | unsigned CAL0 :1;
104 | unsigned CAL1 :1;
105 | unsigned CAL2 :1;
106 | unsigned CAL3 :1;
107 | unsigned CAL4 :1;
108 | unsigned CAL5 :1;
109 | unsigned CAL6 :1;
110 | };
111 | } OSCCALbits_t;
112 | extern volatile OSCCALbits_t OSCCALbits @ 0x005;
113 |
114 | # 262
115 | extern volatile unsigned char PORTA @ 0x006;
116 |
117 | asm("PORTA equ 06h");
118 |
119 |
120 | typedef union {
121 | struct {
122 | unsigned RA :6;
123 | };
124 | struct {
125 | unsigned RA0 :1;
126 | unsigned RA1 :1;
127 | unsigned RA2 :1;
128 | unsigned RA3 :1;
129 | unsigned RA4 :1;
130 | unsigned RA5 :1;
131 | };
132 | } PORTAbits_t;
133 | extern volatile PORTAbits_t PORTAbits @ 0x006;
134 |
135 | # 319
136 | extern volatile unsigned char PORTB @ 0x007;
137 |
138 | asm("PORTB equ 07h");
139 |
140 |
141 | typedef union {
142 | struct {
143 | unsigned :4;
144 | unsigned RB :4;
145 | };
146 | struct {
147 | unsigned :4;
148 | unsigned RB4 :1;
149 | unsigned RB5 :1;
150 | unsigned RB6 :1;
151 | unsigned RB7 :1;
152 | };
153 | } PORTBbits_t;
154 | extern volatile PORTBbits_t PORTBbits @ 0x007;
155 |
156 | # 366
157 | extern volatile unsigned char PORTC @ 0x008;
158 |
159 | asm("PORTC equ 08h");
160 |
161 |
162 | typedef union {
163 | struct {
164 | unsigned RC :8;
165 | };
166 | struct {
167 | unsigned RC0 :1;
168 | unsigned RC1 :1;
169 | unsigned RC2 :1;
170 | unsigned RC3 :1;
171 | unsigned RC4 :1;
172 | unsigned RC5 :1;
173 | unsigned RC6 :1;
174 | unsigned RC7 :1;
175 | };
176 | } PORTCbits_t;
177 | extern volatile PORTCbits_t PORTCbits @ 0x008;
178 |
179 | # 435
180 | extern volatile unsigned char ADCON0 @ 0x009;
181 |
182 | asm("ADCON0 equ 09h");
183 |
184 |
185 | typedef union {
186 | struct {
187 | unsigned ADON :1;
188 | unsigned GO_nDONE :1;
189 | unsigned CHS :4;
190 | unsigned ADCS :2;
191 | };
192 | struct {
193 | unsigned :1;
194 | unsigned GO :1;
195 | unsigned CHS0 :1;
196 | unsigned CHS1 :1;
197 | unsigned CHS2 :1;
198 | unsigned CHS3 :1;
199 | unsigned ADCS0 :1;
200 | unsigned ADCS1 :1;
201 | };
202 | struct {
203 | unsigned :1;
204 | unsigned NOT_DONE :1;
205 | };
206 | } ADCON0bits_t;
207 | extern volatile ADCON0bits_t ADCON0bits @ 0x009;
208 |
209 | # 526
210 | extern volatile unsigned char ADRES @ 0x00A;
211 |
212 | asm("ADRES equ 0Ah");
213 |
214 |
215 | typedef union {
216 | struct {
217 | unsigned ADRES :8;
218 | };
219 | struct {
220 | unsigned ADRES0 :1;
221 | unsigned ADRES1 :1;
222 | unsigned ADRES2 :1;
223 | unsigned ADRES3 :1;
224 | unsigned ADRES4 :1;
225 | unsigned ADRES5 :1;
226 | unsigned ADRES6 :1;
227 | unsigned ADRES7 :1;
228 | };
229 | } ADRESbits_t;
230 | extern volatile ADRESbits_t ADRESbits @ 0x00A;
231 |
232 | # 595
233 | extern volatile unsigned char INTCON0 @ 0x00B;
234 |
235 | asm("INTCON0 equ 0Bh");
236 |
237 |
238 | extern volatile unsigned char INTCON @ 0x00B;
239 |
240 | asm("INTCON equ 0Bh");
241 |
242 |
243 | typedef union {
244 | struct {
245 | unsigned GIE :1;
246 | unsigned :3;
247 | unsigned RAIF :1;
248 | unsigned T0IF :1;
249 | unsigned CWIF :1;
250 | unsigned ADIF :1;
251 | };
252 | } INTCON0bits_t;
253 | extern volatile INTCON0bits_t INTCON0bits @ 0x00B;
254 |
255 | # 643
256 | typedef union {
257 | struct {
258 | unsigned GIE :1;
259 | unsigned :3;
260 | unsigned RAIF :1;
261 | unsigned T0IF :1;
262 | unsigned CWIF :1;
263 | unsigned ADIF :1;
264 | };
265 | } INTCONbits_t;
266 | extern volatile INTCONbits_t INTCONbits @ 0x00B;
267 |
268 | # 682
269 | extern volatile unsigned char EECON @ 0x021;
270 |
271 | asm("EECON equ 021h");
272 |
273 |
274 | typedef union {
275 | struct {
276 | unsigned RD :1;
277 | unsigned WR :1;
278 | unsigned WREN :1;
279 | unsigned WRERR :1;
280 | unsigned FREE :1;
281 | };
282 | } EECONbits_t;
283 | extern volatile EECONbits_t EECONbits @ 0x021;
284 |
285 | # 725
286 | extern volatile unsigned char EEDATA @ 0x025;
287 |
288 | asm("EEDATA equ 025h");
289 |
290 |
291 | typedef union {
292 | struct {
293 | unsigned EEDATA :8;
294 | };
295 | } EEDATAbits_t;
296 | extern volatile EEDATAbits_t EEDATAbits @ 0x025;
297 |
298 | # 744
299 | extern volatile unsigned char EEADR @ 0x026;
300 |
301 | asm("EEADR equ 026h");
302 |
303 |
304 | typedef union {
305 | struct {
306 | unsigned EEADR :6;
307 | };
308 | } EEADRbits_t;
309 | extern volatile EEADRbits_t EEADRbits @ 0x026;
310 |
311 | # 763
312 | extern volatile unsigned char CM1CON0 @ 0x027;
313 |
314 | asm("CM1CON0 equ 027h");
315 |
316 |
317 | typedef union {
318 | struct {
319 | unsigned nC1WU :1;
320 | unsigned C1PREF :1;
321 | unsigned C1NREF :1;
322 | unsigned C1ON :1;
323 | unsigned nC1T0CS :1;
324 | unsigned C1POL :1;
325 | unsigned nC1OUTEN :1;
326 | unsigned C1OUT :1;
327 | };
328 | } CM1CON0bits_t;
329 | extern volatile CM1CON0bits_t CM1CON0bits @ 0x027;
330 |
331 | # 824
332 | extern volatile unsigned char CM2CON0 @ 0x028;
333 |
334 | asm("CM2CON0 equ 028h");
335 |
336 |
337 | typedef union {
338 | struct {
339 | unsigned nC2WU :1;
340 | unsigned C2PREF1 :1;
341 | unsigned C2NREF :1;
342 | unsigned C2ON :1;
343 | unsigned C2PREF2 :1;
344 | unsigned C2POL :1;
345 | unsigned nC2OUTEN :1;
346 | unsigned C2OUT :1;
347 | };
348 | } CM2CON0bits_t;
349 | extern volatile CM2CON0bits_t CM2CON0bits @ 0x028;
350 |
351 | # 885
352 | extern volatile unsigned char VRCON @ 0x029;
353 |
354 | asm("VRCON equ 029h");
355 |
356 |
357 | typedef union {
358 | struct {
359 | unsigned VR :4;
360 | unsigned :1;
361 | unsigned VRR :1;
362 | unsigned VROE :1;
363 | unsigned VREN :1;
364 | };
365 | struct {
366 | unsigned VR0 :1;
367 | unsigned VR1 :1;
368 | unsigned VR2 :1;
369 | unsigned VR3 :1;
370 | };
371 | } VRCONbits_t;
372 | extern volatile VRCONbits_t VRCONbits @ 0x029;
373 |
374 | # 949
375 | extern volatile unsigned char ANSEL @ 0x02A;
376 |
377 | asm("ANSEL equ 02Ah");
378 |
379 |
380 | typedef union {
381 | struct {
382 | unsigned ANS0 :1;
383 | unsigned ANS1 :1;
384 | unsigned ANS2 :1;
385 | unsigned ANS3 :1;
386 | unsigned ANS4 :1;
387 | unsigned ANS5 :1;
388 | unsigned ANS6 :1;
389 | unsigned ANS7 :1;
390 | };
391 | } ANSELbits_t;
392 | extern volatile ANSELbits_t ANSELbits @ 0x02A;
393 |
394 | # 1010
395 | extern volatile unsigned char IW @ 0x061;
396 |
397 | asm("IW equ 061h");
398 |
399 |
400 | typedef union {
401 | struct {
402 | unsigned IWREG :8;
403 | };
404 | } IWbits_t;
405 | extern volatile IWbits_t IWbits @ 0x061;
406 |
407 | # 1029
408 | extern volatile unsigned char INTCON1 @ 0x065;
409 |
410 | asm("INTCON1 equ 065h");
411 |
412 |
413 | extern volatile unsigned char INTIE_REG @ 0x065;
414 |
415 | asm("INTIE_REG equ 065h");
416 |
417 |
418 | typedef union {
419 | struct {
420 | unsigned WUR :1;
421 | unsigned :3;
422 | unsigned RAIE :1;
423 | unsigned T0IE :1;
424 | unsigned CWIE :1;
425 | unsigned ADIE :1;
426 | };
427 | } INTCON1bits_t;
428 | extern volatile INTCON1bits_t INTCON1bits @ 0x065;
429 |
430 | # 1077
431 | typedef union {
432 | struct {
433 | unsigned WUR :1;
434 | unsigned :3;
435 | unsigned RAIE :1;
436 | unsigned T0IE :1;
437 | unsigned CWIE :1;
438 | unsigned ADIE :1;
439 | };
440 | } INTIE_REGbits_t;
441 | extern volatile INTIE_REGbits_t INTIE_REGbits @ 0x065;
442 |
443 | # 1116
444 | extern volatile unsigned char ISTATUS @ 0x066;
445 |
446 | asm("ISTATUS equ 066h");
447 |
448 |
449 | typedef union {
450 | struct {
451 | unsigned C :1;
452 | unsigned DC :1;
453 | unsigned Z :1;
454 | unsigned nPD :1;
455 | unsigned nTO :1;
456 | unsigned PA0 :1;
457 | unsigned PA1 :1;
458 | };
459 | } ISTATUSbits_t;
460 | extern volatile ISTATUSbits_t ISTATUSbits @ 0x066;
461 |
462 | # 1171
463 | extern volatile unsigned char IFSR @ 0x067;
464 |
465 | asm("IFSR equ 067h");
466 |
467 |
468 | typedef union {
469 | struct {
470 | unsigned IFSR :7;
471 | };
472 | } IFSRbits_t;
473 | extern volatile IFSRbits_t IFSRbits @ 0x067;
474 |
475 | # 1190
476 | extern volatile unsigned char IBSR @ 0x068;
477 |
478 | asm("IBSR equ 068h");
479 |
480 |
481 | typedef union {
482 | struct {
483 | unsigned IBSR :2;
484 | };
485 | } IBSRbits_t;
486 | extern volatile IBSRbits_t IBSRbits @ 0x068;
487 |
488 | # 1209
489 | extern volatile unsigned char OPACON @ 0x069;
490 |
491 | asm("OPACON equ 069h");
492 |
493 |
494 | typedef union {
495 | struct {
496 | unsigned OPA1ON :1;
497 | unsigned OPA2ON :1;
498 | };
499 | } OPACONbits_t;
500 | extern volatile OPACONbits_t OPACONbits @ 0x069;
501 |
502 | # 1234
503 | extern volatile __control unsigned char OPTION @ 0x000;
504 |
505 |
506 | extern volatile __control unsigned char TRISA @ 0x006;
507 |
508 |
509 | extern volatile __control unsigned char TRISB @ 0x007;
510 |
511 |
512 | extern volatile __control unsigned char TRISC @ 0x008;
513 |
514 | # 1265
515 | extern volatile __bit ADCS0 @ (((unsigned) &ADCON0)*8) + 6;
516 |
517 | extern volatile __bit ADCS1 @ (((unsigned) &ADCON0)*8) + 7;
518 |
519 | extern volatile __bit ADIE @ (((unsigned) &INTCON1)*8) + 7;
520 |
521 | extern volatile __bit ADIF @ (((unsigned) &INTCON0)*8) + 7;
522 |
523 | extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
524 |
525 | extern volatile __bit ADRES0 @ (((unsigned) &ADRES)*8) + 0;
526 |
527 | extern volatile __bit ADRES1 @ (((unsigned) &ADRES)*8) + 1;
528 |
529 | extern volatile __bit ADRES2 @ (((unsigned) &ADRES)*8) + 2;
530 |
531 | extern volatile __bit ADRES3 @ (((unsigned) &ADRES)*8) + 3;
532 |
533 | extern volatile __bit ADRES4 @ (((unsigned) &ADRES)*8) + 4;
534 |
535 | extern volatile __bit ADRES5 @ (((unsigned) &ADRES)*8) + 5;
536 |
537 | extern volatile __bit ADRES6 @ (((unsigned) &ADRES)*8) + 6;
538 |
539 | extern volatile __bit ADRES7 @ (((unsigned) &ADRES)*8) + 7;
540 |
541 | extern volatile __bit ANS0 @ (((unsigned) &ANSEL)*8) + 0;
542 |
543 | extern volatile __bit ANS1 @ (((unsigned) &ANSEL)*8) + 1;
544 |
545 | extern volatile __bit ANS2 @ (((unsigned) &ANSEL)*8) + 2;
546 |
547 | extern volatile __bit ANS3 @ (((unsigned) &ANSEL)*8) + 3;
548 |
549 | extern volatile __bit ANS4 @ (((unsigned) &ANSEL)*8) + 4;
550 |
551 | extern volatile __bit ANS5 @ (((unsigned) &ANSEL)*8) + 5;
552 |
553 | extern volatile __bit ANS6 @ (((unsigned) &ANSEL)*8) + 6;
554 |
555 | extern volatile __bit ANS7 @ (((unsigned) &ANSEL)*8) + 7;
556 |
557 | extern volatile __bit C1NREF @ (((unsigned) &CM1CON0)*8) + 2;
558 |
559 | extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 3;
560 |
561 | extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 7;
562 |
563 | extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 5;
564 |
565 | extern volatile __bit C1PREF @ (((unsigned) &CM1CON0)*8) + 1;
566 |
567 | extern volatile __bit C2NREF @ (((unsigned) &CM2CON0)*8) + 2;
568 |
569 | extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 3;
570 |
571 | extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 7;
572 |
573 | extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 5;
574 |
575 | extern volatile __bit C2PREF1 @ (((unsigned) &CM2CON0)*8) + 1;
576 |
577 | extern volatile __bit C2PREF2 @ (((unsigned) &CM2CON0)*8) + 4;
578 |
579 | extern volatile __bit CAL0 @ (((unsigned) &OSCCAL)*8) + 1;
580 |
581 | extern volatile __bit CAL1 @ (((unsigned) &OSCCAL)*8) + 2;
582 |
583 | extern volatile __bit CAL2 @ (((unsigned) &OSCCAL)*8) + 3;
584 |
585 | extern volatile __bit CAL3 @ (((unsigned) &OSCCAL)*8) + 4;
586 |
587 | extern volatile __bit CAL4 @ (((unsigned) &OSCCAL)*8) + 5;
588 |
589 | extern volatile __bit CAL5 @ (((unsigned) &OSCCAL)*8) + 6;
590 |
591 | extern volatile __bit CAL6 @ (((unsigned) &OSCCAL)*8) + 7;
592 |
593 | extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
594 |
595 | extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
596 |
597 | extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
598 |
599 | extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
600 |
601 | extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
602 |
603 | extern volatile __bit CWIE @ (((unsigned) &INTCON1)*8) + 6;
604 |
605 | extern volatile __bit CWIF @ (((unsigned) &INTCON0)*8) + 6;
606 |
607 | extern volatile __bit FREE @ (((unsigned) &EECON)*8) + 4;
608 |
609 | extern volatile __bit GIE @ (((unsigned) &INTCON0)*8) + 0;
610 |
611 | extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
612 |
613 | extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
614 |
615 | extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
616 |
617 | extern volatile __bit OPA1ON @ (((unsigned) &OPACON)*8) + 0;
618 |
619 | extern volatile __bit OPA2ON @ (((unsigned) &OPACON)*8) + 1;
620 |
621 | extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
622 |
623 | extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
624 |
625 | extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
626 |
627 | extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
628 |
629 | extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
630 |
631 | extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
632 |
633 | extern volatile __bit RAIE @ (((unsigned) &INTCON1)*8) + 4;
634 |
635 | extern volatile __bit RAIF @ (((unsigned) &INTCON0)*8) + 4;
636 |
637 | extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
638 |
639 | extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
640 |
641 | extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
642 |
643 | extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
644 |
645 | extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
646 |
647 | extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
648 |
649 | extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
650 |
651 | extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
652 |
653 | extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
654 |
655 | extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
656 |
657 | extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
658 |
659 | extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
660 |
661 | extern volatile __bit RD @ (((unsigned) &EECON)*8) + 0;
662 |
663 | extern volatile __bit T0IE @ (((unsigned) &INTCON1)*8) + 5;
664 |
665 | extern volatile __bit T0IF @ (((unsigned) &INTCON0)*8) + 5;
666 |
667 | extern volatile __bit VR0 @ (((unsigned) &VRCON)*8) + 0;
668 |
669 | extern volatile __bit VR1 @ (((unsigned) &VRCON)*8) + 1;
670 |
671 | extern volatile __bit VR2 @ (((unsigned) &VRCON)*8) + 2;
672 |
673 | extern volatile __bit VR3 @ (((unsigned) &VRCON)*8) + 3;
674 |
675 | extern volatile __bit VREN @ (((unsigned) &VRCON)*8) + 7;
676 |
677 | extern volatile __bit VROE @ (((unsigned) &VRCON)*8) + 6;
678 |
679 | extern volatile __bit VRR @ (((unsigned) &VRCON)*8) + 5;
680 |
681 | extern volatile __bit WR @ (((unsigned) &EECON)*8) + 1;
682 |
683 | extern volatile __bit WREN @ (((unsigned) &EECON)*8) + 2;
684 |
685 | extern volatile __bit WRERR @ (((unsigned) &EECON)*8) + 3;
686 |
687 | extern volatile __bit WUR @ (((unsigned) &INTCON1)*8) + 0;
688 |
689 | extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
690 |
691 | extern volatile __bit nC1OUTEN @ (((unsigned) &CM1CON0)*8) + 6;
692 |
693 | extern volatile __bit nC1T0CS @ (((unsigned) &CM1CON0)*8) + 4;
694 |
695 | extern volatile __bit nC1WU @ (((unsigned) &CM1CON0)*8) + 0;
696 |
697 | extern volatile __bit nC2OUTEN @ (((unsigned) &CM2CON0)*8) + 6;
698 |
699 | extern volatile __bit nC2WU @ (((unsigned) &CM2CON0)*8) + 0;
700 |
701 |
702 | # 27 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic.h"
703 | #pragma intrinsic(__nop)
704 | extern void __nop(void);
705 |
706 | # 76
707 | extern unsigned int flash_read(unsigned short addr);
708 |
709 | # 140
710 | extern void flash_erase(unsigned short addr);
711 |
712 |
713 | # 149
714 | #pragma intrinsic(_delay)
715 | extern __nonreentrant void _delay(unsigned long);
716 |
717 | # 184
718 | extern unsigned char __resetbits;
719 | extern __bit __powerdown;
720 | extern __bit __timeout;
721 |
722 |
723 | # 21 "main.c"
724 | #pragma config FOSC = LP
725 | #pragma config WDTE = OFF
726 | #pragma config CP = OFF
727 | #pragma config MCLRE = ON
728 | #pragma config IOSCFS = 8MHz
729 | #pragma config CPSW = OFF
730 | #pragma config BOREN = OFF
731 | #pragma config DRTEN = OFF
732 |
733 | # 48
734 | void TEST_LED_PATTERN(void);
735 | void delay_ms(int);
736 |
737 | char HOUR = 3;
738 | char MIN = 6;
739 | char SEC = 0;
740 | int INTCNT = 0;
741 |
742 | char Disp_timeout = 0;
743 | char Change_time = 0;
744 | int ADVCLKDELAY = 0;
745 | int ADVCLKCNT = 0;
746 |
747 | char BUTT_action = 0;
748 |
749 | char STATE = 0;
750 |
751 | void main(void) {
752 |
753 | CM1CON0 = 0x00;
754 | CM2CON0 = 0x00;
755 | OPTION = 0b11001000;
756 | ANSEL = 0x00;
757 | PORTA = 0x00;
758 | PORTB = 0x00;
759 | PORTC = 0x00;
760 | TRISA = 0x00;
761 | TRISB = 0x00;
762 | TRISC = 0x80;
763 |
764 | T0IE = 1;
765 | GIE=1;
766 |
767 | TEST_LED_PATTERN();
768 |
769 | while (1)
770 | {
771 | switch(STATE)
772 | {
773 |
774 | case 0:
775 | PORTB = 0x00;
776 | PORTC = 0x00;
777 |
778 | if(RC7 == 0)
779 | {
780 | STATE = 1;
781 | BUTT_action = 1;
782 | }
783 | else
784 | {
785 | STATE = 0;
786 | BUTT_action = 0;
787 | }
788 | break;
789 |
790 |
791 | case 1:
792 |
793 | Disp_timeout = SEC;
794 | Disp_timeout = Disp_timeout + 10;
795 |
796 | if(Disp_timeout >= 60)
797 | {
798 | Disp_timeout = Disp_timeout - 60;
799 | }
800 |
801 | Change_time = SEC;
802 | Change_time = Change_time + 3;
803 |
804 | if(Change_time >= 60)
805 | {
806 | Change_time = Change_time - 60;
807 | }
808 |
809 | STATE = 2;
810 |
811 | break;
812 |
813 |
814 | case 2:
815 |
816 | RB7 = HOUR & 0b00000001;
817 | RB6 = (HOUR >> 1) & 0b00000001;
818 | RB5 = (HOUR >> 2) & 0b00000001;
819 | RB4 = (HOUR >> 3) & 0b00000001;
820 |
821 | RC0 = MIN & 0b00000001;
822 | RC1 = (MIN >> 1) & 0b00000001;
823 | RC2 = (MIN >> 2) & 0b00000001;
824 | RC3 = (MIN >> 3) & 0b00000001;
825 | RC4 = (MIN >> 4) & 0b00000001;
826 | RC5 = (MIN >> 5) & 0b00000001;
827 |
828 | RC6 = SEC & 0b00000001;
829 |
830 |
831 |
832 | if(Disp_timeout == SEC)
833 | {
834 | STATE = 0;
835 | BUTT_action == BUTT_action;
836 | }
837 |
838 |
839 | else if(RC7 == 0 && BUTT_action == 0)
840 | {
841 | STATE = 1;
842 | BUTT_action = 1;
843 | }
844 |
845 |
846 | else if(Change_time == SEC && RC7 == 0 && BUTT_action == 1)
847 | {
848 | STATE = 3;
849 | BUTT_action == BUTT_action;
850 | ADVCLKDELAY = 50;
851 | ADVCLKCNT = 2;
852 | }
853 |
854 | else if(RC7 == 1 && BUTT_action == 1)
855 | {
856 | STATE = 2;
857 | BUTT_action = 0;
858 | }
859 |
860 | break;
861 |
862 |
863 | case 3:
864 | GIE = 0;
865 |
866 |
867 | if(RC7 == 0)
868 | {
869 | SEC = 0;
870 | MIN = MIN + 1;
871 | if(MIN == 60)
872 | {
873 | MIN = 0;
874 | HOUR = HOUR + 1;
875 | if(HOUR == 13)
876 | {
877 | HOUR = 1;
878 | }
879 | }
880 | ADVCLKCNT = ADVCLKCNT - 1;
881 | if(ADVCLKCNT == 0 && ADVCLKDELAY > 5)
882 | {
883 | ADVCLKCNT = 3;
884 | ADVCLKDELAY = ADVCLKDELAY - 5;
885 | }
886 |
887 | }
888 |
889 | else if(RC7 == 1)
890 | {
891 | GIE = 1;
892 | STATE = 1;
893 | }
894 |
895 | RB7 = HOUR & 0b00000001;
896 | RB6 = (HOUR >> 1) & 0b00000001;
897 | RB5 = (HOUR >> 2) & 0b00000001;
898 | RB4 = (HOUR >> 3) & 0b00000001;
899 |
900 | RC0 = MIN & 0b00000001;
901 | RC1 = (MIN >> 1) & 0b00000001;
902 | RC2 = (MIN >> 2) & 0b00000001;
903 | RC3 = (MIN >> 3) & 0b00000001;
904 | RC4 = (MIN >> 4) & 0b00000001;
905 | RC5 = (MIN >> 5) & 0b00000001;
906 |
907 | delay_ms(ADVCLKDELAY);
908 |
909 | break;
910 |
911 | default:
912 |
913 | STATE = 0;
914 |
915 | break;
916 | }
917 |
918 |
919 | }
920 | return;
921 | }
922 |
923 | void TEST_LED_PATTERN(void)
924 | {
925 | GIE = 0;
926 | char mask = 0x01;
927 |
928 | for(int i = 0; i < 8; i++)
929 | {
930 | PORTB = mask;
931 | PORTC = mask;
932 | mask = mask << 1;
933 | _delay((unsigned long)((500)*(32768/4000.0)));
934 | }
935 | GIE = 1;
936 | return;
937 | }
938 |
939 | void delay_ms(int milliseconds)
940 | {
941 | while(milliseconds > 0)
942 | {
943 | _delay((unsigned long)((10)*(32768/4000.0)));
944 | milliseconds--;
945 | }
946 | }
947 |
948 | void interrupt isr(void)
949 | {
950 | RA2 = 1;
951 | INTCNT = INTCNT + 1;
952 | if(INTCNT == 32)
953 | {
954 | INTCNT = 0;
955 | SEC = SEC + 1;
956 |
957 | if (SEC == 60)
958 | {
959 | SEC = 0;
960 | MIN = MIN + 1;
961 | if (MIN == 60)
962 | {
963 | MIN = 0;
964 | HOUR = HOUR + 1;
965 | if(HOUR == 13)
966 | {
967 | HOUR = 1;
968 | }
969 | }
970 | }
971 | }
972 | RA2 = 0;
973 | T0IF = 0;
974 | return;
975 | }
976 |
--------------------------------------------------------------------------------
/Software/MacroWatch.X/build/default/production/newmain1.p1:
--------------------------------------------------------------------------------
1 | Version 3.2 HI-TECH Software Intermediate Code
2 | [p mainexit ]
3 | "763 C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic16f527.h
4 | [v _CM1CON0 `Vuc ~T0 @X0 0 e@39 ]
5 | "824
6 | [v _CM2CON0 `Vuc ~T0 @X0 0 e@40 ]
7 | "1234
8 | [v _OPTION `VWuc ~T0 @X0 0 e@0 ]
9 | "949
10 | [v _ANSEL `Vuc ~T0 @X0 0 e@42 ]
11 | "319
12 | [v _PORTB `Vuc ~T0 @X0 0 e@7 ]
13 | "366
14 | [v _PORTC `Vuc ~T0 @X0 0 e@8 ]
15 | "1240
16 | [v _TRISB `VWuc ~T0 @X0 0 e@7 ]
17 | "1243
18 | [v _TRISC `VWuc ~T0 @X0 0 e@8 ]
19 | "1413
20 | [v _T0IE `Vb ~T0 @X0 0 e@813 ]
21 | "1359
22 | [v _GIE `Vb ~T0 @X0 0 e@88 ]
23 | "1407
24 | [v _RC6 `Vb ~T0 @X0 0 e@70 ]
25 | "1415
26 | [v _T0IF `Vb ~T0 @X0 0 e@93 ]
27 | [; ;htc.h: 26: extern const char __xc8_OPTIM_SPEED;
28 | [; ;xc8debug.h: 14: extern void __builtin_software_breakpoint(void);
29 | [; ;pic16f527.h: 49: extern volatile unsigned char INDF @ 0x000;
30 | "51 C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic16f527.h
31 | [; ;pic16f527.h: 51: asm("INDF equ 00h");
32 | [; <" INDF equ 00h ;# ">
33 | [; ;pic16f527.h: 54: typedef union {
34 | [; ;pic16f527.h: 55: struct {
35 | [; ;pic16f527.h: 56: unsigned INDF :8;
36 | [; ;pic16f527.h: 57: };
37 | [; ;pic16f527.h: 58: } INDFbits_t;
38 | [; ;pic16f527.h: 59: extern volatile INDFbits_t INDFbits @ 0x000;
39 | [; ;pic16f527.h: 68: extern volatile unsigned char TMR0 @ 0x001;
40 | "70
41 | [; ;pic16f527.h: 70: asm("TMR0 equ 01h");
42 | [; <" TMR0 equ 01h ;# ">
43 | [; ;pic16f527.h: 73: typedef union {
44 | [; ;pic16f527.h: 74: struct {
45 | [; ;pic16f527.h: 75: unsigned TMR0 :8;
46 | [; ;pic16f527.h: 76: };
47 | [; ;pic16f527.h: 77: } TMR0bits_t;
48 | [; ;pic16f527.h: 78: extern volatile TMR0bits_t TMR0bits @ 0x001;
49 | [; ;pic16f527.h: 87: extern volatile unsigned char PCL @ 0x002;
50 | "89
51 | [; ;pic16f527.h: 89: asm("PCL equ 02h");
52 | [; <" PCL equ 02h ;# ">
53 | [; ;pic16f527.h: 92: typedef union {
54 | [; ;pic16f527.h: 93: struct {
55 | [; ;pic16f527.h: 94: unsigned PCL :8;
56 | [; ;pic16f527.h: 95: };
57 | [; ;pic16f527.h: 96: } PCLbits_t;
58 | [; ;pic16f527.h: 97: extern volatile PCLbits_t PCLbits @ 0x002;
59 | [; ;pic16f527.h: 106: extern volatile unsigned char STATUS @ 0x003;
60 | "108
61 | [; ;pic16f527.h: 108: asm("STATUS equ 03h");
62 | [; <" STATUS equ 03h ;# ">
63 | [; ;pic16f527.h: 111: typedef union {
64 | [; ;pic16f527.h: 112: struct {
65 | [; ;pic16f527.h: 113: unsigned C :1;
66 | [; ;pic16f527.h: 114: unsigned DC :1;
67 | [; ;pic16f527.h: 115: unsigned Z :1;
68 | [; ;pic16f527.h: 116: unsigned nPD :1;
69 | [; ;pic16f527.h: 117: unsigned nTO :1;
70 | [; ;pic16f527.h: 118: unsigned PA0 :1;
71 | [; ;pic16f527.h: 119: unsigned PA1 :1;
72 | [; ;pic16f527.h: 120: };
73 | [; ;pic16f527.h: 121: struct {
74 | [; ;pic16f527.h: 122: unsigned CARRY :1;
75 | [; ;pic16f527.h: 123: };
76 | [; ;pic16f527.h: 124: struct {
77 | [; ;pic16f527.h: 125: unsigned :2;
78 | [; ;pic16f527.h: 126: unsigned ZERO :1;
79 | [; ;pic16f527.h: 127: };
80 | [; ;pic16f527.h: 128: } STATUSbits_t;
81 | [; ;pic16f527.h: 129: extern volatile STATUSbits_t STATUSbits @ 0x003;
82 | [; ;pic16f527.h: 178: extern volatile unsigned char FSR @ 0x004;
83 | "180
84 | [; ;pic16f527.h: 180: asm("FSR equ 04h");
85 | [; <" FSR equ 04h ;# ">
86 | [; ;pic16f527.h: 183: typedef union {
87 | [; ;pic16f527.h: 184: struct {
88 | [; ;pic16f527.h: 185: unsigned FSR :7;
89 | [; ;pic16f527.h: 186: };
90 | [; ;pic16f527.h: 187: } FSRbits_t;
91 | [; ;pic16f527.h: 188: extern volatile FSRbits_t FSRbits @ 0x004;
92 | [; ;pic16f527.h: 197: extern volatile unsigned char OSCCAL @ 0x005;
93 | "199
94 | [; ;pic16f527.h: 199: asm("OSCCAL equ 05h");
95 | [; <" OSCCAL equ 05h ;# ">
96 | [; ;pic16f527.h: 202: typedef union {
97 | [; ;pic16f527.h: 203: struct {
98 | [; ;pic16f527.h: 204: unsigned :1;
99 | [; ;pic16f527.h: 205: unsigned CAL :7;
100 | [; ;pic16f527.h: 206: };
101 | [; ;pic16f527.h: 207: struct {
102 | [; ;pic16f527.h: 208: unsigned :1;
103 | [; ;pic16f527.h: 209: unsigned CAL0 :1;
104 | [; ;pic16f527.h: 210: unsigned CAL1 :1;
105 | [; ;pic16f527.h: 211: unsigned CAL2 :1;
106 | [; ;pic16f527.h: 212: unsigned CAL3 :1;
107 | [; ;pic16f527.h: 213: unsigned CAL4 :1;
108 | [; ;pic16f527.h: 214: unsigned CAL5 :1;
109 | [; ;pic16f527.h: 215: unsigned CAL6 :1;
110 | [; ;pic16f527.h: 216: };
111 | [; ;pic16f527.h: 217: } OSCCALbits_t;
112 | [; ;pic16f527.h: 218: extern volatile OSCCALbits_t OSCCALbits @ 0x005;
113 | [; ;pic16f527.h: 262: extern volatile unsigned char PORTA @ 0x006;
114 | "264
115 | [; ;pic16f527.h: 264: asm("PORTA equ 06h");
116 | [; <" PORTA equ 06h ;# ">
117 | [; ;pic16f527.h: 267: typedef union {
118 | [; ;pic16f527.h: 268: struct {
119 | [; ;pic16f527.h: 269: unsigned RA :6;
120 | [; ;pic16f527.h: 270: };
121 | [; ;pic16f527.h: 271: struct {
122 | [; ;pic16f527.h: 272: unsigned RA0 :1;
123 | [; ;pic16f527.h: 273: unsigned RA1 :1;
124 | [; ;pic16f527.h: 274: unsigned RA2 :1;
125 | [; ;pic16f527.h: 275: unsigned RA3 :1;
126 | [; ;pic16f527.h: 276: unsigned RA4 :1;
127 | [; ;pic16f527.h: 277: unsigned RA5 :1;
128 | [; ;pic16f527.h: 278: };
129 | [; ;pic16f527.h: 279: } PORTAbits_t;
130 | [; ;pic16f527.h: 280: extern volatile PORTAbits_t PORTAbits @ 0x006;
131 | [; ;pic16f527.h: 319: extern volatile unsigned char PORTB @ 0x007;
132 | "321
133 | [; ;pic16f527.h: 321: asm("PORTB equ 07h");
134 | [; <" PORTB equ 07h ;# ">
135 | [; ;pic16f527.h: 324: typedef union {
136 | [; ;pic16f527.h: 325: struct {
137 | [; ;pic16f527.h: 326: unsigned :4;
138 | [; ;pic16f527.h: 327: unsigned RB :4;
139 | [; ;pic16f527.h: 328: };
140 | [; ;pic16f527.h: 329: struct {
141 | [; ;pic16f527.h: 330: unsigned :4;
142 | [; ;pic16f527.h: 331: unsigned RB4 :1;
143 | [; ;pic16f527.h: 332: unsigned RB5 :1;
144 | [; ;pic16f527.h: 333: unsigned RB6 :1;
145 | [; ;pic16f527.h: 334: unsigned RB7 :1;
146 | [; ;pic16f527.h: 335: };
147 | [; ;pic16f527.h: 336: } PORTBbits_t;
148 | [; ;pic16f527.h: 337: extern volatile PORTBbits_t PORTBbits @ 0x007;
149 | [; ;pic16f527.h: 366: extern volatile unsigned char PORTC @ 0x008;
150 | "368
151 | [; ;pic16f527.h: 368: asm("PORTC equ 08h");
152 | [; <" PORTC equ 08h ;# ">
153 | [; ;pic16f527.h: 371: typedef union {
154 | [; ;pic16f527.h: 372: struct {
155 | [; ;pic16f527.h: 373: unsigned RC :8;
156 | [; ;pic16f527.h: 374: };
157 | [; ;pic16f527.h: 375: struct {
158 | [; ;pic16f527.h: 376: unsigned RC0 :1;
159 | [; ;pic16f527.h: 377: unsigned RC1 :1;
160 | [; ;pic16f527.h: 378: unsigned RC2 :1;
161 | [; ;pic16f527.h: 379: unsigned RC3 :1;
162 | [; ;pic16f527.h: 380: unsigned RC4 :1;
163 | [; ;pic16f527.h: 381: unsigned RC5 :1;
164 | [; ;pic16f527.h: 382: unsigned RC6 :1;
165 | [; ;pic16f527.h: 383: unsigned RC7 :1;
166 | [; ;pic16f527.h: 384: };
167 | [; ;pic16f527.h: 385: } PORTCbits_t;
168 | [; ;pic16f527.h: 386: extern volatile PORTCbits_t PORTCbits @ 0x008;
169 | [; ;pic16f527.h: 435: extern volatile unsigned char ADCON0 @ 0x009;
170 | "437
171 | [; ;pic16f527.h: 437: asm("ADCON0 equ 09h");
172 | [; <" ADCON0 equ 09h ;# ">
173 | [; ;pic16f527.h: 440: typedef union {
174 | [; ;pic16f527.h: 441: struct {
175 | [; ;pic16f527.h: 442: unsigned ADON :1;
176 | [; ;pic16f527.h: 443: unsigned GO_nDONE :1;
177 | [; ;pic16f527.h: 444: unsigned CHS :4;
178 | [; ;pic16f527.h: 445: unsigned ADCS :2;
179 | [; ;pic16f527.h: 446: };
180 | [; ;pic16f527.h: 447: struct {
181 | [; ;pic16f527.h: 448: unsigned :1;
182 | [; ;pic16f527.h: 449: unsigned GO :1;
183 | [; ;pic16f527.h: 450: unsigned CHS0 :1;
184 | [; ;pic16f527.h: 451: unsigned CHS1 :1;
185 | [; ;pic16f527.h: 452: unsigned CHS2 :1;
186 | [; ;pic16f527.h: 453: unsigned CHS3 :1;
187 | [; ;pic16f527.h: 454: unsigned ADCS0 :1;
188 | [; ;pic16f527.h: 455: unsigned ADCS1 :1;
189 | [; ;pic16f527.h: 456: };
190 | [; ;pic16f527.h: 457: struct {
191 | [; ;pic16f527.h: 458: unsigned :1;
192 | [; ;pic16f527.h: 459: unsigned NOT_DONE :1;
193 | [; ;pic16f527.h: 460: };
194 | [; ;pic16f527.h: 461: } ADCON0bits_t;
195 | [; ;pic16f527.h: 462: extern volatile ADCON0bits_t ADCON0bits @ 0x009;
196 | [; ;pic16f527.h: 526: extern volatile unsigned char ADRES @ 0x00A;
197 | "528
198 | [; ;pic16f527.h: 528: asm("ADRES equ 0Ah");
199 | [; <" ADRES equ 0Ah ;# ">
200 | [; ;pic16f527.h: 531: typedef union {
201 | [; ;pic16f527.h: 532: struct {
202 | [; ;pic16f527.h: 533: unsigned ADRES :8;
203 | [; ;pic16f527.h: 534: };
204 | [; ;pic16f527.h: 535: struct {
205 | [; ;pic16f527.h: 536: unsigned ADRES0 :1;
206 | [; ;pic16f527.h: 537: unsigned ADRES1 :1;
207 | [; ;pic16f527.h: 538: unsigned ADRES2 :1;
208 | [; ;pic16f527.h: 539: unsigned ADRES3 :1;
209 | [; ;pic16f527.h: 540: unsigned ADRES4 :1;
210 | [; ;pic16f527.h: 541: unsigned ADRES5 :1;
211 | [; ;pic16f527.h: 542: unsigned ADRES6 :1;
212 | [; ;pic16f527.h: 543: unsigned ADRES7 :1;
213 | [; ;pic16f527.h: 544: };
214 | [; ;pic16f527.h: 545: } ADRESbits_t;
215 | [; ;pic16f527.h: 546: extern volatile ADRESbits_t ADRESbits @ 0x00A;
216 | [; ;pic16f527.h: 595: extern volatile unsigned char INTCON0 @ 0x00B;
217 | "597
218 | [; ;pic16f527.h: 597: asm("INTCON0 equ 0Bh");
219 | [; <" INTCON0 equ 0Bh ;# ">
220 | [; ;pic16f527.h: 600: extern volatile unsigned char INTCON @ 0x00B;
221 | "602
222 | [; ;pic16f527.h: 602: asm("INTCON equ 0Bh");
223 | [; <" INTCON equ 0Bh ;# ">
224 | [; ;pic16f527.h: 605: typedef union {
225 | [; ;pic16f527.h: 606: struct {
226 | [; ;pic16f527.h: 607: unsigned GIE :1;
227 | [; ;pic16f527.h: 608: unsigned :3;
228 | [; ;pic16f527.h: 609: unsigned RAIF :1;
229 | [; ;pic16f527.h: 610: unsigned T0IF :1;
230 | [; ;pic16f527.h: 611: unsigned CWIF :1;
231 | [; ;pic16f527.h: 612: unsigned ADIF :1;
232 | [; ;pic16f527.h: 613: };
233 | [; ;pic16f527.h: 614: } INTCON0bits_t;
234 | [; ;pic16f527.h: 615: extern volatile INTCON0bits_t INTCON0bits @ 0x00B;
235 | [; ;pic16f527.h: 643: typedef union {
236 | [; ;pic16f527.h: 644: struct {
237 | [; ;pic16f527.h: 645: unsigned GIE :1;
238 | [; ;pic16f527.h: 646: unsigned :3;
239 | [; ;pic16f527.h: 647: unsigned RAIF :1;
240 | [; ;pic16f527.h: 648: unsigned T0IF :1;
241 | [; ;pic16f527.h: 649: unsigned CWIF :1;
242 | [; ;pic16f527.h: 650: unsigned ADIF :1;
243 | [; ;pic16f527.h: 651: };
244 | [; ;pic16f527.h: 652: } INTCONbits_t;
245 | [; ;pic16f527.h: 653: extern volatile INTCONbits_t INTCONbits @ 0x00B;
246 | [; ;pic16f527.h: 682: extern volatile unsigned char EECON @ 0x021;
247 | "684
248 | [; ;pic16f527.h: 684: asm("EECON equ 021h");
249 | [; <" EECON equ 021h ;# ">
250 | [; ;pic16f527.h: 687: typedef union {
251 | [; ;pic16f527.h: 688: struct {
252 | [; ;pic16f527.h: 689: unsigned RD :1;
253 | [; ;pic16f527.h: 690: unsigned WR :1;
254 | [; ;pic16f527.h: 691: unsigned WREN :1;
255 | [; ;pic16f527.h: 692: unsigned WRERR :1;
256 | [; ;pic16f527.h: 693: unsigned FREE :1;
257 | [; ;pic16f527.h: 694: };
258 | [; ;pic16f527.h: 695: } EECONbits_t;
259 | [; ;pic16f527.h: 696: extern volatile EECONbits_t EECONbits @ 0x021;
260 | [; ;pic16f527.h: 725: extern volatile unsigned char EEDATA @ 0x025;
261 | "727
262 | [; ;pic16f527.h: 727: asm("EEDATA equ 025h");
263 | [; <" EEDATA equ 025h ;# ">
264 | [; ;pic16f527.h: 730: typedef union {
265 | [; ;pic16f527.h: 731: struct {
266 | [; ;pic16f527.h: 732: unsigned EEDATA :8;
267 | [; ;pic16f527.h: 733: };
268 | [; ;pic16f527.h: 734: } EEDATAbits_t;
269 | [; ;pic16f527.h: 735: extern volatile EEDATAbits_t EEDATAbits @ 0x025;
270 | [; ;pic16f527.h: 744: extern volatile unsigned char EEADR @ 0x026;
271 | "746
272 | [; ;pic16f527.h: 746: asm("EEADR equ 026h");
273 | [; <" EEADR equ 026h ;# ">
274 | [; ;pic16f527.h: 749: typedef union {
275 | [; ;pic16f527.h: 750: struct {
276 | [; ;pic16f527.h: 751: unsigned EEADR :6;
277 | [; ;pic16f527.h: 752: };
278 | [; ;pic16f527.h: 753: } EEADRbits_t;
279 | [; ;pic16f527.h: 754: extern volatile EEADRbits_t EEADRbits @ 0x026;
280 | [; ;pic16f527.h: 763: extern volatile unsigned char CM1CON0 @ 0x027;
281 | "765
282 | [; ;pic16f527.h: 765: asm("CM1CON0 equ 027h");
283 | [; <" CM1CON0 equ 027h ;# ">
284 | [; ;pic16f527.h: 768: typedef union {
285 | [; ;pic16f527.h: 769: struct {
286 | [; ;pic16f527.h: 770: unsigned nC1WU :1;
287 | [; ;pic16f527.h: 771: unsigned C1PREF :1;
288 | [; ;pic16f527.h: 772: unsigned C1NREF :1;
289 | [; ;pic16f527.h: 773: unsigned C1ON :1;
290 | [; ;pic16f527.h: 774: unsigned nC1T0CS :1;
291 | [; ;pic16f527.h: 775: unsigned C1POL :1;
292 | [; ;pic16f527.h: 776: unsigned nC1OUTEN :1;
293 | [; ;pic16f527.h: 777: unsigned C1OUT :1;
294 | [; ;pic16f527.h: 778: };
295 | [; ;pic16f527.h: 779: } CM1CON0bits_t;
296 | [; ;pic16f527.h: 780: extern volatile CM1CON0bits_t CM1CON0bits @ 0x027;
297 | [; ;pic16f527.h: 824: extern volatile unsigned char CM2CON0 @ 0x028;
298 | "826
299 | [; ;pic16f527.h: 826: asm("CM2CON0 equ 028h");
300 | [; <" CM2CON0 equ 028h ;# ">
301 | [; ;pic16f527.h: 829: typedef union {
302 | [; ;pic16f527.h: 830: struct {
303 | [; ;pic16f527.h: 831: unsigned nC2WU :1;
304 | [; ;pic16f527.h: 832: unsigned C2PREF1 :1;
305 | [; ;pic16f527.h: 833: unsigned C2NREF :1;
306 | [; ;pic16f527.h: 834: unsigned C2ON :1;
307 | [; ;pic16f527.h: 835: unsigned C2PREF2 :1;
308 | [; ;pic16f527.h: 836: unsigned C2POL :1;
309 | [; ;pic16f527.h: 837: unsigned nC2OUTEN :1;
310 | [; ;pic16f527.h: 838: unsigned C2OUT :1;
311 | [; ;pic16f527.h: 839: };
312 | [; ;pic16f527.h: 840: } CM2CON0bits_t;
313 | [; ;pic16f527.h: 841: extern volatile CM2CON0bits_t CM2CON0bits @ 0x028;
314 | [; ;pic16f527.h: 885: extern volatile unsigned char VRCON @ 0x029;
315 | "887
316 | [; ;pic16f527.h: 887: asm("VRCON equ 029h");
317 | [; <" VRCON equ 029h ;# ">
318 | [; ;pic16f527.h: 890: typedef union {
319 | [; ;pic16f527.h: 891: struct {
320 | [; ;pic16f527.h: 892: unsigned VR :4;
321 | [; ;pic16f527.h: 893: unsigned :1;
322 | [; ;pic16f527.h: 894: unsigned VRR :1;
323 | [; ;pic16f527.h: 895: unsigned VROE :1;
324 | [; ;pic16f527.h: 896: unsigned VREN :1;
325 | [; ;pic16f527.h: 897: };
326 | [; ;pic16f527.h: 898: struct {
327 | [; ;pic16f527.h: 899: unsigned VR0 :1;
328 | [; ;pic16f527.h: 900: unsigned VR1 :1;
329 | [; ;pic16f527.h: 901: unsigned VR2 :1;
330 | [; ;pic16f527.h: 902: unsigned VR3 :1;
331 | [; ;pic16f527.h: 903: };
332 | [; ;pic16f527.h: 904: } VRCONbits_t;
333 | [; ;pic16f527.h: 905: extern volatile VRCONbits_t VRCONbits @ 0x029;
334 | [; ;pic16f527.h: 949: extern volatile unsigned char ANSEL @ 0x02A;
335 | "951
336 | [; ;pic16f527.h: 951: asm("ANSEL equ 02Ah");
337 | [; <" ANSEL equ 02Ah ;# ">
338 | [; ;pic16f527.h: 954: typedef union {
339 | [; ;pic16f527.h: 955: struct {
340 | [; ;pic16f527.h: 956: unsigned ANS0 :1;
341 | [; ;pic16f527.h: 957: unsigned ANS1 :1;
342 | [; ;pic16f527.h: 958: unsigned ANS2 :1;
343 | [; ;pic16f527.h: 959: unsigned ANS3 :1;
344 | [; ;pic16f527.h: 960: unsigned ANS4 :1;
345 | [; ;pic16f527.h: 961: unsigned ANS5 :1;
346 | [; ;pic16f527.h: 962: unsigned ANS6 :1;
347 | [; ;pic16f527.h: 963: unsigned ANS7 :1;
348 | [; ;pic16f527.h: 964: };
349 | [; ;pic16f527.h: 965: } ANSELbits_t;
350 | [; ;pic16f527.h: 966: extern volatile ANSELbits_t ANSELbits @ 0x02A;
351 | [; ;pic16f527.h: 1010: extern volatile unsigned char IW @ 0x061;
352 | "1012
353 | [; ;pic16f527.h: 1012: asm("IW equ 061h");
354 | [; <" IW equ 061h ;# ">
355 | [; ;pic16f527.h: 1015: typedef union {
356 | [; ;pic16f527.h: 1016: struct {
357 | [; ;pic16f527.h: 1017: unsigned IWREG :8;
358 | [; ;pic16f527.h: 1018: };
359 | [; ;pic16f527.h: 1019: } IWbits_t;
360 | [; ;pic16f527.h: 1020: extern volatile IWbits_t IWbits @ 0x061;
361 | [; ;pic16f527.h: 1029: extern volatile unsigned char INTCON1 @ 0x065;
362 | "1031
363 | [; ;pic16f527.h: 1031: asm("INTCON1 equ 065h");
364 | [; <" INTCON1 equ 065h ;# ">
365 | [; ;pic16f527.h: 1034: extern volatile unsigned char INTIE_REG @ 0x065;
366 | "1036
367 | [; ;pic16f527.h: 1036: asm("INTIE_REG equ 065h");
368 | [; <" INTIE_REG equ 065h ;# ">
369 | [; ;pic16f527.h: 1039: typedef union {
370 | [; ;pic16f527.h: 1040: struct {
371 | [; ;pic16f527.h: 1041: unsigned WUR :1;
372 | [; ;pic16f527.h: 1042: unsigned :3;
373 | [; ;pic16f527.h: 1043: unsigned RAIE :1;
374 | [; ;pic16f527.h: 1044: unsigned T0IE :1;
375 | [; ;pic16f527.h: 1045: unsigned CWIE :1;
376 | [; ;pic16f527.h: 1046: unsigned ADIE :1;
377 | [; ;pic16f527.h: 1047: };
378 | [; ;pic16f527.h: 1048: } INTCON1bits_t;
379 | [; ;pic16f527.h: 1049: extern volatile INTCON1bits_t INTCON1bits @ 0x065;
380 | [; ;pic16f527.h: 1077: typedef union {
381 | [; ;pic16f527.h: 1078: struct {
382 | [; ;pic16f527.h: 1079: unsigned WUR :1;
383 | [; ;pic16f527.h: 1080: unsigned :3;
384 | [; ;pic16f527.h: 1081: unsigned RAIE :1;
385 | [; ;pic16f527.h: 1082: unsigned T0IE :1;
386 | [; ;pic16f527.h: 1083: unsigned CWIE :1;
387 | [; ;pic16f527.h: 1084: unsigned ADIE :1;
388 | [; ;pic16f527.h: 1085: };
389 | [; ;pic16f527.h: 1086: } INTIE_REGbits_t;
390 | [; ;pic16f527.h: 1087: extern volatile INTIE_REGbits_t INTIE_REGbits @ 0x065;
391 | [; ;pic16f527.h: 1116: extern volatile unsigned char ISTATUS @ 0x066;
392 | "1118
393 | [; ;pic16f527.h: 1118: asm("ISTATUS equ 066h");
394 | [; <" ISTATUS equ 066h ;# ">
395 | [; ;pic16f527.h: 1121: typedef union {
396 | [; ;pic16f527.h: 1122: struct {
397 | [; ;pic16f527.h: 1123: unsigned C :1;
398 | [; ;pic16f527.h: 1124: unsigned DC :1;
399 | [; ;pic16f527.h: 1125: unsigned Z :1;
400 | [; ;pic16f527.h: 1126: unsigned nPD :1;
401 | [; ;pic16f527.h: 1127: unsigned nTO :1;
402 | [; ;pic16f527.h: 1128: unsigned PA0 :1;
403 | [; ;pic16f527.h: 1129: unsigned PA1 :1;
404 | [; ;pic16f527.h: 1130: };
405 | [; ;pic16f527.h: 1131: } ISTATUSbits_t;
406 | [; ;pic16f527.h: 1132: extern volatile ISTATUSbits_t ISTATUSbits @ 0x066;
407 | [; ;pic16f527.h: 1171: extern volatile unsigned char IFSR @ 0x067;
408 | "1173
409 | [; ;pic16f527.h: 1173: asm("IFSR equ 067h");
410 | [; <" IFSR equ 067h ;# ">
411 | [; ;pic16f527.h: 1176: typedef union {
412 | [; ;pic16f527.h: 1177: struct {
413 | [; ;pic16f527.h: 1178: unsigned IFSR :7;
414 | [; ;pic16f527.h: 1179: };
415 | [; ;pic16f527.h: 1180: } IFSRbits_t;
416 | [; ;pic16f527.h: 1181: extern volatile IFSRbits_t IFSRbits @ 0x067;
417 | [; ;pic16f527.h: 1190: extern volatile unsigned char IBSR @ 0x068;
418 | "1192
419 | [; ;pic16f527.h: 1192: asm("IBSR equ 068h");
420 | [; <" IBSR equ 068h ;# ">
421 | [; ;pic16f527.h: 1195: typedef union {
422 | [; ;pic16f527.h: 1196: struct {
423 | [; ;pic16f527.h: 1197: unsigned IBSR :2;
424 | [; ;pic16f527.h: 1198: };
425 | [; ;pic16f527.h: 1199: } IBSRbits_t;
426 | [; ;pic16f527.h: 1200: extern volatile IBSRbits_t IBSRbits @ 0x068;
427 | [; ;pic16f527.h: 1209: extern volatile unsigned char OPACON @ 0x069;
428 | "1211
429 | [; ;pic16f527.h: 1211: asm("OPACON equ 069h");
430 | [; <" OPACON equ 069h ;# ">
431 | [; ;pic16f527.h: 1214: typedef union {
432 | [; ;pic16f527.h: 1215: struct {
433 | [; ;pic16f527.h: 1216: unsigned OPA1ON :1;
434 | [; ;pic16f527.h: 1217: unsigned OPA2ON :1;
435 | [; ;pic16f527.h: 1218: };
436 | [; ;pic16f527.h: 1219: } OPACONbits_t;
437 | [; ;pic16f527.h: 1220: extern volatile OPACONbits_t OPACONbits @ 0x069;
438 | [; ;pic16f527.h: 1234: extern volatile __control unsigned char OPTION @ 0x000;
439 | [; ;pic16f527.h: 1237: extern volatile __control unsigned char TRISA @ 0x006;
440 | [; ;pic16f527.h: 1240: extern volatile __control unsigned char TRISB @ 0x007;
441 | [; ;pic16f527.h: 1243: extern volatile __control unsigned char TRISC @ 0x008;
442 | [; ;pic16f527.h: 1265: extern volatile __bit ADCS0 @ (((unsigned) &ADCON0)*8) + 6;
443 | [; ;pic16f527.h: 1267: extern volatile __bit ADCS1 @ (((unsigned) &ADCON0)*8) + 7;
444 | [; ;pic16f527.h: 1269: extern volatile __bit ADIE @ (((unsigned) &INTCON1)*8) + 7;
445 | [; ;pic16f527.h: 1271: extern volatile __bit ADIF @ (((unsigned) &INTCON0)*8) + 7;
446 | [; ;pic16f527.h: 1273: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
447 | [; ;pic16f527.h: 1275: extern volatile __bit ADRES0 @ (((unsigned) &ADRES)*8) + 0;
448 | [; ;pic16f527.h: 1277: extern volatile __bit ADRES1 @ (((unsigned) &ADRES)*8) + 1;
449 | [; ;pic16f527.h: 1279: extern volatile __bit ADRES2 @ (((unsigned) &ADRES)*8) + 2;
450 | [; ;pic16f527.h: 1281: extern volatile __bit ADRES3 @ (((unsigned) &ADRES)*8) + 3;
451 | [; ;pic16f527.h: 1283: extern volatile __bit ADRES4 @ (((unsigned) &ADRES)*8) + 4;
452 | [; ;pic16f527.h: 1285: extern volatile __bit ADRES5 @ (((unsigned) &ADRES)*8) + 5;
453 | [; ;pic16f527.h: 1287: extern volatile __bit ADRES6 @ (((unsigned) &ADRES)*8) + 6;
454 | [; ;pic16f527.h: 1289: extern volatile __bit ADRES7 @ (((unsigned) &ADRES)*8) + 7;
455 | [; ;pic16f527.h: 1291: extern volatile __bit ANS0 @ (((unsigned) &ANSEL)*8) + 0;
456 | [; ;pic16f527.h: 1293: extern volatile __bit ANS1 @ (((unsigned) &ANSEL)*8) + 1;
457 | [; ;pic16f527.h: 1295: extern volatile __bit ANS2 @ (((unsigned) &ANSEL)*8) + 2;
458 | [; ;pic16f527.h: 1297: extern volatile __bit ANS3 @ (((unsigned) &ANSEL)*8) + 3;
459 | [; ;pic16f527.h: 1299: extern volatile __bit ANS4 @ (((unsigned) &ANSEL)*8) + 4;
460 | [; ;pic16f527.h: 1301: extern volatile __bit ANS5 @ (((unsigned) &ANSEL)*8) + 5;
461 | [; ;pic16f527.h: 1303: extern volatile __bit ANS6 @ (((unsigned) &ANSEL)*8) + 6;
462 | [; ;pic16f527.h: 1305: extern volatile __bit ANS7 @ (((unsigned) &ANSEL)*8) + 7;
463 | [; ;pic16f527.h: 1307: extern volatile __bit C1NREF @ (((unsigned) &CM1CON0)*8) + 2;
464 | [; ;pic16f527.h: 1309: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 3;
465 | [; ;pic16f527.h: 1311: extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 7;
466 | [; ;pic16f527.h: 1313: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 5;
467 | [; ;pic16f527.h: 1315: extern volatile __bit C1PREF @ (((unsigned) &CM1CON0)*8) + 1;
468 | [; ;pic16f527.h: 1317: extern volatile __bit C2NREF @ (((unsigned) &CM2CON0)*8) + 2;
469 | [; ;pic16f527.h: 1319: extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 3;
470 | [; ;pic16f527.h: 1321: extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 7;
471 | [; ;pic16f527.h: 1323: extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 5;
472 | [; ;pic16f527.h: 1325: extern volatile __bit C2PREF1 @ (((unsigned) &CM2CON0)*8) + 1;
473 | [; ;pic16f527.h: 1327: extern volatile __bit C2PREF2 @ (((unsigned) &CM2CON0)*8) + 4;
474 | [; ;pic16f527.h: 1329: extern volatile __bit CAL0 @ (((unsigned) &OSCCAL)*8) + 1;
475 | [; ;pic16f527.h: 1331: extern volatile __bit CAL1 @ (((unsigned) &OSCCAL)*8) + 2;
476 | [; ;pic16f527.h: 1333: extern volatile __bit CAL2 @ (((unsigned) &OSCCAL)*8) + 3;
477 | [; ;pic16f527.h: 1335: extern volatile __bit CAL3 @ (((unsigned) &OSCCAL)*8) + 4;
478 | [; ;pic16f527.h: 1337: extern volatile __bit CAL4 @ (((unsigned) &OSCCAL)*8) + 5;
479 | [; ;pic16f527.h: 1339: extern volatile __bit CAL5 @ (((unsigned) &OSCCAL)*8) + 6;
480 | [; ;pic16f527.h: 1341: extern volatile __bit CAL6 @ (((unsigned) &OSCCAL)*8) + 7;
481 | [; ;pic16f527.h: 1343: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
482 | [; ;pic16f527.h: 1345: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
483 | [; ;pic16f527.h: 1347: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
484 | [; ;pic16f527.h: 1349: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
485 | [; ;pic16f527.h: 1351: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
486 | [; ;pic16f527.h: 1353: extern volatile __bit CWIE @ (((unsigned) &INTCON1)*8) + 6;
487 | [; ;pic16f527.h: 1355: extern volatile __bit CWIF @ (((unsigned) &INTCON0)*8) + 6;
488 | [; ;pic16f527.h: 1357: extern volatile __bit FREE @ (((unsigned) &EECON)*8) + 4;
489 | [; ;pic16f527.h: 1359: extern volatile __bit GIE @ (((unsigned) &INTCON0)*8) + 0;
490 | [; ;pic16f527.h: 1361: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
491 | [; ;pic16f527.h: 1363: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
492 | [; ;pic16f527.h: 1365: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
493 | [; ;pic16f527.h: 1367: extern volatile __bit OPA1ON @ (((unsigned) &OPACON)*8) + 0;
494 | [; ;pic16f527.h: 1369: extern volatile __bit OPA2ON @ (((unsigned) &OPACON)*8) + 1;
495 | [; ;pic16f527.h: 1371: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
496 | [; ;pic16f527.h: 1373: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
497 | [; ;pic16f527.h: 1375: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
498 | [; ;pic16f527.h: 1377: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
499 | [; ;pic16f527.h: 1379: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
500 | [; ;pic16f527.h: 1381: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
501 | [; ;pic16f527.h: 1383: extern volatile __bit RAIE @ (((unsigned) &INTCON1)*8) + 4;
502 | [; ;pic16f527.h: 1385: extern volatile __bit RAIF @ (((unsigned) &INTCON0)*8) + 4;
503 | [; ;pic16f527.h: 1387: extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
504 | [; ;pic16f527.h: 1389: extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
505 | [; ;pic16f527.h: 1391: extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
506 | [; ;pic16f527.h: 1393: extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
507 | [; ;pic16f527.h: 1395: extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
508 | [; ;pic16f527.h: 1397: extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
509 | [; ;pic16f527.h: 1399: extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
510 | [; ;pic16f527.h: 1401: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
511 | [; ;pic16f527.h: 1403: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
512 | [; ;pic16f527.h: 1405: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
513 | [; ;pic16f527.h: 1407: extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
514 | [; ;pic16f527.h: 1409: extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
515 | [; ;pic16f527.h: 1411: extern volatile __bit RD @ (((unsigned) &EECON)*8) + 0;
516 | [; ;pic16f527.h: 1413: extern volatile __bit T0IE @ (((unsigned) &INTCON1)*8) + 5;
517 | [; ;pic16f527.h: 1415: extern volatile __bit T0IF @ (((unsigned) &INTCON0)*8) + 5;
518 | [; ;pic16f527.h: 1417: extern volatile __bit VR0 @ (((unsigned) &VRCON)*8) + 0;
519 | [; ;pic16f527.h: 1419: extern volatile __bit VR1 @ (((unsigned) &VRCON)*8) + 1;
520 | [; ;pic16f527.h: 1421: extern volatile __bit VR2 @ (((unsigned) &VRCON)*8) + 2;
521 | [; ;pic16f527.h: 1423: extern volatile __bit VR3 @ (((unsigned) &VRCON)*8) + 3;
522 | [; ;pic16f527.h: 1425: extern volatile __bit VREN @ (((unsigned) &VRCON)*8) + 7;
523 | [; ;pic16f527.h: 1427: extern volatile __bit VROE @ (((unsigned) &VRCON)*8) + 6;
524 | [; ;pic16f527.h: 1429: extern volatile __bit VRR @ (((unsigned) &VRCON)*8) + 5;
525 | [; ;pic16f527.h: 1431: extern volatile __bit WR @ (((unsigned) &EECON)*8) + 1;
526 | [; ;pic16f527.h: 1433: extern volatile __bit WREN @ (((unsigned) &EECON)*8) + 2;
527 | [; ;pic16f527.h: 1435: extern volatile __bit WRERR @ (((unsigned) &EECON)*8) + 3;
528 | [; ;pic16f527.h: 1437: extern volatile __bit WUR @ (((unsigned) &INTCON1)*8) + 0;
529 | [; ;pic16f527.h: 1439: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
530 | [; ;pic16f527.h: 1441: extern volatile __bit nC1OUTEN @ (((unsigned) &CM1CON0)*8) + 6;
531 | [; ;pic16f527.h: 1443: extern volatile __bit nC1T0CS @ (((unsigned) &CM1CON0)*8) + 4;
532 | [; ;pic16f527.h: 1445: extern volatile __bit nC1WU @ (((unsigned) &CM1CON0)*8) + 0;
533 | [; ;pic16f527.h: 1447: extern volatile __bit nC2OUTEN @ (((unsigned) &CM2CON0)*8) + 6;
534 | [; ;pic16f527.h: 1449: extern volatile __bit nC2WU @ (((unsigned) &CM2CON0)*8) + 0;
535 | [; ;pic.h: 28: extern void __nop(void);
536 | [; ;pic.h: 76: extern unsigned int flash_read(unsigned short addr);
537 | [; ;pic.h: 140: extern void flash_erase(unsigned short addr);
538 | [; ;pic.h: 150: extern __nonreentrant void _delay(unsigned long);
539 | [; ;pic.h: 184: extern unsigned char __resetbits;
540 | [; ;pic.h: 185: extern __bit __powerdown;
541 | [; ;pic.h: 186: extern __bit __timeout;
542 | "21 newmain1.c
543 | [p x FOSC=LP ]
544 | "22
545 | [p x WDTE=OFF ]
546 | "23
547 | [p x CP=OFF ]
548 | "24
549 | [p x MCLRE=ON ]
550 | "25
551 | [p x IOSCFS=8MHz ]
552 | "26
553 | [p x CPSW=OFF ]
554 | "27
555 | [p x BOREN=OFF ]
556 | "28
557 | [p x DRTEN=OFF ]
558 | "46
559 | [v _HOUR `uc ~T0 @X0 1 e ]
560 | [i _HOUR
561 | -> -> 1 `i `uc
562 | ]
563 | [; ;newmain1.c: 46: char HOUR = 1;
564 | "47
565 | [v _MIN `uc ~T0 @X0 1 e ]
566 | [i _MIN
567 | -> -> 0 `i `uc
568 | ]
569 | [; ;newmain1.c: 47: char MIN = 0;
570 | "48
571 | [v _INTCNT `i ~T0 @X0 1 e ]
572 | [i _INTCNT
573 | -> 0 `i
574 | ]
575 | [; ;newmain1.c: 48: int INTCNT = 0;
576 | "50
577 | [v _main `(v ~T0 @X0 1 ef ]
578 | {
579 | [; ;newmain1.c: 50: void main(void) {
580 | [e :U _main ]
581 | [f ]
582 | [; ;newmain1.c: 52: CM1CON0 = 0x00;
583 | "52
584 | [e = _CM1CON0 -> -> 0 `i `uc ]
585 | [; ;newmain1.c: 53: CM2CON0 = 0x00;
586 | "53
587 | [e = _CM2CON0 -> -> 0 `i `uc ]
588 | [; ;newmain1.c: 54: OPTION = 0b11001000;
589 | "54
590 | [e = _OPTION -> -> 200 `i `uc ]
591 | [; ;newmain1.c: 55: ANSEL = 0x00;
592 | "55
593 | [e = _ANSEL -> -> 0 `i `uc ]
594 | [; ;newmain1.c: 56: PORTB = 0x00;
595 | "56
596 | [e = _PORTB -> -> 0 `i `uc ]
597 | [; ;newmain1.c: 57: PORTC = 0x00;
598 | "57
599 | [e = _PORTC -> -> 0 `i `uc ]
600 | [; ;newmain1.c: 58: TRISB = 0x00;
601 | "58
602 | [e = _TRISB -> -> 0 `i `uc ]
603 | [; ;newmain1.c: 59: TRISC = 0x80;
604 | "59
605 | [e = _TRISC -> -> 128 `i `uc ]
606 | [; ;newmain1.c: 61: T0IE = 1;
607 | "61
608 | [e = _T0IE -> -> 1 `i `b ]
609 | [; ;newmain1.c: 62: GIE=1;
610 | "62
611 | [e = _GIE -> -> 1 `i `b ]
612 | [; ;newmain1.c: 69: while (1)
613 | "69
614 | [e :U 67 ]
615 | [; ;newmain1.c: 70: {
616 | "70
617 | {
618 | [; ;newmain1.c: 71: PORTB = HOUR << 4;
619 | "71
620 | [e = _PORTB -> << -> _HOUR `i -> 4 `i `uc ]
621 | [; ;newmain1.c: 72: PORTC = MIN;
622 | "72
623 | [e = _PORTC _MIN ]
624 | "85
625 | }
626 | [e :U 66 ]
627 | "69
628 | [e $U 67 ]
629 | [e :U 68 ]
630 | [; ;newmain1.c: 85: }
631 | [; ;newmain1.c: 86: return;
632 | "86
633 | [e $UE 65 ]
634 | [; ;newmain1.c: 87: }
635 | "87
636 | [e :UE 65 ]
637 | }
638 | [v F541 `(v ~T0 @X0 1 tf ]
639 | "89
640 | [v _isr `IF541 ~T0 @X0 1 e ]
641 | "90
642 | {
643 | [; ;newmain1.c: 89: void interrupt isr(void)
644 | [; ;newmain1.c: 90: {
645 | [e :U _isr ]
646 | [f ]
647 | [; ;newmain1.c: 91: RC6 = 1;
648 | "91
649 | [e = _RC6 -> -> 1 `i `b ]
650 | [; ;newmain1.c: 92: INTCNT = INTCNT + 1;
651 | "92
652 | [e = _INTCNT + _INTCNT -> 1 `i ]
653 | [; ;newmain1.c: 93: if(INTCNT == 32)
654 | "93
655 | [e $ ! == _INTCNT -> 32 `i 70 ]
656 | [; ;newmain1.c: 94: {
657 | "94
658 | {
659 | [; ;newmain1.c: 95: INTCNT = 0;
660 | "95
661 | [e = _INTCNT -> 0 `i ]
662 | [; ;newmain1.c: 96: MIN = MIN + 1;
663 | "96
664 | [e = _MIN -> + -> _MIN `i -> 1 `i `uc ]
665 | [; ;newmain1.c: 98: if (MIN == 60)
666 | "98
667 | [e $ ! == -> _MIN `i -> 60 `i 71 ]
668 | [; ;newmain1.c: 99: {
669 | "99
670 | {
671 | [; ;newmain1.c: 100: MIN = 0;
672 | "100
673 | [e = _MIN -> -> 0 `i `uc ]
674 | [; ;newmain1.c: 101: HOUR = HOUR + 1;
675 | "101
676 | [e = _HOUR -> + -> _HOUR `i -> 1 `i `uc ]
677 | [; ;newmain1.c: 102: if(HOUR == 13)
678 | "102
679 | [e $ ! == -> _HOUR `i -> 13 `i 72 ]
680 | [; ;newmain1.c: 103: {
681 | "103
682 | {
683 | [; ;newmain1.c: 104: HOUR = 1;
684 | "104
685 | [e = _HOUR -> -> 1 `i `uc ]
686 | "105
687 | }
688 | [e :U 72 ]
689 | "106
690 | }
691 | [e :U 71 ]
692 | "107
693 | }
694 | [e :U 70 ]
695 | [; ;newmain1.c: 105: }
696 | [; ;newmain1.c: 106: }
697 | [; ;newmain1.c: 107: }
698 | [; ;newmain1.c: 108: RC6 = 0;
699 | "108
700 | [e = _RC6 -> -> 0 `i `b ]
701 | [; ;newmain1.c: 109: T0IF = 0;
702 | "109
703 | [e = _T0IF -> -> 0 `i `b ]
704 | [; ;newmain1.c: 110: return;
705 | "110
706 | [e $UE 69 ]
707 | [; ;newmain1.c: 111: }
708 | "111
709 | [e :UE 69 ]
710 | }
711 |
--------------------------------------------------------------------------------
/Software/MacroWatch.X/build/default/production/newmain1.p1.d:
--------------------------------------------------------------------------------
1 | build/default/production/newmain1.d \
2 | build/default/production/newmain1.p1: \
3 | newmain1.c
--------------------------------------------------------------------------------
/Software/MacroWatch.X/build/default/production/newmain1.pre:
--------------------------------------------------------------------------------
1 |
2 | # 1 "newmain1.c"
3 |
4 | # 26 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\htc.h"
5 | extern const char __xc8_OPTIM_SPEED;
6 |
7 |
8 | # 13 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\xc8debug.h"
9 | #pragma intrinsic(__builtin_software_breakpoint)
10 | extern void __builtin_software_breakpoint(void);
11 |
12 | # 49 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic16f527.h"
13 | extern volatile unsigned char INDF @ 0x000;
14 |
15 | asm("INDF equ 00h");
16 |
17 |
18 | typedef union {
19 | struct {
20 | unsigned INDF :8;
21 | };
22 | } INDFbits_t;
23 | extern volatile INDFbits_t INDFbits @ 0x000;
24 |
25 | # 68
26 | extern volatile unsigned char TMR0 @ 0x001;
27 |
28 | asm("TMR0 equ 01h");
29 |
30 |
31 | typedef union {
32 | struct {
33 | unsigned TMR0 :8;
34 | };
35 | } TMR0bits_t;
36 | extern volatile TMR0bits_t TMR0bits @ 0x001;
37 |
38 | # 87
39 | extern volatile unsigned char PCL @ 0x002;
40 |
41 | asm("PCL equ 02h");
42 |
43 |
44 | typedef union {
45 | struct {
46 | unsigned PCL :8;
47 | };
48 | } PCLbits_t;
49 | extern volatile PCLbits_t PCLbits @ 0x002;
50 |
51 | # 106
52 | extern volatile unsigned char STATUS @ 0x003;
53 |
54 | asm("STATUS equ 03h");
55 |
56 |
57 | typedef union {
58 | struct {
59 | unsigned C :1;
60 | unsigned DC :1;
61 | unsigned Z :1;
62 | unsigned nPD :1;
63 | unsigned nTO :1;
64 | unsigned PA0 :1;
65 | unsigned PA1 :1;
66 | };
67 | struct {
68 | unsigned CARRY :1;
69 | };
70 | struct {
71 | unsigned :2;
72 | unsigned ZERO :1;
73 | };
74 | } STATUSbits_t;
75 | extern volatile STATUSbits_t STATUSbits @ 0x003;
76 |
77 | # 178
78 | extern volatile unsigned char FSR @ 0x004;
79 |
80 | asm("FSR equ 04h");
81 |
82 |
83 | typedef union {
84 | struct {
85 | unsigned FSR :7;
86 | };
87 | } FSRbits_t;
88 | extern volatile FSRbits_t FSRbits @ 0x004;
89 |
90 | # 197
91 | extern volatile unsigned char OSCCAL @ 0x005;
92 |
93 | asm("OSCCAL equ 05h");
94 |
95 |
96 | typedef union {
97 | struct {
98 | unsigned :1;
99 | unsigned CAL :7;
100 | };
101 | struct {
102 | unsigned :1;
103 | unsigned CAL0 :1;
104 | unsigned CAL1 :1;
105 | unsigned CAL2 :1;
106 | unsigned CAL3 :1;
107 | unsigned CAL4 :1;
108 | unsigned CAL5 :1;
109 | unsigned CAL6 :1;
110 | };
111 | } OSCCALbits_t;
112 | extern volatile OSCCALbits_t OSCCALbits @ 0x005;
113 |
114 | # 262
115 | extern volatile unsigned char PORTA @ 0x006;
116 |
117 | asm("PORTA equ 06h");
118 |
119 |
120 | typedef union {
121 | struct {
122 | unsigned RA :6;
123 | };
124 | struct {
125 | unsigned RA0 :1;
126 | unsigned RA1 :1;
127 | unsigned RA2 :1;
128 | unsigned RA3 :1;
129 | unsigned RA4 :1;
130 | unsigned RA5 :1;
131 | };
132 | } PORTAbits_t;
133 | extern volatile PORTAbits_t PORTAbits @ 0x006;
134 |
135 | # 319
136 | extern volatile unsigned char PORTB @ 0x007;
137 |
138 | asm("PORTB equ 07h");
139 |
140 |
141 | typedef union {
142 | struct {
143 | unsigned :4;
144 | unsigned RB :4;
145 | };
146 | struct {
147 | unsigned :4;
148 | unsigned RB4 :1;
149 | unsigned RB5 :1;
150 | unsigned RB6 :1;
151 | unsigned RB7 :1;
152 | };
153 | } PORTBbits_t;
154 | extern volatile PORTBbits_t PORTBbits @ 0x007;
155 |
156 | # 366
157 | extern volatile unsigned char PORTC @ 0x008;
158 |
159 | asm("PORTC equ 08h");
160 |
161 |
162 | typedef union {
163 | struct {
164 | unsigned RC :8;
165 | };
166 | struct {
167 | unsigned RC0 :1;
168 | unsigned RC1 :1;
169 | unsigned RC2 :1;
170 | unsigned RC3 :1;
171 | unsigned RC4 :1;
172 | unsigned RC5 :1;
173 | unsigned RC6 :1;
174 | unsigned RC7 :1;
175 | };
176 | } PORTCbits_t;
177 | extern volatile PORTCbits_t PORTCbits @ 0x008;
178 |
179 | # 435
180 | extern volatile unsigned char ADCON0 @ 0x009;
181 |
182 | asm("ADCON0 equ 09h");
183 |
184 |
185 | typedef union {
186 | struct {
187 | unsigned ADON :1;
188 | unsigned GO_nDONE :1;
189 | unsigned CHS :4;
190 | unsigned ADCS :2;
191 | };
192 | struct {
193 | unsigned :1;
194 | unsigned GO :1;
195 | unsigned CHS0 :1;
196 | unsigned CHS1 :1;
197 | unsigned CHS2 :1;
198 | unsigned CHS3 :1;
199 | unsigned ADCS0 :1;
200 | unsigned ADCS1 :1;
201 | };
202 | struct {
203 | unsigned :1;
204 | unsigned NOT_DONE :1;
205 | };
206 | } ADCON0bits_t;
207 | extern volatile ADCON0bits_t ADCON0bits @ 0x009;
208 |
209 | # 526
210 | extern volatile unsigned char ADRES @ 0x00A;
211 |
212 | asm("ADRES equ 0Ah");
213 |
214 |
215 | typedef union {
216 | struct {
217 | unsigned ADRES :8;
218 | };
219 | struct {
220 | unsigned ADRES0 :1;
221 | unsigned ADRES1 :1;
222 | unsigned ADRES2 :1;
223 | unsigned ADRES3 :1;
224 | unsigned ADRES4 :1;
225 | unsigned ADRES5 :1;
226 | unsigned ADRES6 :1;
227 | unsigned ADRES7 :1;
228 | };
229 | } ADRESbits_t;
230 | extern volatile ADRESbits_t ADRESbits @ 0x00A;
231 |
232 | # 595
233 | extern volatile unsigned char INTCON0 @ 0x00B;
234 |
235 | asm("INTCON0 equ 0Bh");
236 |
237 |
238 | extern volatile unsigned char INTCON @ 0x00B;
239 |
240 | asm("INTCON equ 0Bh");
241 |
242 |
243 | typedef union {
244 | struct {
245 | unsigned GIE :1;
246 | unsigned :3;
247 | unsigned RAIF :1;
248 | unsigned T0IF :1;
249 | unsigned CWIF :1;
250 | unsigned ADIF :1;
251 | };
252 | } INTCON0bits_t;
253 | extern volatile INTCON0bits_t INTCON0bits @ 0x00B;
254 |
255 | # 643
256 | typedef union {
257 | struct {
258 | unsigned GIE :1;
259 | unsigned :3;
260 | unsigned RAIF :1;
261 | unsigned T0IF :1;
262 | unsigned CWIF :1;
263 | unsigned ADIF :1;
264 | };
265 | } INTCONbits_t;
266 | extern volatile INTCONbits_t INTCONbits @ 0x00B;
267 |
268 | # 682
269 | extern volatile unsigned char EECON @ 0x021;
270 |
271 | asm("EECON equ 021h");
272 |
273 |
274 | typedef union {
275 | struct {
276 | unsigned RD :1;
277 | unsigned WR :1;
278 | unsigned WREN :1;
279 | unsigned WRERR :1;
280 | unsigned FREE :1;
281 | };
282 | } EECONbits_t;
283 | extern volatile EECONbits_t EECONbits @ 0x021;
284 |
285 | # 725
286 | extern volatile unsigned char EEDATA @ 0x025;
287 |
288 | asm("EEDATA equ 025h");
289 |
290 |
291 | typedef union {
292 | struct {
293 | unsigned EEDATA :8;
294 | };
295 | } EEDATAbits_t;
296 | extern volatile EEDATAbits_t EEDATAbits @ 0x025;
297 |
298 | # 744
299 | extern volatile unsigned char EEADR @ 0x026;
300 |
301 | asm("EEADR equ 026h");
302 |
303 |
304 | typedef union {
305 | struct {
306 | unsigned EEADR :6;
307 | };
308 | } EEADRbits_t;
309 | extern volatile EEADRbits_t EEADRbits @ 0x026;
310 |
311 | # 763
312 | extern volatile unsigned char CM1CON0 @ 0x027;
313 |
314 | asm("CM1CON0 equ 027h");
315 |
316 |
317 | typedef union {
318 | struct {
319 | unsigned nC1WU :1;
320 | unsigned C1PREF :1;
321 | unsigned C1NREF :1;
322 | unsigned C1ON :1;
323 | unsigned nC1T0CS :1;
324 | unsigned C1POL :1;
325 | unsigned nC1OUTEN :1;
326 | unsigned C1OUT :1;
327 | };
328 | } CM1CON0bits_t;
329 | extern volatile CM1CON0bits_t CM1CON0bits @ 0x027;
330 |
331 | # 824
332 | extern volatile unsigned char CM2CON0 @ 0x028;
333 |
334 | asm("CM2CON0 equ 028h");
335 |
336 |
337 | typedef union {
338 | struct {
339 | unsigned nC2WU :1;
340 | unsigned C2PREF1 :1;
341 | unsigned C2NREF :1;
342 | unsigned C2ON :1;
343 | unsigned C2PREF2 :1;
344 | unsigned C2POL :1;
345 | unsigned nC2OUTEN :1;
346 | unsigned C2OUT :1;
347 | };
348 | } CM2CON0bits_t;
349 | extern volatile CM2CON0bits_t CM2CON0bits @ 0x028;
350 |
351 | # 885
352 | extern volatile unsigned char VRCON @ 0x029;
353 |
354 | asm("VRCON equ 029h");
355 |
356 |
357 | typedef union {
358 | struct {
359 | unsigned VR :4;
360 | unsigned :1;
361 | unsigned VRR :1;
362 | unsigned VROE :1;
363 | unsigned VREN :1;
364 | };
365 | struct {
366 | unsigned VR0 :1;
367 | unsigned VR1 :1;
368 | unsigned VR2 :1;
369 | unsigned VR3 :1;
370 | };
371 | } VRCONbits_t;
372 | extern volatile VRCONbits_t VRCONbits @ 0x029;
373 |
374 | # 949
375 | extern volatile unsigned char ANSEL @ 0x02A;
376 |
377 | asm("ANSEL equ 02Ah");
378 |
379 |
380 | typedef union {
381 | struct {
382 | unsigned ANS0 :1;
383 | unsigned ANS1 :1;
384 | unsigned ANS2 :1;
385 | unsigned ANS3 :1;
386 | unsigned ANS4 :1;
387 | unsigned ANS5 :1;
388 | unsigned ANS6 :1;
389 | unsigned ANS7 :1;
390 | };
391 | } ANSELbits_t;
392 | extern volatile ANSELbits_t ANSELbits @ 0x02A;
393 |
394 | # 1010
395 | extern volatile unsigned char IW @ 0x061;
396 |
397 | asm("IW equ 061h");
398 |
399 |
400 | typedef union {
401 | struct {
402 | unsigned IWREG :8;
403 | };
404 | } IWbits_t;
405 | extern volatile IWbits_t IWbits @ 0x061;
406 |
407 | # 1029
408 | extern volatile unsigned char INTCON1 @ 0x065;
409 |
410 | asm("INTCON1 equ 065h");
411 |
412 |
413 | extern volatile unsigned char INTIE_REG @ 0x065;
414 |
415 | asm("INTIE_REG equ 065h");
416 |
417 |
418 | typedef union {
419 | struct {
420 | unsigned WUR :1;
421 | unsigned :3;
422 | unsigned RAIE :1;
423 | unsigned T0IE :1;
424 | unsigned CWIE :1;
425 | unsigned ADIE :1;
426 | };
427 | } INTCON1bits_t;
428 | extern volatile INTCON1bits_t INTCON1bits @ 0x065;
429 |
430 | # 1077
431 | typedef union {
432 | struct {
433 | unsigned WUR :1;
434 | unsigned :3;
435 | unsigned RAIE :1;
436 | unsigned T0IE :1;
437 | unsigned CWIE :1;
438 | unsigned ADIE :1;
439 | };
440 | } INTIE_REGbits_t;
441 | extern volatile INTIE_REGbits_t INTIE_REGbits @ 0x065;
442 |
443 | # 1116
444 | extern volatile unsigned char ISTATUS @ 0x066;
445 |
446 | asm("ISTATUS equ 066h");
447 |
448 |
449 | typedef union {
450 | struct {
451 | unsigned C :1;
452 | unsigned DC :1;
453 | unsigned Z :1;
454 | unsigned nPD :1;
455 | unsigned nTO :1;
456 | unsigned PA0 :1;
457 | unsigned PA1 :1;
458 | };
459 | } ISTATUSbits_t;
460 | extern volatile ISTATUSbits_t ISTATUSbits @ 0x066;
461 |
462 | # 1171
463 | extern volatile unsigned char IFSR @ 0x067;
464 |
465 | asm("IFSR equ 067h");
466 |
467 |
468 | typedef union {
469 | struct {
470 | unsigned IFSR :7;
471 | };
472 | } IFSRbits_t;
473 | extern volatile IFSRbits_t IFSRbits @ 0x067;
474 |
475 | # 1190
476 | extern volatile unsigned char IBSR @ 0x068;
477 |
478 | asm("IBSR equ 068h");
479 |
480 |
481 | typedef union {
482 | struct {
483 | unsigned IBSR :2;
484 | };
485 | } IBSRbits_t;
486 | extern volatile IBSRbits_t IBSRbits @ 0x068;
487 |
488 | # 1209
489 | extern volatile unsigned char OPACON @ 0x069;
490 |
491 | asm("OPACON equ 069h");
492 |
493 |
494 | typedef union {
495 | struct {
496 | unsigned OPA1ON :1;
497 | unsigned OPA2ON :1;
498 | };
499 | } OPACONbits_t;
500 | extern volatile OPACONbits_t OPACONbits @ 0x069;
501 |
502 | # 1234
503 | extern volatile __control unsigned char OPTION @ 0x000;
504 |
505 |
506 | extern volatile __control unsigned char TRISA @ 0x006;
507 |
508 |
509 | extern volatile __control unsigned char TRISB @ 0x007;
510 |
511 |
512 | extern volatile __control unsigned char TRISC @ 0x008;
513 |
514 | # 1265
515 | extern volatile __bit ADCS0 @ (((unsigned) &ADCON0)*8) + 6;
516 |
517 | extern volatile __bit ADCS1 @ (((unsigned) &ADCON0)*8) + 7;
518 |
519 | extern volatile __bit ADIE @ (((unsigned) &INTCON1)*8) + 7;
520 |
521 | extern volatile __bit ADIF @ (((unsigned) &INTCON0)*8) + 7;
522 |
523 | extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
524 |
525 | extern volatile __bit ADRES0 @ (((unsigned) &ADRES)*8) + 0;
526 |
527 | extern volatile __bit ADRES1 @ (((unsigned) &ADRES)*8) + 1;
528 |
529 | extern volatile __bit ADRES2 @ (((unsigned) &ADRES)*8) + 2;
530 |
531 | extern volatile __bit ADRES3 @ (((unsigned) &ADRES)*8) + 3;
532 |
533 | extern volatile __bit ADRES4 @ (((unsigned) &ADRES)*8) + 4;
534 |
535 | extern volatile __bit ADRES5 @ (((unsigned) &ADRES)*8) + 5;
536 |
537 | extern volatile __bit ADRES6 @ (((unsigned) &ADRES)*8) + 6;
538 |
539 | extern volatile __bit ADRES7 @ (((unsigned) &ADRES)*8) + 7;
540 |
541 | extern volatile __bit ANS0 @ (((unsigned) &ANSEL)*8) + 0;
542 |
543 | extern volatile __bit ANS1 @ (((unsigned) &ANSEL)*8) + 1;
544 |
545 | extern volatile __bit ANS2 @ (((unsigned) &ANSEL)*8) + 2;
546 |
547 | extern volatile __bit ANS3 @ (((unsigned) &ANSEL)*8) + 3;
548 |
549 | extern volatile __bit ANS4 @ (((unsigned) &ANSEL)*8) + 4;
550 |
551 | extern volatile __bit ANS5 @ (((unsigned) &ANSEL)*8) + 5;
552 |
553 | extern volatile __bit ANS6 @ (((unsigned) &ANSEL)*8) + 6;
554 |
555 | extern volatile __bit ANS7 @ (((unsigned) &ANSEL)*8) + 7;
556 |
557 | extern volatile __bit C1NREF @ (((unsigned) &CM1CON0)*8) + 2;
558 |
559 | extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 3;
560 |
561 | extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 7;
562 |
563 | extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 5;
564 |
565 | extern volatile __bit C1PREF @ (((unsigned) &CM1CON0)*8) + 1;
566 |
567 | extern volatile __bit C2NREF @ (((unsigned) &CM2CON0)*8) + 2;
568 |
569 | extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 3;
570 |
571 | extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 7;
572 |
573 | extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 5;
574 |
575 | extern volatile __bit C2PREF1 @ (((unsigned) &CM2CON0)*8) + 1;
576 |
577 | extern volatile __bit C2PREF2 @ (((unsigned) &CM2CON0)*8) + 4;
578 |
579 | extern volatile __bit CAL0 @ (((unsigned) &OSCCAL)*8) + 1;
580 |
581 | extern volatile __bit CAL1 @ (((unsigned) &OSCCAL)*8) + 2;
582 |
583 | extern volatile __bit CAL2 @ (((unsigned) &OSCCAL)*8) + 3;
584 |
585 | extern volatile __bit CAL3 @ (((unsigned) &OSCCAL)*8) + 4;
586 |
587 | extern volatile __bit CAL4 @ (((unsigned) &OSCCAL)*8) + 5;
588 |
589 | extern volatile __bit CAL5 @ (((unsigned) &OSCCAL)*8) + 6;
590 |
591 | extern volatile __bit CAL6 @ (((unsigned) &OSCCAL)*8) + 7;
592 |
593 | extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
594 |
595 | extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
596 |
597 | extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
598 |
599 | extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
600 |
601 | extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
602 |
603 | extern volatile __bit CWIE @ (((unsigned) &INTCON1)*8) + 6;
604 |
605 | extern volatile __bit CWIF @ (((unsigned) &INTCON0)*8) + 6;
606 |
607 | extern volatile __bit FREE @ (((unsigned) &EECON)*8) + 4;
608 |
609 | extern volatile __bit GIE @ (((unsigned) &INTCON0)*8) + 0;
610 |
611 | extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
612 |
613 | extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
614 |
615 | extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
616 |
617 | extern volatile __bit OPA1ON @ (((unsigned) &OPACON)*8) + 0;
618 |
619 | extern volatile __bit OPA2ON @ (((unsigned) &OPACON)*8) + 1;
620 |
621 | extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
622 |
623 | extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
624 |
625 | extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
626 |
627 | extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
628 |
629 | extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
630 |
631 | extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
632 |
633 | extern volatile __bit RAIE @ (((unsigned) &INTCON1)*8) + 4;
634 |
635 | extern volatile __bit RAIF @ (((unsigned) &INTCON0)*8) + 4;
636 |
637 | extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
638 |
639 | extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
640 |
641 | extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
642 |
643 | extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
644 |
645 | extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
646 |
647 | extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
648 |
649 | extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
650 |
651 | extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
652 |
653 | extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
654 |
655 | extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
656 |
657 | extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
658 |
659 | extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
660 |
661 | extern volatile __bit RD @ (((unsigned) &EECON)*8) + 0;
662 |
663 | extern volatile __bit T0IE @ (((unsigned) &INTCON1)*8) + 5;
664 |
665 | extern volatile __bit T0IF @ (((unsigned) &INTCON0)*8) + 5;
666 |
667 | extern volatile __bit VR0 @ (((unsigned) &VRCON)*8) + 0;
668 |
669 | extern volatile __bit VR1 @ (((unsigned) &VRCON)*8) + 1;
670 |
671 | extern volatile __bit VR2 @ (((unsigned) &VRCON)*8) + 2;
672 |
673 | extern volatile __bit VR3 @ (((unsigned) &VRCON)*8) + 3;
674 |
675 | extern volatile __bit VREN @ (((unsigned) &VRCON)*8) + 7;
676 |
677 | extern volatile __bit VROE @ (((unsigned) &VRCON)*8) + 6;
678 |
679 | extern volatile __bit VRR @ (((unsigned) &VRCON)*8) + 5;
680 |
681 | extern volatile __bit WR @ (((unsigned) &EECON)*8) + 1;
682 |
683 | extern volatile __bit WREN @ (((unsigned) &EECON)*8) + 2;
684 |
685 | extern volatile __bit WRERR @ (((unsigned) &EECON)*8) + 3;
686 |
687 | extern volatile __bit WUR @ (((unsigned) &INTCON1)*8) + 0;
688 |
689 | extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
690 |
691 | extern volatile __bit nC1OUTEN @ (((unsigned) &CM1CON0)*8) + 6;
692 |
693 | extern volatile __bit nC1T0CS @ (((unsigned) &CM1CON0)*8) + 4;
694 |
695 | extern volatile __bit nC1WU @ (((unsigned) &CM1CON0)*8) + 0;
696 |
697 | extern volatile __bit nC2OUTEN @ (((unsigned) &CM2CON0)*8) + 6;
698 |
699 | extern volatile __bit nC2WU @ (((unsigned) &CM2CON0)*8) + 0;
700 |
701 |
702 | # 27 "C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic.h"
703 | #pragma intrinsic(__nop)
704 | extern void __nop(void);
705 |
706 | # 76
707 | extern unsigned int flash_read(unsigned short addr);
708 |
709 | # 140
710 | extern void flash_erase(unsigned short addr);
711 |
712 |
713 | # 149
714 | #pragma intrinsic(_delay)
715 | extern __nonreentrant void _delay(unsigned long);
716 |
717 | # 184
718 | extern unsigned char __resetbits;
719 | extern __bit __powerdown;
720 | extern __bit __timeout;
721 |
722 |
723 | # 21 "newmain1.c"
724 | #pragma config FOSC = LP
725 | #pragma config WDTE = OFF
726 | #pragma config CP = OFF
727 | #pragma config MCLRE = ON
728 | #pragma config IOSCFS = 8MHz
729 | #pragma config CPSW = OFF
730 | #pragma config BOREN = OFF
731 | #pragma config DRTEN = OFF
732 |
733 | # 46
734 | char HOUR = 1;
735 | char MIN = 0;
736 | int INTCNT = 0;
737 |
738 | void main(void) {
739 |
740 | CM1CON0 = 0x00;
741 | CM2CON0 = 0x00;
742 | OPTION = 0b11001000;
743 | ANSEL = 0x00;
744 | PORTB = 0x00;
745 | PORTC = 0x00;
746 | TRISB = 0x00;
747 | TRISC = 0x80;
748 |
749 | T0IE = 1;
750 | GIE=1;
751 |
752 | # 69
753 | while (1)
754 | {
755 | PORTB = HOUR << 4;
756 | PORTC = MIN;
757 |
758 | # 85
759 | }
760 | return;
761 | }
762 |
763 | void interrupt isr(void)
764 | {
765 | RC6 = 1;
766 | INTCNT = INTCNT + 1;
767 | if(INTCNT == 32)
768 | {
769 | INTCNT = 0;
770 | MIN = MIN + 1;
771 |
772 | if (MIN == 60)
773 | {
774 | MIN = 0;
775 | HOUR = HOUR + 1;
776 | if(HOUR == 13)
777 | {
778 | HOUR = 1;
779 | }
780 | }
781 | }
782 | RC6 = 0;
783 | T0IF = 0;
784 | return;
785 | }
786 |
--------------------------------------------------------------------------------
/Software/MacroWatch.X/dist/default/production/MacroWatch.X.production.cmf:
--------------------------------------------------------------------------------
1 | %CMF
2 | # %PSECTS Section
3 | # For each object file, details of its psects are enumerated here.
4 | # The begining of the section is indicated by %PSECTS. The first
5 | # line indicates the name of the first object file, e.g.
6 | # $foo.obj
7 | # Each line that follows describes a psect in that object file, until
8 | # the next object file. The lines that describe a psect have the
9 | # format:
10 | #
11 | # All addresses and the length are given in unqualified hexadecimal
12 | # in delta units. Any other numeric values are decimal.
13 | %PSECTS
14 | $dist/default/production\MacroWatch.X.production.obj
15 | cinit ENTRY 0 4D 4D 18 2
16 | text1 CODE 0 AD AD 22 2
17 | text2 CODE 0 6B 6B 42 2
18 | maintext CODE 0 215 215 1EA 2
19 | cstackBANK0 BANK0 1 10 10 8 1
20 | intentry ENTRY 0 4 4 45 2
21 | bssBANK0 BANK0 1 18 18 5 1
22 | bssBANK1 BANK1 1 30 30 6 1
23 | idataBANK0 ENTRY 0 69 69 2 2
24 | dataBANK0 BANK0 1 1D 1D 2 1
25 | jmp_tab ENTRY 0 65 65 4 2
26 | $C:\Users\MACROF~1\AppData\Local\Temp\s1t0.obj
27 | init ENTRY 0 49 49 2 2
28 | reset_wrap ENTRY 0 0 0 2 2
29 | reset_vec CODE 0 3FF 3FF 1 2
30 | end_init ENTRY 0 4B 4B 2 2
31 | config CONFIG 0 FFF FFF 1 2
32 | # %UNUSED Section
33 | # This section enumerates the unused ranges of each CLASS. Each entry
34 | # is described on a single line as follows:
35 | #
36 | # Addresses given in the range are in hexadecimal and units of delta.
37 | %UNUSED
38 | RAM 1F-1F 1
39 | RAM 36-3F 1
40 | RAM 50-5F 1
41 | RAM 70-7F 1
42 | BANK0 1F-1F 1
43 | BANK1 36-3F 1
44 | BANK2 50-5F 1
45 | BANK3 70-7F 1
46 | ENTRY 2-3 2
47 | ENTRY CF-FF 2
48 | ENTRY 200-214 2
49 | IDLOC 440-443 2
50 | STACK 50-5F 1
51 | CODE 2-3 2
52 | CODE CF-214 2
53 | SFR0 0-B 1
54 | SFR1 20-2F 1
55 | SFR2 40-4F 1
56 | SFR3 60-6F 1
57 | STRCODE 2-3 2
58 | STRCODE CF-214 2
59 | STRING 2-3 2
60 | STRING CF-FF 2
61 | STRING 200-214 2
62 | # %LINETAB Section
63 | # This section enumerates the file/line to address mappings.
64 | # The beginning of the section is indicated by %LINETAB.
65 | # The first line indicates the name of the first object file, e.g.
66 | # $foo.obj
67 | # Each line that follows describes a single mapping until the next
68 | # object file. Mappings have the following format:
69 | # >:
70 | # The address is absolute and given given in unqualified hex
71 | # in delta units of the psect. All mappings within an object file
72 | # are in ascending order of addresses.
73 | # All other numeric values are in decimal.
74 | %LINETAB
75 | $dist/default/production\MacroWatch.X.production.obj
76 | 4 intentry ENTRY >251:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
77 | 4 intentry ENTRY >262:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
78 | 7 intentry ENTRY >264:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
79 | 8 intentry ENTRY >265:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
80 | 16 intentry ENTRY >266:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
81 | 1D intentry ENTRY >268:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
82 | 1F intentry ENTRY >269:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
83 | 23 intentry ENTRY >271:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
84 | 29 intentry ENTRY >273:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
85 | 2A intentry ENTRY >274:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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123 | 69 idataBANK0 ENTRY >1211:C:\Program Files (x86)\Microchip\xc8\v1.34\include\pic16f527.h
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125 | 6A idataBANK0 ENTRY >52:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
126 | 6B text2 CODE >239:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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134 | AB text2 CODE >249:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
135 | AD text1 CODE >253:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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137 | BD text1 CODE >257:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
138 | C3 text1 CODE >258:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
139 | CE text1 CODE >255:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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144 | 21A maintext CODE >70:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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146 | 21D maintext CODE >72:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
147 | 21E maintext CODE >73:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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155 | 22C maintext CODE >89:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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169 | 24D maintext CODE >125:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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182 | 2E0 maintext CODE >148:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
183 | 2E1 maintext CODE >153:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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194 | 309 maintext CODE >171:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
195 | 30A maintext CODE >174:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
196 | 30B maintext CODE >178:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
197 | 30C maintext CODE >181:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
198 | 30E maintext CODE >183:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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204 | 31E maintext CODE >191:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
205 | 320 maintext CODE >194:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
206 | 32E maintext CODE >195:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
207 | 341 maintext CODE >197:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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212 | 358 maintext CODE >206:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
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218 | 396 maintext CODE >215:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
219 | 3A5 maintext CODE >216:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
220 | 3B4 maintext CODE >217:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
221 | 3C3 maintext CODE >218:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
222 | 3D2 maintext CODE >219:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
223 | 3E1 maintext CODE >221:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
224 | 3EC maintext CODE >223:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
225 | 3ED maintext CODE >227:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
226 | 3EF maintext CODE >85:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
227 | 3FE maintext CODE >83:C:\Users\MacroFab_00\Documents\GitHub\Macro_Watch\Software\MacroWatch.X\main.c
228 | # %SYMTAB Section
229 | # An enumeration of all symbols in the program.
230 | # The beginning of the section is indicated by %SYMTAB.
231 | # Each line describes a single symbol as follows:
232 | #