├── .gitignore ├── Cleanup.bat ├── Example ├── sim3u1xx_Bootloader │ ├── bootloader_link.ld │ ├── myLinkerOptions_p32.ld │ └── src │ │ ├── config.h │ │ ├── main.c │ │ └── startup_sim3u1xx.S └── sim3u1xx_USBHID │ ├── sim3u1xx_USBHID.ld │ └── src │ ├── USBHID_Readme.txt │ ├── generated │ ├── gCAPSENSE0.c │ ├── gCAPSENSE0.h │ ├── gCLKCTRL.c │ ├── gCLKCTRL.h │ ├── gCpu.c │ ├── gCpu.h │ ├── gFLASHCTRL0.c │ ├── gFLASHCTRL0.h │ ├── gModes.c │ ├── gModes.h │ ├── gPB.c │ ├── gPB.h │ ├── gUSB0.c │ └── gUSB0.h │ ├── main.c │ ├── myCAPSENSE0.c │ ├── myCAPSENSE0.h │ ├── myCLKCTRL.c │ ├── myCLKCTRL.h │ ├── myCPU.c │ ├── myCPU.h │ ├── myFLASHCTRL0.c │ ├── myFLASHCTRL0.h │ ├── myPB.c │ ├── myPB.h │ ├── myUSB0.c │ ├── myUSB0.h │ ├── myUsbDevice.c │ ├── myUsbDevice.h │ ├── si32Usb.h │ ├── si32UsbHid.h │ └── startup_sim3u1xx_p32.c ├── High_Level └── src │ ├── adi.py │ ├── bin2c.py │ ├── bin_array.h │ ├── si32FlashProgrammer.py │ ├── sim3u1xx_Blinky.bin │ └── sim3u1xx_USBHID_ram.bin ├── LICENSE ├── README.md ├── Ref ├── ARM_debug.pdf ├── DDI0316D_dap_lite_trm.pdf ├── DDI0337I_cortexm3_r2p1_trm.pdf ├── DDI0403D_arm_architecture_v7m_reference_manual_errata_markup_1_0.pdf └── DSA09-PRDC-008772-1-0_ARM_debug_interface_v5_supplement.pdf ├── SW_Interface ├── 32bit_prog_defs.h ├── Init.c ├── Init.h ├── bin_array.h ├── dp_swd.c ├── main.c └── si32FlashProgrammer.wsp └── images ├── adi_mem-ap.png ├── ctrl-stat-reg.png ├── idr-reg.png └── swd-write-portocol.png /.gitignore: -------------------------------------------------------------------------------- 1 | ################# 2 | ## Eclipse 3 | ################# 4 | 5 | *.pydevproject 6 | .project 7 | .metadata 8 | bin/ 9 | tmp/ 10 | *.tmp 11 | *.bak 12 | *.swp 13 | *~.nib 14 | local.properties 15 | .classpath 16 | .settings/ 17 | .loadpath 18 | 19 | # External tool builders 20 | .externalToolBuilders/ 21 | 22 | # Locally stored "Eclipse launch configurations" 23 | *.launch 24 | 25 | # CDT-specific 26 | .cproject 27 | 28 | # PDT-specific 29 | .buildpath 30 | 31 | ################# 32 | ## Visual Studio 33 | ################# 34 | 35 | ## Ignore Visual Studio temporary files, build results, and 36 | ## files generated by popular Visual Studio add-ons. 37 | 38 | # User-specific files 39 | *.suo 40 | *.user 41 | *.sln.docstates 42 | 43 | # Build results 44 | 45 | [Dd]ebug/ 46 | [Rr]elease/ 47 | x64/ 48 | build/ 49 | [Bb]in/ 50 | [Oo]bj/ 51 | 52 | # MSTest test Results 53 | [Tt]est[Rr]esult*/ 54 | [Bb]uild[Ll]og.* 55 | 56 | *_i.c 57 | *_p.c 58 | *.ilk 59 | *.meta 60 | *.obj 61 | *.pch 62 | *.pdb 63 | *.pgc 64 | *.pgd 65 | *.rsp 66 | *.sbr 67 | *.tlb 68 | *.tli 69 | *.tlh 70 | *.tmp 71 | *.tmp_proj 72 | *.log 73 | *.vspscc 74 | *.vssscc 75 | .builds 76 | *.pidb 77 | *.log 78 | *.scc 79 | 80 | # Visual C++ cache files 81 | ipch/ 82 | *.aps 83 | *.ncb 84 | *.opensdf 85 | *.sdf 86 | *.cachefile 87 | 88 | # Visual Studio profiler 89 | *.psess 90 | *.vsp 91 | *.vspx 92 | 93 | # Guidance Automation Toolkit 94 | *.gpState 95 | 96 | # ReSharper is a .NET coding add-in 97 | _ReSharper*/ 98 | *.[Rr]e[Ss]harper 99 | 100 | # TeamCity is a build add-in 101 | _TeamCity* 102 | 103 | # DotCover is a Code Coverage Tool 104 | *.dotCover 105 | 106 | # NCrunch 107 | *.ncrunch* 108 | .*crunch*.local.xml 109 | 110 | # Installshield output folder 111 | [Ee]xpress/ 112 | 113 | # DocProject is a documentation generator add-in 114 | DocProject/buildhelp/ 115 | DocProject/Help/*.HxT 116 | DocProject/Help/*.HxC 117 | DocProject/Help/*.hhc 118 | DocProject/Help/*.hhk 119 | DocProject/Help/*.hhp 120 | DocProject/Help/Html2 121 | DocProject/Help/html 122 | 123 | # Click-Once directory 124 | publish/ 125 | 126 | # Publish Web Output 127 | *.Publish.xml 128 | *.pubxml 129 | 130 | # NuGet Packages Directory 131 | ## TODO: If you have NuGet Package Restore enabled, uncomment the next line 132 | #packages/ 133 | 134 | # Windows Azure Build Output 135 | csx 136 | *.build.csdef 137 | 138 | # Windows Store app package directory 139 | AppPackages/ 140 | 141 | # Others 142 | sql/ 143 | *.Cache 144 | ClientBin/ 145 | [Ss]tyle[Cc]op.* 146 | ~$* 147 | *~ 148 | *.dbmdl 149 | *.[Pp]ublish.xml 150 | *.pfx 151 | *.publishsettings 152 | 153 | # RIA/Silverlight projects 154 | Generated_Code/ 155 | 156 | # Backup & report files from converting an old project file to a newer 157 | # Visual Studio version. Backup files are not needed, because we have git ;-) 158 | _UpgradeReport_Files/ 159 | Backup*/ 160 | UpgradeLog*.XML 161 | UpgradeLog*.htm 162 | 163 | # SQL Server files 164 | App_Data/*.mdf 165 | App_Data/*.ldf 166 | 167 | ############# 168 | ## Windows detritus 169 | ############# 170 | 171 | # Windows image file caches 172 | Thumbs.db 173 | ehthumbs.db 174 | 175 | # Folder config file 176 | Desktop.ini 177 | 178 | # Recycle Bin used on file shares 179 | $RECYCLE.BIN/ 180 | 181 | # Mac crap 182 | .DS_Store 183 | 184 | 185 | ############# 186 | ## Python 187 | ############# 188 | 189 | *.py[co] 190 | 191 | # Packages 192 | *.egg 193 | *.egg-info 194 | dist/ 195 | build/ 196 | eggs/ 197 | parts/ 198 | var/ 199 | sdist/ 200 | develop-eggs/ 201 | .installed.cfg 202 | 203 | # Installer logs 204 | pip-log.txt 205 | 206 | # Unit test / coverage reports 207 | .coverage 208 | .tox 209 | 210 | #Translations 211 | *.mo 212 | 213 | #Mr Developer 214 | .mr.developer.cfg 215 | 216 | ############# 217 | ## Sublime 218 | ############# 219 | *.sublime-project 220 | *.sublime-workspace 221 | *.obj 222 | *.lst 223 | *.out 224 | out/ 225 | -------------------------------------------------------------------------------- /Cleanup.bat: -------------------------------------------------------------------------------- 1 | REM KEIL files 2 | del /S *.#1 3 | del /S *.#2 4 | del /S *.#3 5 | del /S *.lst 6 | del /S *.m51 7 | del /S cyglink.txt 8 | del /S *.obj 9 | del /S *.omf 10 | del /S tmp.out 11 | del /S *.backup 12 | del /S *.Bak 13 | del /S *.__i 14 | del /S *.map 15 | del /S *.i 16 | del /S *.sbr 17 | del /S *.plg 18 | REM SDCC files 19 | del /S *.sym 20 | del /S *.rel 21 | del /S *.rst 22 | del /S *.adb 23 | del /S *.mem 24 | del /S *.cdb 25 | del /S *.lk 26 | del /S *.asm 27 | REM pause -------------------------------------------------------------------------------- /Example/sim3u1xx_Bootloader/bootloader_link.ld: -------------------------------------------------------------------------------- 1 | GROUP(libcr_nohost.a libcr_c.a libcr_eabihelpers.a) 2 | MEMORY 3 | { 4 | /* Define each memory region */ 5 | MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x3fffc /* 255k */ 6 | StandardRam28 (rwx) : ORIGIN = 0x20001000, LENGTH = 0x7000 /* 28k */ 7 | RetentionRam4 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x1000 /* 4k */ 8 | 9 | } 10 | /* Define a symbol for the top of each memory region */ 11 | __top_MFlash256 = 0x0 + 0x3fffc; 12 | __top_StandardRam28 = 0x20001000 + 0x7000; 13 | __top_RetentionRam4 = 0x20000000 + 0x1000; 14 | 15 | ENTRY(ResetISR) 16 | SECTIONS 17 | { 18 | .text 0x20000000 : AT (0x00000000) 19 | { 20 | . = ALIGN(4); 21 | _text = .; 22 | KEEP(*(.isr_vector)) 23 | *(.text*) 24 | *(.rodata*) 25 | _etext = .; 26 | } 27 | 28 | .data 0x20000000 + SIZEOF(.text) : AT (LOADADDR(.text) + SIZEOF(.text)) 29 | { 30 | _data = .; 31 | *(.data*) 32 | _edata = .; 33 | } 34 | 35 | .bss 0x20000000 + SIZEOF(.text) + SIZEOF(.data) : AT (LOADADDR(.data) + SIZEOF(.data)) 36 | { 37 | _bss = .; 38 | *(.bss*) 39 | *(COMMON) 40 | _ebss = .; 41 | } 42 | 43 | PROVIDE(_pvHeapStart = .); 44 | PROVIDE(_vStackTop = __top_StandardRam28 - 0); 45 | } 46 | -------------------------------------------------------------------------------- /Example/sim3u1xx_Bootloader/myLinkerOptions_p32.ld: -------------------------------------------------------------------------------- 1 | 2 | 3 | /****************** C LIBRARY SUPPORT ***************/ 4 | /*GROUP(libgcc.a libc.a libm.a libcr_newlib_nohost.a)*/ 5 | /*GROUP(libgcc.a libc.a libm.a libcr_newlib_semihost.a)*/ 6 | /*GROUP(libcr_semihost.a libcr_c.a libcr_eabihelpers.a)*/ 7 | GROUP(libcr_nohost.a libcr_c.a libcr_eabihelpers.a) 8 | -------------------------------------------------------------------------------- /Example/sim3u1xx_Bootloader/src/config.h: -------------------------------------------------------------------------------- 1 | #ifndef __CONFIG_H__ 2 | #define __CONFIG_H__ 3 | #define USER_CODE_ADDRESS 0x1000 4 | #define TOP_CODE_ADDRESS 0x3fffc 5 | 6 | #define UART_UPDATE_ENABLE 1 7 | #define UART_BAUD_RATE 115200 8 | #endif 9 | -------------------------------------------------------------------------------- /Example/sim3u1xx_Bootloader/src/main.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2011 by Silicon Laboratories Inc. All rights reserved. 3 | // The program contained in this listing is proprietary to Silicon Laboratories, 4 | // headquartered in Austin, Texas, U.S.A. and is subject to worldwide copyright 5 | // protection, including protection under the United States Copyright Act of 1976 6 | // as an unpublished work, pursuant to Section 104 and Section 408 of Title XVII 7 | // of the United States code. Unauthorized copying, adaptation, distribution, 8 | // use, or display is prohibited by this law. 9 | // 10 | // Silicon Laboratories provides this software solely and exclusively 11 | // for use on Silicon Laboratories' microcontroller products. 12 | // 13 | // This software is provided "as is". NO WARRANTIES, WHETHER EXPRESS, IMPLIED 14 | // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF 15 | // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. 16 | // SILICON LABORATORIES SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, 17 | // INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. 18 | //------------------------------------------------------------------------------ 19 | // library 20 | #include 21 | // hal 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include "config.h" 28 | volatile uint32_t msTicks; 29 | 30 | /* other code*/ 31 | //============================================================================== 32 | //1st LEVEL INTERRUPT HANDLERS 33 | //============================================================================== 34 | void SysTick_Handler(void) 35 | { 36 | msTicks++; 37 | /*NO SENCOND LEVEL HANDERL SPESIFIED*/ 38 | } 39 | 40 | void mySystemInit(void) 41 | { 42 | SI32_WDTIMER_A_stop_counter (SI32_WDTIMER_0); 43 | // Enable the APB clock to the PB registers 44 | SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_PB0); 45 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x00000008); 46 | 47 | SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0); 48 | SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0); 49 | SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2,0x00000300); 50 | // Enable the LED drivers (P2.10, P2.11) 51 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00); 52 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x00000003); 53 | SysTick_Config(SystemCoreClock / 1000); 54 | // set Priority for Cortex-M0 System Interrupts. 55 | NVIC_SetPriority(SysTick_IRQn, (1 << __NVIC_PRIO_BITS) - 1); 56 | 57 | } 58 | 59 | 60 | 61 | //============================================================================== 62 | // myApplication. 63 | //============================================================================== 64 | int main() 65 | { 66 | unsigned int time_out; 67 | while(1) { 68 | time_out = msTicks + 1000; 69 | while(time_out > msTicks); 70 | SI32_PBSTD_A_toggle_pins(SI32_PBSTD_2, 0xC00); 71 | SI32_PBSTD_A_toggle_pins(SI32_PBSTD_1, 0x003); 72 | } 73 | } 74 | //---eof------------------------------------------------------------------------ 75 | -------------------------------------------------------------------------------- /Example/sim3u1xx_Bootloader/src/startup_sim3u1xx.S: -------------------------------------------------------------------------------- 1 | #include "config.h" 2 | .syntax unified 3 | .thumb 4 | 5 | //***************************************************************************** 6 | // 7 | // The vector table. 8 | // This relies on the linker script to place at correct location in memory. 9 | // 10 | //***************************************************************************** 11 | .section .isr_vector 12 | Vectors: 13 | .word 0x20008000 // The initial stack pointer 14 | .word ResetISR //- 0x20000000 // The reset handler 15 | .word NMI_Handler // The NMI handler 16 | .word HardFault_Handler // The hard fault handler 17 | .word Default_Handler // The MPU fault handler 18 | .word Default_Handler // The bus fault handler 19 | .word Default_Handler // The usage fault handler 20 | .word 0 // Reserved 21 | .word 0 // Reserved 22 | .word 0 // Reserved 23 | .word 0 // Reserved 24 | .word Default_Handler // SVCall handler 25 | .word Default_Handler // Debug monitor handler 26 | .word 0 // Reserved 27 | .word Default_Handler // The PendSV handler 28 | .extern SysTick_Handler 29 | .word SysTick_Handler // The SysTick handler 30 | 31 | .text 32 | .thumb_func 33 | CopyCode2SRAM: 34 | // Copy the text and data sections from flash to SRAM. 35 | movs r0, #0x00000000 36 | ldr r1, =0x20000000 37 | .extern _bss 38 | ldr r2, =_bss 39 | copy_loop: 40 | ldr r3, [r0], #4 41 | str r3, [r1], #4 42 | cmp r1, r2 43 | blt copy_loop 44 | 45 | // Zero fill the bss segment 46 | movs r0, #0x00000000 47 | .extern _ebss 48 | ldr r2, =_ebss 49 | zero_loop: 50 | str r0, [r1], #4 51 | cmp r1, r2 52 | blt zero_loop 53 | 54 | // Set the vector table pointer to SRAM. 55 | ldr r0, =0xe000ed08 56 | ldr r1, =0x20000000 57 | str r1, [r0] 58 | // set return address to SRAM and return 59 | orr lr, lr, #0x20000000 60 | bx lr 61 | 62 | //***************************************************************************** 63 | // 64 | // The reset handler, which gets called when the processor starts. 65 | // 66 | //***************************************************************************** 67 | .globl ResetISR 68 | .thumb_func 69 | ResetISR: 70 | // Copy code from flash to SRAM 71 | // bl CopyCode2SRAM 72 | .extern SystemInit 73 | bl SystemInit 74 | 75 | .extern main 76 | bl main 77 | 78 | .thumb_func 79 | RunUserCode: 80 | // Set the vector table address to user code address. 81 | ldr r0, =USER_CODE_ADDRESS 82 | ldr r1, =0xe000ed08 83 | str r0, [r1] 84 | 85 | // Update stack pointer from user code vector table 86 | ldr r1, [r0] 87 | mov sp, r1 88 | 89 | // Load user code reset handler and jump to the user code 90 | ldr r0, [r0, #4] 91 | bx r0 92 | 93 | .thumb_func 94 | NMI_Handler: 95 | b . 96 | 97 | .thumb_func 98 | HardFault_Handler: 99 | b . 100 | 101 | .thumb_func 102 | Default_Handler: 103 | b . 104 | 105 | .end 106 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/sim3u1xx_USBHID.ld: -------------------------------------------------------------------------------- 1 | GROUP( 2 | libcr_semihost.a 3 | libcr_c.a 4 | libcr_eabihelpers.a 5 | ) 6 | MEMORY 7 | { 8 | /* Define each memory region */ 9 | MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x3fffc /* 255k */ 10 | Ram32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32k */ 11 | } 12 | /* Define a symbol for the top of each memory region */ 13 | __top_MFlash256 = 0x0 + 0x3fffc; 14 | __top_Ram32 = 0x20000000 + 0x8000; 15 | 16 | /* 17 | * GENERATED FILE - DO NOT EDIT 18 | * (C) Code Red Technologies Ltd, 2008-2014 19 | * Generated linker script file for SiM3U167 20 | * Created from generic_c.ld (vPrecision32 IDE v4.2 (1 [Build 73] [08/03/2012] )) 21 | * By Precision32 IDE v4.2.1 [Build 73] [08/03/2012] on Fri Mar 07 13:52:39 CST 2014 22 | */ 23 | 24 | 25 | ENTRY(ResetISR) 26 | 27 | SECTIONS 28 | { 29 | 30 | /* MAIN TEXT SECTION */ 31 | .text : ALIGN(4) 32 | { 33 | FILL(0xff) 34 | KEEP(*(.isr_vector)) 35 | 36 | /* Global Section Table */ 37 | . = ALIGN(4) ; 38 | __section_table_start = .; 39 | __data_section_table = .; 40 | LONG(LOADADDR(.data)); 41 | LONG( ADDR(.data)) ; 42 | LONG( SIZEOF(.data)); 43 | __data_section_table_end = .; 44 | __bss_section_table = .; 45 | LONG( ADDR(.bss)); 46 | LONG( SIZEOF(.bss)); 47 | __bss_section_table_end = .; 48 | __section_table_end = . ; 49 | /* End of Global Section Table */ 50 | 51 | 52 | *(.after_vectors*) 53 | 54 | *(.text*) 55 | *(.rodata .rodata.*) 56 | . = ALIGN(4); 57 | 58 | } > Ram32 59 | 60 | /* 61 | * for exception handling/unwind - some Newlib functions (in common 62 | * with C++ and STDC++) use this. 63 | */ 64 | .ARM.extab : ALIGN(4) 65 | { 66 | *(.ARM.extab* .gnu.linkonce.armextab.*) 67 | } > Ram32 68 | __exidx_start = .; 69 | 70 | .ARM.exidx : ALIGN(4) 71 | { 72 | *(.ARM.exidx* .gnu.linkonce.armexidx.*) 73 | } > Ram32 74 | __exidx_end = .; 75 | 76 | _etext = .; 77 | 78 | 79 | /* MAIN DATA SECTION */ 80 | 81 | .uninit_RESERVED : ALIGN(4) 82 | { 83 | KEEP(*(.bss.$RESERVED*)) 84 | } > Ram32 85 | 86 | .data : ALIGN(4) 87 | { 88 | FILL(0xff) 89 | _data = .; 90 | *(vtable) 91 | *(.data*) 92 | . = ALIGN(4) ; 93 | _edata = .; 94 | } > Ram32 AT>Ram32 95 | 96 | 97 | /* MAIN BSS SECTION */ 98 | .bss : ALIGN(4) 99 | { 100 | _bss = .; 101 | *(.bss*) 102 | *(COMMON) 103 | . = ALIGN(4) ; 104 | _ebss = .; 105 | PROVIDE(end = .); 106 | } > Ram32 107 | 108 | PROVIDE(_pvHeapStart = .); 109 | PROVIDE(_vStackTop = __top_Ram32 - 0); 110 | } 111 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/USBHID_Readme.txt: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- 2 | Copyright (c) 2012 by Silicon Laboratories. 3 | All rights reserved. This program and the accompanying materials 4 | are made available under the terms of the Silicon Laboratories End User 5 | License Agreement which accompanies this distribution, and is available at 6 | http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | Original content and implementation provided by Silicon Laboratories. 8 | -------------------------------------------------------------------------------- 9 | 10 | Program Description: 11 | -------------------------------------------------------------------------------- 12 | 13 | This example code senses the raw position detected on the capsense slider and 14 | translates it into a HID Keypad key press event. If the device is connected to 15 | a USB host, it will interpret the event as a keyboard input, and type the character 16 | to Notepad or a command line console. 17 | 18 | The code also illuminates LEDs DS3 and DS4 when the slider is touched. 19 | It will adjust the brightness on DS3 depending on where the slider is touched. 20 | The code will turn off DS4 when the slider is no longer senses a touch, but 21 | DS3 will remain at the illumination it last sensed. 22 | 23 | Resources Used: 24 | -------------------------------------------------------------------------------- 25 | CAPSENSE0 module 26 | PB0.1 (capsense input) 27 | PB0.2 (capsense input) 28 | PB0.3 (capsense input) 29 | PB0.4 (capsense input) 30 | PB1.7 (capsense input) 31 | PB1.8 (capsense input) 32 | PB1.3 (debug printf) 33 | PB2.10 (led) 34 | PB2.11 (led) 35 | USB0 module 36 | USBEP0 (default endpoint) 37 | USBEP1 (hid interrupt endpoint) 38 | 39 | Notes On Example and Modes: 40 | -------------------------------------------------------------------------------- 41 | Default Mode: 42 | AHB 20 MHz 43 | APB 20 MHz 44 | CAPSENSE module takes measurement on each channel and then loops 45 | YEllow LED (DS4) will illuminate when the slider is touched 46 | Red LED (DS3) will illuminate with a brightness level from 1-10 depending on 47 | where the slider is touched (position A is the brightest and B is the 48 | dimmest). 49 | The position where the touch was detected is output via USBHID reports. 50 | 51 | 52 | How to Use: 53 | -------------------------------------------------------------------------------- 54 | 1) Download the code to a SiM3U1xx device on an SiM3U1xx MCU Card 55 | 2) Power the MCU Card board. The easiest way to do this is by connecting a USB 56 | cable to J13 ("Device USB" connector). 57 | 3) In the IDE, open the debug printf viewer and then run the code. 58 | In uVision, the debug printf viewer can be opened by starting a debug session 59 | and then clicking View -> Serial Windows -> Debug (printf) Viewer. 60 | 4) Set the USER CONTROL switch to ON. 61 | 5) Open up Notepad on the Host, and ensure that it has the focus for keyboard 62 | input. 63 | 6) Run the code: The yellow LED (DS4) will illuminate when the slider is touched 64 | and the red LED (DS3) will illuminate with a brightness level relative to 65 | where the slider is touched. 66 | 67 | The computer will type out a number from 0 through 9, depending on where the 68 | capsense detected a touch. 69 | 70 | Note: The PB1.8 pin is tied to the UDP bus in addition to a CAPSENSE channel. 71 | This causes the PB1.8 pin to measure higher than the other pins. Remove R50 72 | to improve the performance of this pin. This resistor will have to be readded 73 | to enable some UDP EBID functionality. 74 | 75 | Note2: We recommend not using the CAPSENSE on the SiM3U1xx or SiM3C1xx MCU cards 76 | while connected to the UDP motherboard because of the way the pins are shared 77 | between CAPSENSE and other functions. 78 | 79 | 80 | 81 | Revision History: 82 | -------------------------------------------------------------------------------- 83 | Release 1.2 84 | -Swapped last two channels and added a note about removing R50 for increased 85 | performance. 86 | -2 MAY 12 87 | Release 1.1 88 | -Update conversion rate parameter in default configuration (ES) 89 | -11 APR 12 90 | Release 1.0 91 | -Initial Revision (ES) 92 | -31 JAN 12 93 | 94 | ---eof-------------------------------------------------------------------------- 95 | 96 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCAPSENSE0.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | // library 17 | // hal 18 | #include 19 | #include 20 | #include 21 | // application 22 | #include "gCAPSENSE0.h" 23 | 24 | //============================================================================== 25 | // 2nd Level Interrupt Handlers 26 | //============================================================================== 27 | extern void my_convert_complete_handler(void); 28 | extern void my_scan_complete_handler(void); 29 | 30 | //============================================================================== 31 | //1st LEVEL INTERRUPT HANDLERS 32 | //============================================================================== 33 | // Prints the value sensed at the end of each convert, and a newline at the end of each scan 34 | void CAPSENSE0_IRQHandler(void) 35 | { 36 | if (SI32_CAPSENSE_A_is_conversion_complete_interrupt_pending(SI32_CAPSENSE_0)) 37 | { 38 | my_convert_complete_handler(); 39 | }// is_conversion_complete_interrupt_pending 40 | 41 | if (SI32_CAPSENSE_A_is_end_of_scan_interrupt_pending(SI32_CAPSENSE_0)) 42 | { 43 | my_scan_complete_handler(); 44 | }// is_end_of_scan_interrupt_pending 45 | } 46 | 47 | //============================================================================== 48 | //CONFIGURATION FUNCTIONS 49 | //============================================================================== 50 | 51 | //------------------------------------------------------------------------------ 52 | void CAPSENSE0_enter_default_mode_from_reset(void) 53 | { 54 | // ENABLE CAPSENSE CLOCK 55 | SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, 56 | SI32_CLKCTRL_A_APBCLKG0_CAPSENSE0); 57 | 58 | // SETUP CAPSENSE FOR SINGLE SCAN OF SLIDER (CS0-3, 8-9) 59 | SI32_CAPSENSE_A_enable_bias(SI32_CAPSENSE_0); 60 | SI32_CAPSENSE_A_select_single_conversion_mode(SI32_CAPSENSE_0); 61 | SI32_CAPSENSE_A_set_conversion_start_source(SI32_CAPSENSE_0, 0); 62 | SI32_CAPSENSE_A_write_scanm(SI32_CAPSENSE_0, 0x01); 63 | SI32_CAPSENSE_A_set_gain(SI32_CAPSENSE_0, 1); 64 | SI32_CAPSENSE_A_set_conversion_rate(SI32_CAPSENSE_0, 65 | SI32_CAPSENSE_A_CONVERSION_RATE_16_CLOCKS_16_BITS); 66 | SI32_CAPSENSE_A_set_number_to_accumulate(SI32_CAPSENSE_0, 67 | SI32_CAPSENSE_A_ACCUMULATOR_MODE_32_SAMPLES); 68 | 69 | // ENABLE INTERRUPTS 70 | NVIC_ClearPendingIRQ(CAPSENSE0_IRQn); 71 | NVIC_EnableIRQ(CAPSENSE0_IRQn); 72 | SI32_CAPSENSE_A_enable_conversion_done_interrupt(SI32_CAPSENSE_0); 73 | } 74 | 75 | //-eof-------------------------------------------------------------------------- 76 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCAPSENSE0.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #ifndef __GCAPSENSE_H__ 18 | #define __GCAPSENSE_H__ 19 | void CAPSENSE0_enter_default_mode_from_reset(void); 20 | /* 21 | void gCAPSENSE0_enter_off_config(void); 22 | void gCAPSENSE0_enter_default_config(void); 23 | */ 24 | #endif //__GCAPSENSE_H__ 25 | 26 | //-eof-------------------------------------------------------------------------- 27 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCLKCTRL.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------- 2 | // Copyright (c) 2012 by Silicon Laboratories 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // 8 | // 9 | // Original content and implementation provided by Silicon Laboratories 10 | //------------------------------------------------------------------------------- 11 | 12 | //============================================================================== 13 | // WARNING: 14 | // 15 | // This file is auto-generated by AppBuilder and should not be modified. 16 | // Any hand modifications will be lost if the project is regenerated. 17 | //============================================================================== 18 | 19 | #include "gClkCtrl.h" 20 | #include 21 | #include 22 | 23 | //============================================================================== 24 | // Configuration Functions 25 | //============================================================================== 26 | 27 | void CLKCTRL_enter_default_mode_from_reset(void) 28 | { 29 | USB0_enter_default_mode(); 30 | 31 | // Set system clock to AHB divider frequency 32 | SystemCoreClock = 20000000; 33 | } 34 | 35 | void CLKCTRL_setup_default_mode_clock_gates(void) 36 | { 37 | SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, 38 | SI32_CLKCTRL_A_APBCLKG0_PB0 | 39 | SI32_CLKCTRL_A_APBCLKG0_CAPSENSE0 | 40 | SI32_CLKCTRL_A_APBCLKG0_USB0 | 41 | SI32_CLKCTRL_A_APBCLKG0_FLASHCTRL0); 42 | } 43 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCLKCTRL.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------- 2 | // Copyright (c) 2012 by Silicon Laboratories 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // 8 | // 9 | // Original content and implementation provided by Silicon Laboratories 10 | //------------------------------------------------------------------------------- 11 | 12 | //============================================================================== 13 | // WARNING: 14 | // 15 | // This file is auto-generated by AppBuilder and should not be modified. 16 | // Any hand modifications will be lost if the project is regenerated. 17 | //============================================================================== 18 | 19 | #ifndef __GCLKCTRL_H__ 20 | #define __GCLKCTRL_H__ 21 | 22 | #include "gUSB0.h" 23 | 24 | void CLKCTRL_enter_default_mode_from_reset(void); 25 | void CLKCTRL_setup_default_mode_clock_gates(void); 26 | 27 | #endif //__GCLKCTRL_H__ 28 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCpu.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | // library 17 | #include 18 | #include 19 | 20 | #ifndef DEBUG 21 | #define printf(...) 22 | #endif 23 | 24 | void set_ahb_clock(uint32_t freq); 25 | void halt(void); 26 | 27 | // MODULE VARIABLES 28 | //------------------------------------------------------------------------------ 29 | //Variable that incrments 1000 times / second 30 | volatile uint32_t msTicks; 31 | 32 | //============================================================================== 33 | //2nd LEVEL INTERRUPT HANDLERS 34 | //============================================================================== 35 | /*NONE*/ 36 | 37 | //============================================================================== 38 | //1st LEVEL INTERRUPT HANDLERS 39 | //============================================================================== 40 | void SysTick_Handler(void) 41 | { 42 | msTicks++; 43 | /*NO SECOND LEVEL HANDLER SPECIFIED*/ 44 | } 45 | 46 | //------------------------------------------------------------------------------ 47 | void NMI_Handler(void) 48 | { 49 | printf("NMI_Handler\n"); 50 | /*NO SECOND LEVEL HANDLER SPECIFIED (halt USED)*/ 51 | halt(); 52 | } 53 | 54 | //------------------------------------------------------------------------------ 55 | void HardFault_Handler(void) 56 | { 57 | printf("HardFault_Handler\n"); 58 | /*NO SECOND LEVEL HANDLER SPECIFIED (halt USED)*/ 59 | halt(); 60 | } 61 | 62 | //------------------------------------------------------------------------------ 63 | void MemManage_Handler(void) 64 | { 65 | printf("MemManage_Handler\n"); 66 | /*NO SECOND LEVEL HANDLER SPECIFIED (halt USED)*/ 67 | halt(); 68 | } 69 | 70 | //------------------------------------------------------------------------------ 71 | void BusFault_Handler(void) 72 | { 73 | printf("BusFault_Handler\n"); 74 | /*NO SECOND LEVEL HANDLER SPECIFIED (halt USED)*/ 75 | halt(); 76 | } 77 | 78 | //------------------------------------------------------------------------------ 79 | void UsageFault_Handler(void) 80 | { 81 | printf("UsageFault_Handler\n"); 82 | /*NO SECOND LEVEL HANDLER SPECIFIED (halt USED)*/ 83 | halt(); 84 | } 85 | 86 | 87 | //============================================================================== 88 | //CONFIGURATION FUNCTIONS 89 | //============================================================================== 90 | // Sets up systick 91 | void cpu_update(void) 92 | { 93 | set_ahb_clock(SystemCoreClock); 94 | 95 | # if SI32_BASE_CPU_ARMV7M 96 | // set Priority for Cortex-M0 System Interrupts. 97 | NVIC_SetPriority(SysTick_IRQn, (1 << __NVIC_PRIO_BITS) - 1); 98 | // TBD the rest of them 99 | # endif 100 | } 101 | 102 | //============================================================================== 103 | // SUPPORT FUNCTIONS 104 | //============================================================================== 105 | void set_ahb_clock(uint32_t freq) 106 | { 107 | // UPDATE SYSTICK 108 | if (SysTick_Config(freq / 1000)) 109 | { 110 | printf("ERROR: SysTick_Config failed\n"); 111 | } 112 | 113 | // UPDATE ITM DIVIDER 114 | *((uint32_t *) 0xE0040010) = ((50 * freq) / 20000000) - 1; 115 | }// set_ahb_clock 116 | 117 | //------------------------------------------------------------------------------ 118 | uint32_t get_msTicks(void) 119 | { 120 | return msTicks; 121 | }// get_msTicks 122 | 123 | //------------------------------------------------------------------------------ 124 | void halt(void) 125 | { 126 | printf("Halted\n"); 127 | // Configurable Fault Status Register 128 | printf(" CFSR: 0x%08X\n", SCB->CFSR); 129 | // Hard Fault Status Register 130 | printf(" HFSR: 0x%08X\n", SCB->HFSR); 131 | // Debug Fault Status Register 132 | printf(" DFSR: 0x%08X\n", SCB->DFSR); 133 | // Memory Management Fault Address Register 134 | printf("MMFAR: 0x%08X\n", SCB->MMFAR); 135 | // Bus Fault Address register 136 | printf(" BFAR: 0x%08X\n", SCB->BFAR); 137 | //Auxiliary Fault Status Register 138 | printf(" AFSR: 0x%08X\n", SCB->AFSR); 139 | while(1); 140 | } 141 | 142 | void gCpu_enter_default_config(void) 143 | { 144 | SystemCoreClock = 20000000; 145 | if (SysTick_Config(SystemCoreClock / 1000)) 146 | { 147 | printf("ERROR: SysTick_Config failed\n"); 148 | } 149 | 150 | // set Priority for Cortex-M0 System Interrupts. 151 | NVIC_SetPriority(SysTick_IRQn, (1 << __NVIC_PRIO_BITS) - 1); 152 | } 153 | 154 | //-eof-------------------------------------------------------------------------- 155 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gCpu.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #ifndef __GCPU_H__ 18 | #define __GCPU_H__ 19 | 20 | #include 21 | 22 | // MODE FUNCTIONS 23 | void cpu_update(void); 24 | 25 | // SUPPORT FUNCTIONS 26 | void set_ahb_clock(uint32_t freq); 27 | uint32_t get_msTicks(void); 28 | void halt(void); 29 | 30 | // NVIC table location 31 | # define si32McuOption_map_vectors_to_ram 0 32 | 33 | # if si32McuOption_map_vectors_to_ram 34 | void (*si32_nvic_table[SIM3U1XX_MCU_NVIC_COUNT])(void); 35 | # define si32McuOption_vector_ram_base si32_nvic_table 36 | 37 | # endif 38 | 39 | // sysTick Variable 40 | extern volatile uint32_t msTicks; 41 | 42 | void gCpu_enter_default_config(void); 43 | 44 | #endif // __GCPU_H__ 45 | 46 | //---eof------------------------------------------------------------------------ 47 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gFLASHCTRL0.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------- 2 | // Copyright (c) 2012 by Silicon Laboratories 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // 8 | // 9 | // Original content and implementation provided by Silicon Laboratories 10 | //------------------------------------------------------------------------------- 11 | 12 | //============================================================================== 13 | // WARNING: 14 | // 15 | // This file is auto-generated by AppBuilder and should not be modified. 16 | // Any hand modifications will be lost if the project is regenerated. 17 | //============================================================================== 18 | 19 | #include "gFLASHCTRL0.h" 20 | 21 | // Include peripheral access modules used in this file 22 | #include 23 | #include 24 | 25 | //============================================================================== 26 | // Configuration Functions 27 | //============================================================================== 28 | void FLASHCTRL0_enter_default_mode_from_reset(void) 29 | { 30 | // No peripheral code is needed for this mode transition 31 | } 32 | 33 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gFLASHCTRL0.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------- 2 | // Copyright (c) 2012 by Silicon Laboratories 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // 8 | // 9 | // Original content and implementation provided by Silicon Laboratories 10 | //------------------------------------------------------------------------------- 11 | 12 | //============================================================================== 13 | // WARNING: 14 | // 15 | // This file is auto-generated by AppBuilder and should not be modified. 16 | // Any hand modifications will be lost if the project is regenerated. 17 | //============================================================================== 18 | 19 | #ifndef __GFLASHCTRL0_H__ 20 | #define __GFLASHCTRL0_H__ 21 | 22 | void FLASHCTRL0_enter_default_mode_from_reset(void); 23 | 24 | 25 | #endif //__GFLASHCTRL0_H__ 26 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gModes.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #include "gCAPSENSE0.h" 18 | #include "gCLKCTRL.h" 19 | #include "gCPU.h" 20 | #include "gFLASHCTRL0.h" 21 | #include "gPB.h" 22 | 23 | #include 24 | 25 | //============================================================================== 26 | //MODE FUNCTIONS 27 | //============================================================================== 28 | void enter_default_mode_from_reset(void) 29 | { 30 | // Setup clock gates 31 | CLKCTRL_setup_default_mode_clock_gates(); 32 | 33 | // Setup ports 34 | pb_enter_default_mode_from_reset(); 35 | 36 | // Initialize clock control 37 | SystemCoreClock = 20000000; 38 | cpu_update(); 39 | CLKCTRL_enter_default_mode_from_reset(); 40 | 41 | // Initialize peripherals 42 | cpu_update(); 43 | CAPSENSE0_enter_default_mode_from_reset(); 44 | FLASHCTRL0_enter_default_mode_from_reset(); 45 | } 46 | 47 | /* 48 | //============================================================================== 49 | void gModes_enter_my_default_mode() 50 | { 51 | // SETUP CPU 52 | gCpu_enter_default_config(); 53 | 54 | // SETUP Ports 55 | gPB_enter_default_config(); 56 | 57 | // SETUP CAPSENSE 58 | gCAPSENSE0_enter_default_config(); 59 | } 60 | 61 | //------------------------------------------------------------------------------ 62 | void gModes_enter_my_off_mode() 63 | { 64 | // SETUP CAPSENSE 65 | gCAPSENSE0_enter_off_config(); 66 | 67 | // SETUP Ports 68 | gPB_enter_off_config(); 69 | } 70 | */ 71 | 72 | //---eof------------------------------------------------------------------------ 73 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gModes.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #ifndef __GMODES_H__ 18 | #define __GMODES_H__ 19 | 20 | // Default Mode initialization 21 | void enter_default_mode_from_reset(void); 22 | void gModes_enter_my_default_mode(void); 23 | void gModes_enter_my_off_mode(void); 24 | 25 | #endif // __GMODES_H__ 26 | 27 | //---eof------------------------------------------------------------------------ 28 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gPB.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #include "gPB.h" 18 | 19 | // Include peripheral access modules used in this file 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | 26 | //============================================================================== 27 | // CONFIGURATION FUNCTIONS 28 | //============================================================================== 29 | void pb_enter_default_mode_from_reset(void) 30 | { 31 | // PB0 Setup 32 | SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x001E); 33 | SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_0, 0x001E); 34 | 35 | // PB1 Setup 36 | SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_1, 0x0180); 37 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x0008); 38 | SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_1, 0x0188); 39 | 40 | // Enable Crossbar0 signals & set properties 41 | SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0); 42 | 43 | // PB2 Setup 44 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00); 45 | 46 | // Enable Crossbar1 signals & set properties 47 | SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0); 48 | 49 | } 50 | //============================================================================== 51 | void gPB_enter_off_config() 52 | { 53 | // all ports hi-z 54 | SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_0, 0x0000FFFF); 55 | SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_1, 0x0000FFFF); 56 | SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x0000FFFF); 57 | SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_3, 0x00007FFF); 58 | 59 | SI32_PBCFG_A_disable_crossbar_1(SI32_PBCFG_0); 60 | 61 | SI32_CLKCTRL_A_disable_apb_to_modules_0(SI32_CLKCTRL_0, 62 | SI32_CLKCTRL_A_APBCLKG0_PB0); 63 | } 64 | 65 | //---------------------------------------------------------- 66 | // Sets up ports for all peripherals 67 | // NOTE 'default' Refers to the default device setup for the application. 68 | void gPB_enter_default_config() 69 | { 70 | // START APB CLK AND ENABLE SW PRINF 71 | SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0, 72 | SI32_CLKCTRL_A_APBCLKG0_PB0); 73 | SI32_PBSTD_A_set_pins_push_pull_output (SI32_PBSTD_1, 0x00000008); 74 | 75 | // ENABLE CROSSBAR 1. WE WILL DRIVE LED's ON CROSSBAR1 76 | SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0); 77 | 78 | // GPIO PORT SETUP 79 | // ENABLE LED DRIVERS (P2.11, P2.10) 80 | SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00); 81 | 82 | // CAPSENSE PORT SETUP 83 | // CAPSENSE PINS TO ANALOG 84 | SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x0000001E); 85 | SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_1, 0x00000180); 86 | 87 | } 88 | 89 | //---eof------------------------------------------------------------------------ 90 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gPB.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //============================================================================== 11 | // WARNING: 12 | // 13 | // This file is auto-generated by AppBuilder and should not be modified. 14 | // Any hand modifications will be lost if the project is regenerated. 15 | //============================================================================== 16 | 17 | #ifndef __GPB_H__ 18 | #define __GPB_H__ 19 | void pb_enter_default_mode_from_reset(void); 20 | /* 21 | void gPB_enter_off_config(void); 22 | void gPB_enter_default_config(void); 23 | */ 24 | 25 | #endif // __GPB_H__ 26 | 27 | //---eof------------------------------------------------------------------------ 28 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gUSB0.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | // library 10 | // hal 11 | // application 12 | #include "gUSB0.h" 13 | #include "gCPU.h" 14 | #include 15 | #include 16 | #include 17 | #include 18 | #include 19 | 20 | 21 | //============================================================================== 22 | // 2nd Level Interrupt Handlers 23 | //============================================================================== 24 | extern void USB0_start_of_frame_handler(void); 25 | extern void USB0_resume_handler(void); 26 | extern void USB0_reset_handler(void); 27 | extern void USB0_suspend_handler(void); 28 | extern void USB0_ep0_handler(void); 29 | extern void USB0_ep1_in_handler(void); 30 | extern void USB0_ep1_out_handler(void); 31 | extern void USB0_ep2_in_handler(void); 32 | extern void USB0_ep2_out_handler(void); 33 | extern void USB0_ep3_in_handler(void); 34 | extern void USB0_ep3_out_handler(void); 35 | extern void USB0_ep4_in_handler(void); 36 | extern void USB0_ep4_out_handler(void); 37 | 38 | //============================================================================== 39 | //1st LEVEL INTERRUPT HANDLERS 40 | //============================================================================== 41 | void USB0_IRQHandler(void) 42 | { 43 | uint32_t usbCommonInterruptMask = SI32_USB_A_read_cmint(SI32_USB_0); 44 | uint32_t usbEpInterruptMask = SI32_USB_A_read_ioint(SI32_USB_0); 45 | 46 | SI32_USB_A_write_cmint(SI32_USB_0, usbCommonInterruptMask); 47 | SI32_USB_A_write_ioint(SI32_USB_0, usbEpInterruptMask); 48 | 49 | if (usbEpInterruptMask & SI32_USB_A_IOINT_EP0I_MASK) 50 | { 51 | USB0_ep0_handler(); 52 | } 53 | 54 | if (usbEpInterruptMask & SI32_USB_A_IOINT_IN1I_MASK ) 55 | { 56 | USB0_ep1_in_handler(); 57 | } 58 | 59 | // Handle Start of Frame Interrupt 60 | if (usbCommonInterruptMask & SI32_USB_A_CMINT_SOFI_MASK) 61 | { 62 | USB0_start_of_frame_handler(); 63 | } 64 | 65 | // Handle Resume Interrupt 66 | if (usbCommonInterruptMask & SI32_USB_A_CMINT_RESI_MASK) 67 | { 68 | USB0_resume_handler(); 69 | } 70 | 71 | // Handle Reset Interrupt 72 | if (usbCommonInterruptMask & SI32_USB_A_CMINT_RSTI_MASK) 73 | { 74 | USB0_reset_handler(); 75 | } 76 | 77 | // Handle Suspend interrupt 78 | if (usbCommonInterruptMask & SI32_USB_A_CMINT_SUSI_MASK) 79 | { 80 | USB0_suspend_handler(); 81 | } 82 | } 83 | 84 | 85 | //============================================================================== 86 | // Configuration Functions 87 | //============================================================================== 88 | 89 | void USB0_enter_default_mode() 90 | { 91 | SI32_USB_A_enable_usb_oscillator(SI32_USB_0); 92 | 93 | // Perform asynchronous reset of the USB module 94 | SI32_USB_A_reset_module (SI32_USB_0); 95 | 96 | // Enable Endpoint 0 interrupts 97 | SI32_USB_A_write_cmint (SI32_USB_0, 0x00000000); 98 | SI32_USB_A_write_ioint (SI32_USB_0, 0x00000000); 99 | SI32_USB_A_enable_ep0_interrupt (SI32_USB_0); 100 | 101 | // Enable Reset, Resume, Suspend interrupts 102 | // SI32_USB_A_enable_suspend_interrupt (SI32_USB_0); 103 | // SI32_USB_A_enable_resume_interrupt (SI32_USB_0); 104 | SI32_USB_A_enable_reset_interrupt (SI32_USB_0); 105 | // SI32_USB_A_enable_start_of_frame_interrupt (SI32_USB_0); 106 | 107 | // Enable Transceiver, fullspeed 108 | SI32_USB_A_write_tcontrol (SI32_USB_0, 0x00); 109 | SI32_USB_A_select_transceiver_full_speed (SI32_USB_0); 110 | SI32_USB_A_enable_transceiver (SI32_USB_0); 111 | 112 | // Enable clock recovery, single-step mode disabled 113 | SI32_USB_A_enable_clock_recovery (SI32_USB_0); 114 | SI32_USB_A_select_clock_recovery_mode_full_speed (SI32_USB_0); 115 | SI32_USB_A_select_clock_recovery_normal_cal (SI32_USB_0); 116 | 117 | // Enable USB interrupts 118 | NVIC_EnableIRQ(USB0_IRQn); 119 | 120 | // Enable the module 121 | SI32_USB_A_enable_module(SI32_USB_0); 122 | } 123 | 124 | 125 | //============================================================================== 126 | // Support Functions 127 | //============================================================================== 128 | 129 | 130 | 131 | //-eof-------------------------------------------------------------------------- 132 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/generated/gUSB0.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------- 2 | // Copyright (c) 2012 by Silicon Laboratories 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // 8 | // 9 | // Original content and implementation provided by Silicon Laboratories 10 | //------------------------------------------------------------------------------- 11 | 12 | //============================================================================== 13 | // WARNING: 14 | // 15 | // This file is auto-generated by AppBuilder and should not be modified. 16 | // Any hand modifications will be lost if the project is regenerated. 17 | //============================================================================== 18 | 19 | #ifndef __GUSB0_H__ 20 | #define __GUSB0_H__ 21 | 22 | #include 23 | #include 24 | 25 | void USB0_enter_default_mode(void); 26 | 27 | 28 | #endif //__GUSB0_H__ 29 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/main.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | // library 10 | #include 11 | // hal 12 | #include 13 | #include 14 | // application 15 | #include "gModes.h" 16 | #include "myCapsense0.h" 17 | #include "myCpu.h" 18 | #include "myUsbDevice.h" 19 | #include "myUSB0.h" 20 | 21 | //============================================================================== 22 | // myApplication. 23 | //============================================================================== 24 | int main() 25 | { 26 | // msTicks increments every 1ms (1Khz). Driven by boot osc (myCpu.c) 27 | // _last variables store the last seen state of variables so we know when they have changed 28 | uint32_t msTicks_last=0xffffffff; 29 | volatile int transmitKeyLast=-1; 30 | 31 | // increments every main loop; 32 | uint32_t count=0; 33 | 34 | // Enter the default operating mode for this application 35 | enter_default_mode_from_reset(); 36 | 37 | //Run initial capsens basline caibration 38 | calibrate_capsense(); 39 | 40 | // Connect to USB 41 | USB0_connect(); 42 | 43 | //PERFORM THE FOLLOWING TASKS FOREVER 44 | while (1) 45 | { 46 | // if msTicks has changed 47 | if (msTicks != msTicks_last) 48 | { 49 | // SAMPLE CAPOUCH EVERY .1S 50 | if (!(msTicks % 100)) 51 | { 52 | // TRIGGER CAPSENSE 53 | scan_slider(); 54 | if( CapsenseTouch && (transmitKeyLast!=CapsenseTouchPos)) 55 | { 56 | // key-down event. 57 | transmitKeyLast = CapsenseTouchPos ; 58 | myHidTransmitKey(transmitKeyLast); 59 | } 60 | else if ( (transmitKeyLast!=-1) && (!CapsenseTouch) ) 61 | { 62 | // key-up event. 63 | transmitKeyLast = -1; 64 | myHidTransmitKey(16) ; 65 | } 66 | } 67 | 68 | 69 | // UPDATE STATUS OF TOUCH DETECTED LED 70 | SI32_PBSTD_A_write_pins_masked(SI32_PBSTD_2, 71 | (!CapsenseTouch) << 0xB, 72 | 0x800); 73 | 74 | // save current msTicks value as last seen 75 | msTicks_last = msTicks; 76 | }// if msTicks changed 77 | 78 | // EVERY 2^10 counts 79 | if (!(count % (1024))) 80 | { 81 | // TURN ON LED driver (P2.10) 82 | SI32_PBSTD_A_write_pins_low(SI32_PBSTD_2, 0x400); 83 | } 84 | 85 | // 2^CapsenseTouchPos counts after led driver on 86 | if ((count % 1024) == (1 << CapsenseTouchPos)) 87 | { 88 | // TURN OFF LED driver (P2.10) 89 | SI32_PBSTD_A_write_pins_high(SI32_PBSTD_2, 0x400); 90 | // Led brightness will now be 1 of 10 levels determined by the 91 | // captouch slider (time on doubles betweeneach level) 92 | } 93 | 94 | count++; 95 | }//while(1) 96 | } 97 | 98 | //-eof-------------------------------------------------------------------------- 99 | 100 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myCAPSENSE0.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | // library 10 | #include 11 | #include 12 | #include 13 | // application 14 | #include "myCAPSENSE0.h" 15 | 16 | #define printf(...) 17 | 18 | // PUBLIC VARIABLES 19 | uint8_t CapsenseTouchPos; 20 | bool CapsenseTouch; 21 | 22 | // CAPSENS CALCULATION and INFO STRUCT 23 | struct capsensTracking_struct 24 | { 25 | bool scanning; 26 | uint32_t chan; 27 | uint32_t channels[6]; 28 | uint32_t readings[6]; 29 | uint32_t baseline[6]; 30 | } CS_info; 31 | 32 | //============================================================================== 33 | //2nd LEVEL INTERRUPT HANDLERS 34 | //============================================================================== 35 | void calculate_position(uint8_t); //defined below 36 | void my_convert_complete_handler(void) 37 | { 38 | // SAVE READING 39 | CS_info.readings[CS_info.chan] = SI32_CAPSENSE_A_read_data(SI32_CAPSENSE_0); 40 | 41 | // CLEAR INTERRUPT AND DISABLE MODULE 42 | SI32_CAPSENSE_A_clear_conversion_complete_interrupt(SI32_CAPSENSE_0); 43 | SI32_CAPSENSE_A_disable_module(SI32_CAPSENSE_0); 44 | 45 | // IF WE HAVE CHANNELS LEFT TO SCAN 46 | if (CS_info.chan < 5) 47 | { 48 | // POINT TO NEXT CHANNEL 49 | SI32_CAPSENSE_A_write_mux(SI32_CAPSENSE_0, CS_info.channels[++CS_info.chan]); 50 | SI32_CAPSENSE_A_connect_capsense_channel(SI32_CAPSENSE_0); 51 | 52 | // AND START CONVERSION 53 | SI32_CAPSENSE_A_enable_module(SI32_CAPSENSE_0); 54 | SI32_CAPSENSE_A_start_manual_conversion(SI32_CAPSENSE_0); 55 | 56 | } 57 | else 58 | { 59 | // PRINT CARRAGE RETURN 60 | printf("\n"); 61 | 62 | // DISCONNECT FROM PINS 63 | SI32_CAPSENSE_A_connect_capsense_channel(SI32_CAPSENSE_0); 64 | 65 | // AND CALCULATE POSITION (interpolate 5 codes per segment) 66 | calculate_position(2); 67 | } 68 | } 69 | 70 | //------------------------------------------------------------------------------ 71 | void my_scan_complete_handler(void) 72 | { 73 | /*DO NOTHING*/ 74 | } 75 | 76 | //------------------------------------------------------------------------------ 77 | void scan_slider(void) 78 | { 79 | // RESET CHANNEL POINTER 80 | CS_info.chan = 0; 81 | 82 | // CONNECT TO FIRST CHANNEL 83 | SI32_CAPSENSE_A_write_mux(SI32_CAPSENSE_0, 0); 84 | SI32_CAPSENSE_A_connect_capsense_channel(SI32_CAPSENSE_0); 85 | 86 | // START CONVERSION 87 | SI32_CAPSENSE_A_enable_module(SI32_CAPSENSE_0); 88 | SI32_CAPSENSE_A_start_manual_conversion(SI32_CAPSENSE_0); 89 | } 90 | 91 | //------------------------------------------------------------------------------ 92 | void calculate_position(uint8_t scale) 93 | { 94 | uint32_t samples = sizeof(CS_info.readings) / 4; 95 | uint32_t maxVal = 0; 96 | uint32_t maxPos = 0xFF; 97 | uint32_t pos; 98 | uint32_t range = (samples - 1)*scale; 99 | uint32_t top, bot, tscale, bscale; 100 | uint32_t sum; 101 | 102 | // For each virtual position 103 | for (pos=0; pos maxVal) 119 | && (CS_info.readings[bot] > ((CS_info.baseline[bot] + 0x100) * 1.20) 120 | || CS_info.readings[top] > ((CS_info.baseline[top] + 0x100) * 1.20))) 121 | { 122 | maxVal = sum; 123 | maxPos = pos; 124 | } 125 | 126 | }// foreach virtual positon 127 | 128 | // IF VALID TOUCH SENSED 129 | if (maxPos <0x80) 130 | { 131 | // MARK TOUCH SENSED AND SAVE SGMENT ACTIVE 132 | CapsenseTouch = 1; 133 | CapsenseTouchPos = maxPos; 134 | 135 | // PRINT MEASURED SEGMENT TO IDE 136 | printf("0x%d\n", CapsenseTouchPos); 137 | } 138 | else 139 | { 140 | // MARK TOUCH NOT SENSED 141 | CapsenseTouch = 0; 142 | } 143 | } 144 | 145 | //------------------------------------------------------------------------------ 146 | void calibrate_capsense(void) 147 | { 148 | uint32_t i; 149 | 150 | //DISABLE INTERUPTS 151 | NVIC_DisableIRQ(CAPSENSE0_IRQn); 152 | 153 | //INIT MANUAL SCAN STRUCTURE 154 | CS_info.chan = 0; 155 | CS_info.channels[0] = 0x0; 156 | CS_info.channels[1] = 0x1; 157 | CS_info.channels[2] = 0x2; 158 | CS_info.channels[3] = 0x3; 159 | CS_info.channels[4] = 0x8; 160 | CS_info.channels[5] = 0x9; 161 | 162 | //CREATE INITIAL BASELINE (manual scan) 163 | for (i=0; i 14 | 15 | // INCLUDE GENERATED CONTENT 16 | #include "gCAPSENSE0.h" 17 | 18 | 19 | // Starts a scan of the slider. This results in multiple convert complete 20 | // interrupts. When the scan is complete the touch position is calculated 21 | void scan_slider(void); 22 | 23 | // Perform initial capsense baselining 24 | void calibrate_capsense(void); 25 | 26 | 27 | //============================================================================== 28 | //EXPORT PUBLIC VARS FOR OTHER MODULES 29 | //============================================================================== 30 | // holds position(virtual) of last detected touch 31 | extern uint8_t CapsenseTouchPos; 32 | 33 | //0 if no touch seen durring last poll, else 1 34 | extern bool CapsenseTouch; 35 | 36 | #endif //__MYCAPSENSE_H__ 37 | 38 | //-eof-------------------------------------------------------------------------- 39 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myCLKCTRL.c: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2012 2 | 3 | #include "myCLKCTRL.h" 4 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myCLKCTRL.h: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2012 2 | 3 | #ifndef __MYCLKCTRL_H__ 4 | #define __MYCLKCTRL_H__ 5 | 6 | #include "gCLKCTRL.h" 7 | 8 | 9 | #endif //__MYCLKCTRL_H__ 10 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myCPU.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | // library 10 | // hal 11 | #include 12 | #include 13 | #include 14 | #include 15 | // application 16 | #include "myCpu.h" 17 | 18 | //------------------------------------------------------------------------------ 19 | // This function is invoked by the CMSIS requires SysemInit() function in 20 | // system_.c. SystemInit() is invoked by Reset_Handler() when the 21 | // CPU boots. 22 | void mySystemInit() 23 | { 24 | // disable the watchdog timer to prevent device resets 25 | // any lines added to this function should be added below this line of code 26 | SI32_WDTIMER_A_stop_counter (SI32_WDTIMER_0); 27 | 28 | // the following lines of code are necessary to enable debug printf 29 | // note that this pin changes between the different package options 30 | 31 | // enable APB clock to the Port Bank module 32 | SI32_CLKCTRL_A_enable_apb_to_modules_0 (SI32_CLKCTRL_0, SI32_CLKCTRL_A_APBCLKG0_PB0CEN_MASK); 33 | // make the SWO pin (PB1.3) push-pull to enable SWV printf 34 | SI32_PBSTD_A_set_pins_push_pull_output (SI32_PBSTD_1, (1<<3)); 35 | } 36 | 37 | //-eof-------------------------------------------------------------------------- 38 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myCPU.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | 11 | #ifndef __MYCPU_H__ 12 | #define __MYCPU_H__ 13 | 14 | #include "gCPU.h" 15 | 16 | #endif // __MYCPU_H__ 17 | 18 | //---eof------------------------------------------------------------------------ 19 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myFLASHCTRL0.c: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2012 2 | 3 | #include "myFLASHCTRL0.h" 4 | 5 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myFLASHCTRL0.h: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2012 2 | 3 | #ifndef __MYFLASHCTRL0_H__ 4 | #define __MYFLASHCTRL0_H__ 5 | 6 | #include 7 | 8 | // INCLUDE GENERATED CONTENT 9 | #include "gFLASHCTRL0.h" 10 | 11 | 12 | #endif //__MYFLASHCTRL0_H__ 13 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myPB.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | // library 10 | // hal 11 | // application 12 | #include "myPb.h" 13 | 14 | //-eof-------------------------------------------------------------------------- 15 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myPB.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | #ifndef __MYPB_H__ 11 | #define __MYPB_H__ 12 | 13 | #include "gPB.h" 14 | 15 | #endif // __MYPB_H__ 16 | 17 | //---eof------------------------------------------------------------------------ 18 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myUSB0.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | #include "myUSB0.h" 11 | #include "si32Usb.h" 12 | #include "myUsbDevice.h" 13 | 14 | #include 15 | #include 16 | #include 17 | #include 18 | 19 | extern void myUsbDevice_request_handler(void); 20 | 21 | volatile uint32_t myUSB0_sof_count; 22 | 23 | volatile uint32_t myUSB0_device_state = USB_DETACHED; 24 | si32UsbSetupType myUSB0_setup; 25 | 26 | volatile uint32_t myUSB0_ep0_state = EP0_DISABLED; 27 | uint8_t * myUSB0_ep0_data_pointer; 28 | uint32_t myUSB0_ep0_data_size = 0; 29 | 30 | volatile uint32_t myUSB0_ep1_state = EPN_DISABLED; 31 | 32 | 33 | 34 | 35 | //============================================================================== 36 | // 2nd Level Interrupt Handlers (Called from generated code) 37 | //============================================================================== 38 | void UsbStateMachine(void); 39 | 40 | //------------------------------------------------------------------------------ 41 | void USB0_ep0_handler(void) 42 | { 43 | uint32_t * SetupPointer = (uint32_t *)&myUSB0_setup.wRequest; 44 | uint32_t ControlReg = SI32_USB_A_read_ep0control(SI32_USB_0); 45 | 46 | if(ControlReg & SI32_USB_A_EP0CONTROL_STSTLI_MASK) 47 | { 48 | SI32_USB_A_clear_stall_sent_ep0(SI32_USB_0); 49 | myUSB0_ep0_state = EP0_HALT; 50 | } 51 | 52 | if(ControlReg & SI32_USB_A_EP0CONTROL_SUENDI_MASK) 53 | { 54 | SI32_USB_A_clear_setup_end_early_ep0(SI32_USB_0); 55 | myUSB0_ep0_state = EP0_WAIT_SETUP; 56 | } 57 | 58 | if(ControlReg & SI32_USB_A_EP0CONTROL_OPRDYI_MASK) 59 | { 60 | if(EP0_HALT == myUSB0_ep0_state) 61 | { 62 | myUSB0_ep0_state = EP0_WAIT_SETUP; 63 | } 64 | 65 | if(EP0_WAIT_SETUP != myUSB0_ep0_state) 66 | { 67 | while(1); 68 | } 69 | *SetupPointer++ = SI32_USB_A_read_ep0_fifo_u32(SI32_USB_0); 70 | *SetupPointer = SI32_USB_A_read_ep0_fifo_u32(SI32_USB_0); 71 | myUSB0_ep0_state = EP0_PROCESS_SETUP; 72 | myUsbDevice_request_handler(); 73 | } 74 | 75 | 76 | UsbStateMachine(); 77 | } 78 | 79 | //------------------------------------------------------------------------------ 80 | void USB0_ep1_in_handler(void) 81 | { 82 | myUSB0_ep1_state = EPN_IDLE; 83 | } 84 | 85 | //------------------------------------------------------------------------------ 86 | void USB0_start_of_frame_handler(void) 87 | { 88 | } 89 | 90 | //------------------------------------------------------------------------------ 91 | void USB0_resume_handler(void) 92 | { 93 | } 94 | 95 | //------------------------------------------------------------------------------ 96 | void USB0_reset_handler(void) 97 | { 98 | myUSB0_device_state = USB_DEFAULT; 99 | myUSB0_ep0_state = EP0_WAIT_SETUP; 100 | SI32_USB_A_enable_ep0(SI32_USB_0); 101 | } 102 | 103 | //------------------------------------------------------------------------------ 104 | void USB0_suspend_handler(void) 105 | { 106 | } 107 | 108 | 109 | //============================================================================== 110 | // Support Functions 111 | //============================================================================== 112 | //------------------------------------------------------------------------------ 113 | void UsbStateMachine(void) 114 | { 115 | uint32_t count; 116 | switch(myUSB0_ep0_state) 117 | { 118 | case EP0_NODATA_STATUS: 119 | SI32_USB_A_clear_out_packet_ready_ep0(SI32_USB_0); 120 | myUSB0_ep0_state = EP0_WAIT_SETUP; 121 | break; 122 | 123 | case EP0_START_IN_DATA: 124 | SI32_USB_A_clear_out_packet_ready_ep0(SI32_USB_0); 125 | myUSB0_ep0_state = EP0_CONTINUE_IN_DATA; 126 | // fall through 127 | case EP0_CONTINUE_IN_DATA: 128 | count = _min(myUSB0_ep0_data_size, myUSB0_setup.wLength); 129 | 130 | if(count > EP0_MAX_PACKET_SIZE) 131 | { 132 | count = USB0_EP0_write_fifo(myUSB0_ep0_data_pointer, EP0_MAX_PACKET_SIZE); 133 | myUSB0_ep0_data_pointer += count; 134 | myUSB0_ep0_data_size -= count; 135 | } 136 | else 137 | { 138 | USB0_EP0_write_fifo(myUSB0_ep0_data_pointer, count); 139 | SI32_USB_A_set_data_end_ep0(SI32_USB_0); 140 | myUSB0_ep0_state = EP0_WAIT_SETUP; 141 | } 142 | SI32_USB_A_set_in_packet_ready_ep0(SI32_USB_0); 143 | break; 144 | 145 | case EP0_SEND_STALL: 146 | SI32_USB_A_clear_out_packet_ready_ep0(SI32_USB_0); 147 | SI32_USB_A_send_stall_ep0(SI32_USB_0); 148 | break; 149 | 150 | case EP0_START_OUT_DATA: 151 | case EP0_OUT_STATUS: 152 | default: 153 | break; 154 | } 155 | } 156 | 157 | //------------------------------------------------------------------------------ 158 | void USB0_connect(void) 159 | { 160 | myUSB0_device_state = USB_ATTACHED; 161 | myUSB0_ep0_state = EP0_WAIT_SETUP; 162 | SI32_USB_A_enable_internal_pull_up(SI32_USB_0); 163 | } 164 | 165 | //------------------------------------------------------------------------------ 166 | void USB0_disconnect() 167 | { 168 | SI32_USB_A_disable_internal_pull_up(SI32_USB_0); 169 | } 170 | 171 | //------------------------------------------------------------------------------ 172 | void USB0_stop() 173 | { 174 | // Disable USB interrupts 175 | NVIC_DisableIRQ(USB0_IRQn); 176 | 177 | // Reset USB0 module, which disables it also 178 | SI32_USB_A_reset_module(SI32_USB_0); 179 | 180 | // Disable USB clocks here 181 | myUSB0_device_state = USB_DETACHED; 182 | myUSB0_ep0_state = EP0_DISABLED; 183 | } 184 | 185 | //------------------------------------------------------------------------------ 186 | uint32_t USB0_EP0_read_fifo(uint8_t * dst, uint32_t count) 187 | { 188 | uint32_t * pTmp32; 189 | uint32_t result; 190 | count = _min( count, SI32_USB_A_read_ep0_count(SI32_USB_0) ); 191 | result=count; 192 | while( (((uint32_t) dst) & 0x3) && count) 193 | { 194 | *dst++=SI32_USB_A_read_ep0_fifo_u8(SI32_USB_0); 195 | count--; 196 | }; 197 | 198 | pTmp32=(uint32_t*) dst; 199 | while(count>3) 200 | { 201 | *pTmp32++=SI32_USB_A_read_ep0_fifo_u32(SI32_USB_0); 202 | count-=4; 203 | } 204 | dst = (uint8_t*) pTmp32; 205 | while(count) 206 | { 207 | *dst++=(uint32_t) SI32_USB_A_read_ep0_fifo_u8(SI32_USB_0); 208 | count--; 209 | } 210 | return result; 211 | } 212 | 213 | 214 | 215 | //------------------------------------------------------------------------------ 216 | uint32_t USB0_EP0_write_fifo(uint8_t * src, uint32_t count) 217 | { 218 | uint32_t * pTmp32; 219 | uint32_t result; 220 | result=count=_min( count, EP0_MAX_PACKET_SIZE); 221 | 222 | // ensure src buffer is 32-bit aligned 223 | while( (((uint32_t) src) & 0x3) && count) 224 | { 225 | SI32_USB_A_write_ep0_fifo_u8(SI32_USB_0, *src); 226 | src++; 227 | count--; 228 | } 229 | 230 | // use 32-bit fifo writes, now that we know that the src buffer 231 | // is aligned. 232 | pTmp32=(uint32_t*) src; 233 | while( count > 3 ) 234 | { 235 | SI32_USB_A_write_ep0_fifo_u32(SI32_USB_0, *pTmp32); 236 | pTmp32++; 237 | count-=4; 238 | } 239 | src = (uint8_t*) pTmp32; 240 | 241 | // Write out any residue bytes 1 byte at a time 242 | while(count) 243 | { 244 | SI32_USB_A_write_ep0_fifo_u8(SI32_USB_0, *src); 245 | src++; 246 | count--; 247 | } 248 | return result; 249 | } 250 | 251 | 252 | //------------------------------------------------------------------------------ 253 | uint32_t USB0_EPn_read_fifo(SI32_USBEP_A_Type *ep, uint8_t * dst, uint32_t count) 254 | { 255 | uint32_t * pTmp32; 256 | uint32_t result; 257 | count = _min( count, SI32_USBEP_A_read_data_count(ep) ); 258 | result=count; 259 | 260 | while ( (((uint32_t) dst) & 0x3) && count) 261 | { 262 | *dst++=SI32_USBEP_A_read_fifo_u8(ep); 263 | count--; 264 | }; 265 | 266 | pTmp32=(uint32_t*) dst; 267 | while (count>3) 268 | { 269 | *pTmp32++=SI32_USBEP_A_read_fifo_u32(ep); 270 | count-=4; 271 | } 272 | dst = (uint8_t*) pTmp32; 273 | while (count) 274 | { 275 | *dst++=(uint32_t) SI32_USBEP_A_read_fifo_u8(ep); 276 | count--; 277 | } 278 | return result; 279 | } 280 | 281 | 282 | 283 | //------------------------------------------------------------------------------ 284 | uint32_t USB0_EPn_write_fifo(SI32_USBEP_A_Type *ep, uint8_t * src, uint32_t count) 285 | { 286 | uint32_t * pTmp32; 287 | uint32_t result; 288 | result=count=_min( count, (SI32_USBEP_A_get_in_max_packet_size(ep)<<3)); 289 | 290 | // ensure src buffer is 32-bit aligned 291 | while ( (((uint32_t) src) & 0x3) && count) 292 | { 293 | SI32_USBEP_A_write_fifo_u8(ep, *src); 294 | src++; 295 | count--; 296 | } 297 | 298 | // use 32-bit fifo writes, now that we know that the src buffer 299 | // is aligned. 300 | pTmp32=(uint32_t*) src; 301 | while ( count > 3 ) 302 | { 303 | SI32_USBEP_A_write_fifo_u32(ep, *pTmp32); 304 | pTmp32++; 305 | count-=4; 306 | } 307 | src = (uint8_t*) pTmp32; 308 | 309 | // Write out any residue bytes 1 byte at a time 310 | while (count) 311 | { 312 | SI32_USBEP_A_write_fifo_u8(ep, *src); 313 | src++; 314 | count--; 315 | } 316 | return result; 317 | } 318 | 319 | 320 | //-eof-------------------------------------------------------------------------- 321 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myUSB0.h: -------------------------------------------------------------------------------- 1 | // Copyright (c) 2012 2 | 3 | #ifndef __MYUSB0_H__ 4 | #define __MYUSB0_H__ 5 | 6 | #include 7 | #include 8 | #include "si32Usb.h" 9 | 10 | // Defines 11 | enum // For UsbState 12 | { 13 | USB_DETACHED = 0, 14 | USB_ATTACHED, 15 | USB_POWERED, 16 | USB_DEFAULT, 17 | USB_ADDRESS, 18 | USB_CONFIGURED, 19 | USB_SUSPENDED, 20 | USB_MAX 21 | }; 22 | 23 | enum // For Ep0State 24 | { 25 | EP0_DISABLED = 0, 26 | EP0_WAIT_SETUP, 27 | EP0_PROCESS_SETUP, 28 | EP0_NODATA_STATUS, 29 | EP0_START_OUT_DATA, 30 | EP0_CONTINUE_OUT_DATA, 31 | EP0_OUT_STATUS, 32 | EP0_START_IN_DATA, 33 | EP0_CONTINUE_IN_DATA, 34 | EP0_IN_STATUS, 35 | EP0_SEND_STALL, 36 | EP0_HALT, 37 | EP0_MAX 38 | }; 39 | 40 | enum // For EPn State 41 | { 42 | EPN_DISABLED = 0, 43 | EPN_IDLE, 44 | EPN_BUSY, 45 | }; 46 | 47 | extern void USB0_connect(void); 48 | extern void USB0_disconnect(void); 49 | extern void USB0_start_of_frame_handler(void); 50 | extern void USB0_resume_handler(void); 51 | extern void USB0_reset_handler(void); 52 | extern void USB0_suspend_handler(void); 53 | extern void USB0_ep0_handler(void); 54 | extern void USB0_ep1_in_handler(void); 55 | 56 | extern uint32_t USB0_EP0_read_fifo(uint8_t * dst, uint32_t count); 57 | extern uint32_t USB0_EP0_write_fifo(uint8_t * src, uint32_t count); 58 | 59 | typedef struct SI32_USBEP_A_Struct SI32_USBEP_A_Type; 60 | extern void USB0_EPn_handler(SI32_USBEP_A_Type * basePointer); 61 | extern uint32_t USB0_EPn_read_fifo(SI32_USBEP_A_Type *ep, uint8_t * dst, uint32_t count); 62 | extern uint32_t USB0_EPn_write_fifo(SI32_USBEP_A_Type *ep, uint8_t * src, uint32_t count); 63 | 64 | // State variables 65 | extern volatile uint32_t myUSB0_sof_count; 66 | extern volatile uint32_t myUSB0_device_state; 67 | extern si32UsbSetupType myUSB0_setup; 68 | 69 | extern volatile uint32_t myUSB0_ep0_state; 70 | extern uint8_t * myUSB0_ep0_data_pointer; 71 | extern uint32_t myUSB0_ep0_data_size; 72 | 73 | extern volatile uint32_t myUSB0_ep1_state; 74 | extern uint8_t * myUSB0_ep1_data_pointer; 75 | extern uint32_t myUSB0_ep1_data_size; 76 | 77 | 78 | void UsbStateMachine(void); 79 | 80 | #ifndef DEBUG 81 | #define printf(...) 82 | #else 83 | #include 84 | #endif 85 | 86 | 87 | #endif //__MYUSB0_H__ 88 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myUsbDevice.c: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | //------------------------------------------------------------------------------ 11 | // Includes 12 | //------------------------------------------------------------------------------ 13 | 14 | #include 15 | #include 16 | #include 17 | 18 | #include "si32Usb.h" 19 | #include "myUsbDevice.h" 20 | #include "myUSB0.h" 21 | 22 | 23 | 24 | //----------------------------------------------------------------------------- 25 | // Descriptor Declarations 26 | //----------------------------------------------------------------------------- 27 | const uint8_t myUsbHidKeypadUsage[]= 28 | { 29 | 0x05, 0x01, // USAGE_PAGE (Generic Desktop) 30 | 0x09, 0x07, // USAGE (Keypad) 31 | 0xa1, 0x01, // COLLECTION (Application) 32 | 0x05, 0x07, // USAGE_PAGE (Keyboard) 33 | 0x19, 0x00, // USAGE_MINIMUM (Reserved (no event indicated)) 34 | 0x29, 0x65, // USAGE_MAXIMUM (Keyboard Application) 35 | 0x15, 0x00, // LOGICAL_MINIMUM (0) 36 | 0x25, 0x65, // LOGICAL_MAXIMUM (101) 37 | 0x75, 0x08, // REPORT_SIZE (8) 38 | 0x95, 0x01, // REPORT_COUNT (1) 39 | 0x81, 0x00, // INPUT (Data,Ary,Abs) 40 | 0xc0 41 | }; 42 | 43 | 44 | const si32UsbDeviceDescriptorType myUsbDeviceDescriptor = 45 | { 46 | .bLength = 0x12, 47 | .bDescriptorType = 0x01, 48 | .bcdUsb = 0x0200, // bcdUSB 49 | .bDeviceClass = 0x00, // bDeviceClass 50 | .bDeviceSubclass = 0x00, // bDeviceSubClass 51 | .bDeviceProtocol = 0x00, // bDeviceProtocol 52 | .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE, // bMaxPacketSize0 53 | .wIdVendor = 0xffff, // idVendor 54 | .wIdProduct = 0xfffe, // idProduct 55 | .bcdDevice = 0x0100, // bcdDevice 56 | .bIndexManufacturer = 0x00, // iManufacturer 57 | .bIndexProduct = 0x00, // iProduct 58 | .bIndexSerialNumber = 0x00, // iSerialNumber 59 | .bNumConfigurations = 0x01 // bNumConfigurations 60 | }; //end of DeviceDesc 61 | 62 | #define CONFIG_DESC_SIZE ( sizeof(myUsbConfigurationDescriptors) ) 63 | 64 | const myUsbConfigurationDescriptorsType myUsbConfigurationDescriptors = 65 | { 66 | .configuration.bLength = 9, 67 | .configuration.bDescriptorType = USB_DESCRIPTOR_TYPE_CONFIG, 68 | .configuration.wTotalLength = CONFIG_DESC_SIZE, 69 | .configuration.bNumInterfaces = 0x01, 70 | .configuration.bConfigurationValue = 1, // bConfigurationValue 71 | .configuration.bMaxPower = 50, // MaxPower (in 2mA units) 72 | .configuration.bIndexConfiguration = 0, // iConfiguration 73 | .configuration.bmAttributes = 0xC0, // bmAttributes 74 | 75 | .interface.bLength = 9, 76 | .interface.bDescriptorType = USB_DESCRIPTOR_TYPE_INTERFACE, 77 | .interface.bInterfaceNumber = 0x00, 78 | .interface.bAlternateSetting = 0x00, // bAlternateSetting 79 | .interface.bNumEndpoints = 0x01, 80 | .interface.bInterfaceClass = USB_HID, // bInterfaceClass 81 | .interface.bInterfaceSubClass = 0x00, // bInterfaceSubClass 82 | .interface.bInterfaceProtocol = 0x00, // bInterfaceProcotol 83 | .interface.iInterface = 0x00, // iInterface 84 | 85 | .hid.bLength = 9, // 6 + first 3 of the next descriptor 86 | .hid.bDescriptorType = USB_HID_TYPE, 87 | .hid.bcdHIDL = 0x0100, 88 | .hid.bCountryCode = 0, 89 | .hid.bNumDescriptors = 1, 90 | .hid.bReportDescriptorType = USB_HID_REPORT_TYPE, 91 | .hid.wItemLength = sizeof(myUsbHidKeypadUsage), 92 | 93 | .endpoint_interrupt_in_1.bLength = 7, 94 | .endpoint_interrupt_in_1.bDescriptorType = USB_DESCRIPTOR_TYPE_ENDPOINT, 95 | .endpoint_interrupt_in_1.bEndpointAddress = 0x81, // bEndpointAddress 96 | .endpoint_interrupt_in_1.Type = USB_EP_ATTRIBUTES_TYPE_INTERRUPT, // bmAttributes.type 97 | .endpoint_interrupt_in_1.wMaxPacketSize = 64, // MaxPacketSize Low 98 | .endpoint_interrupt_in_1.bInterval = 0x01 // bInterval 99 | }; 100 | 101 | 102 | 103 | 104 | //------------------------------------------------------------------------------ 105 | // From Hid Usage Table 1.1 106 | // http://www.usb.org/developers/devclass_docs/Hut1_11.pdf 107 | // Page 54,55 108 | // 109 | uint8_t s_KeyTable[17] = 110 | { // Keypad 0,1,2 111 | 0x62, 0x59, 0x5a, 112 | // 3,4,5 113 | 0x5b, 0x5c, 0x5d, 114 | // 6,7,8 115 | 0x5e, 0x5f, 0x60, 116 | // 9, '.' 117 | 0x61, 0x63, 118 | }; 119 | #pragma pack() 120 | 121 | 122 | //------------------------------------------------------------------------------ 123 | // Functions 124 | //------------------------------------------------------------------------------ 125 | 126 | //------------------------------------------------------------------------------ 127 | void myHidTransmitKey(int key_index) 128 | { 129 | if (myUSB0_ep1_state == EPN_DISABLED) 130 | return; 131 | 132 | while (myUSB0_ep1_state != EPN_IDLE) 133 | ; 134 | 135 | myUSB0_ep1_state = EPN_BUSY; 136 | USB0_EPn_write_fifo(SI32_USB_0_EP1, &s_KeyTable[key_index], 1); 137 | SI32_USBEP_A_set_in_packet_ready(SI32_USB_0_EP1); 138 | 139 | } 140 | 141 | 142 | //------------------------------------------------------------------------------ 143 | //------------------------------------------------------------------------------ 144 | void myUsbDevice_request_handler(void) 145 | { 146 | switch (myUSB0_setup.wRequest) 147 | { 148 | case USB_REQUEST_STANDARD_DEVICE_GET_DESCRIPTOR: // Support device, configuration, string 149 | if (myUSB0_setup.wValue == 0x0100) 150 | { 151 | myUSB0_ep0_data_pointer = (uint8_t *)&myUsbDeviceDescriptor; 152 | myUSB0_ep0_data_size = _min(myUSB0_setup.wValue, sizeof(myUsbDeviceDescriptor)); 153 | myUSB0_ep0_state = EP0_START_IN_DATA; 154 | } 155 | else if (myUSB0_setup.wValue == 0x0200) 156 | { 157 | myUSB0_ep0_data_pointer = (uint8_t *)&myUsbConfigurationDescriptors; 158 | myUSB0_ep0_data_size = _min(myUSB0_setup.wValue, sizeof(myUsbConfigurationDescriptors)); 159 | myUSB0_ep0_state = EP0_START_IN_DATA; 160 | } 161 | else 162 | { 163 | myUSB0_ep0_state = EP0_SEND_STALL; 164 | } 165 | break; 166 | 167 | case USB_REQUEST_STANDARD_DEVICE_SET_ADDRESS: 168 | SI32_USB_A_write_faddr(SI32_USB_0, (0x7F & myUSB0_setup.wValue)); 169 | myUSB0_ep0_state = EP0_NODATA_STATUS; 170 | break; 171 | 172 | case USB_REQUEST_STANDARD_DEVICE_SET_CONFIG: 173 | case USB_REQUEST_STANDARD_DEVICE_SET_INTERFACE: 174 | SI32_USBEP_A_set_endpoint_direction_in(SI32_USB_0_EP1); 175 | SI32_USBEP_A_clear_in_data_underrun(SI32_USB_0_EP1); 176 | SI32_USBEP_A_select_in_bulk_interrupt_mode(SI32_USB_0_EP1); 177 | SI32_USBEP_A_stop_in_stall(SI32_USB_0_EP1); 178 | SI32_USBEP_A_reset_in_data_toggle(SI32_USB_0_EP1); 179 | SI32_USBEP_A_set_in_max_packet_size(SI32_USB_0_EP1, 64>>3); 180 | SI32_USB_A_enable_ep1(SI32_USB_0); 181 | myUSB0_ep1_state=EPN_IDLE; 182 | myUSB0_ep0_state = EP0_NODATA_STATUS; 183 | break; 184 | 185 | 186 | case USB_REQUEST_STANDARD_INTERFACE_GET_DESCRIPTOR: 187 | if (myUSB0_setup.wValue == 0x2200) 188 | { 189 | myUSB0_ep0_data_pointer = (uint8_t *)&myUsbHidKeypadUsage; 190 | myUSB0_ep0_data_size = _min(myUSB0_setup.wValue, sizeof(myUsbHidKeypadUsage)); 191 | myUSB0_ep0_state = EP0_START_IN_DATA; 192 | break; 193 | } 194 | 195 | default: 196 | myUSB0_ep0_state = EP0_SEND_STALL; 197 | break; 198 | } 199 | } 200 | 201 | //-eof-------------------------------------------------------------------------- 202 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/myUsbDevice.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | 11 | #ifndef __myUsbDevice__ 12 | #define __myUsbDevice__ 13 | 14 | //------------------------------------------------------------------------------ 15 | // Includes 16 | //------------------------------------------------------------------------------ 17 | #include "si32Usb.h" 18 | #include "si32UsbHid.h" 19 | 20 | #define USB_VENDOR_ID_SILICON_LABS (0x10C4) 21 | #define USB_PRODUCT_ID__SI32_USBHID (0xff00) 22 | 23 | #pragma pack(1) 24 | typedef struct myUsbConfigurationDescriptorsStruct 25 | { 26 | si32UsbConfigurationDescriptorType configuration; 27 | si32UsbInterfaceDescriptorType interface; 28 | si32UsbHidDescriptorType hid; 29 | si32UsbEndpointDescriptorType endpoint_interrupt_in_1; 30 | } myUsbConfigurationDescriptorsType ; 31 | #pragma pack() 32 | 33 | //------------------------------------------------------------------------------ 34 | // Prototypes 35 | //------------------------------------------------------------------------------ 36 | extern void myUsbDevice_request_handler(void); 37 | extern void myHidTransmitKey(int key_index); 38 | 39 | extern const si32UsbDeviceDescriptorType myUsbDeviceDescriptor; 40 | extern const myUsbConfigurationDescriptorsType myUsbConfigurationDescriptors; 41 | extern const si32UsbHidReportDescriptorType myUsbHidReportDescriptor; 42 | extern const si32UsbHidDescriptorType myUsbHidDescriptor; 43 | extern const uint8_t myUsbHidKeypadUsage[]; 44 | 45 | #endif 46 | 47 | //-eof-------------------------------------------------------------------------- 48 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/si32UsbHid.h: -------------------------------------------------------------------------------- 1 | //------------------------------------------------------------------------------ 2 | // Copyright (c) 2012 by Silicon Laboratories. 3 | // All rights reserved. This program and the accompanying materials 4 | // are made available under the terms of the Silicon Laboratories End User 5 | // License Agreement which accompanies this distribution, and is available at 6 | // http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | // Original content and implementation provided by Silicon Laboratories. 8 | //------------------------------------------------------------------------------ 9 | 10 | #ifndef __si32UsbHID_h__ 11 | #define __si32UsbHID_h__ 12 | //------------------------------------------------------------------------------ 13 | //------------------------------------------------------------------------------ 14 | 15 | // HID Class Codes 16 | #define USB_HID (0x03) 17 | 18 | // HID Subclass Codes 19 | 20 | // HID Protocol Codes 21 | 22 | // HID Class-specific descriptor types 23 | #define USB_HID_TYPE 0x21 24 | #define USB_HID_REPORT_TYPE 0x22 25 | 26 | 27 | 28 | //----------------------------------------------------------------------------- 29 | // Standard Class Descriptor Type Definition 30 | //----------------------------------------------------------------------------- 31 | typedef struct si32UsbHidReportStruct 32 | { 33 | // Total length of report descriptor table Low Byte 34 | uint16_t wItemLength; 35 | // Report descriptor conents 36 | uint8_t * Descriptor; 37 | } si32UsbHidReportType; 38 | 39 | typedef struct si32UsbHidStruct 40 | { 41 | uint8_t bCountryCode; // Localized country code 42 | uint8_t bNumDescriptors; // Number of class descriptors to follow 43 | si32UsbHidReportType ** ReportDescriptors; 44 | } si32UsbHidType; 45 | 46 | #pragma pack(1) 47 | typedef struct si32UsbHidReportDescriptorStruct 48 | { 49 | // Report descriptor type (USB_HID_REPORT_TYPE=0x22) 50 | uint8_t bReportDescriptorType; 51 | // Total length of report descriptor table Low Byte 52 | uint16_t wItemLength; 53 | } si32UsbHidReportDescriptorType; 54 | 55 | typedef struct si32UsbHidDescriptorStruct 56 | { 57 | // Size of this Descriptor in Bytes (=9) (6 + 3 of first report descriptor 58 | uint8_t bLength; 59 | // Descriptor Type ( USB_HID_TYPE = 0x21) 60 | uint8_t bDescriptorType; 61 | // HID Class Specification release number Low Byte 62 | uint16_t bcdHIDL; 63 | // Localized country code 64 | uint8_t bCountryCode; 65 | // Number of class descriptors to follow 66 | uint8_t bNumDescriptors; 67 | // ------------------------------------------------- // 68 | // Report descriptor type (USB_HID_REPORT_TYPE=0x22) 69 | uint8_t bReportDescriptorType; 70 | // Total length of report descriptor table Low Byte 71 | uint16_t wItemLength; 72 | } si32UsbHidDescriptorType; 73 | 74 | 75 | #pragma pack() 76 | 77 | 78 | // HID Request Codes 79 | #define USBHID_GET_REPORT 0x01 80 | #define USBHID_GET_IDLE 0x02 81 | #define USBHID_GET_PROTOCOL 0x03 82 | #define USBHID_SET_REPORT 0x09 83 | #define USBHID_SET_IDLE 0x0A 84 | #define USBHID_SET_PROTOCOL 0x0B 85 | 86 | // HID Class Requests 87 | #define USBHID_IFC_GET_REPORT USB_REQUEST_CODE(USB_REQUEST_DIRECTION_IN, USB_REQUEST_TYPE_CLASS, USB_REQUEST_RECIPIENT_INTERFACE, USBHID_GET_REPORT) 88 | #define USBHID_IFC_SET_REPORT USB_REQUEST_CODE(USB_REQUEST_DIRECTION_OUT, USB_REQUEST_TYPE_CLASS, USB_REQUEST_RECIPIENT_INTERFACE, USBHID_SET_REPORT) 89 | #define USBHID_IFC_GET_IDLE USB_REQUEST_CODE(USB_REQUEST_DIRECTION_IN, USB_REQUEST_TYPE_CLASS, USB_REQUEST_RECIPIENT_INTERFACE, USBHID_GET_IDLE) 90 | #define USBHID_IFC_SET_IDLE USB_REQUEST_CODE(USB_REQUEST_DIRECTION_OUT, USB_REQUEST_TYPE_CLASS, USB_REQUEST_RECIPIENT_INTERFACE, USBHID_SET_IDLE) 91 | #define USBHID_IFC_GET_PROTOCOL USB_REQUEST_CODE(USB_REQUEST_DIRECTION_IN, USB_REQUEST_TYPE_CLASS, USB_REQUEST_RECIPIENT_INTERFACE, USBHID_GET_PROTOCOL) 92 | 93 | // USBHID Specific Request Formats 94 | typedef struct si32UsbHidRequestStruct 95 | { 96 | union 97 | { 98 | si32UsbSetupType Setup; 99 | struct si32UsbHidGetReportRequest 100 | { 101 | // wRequest Code 102 | uint16_t wRequest; 103 | // wValue decoded 104 | uint16_t wValueLo :8; 105 | uint16_t wValueHi :8; 106 | // wIndex 107 | uint8_t wIndexLo; 108 | uint8_t wIndexHi; 109 | // wlength 110 | uint16_t wLength; 111 | } HidRequestStruct; 112 | }; 113 | } si32UsbHidRequestType; 114 | #endif // __si32UsbHID_h__ 115 | 116 | //-eof-------------------------------------------------------------------------- 117 | -------------------------------------------------------------------------------- /Example/sim3u1xx_USBHID/src/startup_sim3u1xx_p32.c: -------------------------------------------------------------------------------- 1 | //***************************************************************************** 2 | // +--+ 3 | // | ++----+ 4 | // +-++ | 5 | // | | 6 | // +-+--+ | 7 | // | +--+--+ 8 | // +----+ Copyright (c) 2011 Code Red Technologies Ltd. 9 | // 10 | // Microcontroller Startup code for use with Red Suite 11 | // 12 | // Version : 110815 13 | // 14 | // Software License Agreement 15 | // 16 | // The software is owned by Code Red Technologies and/or its suppliers, and is 17 | // protected under applicable copyright laws. All rights are reserved. Any 18 | // use in violation of the foregoing restrictions may subject the user to criminal 19 | // sanctions under applicable laws, as well as to civil liability for the breach 20 | // of the terms and conditions of this license. 21 | // 22 | // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED 23 | // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF 24 | // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. 25 | // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT 26 | // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH 27 | // CODE RED TECHNOLOGIES LTD. 28 | // 29 | //***************************************************************************** 30 | #if defined (__cplusplus) 31 | #ifdef __REDLIB__ 32 | #error Redlib does not support C++ 33 | #else 34 | //***************************************************************************** 35 | // 36 | // The entry point for the C++ library startup 37 | // 38 | //***************************************************************************** 39 | extern "C" { 40 | extern void __libc_init_array(void); 41 | } 42 | #endif 43 | #endif 44 | 45 | #define WEAK __attribute__ ((weak)) 46 | #define ALIAS(f) __attribute__ ((weak, alias (#f))) 47 | 48 | // Code Red - if CMSIS is being used, then SystemInit() routine 49 | // will be called by startup code rather than in application's main() 50 | #if defined (__USE_CMSIS) 51 | #include "sim3u1xx.h" 52 | #endif 53 | 54 | //***************************************************************************** 55 | #if defined (__cplusplus) 56 | extern "C" { 57 | #endif 58 | 59 | //***************************************************************************** 60 | // 61 | // Forward declaration of the default handlers. These are aliased. 62 | // When the application defines a handler (with the same name), this will 63 | // automatically take precedence over these weak definitions 64 | // 65 | //***************************************************************************** 66 | void ResetISR(void); 67 | WEAK void NMI_Handler(void); 68 | WEAK void HardFault_Handler(void); 69 | WEAK void MemManage_Handler(void); 70 | WEAK void BusFault_Handler(void); 71 | WEAK void UsageFault_Handler(void); 72 | WEAK void SVCall_Handler(void); 73 | WEAK void DebugMon_Handler(void); 74 | WEAK void PendSV_Handler(void); 75 | WEAK void SysTick_Handler(void); 76 | WEAK void IntDefaultHandler(void); 77 | 78 | //***************************************************************************** 79 | // 80 | // Forward declaration of the specific IRQ handlers. These are aliased 81 | // to the IntDefaultHandler, which is a 'forever' loop. When the application 82 | // defines a handler (with the same name), this will automatically take 83 | // precedence over these weak definitions 84 | // 85 | //***************************************************************************** 86 | 87 | void WDTIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); 88 | void PBEXT0_IRQHandler(void) ALIAS(IntDefaultHandler); 89 | void PBEXT1_IRQHandler(void) ALIAS(IntDefaultHandler); 90 | void RTC0ALRM_IRQHandler(void) ALIAS(IntDefaultHandler); 91 | void DMACH0_IRQHandler(void) ALIAS(IntDefaultHandler); 92 | void DMACH1_IRQHandler(void) ALIAS(IntDefaultHandler); 93 | void DMACH2_IRQHandler(void) ALIAS(IntDefaultHandler); 94 | void DMACH3_IRQHandler(void) ALIAS(IntDefaultHandler); 95 | void DMACH4_IRQHandler(void) ALIAS(IntDefaultHandler); 96 | void DMACH5_IRQHandler(void) ALIAS(IntDefaultHandler); 97 | void DMACH6_IRQHandler(void) ALIAS(IntDefaultHandler); 98 | void DMACH7_IRQHandler(void) ALIAS(IntDefaultHandler); 99 | void DMACH8_IRQHandler(void) ALIAS(IntDefaultHandler); 100 | void DMACH9_IRQHandler(void) ALIAS(IntDefaultHandler); 101 | void DMACH10_IRQHandler(void) ALIAS(IntDefaultHandler); 102 | void DMACH11_IRQHandler(void) ALIAS(IntDefaultHandler); 103 | void DMACH12_IRQHandler(void) ALIAS(IntDefaultHandler); 104 | void DMACH13_IRQHandler(void) ALIAS(IntDefaultHandler); 105 | void DMACH14_IRQHandler(void) ALIAS(IntDefaultHandler); 106 | void DMACH15_IRQHandler(void) ALIAS(IntDefaultHandler); 107 | void TIMER0L_IRQHandler(void) ALIAS(IntDefaultHandler); 108 | void TIMER0H_IRQHandler(void) ALIAS(IntDefaultHandler); 109 | void TIMER1L_IRQHandler(void) ALIAS(IntDefaultHandler); 110 | void TIMER1H_IRQHandler(void) ALIAS(IntDefaultHandler); 111 | void EPCA0_IRQHandler(void) ALIAS(IntDefaultHandler); 112 | void PCA0_IRQHandler(void) ALIAS(IntDefaultHandler); 113 | void PCA1_IRQHandler(void) ALIAS(IntDefaultHandler); 114 | void USART0_IRQHandler(void) ALIAS(IntDefaultHandler); 115 | void USART1_IRQHandler(void) ALIAS(IntDefaultHandler); 116 | void SPI0_IRQHandler(void) ALIAS(IntDefaultHandler); 117 | void SPI1_IRQHandler(void) ALIAS(IntDefaultHandler); 118 | void SPI2_IRQHandler(void) ALIAS(IntDefaultHandler); 119 | void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); 120 | void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); 121 | void USB0_IRQHandler(void) ALIAS(IntDefaultHandler); 122 | void SARADC0_IRQHandler(void) ALIAS(IntDefaultHandler); 123 | void SARADC1_IRQHandler(void) ALIAS(IntDefaultHandler); 124 | void CMP0_IRQHandler(void) ALIAS(IntDefaultHandler); 125 | void CMP1_IRQHandler(void) ALIAS(IntDefaultHandler); 126 | void CAPSENSE0_IRQHandler(void) ALIAS(IntDefaultHandler); 127 | void I2S0RX_IRQHandler(void) ALIAS(IntDefaultHandler); 128 | void I2S0TX_IRQHandler(void) ALIAS(IntDefaultHandler); 129 | void AES0_IRQHandler(void) ALIAS(IntDefaultHandler); 130 | void VDDLOW_IRQHandler(void) ALIAS(IntDefaultHandler); 131 | void RTC0FAIL_IRQHandler(void) ALIAS(IntDefaultHandler); 132 | void PMATCH_IRQHandler(void) ALIAS(IntDefaultHandler); 133 | void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); 134 | void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); 135 | void IDAC0_IRQHandler(void) ALIAS(IntDefaultHandler); 136 | void IDAC1_IRQHandler(void) ALIAS(IntDefaultHandler); 137 | void LPTIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); 138 | void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler); 139 | void VBUSINVALID_IRQHandler(void) ALIAS(IntDefaultHandler); 140 | void VREG0LOW_IRQHandler(void) ALIAS(IntDefaultHandler); 141 | 142 | 143 | //***************************************************************************** 144 | // 145 | // The entry point for the application. 146 | // __main() is the entry point for Redlib based applications 147 | // main() is the entry point for Newlib based applications 148 | // 149 | //***************************************************************************** 150 | #if defined (__REDLIB__) 151 | extern void __main(void); 152 | #endif 153 | extern int main(void); 154 | //***************************************************************************** 155 | // 156 | // External declaration for the pointer to the stack top from the Linker Script 157 | // 158 | //***************************************************************************** 159 | extern void _vStackTop(void); 160 | 161 | //***************************************************************************** 162 | #if defined (__cplusplus) 163 | } // extern "C" 164 | #endif 165 | //***************************************************************************** 166 | // 167 | // The vector table. 168 | // This relies on the linker script to place at correct location in memory. 169 | // 170 | //***************************************************************************** 171 | extern void (* const g_pfnVectors[])(void); 172 | __attribute__ ((section(".isr_vector"))) 173 | void (* const g_pfnVectors[])(void) = { 174 | // Core Level - CM3 175 | &_vStackTop, // The initial stack pointer 176 | ResetISR, // The reset handler 177 | NMI_Handler, // The NMI handler 178 | HardFault_Handler, // The hard fault handler 179 | MemManage_Handler, // The MPU fault handler 180 | BusFault_Handler, // The bus fault handler 181 | UsageFault_Handler, // The usage fault handler 182 | 0, // Reserved 183 | 0, // Reserved 184 | 0, // Reserved 185 | 0, // Reserved 186 | SVCall_Handler, // SVCall handler 187 | DebugMon_Handler, // Debug monitor handler 188 | 0, // Reserved 189 | PendSV_Handler, // The PendSV handler 190 | SysTick_Handler, // The SysTick handler 191 | 192 | // Chip Level - Si3MU1xx 193 | WDTIMER0_IRQHandler, // Watchdog Timer 0 194 | PBEXT0_IRQHandler, // External interrupt 0 195 | PBEXT1_IRQHandler, // External interrupt 1 196 | RTC0ALRM_IRQHandler, // RTC Alarm 197 | DMACH0_IRQHandler, // DMA Channel 0 198 | DMACH1_IRQHandler, // DMA Channel 1 199 | DMACH2_IRQHandler, // DMA Channel 2 200 | DMACH3_IRQHandler, // DMA Channel 3 201 | DMACH4_IRQHandler, // DMA Channel 4 202 | DMACH5_IRQHandler, // DMA Channel 5 203 | DMACH6_IRQHandler, // DMA Channel 6 204 | DMACH7_IRQHandler, // DMA Channel 7 205 | DMACH8_IRQHandler, // DMA Channel 8 206 | DMACH9_IRQHandler, // DMA Channel 9 207 | DMACH10_IRQHandler, // DMA Channel 10 208 | DMACH11_IRQHandler, // DMA Channel 11 209 | DMACH12_IRQHandler, // DMA Channel 12 210 | DMACH13_IRQHandler, // DMA Channel 13 211 | DMACH14_IRQHandler, // DMA Channel 14 212 | DMACH15_IRQHandler, // DMA Channel 15 213 | TIMER0L_IRQHandler, // Timer 0 Low (16 bits only) 214 | TIMER0H_IRQHandler, // Timer 0 High (16 or 32 bits) 215 | TIMER1L_IRQHandler, // Timer 1 Low (16 bits only) 216 | TIMER1H_IRQHandler, // Timer 1 High (16 or 32 bits) 217 | EPCA0_IRQHandler, // EPCA 0 Capture Compare (any channel) 218 | PCA0_IRQHandler, // PCA 0 Capture Compare (any channel) 219 | PCA1_IRQHandler, // PCA 1 Capture Compare (any channel) 220 | USART0_IRQHandler, // USART 0 221 | USART1_IRQHandler, // USART 1 222 | SPI0_IRQHandler, // SPI 0 223 | SPI1_IRQHandler, // SPI 1 224 | SPI2_IRQHandler, // SPI 2 225 | I2C0_IRQHandler, // I2C 0 226 | I2C1_IRQHandler, // I2C 1 227 | USB0_IRQHandler, // USB 0 228 | SARADC0_IRQHandler, // ADC 0 229 | SARADC1_IRQHandler, // ADC 1 230 | CMP0_IRQHandler, // Comparator 0 231 | CMP1_IRQHandler, // Comparator 1 232 | CAPSENSE0_IRQHandler, // CapSense 0 233 | I2S0RX_IRQHandler, // I2S 0 Receive 234 | I2S0TX_IRQHandler, // I2S 0 Transmit 235 | AES0_IRQHandler, // AES 0 236 | VDDLOW_IRQHandler, // VDD low 237 | RTC0FAIL_IRQHandler, // RTC failure 238 | PMATCH_IRQHandler, // Port Match 239 | UART0_IRQHandler, // UART 0 240 | UART1_IRQHandler, // UART 1 241 | IDAC0_IRQHandler, // IDAC 0 242 | IDAC1_IRQHandler, // IDAC 1 243 | LPTIMER0_IRQHandler, // Low-Power Timer 244 | PLL0_IRQHandler, // Phase-Locked Loop 245 | VBUSINVALID_IRQHandler, // VBUS Invalid 246 | VREG0LOW_IRQHandler, // Voltage Regulator / 4 247 | }; 248 | 249 | //***************************************************************************** 250 | // Functions to carry out the initialization of RW and BSS data sections. These 251 | // are written as separate functions rather than being inlined within the 252 | // ResetISR() function in order to cope with MCUs with multiple banks of 253 | // memory. 254 | //***************************************************************************** 255 | __attribute__ ((section(".after_vectors"))) 256 | void data_init(unsigned int romstart, unsigned int start, unsigned int len) { 257 | unsigned int *pulDest = (unsigned int*) start; 258 | unsigned int *pulSrc = (unsigned int*) romstart; 259 | unsigned int loop; 260 | for (loop = 0; loop < len; loop = loop + 4) 261 | *pulDest++ = *pulSrc++; 262 | } 263 | 264 | __attribute__ ((section(".after_vectors"))) 265 | void bss_init(unsigned int start, unsigned int len) { 266 | unsigned int *pulDest = (unsigned int*) start; 267 | unsigned int loop; 268 | for (loop = 0; loop < len; loop = loop + 4) 269 | *pulDest++ = 0; 270 | } 271 | 272 | //***************************************************************************** 273 | // The following symbols are constructs generated by the linker, indicating 274 | // the location of various points in the "Global Section Table". This table is 275 | // created by the linker via the Code Red managed linker script mechanism. It 276 | // contains the load address, execution address and length of each RW data 277 | // section and the execution and length of each BSS (zero initialized) section. 278 | //***************************************************************************** 279 | extern unsigned int __data_section_table; 280 | extern unsigned int __data_section_table_end; 281 | extern unsigned int __bss_section_table; 282 | extern unsigned int __bss_section_table_end; 283 | 284 | __attribute__ ((section(".after_vectors"))) 285 | void 286 | ResetISR(void) { 287 | 288 | // 289 | // Copy the data sections from flash to SRAM. 290 | // 291 | unsigned int LoadAddr, ExeAddr, SectionLen; 292 | unsigned int *SectionTableAddr; 293 | 294 | // Load base address of Global Section Table 295 | SectionTableAddr = &__data_section_table; 296 | 297 | // Copy the data sections from flash to SRAM. 298 | while (SectionTableAddr < &__data_section_table_end) { 299 | LoadAddr = *SectionTableAddr++; 300 | ExeAddr = *SectionTableAddr++; 301 | SectionLen = *SectionTableAddr++; 302 | // data_init(LoadAddr, ExeAddr, SectionLen); 303 | } 304 | // At this point, SectionTableAddr = &__bss_section_table; 305 | // Zero fill the bss segment 306 | while (SectionTableAddr < &__bss_section_table_end) { 307 | ExeAddr = *SectionTableAddr++; 308 | SectionLen = *SectionTableAddr++; 309 | bss_init(ExeAddr, SectionLen); 310 | } 311 | 312 | #ifdef __USE_CMSIS 313 | SystemInit(); 314 | #endif 315 | 316 | #if defined (__cplusplus) 317 | // 318 | // Call C++ library initialisation 319 | // 320 | __libc_init_array(); 321 | #endif 322 | 323 | #if defined (__REDLIB__) 324 | // Call the Redlib library, which in turn calls main() 325 | __main() ; 326 | #else 327 | main(); 328 | #endif 329 | 330 | // 331 | // main() shouldn't return, but if it does, we'll just enter an infinite loop 332 | // 333 | while (1) { 334 | ; 335 | } 336 | } 337 | 338 | //***************************************************************************** 339 | // Default exception handlers. Override the ones here by defining your own 340 | // handler routines in your application code. 341 | //***************************************************************************** 342 | __attribute__ ((section(".after_vectors"))) 343 | void NMI_Handler(void) 344 | { 345 | while(1) 346 | { 347 | } 348 | } 349 | __attribute__ ((section(".after_vectors"))) 350 | void HardFault_Handler(void) 351 | { 352 | while(1) 353 | { 354 | } 355 | } 356 | __attribute__ ((section(".after_vectors"))) 357 | void MemManage_Handler(void) 358 | { 359 | while(1) 360 | { 361 | } 362 | } 363 | __attribute__ ((section(".after_vectors"))) 364 | void BusFault_Handler(void) 365 | { 366 | while(1) 367 | { 368 | } 369 | } 370 | __attribute__ ((section(".after_vectors"))) 371 | void UsageFault_Handler(void) 372 | { 373 | while(1) 374 | { 375 | } 376 | } 377 | __attribute__ ((section(".after_vectors"))) 378 | void SVCall_Handler(void) 379 | { 380 | while(1) 381 | { 382 | } 383 | } 384 | __attribute__ ((section(".after_vectors"))) 385 | void DebugMon_Handler(void) 386 | { 387 | while(1) 388 | { 389 | } 390 | } 391 | __attribute__ ((section(".after_vectors"))) 392 | void PendSV_Handler(void) 393 | { 394 | while(1) 395 | { 396 | } 397 | } 398 | __attribute__ ((section(".after_vectors"))) 399 | void SysTick_Handler(void) 400 | { 401 | while(1) 402 | { 403 | } 404 | } 405 | 406 | //***************************************************************************** 407 | // 408 | // Processor ends up here if an unexpected interrupt occurs or a specific 409 | // handler is not present in the application code. 410 | // 411 | //***************************************************************************** 412 | __attribute__ ((section(".after_vectors"))) 413 | void IntDefaultHandler(void) 414 | { 415 | while(1) 416 | { 417 | } 418 | } 419 | -------------------------------------------------------------------------------- /High_Level/src/adi.py: -------------------------------------------------------------------------------- 1 | 2 | ## Copyright (c) 2012-2013 by Silicon Laboratories. 3 | ## All rights reserved. This program and the accompanying materials 4 | ## are made available under the terms of the Silicon Laboratories End User 5 | ## License Agreement which accompanies this distribution, and is available at 6 | ## http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | ## Original content and implementation provided by Silicon Laboratories. 8 | 9 | """ 10 | Python wrapper for Silabs 32-bit debug adapter library (SLAB_ADI.dll). 11 | 12 | Documentation for the library is provided by the help file SLAB_ADI.chm. 13 | 14 | ADI - ARM Debug Interface. 15 | """ 16 | 17 | import ctypes 18 | 19 | __version__ = "0.0.4" 20 | __date__ = "28 Nov 2012" 21 | 22 | __all__ = ['ADI_VID', 'ADI_PID', 23 | 'ADI_DEVICE_MODE', 'ADI_DAP', 'ADI_PROP_ID', 'ADI_STATUS_DESC', 24 | 'AdiDevice', 'AdiError', 'GetNumDevices', 'GetSerial', 'GetAttributes', 25 | 'GetHidLibraryVersion', 'GetLibraryVersion', 'IsAvailable', 26 | 'GetDeviceFilter', 'SetDeviceFilter', 27 | 'GetDeviceFilterEnable', 'SetDeviceFilterEnable'] 28 | 29 | 30 | #============================================================================== 31 | # Constants 32 | #============================================================================== 33 | 34 | class ADI_VID: 35 | SLAB = 0x10C4 36 | 37 | class ADI_PID: 38 | UDA = 0x8045 39 | TS = 0x8253 40 | 41 | class ADI_DEVICE_MODE: 42 | BOOTLOAD = 0x01 43 | DEBUG_8051 = 0x02 44 | DEBUG_ARM = 0x03 45 | 46 | class ADI_PROP_ID: 47 | RST = 0x01 48 | LED = 0x02 49 | 50 | class ADI_DAP: 51 | IDCODE = 0x00 52 | CTRLSTAT = 0x04 53 | SELECT = 0x08 54 | CSW = 0x01 55 | TAR = 0x05 56 | DRW = 0x0D 57 | BD0 = 0x01 58 | BD1 = 0x05 59 | BD2 = 0x09 60 | BD3 = 0x0D 61 | 62 | 63 | #============================================================================== 64 | # Error Handling 65 | #============================================================================== 66 | 67 | ADI_STATUS_DESC = { 68 | 0x01 : "ADI_STATUS_PROT_INVALID_COMMAND", 69 | 0x02 : "ADI_STATUS_PROT_COMMAND_FAILED", 70 | 0x03 : "ADI_STATUS_PROT_AP_TIMEOUT", 71 | 0x04 : "ADI_STATUS_PROT_WIRE_ERROR", 72 | 0x05 : "ADI_STATUS_PROT_ACK_FAULT", 73 | 0x06 : "ADI_STATUS_PROT_DP_NOT_CONNECTED", 74 | 0x40 : "ADI_STATUS_API_INVALID_PARAMETER", 75 | 0x41 : "ADI_STATUS_API_INVALID_BUFFER_SIZE", 76 | 0x42 : "ADI_STATUS_API_NOT_SUPPORTED", 77 | 0x43 : "ADI_STATUS_API_NOT_IN_BOOTLOAD_MODE", 78 | 0x44 : "ADI_STATUS_API_NOT_IN_DEBUG_MODE", 79 | 0x45 : "ADI_STATUS_API_NOT_IN_ARM_DEBUG_MODE", 80 | 0x46 : "ADI_STATUS_API_FAILED_TO_ENTER_MODE", 81 | 0x47 : "ADI_STATUS_API_INVALID_TRANSFER", 82 | 0x48 : "ADI_STATUS_API_INVALID_HEX_CHECKSUM", 83 | 0x49 : "ADI_STATUS_API_INVALID_HEX_RECORD", 84 | 0x4A : "ADI_STATUS_API_INVALID_HEX_FILE", 85 | 0x4B : "ADI_STATUS_API_INVALID_DEVICE_OBJECT", 86 | 0x4C : "ADI_STATUS_API_FATAL_ERROR", 87 | 0x4D : "ADI_STATUS_API_ABORTED", 88 | 0x4E : "ADI_STATUS_API_FW_UPGRADE_REQUIRED", 89 | 0x4F : "ADI_STATUS_API_NOT_CONNECTED_TO_TARGET", 90 | 0x50 : "ADI_STATUS_API_TARGET_MUST_BE_HALTED", 91 | 0x51 : "ADI_STATUS_API_FLASH_VERIFY_FAILED", 92 | 0x80 : "ADI_STATUS_HWIF_DEVICE_NOT_FOUND", 93 | 0x81 : "ADI_STATUS_HWIF_DEVICE_NOT_OPENED", 94 | 0x82 : "ADI_STATUS_HWIF_DEVICE_ERROR", 95 | 0x83 : "ADI_STATUS_HWIF_TRANSFER_ERROR", 96 | 0x84 : "ADI_STATUS_HWIF_TRANSFER_TIMEOUT", 97 | 0xC0 : "ADI_STATUS_SYS_INVALID_RESPONSE", 98 | 0xC1 : "ADI_STATUS_SYS_FLASH_WRITE_CRC_ERROR", 99 | 0xC2 : "ADI_STATUS_SYS_RE_ENUMERATE_DEVICE", 100 | } 101 | 102 | class AdiError(Exception): 103 | def __init__(self, status): 104 | self.status = status 105 | try: 106 | self.name = ADI_STATUS_DESC[status] 107 | except: 108 | self.name = "ADI_STATUS_UNKNOWN: " + hex(status) 109 | def __str__(self): 110 | return self.name 111 | 112 | def adi_errcheck(result, func, args): 113 | if result != 0: 114 | raise AdiError(result) 115 | 116 | 117 | #============================================================================== 118 | # ARM Debug Interface DLL 119 | #============================================================================== 120 | 121 | _DLL = ctypes.windll.LoadLibrary("SLAB_ADI.dll") 122 | 123 | _DLL.ADI_IsOpened.restype = ctypes.c_bool 124 | _DLL.ADI_DBG_IsConnected.restype = ctypes.c_bool 125 | 126 | for adi_function in ["ADI_GetNumDevices", 127 | "ADI_GetAttributes", "ADI_GetSerial", 128 | "ADI_GetDeviceFilter", "ADI_SetDeviceFilter", 129 | "ADI_GetDeviceFilterEnable", "ADI_SetDeviceFilterEnable", 130 | "ADI_GetHidLibraryVersion", "ADI_GetLibraryVersion", 131 | "ADI_GetBootloaderVersion", "ADI_DBG_GetDebugVersion", 132 | "ADI_OpenByIndex", "ADI_Close", 133 | "ADI_GetOpenedAttributes", "ADI_GetOpenedSerial", 134 | "ADI_DBG_ConnectJtag", "ADI_DBG_ConnectSwd", "ADI_DBG_Disconnect", 135 | "ADI_GetDeviceMode", "ADI_SetDeviceMode", 136 | "ADI_DBG_GetProperty", "ADI_DBG_SetProperty", 137 | "ADI_DBG_ClearErrors", "ADI_DBG_LineReset", 138 | "ADI_DBG_QueueRead", "ADI_DBG_QueueWrite", 139 | "ADI_DBG_RepeatRead", "ADI_DBG_RepeatWrite", 140 | "ADI_DBG_StartTransfers", "ADI_BL_DownloadHexFile"]: 141 | fnc = getattr(_DLL, adi_function) 142 | fnc.restype = ctypes.c_ubyte 143 | fnc.errcheck = adi_errcheck 144 | 145 | 146 | #============================================================================== 147 | # Library Functions 148 | #============================================================================== 149 | 150 | def GetNumDevices(): 151 | """Returns the number of debug adapters connected to the host.""" 152 | cnt = ctypes.c_ulong() 153 | _DLL.ADI_GetNumDevices(ctypes.byref(cnt)) 154 | return cnt.value 155 | 156 | def GetSerial(index=0): 157 | """Returns the serial number string for the debug adapter selected by index. 158 | Throws an error if the selected index is already open. 159 | """ 160 | buf = ctypes.create_string_buffer(512) 161 | _DLL.ADI_GetSerial(index, buf) 162 | return buf.value.decode() 163 | 164 | def GetAttributes(index=0): 165 | """Returns VID, PID and release number for the debug adapter selected by index. 166 | Throws an error if the selected index is already open. 167 | """ 168 | vid = ctypes.c_ulong() 169 | pid = ctypes.c_ulong() 170 | rel = ctypes.c_ulong() 171 | _DLL.ADI_GetAttributes(index, ctypes.byref(vid), ctypes.byref(pid), ctypes.byref(rel)) 172 | return tuple([vid.value, pid.value, rel.value]) 173 | 174 | def IsAvailable(index=0, arm_only=True): 175 | """Checks if the debug adapter selected by index is available. 176 | 177 | :param arm_only: if True, only checks for 32-bit adapters 178 | """ 179 | result = True 180 | handle = ctypes.c_int(0) 181 | try: 182 | _DLL.ADI_OpenByIndex(ctypes.byref(handle), index) 183 | if arm_only: 184 | _DLL.ADI_SetDeviceMode(handle, ADI_DEVICE_MODE.DEBUG_ARM) 185 | except AdiError: 186 | result = False 187 | if handle.value: 188 | _DLL.ADI_Close(handle) 189 | return result 190 | 191 | def GetLibraryVersion(): 192 | """Returns the SLAB_ADI library version number as a string.""" 193 | major = ctypes.c_ulong() 194 | minor = ctypes.c_ulong() 195 | release = ctypes.c_ulong() 196 | _DLL.ADI_GetLibraryVersion(ctypes.byref(major), ctypes.byref(minor), ctypes.byref(release)) 197 | return "{}.{}.{}".format(major.value, minor.value, release.value) 198 | 199 | def GetHidLibraryVersion(): 200 | """Returns the SLABHIDDevice library version number as a string.""" 201 | major = ctypes.c_ulong() 202 | minor = ctypes.c_ulong() 203 | release = ctypes.c_ulong() 204 | _DLL.ADI_GetHidLibraryVersion(ctypes.byref(major), ctypes.byref(minor), ctypes.byref(release)) 205 | return "{}.{}.{}".format(major.value, minor.value, release.value) 206 | 207 | def GetDeviceFilter(): 208 | """Returns (VID, PID) used when the device filter is enabled.""" 209 | vid = ctypes.c_ulong() 210 | pid = ctypes.c_ulong() 211 | _DLL.ADI_GetDeviceFilter(ctypes.byref(vid), ctypes.byref(pid)) 212 | return tuple([vid.value, pid.value]) 213 | 214 | def SetDeviceFilter(vid=ADI_VID.SLAB, pid=ADI_PID.UDA): 215 | """Sets (VID, PID) used when the device filter is enabled.""" 216 | _DLL.ADI_SetDeviceFilter(vid, pid) 217 | 218 | def GetDeviceFilterEnable(): 219 | """Returns enable status of the device filter.""" 220 | filter = ctypes.c_bool() 221 | _DLL.ADI_GetDeviceFilterEnable(ctypes.byref(filter)) 222 | return filter.value 223 | 224 | def SetDeviceFilterEnable(filter=True): 225 | """Enables or disables the device filter.""" 226 | _DLL.ADI_SetDeviceFilterEnable(filter) 227 | 228 | 229 | #============================================================================== 230 | # Debug Adapter Class 231 | #============================================================================== 232 | 233 | class AdiDevice: 234 | """ 235 | AdiDevice instances are used to work with a specific debug adapter. 236 | 237 | For documentation on the wrapped functions, refer to the help file SLAB_ADI.chm. 238 | """ 239 | 240 | def __init__(self, index=None): 241 | self.handle = ctypes.c_int(0) 242 | self.idcode = 0 243 | GetNumDevices() 244 | 245 | def __str__(self): 246 | return "AdiDevice Hnd:"+hex(self.handle.value)+" Id:"+hex(self.idcode) 247 | 248 | @property 249 | def vid_pid(self): 250 | vid = ctypes.c_ulong(0) 251 | pid = ctypes.c_ulong(0) 252 | rel = ctypes.c_ulong(0) 253 | if self.IsOpened(): 254 | _DLL.ADI_GetOpenedAttributes(self.handle, ctypes.byref(vid), ctypes.byref(pid), ctypes.byref(rel)) 255 | return tuple([vid.value, pid.value]) 256 | 257 | @property 258 | def serial_number(self): 259 | buf = ctypes.create_string_buffer(512) 260 | if self.IsOpened(): 261 | _DLL.ADI_GetOpenedSerial(self.handle, buf) 262 | return buf.value.decode() 263 | 264 | @property 265 | def bootload_version(self): 266 | version = ctypes.c_ulong(0) 267 | if self.IsOpened(): 268 | _DLL.ADI_GetBootloaderVersion(self.handle, ctypes.byref(version)) 269 | return version.value 270 | 271 | @property 272 | def firmware_version(self): 273 | version = ctypes.c_ulong(0) 274 | try: 275 | _DLL.ADI_DBG_GetDebugVersion(self.handle, ctypes.byref(version)) 276 | except AdiError: 277 | pass 278 | return version.value 279 | 280 | def OpenByIndex(self, index, debug=True): 281 | """Trys to open adapter selected by the driver index. 282 | 283 | :param debug: if True, starts ARM debug firmware 284 | """ 285 | if self.IsOpened(): 286 | self.Close() 287 | try: 288 | # throws error if index is already open 289 | _DLL.ADI_OpenByIndex(ctypes.byref(self.handle), index) 290 | if debug: 291 | # throws error if device has 8-bit debug firmware 292 | _DLL.ADI_SetDeviceMode(self.handle, ADI_DEVICE_MODE.DEBUG_ARM) 293 | except AdiError: 294 | if self.IsOpened(): 295 | _DLL.ADI_Close(self.handle) 296 | self.handle.value = 0 297 | raise 298 | 299 | def OpenBySerial(self, serial, debug=True): 300 | """Trys to open adapter with the specified serial number. 301 | 302 | :param debug: if True, starts ARM debug firmware 303 | """ 304 | for i in range(GetNumDevices()): 305 | try: 306 | sn = GetSerial(i) 307 | except AdiError: 308 | continue 309 | if sn == serial: 310 | self.OpenByIndex(i, debug) 311 | return 312 | # 0x80 : "ADI_STATUS_HWIF_DEVICE_NOT_FOUND" 313 | raise AdiError(0x80) 314 | 315 | def Open(self): 316 | """Opens the first available 32-bit adapter.""" 317 | for i in range(GetNumDevices()): 318 | try: 319 | self.OpenByIndex(i) 320 | return 321 | except AdiError: 322 | continue 323 | # 0x80 : "ADI_STATUS_HWIF_DEVICE_NOT_FOUND" 324 | raise AdiError(0x80) 325 | 326 | def Close(self): 327 | if self.handle.value != 0: 328 | self.Disconnect() 329 | _DLL.ADI_Close(self.handle) 330 | self.handle.value = 0 331 | 332 | def IsOpened(self): 333 | return _DLL.ADI_IsOpened(self.handle) 334 | 335 | def GetDeviceMode(self): 336 | mode = ctypes.c_ulong() 337 | _DLL.ADI_GetDeviceMode(self.handle, ctypes.byref(mode)) 338 | return mode.value 339 | 340 | def SetDeviceMode(self, mode): 341 | _DLL.ADI_SetDeviceMode(self.handle, mode) 342 | 343 | def GetProperty(self, prop_id): 344 | value = ctypes.c_ulong() 345 | _DLL.ADI_DBG_GetProperty(self.handle, prop_id, ctypes.byref(value)) 346 | return value.value 347 | 348 | def SetProperty(self, prop_id, value): 349 | _DLL.ADI_DBG_SetProperty(self.handle, prop_id, value) 350 | 351 | def ConnectJTAG(self): 352 | id_code = ctypes.c_ulong() 353 | _DLL.ADI_DBG_ConnectJtag(self.handle, 0, 0, 0, 0, ctypes.byref(id_code)) 354 | self.idcode = id_code.value 355 | self.ClearErrors() 356 | return id_code.value 357 | 358 | def ConnectSWD(self, swj=1, baud=0): 359 | id_code = ctypes.c_ulong() 360 | _DLL.ADI_DBG_ConnectSwd(self.handle, swj, (0 != baud), baud, ctypes.byref(id_code)) 361 | self.idcode = id_code.value 362 | self.ClearErrors() 363 | return id_code.value 364 | 365 | def Disconnect(self): 366 | self.idcode = 0 367 | if self.IsConnected(): 368 | _DLL.ADI_DBG_Disconnect(self.handle) 369 | 370 | def IsConnected(self): 371 | if self.handle.value != 0: 372 | return _DLL.ADI_DBG_IsConnected(self.handle) 373 | else: 374 | return False 375 | 376 | def ClearErrors(self): 377 | before = ctypes.c_ulong() 378 | after = ctypes.c_ulong() 379 | _DLL.ADI_DBG_ClearErrors(self.handle, ctypes.byref(before), ctypes.byref(after)) 380 | return tuple([before.value, after.value]) 381 | 382 | def LineReset(self): 383 | _DLL.ADI_DBG_LineReset(self.handle) 384 | 385 | def QueueRead(self, address): 386 | _DLL.ADI_DBG_QueueRead(self.handle, (address | 0x02)) 387 | 388 | def QueueWrite(self, address, data): 389 | _DLL.ADI_DBG_QueueWrite(self.handle, address, data) 390 | 391 | def RepeatRead(self, count=1, address=ADI_DAP.DRW): 392 | words = (ctypes.c_ulong * count)() 393 | _DLL.ADI_DBG_RepeatRead(self.handle, count, (address | 0x02), words) 394 | return list(words) 395 | 396 | def RepeatWrite(self, data, address=ADI_DAP.DRW): 397 | count = len(data) 398 | words = (ctypes.c_ulong * count)(*data) 399 | _DLL.ADI_DBG_RepeatWrite(self.handle, count, address, words) 400 | 401 | def StartTransfers(self): 402 | size = ctypes.c_ulong() 403 | _DLL.ADI_DBG_GetNumReads(self.handle, ctypes.byref(size)) 404 | read = ctypes.c_ulong() 405 | words = (ctypes.c_ulong * size.value)() 406 | _DLL.ADI_DBG_StartTransfers(self.handle, words, size, ctypes.byref(read)) 407 | return list(words) 408 | 409 | 410 | if __name__ == "__main__": 411 | print('') 412 | print(" SLAB_ADI:", GetLibraryVersion()) 413 | print("SLABHIDDevice:", GetHidLibraryVersion()) 414 | print('') 415 | print("Available Adapters:") 416 | for i in range(GetNumDevices()): 417 | if IsAvailable(i): 418 | print(i, '-', GetSerial(i)) 419 | try: 420 | uda = AdiDevice() 421 | uda.Open() 422 | print('') 423 | print("Serial Num:", uda.serial_number) 424 | print(" VID - PID:", hex(uda.vid_pid[0]), "-", hex(uda.vid_pid[1])) 425 | print("Bootloader:", hex(uda.bootload_version)) 426 | print(" Firmware:", hex(uda.firmware_version)) 427 | except AdiError as e: 428 | print("Device Error:", e, "-", hex(e.status)) 429 | finally: 430 | uda.Close() 431 | -------------------------------------------------------------------------------- /High_Level/src/bin2c.py: -------------------------------------------------------------------------------- 1 | import sys 2 | 3 | # input_file = "sim3u1xx_USBHID_ram.bin" 4 | input_file ="sim3u1xx_Blinky.bin" 5 | output_file = "bin_array.h" 6 | ifile = open(input_file, mode = 'rb') 7 | binraw = ifile.read() 8 | word_array = [] 9 | for i in range(0, len(binraw), 4): 10 | if (sys.version_info < (3, 0, 0)): 11 | b0 = ord(binraw[i]) 12 | b1 = ord(binraw[i + 1]) 13 | b2 = ord(binraw[i + 2]) 14 | b3 = ord(binraw[i + 3]) 15 | else: 16 | b0 = (binraw[i]) 17 | b1 = (binraw[i + 1]) 18 | b2 = (binraw[i + 2]) 19 | b3 = (binraw[i + 3]) 20 | tmp = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24) 21 | word_array.append(hex(tmp)) 22 | 23 | # print(word_array) 24 | ifile.close() 25 | 26 | ofile = open(output_file, mode = 'w') 27 | ofile.write("U32 code binraw[] = {\n") 28 | cnt = 0; 29 | for i in range(0, len(word_array)): 30 | ofile.write(word_array[i] + ',') 31 | cnt = cnt + 1 32 | if (cnt > 6): 33 | cnt = 0 34 | ofile.write("\n") 35 | ofile.write("\n};") 36 | ofile.close() 37 | -------------------------------------------------------------------------------- /High_Level/src/bin_array.h: -------------------------------------------------------------------------------- 1 | U32 code binraw[] = { 2 | 0x20008000,0x2000016f,0x20000185,0x20000187,0x20000189,0x20000189,0x20000189, 3 | 0x0,0x0,0x0,0x0,0x20000189,0x20000189,0x0, 4 | 0x20000189,0x20000041,0x13f8f240,0x300f2c2,0x1c426818,0x4770601a,0x7f0e92d, 5 | 0xf2c42500,0xf04f0503,0xf8c50aa5,0xf44fa030,0xf24a4950,0xf44f1240,0xf24a4420, 6 | 0xf04f13e0,0xf8c50add,0xf2c4a030,0xf2c40302,0xf44f0202,0xf04f7040,0xf04f4c00, 7 | 0xf2c40808,0xf44f0402,0x26036740,0x902f2c4,0x11f4f240,0xf8c92502,0xf2c25024, 8 | 0xf8c20100,0xf8c28044,0xf8c48024,0xf8c4c044,0x6498c034,0x62586058,0x625f645f, 9 | 0x62566456,0xf644680a,0xf2c15cd3,0xfbac0c62,0xf24e2102,0x9880310,0x300f2ce, 10 | 0xf44f3801,0x6058426d,0x200f2ce,0x200021f0,0x1023f882,0x20076098,0xf8826018, 11 | 0xe8bd1023,0x477007f0,0xf24ab410,0xf24a1040,0x4a0c14e0,0x402f2c4,0x2f2c4, 12 | 0xf5016811,0x6813717a,0xd8fc4299,0x43cb6821,0xf041b299,0x60e36340,0x43cb6801, 13 | 0xfc83fa1f,0x3140f44c,0xe7eb60c1,0x200001f8,0x49112000,0xf8504a11,0xf8413b04, 14 | 0x42913b04,0x2000dbf9,0xf8414a0e,0x42910b04,0x480ddbfb,0x60014909,0x5e00f04e, 15 | 0xf0004770,0xf7fff817,0x4809ffc7,0x60084907,0x468d6801,0x47006840,0xe7fee7fe, 16 | 0xe7fe,0x20000000,0x200001f8,0x200001fc,0xe000ed08,0x1000,0x360f24d, 17 | 0x302f2c4,0x7d0691a,0x6918d51f,0xd41c0781,0xf013691b,0xd1180204,0xc10f24e, 18 | 0xc00f2ce,0x120f44f,0x1004f8cc,0x2008f8cc,0x46612205,0x2000f8cc,0xf24e6808, 19 | 0x3c20310,0x300f2ce,0x2200d5f8,0x605a601a,0xf7ff609a,0xbf00bf2f,0x1312d00, 20 | 21 | }; -------------------------------------------------------------------------------- /High_Level/src/si32FlashProgrammer.py: -------------------------------------------------------------------------------- 1 | 2 | ## Copyright (c) 2012-2013 by Silicon Laboratories. 3 | ## All rights reserved. This program and the accompanying materials 4 | ## are made available under the terms of the Silicon Laboratories End User 5 | ## License Agreement which accompanies this distribution, and is available at 6 | ## http://developer.silabs.com/legal/version/v10/License_Agreement_v10.htm 7 | ## Original content and implementation provided by Silicon Laboratories. 8 | 9 | """ 10 | This example Python script uses the Silicon Labs USB Debug Adapter to erase, 11 | program, or read SiM3 on-chip flash. The goal is to demonstrate the required 12 | debug port and device register sequences for each of these operations. 13 | """ 14 | 15 | import adi 16 | import sys 17 | 18 | #------------------------------------------------------------------------------ 19 | # DAP Constants 20 | #------------------------------------------------------------------------------ 21 | 22 | # Cortex M3 Debug Registers (AHB addresses) 23 | DDFSR = 0xE000ED30 # Debug Fault StatusRegister 24 | DHCSR = 0xE000EDF0 # Debug Halting Control and Status Register 25 | DCRSR = 0xE000EDF4 # Debug Core Register Selector Register 26 | DCRDR = 0xE000EDF8 # Debug Core Register Data Register 27 | DEMCR = 0xE000EDFC # Debug Exception and Monitor Control Register 28 | AIRCR = 0xE000ED0C # The Application Interrupt and Reset Control Register 29 | # DP register addresses 30 | DP_IDCODE = 0x00 31 | DP_CTRLSTAT = 0x04 32 | DP_SELECT = 0x08 33 | 34 | # Cortex M3 Memory Access Port 35 | MEMAP_BANK_0 = 0x00000000 # BANK 0 => CSW, TAR, Reserved, DRW 36 | MEMAP_BANK_1 = 0x00000010 # BANK 1 => BD0, BD1, BD2, BD3 37 | 38 | # MEMAP register addresses 39 | MEMAP_CSW = 0x01 40 | MEMAP_TAR = 0x05 41 | MEMAP_DRW = 0x0D 42 | 43 | # CSW.ADDR_INC Values 44 | VALUE_CSW_ADDR_INC_OFF = 0x00000000 # Auto-increment off 45 | VALUE_CSW_ADDR_INC_SINGLE = 0x00000010 # Increment single 46 | VALUE_CSW_ADDR_INC_PACKED = 0x00000020 # Increment packed 47 | 48 | # CSW.SIZE Values 49 | VALUE_CSW_SIZE_8_BITS = 0x00000000 # 8-bit memory size (optional) 50 | VALUE_CSW_SIZE_16_BITS = 0x00000001 # 16-bit memory size (optional) 51 | VALUE_CSW_SIZE_32_BITS = 0x00000002 # 32-bit memory size (required) 52 | 53 | # SiM3 Chip Access Port (SiLabs specific Debug Access Port) 54 | CHIPAP_BANK_0 = 0x0A000000 # BANK 0 => CTRL1, CTRL2, LOCK, CRC 55 | CHIPAP_BANK_1 = 0x0A000010 # BANK 1 => INIT_STAT, DAP_IN, DAP_OUT, None 56 | CHIPAP_BANK_F = 0x0A0000F0 # BANK F => None, None, None, ID 57 | 58 | # CHIPAP register addresses 59 | CHIPAP_CTRL1 = 0x01 60 | CHIPAP_CTRL2 = 0x05 61 | CHIPAP_ID = 0x0D 62 | 63 | # SRAM and Flash address 64 | SRAM_ADDR = 0x20000000 65 | FLASH_ADDR = 0 66 | #------------------------------------------------------------------------------ 67 | # FLASHCTRL Register Definitions 68 | #------------------------------------------------------------------------------ 69 | 70 | # Note: For each register, there are 4 ws (16 bytes), including: 71 | # Register - Normal read/write access to the register 72 | # Set Register - Sets the bits in the register as masked by the write value 73 | # Clear Register - Clears the bits in the register as masked by the write value 74 | # Mask Register - ? 75 | # 76 | # The Set/Clear/Mask registers are not implemented for all registers 77 | 78 | # Base address for the FLASHCTRL module 79 | FLASHCTRL_BASE_ADDRESS = 0x4002E000 80 | 81 | # Flash Register Address Offsets 82 | # (Register Address = Peripheral Base Address + Offset) 83 | OFF_FLASH_CONFIG = 0x00000000 # Configure flash writes 84 | OFF_FLASH_CONFIG_SET = 0x00000004 # Set register: sets bits to 1 (masked by value) 85 | OFF_FLASH_CONFIG_CLR = 0x00000008 # Clear register: clears bits to 0 (masked by value) 86 | OFF_FLASH_WRITE_ADDRESS = 0x000000A0 # Flash address 87 | OFF_FLASH_WRITE_DATA = 0x000000B0 # Flash data 88 | OFF_FLASH_WRITE_KEY = 0x000000C0 # Flash key 89 | 90 | # FLASH.CONFIG Masks 91 | MASK_FLASH_CONFIG_BUSY = 0x00100000 # Indicates that flash writes/erases are in progress 92 | MASK_FLASH_CONFIG_DATA_BUSY = 0x00080000 # Indicates that the write data buffer is full 93 | MASK_FLASH_CONFIG_ERASE_ENABLE = 0x00040000 # 0 - Enable flash writes 94 | # 1 - Enable flash page erases 95 | MASK_FLASH_CONFIG_SEQUENTIAL = 0x00010000 # 0 - Independent flash writes 96 | # 1 - Sequential double-buffered flash writes 97 | 98 | # FLASH.KEY Masks 99 | MASK_FLASH_KEY_KEY = 0x000000FF # Write 0xA5, 0xF1 to unlock the next flash write/erase 100 | # Write 0xA5, 0xF2 to unlock all flash writes/erases 101 | # Write 0x5A to lock all flash writes/erases 102 | 103 | #------------------------------------------------------------------------------ 104 | # CLKCTRL Register Definitions 105 | #------------------------------------------------------------------------------ 106 | 107 | # Base address for the CLKCTRL module 108 | CLKCTRL_BASE_ADDRESS = 0x4002D000 109 | 110 | # Clock Control Register Address Offsets 111 | # (Register Address = Peripheral Base Address + Offset) 112 | OFF_CLKCTRL_APBCLKG0 = 0x00000020 # APB Clock Gate 0 Register 113 | OFF_CLKCTRL_APBCLKG0_SET = 0x00000024 # Set register: sets bits to 1 (masked by value) 114 | OFF_CLKCTRL_APBCLKG0_CLR = 0x00000028 # Clear register: clears bits to 0 (masked by value) 115 | 116 | # CLKCTRL.APBCLKG0 Masks 117 | MASK_APBCLKG0_ENABLE_ALL_CLOCKS = 0xFFFFFFFF # Enable FLASHCTRL APB clock 118 | # The FLASHCTRL clock enable bit is in a different 119 | # location on SiM3L1xx and SiM3U/C1xx devices, so 120 | # enable clocks to all peripherals 121 | 122 | #------------------------------------------------------------------------------ 123 | # DAP (Debug Access Port) Access Functions 124 | #------------------------------------------------------------------------------ 125 | 126 | def read_DAP(uda, select, address): 127 | """Read one 32-bit DAP register. 128 | :param select: DP.SELECT value selects the AP and AP bank 129 | :param address: AP register address within the selected AP bank 130 | """ 131 | uda.QueueWrite(DP_SELECT, select) 132 | uda.QueueRead(address) 133 | return uda.StartTransfers()[0] 134 | 135 | def write_DAP(uda, select, address, data): 136 | """Write one 32-bit DAP register. 137 | :param select: DP.SELECT value selects the AP and AP bank 138 | :param address: AP register address within the selected AP bank 139 | :param data: 32-bit value to write 140 | """ 141 | uda.QueueWrite(DP_SELECT, select) 142 | uda.QueueWrite(address, data) 143 | uda.StartTransfers() 144 | 145 | def read_AHB(uda, address): 146 | """Use MEMAP to read one 32-bit word on the AHB bus. 147 | :param address: AHB address to read 148 | """ 149 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 150 | uda.QueueWrite(MEMAP_CSW, 0x23000002) 151 | uda.QueueWrite(MEMAP_TAR, address) 152 | uda.QueueRead(MEMAP_DRW) 153 | return uda.StartTransfers()[0] 154 | 155 | def write_AHB(uda, address, data): 156 | """Use MEMAP to write one 32-bit word on the AHB bus. 157 | :param address: AHB address to write 158 | :param data: 32-bit value to write 159 | """ 160 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 161 | uda.QueueWrite(MEMAP_CSW, 0x23000002) 162 | uda.QueueWrite(MEMAP_TAR, address) 163 | uda.QueueWrite(MEMAP_DRW, data) 164 | uda.StartTransfers() 165 | 166 | 167 | #------------------------------------------------------------------------------ 168 | # Flash Programming Functions 169 | #------------------------------------------------------------------------------ 170 | 171 | def connect_and_halt_core(uda): 172 | """Connect the Serial Wire Debug Port (DP-SWD) and halt the device.""" 173 | 174 | # Confirm the Chip_AP ID is what we expect 175 | chipap_id = read_DAP(uda, CHIPAP_BANK_F, CHIPAP_ID) 176 | if chipap_id != 0x2430002: 177 | # Not a SiLabs Chip_AP block 178 | return 179 | 180 | # Connect and halt the core using the Chip_AP 181 | write_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1, 0x8) # CTRL1.core_reset_ap = 1 182 | write_AHB(uda, DHCSR, 0xA05F0001) # DHCSR.C_DEBUGEN = 1 183 | write_AHB(uda, DEMCR, 0x1) # DEMCR.VC_CORERESET = 1 184 | write_AHB(uda, AIRCR, 0x05FA0004) # reset the core 185 | write_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1, 0x0) # CTRL1.core_reset_ap = 0 186 | 187 | def enable_flashctrl_clock(uda): 188 | """Enable the APB clock to the FLASHCTRL module registers.""" 189 | 190 | write_AHB(uda, CLKCTRL_BASE_ADDRESS + OFF_CLKCTRL_APBCLKG0_SET, MASK_APBCLKG0_ENABLE_ALL_CLOCKS) 191 | 192 | def device_erase(uda): 193 | """Bulk erase the device flash using the Silicon Labs Chip_AP. 194 | The device must already be halted.""" 195 | 196 | # Bulk erase all non-reserved flash 197 | write_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1, 0x1) # CTRL1.user_erase = 1 198 | chipap_ctrl1 = read_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1) 199 | while chipap_ctrl1 & 0x1: 200 | chipap_ctrl1 = read_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1) 201 | 202 | # Pulse sysreset so the device unlocks 203 | write_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1, 0x4) # CTRL1.sysreset_req_ap = 1 204 | write_DAP(uda, CHIPAP_BANK_0, CHIPAP_CTRL1, 0x0) # CTRL1.sysreset_req_ap = 0 205 | 206 | 207 | def write_sequential_words(uda, address, data_words, length): 208 | """Write words in an array (list) to flash. 209 | Clocks must already be enabled and the device must be halted.""" 210 | 211 | # If data_halfwords is an int, cast it as a list 212 | if isinstance(data_words, int): 213 | data_words = [data_words] 214 | 215 | # Write the flash word 216 | 217 | # Disable flash page erases 218 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG_CLR, MASK_FLASH_CONFIG_ERASE_ENABLE) 219 | 220 | # Set the address to write 221 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_ADDRESS, address) 222 | 223 | # Set up the flash controller for sequential writes 224 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG_SET, MASK_FLASH_CONFIG_SEQUENTIAL) 225 | 226 | # Unlock the FLASHCTRL interface for writes/erases 227 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0xA5) 228 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0xF2) 229 | 230 | # Set up the MEMAP to write the data to the FLASHCTRL write data register 231 | # Non-incrementing mode 232 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 233 | uda.QueueWrite(MEMAP_CSW, 0x23000002) 234 | uda.QueueWrite(MEMAP_TAR, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_DATA) 235 | uda.StartTransfers() 236 | 237 | # Write all the words to flash 238 | # Intended to be simple, this implementation writes single commands across the USB HID 239 | # interface for each 16 bits of data, which is very slow and inefficient. In an actual 240 | # programmer implementation, this process should write data to the serial wire debug port 241 | # as efficiently and quickly as possible. 242 | for x in range (0, length): 243 | 244 | # Writes are 16-bits 245 | uda.QueueWrite(MEMAP_DRW, 0x0000FFFF & data_words[x]) 246 | uda.QueueWrite(MEMAP_DRW, (0xFFFF0000 & data_words[x]) >> 16) 247 | uda.StartTransfers() 248 | 249 | # Clean up after the write operations 250 | 251 | # Lock flash writes/erases 252 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0x5A) 253 | 254 | 255 | def read_sequential_words(uda, address, length): 256 | """Read words in an array (list) from flash. 257 | The device must already be halted.""" 258 | 259 | data_words = [] 260 | 261 | # Auto increment addresses 262 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 263 | uda.QueueWrite(MEMAP_CSW, 0x23000012) 264 | uda.QueueWrite(MEMAP_TAR, address) 265 | 266 | # length is given in word addresses, so translate these to device 267 | # addresses in bytes 268 | for x in range (0, length): 269 | uda.QueueRead(MEMAP_DRW) 270 | data_words.append(uda.StartTransfers()[0]) 271 | 272 | return data_words 273 | 274 | def swd_write_mem(uda, address, data_ws, length): 275 | """Write ws in an array (list) to SRAM. 276 | Clocks must already be enabled and the device must be halted.""" 277 | 278 | # Auto increment addresses 279 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 280 | uda.QueueWrite(MEMAP_CSW, 0x23000012) 281 | 282 | uda.QueueWrite(MEMAP_TAR, address) 283 | for x in range (0, length): 284 | uda.QueueWrite(MEMAP_DRW, data_ws[x]) 285 | uda.StartTransfers() 286 | 287 | def swd_read_mem(uda, address, length): 288 | """Read words in an array (list) from SRAM. 289 | The device must already be halted.""" 290 | 291 | data_words = [] 292 | 293 | # Auto increment addresses 294 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 295 | uda.QueueWrite(MEMAP_CSW, 0x23000012) 296 | uda.QueueWrite(MEMAP_TAR, address) 297 | 298 | # length is given in word addresses, so translate these to device 299 | # addresses in bytes 300 | for x in range (0, length): 301 | uda.QueueRead(MEMAP_DRW) 302 | data_words.append(uda.StartTransfers()[0]) 303 | 304 | return data_words 305 | 306 | def swd_write_core_register(uda, n, val): 307 | """Write vlaue to Cortez M3 core register.""" 308 | 309 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 310 | uda.QueueWrite(MEMAP_CSW, 0x23000002) 311 | uda.QueueWrite(MEMAP_TAR, DCRDR) 312 | uda.QueueWrite(MEMAP_DRW, val) 313 | uda.StartTransfers() 314 | 315 | uda.QueueWrite(MEMAP_TAR, DCRSR) 316 | uda.QueueWrite(MEMAP_DRW, n | (1 << 16)) 317 | uda.StartTransfers() 318 | 319 | 320 | def swd_read_core_register(uda, n): 321 | """Read Cortez M3 core register value in an array (list).""" 322 | uda.QueueWrite(DP_SELECT, MEMAP_BANK_0) 323 | uda.QueueWrite(MEMAP_CSW, 0x23000002) 324 | uda.QueueWrite(MEMAP_TAR, DCRSR) 325 | uda.QueueWrite(MEMAP_DRW, n) 326 | uda.StartTransfers() 327 | 328 | uda.QueueWrite(MEMAP_TAR, DCRDR) 329 | uda.QueueRead(MEMAP_DRW) 330 | val = uda.StartTransfers()[0] 331 | 332 | return val 333 | 334 | 335 | def erase_page(uda, address): 336 | """Erase the flash page that contains the address specified. 337 | Clocks must already be enabled and the device must be halted.""" 338 | 339 | # Erase the flash page 340 | 341 | # Enable flash page erases 342 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG_SET, MASK_FLASH_CONFIG_ERASE_ENABLE) 343 | 344 | # Set the flash page to erase 345 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_ADDRESS, address) 346 | 347 | # Unlock the FLASHCTRL interface for writes/erases 348 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0xA5) 349 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0xF2) 350 | 351 | # Erase the flash page using a dummy data byte 352 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_DATA, 0x00) 353 | 354 | # Wait for the flash busy bit to clear 355 | flash_config = read_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG) 356 | while flash_config & MASK_FLASH_CONFIG_BUSY: 357 | flash_config = read_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG) 358 | 359 | # Clean up after the erase 360 | 361 | # Disable flash page erases 362 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_CONFIG_CLR, MASK_FLASH_CONFIG_ERASE_ENABLE) 363 | 364 | # Lock flash writes/erases 365 | write_AHB(uda, FLASHCTRL_BASE_ADDRESS + OFF_FLASH_WRITE_KEY, 0x5A) 366 | 367 | def sram_programming(uda): 368 | filename = "sim3u1xx_Blinky.bin" 369 | # filename = "sim3u1xx_USBHID_ram.bin" 370 | print(sys.version_info) 371 | data = [] 372 | f = open(filename,mode = 'rb') 373 | binraw = f.read() 374 | for i in range(0, len(binraw), 4): 375 | if (sys.version_info < (3, 0, 0)): 376 | b0 = ord(binraw[i]) 377 | b1 = ord(binraw[i + 1]) 378 | b2 = ord(binraw[i + 2]) 379 | b3 = ord(binraw[i + 3]) 380 | else: 381 | b0 = (binraw[i]) 382 | b1 = (binraw[i + 1]) 383 | b2 = (binraw[i + 2]) 384 | b3 = (binraw[i + 3]) 385 | tmp = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24) 386 | data.append(tmp) 387 | # print(','.join(hex(x) for x in data)) 388 | f.close() 389 | # Start programing firmware into SRAM 390 | size = int(len(binraw) / 4) 391 | print('Size is %d'%size) 392 | recv = [] 393 | for i in range(0, size, 1024): 394 | if (i + 1024) < size: 395 | count = 1024 396 | else: 397 | count = size - i 398 | 399 | print('Offset = %d'%(count+i)) 400 | swd_write_mem(uda, SRAM_ADDR + i * 4, data[i:], count) 401 | recv[i:] = swd_read_mem(uda, SRAM_ADDR + i * 4, count) 402 | 403 | error = 0 404 | for i in range (0, size): 405 | if recv[i] != data[i]: 406 | error = error + 1 407 | if error < 100: 408 | print('0x%x, %d'%(recv[i], i)) 409 | 410 | if error == 0: 411 | print('Data verified!') 412 | else: 413 | print('%d error happens'%error) 414 | 415 | # reset vector entry address 416 | rst_isr = (data[1] & 0xFFFFFFFE) 417 | # print(hex(rst_isr)) 418 | data[0] = 0x20000000 419 | # update vector table and PC 420 | swd_write_mem(uda, 0xe000ed08, data, 1) 421 | # recv = swd_read_core_register(uda, 15) 422 | swd_write_core_register(uda, 15, rst_isr) 423 | recv = swd_read_core_register(uda, 15) 424 | # print(hex(recv)) 425 | 426 | data[0] = 0x20008000 427 | swd_write_core_register(uda, 13, data[0]) 428 | write_AHB(uda, DHCSR, 0xA05F0000) 429 | tmp = read_AHB(uda, DHCSR) 430 | # print(hex(tmp)) 431 | 432 | 433 | #------------------------------------------------------------------------------ 434 | # The Application 435 | #------------------------------------------------------------------------------ 436 | # Open the first available debug adapter 437 | uda = adi.AdiDevice() 438 | uda.Open() 439 | 440 | # Connect using Serial Wire and enable debug features 441 | uda.ConnectSWD() 442 | uda.LineReset() 443 | write_DAP(uda, MEMAP_BANK_0, DP_CTRLSTAT, 0x50000000) 444 | 445 | # connect_and_halt_core(uda) 446 | 447 | # Bulk erase the entire user flash 448 | print('Erasing all flash in the device...') 449 | device_erase(uda) 450 | print('done!') 451 | 452 | connect_and_halt_core(uda) 453 | 454 | # Clocks must be enabled to the flash controller to write/erase flash 455 | enable_flashctrl_clock(uda) 456 | 457 | # Write a set of halfwords to two pages 458 | print('\nWriting test data to addresses 0x00000200 and 0x00000400...', end='') 459 | write_data_words = [0xA5A50000, 0x88885A5A, 0x1111FFEE, 0x11FFEEEE] 460 | write_sequential_words(uda, 0x00000200, write_data_words, 4) 461 | write_data_words.reverse() 462 | write_sequential_words(uda, 0x00000400, write_data_words, 4) 463 | print(' done!') 464 | 465 | # Read the data from flash 466 | print('\nReading test data to address 0x00000200...', end='') 467 | write_data_words.reverse() 468 | read_data_words = read_sequential_words(uda, 0x00000200, 4) 469 | if set(write_data_words) & set(read_data_words): 470 | print(' data verified!') 471 | else: 472 | print(' error in data!') 473 | print('Write: [', ', '.join([hex(i) for i in write_data_words]), ']') 474 | print('Read: [', ', '.join([hex(i) for i in read_data_words]), ']') 475 | 476 | print('\nReading test data to address 0x00000400...', end='') 477 | write_data_words.reverse() 478 | read_data_words = read_sequential_words(uda, 0x00000400, 4) 479 | if set(write_data_words) & set(read_data_words): 480 | print(' data verified!') 481 | else: 482 | print(' error in data!') 483 | print('Write: [', ', '.join([hex(i) for i in write_data_words]), ']') 484 | print('Read: [', ', '.join([hex(i) for i in read_data_words]), ']') 485 | 486 | # Erase the 0x00001000 page of flash 487 | print('\nErasing page 0x00000200...', end='') 488 | erase_page(uda, 0x00000200) 489 | print(' done!') 490 | 491 | # Read the data from flash 492 | print('\nReading test data to address 0x00000200...', end='') 493 | data_words = [0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF] 494 | read_data_words = read_sequential_words(uda, 0x00000200, 4) 495 | if set(data_words) & set(read_data_words): 496 | print(' data verified!') 497 | else: 498 | print(' error in data!') 499 | print('Erased data: [', ', '.join([hex(i) for i in data_words]), ']') 500 | print('Read: [', ', '.join([hex(i) for i in read_data_words]), ']') 501 | 502 | # SRAM programming test 503 | print('\nStart SRAM programming') 504 | sram_programming(uda) 505 | print('\nSRAM programming done') 506 | 507 | 508 | # Disable debug and disconnect before exiting 509 | write_DAP(uda, MEMAP_BANK_0, DP_CTRLSTAT, 0x00000000) 510 | uda.Disconnect() 511 | uda.Close() 512 | 513 | -------------------------------------------------------------------------------- /High_Level/src/sim3u1xx_Blinky.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/High_Level/src/sim3u1xx_Blinky.bin -------------------------------------------------------------------------------- /High_Level/src/sim3u1xx_USBHID_ram.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/High_Level/src/sim3u1xx_USBHID_ram.bin -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | The MIT License (MIT) 2 | 3 | Copyright (c) 2014 MarkDing (mark.ding@hotmail.com) 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /Ref/ARM_debug.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/Ref/ARM_debug.pdf -------------------------------------------------------------------------------- /Ref/DDI0316D_dap_lite_trm.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/Ref/DDI0316D_dap_lite_trm.pdf -------------------------------------------------------------------------------- /Ref/DDI0337I_cortexm3_r2p1_trm.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/Ref/DDI0337I_cortexm3_r2p1_trm.pdf -------------------------------------------------------------------------------- /Ref/DDI0403D_arm_architecture_v7m_reference_manual_errata_markup_1_0.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/Ref/DDI0403D_arm_architecture_v7m_reference_manual_errata_markup_1_0.pdf -------------------------------------------------------------------------------- /Ref/DSA09-PRDC-008772-1-0_ARM_debug_interface_v5_supplement.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/Ref/DSA09-PRDC-008772-1-0_ARM_debug_interface_v5_supplement.pdf -------------------------------------------------------------------------------- /SW_Interface/32bit_prog_defs.h: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2013 SILICON LABORATORIES, INC. 3 | // 4 | // FILE NAME : 32bit_prog_defs.h 5 | // DESCRIPTION : ARM Serial Wire debug interface header file 6 | // 7 | 8 | #ifndef _32BIT_PROG_DEFS_ 9 | #define _32BIT_PROG_DEFS_ 10 | 11 | #include 12 | #include 13 | 14 | //----------------------------------------------------------------------------- 15 | // Project Constants 16 | //----------------------------------------------------------------------------- 17 | 18 | // System clock frequency in Hz 19 | #define SYSCLK 48000000 20 | 21 | #define BOOL bit 22 | #define TRUE (1 == 1) 23 | #define FALSE (!TRUE) 24 | 25 | // Delay Times 26 | #define DELAY100mS -( SYSCLK / 48 * 0.1 ) 27 | #define DELAY20mS -( SYSCLK / 48 * 0.02 ) 28 | #define DELAY5mS -( SYSCLK / 48 * 0.005 ) 29 | #define DELAY1mS -( SYSCLK / 48 * 0.001 ) 30 | #define DELAY100uS -( SYSCLK / 48 * 0.000100 ) 31 | #define DELAY75uS -( SYSCLK / 48 * 0.000075 ) 32 | #define DELAY25uS -( SYSCLK / 48 * 0.000025 ) 33 | #define DELAY10uS -( SYSCLK / 48 * 0.00001 ) 34 | #define DELAY4_3uS -( SYSCLK / 48 * 0.0000043 ) 35 | #define DELAY3uS -( SYSCLK / 48 * 0.000003 ) 36 | #define DELAY2uS -( SYSCLK / 48 * 0.000002 ) 37 | 38 | // Timeout Times 39 | #define TIMEOUT_2Sec -( SYSCLK / 48 * 2 ) 40 | 41 | // Command Status Response Codes 42 | #define HOST_COMMAND_OK 0x55 43 | #define HOST_INVALID_COMMAND 0x80 44 | #define HOST_COMMAND_FAILED 0x81 45 | #define HOST_AP_TIMEOUT 0x82 46 | #define HOST_WIRE_ERROR 0x83 47 | #define HOST_ACK_FAULT 0x84 48 | #define HOST_DP_NOT_CONNECTED 0x85 49 | 50 | // Property SRST values 51 | #define SRST_ASSERTED 0x1 52 | #define SRST_DEASSERTED 0x0 53 | 54 | #define DAP_RETRY_COUNT 255 55 | 56 | //----------------------------------------------------------------------------- 57 | // ARM Debug Interface Constants 58 | //----------------------------------------------------------------------------- 59 | 60 | // ARM CoreSight SWD-DP packet request values 61 | #define SW_IDCODE_RD 0xA5 62 | #define SW_ABORT_WR 0x81 63 | #define SW_CTRLSTAT_RD 0x8D 64 | #define SW_CTRLSTAT_WR 0xA9 65 | #define SW_RESEND_RD 0x95 66 | #define SW_SELECT_WR 0xB1 67 | #define SW_RDBUFF_RD 0xBD 68 | 69 | // ARM CoreSight SW-DP packet request masks 70 | #define SW_REQ_PARK_START 0x81 71 | #define SW_REQ_PARITY 0x20 72 | #define SW_REQ_A32 0x18 73 | #define SW_REQ_RnW 0x04 74 | #define SW_REQ_APnDP 0x02 75 | 76 | // ARM CoreSight SW-DP packet acknowledge values 77 | #define SW_ACK_OK 0x1 78 | #define SW_ACK_WAIT 0x2 79 | #define SW_ACK_FAULT 0x4 80 | #define SW_ACK_PARITY_ERR 0x8 81 | 82 | // ARM CoreSight DAP command values 83 | #define DAP_IDCODE_RD 0x02 84 | #define DAP_ABORT_WR 0x00 85 | #define DAP_CTRLSTAT_RD 0x06 86 | #define DAP_CTRLSTAT_WR 0x04 87 | #define DAP_SELECT_WR 0x08 88 | #define DAP_RDBUFF_RD 0x0E 89 | 90 | // ARM CoreSight DAP command masks 91 | #define DAP_CMD_PACKED 0x80 92 | #define DAP_CMD_A32 0x0C 93 | #define DAP_CMD_RnW 0x02 94 | #define DAP_CMD_APnDP 0x01 95 | #define DAP_CMD_MASK 0x0F 96 | 97 | //----------------------------------------------------------------------------- 98 | // Global Variables 99 | //----------------------------------------------------------------------------- 100 | 101 | // These pin assignments match the debug adapter cable 102 | // 103 | // Pin 1: VREF P1.0 104 | // Pin 2: SWDIO/TMS P1.1 105 | // Pin 3: ground P1.2 106 | // Pin 4: SWCLK/TCK P1.3 107 | // Pin 5: ground P1.4 108 | // Pin 6: SWO/TDO P1.5 109 | // Pin 7: NC P1.6 110 | // Pin 8: TDI P1.7 111 | // Pin 9: ground GND 112 | // Pin 10: RESETB P2.1 113 | 114 | 115 | // LED Pin Definitions 116 | SBIT(LED0, SFR_P2, 2); // Green LED 117 | SBIT(LED1, SFR_P2, 3); // Green LED 118 | 119 | // JTAG Pin Definitions 120 | SBIT(TDO_In, SFR_P1, 5); // TDO Input 121 | SBIT(TDI_Out, SFR_P1, 7); // TDI Output 122 | SBIT(TMS_Out, SFR_P1, 1); // TMS Output 123 | SBIT(TCK_Out, SFR_P1, 3); // TCK Output 124 | 125 | // Serial Wire Pin Definitions 126 | SBIT(SWDIO_Out, SFR_P1, 1); // SWDIO Output 127 | SBIT(SWDIO_In, SFR_P1, 1); // SWDIO Input 128 | SBIT(SWCLK_Out, SFR_P1, 3); // SWCLK Output 129 | // SWO on P0.5 with TDO 130 | 131 | // Reset Pin Definitions 132 | SBIT(nSRST_Out, SFR_P0, 1); // nSRST Output 133 | SBIT(nSRST_In, SFR_P0, 1); // nSRST Input 134 | 135 | // These pins are ground on the CoreSight debug connector 136 | SBIT(P1_2, SFR_P1, 2); 137 | SBIT(P1_4, SFR_P1, 4); 138 | 139 | //----------------------------------------------------------------------------- 140 | // Macros 141 | //----------------------------------------------------------------------------- 142 | 143 | // Serial Wire Interface Macros 144 | #define _SetSWPinsIdle { P1MDOUT |= 0x08; P1MDOUT &= ~0x22; P1 |= 0x2A; } 145 | #define _SetSWDIOasInput { P1MDOUT &= ~0x02; P1 |= 0x02; } 146 | #define _SetSWDIOasOutput P1MDOUT |= 0x02 147 | 148 | // Set all debug pins xPIN_OUT to 1 (open drain outputs off) 149 | #define _ResetDebugPins { P1MDOUT &= ~0x8A; P1 |= 0x8A; P0MDOUT &= ~0x02; P0 |= 0x02; } 150 | 151 | // Target Reset Control Macros 152 | #define _AssertTargetReset nSRST_Out = 0 153 | #define _ReleaseTargetReset nSRST_Out = 1 154 | #define _IsTargetReset (nSRST_In == 1) 155 | 156 | //----------------------------------------------------------------------------- 157 | // Function Prototypes 158 | //----------------------------------------------------------------------------- 159 | 160 | typedef unsigned char STATUS; 161 | 162 | //----------------------------------------------------------------------------- 163 | // SWD-DP Interface Functions 164 | //----------------------------------------------------------------------------- 165 | void SWD_Initialize (void); 166 | STATUS SWD_Configure (U8 dp_type); 167 | STATUS SWD_Connect (void); 168 | STATUS SWD_Disconnect (void); 169 | STATUS SWD_LineReset (void); 170 | STATUS SWD_ClearErrors (void); 171 | STATUS SWD_DAP_Move(U8, U8, U32 *); 172 | 173 | STATUS SW_Response (U8); 174 | void SW_DAP_Read(U8, U8, U32 *); 175 | void SW_DAP_Write(U8, U8, U32 *, BOOL); 176 | U8 SW_Request(U8); 177 | BOOL SW_CalcDataParity(void); 178 | U8 SW_ShiftPacket(U8, U8); 179 | void SW_ShiftByteOut(U8); 180 | U8 SW_ShiftByteIn(void); 181 | void SW_ShiftReset(void); 182 | 183 | #endif // _32BIT_PROG_DEFS 184 | -------------------------------------------------------------------------------- /SW_Interface/Init.c: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------------------- 2 | // Init.c 3 | //----------------------------------------------------------------------------- 4 | // Copyright 2013 Silicon Laboratories, Inc. 5 | // http://www.silabs.com 6 | // 7 | // This file contains routines for initialization functions. 8 | // 9 | //----------------------------------------------------------------------------- 10 | 11 | #include 12 | #include 13 | #include "Init.h" 14 | #include "32bit_prog_defs.h" 15 | 16 | //----------------------------------------------------------------------------- 17 | // Internal Constants 18 | //----------------------------------------------------------------------------- 19 | 20 | //----------------------------------------------------------------------------- 21 | // Exported prototypes 22 | //----------------------------------------------------------------------------- 23 | 24 | void WDT_Init (void); 25 | void SYSCLK_Init (void); 26 | void PORT_Init (void); 27 | void Timer0_Init (void); 28 | void PCA0_Init (void); 29 | 30 | //----------------------------------------------------------------------------- 31 | // Exported global variables 32 | //----------------------------------------------------------------------------- 33 | 34 | //----------------------------------------------------------------------------- 35 | // Internal prototypes 36 | //----------------------------------------------------------------------------- 37 | 38 | //----------------------------------------------------------------------------- 39 | // Internal global variables 40 | //----------------------------------------------------------------------------- 41 | 42 | //----------------------------------------------------------------------------- 43 | // Initialization Functions 44 | //----------------------------------------------------------------------------- 45 | 46 | //----------------------------------------------------------------------------- 47 | // WDT_Init 48 | //----------------------------------------------------------------------------- 49 | // 50 | // Return Value : None 51 | // Parameters : None 52 | // 53 | // This routine disables the WDT. 54 | // 55 | //----------------------------------------------------------------------------- 56 | void WDT_Init (void) 57 | { 58 | PCA0MD &= ~0x40; 59 | } 60 | 61 | //----------------------------------------------------------------------------- 62 | // Oscillator_Init 12 MHz intosc * 4 = 48 MHz 63 | //----------------------------------------------------------------------------- 64 | // 65 | // Return Value : None 66 | // Parameters : None 67 | // 68 | // This selects the clock multiplier as the system clock source. The input 69 | // to the multiplier is the 12 MHz internal oscillator. 70 | // Also sets Flash read timing for 50 MHz operation. 71 | // 72 | //----------------------------------------------------------------------------- 73 | void Oscillator_Init (void) 74 | { 75 | U16 i = 0; 76 | 77 | FLSCL = 0x90; // Set Flash read timing for 50 MHz 78 | 79 | OSCICN = 0x83; // Enable intosc for div 1 mode 80 | 81 | CLKMUL = 0x80; // Enable clkmul 82 | 83 | for (i = 0; i < 20; i++); // Wait at least 5us for init 84 | 85 | CLKMUL |= 0xC0; 86 | 87 | while ((CLKMUL & 0x20) == 0); 88 | 89 | CLKSEL = 0x03; // Enable CLKMUL as sysclk 90 | } 91 | 92 | //----------------------------------------------------------------------------- 93 | // Port_Init UART0 94 | //----------------------------------------------------------------------------- 95 | // 96 | // Return Value : None 97 | // Parameters : None 98 | // 99 | // Configure ports as follows: 100 | // P0.4 - TX0 (push-pull) -- UART0 TX pin 101 | // P0.5 - RX0 (open-drain) -- UART0 RX pin 102 | // 103 | // P2.2 - LED0 (push-pull) -- status indicator 104 | // P2.3 - LED1 (push-pull) -- status indicator 105 | // 106 | // 107 | // The pinout is optimized to map the standard Port I/O header to the 108 | // standard 10-pin debug connector, as follows: 109 | // Pin 1: VREF P1.0 110 | // Pin 2: SWDIO/TMS P1.1 111 | // Pin 3: ground P1.2 112 | // Pin 4: SWCLK/TCK P1.3 113 | // Pin 5: ground P1.4 114 | // Pin 6: SWO/TDO P1.5 115 | // Pin 7: NC P1.6 116 | // Pin 8: TDI P1.7 117 | // Pin 9: ground GND 118 | // Pin 10: RESETB P2.1 119 | // 120 | //----------------------------------------------------------------------------- 121 | void Port_Init(void) 122 | { 123 | XBR1 &= ~0x40; // Disable the crossbar 124 | 125 | // nSRST_In/ 126 | ////////////////// UART0 RX, UART TX, nSRST_Out 127 | P0 = 0xFF; // 1 1 1 128 | P0MDOUT = 0x12; // OD PP PP 129 | P0MDIN = 0xFF; // D D D 130 | P0SKIP = 0x02; // RX0 TX0 x 131 | // SWCLK_Out/ SWDIO_In/ 132 | ////////////////// TDI_Out, TDO_IN, ground, TCK_Out, ground, TMS_Out, VREF 133 | P1 = 0xEB; // 1 1 1 0 1 0 1 1 134 | P1MDOUT = 0x88; // PP OD OD OD PP OD OD OD 135 | P1MDIN = 0xFE; // D D D D D D D A 136 | P1SKIP = 0xFF; // x x x x x x x x 137 | ////////////////// LED1, LED0, 138 | P2 = 0xFF; // 1 1 139 | P2MDOUT = 0x0C; // PP PP 140 | P2MDIN = 0xFF; // D D 141 | P2SKIP = 0x0C; // x x 142 | 143 | XBR0 = 0x00; // Enable UART0 on the crossbar 144 | XBR1 = 0x40; // Enable the crossbar, which also 145 | // enables port outputs 146 | } 147 | 148 | //----------------------------------------------------------------------------- 149 | // End of File 150 | //----------------------------------------------------------------------------- 151 | 152 | -------------------------------------------------------------------------------- /SW_Interface/Init.h: -------------------------------------------------------------------------------- 1 | //----------------------------------------------------------------------------- 2 | // Init.h 3 | //----------------------------------------------------------------------------- 4 | // Copyright 2013 Silicon Laboratories, Inc. 5 | // http://www.silabs.com 6 | // 7 | // This file contains public definitions for initialization functions. 8 | // 9 | //----------------------------------------------------------------------------- 10 | 11 | #ifndef INIT_H 12 | #define INIT_H 13 | 14 | //----------------------------------------------------------------------------- 15 | // Exported prototypes 16 | //----------------------------------------------------------------------------- 17 | 18 | extern void WDT_Init (void); 19 | extern void Oscillator_Init (void); 20 | extern void UART0_Init (void); 21 | extern void Port_Init (void); 22 | 23 | #endif // INIT_H 24 | 25 | //----------------------------------------------------------------------------- 26 | // End of File 27 | //----------------------------------------------------------------------------- 28 | 29 | -------------------------------------------------------------------------------- /SW_Interface/bin_array.h: -------------------------------------------------------------------------------- 1 | #if 0 2 | U32 code binraw[] = { 3 | 0x20008000,0x2000016f,0x20000185,0x20000187,0x20000189,0x20000189,0x20000189, 4 | 0x0,0x0,0x0,0x0,0x20000189,0x20000189,0x0, 5 | 0x20000189,0x20000041,0x13f8f240,0x300f2c2,0x1c426818,0x4770601a,0x7f0e92d, 6 | 0xf2c42500,0xf04f0503,0xf8c50aa5,0xf44fa030,0xf24a4950,0xf44f1240,0xf24a4420, 7 | 0xf04f13e0,0xf8c50add,0xf2c4a030,0xf2c40302,0xf44f0202,0xf04f7040,0xf04f4c00, 8 | 0xf2c40808,0xf44f0402,0x26036740,0x902f2c4,0x11f4f240,0xf8c92502,0xf2c25024, 9 | 0xf8c20100,0xf8c28044,0xf8c48024,0xf8c4c044,0x6498c034,0x62586058,0x625f645f, 10 | 0x62566456,0xf644680a,0xf2c15cd3,0xfbac0c62,0xf24e2102,0x9880310,0x300f2ce, 11 | 0xf44f3801,0x6058426d,0x200f2ce,0x200021f0,0x1023f882,0x20076098,0xf8826018, 12 | 0xe8bd1023,0x477007f0,0xf24ab410,0xf24a1040,0x4a0c14e0,0x402f2c4,0x2f2c4, 13 | 0xf5016811,0x6813717a,0xd8fc4299,0x43cb6821,0xf041b299,0x60e36340,0x43cb6801, 14 | 0xfc83fa1f,0x3140f44c,0xe7eb60c1,0x200001f8,0x49112000,0xf8504a11,0xf8413b04, 15 | 0x42913b04,0x2000dbf9,0xf8414a0e,0x42910b04,0x480ddbfb,0x60014909,0x5e00f04e, 16 | 0xf0004770,0xf7fff817,0x4809ffc7,0x60084907,0x468d6801,0x47006840,0xe7fee7fe, 17 | 0xe7fe,0x20000000,0x200001f8,0x200001fc,0xe000ed08,0x1000,0x360f24d, 18 | 0x302f2c4,0x7d0691a,0x6918d51f,0xd41c0781,0xf013691b,0xd1180204,0xc10f24e, 19 | 0xc00f2ce,0x120f44f,0x1004f8cc,0x2008f8cc,0x46612205,0x2000f8cc,0xf24e6808, 20 | 0x3c20310,0x300f2ce,0x2200d5f8,0x605a601a,0xf7ff609a,0xbf00bf2f,0x1312d00, 21 | 22 | }; 23 | #else 24 | U32 code binraw[] = { 25 | 0x20008000,0x20000151,0x20000d8d,0x20000d91,0x20000d95,0x20000d99,0x20000d9d, 26 | 0x0,0x0,0x0,0x0,0x20000141,0x20000145,0x0, 27 | 0x20000149,0x20000d7d,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 28 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 29 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 30 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 31 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 32 | 0x20000219,0x20000e91,0x20000219,0x20000219,0x20000219,0x20000219,0x20000cbd, 33 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 34 | 0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219,0x20000219, 35 | 0x200018d0,0x200018d0,0x18,0x200018e8,0x1c8,0xbf00e7fe,0xbf00e7fe, 36 | 0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xbf00e7fe, 37 | 0x4a164b15,0x4293b570,0x330cd202,0xd3fc4293,0x42ab4d13,0x2100d21b,0x42abe001, 38 | 0x6858d217,0x3308681c,0xd0f82800,0x1e462204,0x51094290,0x680f3c6,0xb11ed9f1, 39 | 0x42902208,0xd9ec6061,0x51111d16,0x42903208,0xd9e65131,0xf000e7f8,0xf000fd63, 40 | 0xe7fefedd,0x20000118,0x20000124,0x2000012c,0xb1aab430,0x1e536804,0xf3c3600c, 41 | 0x23040480,0xd90d429a,0x6844b124,0x429a2308,0xd907604c,0x1d1c581d,0x5825505d, 42 | 0x429a3308,0xd8f75065,0x4770bc30,0xb191b410,0xf3c31e4b,0x23040280,0x42992400, 43 | 0xd90a5024,0x2308b11a,0x60444299,0x1d1ad905,0x3308501c,0x50144299,0xbc10d8f9, 44 | 0xbf004770,0xbf00e7fe,0x4ff0e92d,0xb0834d2d,0x3bfff04f,0x591ff248,0x16e0f24a, 45 | 0x80acf8df,0xf8cd4f29,0x2400b004,0xfde2f000,0xf00046aa,0xf2c5fa15,0xf00019eb, 46 | 0xf2c4fa8d,0x46580602,0x4283682b,0xf8dad011,0xfba93000,0x21641003,0xfb010942, 47 | 0xb1c03012,0x3000f898,0x201f083,0xf04302d3,0x60f06000,0x5a16828,0xb9130d8b, 48 | 0x6280f44f,0x783a60b2,0x40912101,0xbf04428b,0x6380f44f,0x34016073,0xf000e7da, 49 | 0xf898f823,0xb1533000,0x783a9901,0xd006428a,0x98019201,0xfc20f000,0x781b4b09, 50 | 0x9a01e7d8,0xd0d53201,0xd1d32b00,0x31fff04f,0x91012010,0xfc12f000,0xbf00e7ca, 51 | 0x20001960,0x2000194d,0x2000194c,0xbf004770,0xcfcf641,0x5340f44f,0x302f2c4, 52 | 0xf2c22200,0xf8cc0c00,0x651a2004,0x20026d19,0x11c7f362,0x65192201,0x605a6058, 53 | 0xbf004770,0x0,0x4ff0e92d,0x280eb10,0x4680b087,0xf0009205,0x4da780ce, 54 | 0x31fff102,0x6bae6a28,0x6bef6a6c,0xebc71b82,0xfb080904,0x23ff9902,0xf0019302, 55 | 0xf04f0a01,0xf1b90b00,0xf0400f00,0x990580dd,0x428c2401,0x80b0f000,0xf00f1ba, 56 | 0xfbb4d024,0xfb08f6f8,0xf1064916,0xf106000f,0xf8550709,0xf855a020,0xf1067027, 57 | 0xebca0208,0x360e0307,0x3c03fb09,0x22f855,0x6026f855,0x108ebc9,0x900ebc6, 58 | 0xc909fb01,0xf0c045cb,0x990580cd,0x428c3401,0x8088f000,0xf2f8fbb4,0x4a12fb08, 59 | 0x609f102,0x70ff102,0x6026f855,0x7027f855,0x8f102,0x320e1bf3,0x3c03fb0a, 60 | 0x20f855,0x9022f855,0x108ebca,0xa00ebc9,0xca0afb01,0xd22f45d3,0xf992f001, 61 | 0x100e9cd,0x7080f509,0xf98cf001,0xe9d3a370,0xf0012300,0x4602f8cb,0xe9dd460b, 62 | 0xf0010100,0x2800f985,0x4630d179,0xf97cf001,0x100e9cd,0x7080f507,0xf976f001, 63 | 0xe9d3a365,0xf0012300,0x4602f8b5,0xe9dd460b,0xf0010100,0x9a02f96f,0xbf182800, 64 | 0x92024622,0x46d3bf18,0xfbb43401,0xfb08f2f8,0xf1024a12,0xf1020609,0xf855070f, 65 | 0xf8556026,0xf1027027,0x1bf10008,0xfb0a320e,0xf8551301,0xf8550020,0xebca9022, 66 | 0xebc90108,0xfb010c00,0x45d33a0c,0xf001d28d,0xe9cdf943,0xf5090100,0xf0017080, 67 | 0xa349f93d,0x2300e9d3,0xf87cf001,0x460b4602,0x100e9dd,0xf936f001,0x9905b178, 68 | 0x34019402,0x46d3428c,0xaf78f47f,0x2b7f9b02,0x4841d954,0x70022200,0xe8bdb007, 69 | 0x46308ff0,0xf91ef001,0x100e9cd,0x7080f507,0xf918f001,0xe9d3a336,0xf0012300, 70 | 0x460bf857,0xe9dd4602,0xf0010100,0x9b02f911,0xbf182800,0x93024623,0x46d3bf18, 71 | 0x9402e74d,0xe79d46d3,0xf900f001,0x102e9cd,0x7080f506,0xf8faf001,0xe9d3a327, 72 | 0xf0012300,0x4602f839,0xe9dd460b,0xf0010102,0xb310f8f3,0xb008f8cd,0xe70a46cb, 73 | 0xf8e8f001,0x100e9cd,0x7080f506,0xf8e2f001,0xe9d3a31b,0xf0012300,0x4602f821, 74 | 0xe9dd460b,0xf0010100,0x2800f8db,0x9402d034,0xe71a46cb,0x48174b16,0x21019a02, 75 | 0x70027019,0x4620e7a6,0xf8c8f001,0x102e9cd,0x7080f507,0xf8c2f001,0xe9d3a30b, 76 | 0xf0012300,0x460bf801,0xe9dd4602,0xf0010102,0x2800f8bb,0x23ffbf0c,0x93022300, 77 | 0xf04fbf0c,0x46cb0b00,0xbf00e6cd,0x8000f3af,0x33333333,0x3ff33333,0x200018fc, 78 | 0x2000194c,0x2000194d,0xf0014638,0x4606f89d,0x7080f50a,0xf001460f,0xa30af897, 79 | 0x2300e9d3,0xffd6f000,0x4602460b,0x46304639,0xf890f001,0x28009b02,0x4623bf18, 80 | 0xbf189302,0xe6cc46cb,0x8000f3af,0x33333333,0x3ff33333,0x4a14b430,0x5340f44f, 81 | 0x302f2c4,0x68518c1d,0xf101b2ad,0xf8420408,0x20025024,0x7400f04f,0x609c2904, 82 | 0xd80e6098,0xf8521ccc,0x31014024,0x651c6051,0x22016d19,0x11c7f36f,0x60586519, 83 | 0xbc30605a,0x6d1a4770,0x12c7f36f,0xbc30651a,0xbe56f7ff,0x200018fc,0x4161f44f, 84 | 0x481db470,0x100f2ce,0xf8c12480,0x24034084,0xf44f6144,0x24085240,0x61842300, 85 | 0x24092601,0xf2c42502,0x61c40202,0x60434601,0x60c66083,0x46146105,0x65132006, 86 | 0xf36f6d13,0x651313c7,0x60566055,0x7db6813,0x60a5d4fc,0xfa1f8c23,0xf5acfc83, 87 | 0x638b7380,0x38013104,0x688bd001,0xf44fe7e9,0xf2ce4061,0x22800000,0x2184f8c0, 88 | 0xbc706042,0xbf004770,0x200018fc,0xb4102200,0x203f2c4,0x631424a5,0x4050f44f, 89 | 0x1340f24a,0x631424dd,0x302f2c4,0xf2c42108,0x22020002,0x64596242,0xbc106259, 90 | 0xbf004770,0x3f4f641,0x300f2c2,0x601a2201,0xbf004770,0xbf004770,0xbf004770, 91 | 0xf0f641,0xcecf641,0xf2c2,0xf2c22203,0xf44f0c00,0x21014300,0xf2c46002, 92 | 0xf8cc0301,0x6d181000,0x3280f440,0x4770651a,0xbf004770,0x1f0f641,0xcecf641, 93 | 0xf2c22001,0xf2c20100,0xf44f0c00,0x60084300,0x301f2c4,0xf8cc,0x200f8d3, 94 | 0x280f040,0x2200f8c3,0xbf004770,0xbf282940,0x7832140,0xd073b4f0,0xd06e2900, 95 | 0xf8134603,0xf44f0b01,0x1e4a4400,0x401f2c4,0xf03f013,0x830f884,0x1f002, 96 | 0x2a00d013,0xb110d05d,0x2a00e008,0xf813d059,0x3a01cb01,0xf8840798,0xd006c830, 97 | 0xcb01f813,0x7983a01,0xc830f884,0x2a03d1ef,0x1f16d929,0x4635461c,0x4700f44f, 98 | 0xb04f854,0x701f2c4,0xf8c72d03,0xf3c60830,0xd9130680,0xf854b136,0x3d040b04, 99 | 0xf8c72d03,0xd90b0830,0xf8564626,0x3d080b04,0x830f8c7,0x1d346860,0xf8c72d03, 100 | 0xd8f30830,0xf0201f10,0x30040003,0x203f002,0xb1f2181b,0xf44f3a01,0xf8134500, 101 | 0xf2c4cb01,0x46140501,0xc830f885,0x201f002,0xb12ab18c,0xb01f813,0xf8853c01, 102 | 0xd00a0830,0xf812461a,0xf885cb01,0x7858c830,0x3c021c53,0x830f885,0x4608d1f4, 103 | 0x4770bcf0,0x460a4603,0xbf00e7ad,0x4c37b538,0x1ec36820,0xd8152b07,0xf003e8df, 104 | 0x14141440,0x4142115,0x4c00f44f,0xc01f2c4,0x1810f8dc,0x40f041,0x810f8cc, 105 | 0x3810f8dc,0x220f043,0x2810f8cc,0xf44fbd38,0xf2c44e00,0xf8de0e01,0x25081810, 106 | 0x40f041,0x810f8ce,0x4d246025,0x682a4b24,0x429188d9,0x4611bf28,0xd9222940, 107 | 0x21404c21,0xf7ff6820,0x6823ff4b,0x1819682a,0x4e00f44f,0x60281a10,0xf2c46021, 108 | 0xf8de0e01,0xf0411810,0xf8ce0002,0xbd380810,0x4c00f44f,0xc01f2c4,0x3810f8dc, 109 | 0xf0432101,0xf8cc0240,0x60212810,0x4b10bd38,0xf7ff6818,0xf44fff29,0xf2c44c00, 110 | 0xf8dc0c01,0x20012810,0x108f042,0x4e00f44f,0x1810f8cc,0xe01f2c4,0xf8de6020, 111 | 0xf0411810,0xf8ce0002,0xbd380810,0x200018ec,0x200018e8,0x20001958,0x20001954, 112 | 0xf44fb508,0xf2c44300,0xf8d30301,0x7502810,0xf8d3d508,0x210b0810,0x82f36f, 113 | 0x810f8c3,0x60194b19,0xd50c06d1,0x4c00f44f,0xc01f2c4,0x1810f8dc,0xf0414b14, 114 | 0x21010080,0x810f8cc,0x7d26019,0x4b10d51c,0x2a0b681a,0x681bd003,0xd0052b01, 115 | 0x2001e7fe,0x681b6018,0xd1f92b01,0x4e00f44f,0xe01f2c4,0x3830f8de,0x49064a07, 116 | 0xf8de6013,0x20023830,0x60536008,0xf898f000,0x4008e8bd,0xbf44f7ff,0x200018ec, 117 | 0x20001958,0x7804b4f0,0xebb24603,0xbf240fc4,0xd27802,0xd0640788,0xd05f2a00, 118 | 0x4b01f811,0xf0111e50,0xf8830f03,0xf0004030,0xd0150401,0xd0532800,0xe009b114, 119 | 0xd04f2800,0x4b01f811,0xf0113801,0xf8830f03,0xd0074030,0x4b01f811,0xf0113801, 120 | 0xf8830f03,0xd1ed4030,0xd9212803,0x460c1f06,0xf8544635,0x2d037b04,0xf3c6631f, 121 | 0xd9100680,0xf854b12e,0x3d046b04,0x631e2d03,0x4626d909,0x7b04f856,0x631f3d08, 122 | 0x1d346867,0x631f2d03,0x1f04d8f5,0x403f024,0xf0003404,0x19090003,0x3801b1d0, 123 | 0x5b01f811,0xf8834604,0xf0005030,0xb18c0001,0xf811b128,0x3c01cb01,0xc030f883, 124 | 0x4608d00a,0x5b01f810,0x5030f883,0x1c41784d,0xf8833c02,0xd1f45030,0xbcf04610, 125 | 0x46104770,0xbf00e7ba,0x4b0cb538,0xb1a2681a,0x2a01681a,0x4d0ad1fc,0xf6484b08, 126 | 0x18290480,0x401f2c4,0x601d2502,0xf7ff4620,0x6921ff7b,0x8af441,0x325f040, 127 | 0xbd386123,0x200018f4,0x200018d0,0xf2404a44,0x88136181,0xd074428b,0xf5b3d90a, 128 | 0xd01e6f10,0x3201f640,0xd01a4293,0x220a493e,0x4770600a,0x6fa0f5b3,0xf5b3d058, 129 | 0xd1f56fd0,0xf5b38853,0xd0677f80,0x7f00f5b3,0x4a37d1ee,0x60114937,0x4b372222, 130 | 0x21074833,0x6001601a,0xf6484770,0xf2c40080,0x69010001,0x324f242,0x345f2c0, 131 | 0x203ea41,0x69036102,0x72dbf64b,0x18af423,0xc24f021,0x38af44c,0x120f043, 132 | 0x69036101,0x72baf6cf,0xc02ea03,0x18af44c,0x324f041,0x69026103,0xc8af422, 133 | 0x134f02c,0x38af441,0x224f043,0x69016102,0x4c00f44f,0x38af441,0x264f043, 134 | 0x61022108,0xc01f2c4,0xf8dc7001,0x4a183050,0x3000f443,0xf8cc4b12,0x21010050, 135 | 0x60112003,0x47706018,0xf44f8852,0x4b0d4c00,0x17ff002,0xc01f2c4,0xf8cc2003, 136 | 0x60181000,0x88504770,0x5f08f5b0,0x4a0bd18e,0x601a4b06,0xe79e2217,0x4b044809, 137 | 0x60182212,0xbf00e799,0x20001958,0x200018ec,0x20001954,0x20001864,0x200018e8, 138 | 0x200018f4,0x2000189c,0x20001888,0x360f24d,0x302f2c4,0x7d0691a,0x6918d51f, 139 | 0xd41c0781,0xf013691b,0xd1180204,0xc10f24e,0xc00f2ce,0x120f44f,0x1004f8cc, 140 | 0x2008f8cc,0x46612205,0x2000f8cc,0xf24e6808,0x3c20310,0x300f2ce,0x2200d5f8, 141 | 0x605a601a,0xf7ff609a,0xbf00bd1b,0xf44fb508,0xf2c45040,0x68030002,0xd40b019a, 142 | 0x5240f44f,0x202f2c4,0x14b6811,0xbd08d400,0x4008e8bd,0xbb00f7ff,0xfc98f7ff, 143 | 0xbf00e7f0,0x4c50f44f,0x5340f44f,0xf2c4b470,0xf44f0302,0x26041100,0xc02f2c4, 144 | 0x1024f8cc,0x2630605e,0xf44f609e,0x609e4670,0x605e2600,0x250124c0,0x631d2607, 145 | 0x4261f44f,0x615d619e,0x605c609c,0x64e0f44f,0xf2ce609c,0x20800200,0x6480f44f, 146 | 0xf8c2605c,0x60500184,0xbc706059,0xbf004770,0xf000b508,0xf641f8c9,0xf44f03e4, 147 | 0xf2c25234,0xf2c00300,0x601a1231,0xbf00bd08,0x4350f44f,0xf2c42202,0xf2c50302, 148 | 0x625a0220,0xbf004770,0x1360f641,0x300f2c2,0x1c426818,0x4770601a,0xbf00e7fe, 149 | 0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xbf00e7fe,0xf641b430,0xf2c205e4,0x68290500, 150 | 0xfb002032,0xf644fc01,0xf2c152d3,0xf64c0262,0xfba2236b,0xf6c65401,0xfba3335f, 151 | 0x9a1250c,0x310f24e,0x300f2ce,0xde81e4c,0x4c6df44f,0x605c2210,0xc00f2ce, 152 | 0x204f2ce,0x24f03801,0x21072500,0x4023f88c,0x6019609d,0xbc306010,0xbf004770, 153 | 0xbf004770,0xf7ffb508,0xf000ffaf,0xf641f815,0xf44f03e4,0xf2c25234,0xf2c00300, 154 | 0x601a1231,0xffbef7ff,0xff92f7ff,0xffbaf7ff,0xff5ef7ff,0x4008e8bd,0xbfe4f7ff, 155 | 0x2a0f24a,0xf2c4b4f0,0x241e0202,0x1340f24a,0x4120f44f,0x10e0f24a,0xf2c46294, 156 | 0x60540302,0x7cc0f44f,0x27086314,0x102f2c4,0x4500f04f,0x2f2c4,0x6640f44f, 157 | 0x72c4f44f,0xc028f8c3,0xc004f8c3,0x625f645f,0x634d631a,0x62466446,0xbcf0644d, 158 | 0xbf004770,0xf44fb538,0xf2c44300,0x6b1c0301,0x631c6a1d,0x621d07ea,0x7abd41a, 159 | 0x720d415,0x7a1d410,0x762d40b,0x7e3d406,0xbd38d400,0x4038e8bd,0xbc50f7ff, 160 | 0xfc38f7ff,0xf7ffe7f5,0xe7f0fc33,0xfc2ef7ff,0xf7ffe7eb,0xe7e6fc23,0xfd52f7ff, 161 | 0xbf00e7e1,0x4300f44f,0x301f2c4,0xf8c32280,0xf8d32314,0x22000300,0x140f040, 162 | 0x1300f8c3,0x621a631a,0xf44f6c18,0xf0404c61,0x64190101,0xf2ce6d18,0xf0400c00, 163 | 0x65190104,0x2200f8c3,0x200f8d3,0x120f040,0x1200f8c3,0x200f8d3,0x140f040, 164 | 0x1200f8c3,0xf0406e18,0x66190180,0xf3626e18,0x66181045,0x20046e19,0x1186f362, 165 | 0xf8cc6619,0x69190004,0x1104f362,0x47706119,0xb5102000,0x46024601,0xf804f000, 166 | 0x4010e8bd,0xb954f7ff,0x2100b510,0x72a0f44f,0xf000481e,0x20c0f86b,0xf9a2f000, 167 | 0x21004c1c,0x602022c0,0xf862f000,0x68224b18,0x71a0f503,0x3328625a,0x428b3218, 168 | 0x2000d1fa,0x4a134915,0xf878f000,0xf44f2100,0xf44f5380,0x480f6280,0xf828f000, 169 | 0x49102001,0xf0004a10,0x2100f86b,0x5380f44f,0x6280f44f,0xf000480c,0x2002f81b, 170 | 0x4a0b4909,0xf85ef000,0x21004809,0x6280f44f,0x5380f44f,0x4010e8bd,0xb80cf000, 171 | 0x20001968,0x20001964,0x200018b4,0x200018b6,0x20001990,0x200019b8,0x68c4b570, 172 | 0xf03f014,0xf5b2d017,0xd0097f00,0x6f80f5b2,0xf5b2d003,0xd10e7f80,0x6a41e002, 173 | 0xe0032301,0x1e5e4d07,0xd80842ae,0x61014322,0x61c36001,0x200060c2,0x2001bd70, 174 | 0x2001bd70,0xbf00bd70,0xfffffe,0xbb8cf000,0xb51068c3,0x320f023,0x6a4360c3, 175 | 0x685b6982,0x429a4604,0xf000d00f,0x68e3f84c,0xf4236a62,0xf0235340,0xf0430310, 176 | 0x60e30310,0x61a36853,0x60936923,0x68e36023,0x4380f423,0x340f023,0xbd1060e3, 177 | 0x460eb570,0x46104605,0xf0004614,0x7833f91f,0xd0042b72,0xd0092b77,0xd1252b61, 178 | 0x2300e002,0xe0052201,0xf2482308,0xe0010202,0x22022304,0x1f01f816,0xd002292b, 179 | 0xd10a2962,0xf042e004,0xf0430203,0xe7f30302,0x204f042,0x301f043,0xf013e7ee, 180 | 0x60e20f08,0xd0066165,0x21004620,0xf0002202,0xe000f947,0x46202400,0xb538bd70, 181 | 0x46046801,0x69056a43,0x689b68c0,0x2200f420,0xf00060e2,0x2a020282,0xf410d117, 182 | 0xd0193080,0xbf384299,0x42a94619,0x4628d005,0x46221b49,0xf812f000,0x6a63b960, 183 | 0x609d2000,0x602568e3,0x3380f423,0x60e360a0,0xf04fbd38,0xbd3830ff,0x30fff04f, 184 | 0xbd38,0x41f0e92d,0x460668d7,0x1f80f417,0x4614460d,0x8014f8d2,0x4640d005, 185 | 0xfb16f000,0x710f047,0x4b1861a0,0x303ea07,0x4640b193,0xf00069a1,0x2800fb1d, 186 | 0x68e3da07,0x30fff04f,0x380f043,0xe8bd60e3,0xf42781f0,0xf0273700,0x60e70710, 187 | 0x4640462a,0xf0004631,0x69a3fb15,0xbf1442a8,0x30fff04f,0x18ed2000,0x4300f020, 188 | 0x61a51aed,0x68e3b128,0x30fff04f,0x380f043,0xe8bd60e3,0xbf0081f0,0x20010, 189 | 0xe92d4b32,0x1cc541f0,0x8ad681c,0x28004698,0x2700d05a,0x6821e03f,0x5f80f1b1, 190 | 0x68a6d139,0xf1b36833,0x68635f80,0x6872d106,0x3303189b,0x68b36063,0xe02e60a3, 191 | 0xd10642ab,0xf04f4620,0xf8405300,0xe8bd3b0c,0x1cea81f0,0xd9104293,0xf04f4620, 192 | 0xf8405200,0x1b5b2b0c,0x285eb00,0x60653b03,0xf84060a2,0x60531025,0xe8bd6096, 193 | 0xb97681f0,0x1ac0009b,0xfac6f000,0x3ffff1b0,0xf04fd01e,0x60235300,0xf1046065, 194 | 0xe8bd000c,0x462781f0,0x2c0068a4,0x300cd1bd,0xfab4f000,0x3ffff1b0,0xf04fd00f, 195 | 0x60035300,0x60846045,0xf8c8b917,0xe0000000,0x300c60b8,0x81f0e8bd,0xe8bd4630, 196 | 0x462081f0,0x81f0e8bd,0x20001aa8,0x5380f04f,0x3c0cf840,0x4770,0xf7ffb510, 197 | 0x4604ff8f,0x4904b928,0xf0002217,0xf000fa87,0x4620fa5b,0xbf00bd10,0x200018b8, 198 | 0x41f0e92d,0xb08668c6,0xf03f016,0xf8d04604,0x69078014,0xd0276a45,0xf08f016, 199 | 0xf000d117,0x4640f829,0xfa48f000,0x6f00f416,0x4638d002,0xffd0f7ff,0x5b60db6, 200 | 0x4fa5f116,0xa801d107,0x22146a21,0xfa56f000,0xf000a801,0x2100f8dd,0x6a602218, 201 | 0xfe8af7ff,0x21004620,0xf7ff2228,0x6265fe85,0xe0012000,0x30fff04f,0xe8bdb006, 202 | 0x81f0,0x4604b570,0xe8bdb118,0xf0004070,0x4605b8f4,0x20284b07,0x3004fb00, 203 | 0xf8edf000,0x28003401,0xf04fbf18,0x2c0835ff,0x4628d1f2,0xbf00bd70,0x20001968, 204 | 0x41f0e92d,0x68c64b41,0xea064604,0x460d0303,0xf8d04617,0x2b008014,0x4640d071, 205 | 0xfa04f000,0xd16c2800,0xd0042f01,0xd0072f02,0xd0272f00,0x4620e065,0xf86cf000, 206 | 0xe021182d,0xf0004640,0x2800f9ed,0x68e3da06,0xf0432001,0x60e30380,0x81f0e8bd, 207 | 0x69a16a62,0x68936827,0xbf2c429f,0x18cb19cb,0x1a5b6921,0xf01168e1,0xd0030f20, 208 | 0x42936852,0x4613bfb8,0xbfac4283,0x182d18ed,0xdb3f2d00,0x5f00f416,0x6a63d005, 209 | 0x68996822,0xbf384291,0x69a3609a,0xdb0e429d,0x68216a60,0x42916882,0x4611bf38, 210 | 0x18cf6922,0x42bd1abf,0x68c0dc03,0x42bd18c7,0x2300db07,0x606360a3,0xf0466a63, 211 | 0x605d0620,0xf016e011,0xebc30f02,0xbf1c0505,0x5ebc0,0xf01660a0,0xd0020f01, 212 | 0x19491a51,0x19556061,0xf0266025,0xf4260620,0xf4262602,0x60e65682,0xe8bd2000, 213 | 0x200281f0,0x81f0e8bd,0xe8bd2002,0xbf0081f0,0x100003,0xf01368c3,0xd1050f03, 214 | 0x22214b10,0xf04f601a,0x477030ff,0x2f00f413,0x320f003,0xb11bd00b,0x68586a43, 215 | 0x47703801,0x68016903,0x43db6982,0x18181888,0xb1134770,0x68586a43,0x69834770, 216 | 0x18d26802,0x1ad06903,0xbf004770,0x200018f8,0x4604b510,0xf806f000,0x46204601, 217 | 0x4010e8bd,0xb960f000,0x1c41b510,0xf810e004,0xb90b3b01,0xbd101a40,0xf03f010, 218 | 0x4602d1f7,0x3b04f850,0x3401f1a3,0x403ea24,0x3f80f014,0xf013d0f5,0xd00b0fff, 219 | 0x4f7ff413,0xf413d006,0xd0010f7f,0xe0041d13,0xe0021cd3,0xe0001c93,0x1a581c53, 220 | 0x68c3bd10,0xf013b570,0x46050403,0xf013d019,0xd0040f20,0x685e6a43,0xfd76f7ff, 221 | 0x6983e004,0x18f66806,0x1af66903,0x462868eb,0x5340f423,0xf7ff60eb,0x4631fdc2, 222 | 0x22004604,0xf7ff4628,0x4620feff,0xbd70,0x4ff0e92d,0x5760d0e,0x460f0d76, 223 | 0x461d4614,0x2e00469c,0xf240d05c,0x428e71ff,0xd1bd058,0xd5b055b,0xd0532b00, 224 | 0xd051428b,0x107ea85,0x477ff027,0x770f427,0x2ac2ea4f,0x1780f447,0x890afba7, 225 | 0xab00fbaa,0xd5318f6,0x2cc5ea43,0xeb1b2500,0xf1450408,0xf04c0500,0xfbe04c00, 226 | 0x2300450c,0x209eb15,0x300f143,0x230cfbe7,0x1f80f5b3,0x6680f5a6,0x4100f001, 227 | 0x49aea44,0x1892d206,0x303eb43,0x43020fe0,0xe0000064,0xfe03601,0xf1431812, 228 | 0x46180300,0x4f00f1b4,0x73fdf240,0xf022bf08,0x429e0201,0xea41d806,0x5360300, 229 | 0x461018f1,0x8ff0e8bd,0xbfa42e00,0x41fef041,0x170f441,0x46102200,0x8ff0e8bd, 230 | 0x207ea8c,0x1300f46f,0x429f007f,0x4200f002,0xebb3d806,0xd3060f4c,0x20004611, 231 | 0x8ff0e8bd,0x1f00f517,0xea4fd10b,0xf51c0c4c,0xd8061f00,0x57f0d7f,0xea4fb11f, 232 | 0x55b535c,0x2000b91b,0xe8bd4904,0xf0428ff0,0xf44141fe,0x20000170,0x8ff0e8bd, 233 | 0x7ff80000,0x4603b910,0xe0204602,0xd1010c03,0xe0010400,0x7180f101,0xd1010e03, 234 | 0xe0010200,0x100f501,0xd1010f03,0xe0010100,0x180f501,0xd1010f83,0xe0010080, 235 | 0x1100f501,0xdb012800,0xe0010040,0x1180f501,0x23e0eb01,0x46100542,0x47704619, 236 | 0x4180f04f,0xbfd4f7ff,0x460eb570,0x4619461d,0x306ea55,0x446ea4f,0xf514d407, 237 | 0xd8171f00,0xd81942ae,0x4290d114,0xf514e00e,0xd80f1f00,0xf513006b,0xd80b1f00, 238 | 0xd1014304,0xd0094313,0xd80942b1,0x4282d10a,0x2000bf94,0xbd702001,0xbd702000, 239 | 0xbd704618,0xbd702001,0xbd702000,0x3a044603,0xb2c9d308,0x2101ea41,0x4101ea41, 240 | 0xf8433a04,0xd2fb1b04,0xd0023204,0x54993a01,0x4770d1fc,0x49012018,0x4770beab, 241 | 0x20026,0x4669b403,0xbeab2002,0x4770b002,0x4669b403,0xbeab200c,0x4770b002, 242 | 0x4669b403,0xbeab2009,0x4770b002,0x4669b403,0xbeab200e,0x4770b002,0x4669b403, 243 | 0xbeab200a,0x4770b002,0x4669b40f,0xbeab200d,0x4770b004,0x4669b40f,0xbeab2005, 244 | 0x4770b004,0x4b0cb538,0xb90a681a,0x601a4a0b,0x681c1cc5,0x503f025,0x46281965, 245 | 0xf812f000,0x4b05b910,0xe004601d,0x220c4b05,0xf04f601a,0x462034ff,0xbf00bd38, 246 | 0x20001aac,0x20001ab0,0x200018f8,0x466b4a08,0xd9014293,0xd2064298,0xb1334b06, 247 | 0xbf344298,0x20012000,0x20014770,0x46184770,0xbf004770,0x20001ab0,0x0, 248 | 0x220209,0xc0000101,0x40932,0x30100,0x21090000,0x1000100,0x7001722, 249 | 0x40038105,0x100,0x2000112,0x40000000,0xfffeffff,0x100,0x100, 250 | 0x7090105,0x70501a1,0x65290019,0x65250015,0x1950875,0xc00081,0x770072, 251 | 0x202a2a2a,0x7973435f,0x6c615f73,0x20636f6c,0x6c696166,0xa6465,0x5b5a5962, 252 | 0x5f5e5d5c,0x636160,0x0,0x0,0x1312d00, 253 | }; 254 | #endif 255 | -------------------------------------------------------------------------------- /SW_Interface/dp_swd.c: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2013 SILICON LABORATORIES, INC. 3 | // 4 | // FILE NAME : dp_swd.c 5 | // TARGET MCU : C8051F380 6 | // DESCRIPTION : ARM CoreSight SW-DP Interface 7 | // 8 | // This file implements an interface to the ARM CoreSight Serial Wire Debug 9 | // (SWD) - Debug Port (DP). 10 | // 11 | #include 12 | #include "32bit_prog_defs.h" 13 | 14 | //----------------------------------------------------------------------------- 15 | // Project Variables 16 | //----------------------------------------------------------------------------- 17 | 18 | // Holds the last acknowledge error from the start of a move command. 19 | // Also used by the Serial Wire module. 20 | U8 idata ack_error; 21 | 22 | #if __C51__ 23 | // Note how the bit addresses are arranged to provide an endian swap. 24 | // io_word is stored BE (matches the Keil C compliler), while the bit addresses 25 | // are LE (matches the wire interface). 26 | SEGMENT_VARIABLE (io_word, UU32, SEG_BDATA); 27 | 28 | // Used to provide bit addressable data for 8-bit and smaller shift routines. 29 | // Also used by the Serial Wire module. 30 | SEGMENT_VARIABLE (io_byte, U8, SEG_BDATA); 31 | 32 | SBIT (iow_0, io_word.U32, 24); 33 | SBIT (iow_1, io_word.U32, 25); 34 | SBIT (iow_2, io_word.U32, 26); 35 | SBIT (iow_3, io_word.U32, 27); 36 | SBIT (iow_4, io_word.U32, 28); 37 | SBIT (iow_5, io_word.U32, 29); 38 | SBIT (iow_6, io_word.U32, 30); 39 | SBIT (iow_7, io_word.U32, 31); 40 | 41 | SBIT (iow_8, io_word.U32, 16); 42 | SBIT (iow_9, io_word.U32, 17); 43 | SBIT (iow_10, io_word.U32, 18); 44 | SBIT (iow_11, io_word.U32, 19); 45 | SBIT (iow_12, io_word.U32, 20); 46 | SBIT (iow_13, io_word.U32, 21); 47 | SBIT (iow_14, io_word.U32, 22); 48 | SBIT (iow_15, io_word.U32, 23); 49 | 50 | SBIT (iow_16, io_word.U32, 8); 51 | SBIT (iow_17, io_word.U32, 9); 52 | SBIT (iow_18, io_word.U32, 10); 53 | SBIT (iow_19, io_word.U32, 11); 54 | SBIT (iow_20, io_word.U32, 12); 55 | SBIT (iow_21, io_word.U32, 13); 56 | SBIT (iow_22, io_word.U32, 14); 57 | SBIT (iow_23, io_word.U32, 15); 58 | 59 | SBIT (iow_24, io_word.U32, 0); 60 | SBIT (iow_25, io_word.U32, 1); 61 | SBIT (iow_26, io_word.U32, 2); 62 | SBIT (iow_27, io_word.U32, 3); 63 | SBIT (iow_28, io_word.U32, 4); 64 | SBIT (iow_29, io_word.U32, 5); 65 | SBIT (iow_30, io_word.U32, 6); 66 | SBIT (iow_31, io_word.U32, 7); 67 | 68 | SBIT (iob_0, io_byte, 0); 69 | SBIT (iob_1, io_byte, 1); 70 | SBIT (iob_2, io_byte, 2); 71 | SBIT (iob_3, io_byte, 3); 72 | SBIT (iob_4, io_byte, 4); 73 | SBIT (iob_5, io_byte, 5); 74 | SBIT (iob_6, io_byte, 6); 75 | SBIT (iob_7, io_byte, 7); 76 | #else 77 | UU32 io_word; 78 | volatile U8 bdata io_byte; 79 | #endif 80 | 81 | //----------------------------------------------------------------------------- 82 | // Variables Declarations 83 | //----------------------------------------------------------------------------- 84 | 85 | // Controls SW connection sequence. 0=SW-DP, 1=SWJ-DP (use switch sequence) 86 | U8 idata swj_dp_type; 87 | 88 | // Even parity lookup table, holds even parity result for a 4-bit value. 89 | const U8 code even_parity[] = 90 | { 91 | 0x00, 0x10, 0x10, 0x00, 92 | 0x10, 0x00, 0x00, 0x10, 93 | 0x10, 0x00, 0x00, 0x10, 94 | 0x00, 0x10, 0x10, 0x00 95 | }; 96 | 97 | 98 | //----------------------------------------------------------------------------- 99 | // SWD Host Command Handlers 100 | //----------------------------------------------------------------------------- 101 | 102 | //----------------------------------------------------------------------------- 103 | // StrobeSWCLK 104 | //----------------------------------------------------------------------------- 105 | // 106 | // Pulls SWCLK high then low. 107 | // 108 | #define _StrobeSWCLK { SWCLK_Out = 1; SWCLK_Out = 0; } 109 | 110 | 111 | //----------------------------------------------------------------------------- 112 | // SWD_Initialize 113 | //----------------------------------------------------------------------------- 114 | // 115 | // Initializes SWD configuration data at startup. 116 | // 117 | void SWD_Initialize(void) 118 | { 119 | swj_dp_type = FALSE; // Default DP type is DP-SW 120 | } 121 | 122 | //----------------------------------------------------------------------------- 123 | // (0x20) SWD_Configure 124 | //----------------------------------------------------------------------------- 125 | // 126 | // Sets the debug port (DP) type to either Serial Wire only or Serial Wire JTAG. 127 | // The firmware needs to know this because the connection sequence is different 128 | // depending on the DP type. 129 | // 130 | // Parameters: 131 | // 1. DP_Type - Debug Port type. 0=SW, 1=SWJ 132 | // 133 | // Returns: 134 | // 1. HOST_COMMAND_OK 135 | // 136 | STATUS SWD_Configure(U8 dp_type) 137 | { 138 | swj_dp_type = dp_type; 139 | 140 | return HOST_COMMAND_OK; 141 | } 142 | 143 | //----------------------------------------------------------------------------- 144 | // (0x21) SWD_Connect 145 | //----------------------------------------------------------------------------- 146 | // 147 | // Sets the target device for Serial Wire communication and returns the 148 | // 32-bit ID code. Must be called before performing any SWD commands. 149 | // 150 | // Returns: 151 | // 1-4. IDCODE - Value read from the IDCODE register (32-bit). 152 | // 5. Response code. 153 | // 154 | STATUS SWD_Connect(void) 155 | { 156 | U8 rtn; 157 | 158 | // Initialize IO pins for SWD interface 159 | _SetSWPinsIdle; 160 | 161 | // Select the Serial Wire Debug Port 162 | // Skip this switch sequence if the device does not have the swj_dp port 163 | // Serial Wire + JTAG 164 | SW_ShiftReset(); 165 | SW_ShiftByteOut(0x9E); 166 | SW_ShiftByteOut(0xE7); 167 | 168 | // Reset the line and return the 32-bit ID code 169 | rtn = SWD_LineReset(); 170 | //SendLongToHost(io_word.U32); 171 | 172 | return rtn; 173 | } 174 | 175 | //----------------------------------------------------------------------------- 176 | // (0x30) SWD_Disconnect 177 | //----------------------------------------------------------------------------- 178 | // 179 | // Switches the debug interface to JTAG communication and disconnects pins. 180 | // 181 | // Returns: 182 | // 1. HOST_COMMAND_OK 183 | // 184 | STATUS SWD_Disconnect(void) 185 | { 186 | // Initialize IO pins for SWD interface 187 | _SetSWPinsIdle; 188 | 189 | // Select the JTAG Debug Port 190 | // Skip this switch sequence if the device does not have the swj_dp port 191 | // Serial Wire + JTAG 192 | SW_ShiftReset(); 193 | SW_ShiftByteOut(0x3C); 194 | SW_ShiftByteOut(0xE7); 195 | 196 | // Release debug interface pins except nSRST 197 | _ResetDebugPins; 198 | 199 | return HOST_COMMAND_OK; 200 | } 201 | 202 | //----------------------------------------------------------------------------- 203 | // (0x31) SWD_LineReset 204 | //----------------------------------------------------------------------------- 205 | // 206 | // Performs a line reset on the Serial Wire interface. 207 | // 208 | // Returns: 209 | // 1. Response code. 210 | // 211 | STATUS SWD_LineReset(void) 212 | { 213 | U8 ack; 214 | 215 | // Complete SWD reset sequence (50 cycles high followed by 2 or more idle cycles) 216 | SW_ShiftReset(); 217 | SW_ShiftByteOut(0); 218 | 219 | // Now read the DPIDR register to move the SWD out of reset 220 | ack = SW_ShiftPacket(SW_IDCODE_RD, 1); 221 | SW_ShiftByteOut(0); 222 | 223 | return SW_Response(ack); 224 | } 225 | 226 | //----------------------------------------------------------------------------- 227 | // (0x32) SWD_ClearErrors 228 | //----------------------------------------------------------------------------- 229 | // 230 | // Clears all the error/sticky bits in the DP Control/Status register. 231 | // 232 | // Returns: 233 | // 1-4. DP_CSR - DP_CTRLSTAT register value before the clear (32-bit, LE). 234 | // 5-8. DP_CSR - DP_CTRLSTAT register value after the clear (32-bit, LE). 235 | // 9. Response code. 236 | // 237 | STATUS SWD_ClearErrors(void) 238 | { 239 | U8 ack; 240 | 241 | // First read the DP-CSR register and send the value to the host. 242 | SW_ShiftPacket(SW_CTRLSTAT_RD, 1); 243 | //SendLongToHost(io_word.U32); 244 | 245 | // Clear all error/sticky bits by writing to the abort register. 246 | io_word.U32 = 0x1E; 247 | SW_ShiftPacket(SW_ABORT_WR, 1); 248 | 249 | // Read the DP-CSR register again and send the results to the host. 250 | ack = SW_ShiftPacket(SW_CTRLSTAT_RD, 1); 251 | SW_ShiftByteOut(0); 252 | //SendLongToHost(io_word.U32); 253 | 254 | return SW_Response(ack); 255 | } 256 | 257 | //----------------------------------------------------------------------------- 258 | // (0x34) SWD_DAP_Move 259 | //----------------------------------------------------------------------------- 260 | // 261 | // Reads or writes one Debug/Access Port address one or more times. 262 | // 263 | // Parameters: 264 | // 1. Count - Number of words to transfer minus one (i.e. 0=move 1 word). 265 | // 2. DAP_Addr - The DAP register address to transfer one or more times. 266 | // 3-n. Words[] - Array of 32-bit LE words (write transfers only). 267 | // 268 | // Returns: 269 | // 1-n. Words[] - Array of 32-bit LE words (read transfers only). 270 | // n+1. Response code. 271 | // 272 | // Uses: 273 | // ack_error - Resets error accumulator. 274 | // 275 | STATUS SWD_DAP_Move(U8 cnt, U8 dap, U32 * transfer_data) 276 | { 277 | // Reset global error accumulator 278 | ack_error = SW_ACK_OK; 279 | 280 | // Determine if this is a read or write transfer 281 | if (dap & DAP_CMD_RnW) 282 | { 283 | // Perform the requested number of reads 284 | SW_DAP_Read(cnt, dap, transfer_data); 285 | } 286 | else 287 | { 288 | SW_DAP_Write(cnt, dap, transfer_data, TRUE); 289 | } 290 | 291 | // Finish with idle cycles 292 | SW_ShiftByteOut(0); 293 | 294 | // Return the accumulated error result 295 | return SW_Response(ack_error); 296 | } 297 | 298 | //----------------------------------------------------------------------------- 299 | // SWD Helper Functions 300 | //----------------------------------------------------------------------------- 301 | 302 | //----------------------------------------------------------------------------- 303 | // SW_Response 304 | //----------------------------------------------------------------------------- 305 | // 306 | // Converts SWD acknowledge value into a host response code. 307 | // 308 | // Parameters: 309 | // SW_Ack - 3-bit SWD acknowledge code. 310 | // 311 | // Returns: 312 | // 8-bit host response code. 313 | // 314 | STATUS SW_Response(U8 SW_Ack) 315 | { 316 | switch (SW_Ack) 317 | { 318 | case SW_ACK_OK: return HOST_COMMAND_OK; 319 | case SW_ACK_WAIT: return HOST_AP_TIMEOUT; 320 | case SW_ACK_FAULT: return HOST_ACK_FAULT; 321 | default: return HOST_WIRE_ERROR; 322 | } 323 | } 324 | 325 | //----------------------------------------------------------------------------- 326 | // SW_DAP_Read 327 | //----------------------------------------------------------------------------- 328 | // 329 | // Does one or more reads of one Debug/Access Port register and returns each 330 | // 32-bit word to the host. 331 | // 332 | // Parameters: 333 | // cnt - Number of words to read minus one (i.e. 0=read 1 word). 334 | // DAP_Addr - The DAP register address to read one or more times. 335 | // 336 | void SW_DAP_Read(U8 cnt, U8 DAP_Addr, U32 * read_data) 337 | { 338 | U8 req; 339 | 340 | // Format the packet request header 341 | req = SW_Request(DAP_Addr); 342 | 343 | // Shift the first packet and if DP access, send the results 344 | SW_ShiftPacket(req, 0); 345 | if (!(req & SW_REQ_APnDP)) 346 | { 347 | *read_data = io_word.U32; 348 | read_data++; 349 | } 350 | 351 | // Perform the requested number of reads 352 | for (; cnt != 0; cnt--) 353 | { 354 | SW_ShiftPacket(req, 0); 355 | *read_data = io_word.U32; 356 | read_data++; 357 | } 358 | 359 | // For AP access, get and send results of the last read 360 | if (req & SW_REQ_APnDP) 361 | { 362 | SW_ShiftPacket(SW_RDBUFF_RD, 0); 363 | *read_data = io_word.U32; 364 | read_data++; 365 | } 366 | } 367 | 368 | //----------------------------------------------------------------------------- 369 | // SW_DAP_Write 370 | //----------------------------------------------------------------------------- 371 | // 372 | // Does one or more writes to one Debug/Access Port register getting each 373 | // 32-bit word from the host. 374 | // 375 | // Parameters: 376 | // cnt - Number of words to write minus one (ie 0=write 1 word). 377 | // DAP_Addr - The DAP register address to write one or more times. 378 | // final - True if this is the final transfer of a move sequence. 379 | // 380 | void SW_DAP_Write(U8 cnt, U8 DAP_Addr, U32 * write_data, BOOL final) 381 | { 382 | U8 req; 383 | 384 | // Format the packet request header 385 | req = SW_Request(DAP_Addr); 386 | 387 | // Perform the requested number of writes 388 | do 389 | { 390 | io_word.U32 = *write_data; 391 | write_data++; 392 | #if 0 393 | // Clear the upper half word for 16-bit packed writes 394 | io_word.U16[MSB] = 0; 395 | 396 | // For packed transfers, write 16-bits at a time 397 | if (DAP_Addr & DAP_CMD_PACKED) 398 | { 399 | SW_ShiftPacket(req, 0); 400 | io_word.U32 = *write_data; 401 | write_data++; 402 | 403 | // Clear the upper half word for 16-bit packed writes 404 | io_word.U16[MSB] = 0; 405 | } 406 | else 407 | { 408 | io_word.U16[MSB] = (U16) *write_data; 409 | write_data++; 410 | } 411 | #endif 412 | SW_ShiftPacket(req, 0); 413 | } 414 | while (cnt-- != 0); 415 | 416 | // For AP access, check results of last write (use default retry count 417 | // because previous write may need time to complete) 418 | if (final && (req & SW_REQ_APnDP)) 419 | { 420 | SW_ShiftPacket(SW_RDBUFF_RD, 0); 421 | } 422 | } 423 | 424 | //----------------------------------------------------------------------------- 425 | // SW_Request 426 | //----------------------------------------------------------------------------- 427 | // 428 | // Converts DAP address into SWD packet request value. 429 | // 430 | // Parameters: 431 | // DAP_Addr - 4-bit DAP address (A3:A2:RnW:APnDP). 432 | // 433 | // Returns: 434 | // Complete 8-bit packet request value. Includes parity, start, etc. 435 | // 436 | U8 SW_Request(U8 DAP_Addr) 437 | { 438 | U8 req; 439 | 440 | // Convert the DAP address into a SWD packet request value 441 | req = DAP_Addr & DAP_CMD_MASK; // mask off the bank select bits 442 | req = req | even_parity[req]; // compute and add parity bit 443 | req = req << 1; // move address/parity bits 444 | req = req | SW_REQ_PARK_START; // add start and park bits 445 | return req; 446 | } 447 | 448 | //----------------------------------------------------------------------------- 449 | // SW_CalcDataParity 450 | //----------------------------------------------------------------------------- 451 | // 452 | // Calculates even parity over the 32-bit value in io_word.U32. Contents of 453 | // io_word are not changed. 454 | // 455 | // Returns: 456 | // 1-bit even parity. 457 | // 458 | // Uses: 459 | // io_word - Holds 32-bit value to compute parity on. 460 | // 461 | bit SW_CalcDataParity(void) 462 | { 463 | U8 parity; 464 | 465 | // Calculate column parity, reducing down to 4 columns 466 | parity = io_word.U8[b0]; 467 | parity ^= io_word.U8[b1]; 468 | parity ^= io_word.U8[b2]; 469 | parity ^= io_word.U8[b3]; 470 | parity ^= parity >> 4; 471 | 472 | // Use lookup table to get parity on 4 remaining bits. The cast (bit) 473 | // converts any non-zero value to 1. 474 | return (bit)even_parity[parity & 0xF]; 475 | } 476 | 477 | //----------------------------------------------------------------------------- 478 | // SW_ShiftReset 479 | //----------------------------------------------------------------------------- 480 | // 481 | // Puts the SWD into the reset state by clocking 64 times with SWDIO high. 482 | // Leaves SWDIO an output and high. 483 | // 484 | void SW_ShiftReset(void) 485 | { 486 | U8 i; 487 | 488 | // Drive SWDIO high 489 | SWDIO_Out = 1; 490 | _SetSWDIOasOutput; 491 | 492 | // Complete 64 SWCLK cycles 493 | for (i = 64; i != 0; i--) 494 | { 495 | _StrobeSWCLK; 496 | } 497 | } 498 | 499 | //----------------------------------------------------------------------------- 500 | // SW_ShiftPacket 501 | //----------------------------------------------------------------------------- 502 | // 503 | // Completes one serial wire packet transfer (read or write). Expects SWDIO to 504 | // be an output on entry. 505 | // 506 | // Parameters: 507 | // request - Complete 8-bit packet request value. Includes parity, start, etc. 508 | // retry - Number of times to try the request while the target ack is WAIT. 509 | // 0 = use the system default retry count 510 | // n = try the request upto n times 511 | // 512 | // Returns: 513 | // 3-bit SWD acknowledge code. 514 | // Leaves SWDIO an output and low. 515 | // 516 | // Uses: 517 | // ack_error - Updated if there was a transfer error. 518 | // io_byte - Used for all transfers. 519 | // io_word - On entry, holds the 32-bit word data to transfer on writes. 520 | // On exit, holds the 32-bit word data transfered on reads. 521 | // 522 | U8 SW_ShiftPacket(U8 request, U8 retry) 523 | { 524 | U8 ack, limit, i; 525 | 526 | // If retry parameter is zero, use the default value instead 527 | if (retry == 0) 528 | { 529 | retry = DAP_RETRY_COUNT; 530 | } 531 | limit = retry; 532 | 533 | // While waiting, do request phase (8-bit request, turnaround, 3-bit ack) 534 | do 535 | { 536 | // Turnaround or idle cycle, makes or keeps SWDIO an output 537 | SWDIO_Out = 0; _SetSWDIOasOutput; _StrobeSWCLK; 538 | 539 | // Shift out the 8-bit packet request 540 | SW_ShiftByteOut(request); 541 | 542 | // Turnaround cycle makes SWDIO an input 543 | _SetSWDIOasInput; _StrobeSWCLK; 544 | 545 | // Shift in the 3-bit acknowledge response 546 | io_byte = 0; 547 | iob_0 = SWDIO_In; _StrobeSWCLK; 548 | iob_1 = SWDIO_In; _StrobeSWCLK; 549 | iob_2 = SWDIO_In; _StrobeSWCLK; 550 | ack = io_byte; 551 | 552 | // Check if we need to retry the request 553 | if ((ack == SW_ACK_WAIT) && --retry) 554 | { 555 | // Delay an increasing amount with each retry 556 | for (i=retry; i < limit; i++); 557 | } 558 | else 559 | { 560 | break; // Request phase complete (or timeout) 561 | } 562 | } 563 | while (TRUE); 564 | 565 | // If the request was accepted, do the data transfer phase (turnaround if 566 | // writing, 32-bit data, and parity) 567 | if (ack == SW_ACK_OK) 568 | { 569 | if (request & SW_REQ_RnW) 570 | { 571 | // Swap endian order while shifting in 32-bits of data 572 | io_word.U8[b0] = SW_ShiftByteIn(); 573 | io_word.U8[b1] = SW_ShiftByteIn(); 574 | io_word.U8[b2] = SW_ShiftByteIn(); 575 | io_word.U8[b3] = SW_ShiftByteIn(); 576 | 577 | // Shift in the parity bit 578 | iob_0 = SWDIO_In; _StrobeSWCLK; 579 | 580 | // Check for parity error 581 | if (iob_0 ^ SW_CalcDataParity()) 582 | { 583 | ack = SW_ACK_PARITY_ERR; 584 | } 585 | } 586 | else 587 | { 588 | // Turnaround cycle makes SWDIO an output 589 | _SetSWDIOasOutput; _StrobeSWCLK; 590 | 591 | // Swap endian order while shifting out 32-bits of data 592 | SW_ShiftByteOut(io_word.U8[b0]); 593 | SW_ShiftByteOut(io_word.U8[b1]); 594 | SW_ShiftByteOut(io_word.U8[b2]); 595 | SW_ShiftByteOut(io_word.U8[b3]); 596 | 597 | // Shift out the parity bit 598 | SWDIO_Out = SW_CalcDataParity(); _StrobeSWCLK; 599 | } 600 | } 601 | // TODO: Add error (FAULT, line, parity) handling here? RESEND on parity error? 602 | 603 | // Turnaround or idle cycle, always leave SWDIO an output 604 | SWDIO_Out = 0; _SetSWDIOasOutput; _StrobeSWCLK; 605 | 606 | // Update the global error accumulator if there was an error 607 | if (ack != SW_ACK_OK) 608 | { 609 | ack_error = ack; 610 | } 611 | return ack; 612 | } 613 | 614 | //----------------------------------------------------------------------------- 615 | // SW_ShiftByteOut 616 | //----------------------------------------------------------------------------- 617 | // 618 | // Shifts an 8-bit byte out the SWDIO pin. 619 | // 620 | // Parameters: 621 | // byte - The 8-bit byte to shift out on SWDIO. 622 | // 623 | // Uses: 624 | // io_byte - Holds byte as it is shifted out. 625 | // 626 | #pragma OT(8, SPEED) 627 | void SW_ShiftByteOut(U8 byte) 628 | { 629 | // Make sure SWDIO is an output 630 | _SetSWDIOasOutput; 631 | 632 | // Copy data to bit addressable location 633 | io_byte = byte; 634 | 635 | // Shift 8-bits out on SWDIO 636 | SWDIO_Out = iob_0; _StrobeSWCLK; 637 | SWDIO_Out = iob_1; _StrobeSWCLK; 638 | SWDIO_Out = iob_2; _StrobeSWCLK; 639 | SWDIO_Out = iob_3; _StrobeSWCLK; 640 | SWDIO_Out = iob_4; _StrobeSWCLK; 641 | SWDIO_Out = iob_5; _StrobeSWCLK; 642 | SWDIO_Out = iob_6; _StrobeSWCLK; 643 | SWDIO_Out = iob_7; _StrobeSWCLK; 644 | } 645 | 646 | //----------------------------------------------------------------------------- 647 | // SW_ShiftByteIn 648 | //----------------------------------------------------------------------------- 649 | // 650 | // Shifts an 8-bit byte in from the SWDIO pin. 651 | // 652 | // Returns: 653 | // 8-bit byte value shifted in on SWDIO. 654 | // 655 | // Uses: 656 | // io_byte - Holds byte as it is shifted in. 657 | // 658 | #pragma OT(8, SPEED) 659 | U8 SW_ShiftByteIn(void) 660 | { 661 | // Make sure SWDIO is an input 662 | _SetSWDIOasInput; 663 | 664 | // Shift 8-bits in on SWDIO 665 | iob_0 = SWDIO_In; _StrobeSWCLK; 666 | iob_1 = SWDIO_In; _StrobeSWCLK; 667 | iob_2 = SWDIO_In; _StrobeSWCLK; 668 | iob_3 = SWDIO_In; _StrobeSWCLK; 669 | iob_4 = SWDIO_In; _StrobeSWCLK; 670 | iob_5 = SWDIO_In; _StrobeSWCLK; 671 | iob_6 = SWDIO_In; _StrobeSWCLK; 672 | iob_7 = SWDIO_In; _StrobeSWCLK; 673 | 674 | // Return the byte that was shifted in 675 | return io_byte; 676 | } 677 | 678 | -------------------------------------------------------------------------------- /SW_Interface/main.c: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2013 SILICON LABORATORIES, INC. 3 | // 4 | // FILE NAME : main.c 5 | // TARGET MCU : C8051F380 6 | // DESCRIPTION : ARM Debug Interface for a 32-bit Programmer 7 | // 8 | // This program demonstrates the basic Serial Wire interface functionality. 9 | // It does not include the procedures to write, erase, or read flash. 10 | // 11 | // NOTES: 12 | // 1) Remove J15 from the 'F38x Target Board. 13 | // 2) Connect SWDIO (P1.1), SWCLK (P1.3), and ground to the 10-pin CoreSight 14 | // connector of an SiM3U/C/L. 15 | // 3) Run the code and observe that transfer_data contains the correct IDCODE 16 | // to validate the SW interface. 17 | // 18 | // 19 | 20 | #include 21 | #include 22 | #include "32bit_prog_defs.h" 23 | #include "Init.h" 24 | #include "bin_array.h" 25 | //----------------------------------------------------------------------------- 26 | // Variables Declarations 27 | //----------------------------------------------------------------------------- 28 | 29 | // Debug Port (DP) type. Tracks the type of the current DP connection. 30 | U8 DP_Type; 31 | 32 | // Possible values for DP_Type. 33 | enum { DP_TYPE_NONE, DP_TYPE_SWD }; 34 | 35 | 36 | // Cortex M3 Debug Registers (AHB addresses) 37 | #define DDFSR 0xE000ED30 // Debug Fault StatusRegister 38 | #define DHCSR 0xE000EDF0 // Debug Halting Control and Status Register 39 | #define DCRSR 0xE000EDF4 // Debug Core Register Selector Register 40 | #define DCRDR 0xE000EDF8 // Debug Core Register Data Register 41 | #define DEMCR 0xE000EDFC // Debug Exception and Monitor Control Register 42 | #define AIRCR 0xE000ED0C // The Application Interrupt and Reset Control Register 43 | 44 | // Cortex M3 Memory Access Port 45 | #define MEMAP_BANK_0 0x00000000 // BANK 0 => CSW, TAR, Reserved, DRW 46 | #define MEMAP_BANK_1 0x00000010 // BANK 1 => BD0, BD1, BD2, BD3 47 | 48 | // SiM3 Chip Access Port (SiLabs specific Debug Access Port) 49 | #define CHIPAP_BANK_0 0x0A000000 // BANK 0 => CTRL1, CTRL2, LOCK, CRC 50 | #define CHIPAP_BANK_1 0x0A000010 // BANK 1 => INIT_STAT, DAP_IN, DAP_OUT, None 51 | #define CHIPAP_BANK_F 0x0A0000F0 // BANK F => None, None, None, ID 52 | 53 | // MEMAP register addresses 54 | #define MEMAP_CSW 0x01 55 | #define MEMAP_TAR 0x05 56 | #define MEMAP_DRW_WR 0x0D 57 | #define MEMAP_DRW_RD 0x0F 58 | 59 | // CHIPAP register addresses 60 | #define CHIPAP_CTRL1_WR 0x01 61 | #define CHIPAP_CTRL2_WR 0x05 62 | #define CHIPAP_ID_WR 0x0D 63 | #define CHIPAP_ID_RD 0x0F 64 | 65 | #ifdef SRAM_PROGRAMMING 66 | void connect_and_halt_core() 67 | { 68 | U32 rw_data; 69 | 70 | rw_data = CHIPAP_BANK_F; 71 | SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); 72 | SWD_DAP_Move(0, CHIPAP_ID_RD, &rw_data); 73 | if (rw_data != 0x2430002) { 74 | return; 75 | } 76 | 77 | // CTRL1.core_reset_ap = 1 78 | rw_data = CHIPAP_BANK_0; 79 | SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); 80 | rw_data = 0x08; 81 | SWD_DAP_Move(0, CHIPAP_CTRL1_WR, &rw_data); 82 | 83 | // Select MEM BANK 0 84 | rw_data = MEMAP_BANK_0; 85 | SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); 86 | 87 | // 32 bit memory access, auto increment 88 | rw_data = 0x23000002; 89 | SWD_DAP_Move(0, MEMAP_CSW, &rw_data); 90 | 91 | // DHCSR.C_DEBUGEN = 1 92 | rw_data = DHCSR; 93 | SWD_DAP_Move(0, MEMAP_TAR, &rw_data); 94 | rw_data = 0xA05F0001; 95 | SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); 96 | 97 | // DEMCR.VC_CORERESET = 1 98 | rw_data = DEMCR; 99 | SWD_DAP_Move(0, MEMAP_TAR, &rw_data); 100 | rw_data = 0x1; 101 | SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); 102 | 103 | // reset the core 104 | rw_data = AIRCR; 105 | SWD_DAP_Move(0, MEMAP_TAR, &rw_data); 106 | rw_data = 0xFA050004; 107 | SWD_DAP_Move(0, MEMAP_DRW_WR, &rw_data); 108 | 109 | // CTRL1.core_reset_ap = 0 110 | rw_data = CHIPAP_BANK_0; 111 | SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); 112 | rw_data = 0; 113 | SWD_DAP_Move(0, CHIPAP_CTRL1_WR, &rw_data); 114 | 115 | // Select MEM BANK 0 116 | rw_data = MEMAP_BANK_0; 117 | SWD_DAP_Move(0, DAP_SELECT_WR, &rw_data); 118 | } 119 | 120 | void write_sequential_words(U32 addr, U32 len, U32 *rw_data) 121 | { 122 | U32 i, tmp; 123 | U32 *buf = rw_data; 124 | 125 | tmp = MEMAP_BANK_0; 126 | SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); 127 | // 32 bit memory access, auto increment 128 | tmp = 0x23000012; 129 | SWD_DAP_Move(0, MEMAP_CSW, &tmp); 130 | 131 | SWD_DAP_Move(0, MEMAP_TAR, &addr); 132 | for (i = 0; i < len; i++) { 133 | SWD_DAP_Move(0, MEMAP_DRW_WR, buf++); 134 | } 135 | } 136 | 137 | void read_sequential_words(U32 addr, U32 len, U32 *rw_data) 138 | { 139 | U32 i, tmp; 140 | U32 *buf = rw_data; 141 | 142 | tmp = MEMAP_BANK_0; 143 | SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); 144 | // 32 bit memory access, auto increment 145 | tmp = 0x23000012; 146 | SWD_DAP_Move(0, MEMAP_CSW, &tmp); 147 | 148 | SWD_DAP_Move(0, MEMAP_TAR, &addr); 149 | for (i = 0; i < len; i++) { 150 | SWD_DAP_Move(0, MEMAP_DRW_RD, buf++); 151 | } 152 | } 153 | 154 | 155 | void swd_write_core_register(U32 n, U32 *rw_data) 156 | { 157 | U32 tmp; 158 | tmp = MEMAP_BANK_0; 159 | SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); 160 | tmp = 0x23000002; 161 | SWD_DAP_Move(0, MEMAP_CSW, &tmp); 162 | tmp = DCRDR; 163 | SWD_DAP_Move(0, MEMAP_TAR, &tmp); 164 | SWD_DAP_Move(0, MEMAP_DRW_WR, rw_data); 165 | 166 | tmp = DCRSR; 167 | SWD_DAP_Move(0, MEMAP_TAR, &tmp); 168 | n = n | (0x10000); 169 | SWD_DAP_Move(0, MEMAP_DRW_WR, &n); 170 | } 171 | 172 | void swd_read_core_register(U32 n, U32 *rw_data) 173 | { 174 | U32 tmp; 175 | tmp = MEMAP_BANK_0; 176 | SWD_DAP_Move(0, DAP_SELECT_WR, &tmp); 177 | tmp = 0x23000002; 178 | SWD_DAP_Move(0, MEMAP_CSW, &tmp); 179 | tmp = DCRSR; 180 | SWD_DAP_Move(0, MEMAP_TAR, &tmp); 181 | SWD_DAP_Move(0, MEMAP_DRW_WR, &n); 182 | 183 | tmp = DCRDR; 184 | SWD_DAP_Move(0, MEMAP_TAR, &tmp); 185 | SWD_DAP_Move(0, MEMAP_DRW_RD, rw_data); 186 | } 187 | 188 | void programming_sram() 189 | { 190 | U32 i, size, count, addr = 0x20000000; 191 | 192 | size = sizeof(binraw) / 4; 193 | 194 | 195 | for (i = 0; i < size; i += 1024) { 196 | if ((i + 1024) < size) { 197 | count = 1024; 198 | } else { 199 | count = size - i; 200 | } 201 | write_sequential_words(addr + i * 4, count, &binraw[i]); 202 | } 203 | 204 | write_sequential_words(0xe000ed08, 1, &addr); 205 | addr = binraw[1] & 0xFFFFFFFE; 206 | swd_write_core_register(15, &addr); 207 | addr = binraw[0]; 208 | swd_write_core_register(13, &addr); 209 | addr = 0xA05F0000; 210 | write_sequential_words(DHCSR, 1, &addr); 211 | } 212 | #endif 213 | 214 | //----------------------------------------------------------------------------- 215 | // main() 216 | //----------------------------------------------------------------------------- 217 | void main(void) 218 | { 219 | U32 transfer_data; 220 | 221 | WDT_Init(); 222 | Oscillator_Init(); 223 | Port_Init(); 224 | 225 | // These pins are grounded on the CoreSight debug connector 226 | P1_4 = 0; 227 | P1_2 = 0; 228 | 229 | // There is no debug port connection at this point 230 | DP_Type = DP_TYPE_NONE; 231 | 232 | SWD_Initialize(); 233 | SWD_Configure(DP_TYPE_SWD); 234 | SWD_Connect(); 235 | 236 | transfer_data = 0x00000000; 237 | 238 | // Read the IDCODE from the connected device 239 | SWD_DAP_Move(0, DAP_IDCODE_RD, &transfer_data); 240 | 241 | // The return value from DAP_IDCODE_RD for SiM3U1xx devices is 0x2BA01477 242 | 243 | // Write the CTRLSTAT register to enable the debug hardware 244 | transfer_data = 0x50000000; 245 | SWD_DAP_Move(0, DAP_CTRLSTAT_WR, &transfer_data); 246 | SWD_ClearErrors(); 247 | connect_and_halt_core(); 248 | programming_sram(); 249 | 250 | transfer_data = 0x00000000; 251 | SWD_DAP_Move(0, DAP_CTRLSTAT_WR, &transfer_data); 252 | SWD_Disconnect(); 253 | 254 | while (1) 255 | { 256 | } 257 | } 258 | 259 | //----------------------------------------------------------------------------- 260 | // Initialization 261 | //----------------------------------------------------------------------------- 262 | 263 | //----------------------------------------------------------------------------- 264 | // Subroutines 265 | //----------------------------------------------------------------------------- 266 | 267 | //----------------------------------------------------------------------------- 268 | // DBG_Reset 269 | //----------------------------------------------------------------------------- 270 | // 271 | // This function returns all debug pins to a neutral state: 272 | // 1. Disconnects from the target. 273 | // 2. Resets all I/O pins. 274 | // 275 | // 276 | void DBG_Reset(void) 277 | { 278 | SWD_Connect(); 279 | 280 | // Reset all I/O ports 281 | Port_Init(); 282 | 283 | // We are disconnecting, so release nSRST 284 | _ReleaseTargetReset; 285 | } 286 | 287 | -------------------------------------------------------------------------------- /images/adi_mem-ap.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/images/adi_mem-ap.png -------------------------------------------------------------------------------- /images/ctrl-stat-reg.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/images/ctrl-stat-reg.png -------------------------------------------------------------------------------- /images/idr-reg.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/images/idr-reg.png -------------------------------------------------------------------------------- /images/swd-write-portocol.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MarkDing/swd_programing_sram/0bfd60438a86c98501b5bfaafde54922e577a58f/images/swd-write-portocol.png --------------------------------------------------------------------------------