├── .gitignore ├── .gitmodules ├── LICENSE.md ├── Pictures ├── NuBusFPGA_V1_0.jpg ├── NuBusFPGA_V1_0_in_Q650.jpg └── NuBusFPGA_V1_2.jpg ├── README.md ├── nubus-to-ztex-gateware ├── .gitignore ├── 74fct245.v ├── ConsoleTest │ ├── .AppleDouble │ │ ├── .Parent │ │ ├── ConsoleTest │ │ └── HelloWorld.c │ ├── ConsoleTest │ ├── ConsoleTest Data │ │ ├── .AppleDouble │ │ │ ├── .Parent │ │ │ ├── 68K Std C Console.tdm │ │ │ └── CW Settings.stm │ │ ├── 68K Std C Console.tdm │ │ └── CW Settings.stm │ └── HelloWorld.c ├── MakeFile ├── NuBusFPGAHDMIAudio │ ├── NuBusFPGAHDMIAudio.c │ └── NuBusFPGAHDMIAudio.sit ├── NuBusFPGAInit │ ├── NuBusFPGAInit.c │ ├── NuBusFPGAInit.rsrc.bin │ ├── NuBusFPGA_HW.h │ └── NuBusFPGA_QD.h ├── README.md ├── REF_20240223 │ ├── 2.12b │ │ ├── AltPHY │ │ │ ├── rom_V1_2.bin │ │ │ └── ztex213_nubus_V1_2.bit │ │ └── LitexPHY │ │ │ ├── rom_V1_2.bin │ │ │ └── ztex213_nubus_V1_2.bit │ └── 2.13a ├── do_V1.2 ├── mdio.py ├── nubus-to-ztex-io-signal.xdc ├── nubus-to-ztex-pin-signal.xdc ├── nubus_V1_0.py ├── nubus_V1_0.v ├── nubus_V1_2.py ├── nubus_V1_2.v ├── nubus_arbiter.v ├── nubus_cpld.ucf ├── nubus_cpld.v ├── nubus_cpldinfpga.v ├── nubus_cpu_wb.py ├── nubus_fpga_V1_0_timings.xdc ├── nubus_full_unified.py ├── nubus_master_tst.py ├── nubus_mem_wb.py ├── nubus_memfifo_wb.py ├── nubus_sampling.v ├── nubus_stat.py ├── nubus_to_fpga_export.py ├── nubus_to_fpga_soc.py ├── post_process_timings.sh ├── slave_V1.2_tb.sv ├── slave_tb.sv ├── sn74cb3t3125.v ├── sn74cb3t3245.v ├── sn74lvt125.v └── ztex213_nubus.py └── nubus-to-ztex ├── 10029449-111RLF.stp ├── 10118194-0001LF--3DModel-STEP-269445.STEP ├── 1050170001.stp ├── 1727034_seeed_dfareporta172464820220211.xlsx ├── 676432911.stp ├── 691037.pdf ├── 74CB3T16211.pretty └── 74CB3T16211.kicad_mod ├── 850030567.stp ├── 87832-1420.lib ├── 87832-1420.stp ├── ADV7125-lqfp48.lib ├── AT30TS74.bck ├── AT30TS74.dcm ├── AT30TS74.lib ├── B2B.sch ├── DM3CS-SF.lib ├── DM3CS-SF.step ├── ECS-2520MV-250-CN-TR.STEP ├── For_SeeedStudio.pretty ├── ADV7125KSTZ140.kicad_mod ├── DIN41612_C_3x32_Male_Horizontal_THT.kicad_mod ├── HDMI_A_Amphenol_10029449-111.kicad_mod ├── HRS_DM3CS-SF.kicad_mod ├── L77HDE15SD1CH4RHNVGA.kicad_mod ├── MOLEX_87832-1420.kicad_mod ├── PinHeader_1x06_P2.54mm_Horizontal_For_SeeedStudio.kicad_mod ├── PinHeader_2x07_P2.00mm_Horizontal_For_SeeedStudio.kicad_mod ├── PinHeader_2x07_P2.00mm_Vertical_For_SeeedStudio.kicad_mod ├── PinHeader_2x32_P2.54mm_Vertical_For_SeeedStudio.kicad_mod ├── PinSocket_1x02_P2.54mm_Vertical_for_SeeedStudio.kicad_mod ├── PinSocket_1x06_P2.54mm_Vertical_For_SeeedStudio.kicad_mod ├── PinSocket_2x06_P2.54mm_Horizontal_For_SeeedStudio.kicad_mod ├── PinSocket_2x07_P2.00mm_Vertical_For_SeeedStudio.kicad_mod ├── PinSocket_2x08_P2.54mm_Horizontal_ForSeeedStudio.kicad_mod ├── QSOP-20_3.9x8.7mm_P0.635mm_Renesas.kicad_mod ├── RJ45_UDE_RB1-125B8G1A.kicad_mod ├── SAMTEC-SMH-108-02-X-D.kicad_mod ├── SAMTEC_TSM-106-01-L-SH.kicad_mod ├── SAMTEC_TSM-106-01-T-SH-A.kicad_mod ├── SAMTEC_TSM-132-01-F-DV.kicad_mod ├── SOP65P640X120-24N.kicad_mod ├── TQFP-44_10x10mm_P0.8mm_Xilinx.kicad_mod ├── TQFP-64_10x10mm_P0.5mm_Xlinx.kicad_mod ├── TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio.kicad_mod ├── TSSOP-56_6.1x14mm_P0.5mm_For_SeeedStudio.kicad_mod ├── TVSOP-14_4.4x3.6mm_P0.40mm.kicad_mod ├── USB_A_Molex_67643_Horizontal.kicad_mod ├── litex_logo.kicad_mod └── netbsd_logo.kicad_mod ├── L77HDE15SD1CH4F--3DModel-STEP-533217.STEP ├── Molex2x32.pretty └── Molex2x32.kicad_mod ├── N2Z_backplate.scad ├── NuBus ├── 47219-2001.lib ├── 74LVC125APW_112.lib ├── 74LVC126AD_118.lib ├── C96ABC.lib ├── FCN-234P096-GY.3dshapes │ ├── FCN-234P096-GY.scad │ └── FCN-234P096-GY.wrl ├── FCN-234P096-GY.pretty │ └── FCN-234P096-GY.kicad_mod ├── MOLEX_47219-2001.pretty │ └── MOLEX_47219-2001.kicad_mod ├── NuBus.lib ├── SN74CB3T3245PWR.lib ├── SN74LVC16245ADGGR.lib ├── ul_SN74CB3T16210DGGR.lib ├── ul_SN74CB3T16211DGGR.lib └── ul_SN74CB3T3125PW.lib ├── RB1-125B8G1A.lib ├── SAMTEC-SMH-108-02-X-D.step ├── TPD12S016PWR.lib ├── TSM-106-01-L-SH.lib ├── TSM-106-01-L-SH.step ├── TSM-106-01-T-SH-A.lib ├── TSM-106-01-T-SH-A.step ├── TSM-132-01-F-DV.lib ├── TSM-132-01-F-DV.step ├── XilinxJtag.pretty └── XilinxJtag.kicad_mod ├── ad1580.lib ├── allpos2jlcpcb.sh ├── cb3t3306.lib ├── clock.sch ├── fan.sch ├── fp-lib-table ├── gui_defaults.par ├── hdmi.sch ├── logo.lib ├── nubus-to-ztex-B_Cu.gbr ├── nubus-to-ztex-B_Mask.gbr ├── nubus-to-ztex-B_Paste.gbr ├── nubus-to-ztex-B_SilkS.gbr ├── nubus-to-ztex-Edge_Cuts.gbr ├── nubus-to-ztex-F_Cu.gbr ├── nubus-to-ztex-F_Mask.gbr ├── nubus-to-ztex-F_Paste.gbr ├── nubus-to-ztex-F_SilkS.gbr ├── nubus-to-ztex-In1_Cu.gbr ├── nubus-to-ztex-In2_Cu.gbr ├── nubus-to-ztex-NPTH-drl_map.ps ├── nubus-to-ztex-NPTH.drl ├── nubus-to-ztex-PTH-drl_map.ps ├── nubus-to-ztex-PTH.drl ├── nubus-to-ztex-all-pos-jlcpcb.csv ├── nubus-to-ztex-bottom.pos ├── nubus-to-ztex-cache.lib ├── nubus-to-ztex-drl.rpt ├── nubus-to-ztex-jlcpcb.csv ├── nubus-to-ztex-top.pos ├── nubus-to-ztex.bin ├── nubus-to-ztex.csv ├── nubus-to-ztex.d356 ├── nubus-to-ztex.dsn ├── nubus-to-ztex.kicad_pcb ├── nubus-to-ztex.kicad_pcb-bak ├── nubus-to-ztex.net ├── nubus-to-ztex.pro ├── nubus-to-ztex.rpt ├── nubus-to-ztex.rules ├── nubus-to-ztex.sch ├── nubus-to-ztex.ses ├── nubus-to-ztex.xml ├── nubus-to-ztex.zip ├── nubus.sch ├── pkg.sh ├── pmod.sch ├── report.txt ├── sdcard.sch ├── signals.xlsx ├── sym-lib-table ├── temperature.sch ├── top.pdf ├── usb.sch ├── vga.sch ├── xc9536xl-vq44.lib ├── ztex_AB.lib └── ztex_CD.lib /.gitignore: -------------------------------------------------------------------------------- 1 | **~ 2 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "nubus-to-ztex-gateware/XiBus"] 2 | path = nubus-to-ztex-gateware/XiBus 3 | url = git@github.com:rdolbeau/XiBus.git 4 | branch = more_fixes 5 | [submodule "nubus-to-ztex-gateware/VintageBusFPGA_Common"] 6 | path = nubus-to-ztex-gateware/VintageBusFPGA_Common 7 | url = git@github.com:rdolbeau/VintageBusFPGA_Common.git 8 | [submodule "nubus-to-ztex-gateware/hdl-util_hdmi"] 9 | path = nubus-to-ztex-gateware/hdl-util_hdmi 10 | url = https://github.com/hdl-util/hdmi 11 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Different parts of this repository have different licenses. 2 | 3 | The hardware design (PCB, schematics, ...) is licensed under Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0). 4 | 5 | The gateware design based on Litex is licensed under the same license as Litex, BSD 2-clause (bsd-2-clause), including additional Verilog. 6 | 7 | The stand-alone software parts (including, but not limited to firmware, drivers, etc.) are licensed under the GNU General Public License v2.0 (gpl-2.0). 8 | 9 | External repositories have their own licenses, see in each relevant repository. -------------------------------------------------------------------------------- /Pictures/NuBusFPGA_V1_0.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/Pictures/NuBusFPGA_V1_0.jpg -------------------------------------------------------------------------------- /Pictures/NuBusFPGA_V1_0_in_Q650.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/Pictures/NuBusFPGA_V1_0_in_Q650.jpg -------------------------------------------------------------------------------- /Pictures/NuBusFPGA_V1_2.jpg: -------------------------------------------------------------------------------- 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'bZZZZZZZZ : ( nubus_ad_dir ? data_5v : 'bZZZZZZZZ); 10 | assign data_5v = nubus_oe ? 'bZZZZZZZZ : (~nubus_ad_dir ? data_3v3 : 'bZZZZZZZZ); 11 | 12 | endmodule // sn74fct245 13 | 14 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/ConsoleTest/.AppleDouble/.Parent: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex-gateware/ConsoleTest/.AppleDouble/.Parent -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/ConsoleTest/.AppleDouble/ConsoleTest: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex-gateware/ConsoleTest/.AppleDouble/ConsoleTest -------------------------------------------------------------------------------- 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#define DO_RSMSK8DST32_BIT 3 24 | #define DO_RSRC32MSK32DST32_BIT 4 25 | #define DO_RSRC32DST32_BIT 5 26 | 27 | #define FUN_DONE_BIT 31 28 | 29 | struct goblin_bt_regs { 30 | u_int32_t mode; 31 | u_int32_t vblmask; 32 | u_int32_t videoctrl; 33 | u_int32_t intrclear; 34 | u_int32_t reset; 35 | u_int32_t lutaddr; 36 | u_int32_t lut; 37 | u_int32_t debug; 38 | }; 39 | 40 | struct goblin_accel_regs { 41 | u_int32_t reg_status; // 0 42 | u_int32_t reg_cmd; 43 | u_int32_t reg_r5_cmd; 44 | u_int32_t reg_op; 45 | u_int32_t reg_width; // 4 46 | u_int32_t reg_height; 47 | u_int32_t reg_fgcolor; 48 | u_int32_t reg_depth; 49 | u_int32_t reg_bitblt_src_x; // 8 50 | u_int32_t reg_bitblt_src_y; 51 | u_int32_t reg_bitblt_dst_x; 52 | u_int32_t reg_bitblt_dst_y; 53 | u_int32_t reg_src_stride; // 12 54 | u_int32_t reg_dst_stride; 55 | u_int32_t reg_src_ptr; // 14 56 | u_int32_t reg_dst_ptr; 57 | u_int32_t reg_msk_x; // 16 58 | u_int32_t reg_msk_y; 59 | u_int32_t reg_msk_stride; // 18 60 | u_int32_t reg_msk_ptr; 61 | }; 62 | 63 | 64 | #endif // __NUBUSFPGA_HW_H__ 65 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/README.md: -------------------------------------------------------------------------------- 1 | # Compiling 2 | 3 | ## Rom 4 | 5 | Compiling the Declaration Rom (in DeclRom) requires the [Retro68](https://github.com/autc04/Retro68) toolchain. 6 | 7 | The beginning of the Makefile in DeclROM/ needs to be adapted to point to the toolchain. 8 | 9 | ## Microcode for acceleration 10 | 11 | Compiling the acceleration code for the Framebuffer requires a RISC-V toolchain. 12 | 13 | The script blit_goblin_nubus.sh in VintageBusFPGA_Common/ needs to be adapted to point to the appropriate toolchain. 14 | 15 | ## Bitstream 16 | 17 | Generating the bitstream requires Vivado, 2022 or newer should do. It also requires Litex, see for instance [Linux-on-Litex-VexRiscv](https://github.com/litex-hub/linux-on-litex-vexriscv). 18 | 19 | You will need LItex working, and an usable Vivado in yout $PATH. 20 | 21 | ## Known issues 22 | 23 | ### dependencies 24 | 25 | There's an interesting issue where you need the DeclRom to generate the bitstream (by defualt the Rom is emebedded in it), but you need CSR headers created during the generation of the bitstream to compile the Declaration Rom. A simple workaround is to create a Rom file with a kilobyte or two of fake data, generate the bitstream, then compile the declaration rom, then re-generate the bitsteam with the proper Rom. 26 | 27 | ### timings 28 | 29 | While the main part of the design should be fine in terms of timings, some of the HDMI part isn't. At FullHD resolution (1920x1080 @ 60Hz)), It is 'normal' to have -0.808ns of WPWS, with 9 endpoints failing, in the hdmi5x_clk domain. It doesn't seem to affect the display. This is using the V1.2 54 MHz clock to Bank 34; using the primary 48 MHz clock instead (as in V1.0), the hdmi_clk is a 148.8 MHz instead of 148.5 and the WPPS is -0.811 instead (the 5x clock is at 744 Mhz instead of 742.5 MHz). 30 | 31 | ### physical 32 | 33 | The HDMI connector is low-riding on the PCB. The Mac case gets in the the HDMI plug from the cable, thus pushing the NuBusFPGA slightly out of verticality. 34 | 35 | Also when plugging a PMod in the PMod connector, the soldered through-hole pins are dangerously close of the Mac shielding. An extra layer of insulation is recommended to avoid short-circuit. -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/REF_20240223/2.12b/AltPHY/rom_V1_2.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex-gateware/REF_20240223/2.12b/AltPHY/rom_V1_2.bin -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/REF_20240223/2.12b/AltPHY/ztex213_nubus_V1_2.bit: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex-gateware/REF_20240223/2.12b/AltPHY/ztex213_nubus_V1_2.bit -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /nubus-to-ztex-gateware/do_V1.2: -------------------------------------------------------------------------------- 1 | ( 2 | #source /opt/Xilinx/Vivado/2020.1/settings64.sh 3 | #export LD_LIBRARY_PATH=/opt/Xilinx/Vivado/2020.1/lib/lnx64.o/SuSE 4 | source /opt/Xilinx/Vivado/2023.2/settings64.sh 5 | export LD_LIBRARY_PATH=/opt/Xilinx/Vivado/2023.2/lib/lnx64.o/SuSE 6 | 7 | python3 nubus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.12b --version=V1.2 --sys-clk-freq 100e6 --goblin --goblin-res 1920x1080@60Hz --hdmi --config-flash --goblin-alt # --ethernet # --sdcard # --flash 8 | 9 | #python3 nubus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --goblin --goblin-res 1280x1024@60Hz --hdmi --config-flash # --ethernet # --sdcard # --flash 10 | 11 | ) 2>&1 | tee build_V1_2.log 12 | # --goblin --goblin-res 1280x1024@60Hz 13 | # --hdmi 14 | 15 | grep -A10 'Design Timing Summary' build/ztex213_nubus_V1_2/gateware/ztex213_nubus_V1_2_timing.rpt 16 | 17 | grep '^\$\$' build_V1_2.log 18 | 19 | 20 | ### 21 | # --flash 22 | # For 16 MiB Flash NOR (W25Q128.V): 23 | # truncate -s $((16*1024*1024)) vid_decl_rom.bin 24 | # flashrom -c W25Q128.V -p linux_spi:dev=/dev/spidev0.0,spispeed=2000 -l nubus_prom.layout -i ROM -w vid_decl_rom.bin 25 | # 26 | # where nubus_prom.layout contains: 27 | ### 28 | # 00000000:00007fff ROM 29 | # 00008000:00ffffff VDISK 30 | ### 31 | 32 | ### 33 | # --config-flash 34 | # vid_decl_rom.bin goes directly to sector 40 of the internal flash: 35 | ### 36 | # sudo java -jar FlashSend.jar -n 40 -f rom_V1_2.bin -w 37 | ### 38 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus-to-ztex-io-signal.xdc: -------------------------------------------------------------------------------- 1 | set_property IOSTANDARD LVTTL [get_ports {PMOD10}] 2 | set_property IOSTANDARD LVTTL [get_ports {PMOD11}] 3 | set_property IOSTANDARD LVTTL [get_ports {PMOD12}] 4 | set_property IOSTANDARD LVTTL [get_ports {PMOD5}] 5 | set_property IOSTANDARD LVTTL [get_ports {PMOD6}] 6 | set_property IOSTANDARD LVTTL [get_ports {PMOD7}] 7 | set_property IOSTANDARD LVTTL [get_ports {PMOD8}] 8 | set_property IOSTANDARD LVTTL [get_ports {PMOD9}] 9 | set_property IOSTANDARD LVTTL [get_ports {RX}] 10 | set_property IOSTANDARD LVTTL [get_ports {SD_CLK}] 11 | set_property IOSTANDARD LVTTL [get_ports {SD_CMD}] 12 | set_property IOSTANDARD LVTTL [get_ports {SD_D0}] 13 | set_property IOSTANDARD LVTTL [get_ports {SD_D1}] 14 | set_property IOSTANDARD LVTTL [get_ports {SD_D2}] 15 | set_property IOSTANDARD LVTTL [get_ports {SD_D3}] 16 | set_property IOSTANDARD LVTTL [get_ports {TX}] 17 | set_property IOSTANDARD LVTTL [get_ports {ack_n}] 18 | set_property IOSTANDARD LVTTL [get_ports {ack_o_n}] 19 | set_property IOSTANDARD LVTTL [get_ports {ack_oe_n}] 20 | set_property IOSTANDARD LVTTL [get_ports {ad_n[0]}] 21 | set_property IOSTANDARD LVTTL [get_ports {ad_n[10]}] 22 | set_property IOSTANDARD LVTTL [get_ports {ad_n[11]}] 23 | set_property IOSTANDARD LVTTL [get_ports {ad_n[12]}] 24 | set_property IOSTANDARD LVTTL [get_ports {ad_n[13]}] 25 | set_property IOSTANDARD LVTTL [get_ports {ad_n[14]}] 26 | set_property IOSTANDARD LVTTL [get_ports {ad_n[15]}] 27 | set_property IOSTANDARD LVTTL [get_ports {ad_n[16]}] 28 | set_property IOSTANDARD LVTTL [get_ports {ad_n[17]}] 29 | set_property IOSTANDARD LVTTL [get_ports {ad_n[18]}] 30 | set_property IOSTANDARD LVTTL [get_ports {ad_n[19]}] 31 | set_property IOSTANDARD LVTTL [get_ports {ad_n[1]}] 32 | set_property IOSTANDARD LVTTL [get_ports {ad_n[20]}] 33 | set_property IOSTANDARD LVTTL [get_ports {ad_n[21]}] 34 | set_property IOSTANDARD LVTTL [get_ports {ad_n[22]}] 35 | set_property IOSTANDARD LVTTL [get_ports {ad_n[23]}] 36 | set_property IOSTANDARD LVTTL [get_ports {ad_n[24]}] 37 | set_property IOSTANDARD LVTTL [get_ports {ad_n[25]}] 38 | set_property IOSTANDARD LVTTL [get_ports {ad_n[26]}] 39 | set_property IOSTANDARD LVTTL [get_ports {ad_n[27]}] 40 | set_property IOSTANDARD LVTTL [get_ports {ad_n[28]}] 41 | set_property IOSTANDARD LVTTL [get_ports {ad_n[29]}] 42 | set_property IOSTANDARD LVTTL [get_ports {ad_n[2]}] 43 | set_property IOSTANDARD LVTTL [get_ports {ad_n[30]}] 44 | set_property IOSTANDARD LVTTL [get_ports {ad_n[31]}] 45 | set_property IOSTANDARD LVTTL [get_ports {ad_n[3]}] 46 | set_property IOSTANDARD LVTTL [get_ports {ad_n[4]}] 47 | set_property IOSTANDARD LVTTL [get_ports {ad_n[5]}] 48 | set_property IOSTANDARD LVTTL [get_ports {ad_n[6]}] 49 | set_property IOSTANDARD LVTTL [get_ports {ad_n[7]}] 50 | set_property IOSTANDARD LVTTL [get_ports {ad_n[8]}] 51 | set_property IOSTANDARD LVTTL [get_ports {ad_n[9]}] 52 | set_property IOSTANDARD LVTTL [get_ports {arb_n[0]}] 53 | set_property IOSTANDARD LVTTL [get_ports {arb_n[1]}] 54 | set_property IOSTANDARD LVTTL [get_ports {arb_n[2]}] 55 | set_property IOSTANDARD LVTTL [get_ports {arb_n[3]}] 56 | set_property IOSTANDARD LVTTL [get_ports {arb_o_n[0]}] 57 | set_property IOSTANDARD LVTTL [get_ports {arb_o_n[1]}] 58 | set_property IOSTANDARD LVTTL [get_ports {arb_o_n[2]}] 59 | set_property IOSTANDARD LVTTL [get_ports {arb_o_n[3]}] 60 | set_property IOSTANDARD LVTTL [get_ports {clk2x_n}] 61 | set_property IOSTANDARD LVTTL [get_ports {clk_n}] 62 | set_property IOSTANDARD LVTTL [get_ports {hdmi_cec_a}] 63 | set_property IOSTANDARD LVTTL [get_ports {hdmi_clk_n}] 64 | set_property IOSTANDARD LVTTL [get_ports {hdmi_clk_p}] 65 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d0_n}] 66 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d0_p}] 67 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d1_n}] 68 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d1_p}] 69 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d2_n}] 70 | set_property IOSTANDARD LVTTL [get_ports {hdmi_d2_p}] 71 | set_property IOSTANDARD LVTTL [get_ports {hdmi_hpd_a}] 72 | set_property IOSTANDARD LVTTL [get_ports {hdmi_scl_a}] 73 | set_property IOSTANDARD LVTTL [get_ports {hdmi_sda_a}] 74 | set_property IOSTANDARD LVTTL [get_ports {id_n[0]}] 75 | set_property IOSTANDARD LVTTL [get_ports {id_n[1]}] 76 | set_property IOSTANDARD LVTTL [get_ports {id_n[2]}] 77 | set_property IOSTANDARD LVTTL [get_ports {id_n[3]}] 78 | set_property IOSTANDARD LVTTL [get_ports {led[0]}] 79 | set_property IOSTANDARD LVTTL [get_ports {led[1]}] 80 | set_property IOSTANDARD LVTTL [get_ports {led[2]}] 81 | set_property IOSTANDARD LVTTL [get_ports {led[3]}] 82 | set_property IOSTANDARD LVTTL [get_ports {nmrq_n}] 83 | set_property IOSTANDARD LVTTL [get_ports {nubus_ad_dir}] 84 | set_property IOSTANDARD LVTTL [get_ports {nubus_oe}] 85 | set_property IOSTANDARD LVTTL [get_ports {reset_n}] 86 | set_property IOSTANDARD LVTTL [get_ports {rqst_n}] 87 | set_property IOSTANDARD LVTTL [get_ports {rsqt_o_n}] 88 | set_property IOSTANDARD LVTTL [get_ports {start_n}] 89 | set_property IOSTANDARD LVTTL [get_ports {start_o_n}] 90 | set_property IOSTANDARD LVTTL [get_ports {start_oe_n}] 91 | set_property IOSTANDARD LVTTL [get_ports {tm2_oe_n}] 92 | set_property IOSTANDARD LVTTL [get_ports {tm_n[0]}] 93 | set_property IOSTANDARD LVTTL [get_ports {tm_n[1]}] 94 | set_property IOSTANDARD LVTTL [get_ports {tm_n[2]}] 95 | set_property IOSTANDARD LVTTL [get_ports {tm_n_o[0]}] 96 | set_property IOSTANDARD LVTTL [get_ports {tm_n_o[1]}] 97 | set_property IOSTANDARD LVTTL [get_ports {tm_o_n[2]}] 98 | set_property IOSTANDARD LVTTL [get_ports {tmx_oe_n}] 99 | set_property IOSTANDARD LVTTL [get_ports {usbh0_n}] 100 | set_property IOSTANDARD LVTTL [get_ports {usbh0_p}] 101 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_arbiter.v: -------------------------------------------------------------------------------- 1 | /* 2 | * Nubus Arbitration logic 3 | * 4 | * ARB is responsible for doing the NuBus arbitration logic. Upon 5 | * detecting any higher priority ARB<3:0> value, it will defer its 6 | * generation of lower ARB<3:0> bits. 7 | * The GRANT signal must be timed externally to determine proper 8 | * NuBus constraints. 9 | * This version uses a new technique to minimize skews. 10 | * 11 | * Modified from the XiBus version to support external drivers in the NuBusFPGA 12 | */ 13 | 14 | module nubus_arbiter 15 | ( 16 | input [3:0] idn, // ID of this card 17 | input [3:0] arbn, // NuBus arbiter's lines (input) 18 | output [3:0] arbon, // NuBus arbiter's lines (control) 19 | input arbcyn, // enable arbitter 20 | output grant // Grant access 21 | ); 22 | 23 | wire arb2oen, arb1oen, arb0oen; 24 | wire arb3, arb2, arb1, arb0; 25 | wire grantn; 26 | 27 | assign arbon[3] = ~arb3; 28 | assign arbon[2] = ~arb2; 29 | assign arbon[1] = ~arb1; 30 | assign arbon[0] = ~arb0; 31 | 32 | // ------------------------------------------ 33 | 34 | assign arb3 = ~arbcyn & ~idn[3]; 35 | 36 | assign arb2oen = idn[3] & ~arbn[3]; 37 | 38 | // ------------------------------------------ 39 | 40 | assign arb2 = ~arbcyn & ~arb2oen & ~idn[2]; 41 | 42 | assign arb1oen = idn[3] & ~arbn[3] | 43 | idn[2] & ~arbn[2]; 44 | 45 | // ------------------------------------------ 46 | 47 | assign arb1 = ~arbcyn & ~arb1oen & ~idn[1]; 48 | 49 | assign arb0oen = idn[3] & ~arbn[3] | 50 | idn[2] & ~arbn[2] | 51 | idn[1] & ~arbn[1]; 52 | 53 | // ------------------------------------------ 54 | 55 | assign arb0 = ~arbcyn & ~arb0oen & ~idn[0]; 56 | 57 | assign grantn = idn[3] & ~arbn[3] | 58 | idn[2] & ~arbn[2] | 59 | idn[1] & ~arbn[1] | 60 | idn[0] & ~arbn[0]; 61 | 62 | assign grant = ~arbcyn & ~grantn; 63 | 64 | endmodule 65 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_cpld.ucf: -------------------------------------------------------------------------------- 1 | 2 | #PINLOCK_BEGIN 3 | 4 | #Mon Jan 10 16:16:24 2022 5 | 6 | NET "id_n_3v3<3>" LOC = "S:PIN1"; 7 | NET "ack_n_3v3" LOC = "S:PIN2"; 8 | // PIN3: VCC 9 | NET "start_n_3v3" LOC = "S:PIN4"; 10 | NET "rqst_o_n" LOC = "S:PIN5"; 11 | NET "rqst_n_5V" LOC = "S:PIN6"; 12 | NET "id_n_5v<3>" LOC = "S:PIN7"; 13 | NET "ack_oe_n" LOC = "S:PIN8"; 14 | NET "ack_o_n" LOC = "S:PIN9"; 15 | NET "ack_n_5v" LOC = "S:PIN10"; 16 | NET "start_oe_n" LOC = "S:PIN11"; 17 | NET "start_o_n" LOC = "S:PIN12"; 18 | NET "start_n_5v" LOC = "S:PIN13"; 19 | // PIN14: GND 20 | NET "fpga_to_cpld_clk" LOC = "S:PIN15"; 21 | NET "clk_n_5v" LOC = "S:PIN16"; 22 | NET "clk2x_n_5v" LOC = "S:PIN17"; 23 | NET "id_n_5v<2>" LOC = "S:PIN18"; 24 | NET "id_n_5v<1>" LOC = "S:PIN19"; 25 | NET "id_n_5v<0>" LOC = "S:PIN20"; 26 | // PIN21: GND 27 | NET "tm2_n_5v" LOC = "S:PIN22"; 28 | // PIN23 29 | NET "fpga_to_cpld_signal" LOC = "S:PIN23"; 30 | NET "tm2_oe_n" LOC = "S:PIN24"; 31 | NET "arb_o_n<2>" LOC = "S:PIN25"; 32 | // PIN26: VCCIO 33 | NET "arb_n_5v<2>" LOC = "S:PIN27"; 34 | // PIN28: JTAG_TDI 35 | // PIN29: JTAG_TMS 36 | // PIN30: JTAG_TCK 37 | NET "arb_o_n<3>" LOC = "S:PIN31"; 38 | NET "arb_n_5v<3>" LOC = "S:PIN32"; 39 | NET "arb_o_n<0>" LOC = "S:PIN33"; 40 | NET "arb_n_5v<0>" LOC = "S:PIN34"; 41 | NET "arb_o_n<1>" LOC = "S:PIN35"; 42 | NET "arb_n_5v<1>" LOC = "S:PIN36"; 43 | // PIN37: VCC 44 | NET "tm1_n_5v" LOC = "S:PIN38"; 45 | NET "tm0_n_5v" LOC = "S:PIN39"; 46 | NET "tm1_o_n" LOC = "S:PIN40"; 47 | // PIN41: GND 48 | NET "tm0_o_n" LOC = "S:PIN42"; 49 | NET "tmx_oe_n" LOC = "S:PIN43"; 50 | NET "reset_n_5v" LOC = "S:PIN44"; 51 | NET "nubus_oe" LOC = "S:PIN45"; 52 | NET "tm2_o_n" LOC = "S:PIN46"; 53 | NET "clk_n_3v3" LOC = "S:PIN47"; 54 | NET "reset_n_3v3" LOC = "S:PIN48"; 55 | NET "nubus_master_dir" LOC = "S:PIN49"; 56 | NET "fpga_to_cpld_signal_2" LOC = "S:PIN50"; 57 | NET "tmoen" LOC = "S:PIN51"; 58 | NET "arbcy_n" LOC = "S:PIN52"; 59 | // PIN53: JTAG_TDO 60 | // PIN24: GND 61 | // PIN55: VCCIO 62 | NET "grant" LOC = "S:PIN56"; 63 | NET "tm2_n_3v3" LOC = "S:PIN57"; 64 | NET "clk2x_n_3v3" LOC = "S:PIN58"; 65 | NET "id_n_3v3<0>" LOC = "S:PIN59"; 66 | NET "id_n_3v3<1>" LOC = "S:PIN60"; 67 | NET "tm0_n_3v3" LOC = "S:PIN61"; 68 | NET "tm1_n_3v3" LOC = "S:PIN62"; 69 | NET "id_n_3v3<2>" LOC = "S:PIN63"; 70 | NET "rqst_n_3v3" LOC = "S:PIN64"; 71 | 72 | #PINLOCK_END -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_cpld.v: -------------------------------------------------------------------------------- 1 | module nubus_cpld 2 | ( 3 | // Control 4 | input nubus_oe, // disable all 5v drivers 5 | input tmoen, // tm output enable 6 | input nubus_master_dir, // direction of signals, i.e. are we in master mode 7 | 8 | // NuBus (input to CPLD) 9 | input [3:0] id_n_5v, // ID of this card 10 | input reset_n_5v, // reset from NuBus, forwarded 11 | input clk_n_5v, // clk from NuBus 12 | input clk2x_n_5v, // clk from NuBus90 13 | 14 | // Spares 15 | input fpga_to_cpld_clk, // unused (extra line from FPGA to CPLD, pin is a clk input) 16 | input fpga_to_cpld_signal, // rqstoen (extra line from FPGA to CPLD) 17 | inout fpga_to_cpld_signal_2, // unused (extra line from FPGA to CPLD) 18 | 19 | // NuBus (output to FPGA) 20 | output [3:0] id_n_3v3, // nubus ID of this card to FPGA 21 | output reset_n_3v3, // nubus reset to FPGA 22 | output clk_n_3v3, // nubus clk to FPGA 23 | output clk2x_n_3v3, // nubus90 clk to FPGA 24 | 25 | // NuBus Arbiter 26 | input arbcy_n, // enable arbitter 27 | input [3:0] arb_n_5v, // NuBus arbiter's lines 28 | output [3:0] arb_o_n, // NuBus arbiter's control lines 29 | output grant, // Grant access 30 | 31 | // Cycle Control (NuBus two-way) 32 | inout tm0_n_3v3, // nubus tm0 to/from FPGA 33 | input tm0_n_5v, // tm0 from/to NuBus 34 | output tm0_o_n, // start from NuBus 35 | 36 | inout tm1_n_3v3, // nubus tm1 to/from FPGA 37 | input tm1_n_5v, // tm1 from/to NuBus 38 | output tm1_o_n, // start from NuBus 39 | output tmx_oe_n, // start from NuBus 40 | 41 | inout tm2_n_3v3, // nubus tm2 to/from FPGA 42 | input tm2_n_5v, // tm2 from/to NuBus 43 | output tm2_o_n, // start from NuBus 44 | output tm2_oe_n, // start from NuBus 45 | 46 | inout start_n_3v3, // start to/from FPGA 47 | input start_n_5v, // start from NuBus 48 | output start_o_n, // start from NuBus 49 | output start_oe_n, // start from NuBus 50 | 51 | 52 | inout ack_n_3v3, // ack from/to FPGA 53 | inout ack_n_5v, // ack from NuBus 54 | output ack_o_n, // ack to NuBus 55 | output ack_oe_n, // ack OE NuBus 56 | 57 | // Master Request (OC) 58 | input rqst_n_5v, // rqst from NuBus; needs monitoring before driving 59 | inout rqst_n_3v3, // rqst from/to FPGA 60 | output rqst_o_n // rqst to NuBus 61 | ); 62 | 63 | // placeholder to make pretend we use the signals 64 | assign fpga_to_cpld_signal_2 = fpga_to_cpld_clk; 65 | // placeholders 66 | assign clk2x_n_3v3 = clk2x_n_5v; 67 | assign tm2_n_3v3 = tm2_n_5v; 68 | assign tm2_o_n = 0; 69 | assign tm2_oe_n = 1; 70 | 71 | // clock and pure in -> out pass_through are always on 72 | assign clk_n_3v3 = clk_n_5v; 73 | assign id_n_3v3 = id_n_5v; 74 | assign reset_n_3v3 = reset_n_5v; 75 | 76 | // ~nubus_master_dir-controlled signals 77 | //assign start_o_5v = nubus_oe ? 'bZ : ( nubus_master_dir ? start_n_3v3 : 'bZ); // master out 78 | assign start_o_n = nubus_oe ? 1 : ( nubus_master_dir ? start_n_3v3 : 1); // master out 79 | assign start_oe_n = nubus_oe ? 1 : ( nubus_master_dir ? 0 : 1); // master out 80 | assign start_n_3v3 = nubus_oe ? 'bZ : (~nubus_master_dir ? start_n_5v : 'bZ); // master in 81 | 82 | // rqst_o_n is always driven (the 74lvt125 wired as open collector will convert 1 to Z) and is active low 83 | assign rqst_o_n = nubus_oe ? 1 : (~fpga_to_cpld_signal ? rqst_n_3v3 : 1); // master out 84 | assign rqst_n_3v3 = nubus_oe ? 'bZ : ( fpga_to_cpld_signal ? rqst_n_5v : 'bZ); // master in 85 | //assign rqst_n_3v3 = rqst_n_5v; // master in, always on 86 | 87 | //assign ack_o_5v = nubus_oe ? 'bZ : ((nubus_master_dir ^ ~tmoen) ? ack_n_3v3 : 'bZ); // slave out/in 88 | assign ack_o_n = nubus_oe ? 1 : (( ~tmoen) ? ack_n_3v3 : 1); // slave out/in 89 | assign ack_oe_n = nubus_oe ? 1 : (( ~tmoen) ? 0 : 1); // slave out/in 90 | assign ack_n_3v3 = nubus_oe ? 'bZ : (( tmoen) ? ack_n_5v : 'bZ); // slave out/in 91 | 92 | //assign tm0_n_5v = nubus_oe ? 'bZ : ((nubus_master_dir ^ ~tmoen) ? tm0_n_3v3 : 'bZ); // slave out/in 93 | //assign tm1_n_5v = nubus_oe ? 'bZ : ((nubus_master_dir ^ ~tmoen) ? tm1_n_3v3 : 'bZ); // slave out/in 94 | assign tm0_o_n = nubus_oe ? 1 : (( ~tmoen) ? tm0_n_3v3 : 1); // slave out/in 95 | assign tm1_o_n = nubus_oe ? 1 : (( ~tmoen) ? tm1_n_3v3 : 1); // slave out/in 96 | assign tmx_oe_n = nubus_oe ? 1 : (( ~tmoen) ? 0 : 1); // slave out/in 97 | assign tm0_n_3v3 = nubus_oe ? 'bZ : (( tmoen) ? tm0_n_5v : 'bZ); // slave in/out 98 | assign tm1_n_3v3 = nubus_oe ? 'bZ : (( tmoen) ? tm1_n_5v : 'bZ); // slave in/out 99 | 100 | nubus_arbiter UArbiter 101 | ( 102 | .idn(id_n_5v), 103 | .arbn(arb_n_5v), 104 | .arbon(arb_o_n), 105 | .arbcyn(arbcy_n), 106 | .grant(grant) 107 | ); 108 | 109 | endmodule // nubus_cpld 110 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_cpldinfpga.v: -------------------------------------------------------------------------------- 1 | module nubus_cpldinfpga 2 | ( 3 | // Control 4 | input nubus_oe, // disable all 5v drivers 5 | input tmoen, // tm output enable 6 | input nubus_master_dir, // direction of signals, i.e. are we in master mode 7 | 8 | // Spares 9 | input rqst_oe_n, // rqstoen (extra line from FPGA to CPLD) 10 | 11 | // NuBus 12 | input [3:0] id_n_3v3, // nubus ID of this card to FPGA 13 | 14 | // NuBus Arbiter 15 | input arbcy_n, // enable arbitter 16 | input [3:0] arb_n_3v3, // NuBus arbiter's lines 17 | output [3:0] arb_o_n, // NuBus arbiter's control lines 18 | output grant, // Grant access 19 | 20 | // Cycle Control (NuBus two-way) 21 | input tm0_n_3v3, // nubus tm0 to/from FPGA 22 | output tm0_o_n, // start from NuBus 23 | 24 | input tm1_n_3v3, // nubus tm1 to/from FPGA 25 | output tm1_o_n, // start from NuBus 26 | output tmx_oe_n, // start from NuBus 27 | 28 | input tm2_n_3v3, // nubus tm2 to/from FPGA 29 | output tm2_o_n, // start from NuBus 30 | output tm2_oe_n, // start from NuBus 31 | 32 | input start_n_3v3, // start to/from FPGA 33 | output start_o_n, // start from NuBus 34 | output start_oe_n, // start from NuBus 35 | 36 | input ack_n_3v3, // ack from/to FPGA 37 | output ack_o_n, // ack to NuBus 38 | output ack_oe_n, // ack OE NuBus 39 | 40 | // Master Request (OC) 41 | input rqst_n_3v3, // rqst from/to FPGA 42 | output rqst_o_n // rqst to NuBus 43 | ); 44 | 45 | // placeholders 46 | assign tm2_o_n = 0; 47 | assign tm2_oe_n = 1; 48 | 49 | // ~nubus_master_dir-controlled signals 50 | assign start_o_n = nubus_oe ? 1 : ( nubus_master_dir ? start_n_3v3 : 1); // master out 51 | assign start_oe_n = nubus_oe ? 1 : ( nubus_master_dir ? 0 : 1); // master out 52 | 53 | // rqst_o_n is always driven (the 74lvt125 wired as open collector will convert 1 to Z) and is active low 54 | assign rqst_o_n = nubus_oe ? 1 : (~rqst_oe_n ? rqst_n_3v3 : 1); // master out 55 | 56 | assign ack_o_n = nubus_oe ? 1 : (( ~tmoen) ? ack_n_3v3 : 1); // slave out/in 57 | assign ack_oe_n = nubus_oe ? 1 : (( ~tmoen) ? 0 : 1); // slave out/in 58 | 59 | assign tm0_o_n = nubus_oe ? 1 : (( ~tmoen) ? tm0_n_3v3 : 1); // slave out/in 60 | assign tm1_o_n = nubus_oe ? 1 : (( ~tmoen) ? tm1_n_3v3 : 1); // slave out/in 61 | assign tmx_oe_n = nubus_oe ? 1 : (( ~tmoen) ? 0 : 1); // slave out/in 62 | 63 | nubus_arbiter UArbiter 64 | ( 65 | .idn(id_n_3v3), 66 | .arbn(arb_n_3v3), 67 | .arbon(arb_o_n), 68 | .arbcyn(arbcy_n), 69 | .grant(grant) 70 | ); 71 | 72 | endmodule // nubus_cpld 73 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_cpu_wb.py: -------------------------------------------------------------------------------- 1 | from migen import * 2 | from migen.genlib.fifo import * 3 | 4 | import litex 5 | from litex.soc.interconnect import wishbone 6 | 7 | from migen.genlib.cdc import BusSynchronizer 8 | 9 | class Wishbone2NuBus(Module): 10 | def __init__(self, nubus, wb): 11 | 12 | # cpu 13 | # input cpu_valid, 14 | # input [31:0] cpu_addr, 15 | # input [31:0] cpu_wdata, 16 | # input [ 3:0] cpu_write, 17 | # output cpu_ready, 18 | # output [31:0] cpu_rdata, 19 | #input cpu_lock, 20 | #input cpu_eclr, 21 | #output [3:0] cpu_errors, 22 | 23 | #wb_adr_rev = Signal(32) 24 | #self.comb += [ wb_adr_rev[ 0: 8].eq(wb.adr[22:30]), 25 | # wb_adr_rev[ 8:16].eq(wb.adr[14:22]), 26 | # wb_adr_rev[16:24].eq(wb.adr[ 6:14]), 27 | # wb_adr_rev[24:32].eq(Cat(Signal(2, reset = 0),wb.adr[ 0: 6])), ] 28 | 29 | self.comb += nubus.cpu_valid.eq(wb.cyc & wb.stb) 30 | self.comb += nubus.cpu_addr.eq(Cat(Signal(2, reset = 0), wb.adr)) 31 | #self.comb += nubus.cpu_addr.eq(wb_adr_rev) 32 | self.comb += nubus.cpu_wdata.eq(wb.dat_w) 33 | self.comb += If(wb.we == 1, 34 | nubus.cpu_write.eq(wb.sel)).Else( 35 | nubus.cpu_write.eq(0)) 36 | self.comb += wb.ack.eq(nubus.cpu_ready) 37 | self.comb += wb.dat_r.eq(nubus.cpu_rdata) 38 | self.comb += nubus.cpu_lock.eq(0) # FIXME: TODO: ??? 39 | self.comb += nubus.cpu_eclr.eq(0) # FIXME: TODO: ??? 40 | 41 | #pad_user_led_0 = platform.request("user_led", 0) 42 | #pad_user_led_1 = platform.request("user_led", 1) 43 | #self.comb += pad_user_led_0.eq(nubus.cpu_valid) 44 | #cpu_valid_ex = Signal(reset = 0) 45 | #self.sync += cpu_valid_ex.eq(nubus.cpu_valid | cpu_valid_ex) 46 | #self.comb += pad_user_led_1.eq(cpu_valid_ex) 47 | 48 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_master_tst.py: -------------------------------------------------------------------------------- 1 | from migen import * 2 | from migen.genlib.fifo import * 3 | 4 | import litex 5 | from litex.soc.interconnect import wishbone 6 | 7 | class PingMaster(Module): 8 | def __init__(self, nubus, platform): 9 | self.bus_slv = bus_slv = wishbone.Interface() 10 | self.bus_mst = bus_mst = wishbone.Interface() 11 | 12 | #led0 = platform.request("user_led", 0) 13 | #led1 = platform.request("user_led", 1) 14 | 15 | valu_reg = Signal(32) 16 | waddr_reg = Signal(32) 17 | raddr_reg = Signal(32) 18 | writ_del = Signal(6) 19 | read_del = Signal(6) 20 | do_write = Signal() 21 | do_read = Signal() 22 | #waddr_reg_rev = Signal(32) 23 | #self.comb += [ waddr_reg_rev[ 0: 8].eq(waddr_reg[24:32]), 24 | # waddr_reg_rev[ 8:16].eq(waddr_reg[16:24]), 25 | # waddr_reg_rev[16:24].eq(waddr_reg[ 8:16]), 26 | # waddr_reg_rev[24:32].eq(waddr_reg[ 0: 8]), ] 27 | 28 | self.sync += [ If(writ_del != 0, 29 | writ_del.eq(writ_del - 1),), 30 | If(writ_del == 1, 31 | do_write.eq(1), 32 | ), 33 | If(read_del != 0, 34 | read_del.eq(read_del - 1),), 35 | If(read_del == 1, 36 | do_read.eq(1), 37 | ) 38 | ] 39 | 40 | self.submodules.wishbone_fsm = wishbone_fsm = FSM(reset_state = "Reset") 41 | wishbone_fsm.act("Reset", 42 | NextValue(bus_slv.ack, 0), 43 | NextState("Idle")) 44 | wishbone_fsm.act("Idle", 45 | If(bus_slv.cyc & bus_slv.stb & bus_slv.we & ~bus_slv.ack, #write 46 | # FIXME: should check for prefix? 47 | Case(bus_slv.adr[0:2], { 48 | 0x0: [ NextValue(valu_reg, bus_slv.dat_w[0:32]), ], 49 | 0x1: [ NextValue(waddr_reg, bus_slv.dat_w[0:32]), 50 | NextValue(writ_del, 3), ], 51 | 0x2: [ NextValue(raddr_reg, bus_slv.dat_w[0:32]), 52 | NextValue(read_del, 3), ], 53 | }), 54 | NextValue(bus_slv.ack, 1), 55 | ).Elif(bus_slv.cyc & bus_slv.stb & ~bus_slv.we & ~bus_slv.ack, #read 56 | Case(bus_slv.adr[0:2], { 57 | 0x0: [ NextValue(bus_slv.dat_r, valu_reg), ], 58 | 0x1: [ NextValue(bus_slv.dat_r, waddr_reg), ], 59 | 0x2: [ NextValue(bus_slv.dat_r, raddr_reg), ], 60 | }), 61 | NextValue(bus_slv.ack, 1), 62 | ).Else( 63 | NextValue(bus_slv.ack, 0), 64 | ) 65 | ) 66 | 67 | self.submodules.writer_fsm = writer_fsm = FSM(reset_state = "Reset") 68 | writer_fsm.act("Reset", 69 | NextState("Idle"),) 70 | writer_fsm.act("Idle", 71 | If(do_write, 72 | NextValue(do_write, 0), 73 | bus_mst.cyc.eq(1), 74 | bus_mst.stb.eq(1), 75 | bus_mst.we.eq(1), 76 | bus_mst.dat_w.eq(valu_reg), 77 | bus_mst.adr.eq(waddr_reg[2:32]), 78 | bus_mst.sel.eq(0xf), 79 | If(bus_mst.ack, 80 | NextState("Idle") 81 | ).Else( 82 | NextState("Write") 83 | ) 84 | ).Elif(do_read, 85 | NextValue(do_read, 0), 86 | bus_mst.cyc.eq(1), 87 | bus_mst.stb.eq(1), 88 | bus_mst.we.eq(0), 89 | bus_mst.adr.eq(raddr_reg[2:32]), 90 | bus_mst.sel.eq(0xf), 91 | NextState("Read"), 92 | ) 93 | ) 94 | writer_fsm.act("Write", 95 | bus_mst.cyc.eq(1), 96 | bus_mst.stb.eq(1), 97 | bus_mst.we.eq(1), 98 | bus_mst.dat_w.eq(valu_reg), 99 | bus_mst.adr.eq(waddr_reg[2:32]), 100 | bus_mst.sel.eq(0xf), 101 | If(bus_mst.ack, 102 | NextState("Idle") 103 | ), 104 | ) 105 | writer_fsm.act("Read", 106 | bus_mst.cyc.eq(1), 107 | bus_mst.stb.eq(1), 108 | bus_mst.we.eq(0), 109 | bus_mst.adr.eq(raddr_reg[2:32]), 110 | bus_mst.sel.eq(0xf), 111 | If(bus_mst.ack, 112 | NextValue(valu_reg, bus_mst.dat_r), 113 | NextState("Idle") 114 | ), 115 | ) 116 | 117 | #self.comb += [ led0.eq(bus_mst.cyc), 118 | # led1.eq(writ_del != 0), ] 119 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_mem_wb.py: -------------------------------------------------------------------------------- 1 | from migen import * 2 | from migen.genlib.fifo import * 3 | 4 | import litex 5 | from litex.soc.interconnect import wishbone 6 | 7 | from migen.genlib.cdc import BusSynchronizer 8 | 9 | class NuBus2Wishbone(Module): 10 | def __init__(self, nubus, wb): 11 | 12 | # memory 13 | # nubus.mem_valid 14 | # nubus.mem_addr 15 | # nubus.mem_wdata 16 | # nubus.mem_write 17 | # nubus.mem_ready 18 | # nubus.mem_rdata 19 | #nubus.mem_error 20 | #nubus.mem_tryagain 21 | 22 | assert(len(wb.dat_r) == 32) 23 | assert(len(nubus.mem_wdata) == 32) 24 | assert(len(nubus.mem_write) == 4) 25 | 26 | #wb_dat_r_rev = Signal(32) 27 | #self.comb += [ wb_dat_r_rev[ 0: 8].eq(wb.dat_r[24:32]), 28 | # wb_dat_r_rev[ 8:16].eq(wb.dat_r[16:24]), 29 | # wb_dat_r_rev[16:24].eq(wb.dat_r[ 8:16]), 30 | # wb_dat_r_rev[24:32].eq(wb.dat_r[ 0: 8]), ] 31 | #nubus_mem_wdata_rev = Signal(32) 32 | #self.comb += [ nubus_mem_wdata_rev[ 0: 8].eq(nubus.mem_wdata[24:32]), 33 | # nubus_mem_wdata_rev[ 8:16].eq(nubus.mem_wdata[16:24]), 34 | # nubus_mem_wdata_rev[16:24].eq(nubus.mem_wdata[ 8:16]), 35 | # nubus_mem_wdata_rev[24:32].eq(nubus.mem_wdata[ 0: 8]), ] 36 | #nubus_mem_write_rev = Signal(4) 37 | #self.comb += [ nubus_mem_write_rev[0].eq(nubus.mem_write[3]), 38 | # nubus_mem_write_rev[1].eq(nubus.mem_write[2]), 39 | # nubus_mem_write_rev[2].eq(nubus.mem_write[1]), 40 | # nubus_mem_write_rev[3].eq(nubus.mem_write[0]), ] 41 | 42 | self.comb += wb.cyc.eq(nubus.mem_valid) 43 | self.comb += wb.stb.eq(nubus.mem_valid) 44 | self.comb += wb.we.eq(nubus.mem_write != 0) 45 | 46 | self.comb += [ 47 | If(~nubus.mem_addr[23], # first 8 MiB of slot space: remap to last 8 Mib of SDRAM 48 | wb.adr.eq(Cat(nubus.mem_addr[2:23], Signal(1, reset=1), Signal(8, reset = 0x8f))), # 0x8f8... 49 | ).Else( # second 8 MiB: direct access 50 | wb.adr.eq(Cat(nubus.mem_addr[2:24], Signal(8, reset = 0xf0)))), # 24 bits, a.k.a 22 bits of words 51 | ] 52 | 53 | self.comb += If(nubus.mem_write == 0, 54 | wb.sel.eq(0xF)).Else( 55 | wb.sel.eq(nubus.mem_write)) 56 | self.comb += [ 57 | wb.dat_w.eq(nubus.mem_wdata), 58 | nubus.mem_rdata.eq(wb.dat_r), 59 | ] 60 | #self.comb += If(nubus.mem_write == 0, 61 | # wb.sel.eq(0xF)).Else( 62 | # wb.sel.eq(nubus_mem_write_rev)) 63 | #self.comb += [ 64 | # wb.dat_w.eq(nubus_mem_wdata_rev), 65 | # nubus.mem_rdata.eq(wb_dat_r_rev), 66 | #] 67 | 68 | self.comb += nubus.mem_ready.eq(wb.ack) 69 | self.comb += nubus.mem_error.eq(0) # FIXME: TODO: ??? 70 | self.comb += nubus.mem_tryagain.eq(0) # FIXME: TODO: ??? 71 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_memfifo_wb.py: -------------------------------------------------------------------------------- 1 | from migen import * 2 | from migen.genlib.fifo import * 3 | 4 | import litex 5 | from litex.soc.interconnect import wishbone 6 | 7 | from migen.genlib.cdc import BusSynchronizer 8 | 9 | class NuBus2WishboneFIFO(Module): 10 | def __init__(self, platform, nubus, wb_read, wb_write): 11 | 12 | # memory 13 | # nubus.mem_valid 14 | # nubus.mem_addr 15 | # nubus.mem_wdata 16 | # nubus.mem_write 17 | # nubus.mem_ready 18 | # nubus.mem_rdata 19 | #nubus.mem_error 20 | #nubus.mem_tryagain 21 | 22 | assert(len(wb_read.dat_r) == 32) 23 | assert(len(nubus.mem_wdata) == 32) 24 | assert(len(nubus.mem_write) == 4) 25 | 26 | write_fifo_layout = [ 27 | ("adr", 32), 28 | ("data", 32), 29 | ("sel", 4), 30 | ] 31 | self.submodules.write_fifo = write_fifo = ClockDomainsRenamer({"read": "sys", "write": "nubus"})(AsyncFIFOBuffered(width=layout_len(write_fifo_layout), depth=8)) 32 | write_fifo_dout = Record(write_fifo_layout) 33 | self.comb += write_fifo_dout.raw_bits().eq(write_fifo.dout) 34 | write_fifo_din = Record(write_fifo_layout) 35 | self.comb += write_fifo.din.eq(write_fifo_din.raw_bits()) 36 | 37 | self.comb += wb_read.cyc.eq(nubus.mem_valid & (nubus.mem_write == 0)) # only handle reads 38 | self.comb += wb_read.stb.eq(nubus.mem_valid & (nubus.mem_write == 0)) # only handle reads 39 | self.comb += wb_read.we.eq(0) #(nubus.mem_write != 0) 40 | 41 | self.comb += [ 42 | If(~nubus.mem_addr[23], # first 8 MiB of slot space: remap to last 8 Mib of SDRAM 43 | wb_read.adr.eq(Cat(nubus.mem_addr[2:23], Signal(1, reset=1), Signal(8, reset = 0x8f))), # 0x8f8... 44 | ).Else( # second 8 MiB: direct access 45 | wb_read.adr.eq(Cat(nubus.mem_addr[2:24], Signal(8, reset = 0xf0)))), # 24 bits, a.k.a 22 bits of words 46 | ] 47 | 48 | #self.comb += If(nubus.mem_write == 0, 49 | # wb_read.sel.eq(0xF)).Else( 50 | # wb_read.sel.eq(nubus.mem_write)) 51 | self.comb += [ 52 | #wb_read.dat_w.eq(nubus.mem_wdata), 53 | wb_read.sel.eq(0xF), 54 | nubus.mem_rdata.eq(wb_read.dat_r), 55 | ] 56 | 57 | write_ack = Signal() 58 | self.comb += nubus.mem_ready.eq(wb_read.ack | write_ack) 59 | self.comb += nubus.mem_error.eq(0) # FIXME: TODO: ??? 60 | self.comb += nubus.mem_tryagain.eq(0) # FIXME: TODO: ??? 61 | 62 | #led0 = platform.request("user_led", 0) 63 | #led1 = platform.request("user_led", 1) 64 | #self.comb += [ led0.eq(wb_read.ack), 65 | # led1.eq(write_ack), ] 66 | 67 | #self.submodules.write_fsm = write_fsm = FSM(reset_state = "Reset") 68 | #write_fsm.act("Reset", 69 | # NextState("Idle")) 70 | #write_fsm.act("Idle",) 71 | 72 | # in NuBus 73 | #self.comb += [ write_fifo.we.eq(write_fifo.writable & nubus.mem_valid & (nubus.mem_write != 0)), 74 | # write_ack.eq(write_fifo.writable & nubus.mem_valid & (nubus.mem_write != 0)) 75 | #] 76 | #self.comb += [ write_fifo_din.adr.eq(nubus.mem_addr), 77 | # write_fifo_din.data.eq(nubus.mem_wdata), 78 | # write_fifo_din.sel.eq(nubus.mem_write), 79 | #] 80 | 81 | self.submodules.write_fsm = write_fsm = ClockDomainsRenamer("nubus")(FSM(reset_state = "Reset")) 82 | write_fsm.act("Reset", 83 | NextState("Idle")) 84 | write_fsm.act("Idle", 85 | If(nubus.mem_valid & (nubus.mem_write != 0), # & write_fifo.writable), 86 | NextState("WriteFifo"), 87 | ) 88 | ) 89 | write_fsm.act("WriteFifo", 90 | write_fifo.we.eq(1), 91 | write_ack.eq(1), # the one cycle delay is needed for the tmO -> nubus.mem_write -> ack dependency chain 92 | NextState("WaitForNuBus"), 93 | ) 94 | write_fsm.act("WaitForNuBus", 95 | If(~nubus.mem_valid, 96 | NextState("Idle"), 97 | ) 98 | ) 99 | self.comb += [ write_fifo_din.adr.eq(nubus.mem_addr), 100 | write_fifo_din.data.eq(nubus.mem_wdata), 101 | write_fifo_din.sel.eq(nubus.mem_write), 102 | ] 103 | 104 | self.comb += [ wb_write.cyc.eq(write_fifo.readable), 105 | wb_write.stb.eq(write_fifo.readable), 106 | wb_write.we.eq(1), 107 | If(~write_fifo_dout.adr[23], # first 8 MiB of slot space: remap to last 8 Mib of SDRAM 108 | wb_write.adr.eq(Cat(write_fifo_dout.adr[2:23], Signal(1, reset=1), Signal(8, reset = 0x8f))), # 0x8f8... 109 | ).Else( # second 8 MiB: direct access 110 | wb_write.adr.eq(Cat(write_fifo_dout.adr[2:24], Signal(8, reset = 0xf0)))), # 24 bits, a.k.a 22 bits of words 111 | wb_write.dat_w.eq(write_fifo_dout.data), 112 | wb_write.sel.eq(write_fifo_dout.sel), 113 | write_fifo.re.eq(wb_write.ack), 114 | ] 115 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_sampling.v: -------------------------------------------------------------------------------- 1 | /* 2 | * NuBus sampling 3 | * 4 | * Romain Dolbeau for the NuBusFPGA 5 | * Copyright (c) 2021022 6 | */ 7 | 8 | /* This module is running on the FPGA */ 9 | 10 | module nubus_sampling 11 | ( 12 | /* *** NuBus signals *** */ 13 | /* those are connected to the FPGA */ 14 | /* connected via the CPLD */ 15 | input nub_clkn, // Clock (rising is driving edge, faling is sampling) 16 | input nub_resetn, // Reset 17 | //input [ 3:0] nub_idn, // Slot Identification 18 | input nub_tm0n, // Transfer Mode 19 | input nub_tm1n, // Transfer Mode 20 | input nub_startn, // Start 21 | input nub_rqstn, // Request 22 | input nub_ackn, // Acknowledge 23 | 24 | // connected via the CPLD but NuBus90 (unimplemented) 25 | //input nub_clk2xn, 26 | //inout nub_tm2n, 27 | 28 | /* connected via the 74LVT245 */ 29 | input [31:0] nub_adn, // Address/Data 30 | 31 | /* those are not used, and not even connected in the board */ 32 | // inout nub_pfwn, // Power Fail Warning 33 | // inout nub_spn, // System Parity 34 | // inout nub_spvn, // System Parity Valid 35 | 36 | /* those ared used but handled in directly in the Litex code */ 37 | // output nub_nmrqn, // Non-Master Request, handled in the Litex code 38 | 39 | /* those are used but connected only to the CPLD */ 40 | /* we deal with the CPLD via 'arbcy_n' and 'grant' */ 41 | // inout [ 3:0] nub_arbn, // Arbitration 42 | 43 | output tm0, 44 | output tm1, 45 | output start, 46 | output rqst, 47 | output ack, 48 | output [31:0] ad, 49 | 50 | output [3:0] sel, 51 | output block, 52 | output busy 53 | ); 54 | 55 | reg reg_tm0n, reg_tm1n; 56 | reg reg_startn; 57 | reg reg_rqstn; 58 | reg reg_ackn; 59 | reg [31:0] reg_adn; 60 | reg reg_busy; 61 | 62 | 63 | always @(negedge nub_clkn) begin: proc_sampling 64 | if (~nub_resetn) begin 65 | reg_tm0n <= 1; 66 | reg_tm1n <= 1; 67 | reg_startn <= 1; 68 | reg_rqstn <= 1; 69 | reg_ackn <= 1; 70 | reg_adn <= 0; 71 | reg_busy <= 0; 72 | end else begin 73 | reg_tm0n <= nub_tm0n; 74 | reg_tm1n <= nub_tm1n; 75 | reg_startn <= nub_startn; 76 | reg_rqstn <= nub_rqstn; 77 | reg_ackn <= nub_ackn; 78 | reg_adn <= nub_adn; 79 | reg_busy <= ~reg_busy & nub_ackn & ~nub_startn /* beginning of transaction */ 80 | | reg_busy & nub_ackn & nub_resetn; /* hold during cycle */ 81 | end 82 | end 83 | 84 | assign tm0 = ~reg_tm0n; 85 | assign tm1 = ~reg_tm1n; 86 | assign start = ~reg_startn; 87 | assign rqst = ~reg_rqstn; 88 | assign ack = ~reg_ackn; 89 | assign ad = ~reg_adn; 90 | assign busy = reg_busy; 91 | 92 | // write selector for Wishbone 93 | assign sel[3] = ~reg_tm1n & ~reg_adn[1] & ~reg_adn[0] & ~reg_tm0n /* Byte 3 */ 94 | | ~reg_tm1n & ~reg_adn[1] & ~reg_adn[0] & reg_tm0n /* Half 1 */ 95 | | ~reg_tm1n & reg_adn[1] & reg_adn[0] & reg_tm0n /* Word */ 96 | ; 97 | assign sel[2] = ~reg_tm1n & ~reg_adn[1] & reg_adn[0] & ~reg_tm0n /* Byte 2 */ 98 | | ~reg_tm1n & ~reg_adn[1] & ~reg_adn[0] & reg_tm0n /* Half 1 */ 99 | | ~reg_tm1n & reg_adn[1] & reg_adn[0] & reg_tm0n /* Word */ 100 | ; 101 | assign sel[1] = ~reg_tm1n & reg_adn[1] & ~reg_adn[0] & ~reg_tm0n /* Byte 1 */ 102 | | ~reg_tm1n & reg_adn[1] & ~reg_adn[0] & reg_tm0n /* Half 0 */ 103 | | ~reg_tm1n & reg_adn[1] & reg_adn[0] & reg_tm0n /* Word */ 104 | ; 105 | assign sel[0] = ~reg_tm1n & reg_adn[1] & reg_adn[0] & ~reg_tm0n /* Byte 0 */ 106 | | ~reg_tm1n & reg_adn[1] & ~reg_adn[0] & reg_tm0n /* Half 0 */ 107 | | ~reg_tm1n & reg_adn[1] & reg_adn[0] & reg_tm0n /* Word */ 108 | ; 109 | 110 | assign block = ~reg_adn[1] & reg_adn[0] & reg_tm0n; // 1x block write or 1x block read 111 | 112 | endmodule 113 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/nubus_stat.py: -------------------------------------------------------------------------------- 1 | from migen import * 2 | from migen.genlib.fifo import * 3 | from migen.genlib.cdc import BusSynchronizer 4 | 5 | import litex 6 | from litex.soc.interconnect import wishbone 7 | 8 | class NuBusStat(Module): 9 | def __init__(self, nubus, platform): 10 | self.bus_slv = bus_slv = wishbone.Interface() 11 | 12 | read_ctr = Signal(32) 13 | writ_ctr = Signal(32) 14 | 15 | self.submodules.sync_read_ctr = BusSynchronizer(width = 32, idomain="nubus", odomain="sys") 16 | self.submodules.sync_writ_ctr = BusSynchronizer(width = 32, idomain="nubus", odomain="sys") 17 | self.comb += [ 18 | self.sync_read_ctr.i.eq(nubus.read_ctr), 19 | read_ctr.eq(self.sync_read_ctr.o), 20 | self.sync_writ_ctr.i.eq(nubus.writ_ctr), 21 | writ_ctr.eq(self.sync_writ_ctr.o), 22 | ] 23 | 24 | self.submodules.wishbone_fsm = wishbone_fsm = FSM(reset_state = "Reset") 25 | wishbone_fsm.act("Reset", 26 | NextValue(bus_slv.ack, 0), 27 | NextState("Idle")) 28 | wishbone_fsm.act("Idle", 29 | If(bus_slv.cyc & bus_slv.stb & bus_slv.we & ~bus_slv.ack, #write 30 | # FIXME: should check for prefix? 31 | #Case(bus_slv.adr[0:10], { 32 | # 0x0: [ NextValue(read_ctr, bus_slv.dat_w[0:32]), ], 33 | # 0x1: [ NextValue(write_ctr, bus_slv.dat_w[0:32]), ], 34 | #}), 35 | NextValue(bus_slv.ack, 1), 36 | ).Elif(bus_slv.cyc & bus_slv.stb & ~bus_slv.we & ~bus_slv.ack, #read 37 | Case(bus_slv.adr[0:10], { 38 | 0x0: [ NextValue(bus_slv.dat_r, Cat(read_ctr[24:32], read_ctr[16:24], read_ctr[ 8:16], read_ctr[ 0: 8])), ], 39 | 0x1: [ NextValue(bus_slv.dat_r, Cat(writ_ctr[24:32], writ_ctr[16:24], writ_ctr[ 8:16], writ_ctr[ 0: 8])), ], 40 | }), 41 | NextValue(bus_slv.ack, 1), 42 | ).Else( 43 | NextValue(bus_slv.ack, 0), 44 | ) 45 | ) 46 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/post_process_timings.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | FILE=$1 4 | 5 | sed -e 's/ad_n\([0-9]*\)/ad_3v3_n[\1]/' \ 6 | -e 's/clk_n/clk_3v3_n/' \ 7 | -e 's/rqst_n/rqst_3v3_n/' \ 8 | -e 's/start_n/start_3v3_n/' \ 9 | -e 's/ack_n/ack_3v3_n/' \ 10 | -e 's/clk_n/clk_3v3_n/' \ 11 | -e 's/tm_n\([0-9]*\)/tm\1_3v3_n/' \ 12 | -e 's/clk_3v3_n/nubus_clk/g' \ 13 | $FILE | grep -v 'nubus_clk.*nubus_clk' | grep '^set' | tee $2 14 | 15 | 16 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/sn74cb3t3125.v: -------------------------------------------------------------------------------- 1 | module sn74cb3t3125 2 | ( 3 | input [3:0] oe_n, 4 | output [3:0] A, 5 | input [3:0] B 6 | ); 7 | 8 | /* 9 | wire [3:0] tA; 10 | wire [3:0] tB; 11 | 12 | assign A[0] = oe_n[0] ? 'bZ : tA[0]; 13 | assign A[1] = oe_n[1] ? 'bZ : tA[1]; 14 | assign A[2] = oe_n[2] ? 'bZ : tA[2]; 15 | assign A[3] = oe_n[3] ? 'bZ : tA[3]; 16 | assign B[0] = oe_n[0] ? 'bZ : tB[0]; 17 | assign B[1] = oe_n[1] ? 'bZ : tB[1]; 18 | assign B[2] = oe_n[2] ? 'bZ : tB[2]; 19 | assign B[3] = oe_n[3] ? 'bZ : tB[3]; 20 | 21 | assign tA[0] = A[0] === 'bZ ? B[0] : 'bZ; 22 | assign tA[1] = A[1] === 'bZ ? B[1] : 'bZ; 23 | assign tA[2] = A[2] === 'bZ ? B[2] : 'bZ; 24 | assign tA[3] = A[3] === 'bZ ? B[3] : 'bZ; 25 | assign tB[0] = B[0] === 'bZ ? A[0] : 'bZ; 26 | assign tB[1] = B[1] === 'bZ ? A[1] : 'bZ; 27 | assign tB[2] = B[2] === 'bZ ? A[2] : 'bZ; 28 | assign tB[3] = B[3] === 'bZ ? A[3] : 'bZ; 29 | */ 30 | 31 | assign A[0] = oe_n[0] ? 'bZ : B[0]; 32 | assign A[1] = oe_n[1] ? 'bZ : B[1]; 33 | assign A[2] = oe_n[2] ? 'bZ : B[2]; 34 | assign A[3] = oe_n[3] ? 'bZ : B[3]; 35 | 36 | 37 | endmodule // sn74cb3t3125 38 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/sn74cb3t3245.v: -------------------------------------------------------------------------------- 1 | module sn74cb3t3245 2 | ( 3 | input oe_n, 4 | output [7:0] A, 5 | input [7:0] B 6 | ); 7 | 8 | assign A[0] = oe_n ? 'bZ : B[0]; 9 | assign A[1] = oe_n ? 'bZ : B[1]; 10 | assign A[2] = oe_n ? 'bZ : B[2]; 11 | assign A[3] = oe_n ? 'bZ : B[3]; 12 | assign A[4] = oe_n ? 'bZ : B[4]; 13 | assign A[5] = oe_n ? 'bZ : B[5]; 14 | assign A[6] = oe_n ? 'bZ : B[6]; 15 | assign A[7] = oe_n ? 'bZ : B[7]; 16 | 17 | 18 | endmodule // sn74cb3t3125 19 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/sn74lvt125.v: -------------------------------------------------------------------------------- 1 | module sn74lvt145_quarter 2 | ( 3 | input oe_n, 4 | input in, 5 | output out 6 | ); 7 | 8 | assign out = oe_n ? 'bZ : in; 9 | 10 | endmodule // sn74lvt145_quarter 11 | 12 | 13 | -------------------------------------------------------------------------------- /nubus-to-ztex-gateware/ztex213_nubus.py: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex-gateware/ztex213_nubus.py -------------------------------------------------------------------------------- /nubus-to-ztex/1727034_seeed_dfareporta172464820220211.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex/1727034_seeed_dfareporta172464820220211.xlsx -------------------------------------------------------------------------------- /nubus-to-ztex/691037.pdf: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /nubus-to-ztex/AT30TS74.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /nubus-to-ztex/AT30TS74.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # AT30TS74 5 | # 6 | DEF AT30TS74 U 0 40 Y Y 1 F N 7 | F0 "U" 0 0 50 H V C CNN 8 | F1 "AT30TS74" 0 0 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S -100 -100 350 -500 0 1 0 N 13 | X SDA 1 -200 -150 100 R 50 50 1 1 B 14 | X SCL 2 -200 -250 100 R 50 50 1 1 I 15 | X ALERT 3 -200 -350 100 R 50 50 1 1 O 16 | X GND 4 -200 -450 100 R 50 50 1 1 P 17 | X A2 5 450 -450 100 L 50 50 1 1 I 18 | X A1 6 450 -350 100 L 50 50 1 1 I 19 | X A0 7 450 -250 100 L 50 50 1 1 I 20 | X VCC 8 450 -150 100 L 50 50 1 1 W 21 | ENDDRAW 22 | ENDDEF 23 | # 24 | #End Library 25 | -------------------------------------------------------------------------------- /nubus-to-ztex/DM3CS-SF.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # DM3CS-SF 7 | # 8 | DEF DM3CS-SF P 0 40 Y Y 1 L N 9 | F0 "P" -100 651 50 H V L BNN 10 | F1 "DM3CS-SF" -100 -751 50 H V L BNN 11 | F2 "HRS_DM3CS-SF" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "Hirose Electric Co Ltd" 0 0 50 H I L BNN "MANUFACTURER" 14 | DRAW 15 | S -100 -600 300 600 0 0 10 f 16 | X DAT0 7 -300 0 200 R 40 40 0 0 B 17 | X DAT1 8 -300 -100 200 R 40 40 0 0 B 18 | X DAT2 1 -300 -200 200 R 40 40 0 0 B 19 | X DAT3 2 -300 -300 200 R 40 40 0 0 B 20 | X CMD 3 -300 300 200 R 40 40 0 0 I 21 | X CLK 5 -300 200 200 R 40 40 0 0 I C 22 | X VDD 4 -300 500 200 R 40 40 0 0 W 23 | X VSS 6 -300 -500 200 R 40 40 0 0 P 24 | ENDDRAW 25 | ENDDEF 26 | # 27 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/HDMI_A_Amphenol_10029449-111.kicad_mod: -------------------------------------------------------------------------------- 1 | (module HDMI_A_Amphenol_10029449-111 (layer F.Cu) (tedit 5E1BB628) 2 | (descr "HDMI, Type A, 10029449-111RLF, https://www.amphenol-icc.com/hdmi-10029449111rlf.html") 3 | (tags "HDMI type a connector") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -4.8) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value HDMI_A_Amphenol_10029449-111 (at 0 8.45) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -8.2 1.7) (end -8.2 -1.3) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -8.2 -3.4) (end -5 -3.4) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start -8.2 4.2) (end -8.2 5.2) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start 8.2 5.2) (end 8.2 4.2) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start 8.2 -3.4) (end 8.2 -2.8) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start 8.2 -3.4) (end 5.5 -3.4) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start 5.5 -3.4) (end 5.5 -4.05) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 8.1 -3.3) (end 8.1 6.42) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 8.1 6.42) (end -8.1 6.42) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -8.1 6.42) (end -8.1 -3.3) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -8.1 -3.3) (end 8.1 -3.3) (layer F.Fab) (width 0.1)) 22 | (fp_text user %R (at 0 1.45) (layer F.Fab) 23 | (effects (font (size 1 1) (thickness 0.15))) 24 | ) 25 | (fp_line (start -9 -4.4) (end 9 -4.4) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start 9 -4.4) (end 9 6.92) (layer F.CrtYd) (width 0.05)) 27 | (fp_line (start 9 6.92) (end -9 6.92) (layer F.CrtYd) (width 0.05)) 28 | (fp_line (start -9 6.92) (end -9 -4.4) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start 4.75 -1.8) (end 4.5 -1.3) (layer F.Fab) (width 0.1)) 30 | (fp_line (start 4.5 -1.3) (end 5 -1.3) (layer F.Fab) (width 0.1)) 31 | (fp_line (start 5 -1.3) (end 4.75 -1.8) (layer F.Fab) (width 0.1)) 32 | (fp_line (start -3 5.45) (end 3 5.45) (layer Dwgs.User) (width 0.1)) 33 | (fp_text user "PCB Edge" (at 0 4.7) (layer Dwgs.User) 34 | (effects (font (size 0.5 0.5) (thickness 0.1))) 35 | ) 36 | (fp_line (start -8.2 -3.4) (end -8.2 -2.8) (layer F.SilkS) (width 0.12)) 37 | (fp_line (start 8.2 1.7) (end 8.2 -1.3) (layer F.SilkS) (width 0.12)) 38 | (pad 1 smd rect (at 4.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 39 | (pad 2 smd rect (at 4.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 40 | (pad 3 smd rect (at 3.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 41 | (pad 4 smd rect (at 3.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 42 | (pad 5 smd rect (at 2.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 43 | (pad 6 smd rect (at 2.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 44 | (pad 7 smd rect (at 1.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 45 | (pad 8 smd rect (at 1.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 46 | (pad 9 smd rect (at 0.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 47 | (pad 10 smd rect (at 0.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 48 | (pad 11 smd rect (at -0.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 49 | (pad 12 smd rect (at -0.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 50 | (pad 13 smd rect (at -1.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 51 | (pad 14 smd rect (at -1.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 52 | (pad 15 smd rect (at -2.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 53 | (pad 16 smd rect (at -2.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 54 | (pad 17 smd rect (at -3.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 55 | (pad 18 smd rect (at -3.75 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 56 | (pad 19 smd rect (at -4.25 -2.95) (size 0.3 1.9) (layers F.Cu F.Paste F.Mask)) 57 | (pad SH thru_hole circle (at 7.25 -2.05) (size 2 2) (drill 1.3) (layers *.Cu *.Mask)) 58 | (pad SH thru_hole circle (at -7.25 -2.05) (size 2 2) (drill 1.3) (layers *.Cu *.Mask)) 59 | (pad SH thru_hole circle (at 7.85 2.9) (size 2 2) (drill 1.3) (layers *.Cu *.Mask)) 60 | (pad SH thru_hole circle (at -7.85 2.9) (size 2 2) (drill 1.3) (layers *.Cu *.Mask)) 61 | (model 10029449-111RLF.stp 62 | (offset (xyz 0 0.3 3.5)) 63 | (scale (xyz 1 1 1)) 64 | (rotate (xyz 180 0 0)) 65 | ) 66 | ) 67 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/HRS_DM3CS-SF.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module HRS_DM3CS-SF (layer F.Cu) (tedit 64159E3A) 3 | (descr "") 4 | (attr smd) 5 | (fp_text reference REF** (at -3.831565 -8.649785 0) (layer F.SilkS) 6 | (effects (font (size 1.00170866142 1.00170866142) (thickness 0.15))) 7 | ) 8 | (fp_text value HRS_DM3CS-SF (at 0.62081 8.87629 0) (layer F.Fab) 9 | (effects (font (size 1.00127559055 1.00127559055) (thickness 0.15))) 10 | ) 11 | (pad 8 smd rect (at -4.5 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 12 | (pad 7 smd rect (at -3.4 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 13 | (pad 6 smd rect (at -2.3 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 14 | (pad 5 smd rect (at -1.2 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 15 | (pad 4 smd rect (at -0.1 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 16 | (pad 3 smd rect (at 1.0 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 17 | (pad 2 smd rect (at 2.1 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 18 | (pad 1 smd rect (at 3.2 6.2) (size 0.7 2.0) (layers F.Cu F.Mask F.Paste)) 19 | (pad PAD. smd rect (at -6.6 5.7) (size 1.0 2.6) (layers F.Cu F.Mask F.Paste)) 20 | (pad PAD smd rect (at 6.75 5.7) (size 1.5 2.6) (layers F.Cu F.Mask F.Paste)) 21 | (fp_poly 22 | (pts 23 | (xy -4.45228 -7.2) 24 | (xy -1.75 -7.2) 25 | (xy -1.75 -5.80297) 26 | (xy -4.45228 -5.80297) 27 | ) (layer F.SilkS) (width 0.01) 28 | ) 29 | (fp_poly 30 | (pts 31 | (xy 0.500797 -7.2) 32 | (xy 3.2 -7.2) 33 | (xy 3.2 -5.80924) 34 | (xy 0.500797 -5.80924) 35 | ) (layer F.SilkS) (width 0.01) 36 | ) 37 | (fp_poly 38 | (pts 39 | (xy 4.25745 -7.2) 40 | (xy 5.45 -7.2) 41 | (xy 5.45 -6.01052) 42 | (xy 4.25745 -6.01052) 43 | ) (layer F.SilkS) (width 0.01) 44 | ) 45 | (fp_poly 46 | (pts 47 | (xy -5.05357 -4.3) 48 | (xy 3.75 -4.3) 49 | (xy 3.75 -1.80127) 50 | (xy -5.05357 -1.80127) 51 | ) (layer F.SilkS) (width 0.01) 52 | ) 53 | (fp_poly 54 | (pts 55 | (xy -7.10064 0.6) 56 | (xy -6.5 0.6) 57 | (xy -6.5 4.4004) 58 | (xy -7.10064 4.4004) 59 | ) (layer F.SilkS) (width 0.01) 60 | ) 61 | (fp_poly 62 | (pts 63 | (xy 6.5088 0.6) 64 | (xy 7.1 0.6) 65 | (xy 7.1 4.40596) 66 | (xy 6.5088 4.40596) 67 | ) (layer F.SilkS) (width 0.01) 68 | ) 69 | (fp_line (start -6.9 4.2) (end -6.9 -7.2) (layer F.SilkS) (width 0.127)) 70 | (fp_line (start -6.9 -7.2) (end 6.9 -7.2) (layer F.SilkS) (width 0.127)) 71 | (fp_line (start 6.9 -7.2) (end 6.9 4.2) (layer F.SilkS) (width 0.127)) 72 | (fp_line (start 6.9 4.2) (end 6.9 7.2) (layer F.Fab) (width 0.127)) 73 | (fp_line (start 6.9 7.2) (end 6.0 7.2) (layer F.Fab) (width 0.127)) 74 | (fp_arc (start 4.5 7.2) (end 4.5 5.7) (angle 90.0) (layer F.Fab) (width 0.127)) 75 | (fp_line (start 4.5 5.7) (end 0.0 5.7) (layer F.Fab) (width 0.127)) 76 | (fp_line (start 0.0 5.7) (end -4.6 5.7) (layer F.Fab) (width 0.127)) 77 | (fp_arc (start -4.6 7.2) (end -6.1 7.2) (angle 90.0) (layer F.Fab) (width 0.127)) 78 | (fp_line (start -6.1 7.2) (end -6.9 7.2) (layer F.Fab) (width 0.127)) 79 | (fp_line (start -6.9 7.2) (end -6.9 4.2) (layer F.Fab) (width 0.127)) 80 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/L77HDE15SD1CH4RHNVGA.kicad_mod: -------------------------------------------------------------------------------- 1 | (module L77HDE15SD1CH4RHNVGA (layer F.Cu) (tedit 613DA674) 2 | (fp_text reference REF** (at 25.2 -3.4) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value L77HDE15SD1CH4RHNVGA (at 13.3 -4.7) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start -2.92 -4) (end -2.92 18.22) (layer F.CrtYd) (width 0.15)) 9 | (fp_line (start -2.92 18.22) (end 27.92 18.22) (layer F.CrtYd) (width 0.15)) 10 | (fp_line (start 27.92 -4) (end 27.92 18.22) (layer F.CrtYd) (width 0.15)) 11 | (fp_line (start -2.92 -4) (end 27.92 -4) (layer F.CrtYd) (width 0.15)) 12 | (fp_line (start 0 11.43) (end 25 11.43) (layer F.SilkS) (width 0.15)) 13 | (pad 15 thru_hole circle (at 7.67 2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 14 | (pad 14 thru_hole circle (at 9.96 2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 15 | (pad 13 thru_hole circle (at 12.254 2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 16 | (pad 12 thru_hole circle (at 14.54 2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 17 | (pad 11 thru_hole circle (at 16.83 2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 18 | (pad 10 thru_hole circle (at 8.81 0) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 19 | (pad 9 thru_hole circle (at 11.1 0) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 20 | (pad 8 thru_hole circle (at 13.39 0) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 21 | (pad 7 thru_hole circle (at 15.68 0) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 22 | (pad 6 thru_hole circle (at 17.97 0) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 23 | (pad 5 thru_hole circle (at 7.67 -2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 24 | (pad 4 thru_hole circle (at 9.96 -2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 25 | (pad 3 thru_hole circle (at 12.25 -2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 26 | (pad 2 thru_hole circle (at 14.54 -2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 27 | (pad 1 thru_hole circle (at 16.83 -2.54) (size 1.5 1.5) (drill 1.19) (layers *.Cu *.Mask)) 28 | (pad 0 thru_hole circle (at 25 0) (size 3.5 3.5) (drill 3.05) (layers *.Cu *.Mask)) 29 | (pad 0 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.05) (layers *.Cu *.Mask)) 30 | ) 31 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/MOLEX_87832-1420.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module MOLEX_87832-1420 (layer F.Cu) (tedit 636DF885) 3 | (descr "") 4 | (fp_text reference REF** (at -0.22515 -9.49142 0) (layer F.SilkS) 5 | (effects (font (size 1.00067716535 1.00067716535) (thickness 0.15))) 6 | ) 7 | (fp_text value MOLEX_87832-1420 (at 6.36354 9.520345 0) (layer F.Fab) 8 | (effects (font (size 1.00055905512 1.00055905512) (thickness 0.15))) 9 | ) 10 | (pad 1 smd rect (at -2.13 -6.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 11 | (pad 2 smd rect (at 2.13 -6.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 12 | (pad 3 smd rect (at -2.13 -4.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 13 | (pad 4 smd rect (at 2.13 -4.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 14 | (pad 5 smd rect (at -2.13 -2.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 15 | (pad 6 smd rect (at 2.13 -2.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 16 | (pad 7 smd rect (at -2.13 0.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 17 | (pad 8 smd rect (at 2.13 0.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 18 | (pad 9 smd rect (at -2.13 2.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 19 | (pad 10 smd rect (at 2.13 2.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 20 | (pad 11 smd rect (at -2.13 4.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 21 | (pad 12 smd rect (at 2.13 4.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 22 | (pad 13 smd rect (at -2.13 6.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 23 | (pad 14 smd rect (at 2.13 6.0 270.0) (size 1.0 2.75) (layers F.Cu F.Mask F.Paste)) 24 | (pad None np_thru_hole circle (at 0.0 -5.0) (size 1.05 1.05) (drill 1.05) (layers *.Cu *.Mask)) 25 | (pad None np_thru_hole circle (at 0.0 5.0) (size 1.05 1.05) (drill 1.05) (layers *.Cu *.Mask)) 26 | (fp_line (start 3.15 -8.325) (end 3.15 8.325) (layer F.Fab) (width 0.127)) 27 | (fp_line (start 3.15 8.325) (end -3.15 8.325) (layer F.SilkS) (width 0.127)) 28 | (fp_line (start -3.15 8.325) (end -3.15 -8.325) (layer F.Fab) (width 0.127)) 29 | (fp_line (start -3.15 -8.325) (end 3.15 -8.325) (layer F.SilkS) (width 0.127)) 30 | (fp_line (start 3.75 -8.6) (end 3.75 8.6) (layer F.CrtYd) (width 0.127)) 31 | (fp_line (start 3.75 8.6) (end -3.75 8.6) (layer F.CrtYd) (width 0.127)) 32 | (fp_line (start -3.75 8.6) (end -3.75 -8.6) (layer F.CrtYd) (width 0.127)) 33 | (fp_line (start -3.75 -8.6) (end 3.75 -8.6) (layer F.CrtYd) (width 0.127)) 34 | (fp_circle (center -4.2 -6.05) (end -4.09 -6.05) (layer F.SilkS) (width 0.6096)) 35 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/PinHeader_2x07_P2.00mm_Vertical_For_SeeedStudio.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinHeader_2x07_P2.00mm_Vertical_For_SeeedStudio (layer F.Cu) (tedit 61B75E34) 2 | (descr "Through hole straight pin header, 2x07, 2.00mm pitch, double rows") 3 | (tags "Through hole pin header THT 2x07 2.00mm double row") 4 | (fp_text reference J1 (at 1 -2.06) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value Conn_02x07_Odd_Even (at 1 14.06) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start 0 -1) (end 3 -1) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 3 -1) (end 3 13) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 3 13) (end -1 13) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -1 13) (end -1 0) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -1 0) (end 0 -1) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.06 13.06) (end 3.06 13.06) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -1.06 1) (end -1.06 13.06) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start 3.06 -1.06) (end 3.06 13.06) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start -1.06 1) (end 1 1) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start 1 1) (end 1 -1.06) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start 1 -1.06) (end 3.06 -1.06) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -1.06 0) (end -1.06 -1.06) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start -1.06 -1.06) (end 0 -1.06) (layer F.SilkS) (width 0.12)) 23 | (fp_line (start -1.5 -1.5) (end -1.5 13.5) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -1.5 13.5) (end 3.5 13.5) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start 3.5 13.5) (end 3.5 -1.5) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start 3.5 -1.5) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05)) 27 | (fp_text user %R (at 1 6 90) (layer F.Fab) 28 | (effects (font (size 1 1) (thickness 0.15))) 29 | ) 30 | (pad 1 thru_hole rect (at 0 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 31 | (pad 2 thru_hole oval (at 2 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 32 | (pad 3 thru_hole oval (at 0 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 33 | (pad 4 thru_hole oval (at 2 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 34 | (pad 5 thru_hole oval (at 0 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 35 | (pad 6 thru_hole oval (at 2 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 36 | (pad 7 thru_hole oval (at 0 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 37 | (pad 8 thru_hole oval (at 2 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 38 | (pad 9 thru_hole oval (at 0 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 39 | (pad 10 thru_hole oval (at 2 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 40 | (pad 11 thru_hole oval (at 0 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 41 | (pad 12 thru_hole oval (at 2 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 42 | (pad 13 thru_hole oval (at 0 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 43 | (pad 14 thru_hole oval (at 2 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 44 | (model ${KISYS3DMOD}/Connector_PinHeader_2.00mm.3dshapes/PinHeader_2x07_P2.00mm_Vertical.wrl 45 | (at (xyz 0 0 0)) 46 | (scale (xyz 1 1 1)) 47 | (rotate (xyz 0 0 0)) 48 | ) 49 | ) 50 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/PinSocket_1x02_P2.54mm_Vertical_for_SeeedStudio.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinSocket_1x02_P2.54mm_Vertical_for_SeeedStudio (layer F.Cu) (tedit 61BCBDC6) 2 | (descr "Through hole straight socket strip, 1x02, 2.54mm pitch, single row (from Kicad 4.0.7), script generated") 3 | (tags "Through hole socket strip THT 1x02 2.54mm single row") 4 | (fp_text reference J9 (at 0 -2.77) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value Conn_01x02 (at 0 5.31) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 1.27 -0.635) (end 1.27 3.81) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -1.27 3.81) (end -1.27 -1.27) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start 1.75 -1.8) (end 1.75 4.3) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 1.75 4.3) (end -1.8 4.3) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -1.8 4.3) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 25 | (fp_text user %R (at 0 1.27 90) (layer F.Fab) 26 | (effects (font (size 1 1) (thickness 0.15))) 27 | ) 28 | (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)) 29 | (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask)) 30 | (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x02_P2.54mm_Vertical.wrl 31 | (at (xyz 0 0 0)) 32 | (scale (xyz 1 1 1)) 33 | (rotate (xyz 0 0 0)) 34 | ) 35 | ) 36 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/PinSocket_1x06_P2.54mm_Vertical_For_SeeedStudio.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinSocket_1x06_P2.54mm_Vertical_For_SeeedStudio (layer F.Cu) (tedit 6332C0CF) 2 | (descr "Through hole straight socket strip, 1x06, 2.54mm pitch, single row (from Kicad 4.0.7), script generated") 3 | (tags "Through hole socket strip THT 1x06 2.54mm single row") 4 | (fp_text reference REF** (at 0 -2.77) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value PinSocket_1x06_P2.54mm_Vertical_For_SeeedStudio (at 0 15.47) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -1.27 -1.27) (end 0.635 -1.27) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 0.635 -1.27) (end 1.27 -0.635) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 1.27 -0.635) (end 1.27 13.97) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -1.27 13.97) (end -1.27 -1.27) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -1.33 1.27) (end -1.33 14.03) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -1.33 14.03) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 1.33 1.27) (end 1.33 14.03) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -1.8 -1.8) (end 1.75 -1.8) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start 1.75 -1.8) (end 1.75 14.45) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 1.75 14.45) (end -1.8 14.45) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -1.8 14.45) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 25 | (fp_text user %R (at 0 6.35 90) (layer F.Fab) 26 | (effects (font (size 1 1) (thickness 0.15))) 27 | ) 28 | (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 29 | (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 30 | (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 31 | (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 32 | (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 33 | (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask)) 34 | (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x06_P2.54mm_Vertical.wrl 35 | (at (xyz 0 0 0)) 36 | (scale (xyz 1 1 1)) 37 | (rotate (xyz 0 0 0)) 38 | ) 39 | ) 40 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/PinSocket_2x07_P2.00mm_Vertical_For_SeeedStudio.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PinSocket_2x07_P2.00mm_Vertical_For_SeeedStudio (layer F.Cu) (tedit 61B75CF9) 2 | (descr "Through hole straight socket strip, 2x07, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated") 3 | (tags "Through hole socket strip THT 2x07 2.00mm double row") 4 | (fp_text reference J1 (at -1 -2.5) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value Conn_02x07_Odd_Even (at -1 14.5) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start -3 -1) (end 0 -1) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 0 -1) (end 1 0) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 1 0) (end 1 13) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 1 13) (end -3 13) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -3 13) (end -3 -1) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -3.06 -1.06) (end -1 -1.06) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -3.06 -1.06) (end -3.06 13.06) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -3.06 13.06) (end 1.06 13.06) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start 1.06 1) (end 1.06 13.06) (layer F.SilkS) (width 0.12)) 19 | (fp_line (start -1 1) (end 1.06 1) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -1 -1.06) (end -1 1) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start 1.06 -1.06) (end 1.06 0) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start 0 -1.06) (end 1.06 -1.06) (layer F.SilkS) (width 0.12)) 23 | (fp_line (start -3.5 -1.5) (end 1.5 -1.5) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start 1.5 -1.5) (end 1.5 13.5) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start 1.5 13.5) (end -3.5 13.5) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start -3.5 13.5) (end -3.5 -1.5) (layer F.CrtYd) (width 0.05)) 27 | (fp_text user %R (at -1 6 90) (layer F.Fab) 28 | (effects (font (size 1 1) (thickness 0.15))) 29 | ) 30 | (pad 1 thru_hole rect (at 0 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 31 | (pad 2 thru_hole oval (at -2 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 32 | (pad 3 thru_hole oval (at 0 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 33 | (pad 4 thru_hole oval (at -2 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 34 | (pad 5 thru_hole oval (at 0 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 35 | (pad 6 thru_hole oval (at -2 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 36 | (pad 7 thru_hole oval (at 0 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 37 | (pad 8 thru_hole oval (at -2 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 38 | (pad 9 thru_hole oval (at 0 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 39 | (pad 10 thru_hole oval (at -2 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 40 | (pad 11 thru_hole oval (at 0 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 41 | (pad 12 thru_hole oval (at -2 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 42 | (pad 13 thru_hole oval (at 0 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 43 | (pad 14 thru_hole oval (at -2 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask)) 44 | (model ${KISYS3DMOD}/Connector_PinSocket_2.00mm.3dshapes/PinSocket_2x07_P2.00mm_Vertical.wrl 45 | (at (xyz 0 0 0)) 46 | (scale (xyz 1 1 1)) 47 | (rotate (xyz 0 0 0)) 48 | ) 49 | ) 50 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/QSOP-20_3.9x8.7mm_P0.635mm_Renesas.kicad_mod: -------------------------------------------------------------------------------- 1 | (module QSOP-20_3.9x8.7mm_P0.635mm_Renesas (layer F.Cu) (tedit 5A02F25C) 2 | (descr "20-Lead Plastic Shrink Small Outline Narrow Body (http://www.analog.com/media/en/technical-documentation/data-sheets/ADuM7640_7641_7642_7643.pdf)") 3 | (tags "QSOP 0.635") 4 | (attr smd) 5 | (fp_text reference U9 (at -3 -5.1) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value 74FCT245ATQG (at 0 5.3) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -2.075 3.3) (end -2.075 4.475) (layer F.SilkS) (width 0.12)) 12 | (fp_text user %R (at 0 0) (layer F.Fab) 13 | (effects (font (size 0.8 0.8) (thickness 0.08))) 14 | ) 15 | (fp_line (start -0.95 -4.35) (end 1.95 -4.35) (layer F.Fab) (width 0.1)) 16 | (fp_line (start 1.95 -4.35) (end 1.95 4.35) (layer F.Fab) (width 0.1)) 17 | (fp_line (start 1.95 4.35) (end -1.95 4.35) (layer F.Fab) (width 0.1)) 18 | (fp_line (start -1.95 4.35) (end -1.95 -3.35) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -1.95 -3.35) (end -0.95 -4.35) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -3.71 -4.6) (end -3.71 4.6) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start 3.7 -4.6) (end 3.7 4.6) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start -3.71 -4.6) (end 3.7 -4.6) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start -3.71 4.6) (end 3.7 4.6) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -2.075 4.475) (end 2.075 4.475) (layer F.SilkS) (width 0.12)) 25 | (fp_line (start -2.075 -4.475) (end 2.075 -4.475) (layer F.SilkS) (width 0.12)) 26 | (fp_line (start -3.5 -3.3) (end -2.075 -3.3) (layer F.SilkS) (width 0.12)) 27 | (fp_line (start 2.075 3.3) (end 2.075 4.475) (layer F.SilkS) (width 0.12)) 28 | (fp_line (start -2.075 -3.3) (end -2.075 -4.475) (layer F.SilkS) (width 0.12)) 29 | (fp_line (start 2.075 -3.3) (end 2.075 -4.475) (layer F.SilkS) (width 0.12)) 30 | (pad 14 smd rect (at 2.6943 0.9525) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 31 | (pad 15 smd rect (at 2.6943 0.3175) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 32 | (pad 7 smd rect (at -2.6943 0.9525) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 33 | (pad 6 smd rect (at -2.6943 0.3175) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 34 | (pad 17 smd rect (at 2.6943 -0.9525) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 35 | (pad 16 smd rect (at 2.6943 -0.3175) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 36 | (pad 5 smd rect (at -2.6943 -0.3175) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 37 | (pad 4 smd rect (at -2.6943 -0.9525) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 38 | (pad 1 smd rect (at -2.6943 -2.8575) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 39 | (pad 2 smd rect (at -2.6943 -2.2225) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 40 | (pad 3 smd rect (at -2.6943 -1.5875) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 41 | (pad 8 smd rect (at -2.6943 1.5875) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 42 | (pad 9 smd rect (at -2.6943 2.2225) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 43 | (pad 10 smd rect (at -2.6943 2.8575) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 44 | (pad 11 smd rect (at 2.6943 2.8575) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 45 | (pad 12 smd rect (at 2.6943 2.2225) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 46 | (pad 13 smd rect (at 2.6943 1.5875) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 47 | (pad 18 smd rect (at 2.6943 -1.5875) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 48 | (pad 19 smd rect (at 2.6943 -2.2225) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 49 | (pad 20 smd rect (at 2.6943 -2.8575) (size 1.68 0.41) (layers F.Cu F.Paste F.Mask)) 50 | (model ${KISYS3DMOD}/Package_SO.3dshapes/QSOP-20_3.9x8.7mm_P0.635mm.wrl 51 | (at (xyz 0 0 0)) 52 | (scale (xyz 1 1 1)) 53 | (rotate (xyz 0 0 0)) 54 | ) 55 | ) 56 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/SAMTEC_TSM-106-01-L-SH.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module SAMTEC_TSM-106-01-L-SH (layer F.Cu) (tedit 6370A91F) 3 | (descr "") 4 | (fp_text reference REF** (at -5.445 -8.995 0) (layer F.SilkS) 5 | (effects (font (size 1.0 1.0) (thickness 0.15))) 6 | ) 7 | (fp_text value SAMTEC_TSM-106-01-L-SH (at 5.35 8.735 0) (layer F.Fab) 8 | (effects (font (size 1.0 1.0) (thickness 0.15))) 9 | ) 10 | (pad 1 smd rect (at -6.35 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 11 | (pad 2 smd rect (at -3.81 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 12 | (pad 3 smd rect (at -1.27 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 13 | (pad 4 smd rect (at 1.27 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 14 | (pad 5 smd rect (at 3.81 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 15 | (pad 6 smd rect (at 6.35 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 16 | (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.Fab) (width 0.1)) 17 | (fp_line (start -7.62 -1.27) (end 7.62 -1.27) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -7.62 1.27) (end -7.62 -7.11) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -7.62 -7.11) (end 7.62 -7.11) (layer F.Fab) (width 0.1)) 22 | (fp_line (start 7.62 -7.11) (end 7.62 1.27) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 7.62 -1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -7.87 7.12) (end -7.87 -7.36) (layer F.CrtYd) (width 0.05)) 28 | (fp_line (start -7.87 -7.36) (end 7.87 -7.36) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start 7.87 -7.36) (end 7.87 7.12) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start 7.87 7.12) (end -7.87 7.12) (layer F.CrtYd) (width 0.05)) 31 | (fp_circle (center -8.27 5.28) (end -8.17 5.28) (layer F.SilkS) (width 0.2)) 32 | (fp_circle (center -8.27 5.28) (end -8.17 5.28) (layer F.Fab) (width 0.2)) 33 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/SAMTEC_TSM-106-01-T-SH-A.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module SAMTEC_TSM-106-01-T-SH-A (layer F.Cu) (tedit 6370B16B) 3 | (descr "") 4 | (fp_text reference REF** (at -5.445 -8.995 0) (layer F.SilkS) 5 | (effects (font (size 1.0 1.0) (thickness 0.15))) 6 | ) 7 | (fp_text value SAMTEC_TSM-106-01-T-SH-A (at 6.62 8.735 0) (layer F.Fab) 8 | (effects (font (size 1.0 1.0) (thickness 0.15))) 9 | ) 10 | (pad None np_thru_hole circle (at -5.08 0.0) (size 1.78 1.78) (drill 1.78) (layers *.Cu *.Mask)) 11 | (pad None np_thru_hole circle (at 5.08 0.0) (size 1.78 1.78) (drill 1.78) (layers *.Cu *.Mask)) 12 | (pad 1 smd rect (at -6.35 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 13 | (pad 2 smd rect (at -3.81 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 14 | (pad 3 smd rect (at -1.27 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 15 | (pad 4 smd rect (at 1.27 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 16 | (pad 5 smd rect (at 3.81 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 17 | (pad 6 smd rect (at 6.35 5.28) (size 1.27 3.18) (layers F.Cu F.Mask F.Paste)) 18 | (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -7.62 -1.27) (end 7.62 -1.27) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.Fab) (width 0.1)) 21 | (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -7.62 1.27) (end -7.62 -7.11) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -7.62 -7.11) (end 7.62 -7.11) (layer F.Fab) (width 0.1)) 24 | (fp_line (start 7.62 -7.11) (end 7.62 1.27) (layer F.Fab) (width 0.1)) 25 | (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start 7.62 -1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.2)) 28 | (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.SilkS) (width 0.2)) 29 | (fp_line (start -7.87 7.12) (end -7.87 -7.36) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start -7.87 -7.36) (end 7.87 -7.36) (layer F.CrtYd) (width 0.05)) 31 | (fp_line (start 7.87 -7.36) (end 7.87 7.12) (layer F.CrtYd) (width 0.05)) 32 | (fp_line (start 7.87 7.12) (end -7.87 7.12) (layer F.CrtYd) (width 0.05)) 33 | (fp_circle (center -8.27 5.28) (end -8.17 5.28) (layer F.SilkS) (width 0.2)) 34 | (fp_circle (center -8.27 5.28) (end -8.17 5.28) (layer F.Fab) (width 0.2)) 35 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/SOP65P640X120-24N.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module SOP65P640X120-24N (layer F.Cu) (tedit 60DD7FAB) 3 | (descr "") 4 | (fp_text reference REF** (at -0.645 -4.912 0) (layer F.SilkS) 5 | (effects (font (size 1.0 1.0) (thickness 0.15))) 6 | ) 7 | (fp_text value SOP65P640X120-24N (at 6.975 4.912 0) (layer F.Fab) 8 | (effects (font (size 1.0 1.0) (thickness 0.15))) 9 | ) 10 | (fp_circle (center -4.44 -3.985) (end -4.34 -3.985) (layer F.SilkS) (width 0.2)) 11 | (fp_circle (center -4.44 -3.985) (end -4.34 -3.985) (layer F.Fab) (width 0.2)) 12 | (fp_line (start -2.2 -3.9) (end 2.2 -3.9) (layer F.Fab) (width 0.127)) 13 | (fp_line (start -2.2 3.9) (end 2.2 3.9) (layer F.Fab) (width 0.127)) 14 | (fp_line (start -2.2 -4.1) (end 2.2 -4.1) (layer F.SilkS) (width 0.127)) 15 | (fp_line (start -2.2 4.1) (end 2.2 4.1) (layer F.SilkS) (width 0.127)) 16 | (fp_line (start -2.2 -3.9) (end -2.2 3.9) (layer F.Fab) (width 0.127)) 17 | (fp_line (start 2.2 -3.9) (end 2.2 3.9) (layer F.Fab) (width 0.127)) 18 | (fp_line (start -3.905 -4.15) (end 3.905 -4.15) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -3.905 4.15) (end 3.905 4.15) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start -3.905 -4.15) (end -3.905 4.15) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start 3.905 -4.15) (end 3.905 4.15) (layer F.CrtYd) (width 0.05)) 22 | (pad 1 smd rect (at -2.87 -3.575) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 23 | (pad 2 smd rect (at -2.87 -2.925) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 24 | (pad 3 smd rect (at -2.87 -2.275) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 25 | (pad 4 smd rect (at -2.87 -1.625) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 26 | (pad 5 smd rect (at -2.87 -0.975) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 27 | (pad 6 smd rect (at -2.87 -0.325) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 28 | (pad 7 smd rect (at -2.87 0.325) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 29 | (pad 8 smd rect (at -2.87 0.975) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 30 | (pad 9 smd rect (at -2.87 1.625) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 31 | (pad 10 smd rect (at -2.87 2.275) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 32 | (pad 11 smd rect (at -2.87 2.925) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 33 | (pad 12 smd rect (at -2.87 3.575) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 34 | (pad 13 smd rect (at 2.87 3.575) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 35 | (pad 14 smd rect (at 2.87 2.925) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 36 | (pad 15 smd rect (at 2.87 2.275) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 37 | (pad 16 smd rect (at 2.87 1.625) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 38 | (pad 17 smd rect (at 2.87 0.975) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 39 | (pad 18 smd rect (at 2.87 0.325) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 40 | (pad 19 smd rect (at 2.87 -0.325) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 41 | (pad 20 smd rect (at 2.87 -0.975) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 42 | (pad 21 smd rect (at 2.87 -1.625) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 43 | (pad 22 smd rect (at 2.87 -2.275) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 44 | (pad 23 smd rect (at 2.87 -2.925) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 45 | (pad 24 smd rect (at 2.87 -3.575) (size 1.57 0.41) (layers F.Cu F.Mask F.Paste)) 46 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/TQFP-44_10x10mm_P0.8mm_Xilinx.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TQFP-44_10x10mm_P0.8mm_Xilinx (layer F.Cu) (tedit 5A02F146) 2 | (descr "44-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1.0 mm Body [TQFP] (see Microchip Packaging Specification 00000049BS.pdf)") 3 | (tags "QFP 0.8") 4 | (attr smd) 5 | (fp_text reference U8 (at -5.8 -7.3) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value XC9536XL-VQ44 (at 0 7.45) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_text user %R (at 0 0) (layer F.Fab) 12 | (effects (font (size 1 1) (thickness 0.15))) 13 | ) 14 | (fp_line (start -4 -5) (end 5 -5) (layer F.Fab) (width 0.15)) 15 | (fp_line (start 5 -5) (end 5 5) (layer F.Fab) (width 0.15)) 16 | (fp_line (start 5 5) (end -5 5) (layer F.Fab) (width 0.15)) 17 | (fp_line (start -5 5) (end -5 -4) (layer F.Fab) (width 0.15)) 18 | (fp_line (start -5 -4) (end -4 -5) (layer F.Fab) (width 0.15)) 19 | (fp_line (start -6.7 -6.7) (end -6.7 6.7) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start 6.7 -6.7) (end 6.7 6.7) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start -6.7 -6.7) (end 6.7 -6.7) (layer F.CrtYd) (width 0.05)) 22 | (fp_line (start -6.7 6.7) (end 6.7 6.7) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start -5.175 -5.175) (end -5.175 -4.6) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start 5.175 -5.175) (end 5.175 -4.5) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start 5.175 5.175) (end 5.175 4.5) (layer F.SilkS) (width 0.15)) 26 | (fp_line (start -5.175 5.175) (end -5.175 4.5) (layer F.SilkS) (width 0.15)) 27 | (fp_line (start -5.175 -5.175) (end -4.5 -5.175) (layer F.SilkS) (width 0.15)) 28 | (fp_line (start -5.175 5.175) (end -4.5 5.175) (layer F.SilkS) (width 0.15)) 29 | (fp_line (start 5.175 5.175) (end 4.5 5.175) (layer F.SilkS) (width 0.15)) 30 | (fp_line (start 5.175 -5.175) (end 4.5 -5.175) (layer F.SilkS) (width 0.15)) 31 | (fp_line (start -5.175 -4.6) (end -6.45 -4.6) (layer F.SilkS) (width 0.15)) 32 | (pad 1 smd rect (at -5.7 -4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 33 | (pad 2 smd rect (at -5.7 -3.2) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 34 | (pad 3 smd rect (at -5.7 -2.4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 35 | (pad 4 smd rect (at -5.7 -1.6) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 36 | (pad 5 smd rect (at -5.7 -0.8) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 37 | (pad 6 smd rect (at -5.7 0) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 38 | (pad 7 smd rect (at -5.7 0.8) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 39 | (pad 8 smd rect (at -5.7 1.6) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 40 | (pad 9 smd rect (at -5.7 2.4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 41 | (pad 10 smd rect (at -5.7 3.2) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 42 | (pad 11 smd rect (at -5.7 4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 43 | (pad 12 smd rect (at -4 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 44 | (pad 13 smd rect (at -3.2 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 45 | (pad 14 smd rect (at -2.4 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 46 | (pad 15 smd rect (at -1.6 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 47 | (pad 16 smd rect (at -0.8 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 48 | (pad 17 smd rect (at 0 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 49 | (pad 18 smd rect (at 0.8 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 50 | (pad 19 smd rect (at 1.6 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 51 | (pad 20 smd rect (at 2.4 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 52 | (pad 21 smd rect (at 3.2 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 53 | (pad 22 smd rect (at 4 5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 54 | (pad 23 smd rect (at 5.7 4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 55 | (pad 24 smd rect (at 5.7 3.2) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 56 | (pad 25 smd rect (at 5.7 2.4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 57 | (pad 26 smd rect (at 5.7 1.6) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 58 | (pad 27 smd rect (at 5.7 0.8) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 59 | (pad 28 smd rect (at 5.7 0) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 60 | (pad 29 smd rect (at 5.7 -0.8) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 61 | (pad 30 smd rect (at 5.7 -1.6) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 62 | (pad 31 smd rect (at 5.7 -2.4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 63 | (pad 32 smd rect (at 5.7 -3.2) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 64 | (pad 33 smd rect (at 5.7 -4) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 65 | (pad 34 smd rect (at 4 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 66 | (pad 35 smd rect (at 3.2 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 67 | (pad 36 smd rect (at 2.4 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 68 | (pad 37 smd rect (at 1.6 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 69 | (pad 38 smd rect (at 0.8 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 70 | (pad 39 smd rect (at 0 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 71 | (pad 40 smd rect (at -0.8 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 72 | (pad 41 smd rect (at -1.6 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 73 | (pad 42 smd rect (at -2.4 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 74 | (pad 43 smd rect (at -3.2 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 75 | (pad 44 smd rect (at -4 -5.7 90) (size 1.6 0.55) (layers F.Cu F.Paste F.Mask)) 76 | (model ${KISYS3DMOD}/Package_QFP.3dshapes/TQFP-44_10x10mm_P0.8mm.wrl 77 | (at (xyz 0 0 0)) 78 | (scale (xyz 1 1 1)) 79 | (rotate (xyz 0 0 0)) 80 | ) 81 | ) 82 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio (layer F.Cu) (tedit 613DC505) 2 | (descr "20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)") 3 | (tags "SSOP 0.65") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -4.3) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio (at 0 4.3) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -1.2 -3.25) (end 2.2 -3.25) (layer F.Fab) (width 0.15)) 12 | (fp_line (start 2.2 -3.25) (end 2.2 3.25) (layer F.Fab) (width 0.15)) 13 | (fp_line (start 2.2 3.25) (end -2.2 3.25) (layer F.Fab) (width 0.15)) 14 | (fp_line (start -2.2 3.25) (end -2.2 -2.25) (layer F.Fab) (width 0.15)) 15 | (fp_line (start -2.2 -2.25) (end -1.2 -3.25) (layer F.Fab) (width 0.15)) 16 | (fp_line (start -3.95 -3.55) (end -3.95 3.55) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 3.95 -3.55) (end 3.95 3.55) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -3.95 -3.55) (end 3.95 -3.55) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -3.95 3.55) (end 3.95 3.55) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start -2.225 3.45) (end 2.225 3.45) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start -3.75 -3.45) (end 2.225 -3.45) (layer F.SilkS) (width 0.15)) 22 | (fp_text user %R (at 0 0) (layer F.Fab) 23 | (effects (font (size 0.8 0.8) (thickness 0.15))) 24 | ) 25 | (pad 1 smd rect (at -2.8 -2.925) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 26 | (pad 2 smd rect (at -2.8 -2.275) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 27 | (pad 3 smd rect (at -2.8 -1.625) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 28 | (pad 4 smd rect (at -2.8 -0.975) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 29 | (pad 5 smd rect (at -2.8 -0.325) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 30 | (pad 6 smd rect (at -2.8 0.325) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 31 | (pad 7 smd rect (at -2.8 0.975) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 32 | (pad 8 smd rect (at -2.8 1.625) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 33 | (pad 9 smd rect (at -2.8 2.275) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 34 | (pad 10 smd rect (at -2.8 2.925) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 35 | (pad 11 smd rect (at 2.8 2.925) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 36 | (pad 12 smd rect (at 2.8 2.275) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 37 | (pad 13 smd rect (at 2.8 1.625) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 38 | (pad 14 smd rect (at 2.8 0.975) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 39 | (pad 15 smd rect (at 2.8 0.325) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 40 | (pad 16 smd rect (at 2.8 -0.325) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 41 | (pad 17 smd rect (at 2.8 -0.975) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 42 | (pad 18 smd rect (at 2.8 -1.625) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 43 | (pad 19 smd rect (at 2.8 -2.275) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 44 | (pad 20 smd rect (at 2.8 -2.925) (size 1.55 0.45) (layers F.Cu F.Paste F.Mask)) 45 | (model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-20_4.4x6.5mm_P0.65mm.wrl 46 | (at (xyz 0 0 0)) 47 | (scale (xyz 1 1 1)) 48 | (rotate (xyz 0 0 0)) 49 | ) 50 | ) 51 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/TVSOP-14_4.4x3.6mm_P0.40mm.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TVSOP-14_4.4x3.6mm_P0.40mm (layer F.Cu) (tedit 632C6C07) 2 | (descr "14-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)") 3 | (tags "SSOP 0.65") 4 | (attr smd) 5 | (fp_text reference REF** (at 0 -3.55) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value TVSOP-14_4.4x3.6mm_P0.40mm (at 0 3.55) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -1.2 -1.8) (end 2.2 -1.8) (layer F.Fab) (width 0.15)) 12 | (fp_line (start 2.2 -1.8) (end 2.2 1.8) (layer F.Fab) (width 0.15)) 13 | (fp_line (start 2.2 1.8) (end -2.2 1.8) (layer F.Fab) (width 0.15)) 14 | (fp_line (start -2.2 1.8) (end -2.2 -0.8) (layer F.Fab) (width 0.15)) 15 | (fp_line (start -2.2 -0.8) (end -1.2 -1.8) (layer F.Fab) (width 0.15)) 16 | (fp_line (start -3.95 -2.1) (end -3.95 2.1) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 3.95 -2.1) (end 3.95 2.1) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -3.95 -2.1) (end 3.95 -2.1) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -3.95 2.1) (end 3.95 2.1) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start -2.325 -1.925) (end -2.325 -1.8) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start 2.325 -1.925) (end 2.325 -1.7) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start 2.325 1.925) (end 2.325 1.7) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start -2.325 1.925) (end -2.325 1.7) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start -2.325 -1.925) (end 2.325 -1.925) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start -2.325 1.925) (end 2.325 1.925) (layer F.SilkS) (width 0.15)) 26 | (fp_line (start -2.325 -1.8) (end -3.675 -1.8) (layer F.SilkS) (width 0.15)) 27 | (fp_text user %R (at 0 0) (layer F.Fab) 28 | (effects (font (size 0.8 0.8) (thickness 0.15))) 29 | ) 30 | (pad 1 smd rect (at -3.1 -1.2) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 31 | (pad 2 smd rect (at -3.1 -0.8) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 32 | (pad 3 smd rect (at -3.1 -0.4) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 33 | (pad 4 smd rect (at -3.1 0) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 34 | (pad 5 smd rect (at -3.1 0.4) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 35 | (pad 6 smd rect (at -3.1 0.8) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 36 | (pad 7 smd rect (at -3.1 1.2) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 37 | (pad 8 smd rect (at 3.1 1.2) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 38 | (pad 9 smd rect (at 3.1 0.8) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 39 | (pad 10 smd rect (at 3.1 0.4) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 40 | (pad 11 smd rect (at 3.1 0) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 41 | (pad 12 smd rect (at 3.1 -0.4) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 42 | (pad 13 smd rect (at 3.1 -0.8) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 43 | (pad 14 smd rect (at 3.1 -1.2) (size 1.80 0.28) (layers F.Cu F.Paste F.Mask)) 44 | ) 45 | -------------------------------------------------------------------------------- /nubus-to-ztex/For_SeeedStudio.pretty/USB_A_Molex_67643_Horizontal.kicad_mod: -------------------------------------------------------------------------------- 1 | (module USB_A_Molex_67643_Horizontal (layer F.Cu) (tedit 5EA03975) 2 | (descr "USB type A, Horizontal, https://www.molex.com/pdm_docs/sd/676433910_sd.pdf") 3 | (tags "USB_A Female Connector receptacle") 4 | (fp_text reference REF** (at 3.5 -3.19) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value USB_A_Molex_67643_Horizontal (at 3.5 14.5) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_text user %R (at 3.5 3.7) (layer F.Fab) 11 | (effects (font (size 1 1) (thickness 0.15))) 12 | ) 13 | (fp_line (start -3.05 -2.27) (end 10.05 -2.27) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 10.05 -2.27) (end 10.05 12.69) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -3.16 12.58) (end -3.16 4.47) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -3.16 12.58) (end -3.81 12.58) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -3.7 12.69) (end -3.7 12.99) (layer F.Fab) (width 0.1)) 18 | (fp_line (start -3.7 12.99) (end 10.7 12.99) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 10.7 12.99) (end 10.7 12.69) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 10.7 12.69) (end 10.05 12.69) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -3.05 9.27) (end 10.05 9.27) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -3.55 -2.77) (end 10.55 -2.77) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 10.55 -2.77) (end 10.55 0.76) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -3.55 -2.77) (end -3.55 0.76) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start -4.2 13.49) (end 11.2 13.49) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start 11.2 13.49) (end 11.2 12.19) (layer F.CrtYd) (width 0.05)) 27 | (fp_line (start 11.2 12.19) (end 10.55 12.19) (layer F.CrtYd) (width 0.05)) 28 | (fp_line (start 10.55 12.19) (end 10.55 4.66) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start -4.2 13.49) (end -4.2 12.19) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start -4.2 12.19) (end -3.55 12.19) (layer F.CrtYd) (width 0.05)) 31 | (fp_line (start -3.55 12.19) (end -3.55 4.66) (layer F.CrtYd) (width 0.05)) 32 | (fp_arc (start -3.07 2.71) (end -3.55 0.76) (angle -152.3426981) (layer F.CrtYd) (width 0.05)) 33 | (fp_arc (start 10.07 2.71) (end 10.55 4.66) (angle -152.3426981) (layer F.CrtYd) (width 0.05)) 34 | (fp_line (start -3.16 -2.38) (end 10.16 -2.38) (layer F.SilkS) (width 0.12)) 35 | (fp_line (start -3.16 -2.38) (end -3.16 0.95) (layer F.SilkS) (width 0.12)) 36 | (fp_line (start 10.16 -2.38) (end 10.16 0.95) (layer F.SilkS) (width 0.12)) 37 | (fp_line (start -3.05 12.69) (end -3.05 -2.27) (layer F.Fab) (width 0.1)) 38 | (fp_line (start 10.81 13.1) (end 10.81 12.58) (layer F.SilkS) (width 0.12)) 39 | (fp_line (start -3.81 13.1) (end 10.81 13.1) (layer F.SilkS) (width 0.12)) 40 | (fp_line (start 10.16 4.47) (end 10.16 12.58) (layer F.SilkS) (width 0.12)) 41 | (fp_line (start -3.81 12.58) (end -3.81 13.1) (layer F.SilkS) (width 0.12)) 42 | (fp_line (start 10.81 12.58) (end 10.16 12.58) (layer F.SilkS) (width 0.12)) 43 | (fp_line (start -3.05 12.69) (end -3.7 12.69) (layer F.Fab) (width 0.1)) 44 | (fp_line (start -0.9 -2.6) (end 0.9 -2.6) (layer F.SilkS) (width 0.12)) 45 | (fp_line (start -1 -2.27) (end 0 -1.27) (layer F.Fab) (width 0.1)) 46 | (fp_line (start 0 -1.27) (end 1 -2.27) (layer F.Fab) (width 0.1)) 47 | (pad 5 thru_hole circle (at -3.07 2.71) (size 3 3) (drill 2.3) (layers *.Cu *.Mask)) 48 | (pad 5 thru_hole circle (at 10.07 2.71) (size 3 3) (drill 2.3) (layers *.Cu *.Mask)) 49 | (pad 1 thru_hole rect (at 0 0) (size 1.6 1.5) (drill 0.95) (layers *.Cu *.Mask)) 50 | (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.95) (layers *.Cu *.Mask)) 51 | (pad 3 thru_hole circle (at 4.5 0) (size 1.6 1.6) (drill 0.95) (layers *.Cu *.Mask)) 52 | (pad 4 thru_hole circle (at 7 0) (size 1.6 1.6) (drill 0.95) (layers *.Cu *.Mask)) 53 | (model ${KISYS3DMOD}/Connector_USB.3dshapes/USB_A_Molex_67643_Horizontal.wrl 54 | (at (xyz 0 0 0)) 55 | (scale (xyz 1 1 1)) 56 | (rotate (xyz 0 0 0)) 57 | ) 58 | ) 59 | -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/47219-2001.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # 47219-2001 7 | # 8 | DEF 47219-2001 J 0 40 Y Y 1 L N 9 | F0 "J" -500 430 50 H V L BNN 10 | F1 "47219-2001" -500 -470 50 H V L BNN 11 | F2 "MOLEX_47219-2001" 0 0 50 H I L BNN 12 | F3 "MOLEX" 0 0 50 H I L BNN 13 | DRAW 14 | P 2 0 0 10 -500 400 -500 -400 N 15 | P 2 0 0 10 -500 -400 500 -400 N 16 | P 2 0 0 10 500 -400 500 400 N 17 | P 2 0 0 10 500 400 -500 400 N 18 | X DAT2 1 -700 -200 200 R 40 40 0 0 B 19 | X CD/DAT3 2 -700 -300 200 R 40 40 0 0 B 20 | X CMD 3 -700 100 200 R 40 40 0 0 B 21 | X VDD 4 700 300 200 L 40 40 0 0 W 22 | X CLK 5 -700 300 200 R 40 40 0 0 I C 23 | X VSS 6 700 -300 200 L 40 40 0 0 W 24 | X DAT0 7 -700 0 200 R 40 40 0 0 B 25 | X DAT1 8 -700 -100 200 R 40 40 0 0 B 26 | X GND@1 G1 700 100 200 L 40 40 0 0 W 27 | X GND@2 G2 700 0 200 L 40 40 0 0 W 28 | X GND@3 G3 700 -100 200 L 40 40 0 0 W 29 | X GND@4 G4 700 -200 200 L 40 40 0 0 W 30 | ENDDRAW 31 | ENDDEF 32 | # 33 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/74LVC125APW_112.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # 74LVC125APW,112 7 | # 8 | DEF 74LVC125APW,112 U 0 40 Y Y 1 L N 9 | F0 "U" -211 803 50 H V L BNN 10 | F1 "74LVC125APW,112" -160 -1099 50 H V L BNN 11 | F2 "SOP65P640X110-14N" 0 0 50 H I L BNN 12 | F3 "1826647" 0 0 50 H I L BNN 13 | F4 "74LVC125APW,112" 0 0 50 H I L BNN 14 | F5 "TSSOP-14" 0 0 50 H I L BNN 15 | F6 "78R7407" 0 0 50 H I L BNN 16 | F7 "NXP" 0 0 50 H I L BNN 17 | DRAW 18 | P 2 0 0 16 -500 700 -500 -900 N 19 | P 2 0 0 16 -500 -900 500 -900 N 20 | P 2 0 0 16 500 -900 500 700 N 21 | P 2 0 0 16 500 700 -500 700 N 22 | X VCC 14 -700 500 200 R 40 40 0 0 W 23 | X 1~OE 1 -700 300 200 R 40 40 0 0 I 24 | X 2~OE 4 -700 200 200 R 40 40 0 0 I 25 | X 3~OE 10 -700 100 200 R 40 40 0 0 I 26 | X 4~OE 13 -700 0 200 R 40 40 0 0 I 27 | X 1A 2 -700 -200 200 R 40 40 0 0 I 28 | X 2A 5 -700 -300 200 R 40 40 0 0 I 29 | X 3A 9 -700 -400 200 R 40 40 0 0 I 30 | X 4A 12 -700 -500 200 R 40 40 0 0 I 31 | X GND 7 -700 -700 200 R 40 40 0 0 I 32 | X 1Y 3 700 -200 200 L 40 40 0 0 O 33 | X 2Y 6 700 -300 200 L 40 40 0 0 O 34 | X 3Y 8 700 -400 200 L 40 40 0 0 O 35 | X 4Y 11 700 -500 200 L 40 40 0 0 O 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/74LVC126AD_118.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # 74LVC126AD,118 7 | # 8 | DEF 74LVC126AD,118 U 0 40 Y Y 1 L N 9 | F0 "U" -212 804 50 H V L BNN 10 | F1 "74LVC126AD,118" -184 -1082 50 H V L BNN 11 | F2 "SOIC127P600X175-14N" 0 0 50 H I L BNN 12 | F3 "NXP" 0 0 50 H I L BNN 13 | F4 "1631665" 0 0 50 H I L BNN 14 | F5 "74LVC126AD,118" 0 0 50 H I L BNN 15 | F6 "03P2781" 0 0 50 H I L BNN 16 | F7 "SOIC-14" 0 0 50 H I L BNN 17 | DRAW 18 | P 2 0 0 16 -500 700 -500 -900 N 19 | P 2 0 0 16 -500 -900 500 -900 N 20 | P 2 0 0 16 500 -900 500 700 N 21 | P 2 0 0 16 500 700 -500 700 N 22 | X VCC 14 -700 500 200 R 40 40 0 0 W 23 | X 1OE 1 -700 300 200 R 40 40 0 0 I 24 | X 2OE 4 -700 200 200 R 40 40 0 0 I 25 | X 3OE 10 -700 100 200 R 40 40 0 0 I 26 | X 4OE 13 -700 0 200 R 40 40 0 0 I 27 | X 1A 2 -700 -200 200 R 40 40 0 0 I 28 | X 2A 5 -700 -300 200 R 40 40 0 0 I 29 | X 3A 9 -700 -400 200 R 40 40 0 0 I 30 | X 4A 12 -700 -500 200 R 40 40 0 0 I 31 | X GND 7 -700 -700 200 R 40 40 0 0 P 32 | X 1Y 3 700 -200 200 L 40 40 0 0 O 33 | X 2Y 6 700 -300 200 L 40 40 0 0 O 34 | X 3Y 8 700 -400 200 L 40 40 0 0 O 35 | X 4Y 11 700 -500 200 L 40 40 0 0 O 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/C96ABC.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | # 3 | # C96ABC_NUBUS 4 | # 5 | DEF C96ABC_NUBUS J 0 20 Y Y 1 F N 6 | F0 "J" 0 4950 50 H V C CNN 7 | F1 "C96ABC_NUBUS" 250 50 50 V V C CNN 8 | F2 "" 0 50 50 H I C CNN 9 | F3 "" 0 50 50 H I C CNN 10 | DRAW 11 | S -150 -4800 150 4900 0 1 10 f 12 | X a1 a1 -300 4800 150 R 50 50 1 1 P 13 | X a10 a10 -300 2100 150 R 50 50 1 1 P 14 | X a11 a11 -300 1800 150 R 50 50 1 1 P 15 | X a12 a12 -300 1500 150 R 50 50 1 1 P 16 | X a13 a13 -300 1200 150 R 50 50 1 1 P 17 | X a14 a14 -300 900 150 R 50 50 1 1 P 18 | X a15 a15 -300 600 150 R 50 50 1 1 P 19 | X a16 a16 -300 300 150 R 50 50 1 1 P 20 | X a17 a17 -300 0 150 R 50 50 1 1 P 21 | X a18 a18 -300 -300 150 R 50 50 1 1 P 22 | X a19 a19 -300 -600 150 R 50 50 1 1 P 23 | X a2 a2 -300 4500 150 R 50 50 1 1 P 24 | X a20 a20 -300 -900 150 R 50 50 1 1 P 25 | X a21 a21 -300 -1200 150 R 50 50 1 1 T 26 | X a22 a22 -300 -1500 150 R 50 50 1 1 P 27 | X a23 a23 -300 -1800 150 R 50 50 1 1 P 28 | X a24 a24 -300 -2100 150 R 50 50 1 1 P 29 | X a25 a25 -300 -2400 150 R 50 50 1 1 P 30 | X a26 a26 -300 -2700 150 R 50 50 1 1 P 31 | X a27 a27 -300 -3000 150 R 50 50 1 1 P 32 | X a28 a28 -300 -3300 150 R 50 50 1 1 P 33 | X a29 a29 -300 -3600 150 R 50 50 1 1 P 34 | X a3 a3 -300 4200 150 R 50 50 1 1 P 35 | X a30 a30 -300 -3900 150 R 50 50 1 1 P 36 | X a31 a31 -300 -4200 150 R 50 50 1 1 P 37 | X a32 a32 -300 -4500 150 R 50 50 1 1 P 38 | X a4 a4 -300 3900 150 R 50 50 1 1 P 39 | X a5 a5 -300 3600 150 R 50 50 1 1 P 40 | X a6 a6 -300 3300 150 R 50 50 1 1 P 41 | X a7 a7 -300 3000 150 R 50 50 1 1 P 42 | X a8 a8 -300 2700 150 R 50 50 1 1 P 43 | X a9 a9 -300 2400 150 R 50 50 1 1 P 44 | X b1 b1 -300 4700 150 R 50 50 1 1 P 45 | X b10 b10 -300 2000 150 R 50 50 1 1 P 46 | X b11 b11 -300 1700 150 R 50 50 1 1 P 47 | X b12 b12 -300 1400 150 R 50 50 1 1 P 48 | X b13 b13 -300 1100 150 R 50 50 1 1 P 49 | X b14 b14 -300 800 150 R 50 50 1 1 P 50 | X b15 b15 -300 500 150 R 50 50 1 1 P 51 | X b16 b16 -300 200 150 R 50 50 1 1 P 52 | X b17 b17 -300 -100 150 R 50 50 1 1 P 53 | X b18 b18 -300 -400 150 R 50 50 1 1 P 54 | X b19 b19 -300 -700 150 R 50 50 1 1 P 55 | X b2 b2 -300 4400 150 R 50 50 1 1 P 56 | X b20 b20 -300 -1000 150 R 50 50 1 1 P 57 | X b21 b21 -300 -1300 150 R 50 50 1 1 P 58 | X b22 b22 -300 -1600 150 R 50 50 1 1 P 59 | X b23 b23 -300 -1900 150 R 50 50 1 1 P 60 | X b24 b24 -300 -2200 150 R 50 50 1 1 P 61 | X b25 b25 -300 -2500 150 R 50 50 1 1 P 62 | X b26 b26 -300 -2800 150 R 50 50 1 1 P 63 | X b27 b27 -300 -3100 150 R 50 50 1 1 P 64 | X b28 b28 -300 -3400 150 R 50 50 1 1 P 65 | X b29 b29 -300 -3700 150 R 50 50 1 1 P 66 | X b3 b3 -300 4100 150 R 50 50 1 1 P 67 | X b30 b30 -300 -4000 150 R 50 50 1 1 P 68 | X b31 b31 -300 -4300 150 R 50 50 1 1 P 69 | X b32 b32 -300 -4600 150 R 50 50 1 1 P 70 | X b4 b4 -300 3800 150 R 50 50 1 1 P 71 | X b5 b5 -300 3500 150 R 50 50 1 1 P 72 | X b6 b6 -300 3200 150 R 50 50 1 1 P 73 | X b7 b7 -300 2900 150 R 50 50 1 1 P 74 | X b8 b8 -300 2600 150 R 50 50 1 1 P 75 | X b9 b9 -300 2300 150 R 50 50 1 1 P 76 | X c1 c1 -300 4600 150 R 50 50 1 1 P 77 | X c10 c10 -300 1900 150 R 50 50 1 1 P 78 | X c11 c11 -300 1600 150 R 50 50 1 1 P 79 | X c12 c12 -300 1300 150 R 50 50 1 1 P 80 | X c13 c13 -300 1000 150 R 50 50 1 1 P 81 | X c14 c14 -300 700 150 R 50 50 1 1 P 82 | X c15 c15 -300 400 150 R 50 50 1 1 P 83 | X c16 c16 -300 100 150 R 50 50 1 1 P 84 | X c17 c17 -300 -200 150 R 50 50 1 1 P 85 | X c18 c18 -300 -500 150 R 50 50 1 1 P 86 | X c19 c19 -300 -800 150 R 50 50 1 1 P 87 | X c2 c2 -300 4300 150 R 50 50 1 1 P 88 | X c20 c20 -300 -1100 150 R 50 50 1 1 P 89 | X c21 c21 -300 -1400 150 R 50 50 1 1 P 90 | X c22 c22 -300 -1700 150 R 50 50 1 1 P 91 | X c23 c23 -300 -2000 150 R 50 50 1 1 P 92 | X c24 c24 -300 -2300 150 R 50 50 1 1 P 93 | X c25 c25 -300 -2600 150 R 50 50 1 1 P 94 | X c26 c26 -300 -2900 150 R 50 50 1 1 P 95 | X c27 c27 -300 -3200 150 R 50 50 1 1 P 96 | X c28 c28 -300 -3500 150 R 50 50 1 1 P 97 | X c29 c29 -300 -3800 150 R 50 50 1 1 P 98 | X c3 c3 -300 4000 150 R 50 50 1 1 P 99 | X c30 c30 -300 -4100 150 R 50 50 1 1 P 100 | X c31 c31 -300 -4400 150 R 50 50 1 1 P 101 | X c32 c32 -300 -4700 150 R 50 50 1 1 P 102 | X c4 c4 -300 3700 150 R 50 50 1 1 P 103 | X c5 c5 -300 3400 150 R 50 50 1 1 P 104 | X c6 c6 -300 3100 150 R 50 50 1 1 P 105 | X c7 c7 -300 2800 150 R 50 50 1 1 P 106 | X c8 c8 -300 2500 150 R 50 50 1 1 P 107 | X c9 c9 -300 2200 150 R 50 50 1 1 P 108 | ENDDRAW 109 | ENDDEF 110 | -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/FCN-234P096-GY.3dshapes/FCN-234P096-GY.scad: -------------------------------------------------------------------------------- 1 | SBUS_A=71.0; 2 | SBUS_B=59.69; 3 | SBUS_C=64.06; 4 | SBUS_HOLE_WIDE=64.06; 5 | SBUS_HOLE_NARROW=59.69; 6 | SBUS_HOLE_WIDTH=5.7; 7 | SBUS_WIDTH=7.3; 8 | SBUS_HEIGHT=9.3; 9 | 10 | HolePoints = [ 11 | [ -SBUS_HOLE_NARROW/2, -SBUS_HOLE_WIDTH/2, -SBUS_HEIGHT/2+3 ], //0 12 | [ +SBUS_HOLE_NARROW/2, -SBUS_HOLE_WIDTH/2, -SBUS_HEIGHT/2+3 ], //1 13 | [ +SBUS_HOLE_WIDE/2, +SBUS_HOLE_WIDTH/2, -SBUS_HEIGHT/2+3 ], //2 14 | [ -SBUS_HOLE_WIDE/2, +SBUS_HOLE_WIDTH/2, ], //3 15 | [ -SBUS_HOLE_NARROW/2, -SBUS_HOLE_WIDTH/2, 20 ], //4 16 | [ +SBUS_HOLE_NARROW/2, -SBUS_HOLE_WIDTH/2, 20 ], //5 17 | [ +SBUS_HOLE_WIDE/2, +SBUS_HOLE_WIDTH/2, 20 ], //6 18 | [ -SBUS_HOLE_WIDE/2, +SBUS_HOLE_WIDTH/2, 20 ], //7 19 | ]; //7 20 | 21 | HoleFaces = [ 22 | [0,1,2,3], // bottom 23 | [4,5,1,0], // front 24 | [7,6,5,4], // top 25 | [5,6,2,1], // right 26 | [6,7,3,2], // back 27 | [7,4,0,3]]; // left 28 | 29 | difference() { 30 | color("black") cube([SBUS_A, SBUS_WIDTH, SBUS_HEIGHT], center=true); 31 | color("black") polyhedron( HolePoints, HoleFaces ); 32 | } 33 | 34 | for (i = [0 : 47]) { 35 | translate([-SBUS_B/2+i*1.27, -1.27, 0]) { 36 | color("silver") cylinder(h = 8, r1 = 0.2, r2 = 0.2, center = true); 37 | } 38 | translate([-SBUS_B/2+i*1.27, +1.27, 0]) { 39 | color("silver") cylinder(h = 8, r1 = 0.2, r2 = 0.2, center = true); 40 | } 41 | } -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/MOLEX_47219-2001.pretty/MOLEX_47219-2001.kicad_mod: -------------------------------------------------------------------------------- 1 | 2 | (module MOLEX_47219-2001 (layer F.Cu) (tedit 5F6EE96D) 3 | (descr "") 4 | (fp_text reference REF** (at -8.845525 2.928495 900) (layer F.SilkS) 5 | (effects (font (size 1.00118897638 1.00118897638) (thickness 0.015))) 6 | ) 7 | (fp_text value MOLEX_47219-2001 (at 8.61729 -4.41119 900) (layer F.Fab) 8 | (effects (font (size 1.00026771654 1.00026771654) (thickness 0.015))) 9 | ) 10 | (fp_line (start -6.8 7.25) (end 6.8 7.25) (layer F.SilkS) (width 0.127)) 11 | (fp_line (start -6.8 -7.25) (end 6.8 -7.25) (layer F.SilkS) (width 0.127)) 12 | (fp_line (start -6.8 -7.2) (end -6.8 -4.8) (layer F.SilkS) (width 0.127)) 13 | (fp_line (start -6.8 5.9) (end -6.8 3.5) (layer F.Fab) (width 0.127)) 14 | (fp_line (start -6.8 -2.3) (end -6.8 -4.8) (layer F.Fab) (width 0.127)) 15 | (fp_line (start 6.8 -7.2) (end 6.8 -4.8) (layer F.SilkS) (width 0.127)) 16 | (fp_line (start 6.8 -4.8) (end 6.8 5.9) (layer F.Fab) (width 0.127)) 17 | (fp_line (start -6.0 7.2) (end -6.0 6.5) (layer F.SilkS) (width 0.127)) 18 | (fp_line (start 6.0 7.2) (end 6.0 6.5) (layer F.SilkS) (width 0.127)) 19 | (fp_line (start -6.0 6.5) (end -4.3 5.5) (layer F.SilkS) (width 0.127)) 20 | (fp_line (start -4.3 5.5) (end -1.9 4.9) (layer F.SilkS) (width 0.127)) 21 | (fp_line (start -1.9 4.9) (end 1.6 4.9) (layer F.SilkS) (width 0.127)) 22 | (fp_line (start 1.6 4.9) (end 4.2 5.5) (layer F.SilkS) (width 0.127)) 23 | (fp_line (start 4.2 5.5) (end 6.0 6.5) (layer F.SilkS) (width 0.127)) 24 | (fp_line (start -6.8 -4.8) (end 6.8 -4.8) (layer F.SilkS) (width 0.127)) 25 | (fp_line (start -7.9 -7.6) (end 7.9 -7.6) (layer F.CrtYd) (width 0.127)) 26 | (fp_line (start 7.9 -7.6) (end 7.9 7.6) (layer F.CrtYd) (width 0.127)) 27 | (fp_line (start 7.9 7.6) (end -7.9 7.6) (layer F.CrtYd) (width 0.127)) 28 | (fp_line (start -7.9 7.6) (end -7.9 -7.6) (layer F.CrtYd) (width 0.127)) 29 | (pad 1 smd rect (at 3.2 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 30 | (pad 2 smd rect (at 2.1 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 31 | (pad 3 smd rect (at 1.0 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 32 | (pad 4 smd rect (at -0.1 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 33 | (pad 5 smd rect (at -1.2 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 34 | (pad 6 smd rect (at -2.3 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 35 | (pad 7 smd rect (at -3.4 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 36 | (pad 8 smd rect (at -4.5 2.1) (size 0.8 1.5) (layers F.Cu F.Mask F.Paste)) 37 | (pad G1 smd rect (at 6.875 4.7) (size 1.5 2.05) (layers F.Cu F.Mask F.Paste)) 38 | (pad G2 smd rect (at 6.875 -3.6) (size 1.5 2.05) (layers F.Cu F.Mask F.Paste)) 39 | (pad G3 smd rect (at -6.875 -3.6) (size 1.5 2.05) (layers F.Cu F.Mask F.Paste)) 40 | (pad G4 smd rect (at -6.875 4.7) (size 1.5 2.05) (layers F.Cu F.Mask F.Paste)) 41 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/NuBus.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # NuBus 5 | # 6 | DEF NuBus NuBus 0 40 Y Y 1 F N 7 | F0 "NuBus" -300 0 50 H V C CNN 8 | F1 "NuBus" 0 0 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | X GND 01 0 1100 25 R 50 50 1 1 P X 13 | X BR* 02 0 1000 25 R 50 50 1 1 B X 14 | X SEL* 03 0 900 25 R 50 50 1 1 B X 15 | X INT[1]* 04 0 800 25 R 50 50 1 1 B X 16 | X D[00] 05 0 700 25 R 50 50 1 1 B X 17 | X D[02] 06 0 600 25 R 50 50 1 1 B X 18 | X D[04] 07 0 500 25 R 50 50 1 1 B X 19 | X INT[2]* 08 0 400 25 R 50 50 1 1 B X 20 | X D[06] 09 0 300 25 R 50 50 1 1 B X 21 | X D[08] 10 0 200 25 R 50 50 1 1 B X 22 | X D[10] 11 0 100 25 R 50 50 1 1 B X 23 | X INT[3]* 12 0 0 25 R 50 50 1 1 B X 24 | X D[12] 13 0 -100 25 R 50 50 1 1 B X 25 | X D[14] 14 0 -200 25 R 50 50 1 1 B X 26 | X D[16] 15 0 -300 25 R 50 50 1 1 B X 27 | X INT[4]* 16 0 -400 25 R 50 50 1 1 B X 28 | X D[19] 17 0 -500 25 R 50 50 1 1 B X 29 | X D[21] 18 0 -600 25 R 50 50 1 1 B X 30 | X D[23] 19 0 -700 25 R 50 50 1 1 B X 31 | X INT[5]* 20 0 -800 25 R 50 50 1 1 B X 32 | X D[25] 21 0 -900 25 R 50 50 1 1 B X 33 | X D[27] 22 0 -1000 25 R 50 50 1 1 B X 34 | X D[29] 23 0 -1100 25 R 50 50 1 1 B X 35 | X INT[6]* 24 0 -1200 25 R 50 50 1 1 B X 36 | X D[31] 25 500 1100 25 R 50 50 1 1 B X 37 | X SIZ[0] 26 500 1000 25 R 50 50 1 1 B X 38 | X SIZ[2] 27 500 900 25 R 50 50 1 1 B X 39 | X INT[7]* 28 500 800 25 R 50 50 1 1 B X 40 | X PA[00] 29 500 700 25 R 50 50 1 1 B X 41 | X PA[02] 30 500 600 25 R 50 50 1 1 B X 42 | X PA[04] 31 500 500 25 R 50 50 1 1 B X 43 | X EER* 32 500 400 25 R 50 50 1 1 B X 44 | X PA[06] 33 500 300 25 R 50 50 1 1 B X 45 | X PA[08] 34 500 200 25 R 50 50 1 1 B X 46 | X PA[10] 35 500 100 25 R 50 50 1 1 B X 47 | X ACK[0]* 36 500 0 25 R 50 50 1 1 B X 48 | X PA[12] 37 500 -100 25 R 50 50 1 1 B X 49 | X PA[14] 38 500 -200 25 R 50 50 1 1 B X 50 | X PA[16] 39 500 -300 25 R 50 50 1 1 B X 51 | X ACK[1]* 40 500 -400 25 R 50 50 1 1 B X 52 | X PA[18] 41 500 -500 25 R 50 50 1 1 B X 53 | X PA[20] 42 500 -600 25 R 50 50 1 1 B X 54 | X PA[22] 43 500 -700 25 R 50 50 1 1 B X 55 | X ACK[2]* 44 500 -800 25 R 50 50 1 1 B X 56 | X PA[24] 45 500 -900 25 R 50 50 1 1 B X 57 | X PA[26] 46 500 -1000 25 R 50 50 1 1 B X 58 | X DP 47 500 -1100 25 R 50 50 1 1 B X 59 | X -12V 48 500 -1200 25 R 50 50 1 1 W X 60 | X CLK 49 1000 1100 25 R 50 50 1 1 B X 61 | X BG* 50 1000 1000 25 R 50 50 1 1 B X 62 | X AS* 51 1000 900 25 R 50 50 1 1 B X 63 | X GND 52 1000 800 25 R 50 50 1 1 P X 64 | X D[01] 53 1000 700 25 R 50 50 1 1 B X 65 | X D[03] 54 1000 600 25 R 50 50 1 1 B X 66 | X D[05] 55 1000 500 25 R 50 50 1 1 B X 67 | X +5V 56 1000 400 25 R 50 50 1 1 W X 68 | X D[07] 57 1000 300 25 R 50 50 1 1 B X 69 | X D[09] 58 1000 200 25 R 50 50 1 1 B X 70 | X D[11] 59 1000 100 25 R 50 50 1 1 B X 71 | X GND 60 1000 0 25 R 50 50 1 1 P X 72 | X D[13] 61 1000 -100 25 R 50 50 1 1 B X 73 | X D[15] 62 1000 -200 25 R 50 50 1 1 B X 74 | X D[17] 63 1000 -300 25 R 50 50 1 1 B X 75 | X +5V 64 1000 -400 25 R 50 50 1 1 W X 76 | X D[18] 65 1000 -500 25 R 50 50 1 1 B X 77 | X D[20] 66 1000 -600 25 R 50 50 1 1 B X 78 | X D[22] 67 1000 -700 25 R 50 50 1 1 B X 79 | X GND 68 1000 -800 25 R 50 50 1 1 P X 80 | X D[24] 69 1000 -900 25 R 50 50 1 1 B X 81 | X D[26] 70 1000 -1000 25 R 50 50 1 1 B X 82 | X D[28] 71 1000 -1100 25 R 50 50 1 1 B X 83 | X +5V 72 1000 -1200 25 R 50 50 1 1 W X 84 | X D[30] 73 1500 1100 25 R 50 50 1 1 B X 85 | X SIZ[1] 74 1500 1000 25 R 50 50 1 1 B X 86 | X PPRD 75 1500 900 25 R 50 50 1 1 B X 87 | X GND 76 1500 800 25 R 50 50 1 1 P X 88 | X PA[01] 77 1500 700 25 R 50 50 1 1 B X 89 | X PA[03] 78 1500 600 25 R 50 50 1 1 B X 90 | X PA[05] 79 1500 500 25 R 50 50 1 1 B X 91 | X +5V 80 1500 400 25 R 50 50 1 1 W X 92 | X PA[07] 81 1500 300 25 R 50 50 1 1 B X 93 | X PA[09] 82 1500 200 25 R 50 50 1 1 B X 94 | X PA[11] 83 1500 100 25 R 50 50 1 1 B X 95 | X GND 84 1500 0 25 R 50 50 1 1 P X 96 | X PA[13] 85 1500 -100 25 R 50 50 1 1 B X 97 | X PA[15] 86 1500 -200 25 R 50 50 1 1 B X 98 | X PA[17] 87 1500 -300 25 R 50 50 1 1 B X 99 | X +5V 88 1500 -400 25 R 50 50 1 1 W X 100 | X PA[19] 89 1500 -500 25 R 50 50 1 1 B X 101 | X PA[21] 90 1500 -600 25 R 50 50 1 1 B X 102 | X PA[23] 91 1500 -700 25 R 50 50 1 1 B X 103 | X GND 92 1500 -800 25 R 50 50 1 1 P X 104 | X PA[25] 93 1500 -900 25 R 50 50 1 1 B X 105 | X PA[27] 94 1500 -1000 25 R 50 50 1 1 B X 106 | X RST* 95 1500 -1100 25 R 50 50 1 1 B X 107 | X +12V 96 1500 -1200 25 R 50 50 1 1 W X 108 | ENDDRAW 109 | $FPLIST 110 | FCN-234P096-GY 111 | $ENDFPLIST 112 | ENDDEF 113 | # 114 | #End Library 115 | -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/SN74CB3T3245PWR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # SN74CB3T3245PWR 7 | # 8 | DEF SN74CB3T3245PWR U 0 40 Y Y 1 L N 9 | F0 "U" -500 839 50 H V L BNN 10 | F1 "SN74CB3T3245PWR" -500 -957 50 H V L BNN 11 | F2 "SOP65P640X120-20N" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | DRAW 14 | S -500 -800 500 800 0 0 16 f 15 | X ~OE 19 -700 500 200 R 40 40 0 0 I 16 | X A1 2 -700 300 200 R 40 40 0 0 B 17 | X A2 3 -700 200 200 R 40 40 0 0 B 18 | X A3 4 -700 100 200 R 40 40 0 0 B 19 | X A4 5 -700 0 200 R 40 40 0 0 B 20 | X B1 18 -700 -200 200 R 40 40 0 0 B 21 | X B2 17 -700 -300 200 R 40 40 0 0 B 22 | X B3 16 -700 -400 200 R 40 40 0 0 B 23 | X B4 15 -700 -500 200 R 40 40 0 0 B 24 | X VCC 20 700 700 200 L 40 40 0 0 W 25 | X A5 6 700 300 200 L 40 40 0 0 B 26 | X A6 7 700 200 200 L 40 40 0 0 B 27 | X A7 8 700 100 200 L 40 40 0 0 B 28 | X A8 9 700 0 200 L 40 40 0 0 B 29 | X B5 14 700 -200 200 L 40 40 0 0 B 30 | X B6 13 700 -300 200 L 40 40 0 0 B 31 | X B7 12 700 -400 200 L 40 40 0 0 B 32 | X B8 11 700 -500 200 L 40 40 0 0 B 33 | X GND 10 700 -700 200 L 40 40 0 0 W 34 | ENDDRAW 35 | ENDDEF 36 | # 37 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/SN74LVC16245ADGGR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # SN74LVC16245ADGGR 7 | # 8 | DEF SN74LVC16245ADGGR U 0 40 Y Y 1 L N 9 | F0 "U" -500 1939 50 H V L BNN 10 | F1 "SN74LVC16245ADGGR" -500 -2057 50 H V L BNN 11 | F2 "SOP50P810X120-48N" 0 0 50 H I L BNN 12 | DRAW 13 | P 2 0 0 16 -500 1900 500 1900 N 14 | P 2 0 0 16 500 1900 500 -1900 N 15 | P 2 0 0 16 500 -1900 -500 -1900 N 16 | P 2 0 0 16 -500 -1900 -500 1900 N 17 | X 1DIR 1 -700 1300 200 R 40 40 0 0 I 18 | X 1OE 48 -700 1200 200 R 40 40 0 0 I 19 | X 2DIR 24 -700 1100 200 R 40 40 0 0 I 20 | X 2OE 25 -700 1000 200 R 40 40 0 0 I 21 | X 1A1 47 -700 800 200 R 40 40 0 0 B 22 | X 1A2 46 -700 700 200 R 40 40 0 0 B 23 | X 1A3 44 -700 600 200 R 40 40 0 0 B 24 | X 1A4 43 -700 500 200 R 40 40 0 0 B 25 | X 1A5 41 -700 400 200 R 40 40 0 0 B 26 | X 1A6 40 -700 300 200 R 40 40 0 0 B 27 | X 1A7 38 -700 200 200 R 40 40 0 0 B 28 | X 1A8 37 -700 100 200 R 40 40 0 0 B 29 | X 2A1 36 -700 -100 200 R 40 40 0 0 B 30 | X 2A2 35 -700 -200 200 R 40 40 0 0 B 31 | X 2A3 33 -700 -300 200 R 40 40 0 0 B 32 | X 2A4 32 -700 -400 200 R 40 40 0 0 B 33 | X 2A5 30 -700 -500 200 R 40 40 0 0 B 34 | X 2A6 29 -700 -600 200 R 40 40 0 0 B 35 | X 2A7 27 -700 -700 200 R 40 40 0 0 B 36 | X 2A8 26 -700 -800 200 R 40 40 0 0 B 37 | X VCC 7 700 1800 200 L 40 40 0 0 W 38 | X VCC-1 42 700 1700 200 L 40 40 0 0 W 39 | X VCC-2 18 700 1600 200 L 40 40 0 0 W 40 | X VCC-3 31 700 1500 200 L 40 40 0 0 W 41 | X 1B1 2 700 800 200 L 40 40 0 0 B 42 | X 1B2 3 700 700 200 L 40 40 0 0 B 43 | X 1B3 5 700 600 200 L 40 40 0 0 B 44 | X 1B4 6 700 500 200 L 40 40 0 0 B 45 | X 1B5 8 700 400 200 L 40 40 0 0 B 46 | X 1B6 9 700 300 200 L 40 40 0 0 B 47 | X 1B7 11 700 200 200 L 40 40 0 0 B 48 | X 1B8 12 700 100 200 L 40 40 0 0 B 49 | X 2B1 13 700 -100 200 L 40 40 0 0 B 50 | X 2B2 14 700 -200 200 L 40 40 0 0 B 51 | X 2B3 16 700 -300 200 L 40 40 0 0 B 52 | X 2B4 17 700 -400 200 L 40 40 0 0 B 53 | X 2B5 19 700 -500 200 L 40 40 0 0 B 54 | X 2B6 20 700 -600 200 L 40 40 0 0 B 55 | X 2B7 22 700 -700 200 L 40 40 0 0 B 56 | X 2B8 23 700 -800 200 L 40 40 0 0 B 57 | X GND-7 10 700 -1000 200 L 40 40 0 0 W 58 | X GND-6 34 700 -1100 200 L 40 40 0 0 W 59 | X GND-5 28 700 -1200 200 L 40 40 0 0 W 60 | X GND-4 45 700 -1300 200 L 40 40 0 0 W 61 | X GND-3 39 700 -1400 200 L 40 40 0 0 W 62 | X GND-2 4 700 -1500 200 L 40 40 0 0 W 63 | X GND-1 21 700 -1600 200 L 40 40 0 0 W 64 | X GND 15 700 -1700 200 L 40 40 0 0 W 65 | ENDDRAW 66 | ENDDEF 67 | # 68 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/ul_SN74CB3T16210DGGR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 Date: 21-02-2013 11:13:20 2 | #encoding utf-8 3 | # 4 | # SN74CB3T16210DGGR 5 | # 6 | DEF SN74CB3T16210DGGR U 0 10 Y Y 1 F N 7 | F0 "U" 800 400 60 H V C CNN 8 | F1 "SN74CB3T16210DGGR" 800 300 60 H V C CNN 9 | F2 "" 800 240 60 H I C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | $FPLIST 12 | $ENDFPLIST 13 | DRAW 14 | X NC 1 0 -2500 300 R 59 59 1 1 U 15 | X 1A1 2 1600 -300 300 L 59 59 1 1 B 16 | X 1A2 3 1600 -400 300 L 59 59 1 1 B 17 | X 1A3 4 1600 -500 300 L 59 59 1 1 B 18 | X 1A4 5 1600 -600 300 L 59 59 1 1 B 19 | X 1A5 6 1600 -700 300 L 59 59 1 1 B 20 | X 1A6 7 1600 -800 300 L 59 59 1 1 B 21 | X GND 8 1600 -2500 300 L 59 59 1 1 W 22 | X 1A7 9 1600 -900 300 L 59 59 1 1 B 23 | X 1A8 10 1600 -1000 300 L 59 59 1 1 B 24 | X 1A9 11 1600 -1100 300 L 59 59 1 1 B 25 | X 1A10 12 1600 -1200 300 L 59 59 1 1 B 26 | X 2A1 13 1600 -1400 300 L 59 59 1 1 B 27 | X 2A2 14 1600 -1500 300 L 59 59 1 1 B 28 | X VCC 15 0 -2600 300 R 59 59 1 1 W 29 | X 2A3 16 1600 -1600 300 L 59 59 1 1 B 30 | X GND 17 1600 -2600 300 L 59 59 1 1 W 31 | X 2A4 18 1600 -1700 300 L 59 59 1 1 B 32 | X 2A5 19 1600 -1800 300 L 59 59 1 1 B 33 | X 2A6 20 1600 -1900 300 L 59 59 1 1 B 34 | X 2A7 21 1600 -2000 300 L 59 59 1 1 B 35 | X 2A8 22 1600 -2100 300 L 59 59 1 1 B 36 | X 2A9 23 1600 -2200 300 L 59 59 1 1 B 37 | X 2A10 24 1600 -2300 300 L 59 59 1 1 B 38 | X 2B10 25 0 -2300 300 R 59 59 1 1 B 39 | X 2B9 26 0 -2200 300 R 59 59 1 1 B 40 | X 2B8 27 0 -2100 300 R 59 59 1 1 B 41 | X 2B7 28 0 -2000 300 R 59 59 1 1 B 42 | X 2B6 29 0 -1900 300 R 59 59 1 1 B 43 | X 2B5 30 0 -1800 300 R 59 59 1 1 B 44 | X 2B4 31 0 -1700 300 R 59 59 1 1 B 45 | X GND 32 1600 -2700 300 L 59 59 1 1 W 46 | X 2B3 33 0 -1600 300 R 59 59 1 1 B 47 | X 2B2 34 0 -1500 300 R 59 59 1 1 B 48 | X 2B1 35 0 -1400 300 R 59 59 1 1 B 49 | X 1B10 36 0 -1200 300 R 59 59 1 1 B 50 | X 1B9 37 0 -1100 300 R 59 59 1 1 B 51 | X 1B8 38 0 -1000 300 R 59 59 1 1 B 52 | X 1B7 39 0 -900 300 R 59 59 1 1 B 53 | X 1B6 40 0 -800 300 R 59 59 1 1 B 54 | X GND 41 1600 -2800 300 L 59 59 1 1 W 55 | X 1B5 42 0 -700 300 R 59 59 1 1 B 56 | X 1B4 43 0 -600 300 R 59 59 1 1 B 57 | X 1B3 44 0 -500 300 R 59 59 1 1 B 58 | X 1B2 45 0 -400 300 R 59 59 1 1 B 59 | X 1B1 46 0 -300 300 R 59 59 1 1 B 60 | X *2OE 47 0 -100 300 R 59 59 1 1 I 61 | X *1OE 48 0 0 300 R 59 59 1 1 I 62 | P 2 1 1 5 300 200 300 -3000 N 63 | P 2 1 1 5 300 -3000 1300 -3000 N 64 | P 2 1 1 5 1300 -3000 1300 200 N 65 | P 2 1 1 5 1300 200 300 200 N 66 | ENDDRAW 67 | ENDDEF 68 | 69 | # 70 | #End Library 71 | -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/ul_SN74CB3T16211DGGR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 Date: 21-02-2013 11:13:20 2 | #encoding utf-8 3 | # 4 | # SN74CB3T16211DGGR 5 | # 6 | DEF SN74CB3T16211DGGR U 0 10 Y Y 1 F N 7 | F0 "U" 800 400 60 H V C CNN 8 | F1 "SN74CB3T16211DGGR" 800 300 60 H V C CNN 9 | F2 "" 800 240 60 H I C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | $FPLIST 12 | $ENDFPLIST 13 | DRAW 14 | X NC 1 0 -3000 300 R 59 59 1 1 U 15 | X 1A1 2 1600 -400 300 L 59 59 1 1 B 16 | X 1A2 3 1600 -500 300 L 59 59 1 1 B 17 | X 1A3 4 1600 -600 300 L 59 59 1 1 B 18 | X 1A4 5 1600 -700 300 L 59 59 1 1 B 19 | X 1A5 6 1600 -800 300 L 59 59 1 1 B 20 | X 1A6 7 1600 -900 300 L 59 59 1 1 B 21 | X GND 8 1600 -3000 300 L 59 59 1 1 W 22 | X 1A7 9 1600 -1000 300 L 59 59 1 1 B 23 | X 1A8 10 1600 -1100 300 L 59 59 1 1 B 24 | X 1A9 11 1600 -1200 300 L 59 59 1 1 B 25 | X 1A10 12 1600 -1300 300 L 59 59 1 1 B 26 | X 1A11 13 1600 -1400 300 L 59 59 1 1 B 27 | X 1A12 14 1600 -1500 300 L 59 59 1 1 B 28 | X 2A1 15 1600 -1700 300 L 59 59 1 1 W 29 | X 2A2 16 1600 -1800 300 L 59 59 1 1 B 30 | X VCC 17 0 -3100 300 R 59 59 1 1 W 31 | X 2A3 18 1600 -1900 300 L 59 59 1 1 B 32 | X GND 19 1600 -3100 300 L 59 59 1 1 W 33 | X 2A4 20 1600 -2000 300 L 59 59 1 1 B 34 | X 2A5 21 1600 -2100 300 L 59 59 1 1 B 35 | X 2A6 22 1600 -2200 300 L 59 59 1 1 B 36 | X 2A7 23 1600 -2300 300 L 59 59 1 1 B 37 | X 2A8 24 1600 -2400 300 L 59 59 1 1 B 38 | X 2A9 25 1600 -2500 300 L 59 59 1 1 B 39 | X 2A10 26 1600 -2600 300 L 59 59 1 1 B 40 | X 2A11 27 1600 -2700 300 L 59 59 1 1 B 41 | X 2A12 28 1600 -2800 300 L 59 59 1 1 B 42 | X 2B12 29 0 -2800 300 R 59 59 1 1 B 43 | X 2B11 30 0 -2700 300 R 59 59 1 1 B 44 | X 2B10 31 0 -2600 300 R 59 59 1 1 B 45 | X 2B9 32 0 -2500 300 R 59 59 1 1 B 46 | X 2B8 33 0 -2400 300 R 59 59 1 1 B 47 | X 2B7 34 0 -2300 300 R 59 59 1 1 B 48 | X 2B6 35 0 -2200 300 R 59 59 1 1 B 49 | X 2B5 36 0 -2100 300 R 59 59 1 1 B 50 | X 2B4 37 0 -2000 300 R 59 59 1 1 B 51 | X GND 38 1600 -3200 300 L 59 59 1 1 W 52 | X 2B3 39 0 -1900 300 R 59 59 1 1 B 53 | X 2B2 40 0 -1800 300 R 59 59 1 1 B 54 | X 2B1 41 0 -1700 300 R 59 59 1 1 B 55 | X 1B12 42 0 -1500 300 R 59 59 1 1 B 56 | X 1B11 43 0 -1400 300 R 59 59 1 1 B 57 | X 1B10 44 0 -1300 300 R 59 59 1 1 B 58 | X 1B9 45 0 -1200 300 R 59 59 1 1 B 59 | X 1B8 46 0 -1100 300 R 59 59 1 1 B 60 | X 1B7 47 0 -1000 300 R 59 59 1 1 B 61 | X 1B6 48 0 -900 300 R 59 59 1 1 B 62 | X GND 49 1600 -3300 300 L 59 59 1 1 W 63 | X 1B5 50 0 -800 300 R 59 59 1 1 B 64 | X 1B4 51 0 -700 300 R 59 59 1 1 B 65 | X 1B3 52 0 -600 300 R 59 59 1 1 B 66 | X 1B2 53 0 -500 300 R 59 59 1 1 B 67 | X 1B1 54 0 -400 300 R 59 59 1 1 B 68 | X *2OE 55 0 -100 300 R 59 59 1 1 I 69 | X *1OE 56 0 0 300 R 59 59 1 1 I 70 | 71 | P 2 1 1 5 300 200 300 -3400 N 72 | P 2 1 1 5 300 -3400 1300 -3400 N 73 | P 2 1 1 5 1300 -3400 1300 200 N 74 | P 2 1 1 5 1300 200 300 200 N 75 | ENDDRAW 76 | ENDDEF 77 | 78 | 79 | # 80 | #End Library 81 | -------------------------------------------------------------------------------- /nubus-to-ztex/NuBus/ul_SN74CB3T3125PW.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 Date: 21-02-2013 11:13:20 2 | #encoding utf-8 3 | # 4 | # SN74CB3T3125PW 5 | # 6 | DEF SN74CB3T3125PW U 0 10 Y Y 1 L N 7 | F0 "U" 800 400 60 H V C CNN 8 | F1 "SN74CB3T3125PW" 800 300 60 H V C CNN 9 | F2 "PW14" 800 240 60 H I C CNN 10 | F3 "~" 0 0 60 H V C CNN 11 | $FPLIST 12 | PW14 13 | PW14-M 14 | PW14-L 15 | $ENDFPLIST 16 | DRAW 17 | X *1OE 1 0 0 300 R 59 59 1 1 I 18 | X 1A 2 0 -500 300 R 59 59 1 1 I 19 | X 1B 3 1600 -500 300 L 59 59 1 1 I 20 | X *2OE 4 0 -100 300 R 59 59 1 1 I 21 | X 2A 5 0 -600 300 R 59 59 1 1 I 22 | X 2B 6 1600 -600 300 L 59 59 1 1 I 23 | X GND 7 1600 -300 300 L 59 59 1 1 W 24 | X 3B 8 1600 -700 300 L 59 59 1 1 I 25 | X 3A 9 0 -700 300 R 59 59 1 1 I 26 | X *3OE 10 0 -200 300 R 59 59 1 1 I 27 | X 4B 11 1600 -800 300 L 59 59 1 1 I 28 | X 4A 12 0 -800 300 R 59 59 1 1 I 29 | X *4OE 13 0 -300 300 R 59 59 1 1 I 30 | X VCC 14 0 -1500 300 R 59 59 1 1 W 31 | P 2 1 1 5 300 200 300 -1700 N 32 | P 2 1 1 5 300 -1700 1300 -1700 N 33 | P 2 1 1 5 1300 -1700 1300 200 N 34 | P 2 1 1 5 1300 200 300 200 N 35 | ENDDRAW 36 | ENDDEF 37 | # 38 | #End Library 39 | -------------------------------------------------------------------------------- /nubus-to-ztex/TPD12S016PWR.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # TPD12S016PWR 7 | # 8 | DEF TPD12S016PWR U 0 40 Y Y 1 L N 9 | F0 "U" -500 1239 50 H V L BNN 10 | F1 "TPD12S016PWR" -500 -1300 50 H V L BNN 11 | F2 "SOP65P640X120-24N" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "1.2 mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT" 14 | F5 "Texas Instruments" 0 0 50 H I L BNN "MANUFACTURER" 15 | F6 "F" 0 0 50 H I L BNN "PARTREV" 16 | F7 "IPC 7351B" 0 0 50 H I L BNN "STANDARD" 17 | DRAW 18 | S -500 -1200 500 1200 0 0 10 f 19 | X CLK- 15 700 500 200 L 40 40 0 0 B C 20 | X CLK+ 16 700 600 200 L 40 40 0 0 B C 21 | X CEC_A 1 -700 -400 200 R 40 40 0 0 B 22 | X CEC_B 7 700 -400 200 L 40 40 0 0 B 23 | X CT_HPD 12 -700 600 200 R 40 40 0 0 I 24 | X HPD_A 4 -700 -300 200 R 40 40 0 0 O 25 | X HPD_B 10 700 -300 200 L 40 40 0 0 I 26 | X LS_OE 5 -700 400 200 R 40 40 0 0 I 27 | X SCL_A 2 -700 -500 200 R 40 40 0 0 B 28 | X SCL_B 8 700 -500 200 L 40 40 0 0 B 29 | X SDA_A 3 -700 -600 200 R 40 40 0 0 B 30 | X SDA_B 9 700 -600 200 L 40 40 0 0 B 31 | X VCC5V 11 -700 800 200 R 40 40 0 0 I 32 | X VCCA 24 -700 1100 200 R 40 40 0 0 W 33 | X 5V_OUT 13 700 800 200 L 40 40 0 0 O 34 | X GND_6 6 700 -900 200 L 40 40 0 0 W 35 | X D1+ 21 700 200 200 L 40 40 0 0 B 36 | X D1- 20 700 100 200 L 40 40 0 0 B 37 | X GND_14 14 700 -1000 200 L 40 40 0 0 W 38 | X GND_19 19 700 -1100 200 L 40 40 0 0 W 39 | X D2+ 23 700 0 200 L 40 40 0 0 B 40 | X D2- 22 700 -100 200 L 40 40 0 0 B 41 | X D0+ 18 700 400 200 L 40 40 0 0 B 42 | X D0- 17 700 300 200 L 40 40 0 0 B 43 | ENDDRAW 44 | ENDDEF 45 | # 46 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/TSM-106-01-L-SH.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # TSM-106-01-L-SH 7 | # 8 | DEF TSM-106-01-L-SH J 0 40 Y Y 1 L N 9 | F0 "J" -320 400 50 H V L BNN 10 | F1 "TSM-106-01-L-SH" -300 -400 50 H V L BNN 11 | F2 "SAMTEC_TSM-106-01-L-SH" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "R" 0 0 50 H I L BNN "PARTREV" 14 | F5 "Samtec" 0 0 50 H I L BNN "MANUFACTURER" 15 | F6 "Manufacturer Recommendations" 0 0 50 H I L BNN "STANDARD" 16 | DRAW 17 | S -300 -300 300 400 0 0 10 f 18 | X 01 01 -500 300 200 R 40 40 0 0 P 19 | X 02 02 -500 200 200 R 40 40 0 0 P 20 | X 03 03 -500 100 200 R 40 40 0 0 P 21 | X 04 04 -500 0 200 R 40 40 0 0 P 22 | X 05 05 -500 -100 200 R 40 40 0 0 P 23 | X 06 06 -500 -200 200 R 40 40 0 0 P 24 | ENDDRAW 25 | ENDDEF 26 | # 27 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/TSM-106-01-T-SH-A.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # TSM-106-01-T-SH-A 7 | # 8 | DEF TSM-106-01-T-SH-A J 0 40 Y Y 1 L N 9 | F0 "J" -320 400 50 H V L BNN 10 | F1 "TSM-106-01-T-SH-A" -300 -400 50 H V L BNN 11 | F2 "SAMTEC_TSM-106-01-T-SH-A" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "R" 0 0 50 H I L BNN "PARTREV" 14 | F5 "Manufacturer Recommendations" 0 0 50 H I L BNN "STANDARD" 15 | F6 "Samtec" 0 0 50 H I L BNN "MANUFACTURER" 16 | DRAW 17 | S -300 -300 300 400 0 0 10 f 18 | X 01 01 -500 300 200 R 40 40 0 0 P 19 | X 02 02 -500 200 200 R 40 40 0 0 P 20 | X 03 03 -500 100 200 R 40 40 0 0 P 21 | X 04 04 -500 0 200 R 40 40 0 0 P 22 | X 05 05 -500 -100 200 R 40 40 0 0 P 23 | X 06 06 -500 -200 200 R 40 40 0 0 P 24 | ENDDRAW 25 | ENDDEF 26 | # 27 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/TSM-132-01-F-DV.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | #(c) SnapEDA 2016 (snapeda.com) 4 | #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 5 | # 6 | # TSM-132-01-F-DV 7 | # 8 | DEF TSM-132-01-F-DV J 0 40 Y Y 1 L N 9 | F0 "J" -320 1700 50 H V L BNN 10 | F1 "TSM-132-01-F-DV" -300 -1700 50 H V L BNN 11 | F2 "SAMTEC_TSM-132-01-F-DV" 0 0 50 H I L BNN 12 | F3 "" 0 0 50 H I L BNN 13 | F4 "SAMTEC" 0 0 50 H I L BNN "MANUFACTURER" 14 | DRAW 15 | S -300 -1600 300 1700 0 0 10 f 16 | X 01 01 -500 1600 200 R 40 40 0 0 P 17 | X 02 02 500 1600 200 L 40 40 0 0 P 18 | X 03 03 -500 1500 200 R 40 40 0 0 P 19 | X 04 04 500 1500 200 L 40 40 0 0 P 20 | X 05 05 -500 1400 200 R 40 40 0 0 P 21 | X 06 06 500 1400 200 L 40 40 0 0 P 22 | X 07 07 -500 1300 200 R 40 40 0 0 P 23 | X 08 08 500 1300 200 L 40 40 0 0 P 24 | X 09 09 -500 1200 200 R 40 40 0 0 P 25 | X 10 10 500 1200 200 L 40 40 0 0 P 26 | X 11 11 -500 1100 200 R 40 40 0 0 P 27 | X 12 12 500 1100 200 L 40 40 0 0 P 28 | X 13 13 -500 1000 200 R 40 40 0 0 P 29 | X 14 14 500 1000 200 L 40 40 0 0 P 30 | X 15 15 -500 900 200 R 40 40 0 0 P 31 | X 16 16 500 900 200 L 40 40 0 0 P 32 | X 17 17 -500 800 200 R 40 40 0 0 P 33 | X 18 18 500 800 200 L 40 40 0 0 P 34 | X 19 19 -500 700 200 R 40 40 0 0 P 35 | X 20 20 500 700 200 L 40 40 0 0 P 36 | X 21 21 -500 600 200 R 40 40 0 0 P 37 | X 22 22 500 600 200 L 40 40 0 0 P 38 | X 23 23 -500 500 200 R 40 40 0 0 P 39 | X 24 24 500 500 200 L 40 40 0 0 P 40 | X 25 25 -500 400 200 R 40 40 0 0 P 41 | X 26 26 500 400 200 L 40 40 0 0 P 42 | X 27 27 -500 300 200 R 40 40 0 0 P 43 | X 28 28 500 300 200 L 40 40 0 0 P 44 | X 29 29 -500 200 200 R 40 40 0 0 P 45 | X 30 30 500 200 200 L 40 40 0 0 P 46 | X 31 31 -500 100 200 R 40 40 0 0 P 47 | X 32 32 500 100 200 L 40 40 0 0 P 48 | X 33 33 -500 0 200 R 40 40 0 0 P 49 | X 34 34 500 0 200 L 40 40 0 0 P 50 | X 35 35 -500 -100 200 R 40 40 0 0 P 51 | X 36 36 500 -100 200 L 40 40 0 0 P 52 | X 37 37 -500 -200 200 R 40 40 0 0 P 53 | X 38 38 500 -200 200 L 40 40 0 0 P 54 | X 39 39 -500 -300 200 R 40 40 0 0 P 55 | X 40 40 500 -300 200 L 40 40 0 0 P 56 | X 41 41 -500 -400 200 R 40 40 0 0 P 57 | X 42 42 500 -400 200 L 40 40 0 0 P 58 | X 43 43 -500 -500 200 R 40 40 0 0 P 59 | X 44 44 500 -500 200 L 40 40 0 0 P 60 | X 45 45 -500 -600 200 R 40 40 0 0 P 61 | X 46 46 500 -600 200 L 40 40 0 0 P 62 | X 47 47 -500 -700 200 R 40 40 0 0 P 63 | X 48 48 500 -700 200 L 40 40 0 0 P 64 | X 49 49 -500 -800 200 R 40 40 0 0 P 65 | X 50 50 500 -800 200 L 40 40 0 0 P 66 | X 51 51 -500 -900 200 R 40 40 0 0 P 67 | X 52 52 500 -900 200 L 40 40 0 0 P 68 | X 53 53 -500 -1000 200 R 40 40 0 0 P 69 | X 54 54 500 -1000 200 L 40 40 0 0 P 70 | X 55 55 -500 -1100 200 R 40 40 0 0 P 71 | X 56 56 500 -1100 200 L 40 40 0 0 P 72 | X 57 57 -500 -1200 200 R 40 40 0 0 P 73 | X 58 58 500 -1200 200 L 40 40 0 0 P 74 | X 59 59 -500 -1300 200 R 40 40 0 0 P 75 | X 60 60 500 -1300 200 L 40 40 0 0 P 76 | X 61 61 -500 -1400 200 R 40 40 0 0 P 77 | X 62 62 500 -1400 200 L 40 40 0 0 P 78 | X 63 63 -500 -1500 200 R 40 40 0 0 P 79 | X 64 64 500 -1500 200 L 40 40 0 0 P 80 | ENDDRAW 81 | ENDDEF 82 | # 83 | # End Library -------------------------------------------------------------------------------- /nubus-to-ztex/ad1580.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # AD1580 5 | # 6 | DEF AD1580 U 0 40 Y Y 1 F N 7 | F0 "U" 0 200 50 H V C CNN 8 | F1 "AD1580" 0 100 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | SOT-23-3 13 | $ENDFPLIST 14 | DRAW 15 | S -150 50 150 -250 0 1 0 N 16 | X V+ 1 -250 0 100 R 50 50 1 1 I 17 | X V- 2 -250 -200 100 R 50 50 1 1 O 18 | X NC 3 250 -100 100 L 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | #End Library 23 | -------------------------------------------------------------------------------- /nubus-to-ztex/allpos2jlcpcb.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | cat nubus-to-ztex-all-pos.csv | sed -e 's/,118"/"/' | awk -F, '{ print $1","$4,","$5","$7","$6 }' | sed -e 's/bottom/Bottom/' -e 's/top/Top/' -e 's/Ref/Designator/' -e 's/PosX/"Mid X"/' -e 's/PosY/"Mid Y"/' -e 's/Side/Layer/' -e 's/Rot/Rotation/' >| nubus-to-ztex-all-pos-jlcpcb.csv 4 | -------------------------------------------------------------------------------- /nubus-to-ztex/cb3t3306.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # cb3t3306 5 | # 6 | DEF cb3t3306 U 0 40 Y Y 1 F N 7 | F0 "U" -50 -550 50 H V C CNN 8 | F1 "cb3t3306" 50 50 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S -200 0 250 -500 0 1 0 N 13 | X /1OE 1 -300 -100 100 R 50 50 1 1 I 14 | X 1A 2 -300 -200 100 R 50 50 1 1 B 15 | X 1B 3 -300 -300 100 R 50 50 1 1 B 16 | X GND 4 -300 -400 100 R 50 50 1 1 I 17 | X 2A 5 350 -400 100 L 50 50 1 1 B 18 | X 2B 6 350 -300 100 L 50 50 1 1 B 19 | X /2OE 7 350 -200 100 L 50 50 1 1 I 20 | X VCC 8 350 -100 100 L 50 50 1 1 I 21 | ENDDRAW 22 | ENDDEF 23 | # 24 | #End Library 25 | -------------------------------------------------------------------------------- /nubus-to-ztex/clock.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 9 9 7 | Title "" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | Wire Wire Line 17 | 3950 2750 3950 2450 18 | $Comp 19 | L power:GND #PWR0136 20 | U 1 1 64D5A010 21 | P 3175 2750 22 | F 0 "#PWR0136" H 3175 2500 50 0001 C CNN 23 | F 1 "GND" H 3180 2577 50 0000 C CNN 24 | F 2 "" H 3175 2750 50 0001 C CNN 25 | F 3 "" H 3175 2750 50 0001 C CNN 26 | 1 3175 2750 27 | 1 0 0 -1 28 | $EndComp 29 | $Comp 30 | L power:GND #PWR0137 31 | U 1 1 64D5AF8F 32 | P 3950 3350 33 | F 0 "#PWR0137" H 3950 3100 50 0001 C CNN 34 | F 1 "GND" H 3955 3177 50 0000 C CNN 35 | F 2 "" H 3950 3350 50 0001 C CNN 36 | F 3 "" H 3950 3350 50 0001 C CNN 37 | 1 3950 3350 38 | 1 0 0 -1 39 | $EndComp 40 | Text GLabel 4550 3050 2 50 Input Italic 0 41 | CLK_54_000 42 | NoConn ~ 3650 3050 43 | $Comp 44 | L power:+3V3 #PWR0138 45 | U 1 1 64EA4B87 46 | P 3175 2450 47 | F 0 "#PWR0138" H 3175 2300 50 0001 C CNN 48 | F 1 "+3V3" H 3190 2623 50 0000 C CNN 49 | F 2 "" H 3175 2450 50 0001 C CNN 50 | F 3 "" H 3175 2450 50 0001 C CNN 51 | 1 3175 2450 52 | 1 0 0 -1 53 | $EndComp 54 | $Comp 55 | L Device:C C? 56 | U 1 1 64F8FAD7 57 | P 3425 2600 58 | AR Path="/5F679B53/64F8FAD7" Ref="C?" Part="1" 59 | AR Path="/5F6B165A/64F8FAD7" Ref="C?" Part="1" 60 | AR Path="/612D28DD/64F8FAD7" Ref="C?" Part="1" 61 | AR Path="/61B62C00/64F8FAD7" Ref="C?" Part="1" 62 | AR Path="/64F8CFB4/64F8FAD7" Ref="C13" Part="1" 63 | F 0 "C13" H 3450 2700 50 0000 L CNN 64 | F 1 "10nF" H 3450 2500 50 0000 L CNN 65 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 3463 2450 50 0001 C CNN 66 | F 3 "" H 3425 2600 50 0000 C CNN 67 | F 4 "www.yageo.com" H 3425 2600 50 0001 C CNN "MNF1_URL" 68 | F 5 "0603B103K500NT" H 3425 2600 50 0001 C CNN "MPN" 69 | F 6 "603-CC603KRX7R8BB103" H 3425 2600 50 0001 C CNN "Mouser" 70 | F 7 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_FH-Guangdong-Fenghua-Advanced-Tech-0603B103K500NT_C57112.html" H 3425 2600 50 0001 C CNN "URL" 71 | 1 3425 2600 72 | 1 0 0 -1 73 | $EndComp 74 | Wire Wire Line 75 | 3950 2450 3425 2450 76 | $Comp 77 | L Device:C C? 78 | U 1 1 64F9279B 79 | P 3175 2600 80 | AR Path="/618F532C/64F9279B" Ref="C?" Part="1" 81 | AR Path="/618E8C75/64F9279B" Ref="C?" Part="1" 82 | AR Path="/64F8CFB4/64F9279B" Ref="C11" Part="1" 83 | F 0 "C11" H 3200 2700 50 0000 L CNN 84 | F 1 "100nF" H 3200 2500 50 0000 L CNN 85 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 3213 2450 50 0001 C CNN 86 | F 3 "" H 3175 2600 50 0000 C CNN 87 | F 4 "www.yageo.com" H 3175 2600 50 0001 C CNN "MNF1_URL" 88 | F 5 "CC0603KRX7R9BB104" H 3175 2600 50 0001 C CNN "MPN" 89 | F 6 "603-CC603KRX7R8BB104" H 3175 2600 50 0001 C CNN "Mouser" 90 | F 7 "?" H 3175 2600 50 0001 C CNN "Digikey" 91 | F 8 "" H 3175 2600 50 0001 C CNN "LCSC" 92 | F 9 "?" H 3175 2600 50 0001 C CNN "Koncar" 93 | F 10 "TB" H 3175 2600 50 0001 C CNN "Side" 94 | F 11 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_YAGEO-CC0603KRX7R9BB104_C14663.html" H 3175 2600 50 0001 C CNN "URL" 95 | 1 3175 2600 96 | 1 0 0 -1 97 | $EndComp 98 | Wire Wire Line 99 | 3425 2450 3175 2450 100 | Connection ~ 3425 2450 101 | Connection ~ 3175 2450 102 | Wire Wire Line 103 | 3425 2750 3175 2750 104 | Connection ~ 3175 2750 105 | $Comp 106 | L Device:R R? 107 | U 1 1 65008AD6 108 | P 4400 3050 109 | AR Path="/5F6B165A/65008AD6" Ref="R?" Part="1" 110 | AR Path="/5F679B53/65008AD6" Ref="R?" Part="1" 111 | AR Path="/5F69F4EF/65008AD6" Ref="R?" Part="1" 112 | AR Path="/60D72F2C/65008AD6" Ref="R?" Part="1" 113 | AR Path="/619A5A47/65008AD6" Ref="R?" Part="1" 114 | AR Path="/61B604DE/65008AD6" Ref="R?" Part="1" 115 | AR Path="/64F8CFB4/65008AD6" Ref="R8" Part="1" 116 | F 0 "R8" V 4480 3050 50 0000 C CNN 117 | F 1 "27" V 4400 3050 50 0000 C CNN 118 | F 2 "Resistor_SMD:R_0603_1608Metric" V 4330 3050 50 0001 C CNN 119 | F 3 "" H 4400 3050 50 0000 C CNN 120 | F 4 "0603WAF270JT5E" V 4400 3050 50 0001 C CNN "MPN" 121 | F 5 "ERJ-3EKF27R0V" V 4400 2450 50 0001 C CNN "MPN-ALT" 122 | F 6 "https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF270JT5E_C25190.html" V 4400 3050 50 0001 C CNN "URL" 123 | 1 4400 3050 124 | 0 1 1 0 125 | $EndComp 126 | $Comp 127 | L Oscillator:ASE-xxxMHz X1 128 | U 1 1 641BE3FE 129 | P 3950 3050 130 | F 0 "X1" H 4200 3225 50 0000 L CNN 131 | F 1 "ASE-xxxMHz" H 4175 2875 50 0000 L CNN 132 | F 2 "Oscillator:Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm" H 4650 2700 50 0001 C CNN 133 | F 3 "http://www.abracon.com/Oscillators/ASV.pdf" H 3850 3050 50 0001 C CNN 134 | F 4 "SX3M54.000M20F30TNN" H 3950 3050 50 0001 C CNN "MPN" 135 | F 5 "https://www.lcsc.com/product-detail/Oscillators_Shenzhen-SCTF-Elec-SX3M54-000M20F30TNN_C2901593.html" H 3950 3050 50 0001 C CNN "URL" 136 | 1 3950 3050 137 | 1 0 0 -1 138 | $EndComp 139 | $EndSCHEMATC 140 | -------------------------------------------------------------------------------- /nubus-to-ztex/fan.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 6 9 7 | Title "nubus-to-ztex extra conenctors (fan, ...)" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L Connector:Conn_01x03_Male J7 18 | U 1 1 60E1E49E 19 | P 4400 4750 20 | F 0 "J7" H 4506 5028 50 0000 C CNN 21 | F 1 "640456-3 (Fan)" H 4506 4937 50 0000 C CNN 22 | F 2 "Connector_Molex:Molex_KK-254_AE-6410-03A_1x03_P2.54mm_Vertical" H 4400 4750 50 0001 C CNN 23 | F 3 "~" H 4400 4750 50 0001 C CNN 24 | F 4 "22-27-2031" H 4400 4750 50 0001 C CNN "MPN-ALT" 25 | F 5 "Molex" H 4400 4750 50 0001 C CNN "Manufacturer-ALT" 26 | F 6 "https://www.mouser.fr/ProductDetail/Molex/22-27-2031?qs=%2Fha2pyFadugXOaGYK9vaczm7nZ04txhJn3OGcnGWT3U=" H 4400 4750 50 0001 C CNN "URL-ALT" 27 | F 7 "640456-3" H 4400 4750 50 0001 C CNN "MPN" 28 | F 8 "TE Connectivity" H 4400 4750 50 0001 C CNN "Manufacturer" 29 | F 9 "https://www.lcsc.com/product-detail/Wire-To-Board-Wire-To-Wire-Connector_TE-Connectivity-640456-3_C86503.html" H 4400 4750 50 0001 C CNN "URL" 30 | F 10 "DNP" H 4400 4750 50 0000 C CNN "DNP" 31 | 1 4400 4750 32 | 1 0 0 -1 33 | $EndComp 34 | $Comp 35 | L power:GND #PWR0107 36 | U 1 1 60E1EC2C 37 | P 4600 4650 38 | F 0 "#PWR0107" H 4600 4400 50 0001 C CNN 39 | F 1 "GND" V 4605 4522 50 0000 R CNN 40 | F 2 "" H 4600 4650 50 0001 C CNN 41 | F 3 "" H 4600 4650 50 0001 C CNN 42 | 1 4600 4650 43 | 0 -1 -1 0 44 | $EndComp 45 | $Comp 46 | L power:+5V #PWR0108 47 | U 1 1 60E1ED6C 48 | P 4600 4750 49 | F 0 "#PWR0108" H 4600 4600 50 0001 C CNN 50 | F 1 "+5V" V 4615 4878 50 0000 L CNN 51 | F 2 "" H 4600 4750 50 0001 C CNN 52 | F 3 "" H 4600 4750 50 0001 C CNN 53 | 1 4600 4750 54 | 0 1 1 0 55 | $EndComp 56 | $Comp 57 | L power:GND #PWR0109 58 | U 1 1 60E1FA97 59 | P 4600 4850 60 | F 0 "#PWR0109" H 4600 4600 50 0001 C CNN 61 | F 1 "GND" V 4605 4722 50 0000 R CNN 62 | F 2 "" H 4600 4850 50 0001 C CNN 63 | F 3 "" H 4600 4850 50 0001 C CNN 64 | 1 4600 4850 65 | 0 -1 -1 0 66 | $EndComp 67 | $Comp 68 | L Device:C C? 69 | U 1 1 60E24715 70 | P 5150 4800 71 | AR Path="/5F69F4EF/60E24715" Ref="C?" Part="1" 72 | AR Path="/5F6B165A/60E24715" Ref="C?" Part="1" 73 | AR Path="/61B99D2C/60E24715" Ref="C28" Part="1" 74 | F 0 "C28" H 5175 4900 50 0000 L CNN 75 | F 1 "47uF 10V 1206" H 5175 4700 50 0000 L CNN 76 | F 2 "Capacitor_SMD:C_1206_3216Metric" H 5188 4650 50 0001 C CNN 77 | F 3 "" H 5150 4800 50 0000 C CNN 78 | F 4 "C2012X5R1A476MTJ00E" H 5150 4800 50 0001 C CNN "MPN-ALT" 79 | F 5 "https://lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_TDK-C2012X5R1A476MTJ00E_C76636.html" H 5150 4800 50 0001 C CNN "URL-ALT" 80 | F 6 "CL31A476MPHNNNE" H 5150 4800 50 0001 C CNN "MPN" 81 | F 7 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_Samsung-Electro-Mechanics-CL31A476MPHNNNE_C96123.html" H 5150 4800 50 0001 C CNN "URL" 82 | 1 5150 4800 83 | 1 0 0 -1 84 | $EndComp 85 | Wire Wire Line 86 | 4600 4750 5150 4750 87 | Wire Wire Line 88 | 5150 4750 5150 4650 89 | Connection ~ 4600 4750 90 | Wire Wire Line 91 | 4600 4850 5150 4850 92 | Wire Wire Line 93 | 5150 4850 5150 4950 94 | Connection ~ 4600 4850 95 | Text Notes 3950 4750 0 50 ~ 0 96 | 5V Fan 97 | $EndSCHEMATC 98 | -------------------------------------------------------------------------------- /nubus-to-ztex/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name 74CB3T16211)(type KiCad)(uri ${KIPRJMOD}/74CB3T16211.pretty)(options "")(descr "")) 3 | (lib (name For_SeeedStudio)(type KiCad)(uri ${KIPRJMOD}/For_SeeedStudio.pretty)(options "")(descr "")) 4 | (lib (name Molex2x32)(type KiCad)(uri ${KIPRJMOD}/Molex2x32.pretty)(options "")(descr "")) 5 | (lib (name XilinxJtag)(type KiCad)(uri ${KIPRJMOD}/XilinxJtag.pretty)(options "")(descr "")) 6 | (lib (name MOLEX_47219-2001)(type KiCad)(uri ${KIPRJMOD}/NuBus/MOLEX_47219-2001.pretty)(options "")(descr "")) 7 | ) 8 | -------------------------------------------------------------------------------- /nubus-to-ztex/gui_defaults.par: -------------------------------------------------------------------------------- 1 | 2 | (gui_defaults 3 | (windows 4 | (board_frame 5 | visible 6 | (bounds 7 | 120 0 1158 919 8 | ) 9 | ) 10 | (color_manager 11 | not_visible 12 | (bounds 13 | 0 600 1118 171 14 | ) 15 | ) 16 | (layer_visibility 17 | not_visible 18 | (bounds 19 | 0 450 365 217 20 | ) 21 | ) 22 | (object_visibility 23 | not_visible 24 | (bounds 25 | 0 550 408 399 26 | ) 27 | ) 28 | (display_miscellanious 29 | not_visible 30 | (bounds 31 | 0 350 244 336 32 | ) 33 | ) 34 | (snapshots 35 | not_visible 36 | (bounds 37 | 0 250 235 258 38 | ) 39 | ) 40 | (select_parameter 41 | not_visible 42 | (bounds 43 | 0 0 244 520 44 | ) 45 | ) 46 | (route_parameter 47 | not_visible 48 | (bounds 49 | 0 100 263 545 50 | ) 51 | ) 52 | (manual_rules 53 | not_visible 54 | (bounds 55 | 0 0 325 199 56 | ) 57 | ) 58 | (route_details 59 | not_visible 60 | (bounds 61 | 0 0 270 243 62 | ) 63 | ) 64 | (move_parameter 65 | not_visible 66 | (bounds 67 | 0 50 311 142 68 | ) 69 | ) 70 | (clearance_matrix 71 | not_visible 72 | (bounds 73 | 0 150 568 276 74 | ) 75 | ) 76 | (via_rules 77 | not_visible 78 | (bounds 79 | 50 150 333 453 80 | ) 81 | ) 82 | (edit_vias 83 | not_visible 84 | (bounds 85 | 100 150 411 122 86 | ) 87 | ) 88 | (edit_net_rules 89 | not_visible 90 | (bounds 91 | 100 200 911 122 92 | ) 93 | ) 94 | (assign_net_rules 95 | not_visible 96 | (bounds 97 | 100 250 226 375 98 | ) 99 | ) 100 | (padstack_info 101 | not_visible 102 | (bounds 103 | 100 30 0 0 104 | ) 105 | ) 106 | (package_info 107 | not_visible 108 | (bounds 109 | 200 30 0 0 110 | ) 111 | ) 112 | (component_info 113 | not_visible 114 | (bounds 115 | 300 30 0 0 116 | ) 117 | ) 118 | (net_info 119 | not_visible 120 | (bounds 121 | 350 30 0 0 122 | ) 123 | ) 124 | (incompletes_info 125 | not_visible 126 | (bounds 127 | 400 30 0 0 128 | ) 129 | ) 130 | (violations_info 131 | not_visible 132 | (bounds 133 | 500 30 0 0 134 | ) 135 | ) 136 | ) 137 | (colors 138 | (background 139 | 0 0 0 140 | ) 141 | (hilight 0.8 142 | 230 255 255 143 | ) 144 | (incompletes 1.0 145 | 255 255 255 146 | ) 147 | (outline 148 | 100 150 255 149 | ) 150 | (component_front 151 | 0 0 255 152 | ) 153 | (component_back 154 | 255 0 0 155 | ) 156 | (violations 157 | 255 0 255 158 | ) 159 | (length_matching 0.1 160 | 0 255 0 161 | ) 162 | (traces 0.4 163 | 255 0 0 164 | 0 255 0 165 | 255 255 0 166 | 0 0 255 167 | ) 168 | (fixed_traces 0.4 169 | 255 0 0 170 | 0 255 0 171 | 255 255 0 172 | 0 0 255 173 | ) 174 | (vias 0.6 175 | 200 200 0 176 | 200 200 0 177 | 200 200 0 178 | 200 200 0 179 | ) 180 | (fixed_vias 0.6 181 | 200 200 0 182 | 200 200 0 183 | 200 200 0 184 | 200 200 0 185 | ) 186 | (pins 0.6 187 | 150 50 0 188 | 255 150 0 189 | 255 150 0 190 | 160 80 0 191 | ) 192 | (conduction 0.2 193 | 0 150 0 194 | 0 200 60 195 | 0 200 60 196 | 100 100 0 197 | ) 198 | (keepout 0.2 199 | 0 110 110 200 | 0 200 200 201 | 0 200 200 202 | 0 100 160 203 | ) 204 | (via_keepout 0.2 205 | 100 100 100 206 | 100 100 100 207 | 100 100 100 208 | 100 100 100 209 | ) 210 | ) 211 | (parameter 212 | (selection_layers 213 | all_visible 214 | ) 215 | (selectable_items 216 | TRACES VIAS PINS FIXED UNFIXED 217 | ) 218 | (via_snap_to_smd_center 219 | on 220 | ) 221 | (route_mode 222 | dynamic 223 | ) 224 | (shove_enabled 225 | on 226 | ) 227 | (drag_components_enabled 228 | on 229 | ) 230 | (hilight_routing_obstacle 231 | off 232 | ) 233 | (pull_tight_region 234 | 2147483647 235 | ) 236 | (pull_tight_accuracy 237 | 500 238 | ) 239 | (clearance_compensation 240 | off 241 | ) 242 | (ignore_conduction_areas 243 | on 244 | ) 245 | (automatic_layer_dimming 246 | 0.7 247 | ) 248 | (deselected_snapshot_attributes 249 | ) 250 | ) 251 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/logo.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # LogoLitex 5 | # 6 | DEF LogoLitex GRAPHIC 0 40 Y Y 1 F N 7 | F0 "GRAPHIC" 0 -100 50 H V C CNN 8 | F1 "LogoLitex" 0 0 50 H V C CNN 9 | F2 "For_SeeedStudio:litex_logo" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | DRAW 12 | S -200 50 200 -150 0 1 0 N 13 | ENDDRAW 14 | ENDDEF 15 | # 16 | # LogoNetBSD 17 | # 18 | DEF LogoNetBSD GRAPHIC 0 40 Y Y 1 F N 19 | F0 "GRAPHIC" 0 0 50 H V C CNN 20 | F1 "LogoNetBSD" 0 100 50 H V C CNN 21 | F2 "For_SeeedStudio:netbsd_logo" 0 0 50 H I C CNN 22 | F3 "" 0 0 50 H I C CNN 23 | DRAW 24 | S -250 150 250 -50 0 1 0 N 25 | ENDDRAW 26 | ENDDEF 27 | # 28 | #End Library 29 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-B_Paste.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.9+dfsg1-1~bpo10+1* 2 | G04 #@! TF.CreationDate,2023-04-04T12:39:48+02:00* 3 | G04 #@! TF.ProjectId,nubus-to-ztex,6e756275-732d-4746-9f2d-7a7465782e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Paste,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 5.1.9+dfsg1-1~bpo10+1) date 2023-04-04 12:39:48* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | G04 APERTURE END LIST* 15 | M02* 16 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-B_SilkS.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.9+dfsg1-1~bpo10+1* 2 | G04 #@! TF.CreationDate,2023-04-04T12:39:48+02:00* 3 | G04 #@! TF.ProjectId,nubus-to-ztex,6e756275-732d-4746-9f2d-7a7465782e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 5.1.9+dfsg1-1~bpo10+1) date 2023-04-04 12:39:48* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | G04 APERTURE END LIST* 15 | M02* 16 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.9+dfsg1-1~bpo10+1* 2 | G04 #@! TF.CreationDate,2023-04-04T12:39:48+02:00* 3 | G04 #@! TF.ProjectId,nubus-to-ztex,6e756275-732d-4746-9f2d-7a7465782e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW 5.1.9+dfsg1-1~bpo10+1) date 2023-04-04 12:39:48* 9 | %MOMM*% 10 | %LPD*% 11 | G01* 12 | G04 APERTURE LIST* 13 | G04 #@! TA.AperFunction,Profile* 14 | %ADD10C,0.150000*% 15 | G04 #@! TD* 16 | G04 #@! TA.AperFunction,Profile* 17 | %ADD11C,0.200000*% 18 | G04 #@! TD* 19 | G04 APERTURE END LIST* 20 | D10* 21 | X262500000Y-13030000D02* 22 | G75* 23 | G02* 24 | X262500000Y-11630000I0J700000D01* 25 | G01* 26 | X262500000Y-100280000D02* 27 | G75* 28 | G02* 29 | X262500000Y-98880000I0J700000D01* 30 | G01* 31 | X270060000Y-7830000D02* 32 | G75* 33 | G03* 34 | X270060000Y-7830000I-1800000J0D01* 35 | G01* 36 | X273330000Y-5100000D02* 37 | X273330000Y-10680000D01* 38 | X272380000Y-13030000D02* 39 | X262500000Y-13030000D01* 40 | X272380000Y-11630000D02* 41 | X273330000Y-10680000D01* 42 | X272380000Y-11630000D02* 43 | X262500000Y-11630000D01* 44 | X272380000Y-13030000D02* 45 | X273330000Y-13980000D01* 46 | X273330000Y-105080000D02* 47 | X273330000Y-101230000D01* 48 | X272380000Y-100280000D02* 49 | X273330000Y-101230000D01* 50 | X272380000Y-98880000D02* 51 | X273330000Y-97930000D01* 52 | X272380000Y-98880000D02* 53 | X262500000Y-98880000D01* 54 | X272380000Y-100280000D02* 55 | X262500000Y-100280000D01* 56 | D11* 57 | X200930000Y-12480000D02* 58 | G75* 59 | G03* 60 | X200930000Y-12480000I-1600000J0D01* 61 | G01* 62 | D10* 63 | X273330000Y-97930000D02* 64 | X273330000Y-13980000D01* 65 | D11* 66 | X230930000Y-12480000D02* 67 | G75* 68 | G03* 69 | X230930000Y-12480000I-1600000J0D01* 70 | G01* 71 | X270060000Y-95080000D02* 72 | G75* 73 | G03* 74 | X270060000Y-95080000I-1800000J0D01* 75 | G01* 76 | D10* 77 | X111730000Y-5100000D02* 78 | X111730000Y-105080000D01* 79 | X111730000Y-5100000D02* 80 | X273330000Y-5100000D01* 81 | X111730000Y-105080000D02* 82 | X273330000Y-105080000D01* 83 | M02* 84 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 5.1.9+dfsg1-1~bpo10+1} date Tue Apr 4 12:39:50 2023 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2023-04-04T12:39:50+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.9+dfsg1-1~bpo10+1 6 | ; #@! TF.FileFunction,NonPlated,1,4,NPTH 7 | FMAT,2 8 | INCH 9 | T1C0.1122 10 | % 11 | G90 12 | G05 13 | T1 14 | X4.574Y-4.037 15 | X8.074Y-4.037 16 | T0 17 | M30 18 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-all-pos-jlcpcb.csv: -------------------------------------------------------------------------------- 1 | Designator,"Mid X" ,"Mid Y",Layer,Rotation 2 | "C1",172.375000 ,-33.600000,Top,180.000000 3 | "C2",166.840000 ,-55.760000,Top,0.000000 4 | "C3",131.300000 ,-55.500000,Top,0.000000 5 | "C4",119.200000 ,-84.780000,Top,180.000000 6 | "C5",182.500000 ,-72.912500,Top,90.000000 7 | "C6",138.700000 ,-90.050000,Top,90.000000 8 | "C7",270.850000 ,-51.000000,Top,180.000000 9 | "C8",130.440000 ,-79.640000,Top,0.000000 10 | "C9",145.750000 ,-10.250000,Top,180.000000 11 | "C10",166.100000 ,-8.775000,Top,90.000000 12 | "C11",173.635000 ,-20.550000,Top,90.000000 13 | "C12",189.211371 ,-51.462953,Top,90.000000 14 | "C13",171.635000 ,-20.550000,Top,90.000000 15 | "C14",149.900000 ,-72.912500,Top,90.000000 16 | "C15",257.850000 ,-36.102500,Top,90.000000 17 | "C16",197.000000 ,-74.462500,Top,270.000000 18 | "C17",163.000000 ,-72.912500,Top,90.000000 19 | "C18",174.500000 ,-72.912500,Top,90.000000 20 | "C19",189.500000 ,-72.912500,Top,90.000000 21 | "C20",253.820000 ,-53.020000,Top,90.000000 22 | "C21",259.750000 ,-53.810000,Top,180.000000 23 | "C22",256.290000 ,-54.600000,Top,90.000000 24 | "C23",244.860000 ,-61.090000,Top,90.000000 25 | "C24",263.030000 ,-66.570000,Top,270.000000 26 | "C25",257.410000 ,-86.560000,Top,180.000000 27 | "C26",254.630000 ,-89.260000,Top,0.000000 28 | "C27",253.050000 ,-81.460000,Top,180.000000 29 | "C28",222.275000 ,-94.850000,Top,0.000000 30 | "C29",170.500000 ,-74.462500,Top,270.000000 31 | "C30",137.700000 ,-46.800000,Top,270.000000 32 | "C31",141.000000 ,-16.060293,Top,270.000000 33 | "C32",130.440000 ,-82.360000,Top,0.000000 34 | "D1",117.780000 ,-40.410000,Top,0.000000 35 | "D2",117.780000 ,-38.158334,Top,0.000000 36 | "D3",114.800000 ,-15.650000,Top,90.000000 37 | "D6",134.880000 ,-20.210293,Top,90.000000 38 | "D7",137.410000 ,-20.210293,Top,90.000000 39 | "D8",122.760000 ,-69.150000,Top,180.000000 40 | "D9",173.744189 ,-11.131035,Top,270.000000 41 | "D10",171.204189 ,-11.131035,Top,270.000000 42 | "D11",123.052634 ,-52.877042,Top,180.000000 43 | "D12",123.052634 ,-49.910374,Top,180.000000 44 | "D13",123.052634 ,-46.943708,Top,180.000000 45 | "D14",123.052634 ,-43.977042,Top,180.000000 46 | "FB1",257.870000 ,-84.070000,Top,0.000000 47 | "GRAPHIC1",230.730000 ,-77.000000,Top,0.000000 48 | "J1",231.080000 ,-27.730000,Top,270.000000 49 | "J4",200.000000 ,-100.000000,Top,180.000000 50 | "J5",268.900000 ,-62.300000,Top,90.000000 51 | "J6",270.750000 ,-79.070000,Top,90.000000 52 | "J8",263.000000 ,-36.890000,Top,180.000000 53 | "JAB1",130.000000 ,-61.750000,Top,90.000000 54 | "JCD1",130.000000 ,-30.000000,Top,90.000000 55 | "P1",156.000000 ,-12.750000,Top,180.000000 56 | "R1",121.520000 ,-40.410000,Top,180.000000 57 | "R2",121.520000 ,-38.158334,Top,180.000000 58 | "R3",114.800000 ,-12.000000,Top,270.000000 59 | "R4",160.500000 ,-72.200000,Top,180.000000 60 | "R5",133.497842 ,-86.007091,Top,90.000000 61 | "R6",131.697842 ,-86.007091,Top,90.000000 62 | "R7",129.897842 ,-86.007091,Top,90.000000 63 | "R8",166.385000 ,-23.600000,Top,0.000000 64 | "R9",270.337500 ,-46.930000,Top,180.000000 65 | "R11",134.880000 ,-16.060293,Top,270.000000 66 | "R12",137.420000 ,-16.060293,Top,270.000000 67 | "R13",118.610000 ,-69.150000,Top,0.000000 68 | "R14",173.744189 ,-15.161035,Top,90.000000 69 | "R15",171.204189 ,-15.161035,Top,90.000000 70 | "R16",119.052634 ,-52.877042,Top,0.000000 71 | "R17",119.052634 ,-49.910374,Top,0.000000 72 | "R18",119.052634 ,-46.943708,Top,0.000000 73 | "R19",119.052634 ,-43.977042,Top,0.000000 74 | "R22",260.500000 ,-78.395000,Top,180.000000 75 | "R23",260.500000 ,-80.395000,Top,180.000000 76 | "R26",249.240000 ,-86.310000,Top,180.000000 77 | "R27",249.240000 ,-84.110000,Top,180.000000 78 | "R36",114.400000 ,-83.700000,Top,180.000000 79 | "R37",120.300000 ,-79.800000,Top,0.000000 80 | "R38",125.500000 ,-83.300000,Top,180.000000 81 | "R39",121.400000 ,-82.700000,Top,0.000000 82 | "R40",181.412661 ,-85.255497,Top,0.000000 83 | "R41",185.800000 ,-72.500000,Top,180.000000 84 | "R42",143.000000 ,-84.900000,Top,180.000000 85 | "R43",144.600000 ,-83.200000,Top,0.000000 86 | "R44",135.900000 ,-89.600000,Top,90.000000 87 | "R45",139.600000 ,-84.900000,Top,180.000000 88 | "U1",116.700000 ,-88.780000,Top,0.000000 89 | "U2",184.500000 ,-78.500000,Top,90.000000 90 | "U3",143.750000 ,-88.750000,Top,180.000000 91 | "U4",265.400000 ,-79.395000,Top,270.000000 92 | "U5",152.500000 ,-78.500000,Top,90.000000 93 | "U6",165.500000 ,-78.500000,Top,90.000000 94 | "U7",177.000000 ,-78.500000,Top,90.000000 95 | "U8",192.000000 ,-78.500000,Top,90.000000 96 | "U9",250.950000 ,-58.950000,Top,0.000000 97 | "U11",252.900000 ,-85.210000,Top,270.000000 98 | "U13",132.450000 ,-74.940000,Top,180.000000 99 | "U14",142.200000 ,-48.800000,Top,90.000000 100 | "U15",184.511371 ,-49.462953,Top,270.000000 101 | "X1",168.260000 ,-20.500000,Top,180.000000 102 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-bottom.pos: -------------------------------------------------------------------------------- 1 | ### Module positions - created on Tue Apr 4 12:40:12 2023 ### 2 | ### Printed by Pcbnew version kicad 5.1.9+dfsg1-1~bpo10+1 3 | ## Unit = mm, Angle = deg. 4 | ## Side : bottom 5 | # Ref Val Package PosX PosY Rot Side 6 | ## End 7 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-drl.rpt: -------------------------------------------------------------------------------- 1 | Drill report for /home/dolbeau/MAC/NuBusFPGA.V1_2/nubus-to-ztex/nubus-to-ztex.kicad_pcb 2 | Created on Tue Apr 4 12:39:53 2023 3 | 4 | Copper Layer Stackup: 5 | ============================================================= 6 | L1 : F.Cu front 7 | L2 : In1.Cu in1 8 | L3 : In2.Cu in2 9 | L4 : B.Cu back 10 | 11 | 12 | Drill file 'nubus-to-ztex-PTH.drl' contains 13 | plated through holes: 14 | ============================================================= 15 | T1 0.30mm 0.012" (39 holes) 16 | T2 0.40mm 0.016" (125 holes) 17 | T3 0.50mm 0.020" (2 holes) (with 2 slots) 18 | T4 0.55mm 0.022" (2 holes) (with 2 slots) 19 | T5 0.90mm 0.035" (14 holes) 20 | T6 1.00mm 0.039" (96 holes) 21 | T7 1.02mm 0.040" (150 holes) 22 | T8 1.20mm 0.047" (3 holes) 23 | T9 1.30mm 0.051" (4 holes) 24 | T10 2.20mm 0.087" (1 hole) 25 | 26 | Total plated holes count 436 27 | 28 | 29 | Drill file 'nubus-to-ztex-NPTH.drl' contains 30 | unplated through holes: 31 | ============================================================= 32 | T1 2.85mm 0.112" (2 holes) 33 | 34 | Total unplated holes count 2 35 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex-jlcpcb.csv: -------------------------------------------------------------------------------- 1 | Comment,Designator,Footprint 2 | 0603B103K500NT,"C13,C20",Capacitor_SMD:C_0603_1608Metric 3 | 0603WAF1002T5E,"R4,R5,R6,R7,R26,R27,R36,R37,R38,R39,R40,R41,R42,R43,R44,R45",Resistor_SMD:R_0603_1608Metric 4 | 0603WAF270JT5E,"R8,R22,R23",Resistor_SMD:R_0603_1608Metric 5 | 0603WAF5600T5E,"R1,R2,R3,R11,R12,R13,R14,R15,R16,R17,R18,R19",Resistor_SMD:R_0603_1608Metric 6 | 10029449-111RLF,J5,For_SeeedStudio:HDMI_A_Amphenol_10029449-111 7 | 10118194-0001LF,J6,Connector_USB:USB_Micro-B_Amphenol_10118194_Horizontal 8 | 19-213/Y2C-CQ2R2L/3T(CY),"D6,D7,D8,D9,D10",LED_SMD:LED_0603_1608Metric 9 | 19-217/BHC-ZL1M2RY/3T,D3,LED_SMD:LED_0603_1608Metric 10 | 19-217/GHC-YR1S2/3T,"D11,D12,D13,D14",LED_SMD:LED_0603_1608Metric 11 | 77313-824-64LF,"JAB1,JCD1",For_SeeedStudio:PinHeader_2x32_P2.54mm_Vertical_For_SeeedStudio 12 | 86093967113745ELF,J4,For_SeeedStudio:DIN41612_C_3x32_Male_Horizontal_THT 13 | A2541HWR-2x8P,J8,For_SeeedStudio:PinSocket_2x08_P2.54mm_Horizontal_ForSeeedStudio 14 | BLM21PG221SN1D,FB1,Inductor_SMD:L_0805_2012Metric 15 | C0805X103K501T,C7,Capacitor_SMD:C_0805_2012Metric 16 | CC0603KRX7R9BB104,"C1,C2,C4,C5,C6,C8,C9,C11,C12,C14,C15,C17,C18,C19,C22,C23,C24,C26,C27,C30",Capacitor_SMD:C_0603_1608Metric 17 | CL10A105KB8NNNC,"C16,C29,C31,C32",Capacitor_SMD:C_0603_1608Metric 18 | CL31A107MQHNNNE,C25,Capacitor_SMD:C_1206_3216Metric 19 | CL31A476MPHNNNE,"C3,C10,C21,C28",Capacitor_SMD:C_1206_3216Metric 20 | DM3CS-SF,P1,For_SeeedStudio:HRS_DM3CS-SF 21 | HR1206J1M00P05Z,R9,Resistor_SMD:R_1206_3216Metric 22 | KT-0603R,"D1,D2",LED_SMD:LED_0603_1608Metric 23 | SN74CB3T3245PWR,"U13,U14,U15",For_SeeedStudio:TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio 24 | SN74LVTH125PWR,"U1,U2,U3",Package_SO:TSSOP-14_4.4x5mm_P0.65mm 25 | SN74LVTH245APWR,"U5,U6,U7,U8",For_SeeedStudio:TSSOP-20_4.4x6.5mm_P0.65mm_ForSeeedStudio 26 | SRV05-4-P-T7,U4,Package_TO_SOT_SMD:SOT-23-6 27 | SX3M54.000M20F30TNN,X1,Oscillator:Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm 28 | TPD12S016PWR,U9,For_SeeedStudio:SOP65P640X120-24N 29 | TPS2051CDBVR,U11,Package_TO_SOT_SMD:SOT-23-5 30 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex/nubus-to-ztex.bin -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.csv: -------------------------------------------------------------------------------- 1 | Part/Designator,Manufacture Part Number/Seeed SKU,Quantity,URL,LCSC ref 2 | "C13,C20",0603B103K500NT,2,https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_FH-Guangdong-Fenghua-Advanced-Tech-0603B103K500NT_C57112.html, 3 | "R4,R5,R6,R7,R26,R27,R36,R37,R38,R39,R40,R41,R42,R43,R44,R45",0603WAF1002T5E,16,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF1002T5E_C25804.html, 4 | "R8,R22,R23",0603WAF270JT5E,3,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF270JT5E_C25190.html, 5 | "R1,R2,R3,R11,R12,R13,R14,R15,R16,R17,R18,R19",0603WAF5600T5E,12,https://www.lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF5600T5E_C23204.html, 6 | J5,10029449-111RLF,1,https://www.lcsc.com/product-detail/D-Sub-DVI-HDMI-Connectors_Amphenol-ICC-10029449-111RLF_C427307.html, 7 | J6,10118194-0001LF,1,https://www.lcsc.com/product-detail/USB-Connectors_Amphenol-ICC-10118194-0001LF_C132563.html, 8 | "D6,D7,D8,D9,D10",19-213/Y2C-CQ2R2L/3T(CY),5,https://www.lcsc.com/product-detail/Light-Emitting-Diodes-LED_Everlight-Elec-19-213-Y2C-CQ2R2L-3T-CY_C72038.html, 9 | D3,19-217/BHC-ZL1M2RY/3T,1,https://www.lcsc.com/product-detail/Light-Emitting-Diodes-LED_Everlight-Elec-19-217-BHC-ZL1M2RY-3T_C72041.html, 10 | "D11,D12,D13,D14",19-217/GHC-YR1S2/3T,4,https://www.lcsc.com/product-detail/Light-Emitting-Diodes-LED_Everlight-Elec-19-217-GHC-YR1S2-3T_C72043.html, 11 | "JAB1,JCD1",77313-824-64LF,2,https://eu.mouser.com/ProductDetail/Amphenol-FCI/77313-101-64LF?qs=xJiur%252Bgubk1MSan%2F7C0v%252BA%3D%3D, 12 | J4,86093967113745ELF,1,https://www.lcsc.com/product-detail/Mezzanine-Connectors-Board-to-Board_MOLEX-0850030567_C3654485.html, 13 | J8,A2541HWR-2x8P,1,https://www.lcsc.com/product-detail/Female-Headers_CJT-Changjiang-Connectors-A2541HWR-2x8P_C239359.html, 14 | FB1,BLM21PG221SN1D,1,https://www.lcsc.com/product-detail/Ferrite-Beads_Murata-Electronics-BLM21PG221SN1D_C85840.html, 15 | C7,C0805X103K501T,1,https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_IHHEC-HOLY-STONE-ENTERPRISE-CO-LTD-C0805X103K501T_C105950.html, 16 | "C1,C2,C4,C5,C6,C8,C9,C11,C12,C14,C15,C17,C18,C19,C22,C23,C24,C26,C27,C30",CC0603KRX7R9BB104,20,https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_YAGEO-CC0603KRX7R9BB104_C14663.html, 17 | "C16,C29,C31,C32",CL10A105KB8NNNC,4,, 18 | C25,CL31A107MQHNNNE,1,https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_Samsung-Electro-Mechanics-CL31A107MQHNNNE_C15008.html, 19 | "C3,C10,C21,C28",CL31A476MPHNNNE,4,https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_Samsung-Electro-Mechanics-CL31A476MPHNNNE_C96123.html, 20 | P1,DM3CS-SF,1,https://www.lcsc.com/product-detail/SD-Card-Connectors_HRS-Hirose-DM3CS-SF_C202111.html, 21 | R9,HR1206J1M00P05Z,1,https://www.lcsc.com/product-detail/Chip-Resistor-Surface-Mount_Ever-Ohms-Tech-HR1206J1M00P05Z_C175518.html, 22 | "D1,D2",KT-0603R,2,https://jlcpcb.com/partdetail/Hubei_KentoElec-KT0603R/C2286, 23 | "U13,U14,U15",SN74CB3T3245PWR,3,https://www.lcsc.com/product-detail/Signal-Switches-Encoders-Decoders-Multiplexers_Texas-Instruments-SN74CB3T3245PWR_C15298.html, 24 | "U1,U2,U3",SN74LVTH125PWR,3,https://www.lcsc.com/product-detail/Buffer-Driver-Transceiver_Texas-Instruments-SN74LVTH125PWR_C7042.html, 25 | "U5,U6,U7,U8",SN74LVTH245APWR,4,https://www.lcsc.com/product-detail/Buffer-Driver-Transceiver_Texas-Instruments-SN74LVTH245APWR_C2652121.html, 26 | U4,SRV05-4-P-T7,1,https://www.lcsc.com/product-detail/TVS_ProTek-Devices-SRV05-4-P-T7_C85364.html, 27 | X1,SX3M54.000M20F30TNN,1,https://www.lcsc.com/product-detail/Oscillators_Shenzhen-SCTF-Elec-SX3M54-000M20F30TNN_C2901593.html, 28 | U9,TPD12S016PWR,1,https://lcsc.com/product-detail/Interface-Specialized_Texas-Instruments-TPD12S016PWR_C201665.html, 29 | U11,TPS2051CDBVR,1,https://lcsc.com/product-detail/Power-Distribution-Switches_Texas-Instruments-TPS2051CDBVR_C129581.html, 30 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.pro: -------------------------------------------------------------------------------- 1 | update=Fri Dec 2 14:59:49 2022 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName= 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName=Pcbnew 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead=nubus-to-ztex.net 29 | CopperLayerCount=4 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.1524 36 | MinViaDiameter=0.4 37 | MinViaDrill=0.3 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.1524 42 | ViaDiameter1=0.45 43 | ViaDrill1=0.3 44 | ViaDiameter2=0.45 45 | ViaDrill2=0.3 46 | ViaDiameter3=0.8 47 | ViaDrill3=0.4 48 | dPairWidth1=0.1524 49 | dPairGap1=0.1524 50 | dPairViaGap1=0.25 51 | SilkLineWidth=0.15 52 | SilkTextSizeV=1 53 | SilkTextSizeH=1 54 | SilkTextSizeThickness=0.15 55 | SilkTextItalic=0 56 | SilkTextUpright=1 57 | CopperLineWidth=0.15 58 | CopperTextSizeV=1.5 59 | CopperTextSizeH=1.5 60 | CopperTextThickness=0.3 61 | CopperTextItalic=0 62 | CopperTextUpright=1 63 | EdgeCutLineWidth=0.15 64 | CourtyardLineWidth=0.05 65 | OthersLineWidth=0.15 66 | OthersTextSizeV=1 67 | OthersTextSizeH=1 68 | OthersTextSizeThickness=0.15 69 | OthersTextItalic=0 70 | OthersTextUpright=1 71 | SolderMaskClearance=0.051 72 | SolderMaskMinWidth=0.25 73 | SolderPasteClearance=0 74 | SolderPasteRatio=-0 75 | [pcbnew/Layer.F.Cu] 76 | Name=F.Cu 77 | Type=0 78 | Enabled=1 79 | [pcbnew/Layer.In1.Cu] 80 | Name=In1.Cu 81 | Type=0 82 | Enabled=1 83 | [pcbnew/Layer.In2.Cu] 84 | Name=In2.Cu 85 | Type=0 86 | Enabled=1 87 | [pcbnew/Layer.In3.Cu] 88 | Name=In3.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In4.Cu] 92 | Name=In4.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In5.Cu] 96 | Name=In5.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In6.Cu] 100 | Name=In6.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In7.Cu] 104 | Name=In7.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In8.Cu] 108 | Name=In8.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In9.Cu] 112 | Name=In9.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In10.Cu] 116 | Name=In10.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In11.Cu] 120 | Name=In11.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In12.Cu] 124 | Name=In12.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In13.Cu] 128 | Name=In13.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In14.Cu] 132 | Name=In14.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In15.Cu] 136 | Name=In15.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In16.Cu] 140 | Name=In16.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In17.Cu] 144 | Name=In17.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In18.Cu] 148 | Name=In18.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In19.Cu] 152 | Name=In19.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In20.Cu] 156 | Name=In20.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In21.Cu] 160 | Name=In21.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In22.Cu] 164 | Name=In22.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In23.Cu] 168 | Name=In23.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In24.Cu] 172 | Name=In24.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In25.Cu] 176 | Name=In25.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In26.Cu] 180 | Name=In26.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In27.Cu] 184 | Name=In27.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In28.Cu] 188 | Name=In28.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.In29.Cu] 192 | Name=In29.Cu 193 | Type=0 194 | Enabled=0 195 | [pcbnew/Layer.In30.Cu] 196 | Name=In30.Cu 197 | Type=0 198 | Enabled=0 199 | [pcbnew/Layer.B.Cu] 200 | Name=B.Cu 201 | Type=0 202 | Enabled=1 203 | [pcbnew/Layer.B.Adhes] 204 | Enabled=1 205 | [pcbnew/Layer.F.Adhes] 206 | Enabled=1 207 | [pcbnew/Layer.B.Paste] 208 | Enabled=1 209 | [pcbnew/Layer.F.Paste] 210 | Enabled=1 211 | [pcbnew/Layer.B.SilkS] 212 | Enabled=1 213 | [pcbnew/Layer.F.SilkS] 214 | Enabled=1 215 | [pcbnew/Layer.B.Mask] 216 | Enabled=1 217 | [pcbnew/Layer.F.Mask] 218 | Enabled=1 219 | [pcbnew/Layer.Dwgs.User] 220 | Enabled=1 221 | [pcbnew/Layer.Cmts.User] 222 | Enabled=1 223 | [pcbnew/Layer.Eco1.User] 224 | Enabled=1 225 | [pcbnew/Layer.Eco2.User] 226 | Enabled=1 227 | [pcbnew/Layer.Edge.Cuts] 228 | Enabled=1 229 | [pcbnew/Layer.Margin] 230 | Enabled=1 231 | [pcbnew/Layer.B.CrtYd] 232 | Enabled=1 233 | [pcbnew/Layer.F.CrtYd] 234 | Enabled=1 235 | [pcbnew/Layer.B.Fab] 236 | Enabled=1 237 | [pcbnew/Layer.F.Fab] 238 | Enabled=1 239 | [pcbnew/Layer.Rescue] 240 | Enabled=0 241 | [pcbnew/Netclasses] 242 | [pcbnew/Netclasses/Default] 243 | Name=Default 244 | Clearance=0.1524 245 | TrackWidth=0.1524 246 | ViaDiameter=0.45 247 | ViaDrill=0.3 248 | uViaDiameter=0.3 249 | uViaDrill=0.1 250 | dPairWidth=0.1524 251 | dPairGap=0.1524 252 | dPairViaGap=0.25 253 | [pcbnew/Netclasses/1] 254 | Name=GND 255 | Clearance=0.2 256 | TrackWidth=0.2 257 | ViaDiameter=0.8 258 | ViaDrill=0.4 259 | uViaDiameter=0.3 260 | uViaDrill=0.1 261 | dPairWidth=0.1524 262 | dPairGap=0.1524 263 | dPairViaGap=0.25 264 | [pcbnew/Netclasses/2] 265 | Name=HDMI 266 | Clearance=0.1524 267 | TrackWidth=0.1524 268 | ViaDiameter=0.45 269 | ViaDrill=0.3 270 | uViaDiameter=0.3 271 | uViaDrill=0.1 272 | dPairWidth=0.1524 273 | dPairGap=0.1524 274 | dPairViaGap=0.25 275 | [pcbnew/Netclasses/3] 276 | Name=Power 277 | Clearance=0.2 278 | TrackWidth=0.2 279 | ViaDiameter=0.8 280 | ViaDrill=0.4 281 | uViaDiameter=0.3 282 | uViaDrill=0.1 283 | dPairWidth=0.1524 284 | dPairGap=0.1524 285 | dPairViaGap=0.25 286 | [pcbnew/Netclasses/4] 287 | Name=Shielding 288 | Clearance=0.25 289 | TrackWidth=0.25 290 | ViaDiameter=0.8 291 | ViaDrill=0.4 292 | uViaDiameter=0.3 293 | uViaDrill=0.1 294 | dPairWidth=0.1524 295 | dPairGap=0.1524 296 | dPairViaGap=0.25 297 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.rules: -------------------------------------------------------------------------------- 1 | 2 | (rules PCB nubus-to-ztex 3 | (snap_angle 4 | fortyfive_degree 5 | ) 6 | (autoroute_settings 7 | (fanout on) 8 | (autoroute on) 9 | (postroute on) 10 | (vias on) 11 | (via_costs 50) 12 | (plane_via_costs 5) 13 | (start_ripup_costs 100) 14 | (start_pass_no 2771) 15 | (layer_rule F.Cu 16 | (active on) 17 | (preferred_direction horizontal) 18 | (preferred_direction_trace_costs 1.0) 19 | (against_preferred_direction_trace_costs 1.0) 20 | ) 21 | (layer_rule In1.Cu 22 | (active on) 23 | (preferred_direction vertical) 24 | (preferred_direction_trace_costs 1.1) 25 | (against_preferred_direction_trace_costs 1.1) 26 | ) 27 | (layer_rule In2.Cu 28 | (active on) 29 | (preferred_direction horizontal) 30 | (preferred_direction_trace_costs 1.1) 31 | (against_preferred_direction_trace_costs 1.1) 32 | ) 33 | (layer_rule B.Cu 34 | (active on) 35 | (preferred_direction vertical) 36 | (preferred_direction_trace_costs 1.0) 37 | (against_preferred_direction_trace_costs 1.0) 38 | ) 39 | ) 40 | (rule 41 | (width 152.4) 42 | (clear 152.6) 43 | (clear 76.2 (type smd_to_turn_gap)) 44 | (clear 38.2 (type smd_smd)) 45 | ) 46 | (padstack "Via[0-3]_800:400_um" 47 | (shape 48 | (circle F.Cu 800.0 0.0 0.0) 49 | ) 50 | (shape 51 | (circle In1.Cu 800.0 0.0 0.0) 52 | ) 53 | (shape 54 | (circle In2.Cu 800.0 0.0 0.0) 55 | ) 56 | (shape 57 | (circle B.Cu 800.0 0.0 0.0) 58 | ) 59 | (attach off) 60 | ) 61 | (via 62 | "Via[0-3]_800:400_um" "Via[0-3]_800:400_um" default 63 | ) 64 | (via 65 | "Via[0-3]_800:400_um-kicad_default" "Via[0-3]_800:400_um" "kicad_default" 66 | ) 67 | (via_rule 68 | default "Via[0-3]_800:400_um" 69 | ) 70 | (via_rule 71 | "kicad_default" "Via[0-3]_800:400_um-kicad_default" 72 | ) 73 | (class default 74 | (clearance_class default) 75 | (via_rule default) 76 | (rule 77 | (width 152.4) 78 | ) 79 | (circuit 80 | (use_layer F.Cu In1.Cu In2.Cu B.Cu) 81 | ) 82 | ) 83 | (class "kicad_default" 84 | GND +3V3 "/B2B/JTAG_VIO" "/B2B/JTAG_TCK" "/B2B/JTAG_TDI" +5V "Net-(JCD1-Pad1)" "Net-(JCD1-Pad2)" 85 | /B2B/RX /B2B/TX "/B2B/JTAG_TDO" "/B2B/JTAG_TMS" "Net-(J1-Pad14)" "Net-(J1-Pad12)" "Net-(J2-Pad6)" "Net-(J2-Pad3)" 86 | "Net-(J2-Pad2)" "Net-(U1-Pad1)" "Net-(U2-Pad1)" "NUBUS_OE" "Net-(U2-Pad47)" "Net-(U2-Pad46)" "Net-(U2-Pad10)" "Net-(U2-Pad9)" 87 | "-12V" "SB0_5V" "~RESET_5V" "~SPV_5V" "~SP_5V" "~TM1_5V" "~AD1_5V" "~AD3_5V" 88 | "~AD5_5V" "~AD7_5V" "~AD9_5V" "~AD11_5V" "~AD13_5V" "~AD15_5V" "~AD17_5V" "~AD19_5V" 89 | "~AD21_5V" "~AD23_5V" "~AD25_5V" "~AD27_5V" "~AD29_5V" "~AD31_5V" "~ARB1_5V" "~ARB3_5V" 90 | "~ID1_5V" "~ID3_5V" "~ACK_5V" "~RQST_5V" "~NMRQ_5V" +12V "~TM2_5V" "~CM0_5V" 91 | "~CM1_5V" "~CM2_5V" STDBYPWR "~CLK2XEN_5V" "~CBUSY_5V" "SB1_5V" "~TM0_5V" "~AD0_5V" 92 | "~AD2_5V" "~AD4_5V" "~AD6_5V" "~AD8_5V" "~AD10_5V" "~AD12_5V" "~AD14_5V" "~AD16_5V" 93 | "~AD18_5V" "~AD20_5V" "~AD22_5V" "~AD24_5V" "~AD26_5V" "~AD28_5V" "~AD30_5V" "~PFW_5V" 94 | "~ARB0_5V" "~ARB2_5V" "~ID0_5V" "~ID2_5V" "~START_5V" "~CLK_5V" "~ID3_3V3" "~ID2_3V3" 95 | "~ID1_3V3" "~ID0_3V3" "~CLK_3V3" "~NMRQ_3V3" "~RQST_3V3" "~CLK2X_3V3" "~CLK2X_5V" "~START_3V3" 96 | "~ACK_3V3" "~ARB2_3V3" "~ARB3_3V3" "~ARB0_3V3" "~ARB1_3V3" "~AD31_3V3" "~AD30_3V3" "~AD29_3V3" 97 | "~AD28_3V3" "~AD27_3V3" "~AD26_3V3" "~AD25_3V3" "~AD24_3V3" "~AD23_3V3" "~AD22_3V3" "~AD21_3V3" 98 | "~AD20_3V3" "~RESET_3V3" "~TM0_3V3" "~TM1_3V3" "~TM2_3V3" "~AD0_3V3" "~AD1_3V3" "~AD2_3V3" 99 | "~AD3_3V3" "~AD4_3V3" "~AD5_3V3" "~AD6_3V3" "~AD7_3V3" "~AD9_3V3" "~AD8_3V3" "~AD11_3V3" 100 | "~AD10_3V3" "~AD13_3V3" "~AD12_3V3" "~AD15_3V3" "~AD14_3V3" "~AD17_3V3" "~AD16_3V3" "~AD19_3V3" 101 | "~AD18_3V3" "FPGA_VGA_HS" "/vga/VGA_HS" "Net-(R3-Pad1)" "FPGA_VGA_VS" "/vga/VGA_VS" "FPGA_G0" "FPGA_G1" 102 | "FPGA_G2" "FPGA_G3" "FPGA_G4" "FPGA_G5" "FPGA_G6" "FPGA_G7" "FPGA_B0" "FPGA_B1" 103 | "FPGA_B2" "FPGA_B3" "FPGA_B4" "FPGA_B5" "FPGA_B6" "FPGA_B7" "FPGA_VGA_CLK" "Net-(U4-Pad27)" 104 | "/vga/VGA_B" "Net-(U4-Pad31)" "/vga/VGA_G" "Net-(U4-Pad33)" "/vga/VGA_R" "Net-(C7-Pad1)" "Net-(C10-Pad1)" "FPGA_R0" 105 | "FPGA_R1" "FPGA_R2" "FPGA_R3" "FPGA_R4" "FPGA_R5" "FPGA_R6" "FPGA_R7" "Net-(J4-Pad15)" 106 | "Net-(J4-Pad12)" "Net-(J4-Pad11)" "Net-(J4-Pad9)" "Net-(J4-Pad4)" "/usb/USB_FLT" "/usb/USB_D-" "/usb/USB_EN" "/usb/USB_D+" 107 | "USBH0_D-" "USBH0_D+" LED0 "Net-(D1-Pad2)" "Net-(U5-Pad1)" "Net-(U5-Pad3)" /usb/VBus "/usb/VBus_USB0" 108 | SHIELD "SD_D2" "SD_D3" "SD_CMD" "SD_CLK" "SD_D0" "SD_D1" LED2 109 | "Net-(D7-Pad2)" LED8 "Net-(D9-Pad2)" LED1 "Net-(D8-Pad2)" "Net-(D6-Pad2)" LED3 LED4 110 | "Net-(D5-Pad2)" "Net-(D4-Pad2)" LED5 LED6 "Net-(D3-Pad2)" "Net-(D2-Pad2)" LED7 "Net-(JCD1-Pad27)" 111 | "I2C0_SCL" "I2C0_SDA" "Net-(U7-Pad3)" "Net-(U7-Pad5)" "Net-(U7-Pad6)" "Net-(U8-Pad5)" "Net-(U8-Pad3)" 112 | (clearance_class "kicad_default") 113 | (via_rule kicad_default) 114 | (rule 115 | (width 152.4) 116 | ) 117 | (circuit 118 | (use_layer F.Cu In1.Cu In2.Cu B.Cu) 119 | ) 120 | ) 121 | ) -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 9 7 | Title "" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Sheet 17 | S 2250 1150 1000 500 18 | U 618E8C75 19 | F0 "B2B" 50 20 | F1 "B2B.sch" 50 21 | $EndSheet 22 | $Sheet 23 | S 1000 1150 1000 500 24 | U 618F532C 25 | F0 "nubus" 50 26 | F1 "nubus.sch" 50 27 | $EndSheet 28 | $Sheet 29 | S 2250 1850 1000 500 30 | U 61B62C00 31 | F0 "hdmi" 50 32 | F1 "hdmi.sch" 50 33 | $EndSheet 34 | $Sheet 35 | S 1000 2550 1000 500 36 | U 61B604DE 37 | F0 "usb" 50 38 | F1 "usb.sch" 50 39 | $EndSheet 40 | $Sheet 41 | S 2250 2550 1000 500 42 | U 61B99D2C 43 | F0 "fan" 50 44 | F1 "fan.sch" 50 45 | $EndSheet 46 | $Sheet 47 | S 1000 3300 1000 550 48 | U 62D70B59 49 | F0 "sdcard" 50 50 | F1 "sdcard.sch" 50 51 | $EndSheet 52 | $Sheet 53 | S 2250 3300 1000 550 54 | U 62CC4C0A 55 | F0 "pmod" 50 56 | F1 "pmod.sch" 50 57 | $EndSheet 58 | $Comp 59 | L logo:LogoLitex GRAPHIC1 60 | U 1 1 637CDFF9 61 | P 3800 1650 62 | F 0 "GRAPHIC1" H 4028 1646 50 0000 L CNN 63 | F 1 "LogoLitex" H 4028 1555 50 0000 L CNN 64 | F 2 "For_SeeedStudio:litex_logo" H 3800 1650 50 0001 C CNN 65 | F 3 "" H 3800 1650 50 0001 C CNN 66 | F 4 "DNP" H 3800 1650 50 0001 C CNN "DNP" 67 | 1 3800 1650 68 | 1 0 0 -1 69 | $EndComp 70 | $Sheet 71 | S 1000 1850 1000 500 72 | U 64F8CFB4 73 | F0 "clock" 50 74 | F1 "clock.sch" 50 75 | $EndSheet 76 | $EndSCHEMATC 77 | -------------------------------------------------------------------------------- /nubus-to-ztex/nubus-to-ztex.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex/nubus-to-ztex.zip -------------------------------------------------------------------------------- /nubus-to-ztex/pkg.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | GERBER_FILES=" 4 | nubus-to-ztex-B_Cu.gbr 5 | nubus-to-ztex-B_Mask.gbr 6 | nubus-to-ztex-B_Paste.gbr 7 | nubus-to-ztex-B_SilkS.gbr 8 | nubus-to-ztex-Edge_Cuts.gbr 9 | nubus-to-ztex-F_Cu.gbr 10 | nubus-to-ztex-F_Mask.gbr 11 | nubus-to-ztex-F_Paste.gbr 12 | nubus-to-ztex-F_SilkS.gbr 13 | nubus-to-ztex-In1_Cu.gbr 14 | nubus-to-ztex-In2_Cu.gbr" 15 | 16 | POS_FILES="nubus-to-ztex-top.pos" 17 | # nubus-to-ztex-bottom.pos 18 | 19 | DRL_FILES="nubus-to-ztex-NPTH.drl nubus-to-ztex-PTH.drl nubus-to-ztex-PTH-drl_map.ps nubus-to-ztex-NPTH-drl_map.ps" 20 | 21 | FILES="${GERBER_FILES} ${POS_FILES} ${DRL_FILES} top.pdf nubus-to-ztex.d356 nubus-to-ztex.csv" 22 | # bottom.pdf 23 | 24 | echo $FILES 25 | 26 | KICAD_PCB=nubus-to-ztex.kicad_pcb 27 | 28 | ABORT=no 29 | for F in $FILES; do 30 | if test \! -f $F || test $KICAD_PCB -nt $F; then 31 | echo "Regenerate file $F" 32 | ABORT=yes 33 | fi 34 | done 35 | 36 | if test $ABORT == "yes"; then 37 | exit -1; 38 | fi 39 | 40 | zip nubus-to-ztex.zip $FILES top.jpg bottom.jpg 41 | -------------------------------------------------------------------------------- /nubus-to-ztex/pmod.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 8 9 7 | Title "sbus-to-ztex blinkey stuff" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | Text Notes 7300 2850 0 50 ~ 0 17 | Dual-row "extended" Pmod\nExternal, in line w/ the carrier 18 | $Comp 19 | L Connector_Generic:Conn_02x08_Odd_Even J8 20 | U 1 1 63467144 21 | P 7350 3600 22 | F 0 "J8" H 7400 4117 50 0000 C CNN 23 | F 1 "A2541HWR-2x8P (Pmod 2x8 F)" H 7400 4026 50 0000 C CNN 24 | F 2 "For_SeeedStudio:PinSocket_2x08_P2.54mm_Horizontal_ForSeeedStudio" H 7350 3600 50 0001 C CNN 25 | F 3 "~" H 7350 3600 50 0001 C CNN 26 | F 4 "A2541HWR-2x8P" H 7350 3600 50 0001 C CNN "MPN" 27 | F 5 "https://www.lcsc.com/product-detail/Female-Headers_CJT-Changjiang-Connectors-A2541HWR-2x8P_C239359.html" H 7350 3600 50 0001 C CNN "URL" 28 | 1 7350 3600 29 | 1 0 0 -1 30 | $EndComp 31 | Text GLabel 7150 3500 0 50 Input ~ 0 32 | PMOD-56- 33 | Text GLabel 7150 3600 0 50 Input ~ 0 34 | PMOD-78- 35 | Text GLabel 7150 3700 0 50 Input ~ 0 36 | PMOD-910- 37 | Text GLabel 7150 3800 0 50 Input ~ 0 38 | PMOD-1112- 39 | Text GLabel 7650 3800 2 50 Input ~ 0 40 | PMOD-1112+ 41 | Text GLabel 7650 3500 2 50 Input ~ 0 42 | PMOD-56+ 43 | Text GLabel 7650 3600 2 50 Input ~ 0 44 | PMOD-78+ 45 | Text GLabel 7650 3700 2 50 Input ~ 0 46 | PMOD-910+ 47 | $Comp 48 | L power:GND #PWR0151 49 | U 1 1 634673C0 50 | P 8150 3400 51 | F 0 "#PWR0151" H 8150 3150 50 0001 C CNN 52 | F 1 "GND" H 8155 3227 50 0000 C CNN 53 | F 2 "" H 8150 3400 50 0001 C CNN 54 | F 3 "" H 8150 3400 50 0001 C CNN 55 | 1 8150 3400 56 | 1 0 0 -1 57 | $EndComp 58 | $Comp 59 | L power:+3V3 #PWR0152 60 | U 1 1 634673C6 61 | P 7950 3300 62 | F 0 "#PWR0152" H 7950 3150 50 0001 C CNN 63 | F 1 "+3V3" H 7965 3473 50 0000 C CNN 64 | F 2 "" H 7950 3300 50 0001 C CNN 65 | F 3 "" H 7950 3300 50 0001 C CNN 66 | 1 7950 3300 67 | 1 0 0 -1 68 | $EndComp 69 | $Comp 70 | L Device:C C? 71 | U 1 1 634673D3 72 | P 8150 3250 73 | AR Path="/5F679B53/634673D3" Ref="C?" Part="1" 74 | AR Path="/5F6B165A/634673D3" Ref="C?" Part="1" 75 | AR Path="/61631F14/634673D3" Ref="C?" Part="1" 76 | AR Path="/62CC4C0A/634673D3" Ref="C15" Part="1" 77 | F 0 "C15" H 8175 3350 50 0000 L CNN 78 | F 1 "100nF" H 8175 3150 50 0000 L CNN 79 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 8188 3100 50 0001 C CNN 80 | F 3 "" H 8150 3250 50 0000 C CNN 81 | F 4 "www.yageo.com" H 8150 3250 50 0001 C CNN "MNF1_URL" 82 | F 5 "CC0603KRX7R9BB104" H 8150 3250 50 0001 C CNN "MPN" 83 | F 6 "603-CC603KRX7R8BB104" H 8150 3250 50 0001 C CNN "Mouser" 84 | F 7 "?" H 8150 3250 50 0001 C CNN "Digikey" 85 | F 8 "" H 8150 3250 50 0001 C CNN "LCSC" 86 | F 9 "?" H 8150 3250 50 0001 C CNN "Koncar" 87 | F 10 "TB" H 8150 3250 50 0001 C CNN "Side" 88 | F 11 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_YAGEO-CC0603KRX7R9BB104_C14663.html" H 3000 6050 50 0001 C CNN "URL" 89 | 1 8150 3250 90 | 1 0 0 -1 91 | $EndComp 92 | Wire Wire Line 93 | 7950 3300 8050 3300 94 | Wire Wire Line 95 | 8050 3300 8050 3100 96 | Wire Wire Line 97 | 8050 3100 8150 3100 98 | Text GLabel 7650 3900 2 50 Input ~ 0 99 | PMOD-1314+ 100 | Text GLabel 7650 4000 2 50 Input ~ 0 101 | PMOD-1516+ 102 | Text GLabel 7150 3900 0 50 Input ~ 0 103 | PMOD-1314- 104 | Text GLabel 7150 4000 0 50 Input ~ 0 105 | PMOD-1516- 106 | Wire Notes Line 107 | 6700 3850 8100 3850 108 | Wire Notes Line 109 | 8100 3850 8100 4050 110 | Wire Notes Line 111 | 8100 4050 6700 4050 112 | Wire Notes Line 113 | 6700 4050 6700 3850 114 | Text Notes 8100 4050 0 50 ~ 0 115 | Extra Pins 116 | Connection ~ 7950 3300 117 | Connection ~ 8150 3400 118 | Wire Wire Line 119 | 7650 3300 7950 3300 120 | Wire Wire Line 121 | 7650 3400 8150 3400 122 | Wire Wire Line 123 | 7150 3300 7650 3300 124 | Connection ~ 7650 3300 125 | Wire Wire Line 126 | 7150 3400 7650 3400 127 | Connection ~ 7650 3400 128 | $EndSCHEMATC 129 | -------------------------------------------------------------------------------- /nubus-to-ztex/report.txt: -------------------------------------------------------------------------------- 1 | Info: Front side (top side) place file: “/home/dolbeau/MAC/NuBusFPGA.V1_2/nubus-to-ztex/nubus-to-ztex-top.pos”. 2 | Info: Component count: 88. 3 | Info: Back side (bottom side) place file: “/home/dolbeau/MAC/NuBusFPGA.V1_2/nubus-to-ztex/nubus-to-ztex-bottom.pos”. 4 | Info: Component count: 0. 5 | Info: Full component count: 88 6 | 7 | Component Placement File generation OK. 8 | -------------------------------------------------------------------------------- /nubus-to-ztex/sdcard.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 30 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 7 9 7 | Title "sbus-to-ztex sdcard" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L power:GND #PWR0124 18 | U 1 1 58DA7C71 19 | P 4150 5700 20 | F 0 "#PWR0124" H 4150 5450 50 0001 C CNN 21 | F 1 "GND" H 4150 5550 50 0000 C CNN 22 | F 2 "" H 4150 5700 50 0000 C CNN 23 | F 3 "" H 4150 5700 50 0000 C CNN 24 | 1 4150 5700 25 | -1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L power:+3V3 #PWR0125 29 | U 1 1 58DA7C72 30 | P 4150 4350 31 | F 0 "#PWR0125" H 4150 4200 50 0001 C CNN 32 | F 1 "+3V3" H 4150 4490 50 0000 C CNN 33 | F 2 "" H 4150 4350 50 0000 C CNN 34 | F 3 "" H 4150 4350 50 0000 C CNN 35 | 1 4150 4350 36 | -1 0 0 -1 37 | $EndComp 38 | Text GLabel 5225 5400 0 60 Input ~ 0 39 | SD_D2 40 | Text GLabel 5225 5500 0 60 Input ~ 0 41 | SD_D3 42 | Text GLabel 5225 4900 0 60 Input ~ 0 43 | SD_CMD 44 | Text GLabel 5225 5000 0 60 Input ~ 0 45 | SD_CLK 46 | Text GLabel 5225 5200 0 60 Input ~ 0 47 | SD_D0 48 | Text GLabel 5225 5300 0 60 Input ~ 0 49 | SD_D1 50 | $Comp 51 | L Device:C C10 52 | U 1 1 590C7447 53 | P 4150 4900 54 | F 0 "C10" H 4175 5000 50 0000 L CNN 55 | F 1 "47uF 10V 1206" H 4175 4800 50 0000 L CNN 56 | F 2 "Capacitor_SMD:C_1206_3216Metric" H 4188 4750 50 0001 C CNN 57 | F 3 "" H 4150 4900 50 0000 C CNN 58 | F 4 "GRM21BR60J476ME15L" H 4150 4900 50 0001 C CNN "MPN-ALT" 59 | F 5 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_Murata-Electronics-GRM21BR60J476ME15L_C77072.html" H 4150 4900 50 0001 C CNN "URL-ALT" 60 | F 6 "CL31A476MPHNNNE" H 4150 4900 50 0001 C CNN "MPN" 61 | F 7 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_Samsung-Electro-Mechanics-CL31A476MPHNNNE_C96123.html" H 4150 4900 50 0001 C CNN "URL" 62 | 1 4150 4900 63 | -1 0 0 -1 64 | $EndComp 65 | Wire Wire Line 66 | 4150 5700 4400 5700 67 | Connection ~ 4150 5700 68 | Connection ~ 4150 4700 69 | Wire Wire Line 70 | 4150 4700 4150 4750 71 | $Comp 72 | L Device:C C? 73 | U 1 1 60D77AD6 74 | P 4400 4900 75 | AR Path="/5F679B53/60D77AD6" Ref="C?" Part="1" 76 | AR Path="/5F69F4EF/60D77AD6" Ref="C2" Part="1" 77 | AR Path="/619D66B7/60D77AD6" Ref="C15" Part="1" 78 | AR Path="/62D70B59/60D77AD6" Ref="C9" Part="1" 79 | F 0 "C9" H 4425 5000 50 0000 L CNN 80 | F 1 "100nF" H 4425 4800 50 0000 L CNN 81 | F 2 "Capacitor_SMD:C_0603_1608Metric" H 4438 4750 50 0001 C CNN 82 | F 3 "" H 4400 4900 50 0000 C CNN 83 | F 4 "www.yageo.com" H 4400 4900 50 0001 C CNN "MNF1_URL" 84 | F 5 "CC0603KRX7R9BB104" H 4400 4900 50 0001 C CNN "MPN" 85 | F 6 "603-CC603KRX7R8BB104" H 4400 4900 50 0001 C CNN "Mouser" 86 | F 7 "?" H 4400 4900 50 0001 C CNN "Digikey" 87 | F 8 "" H 4400 4900 50 0001 C CNN "LCSC" 88 | F 9 "?" H 4400 4900 50 0001 C CNN "Koncar" 89 | F 10 "TB" H 4400 4900 50 0001 C CNN "Side" 90 | F 11 "https://www.lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_YAGEO-CC0603KRX7R9BB104_C14663.html" H 2200 5800 50 0001 C CNN "URL" 91 | 1 4400 4900 92 | -1 0 0 -1 93 | $EndComp 94 | Wire Wire Line 95 | 4400 4750 4400 4700 96 | Connection ~ 4400 4700 97 | Wire Wire Line 98 | 4400 4700 4150 4700 99 | Connection ~ 4400 5700 100 | Wire Wire Line 101 | 4150 4350 4150 4700 102 | $Comp 103 | L DM3CS-SF:DM3CS-SF P1 104 | U 1 1 641CE916 105 | P 5525 5200 106 | F 0 "P1" H 5855 5246 50 0000 L CNN 107 | F 1 "DM3CS-SF" H 5855 5155 50 0000 L CNN 108 | F 2 "For_SeeedStudio:HRS_DM3CS-SF" H 5525 5200 50 0001 L BNN 109 | F 3 "" H 5525 5200 50 0001 L BNN 110 | F 4 "Hirose Electric Co Ltd" H 5525 5200 50 0001 L BNN "MANUFACTURER" 111 | F 5 "DM3CS-SF" H 5525 5200 50 0001 C CNN "MPN" 112 | F 6 "https://www.lcsc.com/product-detail/SD-Card-Connectors_HRS-Hirose-DM3CS-SF_C202111.html" H 5525 5200 50 0001 C CNN "URL" 113 | 1 5525 5200 114 | 1 0 0 -1 115 | $EndComp 116 | Wire Wire Line 117 | 4150 5050 4150 5700 118 | Wire Wire Line 119 | 4400 5050 4400 5700 120 | Wire Wire Line 121 | 4400 5700 5225 5700 122 | Wire Wire Line 123 | 4400 4700 5225 4700 124 | $EndSCHEMATC 125 | -------------------------------------------------------------------------------- /nubus-to-ztex/signals.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex/signals.xlsx -------------------------------------------------------------------------------- /nubus-to-ztex/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name ztex_AB)(type Legacy)(uri ${KIPRJMOD}/ztex_AB.lib)(options "")(descr "")) 3 | (lib (name ztex_CD)(type Legacy)(uri ${KIPRJMOD}/ztex_CD.lib)(options "")(descr "")) 4 | (lib (name 74LVC125APW_112)(type Legacy)(uri ${KIPRJMOD}/NuBus/74LVC125APW_112.lib)(options "")(descr "")) 5 | (lib (name 74LVC126AD_118)(type Legacy)(uri ${KIPRJMOD}/NuBus/74LVC126AD_118.lib)(options "")(descr "")) 6 | (lib (name 47219-2001)(type Legacy)(uri ${KIPRJMOD}/NuBus/47219-2001.lib)(options "")(descr "")) 7 | (lib (name SN74LVC16245ADGGR)(type Legacy)(uri ${KIPRJMOD}/NuBus/SN74LVC16245ADGGR.lib)(options "")(descr "")) 8 | (lib (name ul_SN74CB3T3125PW)(type Legacy)(uri ${KIPRJMOD}/NuBus/ul_SN74CB3T3125PW.lib)(options "")(descr "")) 9 | (lib (name ul_SN74CB3T16210DGGR)(type Legacy)(uri ${KIPRJMOD}/NuBus/ul_SN74CB3T16210DGGR.lib)(options "")(descr "")) 10 | (lib (name ul_SN74CB3T16211DGGR)(type Legacy)(uri ${KIPRJMOD}/NuBus/ul_SN74CB3T16211DGGR.lib)(options "")(descr "")) 11 | (lib (name C96ABC)(type Legacy)(uri ${KIPRJMOD}/NuBus/C96ABC.lib)(options "")(descr "")) 12 | (lib (name ADV7125-lqfp48)(type Legacy)(uri ${KIPRJMOD}/ADV7125-lqfp48.lib)(options "")(descr "")) 13 | (lib (name AT30TS74)(type Legacy)(uri ${KIPRJMOD}/AT30TS74.lib)(options "")(descr "")) 14 | (lib (name TPD12S016PWR)(type Legacy)(uri ${KIPRJMOD}/TPD12S016PWR.lib)(options "")(descr "")) 15 | (lib (name xc9536xl-vq44)(type Legacy)(uri ${KIPRJMOD}/xc9536xl-vq44.lib)(options "")(descr "")) 16 | (lib (name cb3t3306)(type Legacy)(uri ${KIPRJMOD}/cb3t3306.lib)(options "")(descr "")) 17 | (lib (name ad1580)(type Legacy)(uri ${KIPRJMOD}/ad1580.lib)(options "")(descr "")) 18 | (lib (name SN74CB3T3245PWR)(type Legacy)(uri ${KIPRJMOD}/NuBus/SN74CB3T3245PWR.lib)(options "")(descr "")) 19 | (lib (name RB1-125B8G1A)(type Legacy)(uri ${KIPRJMOD}/RB1-125B8G1A.lib)(options "")(descr "")) 20 | (lib (name logo)(type Legacy)(uri ${KIPRJMOD}/logo.lib)(options "")(descr "")) 21 | (lib (name DM3CS-SF)(type Legacy)(uri ${KIPRJMOD}/DM3CS-SF.lib)(options "")(descr "")) 22 | ) 23 | -------------------------------------------------------------------------------- /nubus-to-ztex/top.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/MelkhiorVintageComputing/NuBusFPGA/b53b024a6d63abd9520588e369254a621a4fb62e/nubus-to-ztex/top.pdf -------------------------------------------------------------------------------- /nubus-to-ztex/vga.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | LIBS:nubus-to-ztex-cache 3 | EELAYER 26 0 4 | EELAYER END 5 | $Descr A4 11693 8268 6 | encoding utf-8 7 | Sheet 7 9 8 | Title "nubus-to-ztex VGA" 9 | Date "" 10 | Rev "" 11 | Comp "" 12 | Comment1 "" 13 | Comment2 "" 14 | Comment3 "" 15 | Comment4 "" 16 | $EndDescr 17 | $EndSCHEMATC 18 | -------------------------------------------------------------------------------- /nubus-to-ztex/xc9536xl-vq44.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # XC9536XL-VQ44 5 | # 6 | DEF XC9536XL-VQ44 U 0 20 Y Y 1 F N 7 | F0 "U" -650 1100 50 H V C CNN 8 | F1 "XC9536XL-VQ44" -650 -1450 50 H V C CNN 9 | F2 "Package_QFP:TQFP-44_10x10mm_P0.8mm" -1000 1200 50 H I C CNN 10 | F3 "" 0 -500 50 H I C CNN 11 | $FPLIST 12 | TQFP*10x10mm*P0.5mm* 13 | $ENDFPLIST 14 | DRAW 15 | S -650 1050 650 -1400 1 1 10 f 16 | X P1-7/GCK3 1 -800 300 150 R 50 50 1 1 B 17 | X TMS 10 800 -1050 150 L 50 50 1 1 I 18 | X TCK 11 800 -1150 150 L 50 50 1 1 I 19 | X P1-13 12 -800 -300 150 R 50 50 1 1 B 20 | X P1-14 13 -800 -400 150 R 50 50 1 1 B 21 | X P1-15 14 -800 -500 150 R 50 50 1 1 B 22 | X VCC 15 -100 1200 150 D 50 50 1 1 W 23 | X P1-16 16 -800 -600 150 R 50 50 1 1 B 24 | X GND 17 0 -1550 150 U 50 50 1 1 W 25 | X P1-17 18 -800 -700 150 R 50 50 1 1 B 26 | X P2-17 19 800 -700 150 L 50 50 1 1 B 27 | X P1-6 2 -800 400 150 R 50 50 1 1 B 28 | X P2-16 20 800 -600 150 L 50 50 1 1 B 29 | X P2-15 21 800 -500 150 L 50 50 1 1 B 30 | X P2-14 22 800 -400 150 L 50 50 1 1 B 31 | X P2-13 23 800 -300 150 L 50 50 1 1 B 32 | X TDO 24 800 -1250 150 L 50 50 1 1 O 33 | X GND 25 100 -1550 150 U 50 50 1 1 W 34 | X VCCIO 26 200 1200 150 D 50 50 1 1 W 35 | X P2-12 27 800 -200 150 L 50 50 1 1 B 36 | X P2-11 28 800 -100 150 L 50 50 1 1 B 37 | X P2-10 29 800 0 150 L 50 50 1 1 B 38 | X P1-8 3 -800 200 150 R 50 50 1 1 B 39 | X P2-9 30 800 100 150 L 50 50 1 1 B 40 | X P2-8 31 800 200 150 L 50 50 1 1 B 41 | X P2-7 32 800 300 150 L 50 50 1 1 B 42 | X GSR/P2-6 33 800 400 150 L 50 50 1 1 B 43 | X GTS2/P2-5 34 800 500 150 L 50 50 1 1 B 44 | X VCC 35 0 1200 150 D 50 50 1 1 W 45 | X GTS1/P2-3 36 800 700 150 L 50 50 1 1 B 46 | X P2-4 37 800 600 150 L 50 50 1 1 B 47 | X P2-2 38 800 800 150 L 50 50 1 1 B 48 | X P2-1 39 800 900 150 L 50 50 1 1 B 49 | X GND 4 -100 -1550 150 U 50 50 1 1 W 50 | X P1-1 40 -800 900 150 R 50 50 1 1 B 51 | X P1-2 41 -800 800 150 R 50 50 1 1 B 52 | X P1-4 42 -800 600 150 R 50 50 1 1 B 53 | X P1-3/GCK1 43 -800 700 150 R 50 50 1 1 B 54 | X P1-5/GCK2 44 -800 500 150 R 50 50 1 1 B 55 | X P1-9 5 -800 100 150 R 50 50 1 1 B 56 | X P1-10 6 -800 0 150 R 50 50 1 1 B 57 | X P1-11 7 -800 -100 150 R 50 50 1 1 B 58 | X P1-12 8 -800 -200 150 R 50 50 1 1 B 59 | X TDI 9 800 -950 150 L 50 50 1 1 I 60 | ENDDRAW 61 | ENDDEF 62 | # 63 | #End Library 64 | -------------------------------------------------------------------------------- /nubus-to-ztex/ztex_AB.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | # 3 | # ZTEX_AB 4 | # 5 | DEF ZTEX_AB J 0 40 Y Y 1 F N 6 | F0 "J" 50 1600 50 H V C CNN 7 | F1 "ZTEX_AB" 50 -1700 50 H V C CNN 8 | F2 "" 0 0 50 H I C CNN 9 | F3 "" 0 0 50 H I C CNN 10 | $FPLIST 11 | Connector*:*_2x??_* 12 | $ENDFPLIST 13 | DRAW 14 | S -50 -1595 0 -1605 1 1 6 N 15 | S -50 -1495 0 -1505 1 1 6 N 16 | S -50 -1395 0 -1405 1 1 6 N 17 | S -50 -1295 0 -1305 1 1 6 N 18 | S -50 -1195 0 -1205 1 1 6 N 19 | S -50 -1095 0 -1105 1 1 6 N 20 | S -50 -995 0 -1005 1 1 6 N 21 | S -50 -895 0 -905 1 1 6 N 22 | S -50 -795 0 -805 1 1 6 N 23 | S -50 -695 0 -705 1 1 6 N 24 | S -50 -595 0 -605 1 1 6 N 25 | S -50 -495 0 -505 1 1 6 N 26 | S -50 -395 0 -405 1 1 6 N 27 | S -50 -295 0 -305 1 1 6 N 28 | S -50 -195 0 -205 1 1 6 N 29 | S -50 -95 0 -105 1 1 6 N 30 | S -50 5 0 -5 1 1 6 N 31 | S -50 105 0 95 1 1 6 N 32 | S -50 205 0 195 1 1 6 N 33 | S -50 305 0 295 1 1 6 N 34 | S -50 405 0 395 1 1 6 N 35 | S -50 505 0 495 1 1 6 N 36 | S -50 605 0 595 1 1 6 N 37 | S -50 705 0 695 1 1 6 N 38 | S -50 805 0 795 1 1 6 N 39 | S -50 905 0 895 1 1 6 N 40 | S -50 1005 0 995 1 1 6 N 41 | S -50 1105 0 1095 1 1 6 N 42 | S -50 1205 0 1195 1 1 6 N 43 | S -50 1305 0 1295 1 1 6 N 44 | S -50 1405 0 1395 1 1 6 N 45 | S -50 1505 0 1495 1 1 6 N 46 | S -50 1550 2150 -1650 1 1 10 f 47 | S 2150 -1595 2100 -1605 1 1 6 N 48 | S 2150 -1495 2100 -1505 1 1 6 N 49 | S 2150 -1395 2100 -1405 1 1 6 N 50 | S 2150 -1295 2100 -1305 1 1 6 N 51 | S 2150 -1195 2100 -1205 1 1 6 N 52 | S 2150 -1095 2100 -1105 1 1 6 N 53 | S 2150 -995 2100 -1005 1 1 6 N 54 | S 2150 -895 2100 -905 1 1 6 N 55 | S 2150 -795 2100 -805 1 1 6 N 56 | S 2150 -695 2100 -705 1 1 6 N 57 | S 2150 -595 2100 -605 1 1 6 N 58 | S 2150 -495 2100 -505 1 1 6 N 59 | S 2150 -395 2100 -405 1 1 6 N 60 | S 2150 -295 2100 -305 1 1 6 N 61 | S 2150 -195 2100 -205 1 1 6 N 62 | S 2150 -95 2100 -105 1 1 6 N 63 | S 2150 5 2100 -5 1 1 6 N 64 | S 2150 105 2100 95 1 1 6 N 65 | S 2150 205 2100 195 1 1 6 N 66 | S 2150 305 2100 295 1 1 6 N 67 | S 2150 405 2100 395 1 1 6 N 68 | S 2150 505 2100 495 1 1 6 N 69 | S 2150 605 2100 595 1 1 6 N 70 | S 2150 705 2100 695 1 1 6 N 71 | S 2150 805 2100 795 1 1 6 N 72 | S 2150 905 2100 895 1 1 6 N 73 | S 2150 1005 2100 995 1 1 6 N 74 | S 2150 1105 2100 1095 1 1 6 N 75 | S 2150 1205 2100 1195 1 1 6 N 76 | S 2150 1305 2100 1295 1 1 6 N 77 | S 2150 1405 2100 1395 1 1 6 N 78 | S 2150 1505 2100 1495 1 1 6 N 79 | X VIN 1 -200 1500 150 R 50 50 1 1 P 80 | X G18~IO_L22P_T3_A17_15 19 -200 600 150 R 50 50 1 1 P 81 | X F18~IO_L22N_T3_A16_15 21 -200 500 150 R 50 50 1 1 P 82 | X E18~IO_L21P_T3_DQS_15 23 -200 400 150 R 50 50 1 1 P 83 | X D18~IO_L21N_T3_DQS_A18_15 25 -200 300 150 R 50 50 1 1 P 84 | X G13~IO_0_15 27 -200 200 150 R 50 50 1 1 P 85 | X 3.3V 29 -200 100 150 R 50 50 1 1 P 86 | X GND 31 -200 0 150 R 50 50 1 1 P 87 | X VCCO_AB 33 -200 -100 150 R 50 50 1 1 P 88 | X F13~IO_L5P_T0_AD9P_15 35 -200 -200 150 R 50 50 1 1 P 89 | X E16~IO_L11N_T1_SRCC_15 37 -200 -300 150 R 50 50 1 1 P 90 | X GND 3 -200 1400 150 R 50 50 1 1 P 91 | X C17~IO_L20N_T3_A19_15 39 -200 -400 150 R 50 50 1 1 P 92 | X A18~IO_L10N_T1_AD11N_15 41 -200 -500 150 R 50 50 1 1 P 93 | X C15~IO_L12N_T1_MRCC_15 43 -200 -600 150 R 50 50 1 1 P 94 | X B17~IO_L7N_T1_AD2N_15 45 -200 -700 150 R 50 50 1 1 P 95 | X C14~IO_L1N_T0_AD0N_15 47 -200 -800 150 R 50 50 1 1 P 96 | X D13~IO_L6N_T0_VREF_15 49 -200 -900 150 R 50 50 1 1 P 97 | X A16~IO_L8N_T1_AD10N_15 51 -200 -1000 150 R 50 50 1 1 P 98 | X B14~IO_L2N_T0_AD8N_15 53 -200 -1100 150 R 50 50 1 1 P 99 | X B12~IO_L3N_T0_DQS_AD1N_15 55 -200 -1200 150 R 50 50 1 1 P 100 | X A14~IO_L9N_T1_DQS_AD3N_15 57 -200 -1300 150 R 50 50 1 1 P 101 | X K16~IO_25_15 5 -200 1300 150 R 50 50 1 1 P 102 | X B11~IO_L4P_T0_15 59 -200 -1400 150 R 50 50 1 1 P 103 | X JTAG_TDI 61 -200 -1500 150 R 50 50 1 1 P 104 | X JTAG_VIO 63 -200 -1600 150 R 50 50 1 1 P 105 | X K15~IO_L24P_T3_RS1_15 7 -200 1200 150 R 50 50 1 1 P 106 | X J15~IO_L24N_T3_RS0_15 9 -200 1100 150 R 50 50 1 1 P 107 | X H15~IO_L19N_T3_A21_VREF_15 11 -200 1000 150 R 50 50 1 1 P 108 | X J14~IO_L19P_T3_A22_15 13 -200 900 150 R 50 50 1 1 P 109 | X H17~IO_L18P_T2_A24_15 15 -200 800 150 R 50 50 1 1 P 110 | X G17~IO_L18N_T2_A23_15 17 -200 700 150 R 50 50 1 1 P 111 | X VIN 2 2300 1500 150 L 50 50 1 1 P 112 | X H16~IO_L13P_T2_MRCC_15 20 2300 600 150 L 50 50 1 1 P 113 | X F16~IO_L14N_T2_SRCC_15 22 2300 500 150 L 50 50 1 1 P 114 | X F15~IO_L14P_T2_SRCC_15 24 2300 400 150 L 50 50 1 1 P 115 | X E17~IO_L16P_T2_A28_15 26 2300 300 150 L 50 50 1 1 P 116 | X D17~IO_L16N_T2_A27_15 28 2300 200 150 L 50 50 1 1 P 117 | X 3.3V 30 2300 100 150 L 50 50 1 1 P 118 | X GND 32 2300 0 150 L 50 50 1 1 P 119 | X VCCO_AB 34 2300 -100 150 L 50 50 1 1 P 120 | X F14~IO_L5N_T0_AD9N_15 36 2300 -200 150 L 50 50 1 1 P 121 | X E15~IO_L11P_T1_SRCC_15 38 2300 -300 150 L 50 50 1 1 P 122 | X GND 4 2300 1400 150 L 50 50 1 1 P 123 | X C16~IO_L20P_T3_A20_15 40 2300 -400 150 L 50 50 1 1 P 124 | X B18~IO_L10P_T1_AD11P_15 42 2300 -500 150 L 50 50 1 1 P 125 | X D15~IO_L12P_T1_MRCC_15 44 2300 -600 150 L 50 50 1 1 P 126 | X B16~IO_L7P_T1_AD2P_15 46 2300 -700 150 L 50 50 1 1 P 127 | X D14~IO_L1P_T0_AD0P_15 48 2300 -800 150 L 50 50 1 1 P 128 | X D12~IO_L6P_T0_15 50 2300 -900 150 L 50 50 1 1 P 129 | X A15~IO_L8P_T1_AD10P_15 52 2300 -1000 150 L 50 50 1 1 P 130 | X B13~IO_L2P_T0_AD8P_15 54 2300 -1100 150 L 50 50 1 1 P 131 | X C12~IO_L3P_T0_DQS_AD1P_15 56 2300 -1200 150 L 50 50 1 1 P 132 | X A13~IO_L9P_T1_DQS_AD3P_15 58 2300 -1300 150 L 50 50 1 1 P 133 | X J18~IO_L23N_T3_FWE_B_15 6 2300 1300 150 L 50 50 1 1 P 134 | X A11~IO_L4N_T0_15 60 2300 -1400 150 L 50 50 1 1 P 135 | X JTAG_TCK 62 2300 -1500 150 L 50 50 1 1 P 136 | X GND 64 2300 -1600 150 L 50 50 1 1 P 137 | X J17~IO_L23P_T3_FOE_B_15 8 2300 1200 150 L 50 50 1 1 P 138 | X K13~IO_L17P_T2_A26_15 10 2300 1100 150 L 50 50 1 1 P 139 | X J13~IO_L17N_T2_A25_15 12 2300 1000 150 L 50 50 1 1 P 140 | X H14~IO_L15P_T2_DQS_15 14 2300 900 150 L 50 50 1 1 P 141 | X G14~IO_L15N_T2_DQS_ADV_B_15 16 2300 800 150 L 50 50 1 1 P 142 | X G16~IO_L13N_T2_MRCC_15 18 2300 700 150 L 50 50 1 1 P 143 | ENDDRAW 144 | ENDDEF 145 | 146 | -------------------------------------------------------------------------------- /nubus-to-ztex/ztex_CD.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | # 3 | # ZTEX_CD 4 | # 5 | DEF ZTEX_CD J 0 40 Y Y 1 F N 6 | F0 "J" 50 1600 50 H V C CNN 7 | F1 "ZTEX_CD" 50 -1700 50 H V C CNN 8 | F2 "" 0 0 50 H I C CNN 9 | F3 "" 0 0 50 H I C CNN 10 | $FPLIST 11 | Connector*:*_2x??_* 12 | $ENDFPLIST 13 | DRAW 14 | S -50 -1595 0 -1605 1 1 6 N 15 | S -50 -1495 0 -1505 1 1 6 N 16 | S -50 -1395 0 -1405 1 1 6 N 17 | S -50 -1295 0 -1305 1 1 6 N 18 | S -50 -1195 0 -1205 1 1 6 N 19 | S -50 -1095 0 -1105 1 1 6 N 20 | S -50 -995 0 -1005 1 1 6 N 21 | S -50 -895 0 -905 1 1 6 N 22 | S -50 -795 0 -805 1 1 6 N 23 | S -50 -695 0 -705 1 1 6 N 24 | S -50 -595 0 -605 1 1 6 N 25 | S -50 -495 0 -505 1 1 6 N 26 | S -50 -395 0 -405 1 1 6 N 27 | S -50 -295 0 -305 1 1 6 N 28 | S -50 -195 0 -205 1 1 6 N 29 | S -50 -95 0 -105 1 1 6 N 30 | S -50 5 0 -5 1 1 6 N 31 | S -50 105 0 95 1 1 6 N 32 | S -50 205 0 195 1 1 6 N 33 | S -50 305 0 295 1 1 6 N 34 | S -50 405 0 395 1 1 6 N 35 | S -50 505 0 495 1 1 6 N 36 | S -50 605 0 595 1 1 6 N 37 | S -50 705 0 695 1 1 6 N 38 | S -50 805 0 795 1 1 6 N 39 | S -50 905 0 895 1 1 6 N 40 | S -50 1005 0 995 1 1 6 N 41 | S -50 1105 0 1095 1 1 6 N 42 | S -50 1205 0 1195 1 1 6 N 43 | S -50 1305 0 1295 1 1 6 N 44 | S -50 1405 0 1395 1 1 6 N 45 | S -50 1505 0 1495 1 1 6 N 46 | S -50 1550 2150 -1650 1 1 10 f 47 | S 2150 -1595 2100 -1605 1 1 6 N 48 | S 2150 -1495 2100 -1505 1 1 6 N 49 | S 2150 -1395 2100 -1405 1 1 6 N 50 | S 2150 -1295 2100 -1305 1 1 6 N 51 | S 2150 -1195 2100 -1205 1 1 6 N 52 | S 2150 -1095 2100 -1105 1 1 6 N 53 | S 2150 -995 2100 -1005 1 1 6 N 54 | S 2150 -895 2100 -905 1 1 6 N 55 | S 2150 -795 2100 -805 1 1 6 N 56 | S 2150 -695 2100 -705 1 1 6 N 57 | S 2150 -595 2100 -605 1 1 6 N 58 | S 2150 -495 2100 -505 1 1 6 N 59 | S 2150 -395 2100 -405 1 1 6 N 60 | S 2150 -295 2100 -305 1 1 6 N 61 | S 2150 -195 2100 -205 1 1 6 N 62 | S 2150 -95 2100 -105 1 1 6 N 63 | S 2150 5 2100 -5 1 1 6 N 64 | S 2150 105 2100 95 1 1 6 N 65 | S 2150 205 2100 195 1 1 6 N 66 | S 2150 305 2100 295 1 1 6 N 67 | S 2150 405 2100 395 1 1 6 N 68 | S 2150 505 2100 495 1 1 6 N 69 | S 2150 605 2100 595 1 1 6 N 70 | S 2150 705 2100 695 1 1 6 N 71 | S 2150 805 2100 795 1 1 6 N 72 | S 2150 905 2100 895 1 1 6 N 73 | S 2150 1005 2100 995 1 1 6 N 74 | S 2150 1105 2100 1095 1 1 6 N 75 | S 2150 1205 2100 1195 1 1 6 N 76 | S 2150 1305 2100 1295 1 1 6 N 77 | S 2150 1405 2100 1395 1 1 6 N 78 | S 2150 1505 2100 1495 1 1 6 N 79 | X USB_5V 1 -200 1500 150 R 50 50 1 1 P 80 | X T6~IO_L23N_T3_34 19 -200 600 150 R 50 50 1 1 P 81 | X R6~IO_L19P_T3_34 21 -200 500 150 R 50 50 1 1 P 82 | X R5~IO_L19N_T3_VREF_34 23 -200 400 150 R 50 50 1 1 P 83 | X V2~IO_L9N_T1_DQS_34 25 -200 300 150 R 50 50 1 1 P 84 | X U2~IO_L9P_T1_DQS_34 27 -200 200 150 R 50 50 1 1 P 85 | X K6~IO_0_34 29 -200 100 150 R 50 50 1 1 P 86 | X VCCO_CD 31 -200 0 150 R 50 50 1 1 P 87 | X GND 33 -200 -100 150 R 50 50 1 1 P 88 | X 3.3V 35 -200 -200 150 R 50 50 1 1 P 89 | X N6~IO_L18N_T2_34 37 -200 -300 150 R 50 50 1 1 P 90 | X GND 3 -200 1400 150 R 50 50 1 1 P 91 | X M6~IO_L18P_T2_34 39 -200 -400 150 R 50 50 1 1 P 92 | X L6~IO_L6P_T0_34 41 -200 -500 150 R 50 50 1 1 P 93 | X L5~IO_L6N_T0_VREF_34 43 -200 -600 150 R 50 50 1 1 P 94 | X N4~IO_L16N_T2_34 45 -200 -700 150 R 50 50 1 1 P 95 | X M4~IO_L16P_T2_34 47 -200 -800 150 R 50 50 1 1 P 96 | X M3~IO_L4P_T0_34 49 -200 -900 150 R 50 50 1 1 P 97 | X M2~IO_L4N_T0_34 51 -200 -1000 150 R 50 50 1 1 P 98 | X K5~IO_L5P_T0_34 53 -200 -1100 150 R 50 50 1 1 P 99 | X L4~IO_L5N_T0_34 55 -200 -1200 150 R 50 50 1 1 P 100 | X L3~IO_L2N_T0_34 57 -200 -1300 150 R 50 50 1 1 P 101 | X U9~IO_L21P_T3_DQS_34 5 -200 1300 150 R 50 50 1 1 P 102 | X K3~IO_L2P_T0_34 59 -200 -1400 150 R 50 50 1 1 P 103 | X JTAG_TDO 61 -200 -1500 150 R 50 50 1 1 P 104 | X GND 63 -200 -1600 150 R 50 50 1 1 P 105 | X U8~IO_25_34 7 -200 1200 150 R 50 50 1 1 P 106 | X U7~IO_L22P_T3_34 9 -200 1100 150 R 50 50 1 1 P 107 | X U6~IO_L22N_T3_34 11 -200 1000 150 R 50 50 1 1 P 108 | X T8~IO_L24N_T3_34 13 -200 900 150 R 50 50 1 1 P 109 | X R8~IO_L24P_T3_34 15 -200 800 150 R 50 50 1 1 P 110 | X R7~IO_L23P_T3_34 17 -200 700 150 R 50 50 1 1 P 111 | X RESET# 2 2300 1500 150 L 50 50 1 1 P 112 | X U4~IO_L8P_T1_34 20 2300 600 150 L 50 50 1 1 P 113 | X U3~IO_L8N_T1_34 22 2300 500 150 L 50 50 1 1 P 114 | X V1~IO_L7N_T1_34 24 2300 400 150 L 50 50 1 1 P 115 | X U1~IO_L7P_T1_34 26 2300 300 150 L 50 50 1 1 P 116 | X T3~IO_L11N_T1_SRCC_34 28 2300 200 150 L 50 50 1 1 P 117 | X R3~IO_L11P_T1_SRCC_34 30 2300 100 150 L 50 50 1 1 P 118 | X VCCO_CD 32 2300 0 150 L 50 50 1 1 P 119 | X GND 34 2300 -100 150 L 50 50 1 1 P 120 | X 3.3V 36 2300 -200 150 L 50 50 1 1 P 121 | X P5~IO_L13N_T2_MRCC_34 38 2300 -300 150 L 50 50 1 1 P 122 | X GND 4 2300 1400 150 L 50 50 1 1 P 123 | X N5~IO_L13P_T2_MRCC_34 40 2300 -400 150 L 50 50 1 1 P 124 | X P4~IO_L14P_T2_SRCC_34 42 2300 -500 150 L 50 50 1 1 P 125 | X P3~IO_L14N_T2_SRCC_34 44 2300 -600 150 L 50 50 1 1 P 126 | X T1~IO_L17N_T2_34 46 2300 -700 150 L 50 50 1 1 P 127 | X R1~IO_L17P_T2_34 48 2300 -800 150 L 50 50 1 1 P 128 | X R2~IO_L15N_T2_DQS_34 50 2300 -900 150 L 50 50 1 1 P 129 | X P2~IO_L15P_T2_DQS_34 52 2300 -1000 150 L 50 50 1 1 P 130 | X N2~IO_L3P_T0_DQS_34 54 2300 -1100 150 L 50 50 1 1 P 131 | X N1~IO_L3N_T0_DQS_34 56 2300 -1200 150 L 50 50 1 1 P 132 | X M1~IO_L1N_T0_34 58 2300 -1300 150 L 50 50 1 1 P 133 | X V9~IO_L21N_T3_DQS_34 6 2300 1300 150 L 50 50 1 1 P 134 | X L1~IO_L1P_T0_34 60 2300 -1400 150 L 50 50 1 1 P 135 | X JTAG_TMS 62 2300 -1500 150 L 50 50 1 1 P 136 | X GND 64 2300 -1600 150 L 50 50 1 1 P 137 | X V7~IO_L20P_T3_34 8 2300 1200 150 L 50 50 1 1 P 138 | X V6~IO_L20N_T3_34 10 2300 1100 150 L 50 50 1 1 P 139 | X V5~IO_L10P_T1_34 12 2300 1000 150 L 50 50 1 1 P 140 | X V4~IO_L10N_T1_34 14 2300 900 150 L 50 50 1 1 P 141 | X T5~IO_L12P_T1_MRCC_34 16 2300 800 150 L 50 50 1 1 P 142 | X T4~IO_L12N_T1_MRCC_34 18 2300 700 150 L 50 50 1 1 P 143 | ENDDRAW 144 | ENDDEF 145 | 146 | --------------------------------------------------------------------------------