├── .gitignore ├── .gitmodules ├── APACHE-LICENSE-2.0.txt ├── Makefile ├── NetFPGA-CIC-LICENSE.md ├── README ├── RELEASE_NOTES ├── hw ├── contrib-projects │ └── .keep ├── lib │ ├── common │ │ ├── constraints │ │ │ ├── au200_general.xdc │ │ │ ├── au200_vcu1525_timing.tcl │ │ │ ├── au250_general.xdc │ │ │ ├── au250_timing.tcl │ │ │ ├── au280_general.xdc │ │ │ ├── au280_timing.tcl │ │ │ ├── nf_timing.tcl │ │ │ └── vcu1525_general.xdc │ │ └── hdl │ │ │ ├── nf_attachment.sv │ │ │ ├── top.v │ │ │ └── top_wrapper.sv │ ├── contrib │ │ └── nf_endianess_manager_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── hdl │ │ │ ├── bridge.v │ │ │ └── nf_endianess_manager.v │ │ │ └── nf_endianess_manager.tcl │ ├── std │ │ ├── axi_sim_transactor_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── axi_sim_transactor.tcl │ │ │ └── hdl │ │ │ │ ├── axi_sim_transactor.vhd │ │ │ │ └── transactor_fifos.vhd │ │ ├── axis_fifo_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── axis_fifo.tcl │ │ │ └── hdl │ │ │ │ └── axis_fifo.v │ │ ├── axis_sim_pkg_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── axis_sim_pkg.tcl │ │ │ └── hdl │ │ │ │ └── axis_sim_pkg.vhd │ │ ├── axis_sim_record_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── axis_sim_record.tcl │ │ │ └── hdl │ │ │ │ └── axis_sim_record.v │ │ ├── axis_sim_stim_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── axis_sim_stim.tcl │ │ │ └── hdl │ │ │ │ └── axis_sim_stim.vhd │ │ ├── barrier_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── barrier.tcl │ │ │ └── hdl │ │ │ │ └── barrier.v │ │ ├── fallthrough_small_fifo_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── fallthrough_small_fifo.tcl │ │ │ └── hdl │ │ │ │ ├── fallthrough_small_fifo.v │ │ │ │ └── small_fifo.v │ │ ├── input_arbiter_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ │ ├── input_arbiter_regs_defines.h │ │ │ │ ├── input_arbiter_regs_defines.tcl │ │ │ │ ├── input_arbiter_regs_defines.txt │ │ │ │ └── module_generation_Input_arbiter.xlsm │ │ │ ├── hdl │ │ │ │ ├── input_arbiter.v │ │ │ │ ├── input_arbiter_cpu_regs.v │ │ │ │ └── input_arbiter_cpu_regs_defines.v │ │ │ └── input_arbiter.tcl │ │ ├── nf_axis_converter_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── hdl │ │ │ │ ├── nf_axis_converter.v │ │ │ │ └── nf_axis_converter_main.v │ │ │ └── nf_axis_converter.tcl │ │ ├── nf_mac_attachment_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── hdl │ │ │ │ ├── data_synch.v │ │ │ │ ├── nf_mac_attachment.v │ │ │ │ ├── nf_mac_attachment_cpu_regs.v │ │ │ │ ├── nf_mac_attachment_cpu_regs_defines.v │ │ │ │ ├── rx_queue.v │ │ │ │ └── tx_queue.v │ │ │ └── nf_mac_attachment_tcl.tcl │ │ ├── nic_output_port_lookup_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ │ ├── module_generation_nic_opl.xlsm │ │ │ │ ├── output_port_lookup_regs_defines.h │ │ │ │ ├── output_port_lookup_regs_defines.tcl │ │ │ │ └── output_port_lookup_regs_defines.txt │ │ │ ├── hdl │ │ │ │ ├── nic_output_port_lookup.v │ │ │ │ ├── output_port_lookup_cpu_regs.v │ │ │ │ └── output_port_lookup_cpu_regs_defines.v │ │ │ └── nic_output_port_lookup.tcl │ │ ├── output_queues_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ │ ├── module_generation_output_queues.xlsm │ │ │ │ ├── output_queues_regs_defines.h │ │ │ │ ├── output_queues_regs_defines.tcl │ │ │ │ └── output_queues_regs_defines.txt │ │ │ ├── hdl │ │ │ │ ├── output_queues.v │ │ │ │ ├── output_queues_cpu_regs.v │ │ │ │ └── output_queues_cpu_regs_defines.v │ │ │ └── output_queues.tcl │ │ ├── router_output_port_lookup_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ │ ├── output_port_lookup_regs_defines.h │ │ │ │ ├── output_port_lookup_regs_defines.tcl │ │ │ │ └── output_port_lookup_regs_defines.txt │ │ │ ├── hdl │ │ │ │ ├── dest_ip_filter.v │ │ │ │ ├── eth_parser.v │ │ │ │ ├── ip_arp.v │ │ │ │ ├── ip_checksum_ttl.v │ │ │ │ ├── ip_lpm.v │ │ │ │ ├── op_lut_hdr_parser.v │ │ │ │ ├── op_lut_process_sm.v │ │ │ │ ├── output_port_lookup.v │ │ │ │ ├── output_port_lookup_cpu_regs.v │ │ │ │ ├── output_port_lookup_cpu_regs_defines.v │ │ │ │ ├── preprocess_control.v │ │ │ │ ├── router_output_port_lookup.v │ │ │ │ └── unencoded_cam_lut_sm.v │ │ │ └── router_output_port_lookup.tcl │ │ ├── switch_lite_output_port_lookup_v1_0_0 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ │ ├── module_generation_switch_opl.xlsm │ │ │ │ ├── output_port_lookup_regs_defines.h │ │ │ │ ├── output_port_lookup_regs_defines.tcl │ │ │ │ └── output_port_lookup_regs_defines.txt │ │ │ ├── hdl │ │ │ │ ├── eth_parser.v │ │ │ │ ├── mac_cam_lut.v │ │ │ │ ├── output_port_lookup_cpu_regs.v │ │ │ │ ├── output_port_lookup_cpu_regs_defines.v │ │ │ │ └── switch_lite_output_port_lookup.v │ │ │ └── switch_lite_output_port_lookup.tcl │ │ └── switch_output_port_lookup_v1_0_1 │ │ │ ├── Makefile │ │ │ ├── data │ │ │ ├── module_generation_switch_opl.xlsm │ │ │ ├── output_port_lookup_regs_defines.h │ │ │ ├── output_port_lookup_regs_defines.tcl │ │ │ └── output_port_lookup_regs_defines.txt │ │ │ ├── hdl │ │ │ ├── eth_parser.v │ │ │ ├── mac_cam_lut.v │ │ │ ├── output_port_lookup_cpu_regs.v │ │ │ ├── output_port_lookup_cpu_regs_defines.v │ │ │ └── switch_output_port_lookup.v │ │ │ └── switch_output_port_lookup.tcl │ └── xilinx │ │ ├── cam_v1_1_0 │ │ ├── Makefile │ │ ├── README │ │ ├── cam.tcl │ │ ├── hdl │ │ │ ├── verilog │ │ │ │ ├── cam.v │ │ │ │ └── cam_wrapper.v │ │ │ └── vhdl │ │ │ │ └── cam │ │ │ │ └── .keep │ │ └── scripts │ │ │ └── run_update_lib.sh │ │ ├── tcam_v1_1_0 │ │ ├── Makefile │ │ ├── README │ │ ├── hdl │ │ │ ├── verilog │ │ │ │ ├── tcam.v │ │ │ │ └── tcam_wrapper.v │ │ │ └── vhdl │ │ │ │ └── tcam │ │ │ │ └── .keep │ │ ├── scripts │ │ │ └── run_update_lib.sh │ │ ├── sim │ │ │ ├── run_sim.tcl │ │ │ ├── run_tcam_sim.sh │ │ │ └── testbench.v │ │ └── tcam.tcl │ │ └── xilinx_shell_v1_0_0 │ │ ├── Makefile │ │ ├── hdl │ │ └── open_nic_shell.sv │ │ ├── update.sh │ │ ├── vivado_ip │ │ ├── .keep │ │ ├── qdma_subsystem_axi_cdc.tcl │ │ └── qdma_subsystem_clk_div.tcl │ │ └── xilinx_shell.tcl └── projects │ ├── reference_nic │ ├── bitfiles │ │ └── README │ ├── hw │ │ ├── Makefile │ │ ├── constraints │ │ │ └── au200_vcu1525_user_timing.tcl │ │ ├── hdl │ │ │ ├── nf_datapath.v │ │ │ ├── top_sim.v │ │ │ └── top_tb.v │ │ └── tcl │ │ │ ├── export_registers.tcl │ │ │ ├── reference_nic.tcl │ │ │ ├── reference_nic_defines.tcl │ │ │ └── reference_nic_sim.tcl │ └── test │ │ ├── both_inc_size │ │ └── run.py │ │ ├── both_loopback_maxsize │ │ └── run.py │ │ ├── both_loopback_minsize │ │ └── run.py │ │ ├── both_loopback_random │ │ └── run.py │ │ ├── connections │ │ └── conn │ │ └── global │ │ └── setup │ ├── reference_router │ ├── bitfiles │ │ └── README │ ├── hw │ │ ├── Makefile │ │ ├── constraints │ │ │ └── au200_vcu1525_user_timing.tcl │ │ ├── hdl │ │ │ ├── nf_datapath.v │ │ │ ├── top_sim.v │ │ │ └── top_tb.v │ │ └── tcl │ │ │ ├── export_registers.tcl │ │ │ ├── reference_router.tcl │ │ │ ├── reference_router_defines.tcl │ │ │ └── reference_router_sim.tcl │ ├── lib │ │ └── Python │ │ │ ├── RegressRouterLib.py │ │ │ └── RouterLib.py │ ├── sw │ │ ├── apps │ │ │ ├── Makefile │ │ │ ├── register_read.sh │ │ │ ├── register_write.sh │ │ │ └── rwaxi.c │ │ ├── cli │ │ │ ├── Makefile │ │ │ ├── arp │ │ │ ├── cli.c │ │ │ ├── ip │ │ │ └── mac │ │ ├── common │ │ │ ├── Makefile │ │ │ ├── nf_sume.h │ │ │ ├── nf_util.c │ │ │ ├── nf_util.h │ │ │ ├── nfplus_util.c │ │ │ └── nfplus_util.h │ │ ├── router_kit │ │ │ ├── Makefile │ │ │ ├── arptable.hh │ │ │ ├── iflist.hh │ │ │ ├── linux_proc_net.cc │ │ │ ├── linux_proc_net.hh │ │ │ ├── netinet++ │ │ │ │ ├── ethernetaddr.hh │ │ │ │ └── ipaddr.hh │ │ │ ├── rkd.cc │ │ │ ├── rtable.hh │ │ │ ├── sume_mon.cc │ │ │ └── sume_mon.hh │ │ └── scone │ │ │ ├── Makefile │ │ │ ├── README │ │ │ ├── TODO.txt │ │ │ ├── cpuhw │ │ │ ├── design_doc.pdf │ │ │ ├── getarg.c │ │ │ ├── lwtcp │ │ │ ├── api_lib.c │ │ │ ├── api_msg.c │ │ │ ├── err.c │ │ │ ├── icmp.c │ │ │ ├── inet.c │ │ │ ├── ip_addr.c │ │ │ ├── lwtcp_sr_integration.h │ │ │ ├── main.c │ │ │ ├── mem.c │ │ │ ├── memp.c │ │ │ ├── pbuf.c │ │ │ ├── sockets.c │ │ │ ├── stats.c │ │ │ ├── sys.c │ │ │ ├── sys_arch.c │ │ │ ├── tcp.c │ │ │ ├── tcp_input.c │ │ │ ├── tcp_output.c │ │ │ ├── tcpip.c │ │ │ ├── transport_subsys.c │ │ │ └── udp.c │ │ │ ├── or_arp.c │ │ │ ├── or_arp.h │ │ │ ├── or_cli.c │ │ │ ├── or_cli.h │ │ │ ├── or_data_types.h │ │ │ ├── or_dijkstra.c │ │ │ ├── or_dijkstra.h │ │ │ ├── or_dijkstra_test.c │ │ │ ├── or_icmp.c │ │ │ ├── or_icmp.h │ │ │ ├── or_iface.c │ │ │ ├── or_iface.h │ │ │ ├── or_ip.c │ │ │ ├── or_ip.h │ │ │ ├── or_main.c │ │ │ ├── or_main.h │ │ │ ├── or_nat.c │ │ │ ├── or_nat.h │ │ │ ├── or_netfpga.c │ │ │ ├── or_netfpga.h │ │ │ ├── or_output.c │ │ │ ├── or_output.h │ │ │ ├── or_pwospf.c │ │ │ ├── or_pwospf.h │ │ │ ├── or_rtable.c │ │ │ ├── or_rtable.h │ │ │ ├── or_sping.c │ │ │ ├── or_sping.h │ │ │ ├── or_utils.c │ │ │ ├── or_utils.h │ │ │ ├── or_vns.c │ │ │ ├── or_vns.h │ │ │ ├── or_www.c │ │ │ ├── or_www.h │ │ │ ├── rawsock.c │ │ │ ├── rtables │ │ │ ├── rtable │ │ │ ├── rtable.netfpga │ │ │ ├── rtable.regress1 │ │ │ ├── rtable.vhost1 │ │ │ ├── rtable.vhost1.pwospf │ │ │ ├── rtable.vhost2 │ │ │ ├── rtable.vhost2.pwospf │ │ │ ├── rtable.vhost3 │ │ │ ├── rtable.vhost3.pwospf │ │ │ ├── rtable2.vhost1.pwospf │ │ │ ├── rtable2.vhost2.pwospf │ │ │ └── rtable2.vhost3.pwospf │ │ │ ├── sr_base.c │ │ │ ├── sr_base.h │ │ │ ├── sr_base_internal.h │ │ │ ├── sr_cpu_extension_nf.c │ │ │ ├── sr_cpu_extension_nf.h │ │ │ ├── sr_dumper.c │ │ │ ├── sr_dumper.h │ │ │ ├── sr_integration.c │ │ │ ├── sr_lwtcp_glue.c │ │ │ ├── sr_lwtcp_glue.h │ │ │ ├── sr_main.c │ │ │ ├── sr_vns.c │ │ │ ├── sr_vns.h │ │ │ ├── vnscommand.h │ │ │ └── www │ │ │ ├── content.html │ │ │ ├── footer.html │ │ │ ├── gradient_1.gif │ │ │ ├── header.html │ │ │ ├── index.html │ │ │ ├── left.html │ │ │ ├── main.css │ │ │ ├── our_router.js │ │ │ ├── prototype.js │ │ │ ├── refresh.png │ │ │ └── router.png │ └── test │ │ ├── both_arp_misses │ │ └── run.py │ │ ├── both_badipchksum_packet │ │ └── run.py │ │ ├── both_invalidttl_packet │ │ └── run.py │ │ ├── both_ipdestfilter_hit │ │ └── run.py │ │ ├── both_lpm_generic │ │ └── run.py │ │ ├── both_lpm_misses │ │ └── run.py │ │ ├── both_lpm_nexthop │ │ └── run.py │ │ ├── both_nonip_packet │ │ └── run.py │ │ ├── both_nonipv4_packet │ │ └── run.py │ │ ├── both_packet_forwarding │ │ └── run.py │ │ ├── both_router_table │ │ └── run.py │ │ ├── both_wrong_destMAC │ │ └── run.py │ │ ├── connections │ │ └── conn │ │ └── global │ │ └── setup │ ├── reference_switch │ ├── bitfiles │ │ └── README │ ├── hw │ │ ├── Makefile │ │ ├── constraints │ │ │ └── au250_au200_vcu1525_user_timing.tcl │ │ ├── hdl │ │ │ ├── nf_datapath.v │ │ │ ├── top_sim.v │ │ │ └── top_tb.v │ │ └── tcl │ │ │ ├── export_registers.tcl │ │ │ ├── reference_switch.tcl │ │ │ ├── reference_switch_defines.tcl │ │ │ └── reference_switch_sim.tcl │ └── test │ │ ├── both_learning_sw │ │ └── run.py │ │ ├── both_simple_broadcast │ │ └── run.py │ │ ├── connections │ │ └── conn │ │ └── global │ │ └── setup │ └── reference_switch_lite │ ├── bitfiles │ └── README │ ├── hw │ ├── Makefile │ ├── constraints │ │ └── au200_vcu1525_user_timing.tcl │ ├── hdl │ │ ├── nf_datapath.v │ │ ├── top_sim.v │ │ └── top_tb.v │ └── tcl │ │ ├── export_registers.tcl │ │ ├── reference_switch_lite.tcl │ │ ├── reference_switch_lite_defines.tcl │ │ └── reference_switch_lite_sim.tcl │ └── test │ ├── both_learning_sw │ └── run.py │ ├── both_simple_broadcast │ └── run.py │ ├── connections │ └── conn │ └── global │ └── setup ├── sw ├── app │ ├── Makefile │ └── main.c ├── driver │ ├── Makefile │ └── opennic-driver.patch └── hwtestlib │ ├── Makefile │ └── sume_reg.c └── tools ├── scripts ├── NFTest │ ├── NFTest │ │ ├── Makefile │ │ ├── NFTestHeader.py │ │ ├── NFTestLib.py │ │ ├── PacketLib.py │ │ ├── __init__.py │ │ ├── hwPkt.py │ │ ├── hwPktLib.py │ │ ├── hwReg.py │ │ ├── hwRegLib.py │ │ ├── scapy_sniff_patch.py │ │ ├── simLib.py │ │ ├── simPkt.py │ │ └── simReg.py │ └── testcheck.py ├── axitools.py ├── nf_sim_reconcile_axi_logs.py ├── nf_sim_registers_axi_logs.py ├── nf_test.py ├── pci_rescan_run.sh ├── python_parser.py └── xparam2regdefines.py └── settings.sh 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