├── MATLAB model ├── Arithmetic_Tracking_WorkingVersion.m ├── DAC.m ├── GenerateTestSignal.m ├── Lenna.png ├── M_Bit_Fixed_With_1th_Order_Predication.m ├── M_Bits_Fixed_ADC.m ├── comparator.m ├── dac_block.m ├── derivsecgsyn.m ├── ecgsyn.m ├── getWeights.m ├── predict.m ├── readme.md ├── sar.m ├── sar_adc.m ├── sar_logic.m └── update_digits.m ├── README.md └── SPICE model ├── 10_bit-arthsar_final.mt0 ├── _ADSB.SP ├── _ADSBN.SP ├── _AND2.SP ├── _AND4.SP ├── _Ccomp.SP ├── _DFF.SP ├── _DFF1.SP ├── _FA.SP ├── _FNADFF_M.SP ├── _F_10BFA.SP ├── _F_4BCNT.SP ├── _F_4NADFF.SP ├── _IVR.SP ├── _MIL.log ├── _Mono-comp-Low.SP ├── _Mux2-1.SP ├── _NADFF.SP ├── _NAND2.SP ├── _NAND3.SP ├── _NASRL.SP ├── _NE_DFF.SP ├── _NOR10.SP ├── _NOR2.SP ├── _NOR4.SP ├── _NOR8.SP ├── _NOT.SP ├── _NOTD.SP ├── _OR2.SP ├── _OR4.SP ├── _SRIVR10.SP ├── _XOR_4ND.SP └── readme.md /MATLAB model/Arithmetic_Tracking_WorkingVersion.m: -------------------------------------------------------------------------------- 1 | %% The main files: 2 | % Arithmetic_Tracking_WorkingVersion.m : MATLAB file for simualtion behavior of the proposed SAR ADC 3 | % M_Bits_Fixed_ADC.m : MATLAB file for simualtion behavior of the a similiar tracking SAR ADC 4 | 5 | %% SAR ADC behavioral simulation for Arithmetic SAR + Regular_SAR 6 | % The summury of function: Limit the steps of conversion through tracking 7 | % if this value is out of range, re-convert using regular SAR algorimth 8 | % instead of tracking 9 | 10 | %% Energy savings are two fold: 1. Cutting number of SAR cycles 2. Minimizing charge/decharge of MSB caps on DAC 11 | % However, some overhead of the tracking algorithms Digital circuitry 12 | % which of course can be alliviated by using high threshold transistors! 13 | % (dual supplying incurs extra cost so to curb digital logic consumption 14 | % it better to use high threshold transistors instead (if available) 15 | 16 | clear 17 | clc 18 | close all 19 | 20 | %% ADC parameters and settings 21 | 22 | N=5000; 23 | fsampling=10^6; 24 | t=(0:N-1)./fsampling; 25 | 26 | %load('C:\Users\msafarpo\Downloads\A01S.mat') 27 | %Z2 = data{3}.X(1000:end,2)./max(data{1}.X(1000:end,1)) * 0.48 + 0.48; 28 | 29 | BitNumber = 10; 30 | v_ref = 1; 31 | 32 | global TotalCycles; %This variable keeps total number of cycles consumed for conversion of a whole signal 33 | TotalCycles = 0; 34 | 35 | global misPredictions; 36 | misPredictions = 0; 37 | 38 | global InitialStepValue %This array keeps first step value for each sample 39 | InitialStepValue = zeros(1,N); 40 | 41 | 42 | %Notice ENOB is defined for a pure siniousd not for any signals so ignore 43 | %ENOB values for other signals 44 | 45 | %% Input Signal Prepration; Just remove the comments to activate different signals 46 | 47 | %S=GenerateTestSignal(); % This generates siganls used in Chen's expriments 48 | %N=length(S); %signal window length 49 | 50 | %% pulse 51 | %tp = 0 : 1/1e6 : .01; 52 | %dp = 0 : 1/50e2 : .01; 53 | %train = 0.9*pulstran(tp,dp,@rectpuls,1e-4)+0.1; 54 | 55 | %% image 56 | %I1 = imread('Lenna.png'); 57 | %I1 = rgb2gray(I1); 58 | %I=v_ref * I1(:)./255; %scale to voltage range 59 | %imshow(I1,[]);figure 60 | %N=length(I); 61 | 62 | %% ECG (the toolbox is required as references in the paper 63 | %[ECG,ipeaks] = ecgsyn(); 64 | 65 | %% Generate simple sin 66 | fsignal=fsampling / 64 ; 67 | V_orginal= 0.4*sin(2*pi*fsignal*t)+0.5; %some slow changing signal 68 | 69 | %% 70 | %V_orginal = train; 71 | %V_orginal = I; 72 | %V_orginal = ECG; %also uncomment [ECG,ipeaks] = ecgsyn(); above 73 | %V_orginal = Z2'; 74 | %V_orginal = S; 75 | 76 | Digital=zeros(N,1); 77 | PrevSamp=0; %Previous Sample 78 | QuantVal=0; 79 | Cycles_Spend_for_Sample = zeros(N,1); %number of cycles spend for each samples individually; only for representation purposes 80 | p = 5; 81 | StepSize=256; % Step Counter is reset to starting step 82 | InRangeCounter = 0; %If this counter is equal 83 | Max_number_of_cycles_for_each_conversion = 17 84 | 85 | V_DAC_CycleByCyle = zeros(N*Max_number_of_cycles_for_each_conversion,1); % cycle by cycle voltage of DAC, N samples and for each sample there is Max_.. cycles 86 | %% Simulation of the proposed SAR ADC 87 | %-------Outer loop: This loop takes a new sample in each iteration--------- 88 | cycle_counter=0; 89 | 90 | for i=2:N 91 | QuantVal=PrevSamp; 92 | S_H = V_orginal(i); 93 | InRangeCounter = 0; %If this counter is equal 94 | Power_Gate = false; %if this bit is true then the ADC is power gated 95 | %---------------------inner loop: This loop does conversion on the sample---------- 96 | for j=1:Max_number_of_cycles_for_each_conversion %unkown number of SAR iterations so no ceiling 97 | cycle_counter = cycle_counter+1; 98 | if (Power_Gate==false) %if the conversion ended do not carry out the rest of cycles and but stand still and turned off 99 | StepSize=floor(StepSize/2); % functions as our shit register (right shift) 100 | if S_H>DAC(QuantVal,BitNumber,v_ref) 101 | InRangeCounter = InRangeCounter + 1; 102 | if (StepSize==0) %if we are before the last cycle (I want to simulate exactly the circuit behavior) 103 | QuantVal=QuantVal ; %Quantized Value 104 | else 105 | QuantVal=QuantVal + StepSize; %Quantized Value 106 | end 107 | else 108 | InRangeCounter = InRangeCounter - 1; 109 | if (StepSize==0) 110 | QuantVal=QuantVal - 1; %since step size is zero 111 | else 112 | QuantVal=QuantVal - StepSize; 113 | end 114 | end 115 | 116 | if (StepSize == 0) 117 | Cycles_Spend_for_Sample(i) = j; 118 | Power_Gate = true; %conversion for the current sample has ended therefore turn off the ADC 119 | end 120 | end 121 | DAC_steps(i,j) = QuantVal; %both are same just to have different form 122 | V_DAC_CycleByCyle(cycle_counter)=QuantVal; 123 | end 124 | 125 | TotalCycles = TotalCycles + Cycles_Spend_for_Sample(i); 126 | PrevSamp=QuantVal; 127 | Digital(i)=PrevSamp; 128 | if (InRangeCounter >= Cycles_Spend_for_Sample(i))|| (InRangeCounter <= -Cycles_Spend_for_Sample(i)) %Out of Range !!! 129 | StepSize = 2^BitNumber; 130 | output = sar_adc(S_H,10,v_ref,1); 131 | misPredictions = misPredictions + 1; 132 | TotalCycles = TotalCycles + BitNumber; 133 | Cycles_Spend_for_Sample(i) = Cycles_Spend_for_Sample(i)+BitNumber; 134 | else 135 | [StepSize,p] = predict ( Digital(i), Digital(i-1)); 136 | StepSize = StepSize*2; 137 | end 138 | if StepSize<4 139 | StepSize = 4; 140 | %StepSize 141 | end 142 | InitialStepValue(i) = StepSize; 143 | %StepSize = StepSize*2; % since in this algorithm 144 | 145 | 146 | end 147 | %% Representation and etc 148 | 149 | %X = floor(V_orginal(N/4:3*N/4)./v_ref*(2^BitNumber-1) ); %ignore begining part of signal, due to tracking it is not converted properly 150 | %Y = Digital(N/4:3*N/4)'; 151 | 152 | X = floor(V_orginal./v_ref*(2^BitNumber-1) ); %ignore begining part of signal, due to tracking it is not converted properly 153 | Y = Digital'; 154 | 155 | plot(X,'g') 156 | 157 | hold on 158 | %errorbar(1:1:length(Digital),Digital(1:1:end),InitialStepValue(1:1:end),'.r') 159 | hold on 160 | stairs(Y) 161 | legend("Input signal","Digital signal"); 162 | Digital=Digital(:); 163 | whn=hanning(length(Digital)); 164 | 165 | % SNR = snr(X,X-Y); 166 | % ENOB = (SNR-1.76)/6.02; 167 | % disp("SNR "+num2str(SNR)); 168 | % disp("ENOB "+ num2str(ENOB)) 169 | disp("Average Cycles " + num2str(TotalCycles/N)); 170 | disp("Average Misses " + num2str(misPredictions/N)); 171 | 172 | figure 173 | stairs(V_DAC_CycleByCyle,'r') 174 | legend("DAC voltage"); 175 | % 176 | % figure 177 | % 178 | % plot(movmean(Cycles_Spend_for_Sample,128)) 179 | -------------------------------------------------------------------------------- /MATLAB model/DAC.m: -------------------------------------------------------------------------------- 1 | function Analog = dac_block(digital, N, v_ref) 2 | Analog = (digital/(2^N)).*v_ref; 3 | end 4 | -------------------------------------------------------------------------------- /MATLAB model/GenerateTestSignal.m: -------------------------------------------------------------------------------- 1 | function Signal = GenerateTestSignal() 2 | fSampling = 10^6; 3 | T = 1./fSampling; 4 | 5 | Vref=1; 6 | L_epoch = 1000; %each epoch's length 7 | 8 | t = (1:L_epoch).*T; 9 | 10 | 11 | e1 = Vref./2*ones(size(t)); %from 0us to 2000us all are DC values eqaul to 512 12 | e2 = e1 ; 13 | 14 | e3 = 0.5*Vref.*sin(2*pi*10^3*t)+Vref/2; %1KHz signal 15 | e4 = 0.25*Vref.*sin(2*pi*10*10^3*t)+Vref/2; 16 | e5 = 0.5*Vref.*sin(2*pi*10*10^3*t)+Vref/2; 17 | 18 | e6 = 0.25*Vref.*sin(2*pi*30*10^3*t)+Vref/2; 19 | e7 = 0.5*Vref.*sin(2*pi*30*10^3*t)+Vref/2; 20 | 21 | 22 | e8 = (Vref/1024 * 20) * cos(2*pi*(fSampling/2)*t) + Vref/2; 23 | 24 | e9 = 0.5*Vref.*sin(2*pi*450*10^3*t)+Vref/2; 25 | 26 | Signal = [-.01,e1,e2,e3,e4,e5,e6,e7,e8,e9,e3,1.01]; 27 | plot(Signal) 28 | 29 | end 30 | -------------------------------------------------------------------------------- /MATLAB model/Lenna.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/NeuroFan/Algorithmic-SAR-ADC-simulation-files/46c11584eb23fc7021da444353faf9c426fc7c99/MATLAB model/Lenna.png -------------------------------------------------------------------------------- /MATLAB model/M_Bit_Fixed_With_1th_Order_Predication.m: -------------------------------------------------------------------------------- 1 | % Different logic for subrange prediction : Subtraction 2 | %clear 3 | clc 4 | close all 5 | 6 | %SAR ADC behavioral simulation 7 | BitNumber = 10; 8 | load('C:\Users\msafarpo\Downloads\A01S.mat') 9 | Z2 = data{3}.X(1000:end,2)./max(data{1}.X(1000:end,1)) * 0.48 + 0.48; 10 | 11 | S = GenerateTestSignal(); 12 | N=4000; 13 | %[ECG,ipeaks] = ecgsyn(); 14 | 15 | v_ref = 1; 16 | K = 6 ; %Number of locked MSBs 17 | global TotalCycles ; 18 | TotalCycles = 0; 19 | 20 | global misPredictions ; 21 | misPredictions = 0; 22 | 23 | 24 | fsampling=10^6; 25 | fsignal=fsampling / 512 ; 26 | t=(0:N-1)./fsampling; 27 | V_orginal= 0.48*sin(2*pi*fsignal*t)+0.49 + 0.0000000001*rand(size(t)) ; 28 | %V_orginal = (ECG(1:N)'./max(ECG))./2.4 + 0.59 ; 29 | %V_orginal = Z2; 30 | %Vnoisy= V_orginal+ 0.000000001*rand(size(t));%+DAC(1,8)*rand(1,length(t))%-DAC(1,8)*rand(1,length(t)); 31 | Digital=zeros(N,BitNumber); 32 | Digital_Output = zeros(N,1); 33 | Digital(1,1) = 1 ; % [1 0 0 0 0 0 0 0]; 34 | ConvertedBack = zeros(N,1); 35 | weights = getWeights(BitNumber); 36 | for i = 3:N 37 | S_and_H = V_orginal(i); 38 | [Range,powerOf2] = predict( Digital_Output(i-1,:), Digital_Output(i-2,:)); %%% Make a predication instead of counting success 39 | K = BitNumber- powerOf2; 40 | if K<1 41 | K = 1; 42 | elseif K>BitNumber 43 | K = BitNumber; 44 | end 45 | [DACValues, K] = TrackingBoazhen(S_and_H,Digital(i-1,:), BitNumber, v_ref, 0,K); 46 | Digital(i,:) = DACValues(end,:); 47 | Digital_Output(i) = sum(Digital(i,:).*weights'.*2^BitNumber) ; 48 | ConvertedBack(i) = dac_block(Digital(i,:),weights,v_ref); 49 | end 50 | plot(V_orginal); 51 | hold on 52 | stairs(ConvertedBack); 53 | 54 | X = V_orginal(N/4:3*N/4); %ignore begining part of signal, due to tracking it is not converted properly 55 | Y = ConvertedBack(N/4:3*N/4)'; 56 | SNR = snr(X,X-Y); 57 | ENOB = (SNR-1.76)/6.02; 58 | disp("SNR "+num2str(SNR)); 59 | disp("ENOB "+ num2str(ENOB)) 60 | disp("Average Cycles " + num2str(TotalCycles/N)); 61 | 62 | 63 | function [output, K] = TrackingBoazhen(v_in,previous_digita, N, v_ref, v_cm, k) 64 | %main function of sar adc of Boazhen 65 | %return a list of arrays, each string represents the converted digits of a DAC clock 66 | % k is number of LSBs that are resolved, N is ADC resolution, v_in input 67 | % sample and previous_digita is digital value for previouse sample 68 | weights = getWeights(N); 69 | 70 | digits = previous_digita ; %zeros(N,1); 71 | digits(k:end) = 0; %Only MSBs are kept and the rest k bit are restet 72 | digits(k) = 1; %MSB of the subrange is set to one to be tested in following 73 | output = zeros(N,N); %# define a list to restore the digits of each DAC clock 74 | 75 | Set_lower_bits_Hi = previous_digita; 76 | Set_lower_bits_Low = previous_digita; 77 | Set_lower_bits_Hi(k:end) = 1; 78 | Set_lower_bits_Low(k:end) = 0; 79 | 80 | global TotalCycles; 81 | global misPredictions; 82 | TotalCycles = TotalCycles + 2; %Initial Tests 83 | if (v_in < dac_block(Set_lower_bits_Hi,weights,v_ref)) && (v_in > dac_block(Set_lower_bits_Low,weights,v_ref)) %if the input is in the range of k LSBs 84 | for i = k:N 85 | v_dac = dac_block(digits,weights,v_ref); 86 | %disp("v_dac : " + v_dac); 87 | diff = comparator(v_dac,v_in,v_cm); 88 | b = sar_logic(diff); 89 | digits = update_digits(b,i ,digits,N); 90 | %disp("digit : "); 91 | %disp(digits(:)'); 92 | output(i,:) = digits; 93 | end 94 | TotalCycles = TotalCycles + (N-k+1); 95 | 96 | 97 | else %Failure to be in range 98 | disp("Failur"); 99 | output = sar_adc(v_in,N,v_ref,1); 100 | k = 1; % Reset the Counter to zero 101 | TotalCycles = TotalCycles + N; 102 | misPredictions = misPredictions+1 103 | end 104 | K=k; 105 | end 106 | -------------------------------------------------------------------------------- /MATLAB model/M_Bits_Fixed_ADC.m: -------------------------------------------------------------------------------- 1 | clear 2 | clc 3 | close all 4 | 5 | BitNumber = 10; 6 | load('C:\Users\msafarpo\Downloads\A01S.mat') 7 | Z2 = data{3}.X(1000:end,2)./max(data{1}.X(1000:end,1)) * 0.48 + 0.48; 8 | 9 | N=4000; 10 | %[ECG,ipeaks] = ecgsyn(); 11 | 12 | BitNumber = 10; 13 | v_ref = 1; 14 | global K; 15 | 16 | K = 4 ; %Number of locked MSBs 17 | global TotalCycles ; 18 | TotalCycles = 0; 19 | 20 | global misPredict; 21 | misPredict = 0; 22 | 23 | 24 | N=10000; 25 | fsampling=10^6; 26 | t=(0:N-1)./fsampling; 27 | 28 | fsignal=fsampling / 512 ; 29 | V_orginal= 0.00009*sin(2*pi*fsignal*t)+0.49; %some slow changing signal 30 | %V_orginal = (ECG(1:N)'./max(ECG))./2.4 + 0.59 ; 31 | %V_orginal = Z2; 32 | %Vnoisy= V_orginal+ 0.000000001*rand(size(t));%+DAC(1,8)*rand(1,length(t))%-DAC(1,8)*rand(1,length(t)); 33 | Digital=zeros(N,BitNumber); 34 | Digital(1,1) = 1 ; % [1 0 0 0 0 0 0 0]; 35 | ConvertedBack = zeros(N,1); 36 | weights = getWeights(BitNumber); 37 | for i = 2:N 38 | S_and_H = V_orginal(i); 39 | [DACValues] = TrackingBoazhen(S_and_H,Digital(i-1,:), BitNumber, v_ref, 0,9); 40 | Digital(i,:) = DACValues(end,:); 41 | ConvertedBack(i) = dac_block(Digital(i,:),weights,v_ref); 42 | end 43 | plot(V_orginal); 44 | hold on 45 | stairs(ConvertedBack); 46 | 47 | X = V_orginal(N/4:3*N/4); %ignore begining part of signal, due to tracking it is not converted properly 48 | Y = ConvertedBack(N/4:3*N/4)'; 49 | SNR = snr(X,X-Y); 50 | ENOB = (SNR-1.76)/6.02; 51 | disp("SNR "+num2str(SNR)); 52 | disp("ENOB "+ num2str(ENOB)) 53 | 54 | disp("Average Cycles " + num2str(TotalCycles/N)); 55 | disp("Mis Rate %" + num2str(100*misPredict/N)); 56 | function [output] = TrackingBoazhen(v_in,previous_digita, B, v_ref, v_cm, M) 57 | global K; 58 | %main function of sar adc of Boazhen 59 | %return a list of arrays, each string represents the converted digits of a DAC clock 60 | % k is number of LSBs that are resolved, N is ADC resolution, v_in input 61 | % sample and previous_digita is digital value for previouse sample 62 | weights = getWeights(B); 63 | digits = previous_digita ; %zeros(N,1); 64 | digits(K:end) = 0; %Only MSBs are kept and the rest k bit are restet 65 | digits(K) = 1; %MSB of the subrange is set to one to be tested in following 66 | output = zeros(B,B); %# define a list to restore the digits of each DAC clock 67 | 68 | Set_lower_bits_Hi = previous_digita; 69 | Set_lower_bits_Low = previous_digita; 70 | Set_lower_bits_Hi(K:end) = 1; 71 | Set_lower_bits_Low(K:end) = 0; 72 | global TotalCycles; 73 | global misPredict; 74 | 75 | TotalCycles = TotalCycles + 2; %Initial Tests 76 | if (v_in < dac_block(Set_lower_bits_Hi,weights,v_ref)) && (v_in > dac_block(Set_lower_bits_Low,weights,v_ref)) %if the input is in the range of k LSBs 77 | for i = K:B 78 | v_dac = dac_block(digits,weights,v_ref); 79 | %disp("v_dac : " + v_dac); 80 | diff = comparator(v_dac,v_in,v_cm); 81 | b = sar_logic(diff); 82 | digits = update_digits(b,i ,digits,B) 83 | %disp("digit : "); 84 | %disp(digits(:)'); 85 | output(i,:) = digits; 86 | end 87 | TotalCycles = TotalCycles + (B-K+1); 88 | 89 | %sucess-> change k 90 | K=K+1; 91 | if (K==B-1) 92 | K=B-1; 93 | end 94 | 95 | 96 | else %Failure to be in range 97 | output = sar_adc(v_in,B,v_ref,1); 98 | K = 1; % Reset the Counter to zero 99 | TotalCycles = TotalCycles + B; 100 | misPredict = misPredict + 1; 101 | end 102 | end 103 | -------------------------------------------------------------------------------- /MATLAB model/comparator.m: -------------------------------------------------------------------------------- 1 | 2 | function diff = comparator(v_dac,v_in,v_cm) 3 | diff = v_dac - v_in; % v_cm 4 | end -------------------------------------------------------------------------------- /MATLAB model/dac_block.m: -------------------------------------------------------------------------------- 1 | 2 | function Analog = dac_block(digits, weights, v_ref) 3 | Analog = sum(digits(:) .* weights(:)) * v_ref; 4 | end 5 | -------------------------------------------------------------------------------- /MATLAB model/derivsecgsyn.m: -------------------------------------------------------------------------------- 1 | function dxdt = derivsecgsyn(t,x,flag,rr,sfint,ti,ai,bi) 2 | % dxdt = derivsecgsyn(t,x,flag,rr,sampfreq,ti,ai,bi) 3 | % ODE file for generating the synthetic ECG 4 | % This file provides dxdt = F(t,x) taking input paramters: 5 | % rr: rr process 6 | % sfint: Internal sampling frequency [Hertz] 7 | % Order of extrema: [P Q R S T] 8 | % ti = angles of extrema [radians] 9 | % ai = z-position of extrema 10 | % bi = Gaussian width of peaks 11 | % Copyright (c) 2003 by Patrick McSharry & Gari Clifford, All Rights Reserved 12 | % See IEEE Transactions On Biomedical Engineering, 50(3), 289-294, March 2003. 13 | % Contact P. McSharry (patrick AT mcsharry DOT net) or 14 | % G.D. Clifford (gari AT mit DOT edu) 15 | 16 | % This program is free software; you can redistribute it and/or modify 17 | % it under the terms of the GNU General Public License as published by 18 | % the Free Software Foundation; either version 2 of the License, or 19 | % (at your option) any later version. 20 | % 21 | % This program is distributed in the hope that it will be useful, 22 | % but WITHOUT ANY WARRANTY; without even the implied warranty of 23 | % MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24 | % GNU General Public License for more details. 25 | % 26 | % You should have received a copy of the GNU General Public License 27 | % along with this program; if not, write to the Free Software 28 | % Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 29 | % 30 | % ecgsyn.m and its dependents are freely availble from Physionet - 31 | % http://www.physionet.org/ - please report any bugs to the authors above. 32 | 33 | 34 | xi = cos(ti); 35 | yi = sin(ti); 36 | ta = atan2(x(2),x(1)); 37 | r0 = 1; 38 | a0 = 1.0 - sqrt(x(1)^2 + x(2)^2)/r0; 39 | ip = 1+floor(t*sfint); 40 | w0 = 2*pi/rr(ip); 41 | 42 | 43 | fresp = 0.25; 44 | zbase = 0.005*sin(2*pi*fresp*t); 45 | 46 | dx1dt = a0*x(1) - w0*x(2); 47 | dx2dt = a0*x(2) + w0*x(1); 48 | 49 | dti = rem(ta - ti, 2*pi); 50 | dx3dt = - sum(ai.*dti.*exp(-0.5*(dti./bi).^2)) - 1.0*(x(3) - zbase); 51 | 52 | dxdt = [dx1dt; dx2dt; dx3dt]; -------------------------------------------------------------------------------- /MATLAB model/ecgsyn.m: -------------------------------------------------------------------------------- 1 | function [s, ipeaks] = ecgsyn(sfecg,N,Anoise,hrmean,hrstd,lfhfratio,sfint,ti,ai,bi) 2 | % [s, ipeaks] = ecgsyn(sfecg,N,Anoise,hrmean,hrstd,lfhfratio,sfint,ti,ai,bi) 3 | % Produces synthetic ECG with the following outputs: 4 | % s: ECG (mV) 5 | % ipeaks: labels for PQRST peaks: P(1), Q(2), R(3), S(4), T(5) 6 | % A zero lablel is output otherwise ... use R=find(ipeaks==3); 7 | % to find the R peaks s(R), etc. 8 | % 9 | % Operation uses the following parameters (default values in []s): 10 | % sfecg: ECG sampling frequency [256 Hertz] 11 | % N: approximate number of heart beats [256] 12 | % Anoise: Additive uniformly distributed measurement noise [0 mV] 13 | % hrmean: Mean heart rate [60 beats per minute] 14 | % hrstd: Standard deviation of heart rate [1 beat per minute] 15 | % lfhfratio: LF/HF ratio [0.5] 16 | % sfint: Internal sampling frequency [256 Hertz] 17 | % Order of extrema: [P Q R S T] 18 | % ti = angles of extrema [-70 -15 0 15 100] degrees 19 | % ai = z-position of extrema [1.2 -5 30 -7.5 0.75] 20 | % bi = Gaussian width of peaks [0.25 0.1 0.1 0.1 0.4] 21 | % Copyright (c) 2003 by Patrick McSharry & Gari Clifford, All Rights Reserved 22 | % See IEEE Transactions On Biomedical Engineering, 50(3), 289-294, March 2003. 23 | % Contact P. McSharry (patrick@mcsharry.net) or G. Clifford (gari@mit.edu) 24 | 25 | % This program is free software; you can redistribute it and/or modify 26 | % it under the terms of the GNU General Public License as published by 27 | % the Free Software Foundation; either version 2 of the License, or 28 | % (at your option) any later version. 29 | % 30 | % This program is distributed in the hope that it will be useful, 31 | % but WITHOUT ANY WARRANTY; without even the implied warranty of 32 | % MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 33 | % GNU General Public License for more details. 34 | % 35 | % You should have received a copy of the GNU General Public License 36 | % along with this program; if not, write to the Free Software 37 | % Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 | % 39 | % ecgsyn.m and its dependents are freely availble from Physionet - 40 | % http://www.physionet.org/ - please report any bugs to the authors above. 41 | 42 | % set parameter default values 43 | if nargin < 1 44 | sfecg = 1024; 45 | end 46 | if nargin < 2 47 | N = 256; 48 | end 49 | if nargin < 3 50 | Anoise = 0; 51 | end 52 | if nargin < 4 53 | hrmean = 60; 54 | end 55 | if nargin < 5 56 | hrstd = 1; 57 | end 58 | if nargin < 6 59 | lfhfratio = 0.5; 60 | end 61 | if nargin < 7 62 | sfint = 2048; 63 | end 64 | if nargin <8 65 | % P Q R S T 66 | ti = [-70 -15 0 15 100]; 67 | end 68 | % convert to radians 69 | ti = ti*pi/180; 70 | if nargin <9 % z position of attractor 71 | % P Q R S T 72 | ai = [1.2 -5 30 -7.5 0.75]; 73 | end 74 | if nargin <10 % Gaussian width of each attractor 75 | % P Q R S T 76 | bi = [0.25 0.1 0.1 0.1 0.4]; 77 | end 78 | 79 | % adjust extrema parameters for mean heart rate 80 | hrfact = sqrt(hrmean/60); 81 | hrfact2 = sqrt(hrfact); 82 | bi = hrfact*bi; 83 | ti = [hrfact2 hrfact 1 hrfact hrfact2].*ti; 84 | 85 | % check that sfint is an integer multiple of sfecg 86 | q = round(sfint/sfecg); 87 | qd = sfint/sfecg; 88 | if q ~= qd 89 | error(['Internal sampling frequency (sfint) must be an integer multiple ' ... 90 | 'of the ECG sampling frequency (sfecg). Your current choices are: ' ... 91 | 'sfecg = ' int2str(sfecg) ' and sfint = ' int2str(sfint) '.']); 92 | end 93 | 94 | % define frequency parameters for rr process 95 | % flo and fhi correspond to the Mayer waves and respiratory rate respectively 96 | flo = 0.1; 97 | fhi = 0.25; 98 | flostd = 0.01; 99 | fhistd = 0.01; 100 | 101 | fid = 1; 102 | fprintf(fid,'ECG sampled at %d Hz\n',sfecg); 103 | fprintf(fid,'Approximate number of heart beats: %d\n',N); 104 | fprintf(fid,'Measurement noise amplitude: %d \n',Anoise); 105 | fprintf(fid,'Heart rate mean: %d bpm\n',hrmean); 106 | fprintf(fid,'Heart rate std: %d bpm\n',hrstd); 107 | fprintf(fid,'LF/HF ratio: %g\n',lfhfratio); 108 | fprintf(fid,'Internal sampling frequency: %g\n',sfint); 109 | fprintf(fid,' P Q R S T\n'); 110 | fprintf(fid,'ti = [%g %g %g %g %g] radians\n',ti(1),ti(2),ti(3),ti(4),ti(5)); 111 | fprintf(fid,'ai = [%g %g %g %g %g]\n',ai(1),ai(2),ai(3),ai(4),ai(5)); 112 | fprintf(fid,'bi = [%g %g %g %g %g]\n',bi(1),bi(2),bi(3),bi(4),bi(5)); 113 | 114 | 115 | % calculate time scales for rr and total output 116 | sampfreqrr = 1; 117 | trr = 1/sampfreqrr; 118 | tstep = 1/sfecg; 119 | rrmean = (60/hrmean); 120 | Nrr = 2^(ceil(log2(N*rrmean/trr))); 121 | 122 | % compute rr process 123 | rr0 = rrprocess(flo,fhi,flostd,fhistd,lfhfratio,hrmean,hrstd,sampfreqrr,Nrr); 124 | 125 | % upsample rr time series from 1 Hz to sfint Hz 126 | rr = interp(rr0,sfint); 127 | 128 | % make the rrn time series 129 | dt = 1/sfint; 130 | rrn = zeros(length(rr),1); 131 | tecg=0; 132 | i = 1; 133 | while i <= length(rr) 134 | tecg = tecg+rr(i); 135 | ip = round(tecg/dt); 136 | rrn(i:ip) = rr(i); 137 | i = ip+1; 138 | end 139 | Nt = ip; 140 | 141 | % integrate system using fourth order Runge-Kutta 142 | fprintf(fid,'Integrating dynamical system\n'); 143 | x0 = [1,0,0.04]; 144 | Tspan = [0:dt:(Nt-1)*dt]; 145 | [T,X0] = ode45('derivsecgsyn',Tspan,x0,[],rrn,sfint,ti,ai,bi); 146 | 147 | % downsample to required sfecg 148 | X = X0(1:q:end,:); 149 | 150 | % extract R-peaks times 151 | ipeaks = detectpeaks(X, ti, sfecg); 152 | 153 | % Scale signal to lie between -0.4 and 1.2 mV 154 | z = X(:,3); 155 | zmin = min(z); 156 | zmax = max(z); 157 | zrange = zmax - zmin; 158 | z = (z - zmin)*(1.6)/zrange -0.4; 159 | 160 | % include additive uniformly distributed measurement noise 161 | eta = 2*rand(length(z),1)-1; 162 | s = z + Anoise*eta; 163 | 164 | 165 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 166 | function rr = rrprocess(flo, fhi, flostd, fhistd, lfhfratio, hrmean, hrstd, sfrr, n) 167 | w1 = 2*pi*flo; 168 | w2 = 2*pi*fhi; 169 | c1 = 2*pi*flostd; 170 | c2 = 2*pi*fhistd; 171 | sig2 = 1; 172 | sig1 = lfhfratio; 173 | rrmean = 60/hrmean; 174 | rrstd = 60*hrstd/(hrmean*hrmean); 175 | 176 | df = sfrr/n; 177 | w = [0:n-1]'*2*pi*df; 178 | dw1 = w-w1; 179 | dw2 = w-w2; 180 | 181 | Hw1 = sig1*exp(-0.5*(dw1/c1).^2)/sqrt(2*pi*c1^2); 182 | Hw2 = sig2*exp(-0.5*(dw2/c2).^2)/sqrt(2*pi*c2^2); 183 | Hw = Hw1 + Hw2; 184 | Hw0 = [Hw(1:n/2); Hw(n/2:-1:1)]; 185 | Sw = (sfrr/2)*sqrt(Hw0); 186 | 187 | ph0 = 2*pi*rand(n/2-1,1); 188 | ph = [ 0; ph0; 0; -flipud(ph0) ]; 189 | SwC = Sw .* exp(j*ph); 190 | x = (1/n)*real(ifft(SwC)); 191 | 192 | xstd = std(x); 193 | ratio = rrstd/xstd; 194 | rr = rrmean + x*ratio; 195 | 196 | 197 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 198 | function ind = detectpeaks(X, thetap, sfecg) 199 | N = length(X); 200 | irpeaks = zeros(N,1); 201 | 202 | theta = atan2(X(:,2),X(:,1)); 203 | ind0 = zeros(N,1); 204 | for i=1:N-1 205 | a = ( (theta(i) <= thetap) & (thetap <= theta(i+1)) ); 206 | j = find(a==1); 207 | if ~isempty(j) 208 | d1 = thetap(j) - theta(i); 209 | d2 = theta(i+1) - thetap(j); 210 | if d1 < d2 211 | ind0(i) = j; 212 | else 213 | ind0(i+1) = j; 214 | end 215 | end 216 | end 217 | 218 | d = ceil(sfecg/64); 219 | d = max([2 d]) 220 | ind = zeros(N,1); 221 | z = X(:,3); 222 | zmin = min(z); 223 | zmax = max(z); 224 | zext = [zmin zmax zmin zmax zmin]; 225 | sext = [1 -1 1 -1 1]; 226 | for i=1:5 227 | clear ind1 Z k vmax imax iext; 228 | ind1 = find(ind0==i); 229 | n = length(ind1); 230 | Z = ones(n,2*d+1)*zext(i)*sext(i); 231 | for j=-d:d 232 | k = find( (1 <= ind1+j) & (ind1+j <= N) ); 233 | Z(k,d+j+1) = z(ind1(k)+j)*sext(i); 234 | end 235 | [vmax, ivmax] = max(Z,[],2); 236 | iext = ind1 + ivmax-d-1; 237 | ind(iext) = i; 238 | end 239 | 240 | -------------------------------------------------------------------------------- /MATLAB model/getWeights.m: -------------------------------------------------------------------------------- 1 | 2 | function Weights = getWeights(N) 3 | %generates DAC weights, N is number of ADC Bits 4 | Weights = ones(N,1); 5 | for i = 1:N 6 | Weights(i) = 1 / 2^i ; 7 | end 8 | end 9 | -------------------------------------------------------------------------------- /MATLAB model/predict.m: -------------------------------------------------------------------------------- 1 | function [StepSize,power] = Predict(D,D_minus_1) 2 | Diff=D - D_minus_1; % Update next stage's StepSize 3 | p = nextpow2(abs(Diff)); 4 | StepSize = 2.^(p); 5 | power = p; 6 | end -------------------------------------------------------------------------------- /MATLAB model/readme.md: -------------------------------------------------------------------------------- 1 | MATLAB models include our tracking ADC and a few similiar works that are mentioned in the paper. The scripts perform quantization, generates quantized signals and report snr, ENOB and number of bit cycles for conversion of differnt types of signals using different SAR algorithms. 2 | 3 | 4 | Our implementation is **"Arithmetic_Tracking_WorkingVersion.m"**. Uncomments instructions in lines 70 to 75 (and associated instructions above it) to change input signal type (ECG, EEG, image,etc.) . 5 | 6 | **"sar_adc.m"** is for simulation of regular SAR ADC. 7 | **"M_Bit_Fixed_With_1th_Order_Predication.m"** is a similiar tracking SAR ADC (refrenced in the paper 1). 8 | 9 | 10 | ECG signal generated using ECGSYN toolset can be found here: https://physionet.org/content/ecgsyn/1.0.0/Matlab/ecgsyn.m 11 | EEG files are recieved the dataset downloaded form : http://bnci-horizon-2020.eu/database/data-sets 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /MATLAB model/sar.m: -------------------------------------------------------------------------------- 1 | clear 2 | clc 3 | close all 4 | dir 5 | 6 | %SAR ADC behavioral simulation 7 | BitNumber = 8; 8 | v_ref = 1.2; 9 | K = 6 ; %Number of locked MSBs 10 | global TotalCycles ; 11 | TotalCycles = 0; 12 | N=10000; 13 | fsampling=10^3; 14 | fsignal=fsampling / 10000 ; 15 | t=(0:N-1)./fsampling; 16 | V_orginal= 0.49*sin(2*pi*fsignal*t)+0.48 + 0.00000001*rand(size(t)) ; 17 | 18 | %Vnoisy= V_orginal+ 0.000000001*rand(size(t));%+DAC(1,8)*rand(1,length(t))%-DAC(1,8)*rand(1,length(t)); 19 | Digital=zeros(N,BitNumber); 20 | ConvertedBack = zeros(N,1); 21 | weights = getWeights(BitNumber); 22 | for i = 1:N 23 | S_and_H = V_orginal(i); 24 | DACValues = sar_adc(S_and_H, BitNumber, v_ref, 0); 25 | TotalCycles = TotalCycles + BitNumber; 26 | Digital(i,:) = DACValues(end,:); 27 | ConvertedBack(i) = dac_block(Digital(i,:),weights,v_ref); 28 | end 29 | plot(V_orginal); 30 | hold on 31 | stairs(ConvertedBack); 32 | 33 | 34 | X = V_orginal(N/4:3*N/4); %ignore begining part of signal, due to tracking it is not converted properly 35 | Y = ConvertedBack(N/4:3*N/4)'; 36 | SNR = snr(X,X-Y); 37 | ENOB = (SNR-1.76)/6.02; 38 | disp("SNR "+num2str(SNR)); 39 | disp("ENOB "+ num2str(ENOB)) -------------------------------------------------------------------------------- /MATLAB model/sar_adc.m: -------------------------------------------------------------------------------- 1 | 2 | function [output,NumericOutput] = sar_adc(v_in, BitNumber, v_ref, v_cm) 3 | %main function of sar adc 4 | %return a list of arrays, each string represents the converted digits of a DAC clock 5 | weights = getWeights(BitNumber); 6 | digits = zeros(BitNumber,1); 7 | digits(1) = 1; %MSB has the lowest index (little endian) 8 | output = zeros(BitNumber,BitNumber); %# define a list to restore the digits of each DAC clock 9 | for i = 1:BitNumber 10 | v_dac = dac_block(digits,weights,v_ref); 11 | %disp("v_dac : " + v_dac); 12 | diff = comparator(v_dac,v_in,v_cm); 13 | b = sar_logic(diff); 14 | digits = update_digits(b,i ,digits,BitNumber); 15 | %disp("digit : "); 16 | %disp(digits(:)'); 17 | output(i,:) = digits; 18 | end 19 | NumericOutput = sum(digits.*weights.*2^BitNumber); 20 | end 21 | 22 | -------------------------------------------------------------------------------- /MATLAB model/sar_logic.m: -------------------------------------------------------------------------------- 1 | 2 | function bit = sar_logic(diff) 3 | % determine the digit bit according to the difference between 4 | % v_dac and v_in 5 | if (diff <= 0) 6 | bit = 1; 7 | else 8 | bit = 0; 9 | end 10 | end 11 | -------------------------------------------------------------------------------- /MATLAB model/update_digits.m: -------------------------------------------------------------------------------- 1 | function up_digits = update_digits(bit,i, digits,N) 2 | %bit is the comparator output, i is bit number, digits is binary value 3 | up_digits = digits; 4 | up_digits(i) =bit ;%update current bit 5 | 6 | % make a tentative guess of the next digit 7 | if i < N 8 | up_digits(i+1) = 1; 9 | up_digits(i) = bit; 10 | end -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | 2 | # Algorithmic SAR ADC simulation 3 | Arithmetic Tracking Adaptive SAR ADC for Low-activity Signals which include EEG, ECG, EKG, industrial and 2D (image) signals. 4 | 5 | Main files: 6 | Arithmetic_Tracking_WorkingVersion.m : MATLAB file for simualtion behavior of the proposed SAR ADC 7 | M_Bits_Fixed_ADC.m : MATLAB file for simualtion behavior of the a similiar tracking SAR ADC 8 | 9 | Energy savings are two fold: 1. Cutting number of SAR cycles 2. Minimizing charge/decharge of MSB caps on DAC 10 | However, some overhead of the tracking algorithms Digital circuitry 11 | which of course can be alliviated by using high threshold transistors! 12 | (dual supplying incurs extra cost so to curb digital logic consumption 13 | it better to use high threshold transistors instead (if available) 14 | 15 | # Contributions of this work 16 | 17 | 1. Arithmetic SAR instead of conventional SAR provides more flexibility in tracking 18 | 2. First order prediction is not cheap to implement (commonly requires a full adder/subtractor unit of its own along with a digital quantizer), whereas in the proposed work, this task is caried out by very simple circuit proposed by the authors. 19 | 3. Due to cheap first-order prediction number of bit-cycles and system response to sudden activity change is better that the state-of-the-art. 20 | 4. We did not stop at behavioral level and the algorithm was implemented in circuit level to demonstrated applicability of the method. 21 | 5. Out-of-range detection requires extra bit-cycles which add to overhead and reduces gains of predictive approach as shown in the paper, however the proposed work detect out-of-range conversion merely through inspection of bit sequence generated by the comparted. The whole procedure is carried out digitally as a simple state-machine, without incurring extra bit-cycles as previous works cited in the paper (e.g. [9],[18] and [26] in references) 22 | 23 | # Citation 24 | 25 | Please cite either of the following papers in case of using the provided simulations. 26 | 27 | @article{inanlou2020arithmetic, 28 | title={Arithmetic Tracking Adaptive SAR ADC for Signals with Low-activity Periods}, 29 | author={Inanlou, Reza and Safarpour, Mehdi and Silv{\'e}n, Olli}, 30 | journal={IEEE Access}, 31 | year={2020}, 32 | publisher={IEEE} 33 | } 34 | 35 | @inproceedings{safarpour2019reconfigurable, 36 | title={A Reconfigurable Dual-Mode Tracking SAR ADC without Analog Subtraction}, 37 | author={Safarpour, Mehdi and Inanlou, Reza and Silv{\'e}n, Olli and Rahkonen, Timo and Shoaei, Omid}, 38 | booktitle={2019 Signal Processing: Algorithms, Architectures, Arrangements, and Applications (SPA)}, 39 | pages={28--32}, 40 | year={2019}, 41 | organization={IEEE} 42 | 43 | 44 | 45 | -------------------------------------------------------------------------------- /SPICE model/10_bit-arthsar_final.mt0: -------------------------------------------------------------------------------- 1 | $DATA1 SOURCE='HSPICE' VERSION='A-2008.03 32-BIT' 2 | .TITLE '10_bit_arthsar_final' 3 | ivdd ivdda ivddd ivddc 4 | ivddac temper alter# 5 | -2.648e-06 -1.000e-06 -1.571e-04 -1.000e-06 6 | -1.000e-06 27.0000 1.0000 7 | -------------------------------------------------------------------------------- /SPICE model/_ADSB.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ ADSB------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt ADSB B0 BD0 B1 BD1 B2 BD2 B3 BD3 B4 BD4 6 | +B5 BD5 B6 BD6 B7 BD7 SB0 SB1 SB2 SB3 SB4 7 | +SB5 SB6 SB7 SB8 SB9 8 | 9 | 10 | XXOR0 B0 BD0 SB0 XOR_4ND 11 | 12 | XXOR1 B1 BD1 X1 XOR_4ND 13 | XNOT0 SB0 SBN0 NOT 14 | XAND0 X1 SBN0 SB1 AND2 15 | 16 | XXOR2 B2 BD2 X2 XOR_4ND 17 | XOR1 SB0 SB1 O0 OR2 18 | XNOT1 O0 OB0 NOT 19 | XAND1 OB0 X2 SB2 AND2 20 | 21 | XXOR3 B3 BD3 X3 XOR_4ND 22 | XOR2 O0 SB2 O1 OR2 23 | XNOT2 O1 OB1 NOT 24 | XAND2 OB1 X3 SB3 AND2 25 | 26 | XXOR4 B4 BD4 X4 XOR_4ND 27 | XOR3 O1 SB3 O2 OR2 28 | XNOT3 O2 OB2 NOT 29 | XAND3 OB2 X4 SB4 AND2 30 | 31 | XXOR5 B5 BD5 X5 XOR_4ND 32 | XOR4 O2 SB4 O3 OR2 33 | XNOT4 O3 OB3 NOT 34 | XAND4 OB3 X5 SB5 AND2 35 | 36 | XXOR6 B6 BD6 X6 XOR_4ND 37 | XOR5 O3 SB5 O4 OR2 38 | XNOT5 O4 OB4 NOT 39 | XAND5 OB4 X6 SB6 AND2 40 | 41 | XXOR7 B7 BD7 X7 XOR_4ND 42 | XOR6 O4 SB6 O5 OR2 43 | XNOT6 O5 OB5 NOT 44 | XAND6 OB5 X7 SB7 AND2 45 | 46 | XOR7 O5 SB7 O6 OR2 47 | XNOT7 O6 OB6 NOT 48 | XAND7 OB6 DD SB8 AND2 49 | 50 | 51 | XOR8 O6 SB8 O7 OR2 52 | XNOT8 O7 OB7 NOT 53 | XAND8 OB7 DD SB9 AND2 54 | 55 | 56 | .ends ADSB 57 | -------------------------------------------------------------------------------- /SPICE model/_ADSBN.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ ADSBN------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt ADSBN B0 BD0 B1 BD1 B2 BD2 B3 BD3 B4 BD4 6 | +B5 BD5 B6 BD6 B7 BD7 SB0 SB1 SB2 SB3 SB4 7 | +SB5 SB6 SB7 SB8 SB9 8 | 9 | 10 | XXOR0 B9 BD9 SB9 XOR_4ND 11 | 12 | XXOR1 B8 BD8 X9 XOR_4ND 13 | XNOT0 SB9 SBN9 NOT 14 | XAND0 X9 SBN9 SB8 AND2 15 | 16 | XXOR2 B7 BD7 X8 XOR_4ND 17 | XOR1 SB9 SB8 O9 OR2 18 | XNOT1 O9 OB9 NOT 19 | XAND1 OB9 X8 SB7 AND2 20 | 21 | XXOR3 B6 BD6 X7 XOR_4ND 22 | XOR2 O9 SB7 O8 OR2 23 | XNOT2 O8 OB8 NOT 24 | XAND2 OB8 X7 SB6 AND2 25 | 26 | XXOR4 B5 BD5 X6 XOR_4ND 27 | XOR3 O8 SB6 O7 OR2 28 | XNOT3 O7 OB7 NOT 29 | XAND3 OB7 X6 SB5 AND2 30 | 31 | XXOR5 B4 BD4 X5 XOR_4ND 32 | XOR4 O7 SB5 O6 OR2 33 | XNOT4 O6 OB6 NOT 34 | XAND4 OB6 X5 SB4 AND2 35 | 36 | XXOR6 B3 BD3 X4 XOR_4ND 37 | XOR5 O6 SB4 O5 OR2 38 | XNOT5 O5 OB5 NOT 39 | XAND5 OB5 X4 SB3 AND2 40 | 41 | XXOR7 B2 BD2 X3 XOR_4ND 42 | XOR6 O5 SB3 O4 OR2 43 | XNOT6 O4 OB4 NOT 44 | XAND6 OB4 X3 SB2 AND2 45 | 46 | XOR7 O4 SB2 O3 OR2 47 | XNOT7 O3 OB3 NOT 48 | XAND7 OB3 DD SB1 AND2 49 | 50 | 51 | XOR8 O3 SB1 O2 OR2 52 | XNOT8 O2 OB2 NOT 53 | XAND8 OB2 DD SB0 AND2 54 | 55 | 56 | .ends ADSBN 57 | -------------------------------------------------------------------------------- /SPICE model/_AND2.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ AND2-2S*1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt AND2 in1 in2 out 6 | 7 | Mnn1-2 n1 in1 ss ss N_10_SP W=0.25u L=0.09u M=2 8 | Mnn2-2 ou in2 n1 ss N_10_SP W=0.25u L=0.09u M=2 9 | 10 | 11 | Mpn1-2 ou in1 ddd ddd P_10_SP W=0.25u L=0.09u M=2 12 | Mpn2-2 ou in2 ddd ddd P_10_SP W=0.25u L=0.09u M=2 13 | 14 | XNOT ou out NOT 15 | .ends AND2 16 | -------------------------------------------------------------------------------- /SPICE model/_AND4.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ AND4------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt AND4 I1 I2 I3 I4 Out 6 | 7 | XAND1 I1 I2 X1 AND2 8 | XAND2 I3 I4 X2 AND2 9 | 10 | XAND X1 X2 Out AND2 11 | 12 | 13 | .ends AND4 14 | -------------------------------------------------------------------------------- /SPICE model/_Ccomp.SP: -------------------------------------------------------------------------------- 1 | Ccomp 2 | 3 | 4 | .subck Ccomp in+ in- out 5 | 6 | ***************************************************************************** 7 | *****************stage#1***************************************************** 8 | 9 | Idc ddc dpt 1u 10 | 11 | Mp1 dp1 in+ dpt dpt P_10_SP W=2u L=80n M=2 12 | Mp2 dp2 in- dpt dpt P_10_SP W=2u L=80n M=2 13 | 14 | Mn1 dp2 dp1 ss ss N_10_SP W=1u L=80n M=2 15 | Mn2 dp1 dp2 ss ss N_10_SP W=1u L=80n M=2 16 | 17 | Mn3 dp2 dp2 ss ss N_10_SP W=1u L=80n M=1 18 | Mn4 dp1 dp1 ss ss N_10_SP W=1u L=80n M=1 19 | 20 | Mn5 vv dp2 ss ss N_10_SP W=1u L=80n M=2 21 | Mn6 yy dp1 ss ss N_10_SP W=1u L=80n M=2 22 | 23 | 24 | Mp3 vv vv ddc ddc P_10_SP W=3u L=80n M=1 25 | Mp4 yy vv ddc ddc P_10_SP W=3u L=80n M=1 26 | 27 | 28 | XNOT yy out NOT 29 | 30 | .ends Ccomp 31 | 32 | 33 | 34 | -------------------------------------------------------------------------------- /SPICE model/_DFF.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ DFF------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt DFF D CLR CLK Pre Q 6 | 7 | XND1 Pre out2 out4 out1 NAND3 8 | XND2 CLR CLK out1 out2 NAND3 9 | XND3 out2 CLK out4 out3 NAND3 10 | XND4 CLR D out3 out4 NAND3 11 | XND5 Pre out2 Q! Q NAND3 12 | XND6 CLR out3 Q Q! NAND3 13 | 14 | .ends DFF 15 | -------------------------------------------------------------------------------- /SPICE model/_DFF1.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ DFF1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt DFF1 D CLR CLK Pre Q Q! 6 | 7 | XND1 Pre out2 out4 out1 NAND3 8 | XND2 CLR CLK out1 out2 NAND3 9 | XND3 out2 CLK out4 out3 NAND3 10 | XND4 CLR D out3 out4 NAND3 11 | XND5 Pre out2 Q! Q NAND3 12 | XND6 CLR out3 Q Q! NAND3 13 | 14 | .ends DFF1 15 | -------------------------------------------------------------------------------- /SPICE model/_FA.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ 4NAND_XOR------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt FA A B C Sum Carry 6 | 7 | XOR1 A B N1 XOR_4ND 8 | XOR2 C N1 Sum XOR_4ND 9 | 10 | XAND1 C N1 N2 AND2 11 | XAND2 A B N3 AND2 12 | 13 | X_OR N2 N3 Carry OR2 14 | 15 | .ends FA 16 | -------------------------------------------------------------------------------- /SPICE model/_FNADFF_M.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ FNADFF_M------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt FNADFF_M D CLKi Q 6 | 7 | XND1 D CLKi! out NAND2 8 | 9 | XND2 D! CLKi! outb NAND2 10 | 11 | XNT1 D D! NOT 12 | XNT2 clki clki! NOT 13 | 14 | XRS out outb Q NASRL 15 | 16 | 17 | .ends FNADFF_M 18 | -------------------------------------------------------------------------------- /SPICE model/_F_10BFA.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ 10BIT FULL-ADDER--------------- 3 | *------------------------------------------------- 4 | 5 | .subckt F_10BFA A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 A9 B9 6 | +Sub Cin S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 7 | 8 | 9 | XOR0 Sub B0 XR0 XOR_4ND 10 | XFA0 A0 XR0 Cin S0 C0 FA 11 | 12 | XOR1 Sub B1 XR1 XOR_4ND 13 | XFA1 A1 XR1 C0 S1 C1 FA 14 | 15 | XOR2 Sub B2 XR2 XOR_4ND 16 | XFA2 A2 XR2 C1 S2 C2 FA 17 | 18 | XOR3 Sub B3 XR3 XOR_4ND 19 | XFA3 A3 XR3 C2 S3 C3 FA 20 | 21 | XOR4 Sub B4 XR4 XOR_4ND 22 | XFA4 A4 XR4 C3 S4 C4 FA 23 | 24 | 25 | XOR5 Sub B5 XR5 XOR_4ND 26 | XFA5 A5 XR5 C4 S5 C5 FA 27 | 28 | XOR6 Sub B6 XR6 XOR_4ND 29 | XFA6 A6 XR6 C5 S6 C6 FA 30 | 31 | XOR7 Sub B7 XR7 XOR_4ND 32 | XFA7 A7 XR7 C6 S7 C7 FA 33 | 34 | XOR8 Sub B8 XR8 XOR_4ND 35 | XFA8 A8 XR8 C7 S8 C8 FA 36 | 37 | XOR9 Sub B9 XR9 XOR_4ND 38 | XFA9 A9 XR9 C8 S9 C9 FA 39 | 40 | .ends F_10BFA 41 | -------------------------------------------------------------------------------- /SPICE model/_F_4BCNT.SP: -------------------------------------------------------------------------------- 1 | F_4BCNT 2 | *------------------ F_4BCNT------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt F_4BCNT CLK Pre CLR Q0 Q1 Q2 Q3 Q0! Q1! Q2! Q3! 6 | 7 | XDFF0 Q0! CLR CLK Pre Q0 Q0! DFF1 8 | 9 | XDFF1 Q1! CLR Q0! Pre Q1 Q1! DFF1 10 | 11 | XDFF2 Q2! CLR Q1! Pre Q2 Q2! DFF1 12 | 13 | XDFF3 Q3! CLR Q2! Pre Q3 Q3! DFF1 14 | 15 | .ends F_4BCNT 16 | 17 | -------------------------------------------------------------------------------- /SPICE model/_F_4NADFF.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ 4NADFF------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt F_4NADFF D CLK Q Q! 6 | 7 | XND1 D CLK out NAND2 8 | 9 | XND2 D! CLK outb NAND2 10 | 11 | XNT D D! NOT 12 | 13 | XRS out outb Q Q! NASRL 14 | 15 | 16 | .ends F_4NADFF 17 | -------------------------------------------------------------------------------- /SPICE model/_IVR.SP: -------------------------------------------------------------------------------- 1 | IVR 2 | *------------------ IVR------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt IVR Mux_o B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 6 | +SET0 SET1 SET2 SET3 SET4 SET5 SET6 SET7 SET8 SET9 7 | 8 | XAND1 Mux_o B0 SET0 NAND2 9 | XAND2 Mux_o B1 SET1 NAND2 10 | 11 | XAND3 Mux_o B2 SET2 NAND2 12 | XAND4 Mux_o B3 SET3 NAND2 13 | 14 | XAND5 Mux_o B4 SET4 NAND2 15 | XAND6 Mux_o B5 SET5 NAND2 16 | 17 | XAND7 Mux_o B6 SET6 NAND2 18 | XAND8 Mux_o B7 SET7 NAND2 19 | 20 | XAND9 Mux_o B8 SET8 NAND2 21 | XAND10 Mux_o B9 SET9 NAND2 22 | 23 | .ends IVR 24 | -------------------------------------------------------------------------------- /SPICE model/_MIL.log: -------------------------------------------------------------------------------- 1 | pnlAddPane(); 2 | nil 3 | 1 4 | designOpen("c:\\users\\reza\\desktop\\arith_sar\\arsar_10bit\\10_bit-arthsar_final.sp"); 5 | "D0" 6 | t 7 | pnlAddCurve(1, node(D0,"A0","v(vsh)"), node(D0,"A0","TIME")); 8 | nil 9 | pnlAddCurve(1, node(D0,"A0","v(vdac)"), node(D0,"A0","TIME")); 10 | nil 11 | pnlUnselectPane(1, 0); 12 | nil 13 | pnlSelectPane(1); 14 | nil 15 | pnlUnselectPane(1, 0); 16 | nil 17 | pnlSelectPane(1); 18 | nil 19 | pnlDeletePane(1, 1); 20 | nil 21 | nil 22 | -------------------------------------------------------------------------------- /SPICE model/_Mono-comp-Low.SP: -------------------------------------------------------------------------------- 1 | Mono-comp-Low 2 | 3 | 4 | .subck Mono-comp-Low in+ in- CLKC outp outn Valid 5 | 6 | ***************************************************************************** 7 | *****************stage#1***************************************************** 8 | 9 | Mpt dpt CLKC ddc ddc P_10_SP W=.4u L=100n M=1 10 | Mp1 dp1 in+ dpt dpt P_10_SP W=.4u L=80n M=2 11 | Mp2 dp2 in- dpt dpt P_10_SP W=.4u L=80n M=2 12 | 13 | Mn1 dp2 dp1 ss ss N_10_SP W=.2u L=80n M=2 14 | Mn2 dp1 dp2 ss ss N_10_SP W=.2u L=80n M=2 15 | 16 | Mn3 dp2 CLKC ss ss N_10_SP W=.2u L=80n M=2 17 | Mn4 dp1 CLKC ss ss N_10_SP W=.2u L=80n M=2 18 | 19 | Mn5 outp dp1 ss ss N_10_SP W=.2u L=80n M=2 20 | Mn6 outn dp2 ss ss N_10_SP W=.2u L=80n M=2 21 | 22 | 23 | Mp3 outp dp1 ddc ddc P_10_SP W=.4u L=80n M=2 24 | Mp4 outn dp2 ddc ddc P_10_SP W=.4u L=80n M=2 25 | 26 | 27 | XND outp outn Valid NAND2 28 | 29 | .ends Mono-comp-Low 30 | 31 | 32 | 33 | -------------------------------------------------------------------------------- /SPICE model/_Mux2-1.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ 4NAND_XOR------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt MUX2-1 SEL I1 I2 Out 6 | 7 | XND1 I1 SELB X1 NAND2 8 | XNOT SEL SELB NOT 9 | XND2 I2 SEL X2 NAND2 10 | 11 | XND3 X1 X2 Out NAND2 12 | 13 | .ends MUX2-1 14 | -------------------------------------------------------------------------------- /SPICE model/_NADFF.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NADFF------------------- 3 | *------------------------------------------------- 4 | 5 | 6 | .subckt NADFF D CLK Q Q! 7 | 8 | XND1 D CLK out NAND2 9 | XND2 D! CLK outb NAND2 10 | XNT D D! NOT 11 | XRS out outb Q Q! NASRL 12 | 13 | 14 | .ends NADFF 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | *.lib './Tech90nm/MOSFET_HSPICE_MODEL/L90_SP10_V051.lib' tt 25 | 26 | *.temp 27 27 | 28 | *.include 'NOT.sp' 29 | *.include 'NAND2.sp' 30 | *.include 'NASRL.sp' 31 | 32 | 33 | *.global dd ss 34 | 35 | *Vdd dd ss dc=0.5 36 | 37 | *Vss ss 0 dc=0 38 | 39 | 40 | *vsamp d ss pulse(0.5 0 0.25U tt tt tp tsar) 41 | 42 | *vph1 CLK ss pulse(0 0.5 0 tt tt tstp tsa) 43 | 44 | 45 | 46 | 47 | *.op 48 | 49 | 50 | *.param fck='8*10^6hz' tck='1/fck' pchw='tck/2-tt' tt='50p' tsar='10*tck' tsa='2*tsar' tar='10*tck' tstp='tsar-tck/2' tp='tck-2*tt' tpc='2*tp' to='2*tck' 51 | 52 | 53 | *.param tstart='1.2u' tstep='tsar' nfft=pow(2,10) 54 | 55 | *.param tstop ='tstart+tstep*nfft' 56 | *.param tstart='0u' tstep='tsar' tstop='10u' 57 | 58 | *.measure tran ivdd avg i(vdd) from=tstart to=tstop 59 | 60 | 61 | 62 | 63 | *.tran tstep tstop tstart 64 | 65 | 66 | *.option accurate=1 67 | *.option ingold=1 68 | *.option probe post 69 | 70 | *.probe v(D),v(D!),v(outb),v(out),V(Q),v(Q!),v(D3),v(D2),v(D1),v(D0),v(R),v(daco-),v(Shift),v(stop),v(dpt),v(SMP) 71 | 72 | *.probe v(ph1),v(ph2),v(clkb),v(in+),v(in-),v(RST),v(obs),v(obs!),v(clk),v(cm),v(RST9+),v(RST8+),v(REF9+),v(REF8+),v(dbu4+),v(dbu3+),v(dbu2+),v(dbu1+),v(dbu0+),v(dbu+) 73 | 74 | 75 | *.end 76 | 77 | -------------------------------------------------------------------------------- /SPICE model/_NAND2.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NAND2*1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NAND2 in1 in2 out 6 | 7 | Mnn1-2 n1 in1 ss ss N_10_SP W=0.25u L=0.09u M=2 8 | Mnn2-2 out in2 n1 ss N_10_SP W=0.25u L=0.09u M=2 9 | 10 | 11 | Mpn1-2 out in1 ddd ddd P_10_SP W=0.25u L=0.09u M=2 12 | Mpn2-2 out in2 ddd ddd P_10_SP W=0.25u L=0.09u M=2 13 | 14 | 15 | .ends NAND2 16 | -------------------------------------------------------------------------------- /SPICE model/_NAND3.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NAND3*1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NAND3 inn1 inn2 inn3 outn 6 | 7 | 8 | Mnn1 n1 inn1 ss ss N_10_SP W=0.18u L=0.09u M=2 9 | Mnn2 n2 inn2 n1 ss N_10_SP W=0.18u L=0.09u M=2 10 | Mnn3 outn inn3 n2 ss N_10_SP W=0.18u L=0.09u M=2 11 | 12 | Mpn1 outn inn1 ddd ddd P_10_SP W=0.12u L=0.09u M=2 13 | Mpn2 outn inn2 ddd ddd P_10_SP W=0.12u L=0.09u M=2 14 | Mpn3 outn inn3 ddd ddd P_10_SP W=0.12u L=0.09u M=2 15 | 16 | 17 | .ends NAND3 18 | -------------------------------------------------------------------------------- /SPICE model/_NASRL.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NASRL------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NASRL in1 in2 out outb 6 | 7 | XND1 in1 outb out NAND2 8 | XND2 in2 out outb NAND2 9 | 10 | .ends NASRL 11 | -------------------------------------------------------------------------------- /SPICE model/_NE_DFF.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NE-DFF------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NE_DFF D CLK Q 6 | 7 | XNOT1 CLK CLKB NOT 8 | 9 | Mn1 D CLK S1 ss N_10_SP W=0.25u L=0.09u M=2 10 | Mp1 S1 CLKB D D P_10_SP W=0.25u L=0.09u M=2 11 | 12 | 13 | Mn2 S1 CLKB S2 ss N_10_SP W=0.25u L=0.09u M=2 14 | Mp2 S2 CLK S1 S1 P_10_SP W=0.25u L=0.09u M=2 15 | 16 | 17 | XNOT2 S1 X NOT 18 | XNOT3 X S2 NOT 19 | 20 | Mn3 S2 CLKB S3 ss N_10_SP W=0.25u L=0.09u M=2 21 | Mp3 S3 CLK S2 S2 P_10_SP W=0.25u L=0.09u M=2 22 | 23 | 24 | XNOT4 S3 Y NOT 25 | XNOT5 Y Q NOT 26 | 27 | Mn4 S3 CLK Q ss N_10_SP W=0.25u L=0.09u M=2 28 | Mp4 Q CLKB S3 S3 P_10_SP W=0.25u L=0.09u M=2 29 | 30 | 31 | .ends NE_DFF 32 | -------------------------------------------------------------------------------- /SPICE model/_NOR10.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NOR10------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NOR10 I1 I2 I3 I4 I5 I6 I7 I8 I9 I10 Out 6 | 7 | XR8 I1 I2 I3 I4 I5 I6 I7 I8 X1b NOR8 8 | XNT X1b X1 NOT 9 | XR4 ss ss I9 I10 X2 OR4 10 | *XNAND3 X1 I9 I10 Outb NAND3 11 | 12 | *XNOT Outb Out NOT 13 | 14 | XOR2 X1 X2 Out NOR2 15 | .ends NOR10 16 | -------------------------------------------------------------------------------- /SPICE model/_NOR2.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NOR2*1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NOR2 In1 In2 Out 6 | 7 | 8 | Mn1 Out In1 ss ss N_10_SP W=0.12u L=0.09u M=2 9 | Mn2 Out In2 ss ss N_10_SP W=0.12u L=0.09u M=2 10 | 11 | 12 | Mp1 Out In1 dn dd P_10_SP W=0.24u L=0.09u M=2 13 | Mp2 dn In2 dd dd P_10_SP W=0.24u L=0.09u M=2 14 | 15 | 16 | .ends NOR2 17 | -------------------------------------------------------------------------------- /SPICE model/_NOR4.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NOR4------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NOR4 I1 I2 I3 I4 Out 6 | 7 | XNOR1 I1 I2 X1 NOR2 8 | XNOR2 I3 I4 X2 NOR2 9 | 10 | XND X1 X2 Outb NAND2 11 | XNOT Outb Out NOT 12 | 13 | .ends NOR4 14 | -------------------------------------------------------------------------------- /SPICE model/_NOR8.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ NOR8------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt NOR8 I1 I2 I3 I4 I5 I6 I7 I8 Out 6 | 7 | XR4-1 I1 I2 I3 I4 X1 OR4 8 | XR4-2 I5 I6 I7 I8 X2 OR4 9 | 10 | XNOR X1 X2 Out NOR2 11 | 12 | 13 | .ends NOR8 14 | -------------------------------------------------------------------------------- /SPICE model/_NOT.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *----------------------NOT------------------------ 3 | *------------------------------------------------- 4 | 5 | .subckt NOT iin oin 6 | Mni1 oin iin ss ss N_10_SP W=125n L=0.09u M=2 7 | Mpi1 oin iin ddd ddd P_10_SP W=250n L=0.09u M=2 8 | .ends NOT -------------------------------------------------------------------------------- /SPICE model/_NOTD.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *----------------------NOTD------------------------ 3 | *------------------------------------------------- 4 | 5 | .subckt NOTD In Out 6 | Mni1 Out In ss ss N_10_SP W=500n L=0.09u M=2 7 | Mpi1 Out In dd dd P_10_SP W=1u L=0.09u M=2 8 | .ends NOTD -------------------------------------------------------------------------------- /SPICE model/_OR2.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ OR2*1------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt OR2 innO1 innO2 outnO 6 | 7 | 8 | MnnO1 ounO innO1 ss ss N_10_SP W=0.12u L=0.09u M=2 9 | MnnO2 ounO innO2 ss ss N_10_SP W=0.12u L=0.09u M=2 10 | 11 | 12 | MpnO1 ounO innO1 dno ddd P_10_SP W=0.24u L=0.09u M=2 13 | MpnO2 dno innO2 ddd ddd P_10_SP W=0.24u L=0.09u M=2 14 | 15 | XNot ounO outnO NOT 16 | 17 | .ends OR2 18 | -------------------------------------------------------------------------------- /SPICE model/_OR4.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ OR4------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt OR4 I1 I2 I3 I4 Out 6 | 7 | XNOR1 I1 I2 X1 NOR2 8 | XNOR2 I3 I4 X2 NOR2 9 | 10 | XND X1 X2 Out NAND2 11 | 12 | 13 | .ends OR4 14 | -------------------------------------------------------------------------------- /SPICE model/_SRIVR10.SP: -------------------------------------------------------------------------------- 1 | SRIVR10 2 | *------------------ SRIVR------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt SRIVR10 SEL D CLK Pre CLR BI9 BI8 BI7 BI6 BI5 BI4 BI3 BI2 BI1 BI0 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 6 | 7 | XMUX9 SEL D BI9 S9 Mux2-1 8 | XDFF9 S9 CLR CLK Pre Q9 DFF 9 | 10 | XMUX8 SEL Q9 BI8 S8 Mux2-1 11 | XDFF8 S8 CLR CLK Pre Q8 DFF 12 | 13 | XMUX7 SEL Q8 BI7 S7 Mux2-1 14 | XDFF7 S7 CLR CLK Pre Q7 DFF 15 | 16 | XMUX6 SEL Q7 BI6 S6 Mux2-1 17 | XDFF6 S6 CLR CLK Pre Q6 DFF 18 | 19 | XMUX5 SEL Q6 BI5 S5 Mux2-1 20 | XDFF5 S5 CLR CLK Pre Q5 DFF 21 | 22 | XMUX4 SEL Q5 BI4 S4 Mux2-1 23 | XDFF4 S4 CLR CLK Pre Q4 DFF 24 | 25 | XMUX3 SEL Q4 BI3 S3 Mux2-1 26 | XDFF3 S3 CLR CLK Pre Q3 DFF 27 | 28 | XMUX2 SEL Q3 BI2 S2 Mux2-1 29 | XDFF2 S2 CLR CLK Pre Q2 DFF 30 | 31 | XMUX1 SEL Q2 BI1 S1 Mux2-1 32 | XDFF1 S1 CLR CLK Pre Q1 DFF 33 | 34 | XMUX0 SEL Q1 BI0 S0 Mux2-1 35 | XDFF0 S0 CLR CLK Pre Q0 DFF 36 | 37 | .ends SRIVR10 38 | 39 | -------------------------------------------------------------------------------- /SPICE model/_XOR_4ND.SP: -------------------------------------------------------------------------------- 1 | *------------------------------------------------- 2 | *------------------ 4NAND_XOR------------------- 3 | *------------------------------------------------- 4 | 5 | .subckt XOR_4ND A B Q 6 | 7 | XND1 A B X NAND2 8 | XND2 A X X1 NAND2 9 | 10 | XND3 B X X2 NAND2 11 | XND4 X1 X2 Q NAND2 12 | 13 | .ends XOR_4ND 14 | -------------------------------------------------------------------------------- /SPICE model/readme.md: -------------------------------------------------------------------------------- 1 | Complete SPICE model is available through email. 2 | --------------------------------------------------------------------------------