├── .github ├── pipreq.txt ├── apt.txt ├── run_qemu.sh ├── ubuntu20.04.list ├── build_multiple_freeloader.sh ├── workflows │ ├── docker.yml │ └── build.yml ├── linuxsdk.Dockerfile ├── utils.sh └── build_sdk.sh ├── conf ├── evalsoc │ ├── initramfs.txt │ ├── freeloader.mk │ ├── build.mk │ ├── uboot.cmd │ ├── S03net │ ├── uboot_rv64imac_sd_config │ ├── uboot_rv64imafdc_sd_config │ ├── uboot_rv32imafdc_sd_config │ ├── uboot_rv64imafdc_flash_config │ ├── uboot_rv64imac_flash_config │ ├── uboot_rv32imac_sd_config │ ├── uboot_rv32imafdc_flash_config │ ├── uboot_rv32imac_flash_config │ ├── opensbi │ │ └── evalsoc.c │ ├── buildroot_initramfs_rv32imafdc_config │ ├── buildroot_initramfs_rv32imac_config │ ├── buildroot_initramfs_rv64imafdc_config │ ├── buildroot_initramfs_rv64imac_config │ ├── preramfs.sh │ ├── linux_rv64imac_defconfig │ ├── linux_rv64imafdc_defconfig │ ├── linux_rv32imac_defconfig │ ├── linux_rv32imafdc_defconfig │ ├── openocd.cfg │ ├── nuclei_rv64imac.dts │ ├── nuclei_rv64imafdc.dts │ └── nuclei_rv32imac.dts ├── genconf.json └── README.md ├── .gitignore ├── .gitmodules ├── Makefile.core ├── LICENSE ├── .gitlab-ci.yml └── Makefile /.github/pipreq.txt: -------------------------------------------------------------------------------- 1 | git-archive-all 2 | apt-select 3 | -------------------------------------------------------------------------------- /conf/evalsoc/initramfs.txt: -------------------------------------------------------------------------------- 1 | dir /dev 755 0 0 2 | nod /dev/console 644 0 0 c 5 1 3 | nod /dev/null 644 0 0 c 1 3 4 | slink /init /bin/busybox 755 0 0 5 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | work/* 2 | backup* 3 | release* 4 | toolchain* 5 | snapshot* 6 | GENERATED* 7 | .vscode 8 | buildroot/dl 9 | *.tar.xz 10 | *.tar 11 | *.zip 12 | *.tar.gz 13 | *.elf 14 | *.o 15 | -------------------------------------------------------------------------------- /.github/apt.txt: -------------------------------------------------------------------------------- 1 | build-essential git python3 python3-pip autotools-dev make cmake texinfo bison minicom flex liblz4-tool 2 | libgmp-dev libmpfr-dev libmpc-dev gawk libz-dev libssl-dev libglib2.0-dev libfdt-dev libpixman-1-dev zlib1g-dev 3 | libncursesw5-dev libncursesw5 mtools wget cpio zip unzip rsync bc sudo device-tree-compiler libpng16-16 libasound2 4 | -------------------------------------------------------------------------------- /conf/evalsoc/freeloader.mk: -------------------------------------------------------------------------------- 1 | DDR_BASE ?= 0x80000000 2 | FLASH_BASE ?= 0x20000000 3 | FLASH_SIZE ?= 32M 4 | CACHE_CTRL ?= 0x100C1 5 | # prefetch control register settings 6 | ## spfl1dctrl1 7 | SPFL1DCTRL1 ?= 0x1F 8 | SPFL1DCTRL2 ?= 9 | MERGL1DCTRL ?= 0x013503FF 10 | ENABLE_SMP ?= 1 11 | ENABLE_L2 ?= 1 12 | AMPFW_START_OFFSET ?= 0x7E000000 13 | AMPFW_SIZE ?= 0x400000 14 | AMP_START_CORE ?= 8 15 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "linux"] 2 | path = linux 3 | url = ../linux.git 4 | 5 | [submodule "buildroot"] 6 | path = buildroot 7 | url = ../buildroot.git 8 | 9 | [submodule "opensbi"] 10 | path = opensbi 11 | url = ../opensbi.git 12 | 13 | [submodule "freeloader"] 14 | path = freeloader 15 | url = ../freeloader.git 16 | 17 | [submodule "u-boot"] 18 | path = u-boot 19 | url = ../u-boot.git 20 | -------------------------------------------------------------------------------- /.github/run_qemu.sh: -------------------------------------------------------------------------------- 1 | cd nuclei-linux-sdk 2 | timeout --foreground -s SIGTERM 5m make run_qemu > >(tee run_qemu.log) 3 | 4 | # check pass or not 5 | if cat run_qemu.log | grep "Run /init" ; then 6 | echo "Kernel boot successfully" ; 7 | else 8 | echo "Kernel boot failed" 9 | exit 1; 10 | fi; 11 | if cat run_qemu.log | grep "Welcome to" ; then 12 | echo "Pass simulation" && exit 0; 13 | else 14 | echo "Failed init process" && exit 1; 15 | fi; 16 | exit 0 17 | -------------------------------------------------------------------------------- /Makefile.core: -------------------------------------------------------------------------------- 1 | # Format for adding a new core 2 | # XXX_CORE_ARCH_ABI = ARCH ABI 3 | UX600_CORE_ARCH_ABI = rv64imac lp64 4 | UX600FD_CORE_ARCH_ABI = rv64imafdc lp64d 5 | UX900_CORE_ARCH_ABI = rv64imac lp64 6 | UX900FD_CORE_ARCH_ABI = rv64imafdc lp64d 7 | U900_CORE_ARCH_ABI = rv32imac ilp32 8 | U900FD_CORE_ARCH_ABI = rv32imafdc ilp32d 9 | UX1000FD_CORE_ARCH_ABI = rv64imafdc lp64d 10 | 11 | # Don't forget to add a new core below 12 | # if you add a new XXX_CORE_ARCH_ABI above 13 | SUPPORTED_CORES = ux600 ux600fd ux900 ux900fd u900 u900fd ux1000fd 14 | -------------------------------------------------------------------------------- /conf/evalsoc/build.mk: -------------------------------------------------------------------------------- 1 | FW_TEXT_START := 0x80000000 2 | UIMAGE_AE_CMD := -a 0x80400000 -e 0x80400000 3 | # Need Nuclei Qemu >= 2023.10 4 | QEMU_MACHINE_OPTS := -M nuclei_evalsoc,download=flashxip -smp 8 -m 2G 5 | # initramfs pre command before generate initrd ramfs 6 | INITRAMFS_PRECMD := bash $(confdir)/preramfs.sh $(confdir) $(buildroot_initramfs_sysroot) copyfiles.txt 7 | # eg. $(confdir)/amp/cx.bin 8 | CORE1_APP_BIN := 9 | CORE2_APP_BIN := 10 | CORE3_APP_BIN := 11 | CORE4_APP_BIN := 12 | CORE5_APP_BIN := 13 | CORE6_APP_BIN := 14 | CORE7_APP_BIN := 15 | 16 | # Freq Settings 17 | TIMER_HZ ?= 18 | CPU_HZ ?= 19 | PERIPH_HZ ?= $(CPU_HZ) 20 | SIMULATION ?= 21 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot.cmd: -------------------------------------------------------------------------------- 1 | test -z "${bootloc}" && setenv bootloc . 2 | test -z "${kernelimg}" && setenv kernelimg ${bootloc}/uImage.lz4 3 | test -z "${rootfsimg}" && setenv rootfsimg ${bootloc}/uInitrd.lz4 4 | test -z "${dtbimg}" && setenv dtbimg ${bootloc}/kernel.dtb 5 | 6 | echo "Boot images located in ${bootloc}" 7 | echo "Loading kernel: ${kernelimg}" 8 | fatload mmc 0 0x83000000 ${kernelimg} 9 | echo "Loading ramdisk: ${rootfsimg}" 10 | fatload mmc 0 0x88300000 ${rootfsimg} 11 | if test -e mmc 0 ${dtbimg} ; then 12 | echo "Loading dtb: ${dtbimg}" 13 | fatload mmc 0 0x88000000 ${dtbimg} 14 | else 15 | echo "${dtbimg} not found, ignore it" 16 | fi 17 | echo "Starts booting from SD" 18 | bootm 0x83000000 0x88300000 0x88000000 19 | -------------------------------------------------------------------------------- /conf/evalsoc/S03net: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # config nuclei xec disable autoneg, setting 100M, fduplex mode. 3 | 4 | ls /sys/class/net/eth0 2>1 > /dev/null 5 | haseth0=$? 6 | 7 | start() { 8 | if [[ $haseth0 == 0 ]] then 9 | echo "Configure eth0 autoneg off speed 100 duplex full!" 10 | ethtool -s eth0 autoneg off speed 100 duplex full & 11 | ifconfig lo up & 12 | udhcpc & 13 | else 14 | echo "eth0 device not present, will not configure it!" 15 | fi 16 | } 17 | 18 | stop() { 19 | if [[ $haseth0 == 0 ]] then 20 | echo "eth0 & lo network down!" 21 | ifconfig lo down & 22 | ifconfig eth0 down & 23 | else 24 | echo "eth0 device not present, will not configure it!" 25 | fi 26 | } 27 | 28 | restart() { 29 | start 30 | } 31 | 32 | case "$1" in 33 | start|stop|restart) 34 | "$1";; 35 | *) 36 | echo "Usage: $0 {start|stop|restart}" 37 | exit 1 38 | esac 39 | -------------------------------------------------------------------------------- /conf/genconf.json: -------------------------------------------------------------------------------- 1 | { 2 | "general_config": { 3 | "ddr": { 4 | "base": "0x80000000", 5 | "size": "0x80000000" 6 | }, 7 | "norflash": { 8 | "base": "0x20000000", 9 | "size": "32M" 10 | }, 11 | "iregion": { 12 | "base": "0x18000000" 13 | }, 14 | "uart0": { 15 | "base": "0x10013000", 16 | "irq": "33" 17 | }, 18 | "uart1": { 19 | "base": "0x10023000", 20 | "irq": "34" 21 | }, 22 | "qspi0": { 23 | "base": "0x10014000", 24 | "irq": "35" 25 | }, 26 | "qspi2": { 27 | "base": "0x10034000", 28 | "irq": "37" 29 | }, 30 | "cpu_freq": "50000000", 31 | "timer_freq": "32768", 32 | "irqmax": "1023" 33 | } 34 | } 35 | -------------------------------------------------------------------------------- /.github/ubuntu20.04.list: -------------------------------------------------------------------------------- 1 | # 默认注释了源码镜像以提高 apt update 速度，如有需要可自行取消注释 2 | deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal main restricted universe multiverse 3 | # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal main restricted universe multiverse 4 | deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-updates main restricted universe multiverse 5 | # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-updates main restricted universe multiverse 6 | deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-backports main restricted universe multiverse 7 | # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-backports main restricted universe multiverse 8 | deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-security main restricted universe multiverse 9 | # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-security main restricted universe multiverse 10 | 11 | # 预发布软件源，不建议启用 12 | # deb https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-proposed main restricted universe multiverse 13 | # deb-src https://mirrors.tuna.tsinghua.edu.cn/ubuntu/ focal-proposed main restricted universe multiverse -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv64imac_sd_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_SYS_MALLOC_LEN=0x800000 3 | CONFIG_NR_DRAM_BANKS=1 4 | CONFIG_ENV_SIZE=0x20000 5 | CONFIG_TEXT_BASE=0x80200000 6 | CONFIG_SYS_LOAD_ADDR=0x80200000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_ARCH_RV64I=y 9 | CONFIG_CMODEL_MEDANY=y 10 | CONFIG_RISCV_SMODE=y 11 | # CONFIG_RISCV_ISA_F is not set 12 | CONFIG_SHOW_REGS=y 13 | CONFIG_DISTRO_DEFAULTS=y 14 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 15 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 16 | CONFIG_FIT=y 17 | CONFIG_BOOTDELAY=5 18 | CONFIG_LOG_MAX_LEVEL=8 19 | CONFIG_LOG_DEFAULT_LEVEL=6 20 | CONFIG_DISPLAY_CPUINFO=y 21 | CONFIG_DISPLAY_BOARDINFO=y 22 | CONFIG_EVENT=y 23 | CONFIG_EVENT_DYNAMIC=y 24 | CONFIG_SYS_BOOTM_LEN=0x4000000 25 | CONFIG_CMD_LSBLK=y 26 | CONFIG_CMD_MTD=y 27 | CONFIG_CMD_SF_TEST=y 28 | CONFIG_CMD_SPI=y 29 | CONFIG_CMD_MTDPARTS=y 30 | CONFIG_CMD_LOG=y 31 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 32 | CONFIG_DM_MTD=y 33 | CONFIG_SPI_FLASH_ATMEL=y 34 | CONFIG_SPI_FLASH_EON=y 35 | CONFIG_SPI_FLASH_GIGADEVICE=y 36 | CONFIG_SPI_FLASH_MACRONIX=y 37 | CONFIG_SPI_FLASH_SPANSION=y 38 | CONFIG_SPI_FLASH_STMICRO=y 39 | CONFIG_SPI_FLASH_SST=y 40 | CONFIG_SPI_FLASH_WINBOND=y 41 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 42 | # CONFIG_NET is not set 43 | CONFIG_FAT_WRITE=y 44 | CONFIG_HEXDUMP=y 45 | # CONFIG_EFI_LOADER is not set 46 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv64imafdc_sd_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_TEXT_BASE=0x80200000 3 | CONFIG_SYS_MALLOC_LEN=0x800000 4 | CONFIG_NR_DRAM_BANKS=1 5 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 6 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 7 | CONFIG_ENV_SIZE=0x20000 8 | CONFIG_SYS_LOAD_ADDR=0x80200000 9 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 10 | CONFIG_ARCH_RV64I=y 11 | CONFIG_CMODEL_MEDANY=y 12 | CONFIG_RISCV_SMODE=y 13 | CONFIG_SHOW_REGS=y 14 | CONFIG_FIT=y 15 | CONFIG_BOOTSTD_DEFAULTS=y 16 | CONFIG_DISTRO_DEFAULTS=y 17 | CONFIG_BOOTDELAY=5 18 | CONFIG_BOOTCOMMAND="run distro_bootcmd" 19 | CONFIG_LOG_MAX_LEVEL=8 20 | CONFIG_LOG_DEFAULT_LEVEL=6 21 | CONFIG_DISPLAY_CPUINFO=y 22 | CONFIG_DISPLAY_BOARDINFO=y 23 | CONFIG_SYS_BOOTM_LEN=0x4000000 24 | CONFIG_CMD_LSBLK=y 25 | CONFIG_CMD_MTD=y 26 | CONFIG_CMD_SF_TEST=y 27 | CONFIG_CMD_SPI=y 28 | CONFIG_CMD_MTDPARTS=y 29 | CONFIG_CMD_LOG=y 30 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 31 | # CONFIG_NET is not set 32 | CONFIG_DM_MTD=y 33 | CONFIG_SPI_FLASH_ATMEL=y 34 | CONFIG_SPI_FLASH_EON=y 35 | CONFIG_SPI_FLASH_GIGADEVICE=y 36 | CONFIG_SPI_FLASH_MACRONIX=y 37 | CONFIG_SPI_FLASH_SPANSION=y 38 | CONFIG_SPI_FLASH_STMICRO=y 39 | CONFIG_SPI_FLASH_SST=y 40 | CONFIG_SPI_FLASH_WINBOND=y 41 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 42 | CONFIG_FAT_WRITE=y 43 | CONFIG_REGEX=y 44 | CONFIG_HEXDUMP=y 45 | # CONFIG_EFI_LOADER is not set 46 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv32imafdc_sd_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_TEXT_BASE=0x80400000 3 | CONFIG_SYS_MALLOC_LEN=0x800000 4 | CONFIG_NR_DRAM_BANKS=1 5 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 6 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 7 | CONFIG_ENV_SIZE=0x20000 8 | CONFIG_SYS_LOAD_ADDR=0x80400000 9 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 10 | CONFIG_CMODEL_MEDANY=y 11 | CONFIG_RISCV_SMODE=y 12 | CONFIG_SHOW_REGS=y 13 | CONFIG_FIT=y 14 | CONFIG_DISTRO_DEFAULTS=y 15 | CONFIG_LOG_MAX_LEVEL=8 16 | CONFIG_LOG_DEFAULT_LEVEL=6 17 | CONFIG_DISPLAY_CPUINFO=y 18 | CONFIG_DISPLAY_BOARDINFO=y 19 | # CONFIG_BOOTM_NETBSD is not set 20 | # CONFIG_BOOTM_PLAN9 is not set 21 | # CONFIG_BOOTM_RTEMS is not set 22 | # CONFIG_BOOTM_VXWORKS is not set 23 | CONFIG_SYS_BOOTM_LEN=0x8000000 24 | CONFIG_CMD_LSBLK=y 25 | CONFIG_CMD_MTD=y 26 | CONFIG_CMD_SF_TEST=y 27 | CONFIG_CMD_SPI=y 28 | CONFIG_CMD_MTDPARTS=y 29 | CONFIG_CMD_LOG=y 30 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 31 | # CONFIG_NET is not set 32 | CONFIG_DM_MTD=y 33 | CONFIG_SPI_FLASH_ATMEL=y 34 | CONFIG_SPI_FLASH_EON=y 35 | CONFIG_SPI_FLASH_GIGADEVICE=y 36 | CONFIG_SPI_FLASH_MACRONIX=y 37 | CONFIG_SPI_FLASH_SPANSION=y 38 | CONFIG_SPI_FLASH_STMICRO=y 39 | CONFIG_SPI_FLASH_SST=y 40 | CONFIG_SPI_FLASH_WINBOND=y 41 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 42 | CONFIG_FAT_WRITE=y 43 | CONFIG_HEXDUMP=y 44 | # CONFIG_EFI_LOADER is not set 45 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv64imafdc_flash_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_SYS_MALLOC_LEN=0x800000 3 | CONFIG_NR_DRAM_BANKS=1 4 | CONFIG_ENV_SIZE=0x20000 5 | CONFIG_TEXT_BASE=0x80200000 6 | CONFIG_SYS_LOAD_ADDR=0x80200000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_ARCH_RV64I=y 9 | CONFIG_CMODEL_MEDANY=y 10 | CONFIG_RISCV_SMODE=y 11 | CONFIG_SHOW_REGS=y 12 | CONFIG_DISTRO_DEFAULTS=y 13 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 14 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 15 | CONFIG_FIT=y 16 | CONFIG_BOOTDELAY=5 17 | CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 18 | CONFIG_LOG_MAX_LEVEL=8 19 | CONFIG_LOG_DEFAULT_LEVEL=6 20 | CONFIG_DISPLAY_CPUINFO=y 21 | CONFIG_DISPLAY_BOARDINFO=y 22 | CONFIG_EVENT=y 23 | CONFIG_EVENT_DYNAMIC=y 24 | CONFIG_SYS_BOOTM_LEN=0x4000000 25 | CONFIG_CMD_LSBLK=y 26 | CONFIG_CMD_MTD=y 27 | CONFIG_CMD_SF_TEST=y 28 | CONFIG_CMD_SPI=y 29 | CONFIG_CMD_MTDPARTS=y 30 | CONFIG_CMD_LOG=y 31 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 32 | CONFIG_DM_MTD=y 33 | CONFIG_SPI_FLASH_ATMEL=y 34 | CONFIG_SPI_FLASH_EON=y 35 | CONFIG_SPI_FLASH_GIGADEVICE=y 36 | CONFIG_SPI_FLASH_MACRONIX=y 37 | CONFIG_SPI_FLASH_SPANSION=y 38 | CONFIG_SPI_FLASH_STMICRO=y 39 | CONFIG_SPI_FLASH_SST=y 40 | CONFIG_SPI_FLASH_WINBOND=y 41 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 42 | # CONFIG_NET is not set 43 | CONFIG_FAT_WRITE=y 44 | CONFIG_HEXDUMP=y 45 | # CONFIG_EFI_LOADER is not set 46 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv64imac_flash_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_SYS_MALLOC_LEN=0x800000 3 | CONFIG_NR_DRAM_BANKS=1 4 | CONFIG_ENV_SIZE=0x20000 5 | CONFIG_TEXT_BASE=0x80200000 6 | CONFIG_SYS_LOAD_ADDR=0x80200000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_ARCH_RV64I=y 9 | CONFIG_CMODEL_MEDANY=y 10 | CONFIG_RISCV_SMODE=y 11 | # CONFIG_RISCV_ISA_F is not set 12 | CONFIG_SHOW_REGS=y 13 | CONFIG_DISTRO_DEFAULTS=y 14 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 15 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 16 | CONFIG_FIT=y 17 | CONFIG_BOOTDELAY=5 18 | CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 19 | CONFIG_LOG_MAX_LEVEL=8 20 | CONFIG_LOG_DEFAULT_LEVEL=6 21 | CONFIG_DISPLAY_CPUINFO=y 22 | CONFIG_DISPLAY_BOARDINFO=y 23 | CONFIG_EVENT=y 24 | CONFIG_EVENT_DYNAMIC=y 25 | CONFIG_SYS_BOOTM_LEN=0x4000000 26 | CONFIG_CMD_LSBLK=y 27 | CONFIG_CMD_MTD=y 28 | CONFIG_CMD_SF_TEST=y 29 | CONFIG_CMD_SPI=y 30 | CONFIG_CMD_MTDPARTS=y 31 | CONFIG_CMD_LOG=y 32 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 33 | CONFIG_DM_MTD=y 34 | CONFIG_SPI_FLASH_ATMEL=y 35 | CONFIG_SPI_FLASH_EON=y 36 | CONFIG_SPI_FLASH_GIGADEVICE=y 37 | CONFIG_SPI_FLASH_MACRONIX=y 38 | CONFIG_SPI_FLASH_SPANSION=y 39 | CONFIG_SPI_FLASH_STMICRO=y 40 | CONFIG_SPI_FLASH_SST=y 41 | CONFIG_SPI_FLASH_WINBOND=y 42 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 43 | # CONFIG_NET is not set 44 | CONFIG_FAT_WRITE=y 45 | CONFIG_HEXDUMP=y 46 | # CONFIG_EFI_LOADER is not set 47 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv32imac_sd_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_TEXT_BASE=0x80400000 3 | CONFIG_SYS_MALLOC_LEN=0x800000 4 | CONFIG_NR_DRAM_BANKS=1 5 | CONFIG_ENV_SIZE=0x20000 6 | CONFIG_SYS_LOAD_ADDR=0x80400000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_CMODEL_MEDANY=y 9 | CONFIG_RISCV_SMODE=y 10 | # CONFIG_RISCV_ISA_F is not set 11 | CONFIG_SHOW_REGS=y 12 | CONFIG_DISTRO_DEFAULTS=y 13 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 14 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 15 | CONFIG_FIT=y 16 | CONFIG_LOG_MAX_LEVEL=8 17 | CONFIG_LOG_DEFAULT_LEVEL=6 18 | CONFIG_DISPLAY_CPUINFO=y 19 | CONFIG_DISPLAY_BOARDINFO=y 20 | CONFIG_EVENT=y 21 | CONFIG_EVENT_DYNAMIC=y 22 | # CONFIG_BOOTM_NETBSD is not set 23 | # CONFIG_BOOTM_PLAN9 is not set 24 | # CONFIG_BOOTM_RTEMS is not set 25 | # CONFIG_BOOTM_VXWORKS is not set 26 | CONFIG_SYS_BOOTM_LEN=0x8000000 27 | CONFIG_CMD_LSBLK=y 28 | CONFIG_CMD_MTD=y 29 | CONFIG_CMD_SF_TEST=y 30 | CONFIG_CMD_SPI=y 31 | CONFIG_CMD_MTDPARTS=y 32 | CONFIG_CMD_LOG=y 33 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 34 | CONFIG_DM_MTD=y 35 | CONFIG_SPI_FLASH_ATMEL=y 36 | CONFIG_SPI_FLASH_EON=y 37 | CONFIG_SPI_FLASH_GIGADEVICE=y 38 | CONFIG_SPI_FLASH_MACRONIX=y 39 | CONFIG_SPI_FLASH_SPANSION=y 40 | CONFIG_SPI_FLASH_STMICRO=y 41 | CONFIG_SPI_FLASH_SST=y 42 | CONFIG_SPI_FLASH_WINBOND=y 43 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 44 | # CONFIG_NET is not set 45 | CONFIG_FAT_WRITE=y 46 | CONFIG_HEXDUMP=y 47 | # CONFIG_EFI_LOADER is not set 48 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv32imafdc_flash_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_TEXT_BASE=0x80400000 3 | CONFIG_SYS_MALLOC_LEN=0x800000 4 | CONFIG_NR_DRAM_BANKS=1 5 | CONFIG_ENV_SIZE=0x20000 6 | CONFIG_SYS_LOAD_ADDR=0x80400000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_CMODEL_MEDANY=y 9 | CONFIG_RISCV_SMODE=y 10 | CONFIG_SHOW_REGS=y 11 | CONFIG_DISTRO_DEFAULTS=y 12 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 13 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 14 | CONFIG_FIT=y 15 | CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 16 | CONFIG_LOG_MAX_LEVEL=8 17 | CONFIG_LOG_DEFAULT_LEVEL=6 18 | CONFIG_DISPLAY_CPUINFO=y 19 | CONFIG_DISPLAY_BOARDINFO=y 20 | CONFIG_EVENT=y 21 | CONFIG_EVENT_DYNAMIC=y 22 | # CONFIG_BOOTM_NETBSD is not set 23 | # CONFIG_BOOTM_PLAN9 is not set 24 | # CONFIG_BOOTM_RTEMS is not set 25 | # CONFIG_BOOTM_VXWORKS is not set 26 | CONFIG_SYS_BOOTM_LEN=0x8000000 27 | CONFIG_CMD_LSBLK=y 28 | CONFIG_CMD_MTD=y 29 | CONFIG_CMD_SF_TEST=y 30 | CONFIG_CMD_SPI=y 31 | CONFIG_CMD_MTDPARTS=y 32 | CONFIG_CMD_LOG=y 33 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 34 | CONFIG_DM_MTD=y 35 | CONFIG_SPI_FLASH_ATMEL=y 36 | CONFIG_SPI_FLASH_EON=y 37 | CONFIG_SPI_FLASH_GIGADEVICE=y 38 | CONFIG_SPI_FLASH_MACRONIX=y 39 | CONFIG_SPI_FLASH_SPANSION=y 40 | CONFIG_SPI_FLASH_STMICRO=y 41 | CONFIG_SPI_FLASH_SST=y 42 | CONFIG_SPI_FLASH_WINBOND=y 43 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 44 | # CONFIG_NET is not set 45 | CONFIG_FAT_WRITE=y 46 | CONFIG_HEXDUMP=y 47 | # CONFIG_EFI_LOADER is not set 48 | -------------------------------------------------------------------------------- /conf/evalsoc/uboot_rv32imac_flash_config: -------------------------------------------------------------------------------- 1 | CONFIG_RISCV=y 2 | CONFIG_TEXT_BASE=0x80400000 3 | CONFIG_SYS_MALLOC_LEN=0x800000 4 | CONFIG_NR_DRAM_BANKS=1 5 | CONFIG_ENV_SIZE=0x20000 6 | CONFIG_SYS_LOAD_ADDR=0x80400000 7 | CONFIG_TARGET_NUCLEI_GENERIC_SOC=y 8 | CONFIG_CMODEL_MEDANY=y 9 | CONFIG_RISCV_SMODE=y 10 | # CONFIG_RISCV_ISA_F is not set 11 | CONFIG_SHOW_REGS=y 12 | CONFIG_DISTRO_DEFAULTS=y 13 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y 14 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 15 | CONFIG_FIT=y 16 | CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 17 | CONFIG_LOG_MAX_LEVEL=8 18 | CONFIG_LOG_DEFAULT_LEVEL=6 19 | CONFIG_DISPLAY_CPUINFO=y 20 | CONFIG_DISPLAY_BOARDINFO=y 21 | CONFIG_EVENT=y 22 | CONFIG_EVENT_DYNAMIC=y 23 | # CONFIG_BOOTM_NETBSD is not set 24 | # CONFIG_BOOTM_PLAN9 is not set 25 | # CONFIG_BOOTM_RTEMS is not set 26 | # CONFIG_BOOTM_VXWORKS is not set 27 | CONFIG_SYS_BOOTM_LEN=0x8000000 28 | CONFIG_CMD_LSBLK=y 29 | CONFIG_CMD_MTD=y 30 | CONFIG_CMD_SF_TEST=y 31 | CONFIG_CMD_SPI=y 32 | CONFIG_CMD_MTDPARTS=y 33 | CONFIG_CMD_LOG=y 34 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y 35 | CONFIG_DM_MTD=y 36 | CONFIG_SPI_FLASH_ATMEL=y 37 | CONFIG_SPI_FLASH_EON=y 38 | CONFIG_SPI_FLASH_GIGADEVICE=y 39 | CONFIG_SPI_FLASH_MACRONIX=y 40 | CONFIG_SPI_FLASH_SPANSION=y 41 | CONFIG_SPI_FLASH_STMICRO=y 42 | CONFIG_SPI_FLASH_SST=y 43 | CONFIG_SPI_FLASH_WINBOND=y 44 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 45 | # CONFIG_NET is not set 46 | CONFIG_FAT_WRITE=y 47 | CONFIG_HEXDUMP=y 48 | # CONFIG_EFI_LOADER is not set 49 | -------------------------------------------------------------------------------- /conf/evalsoc/opensbi/evalsoc.c: -------------------------------------------------------------------------------- 1 | /* 2 | * SPDX-License-Identifier: BSD-2-Clause 3 | * 4 | * Copyright (c) 2023 Nuclei System Technology or its affiliates. 5 | * 6 | * Authors: 7 | * Huaqi Fang 8 | */ 9 | 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | static const struct fdt_match nuclei_evalsoc_match[] = { 16 | { .compatible = "nuclei,evalsoc" }, 17 | { .compatible = "nuclei,eval-soc" }, 18 | { }, 19 | }; 20 | 21 | static int nuclei_evalsoc_final_init(bool cold_boot, 22 | const struct fdt_match *match) 23 | { 24 | if (cold_boot) { // Add cold boot initial steps 25 | } 26 | 27 | // Check mcfg_info.tee to see whether tee present 28 | if (csr_read(0xfc2) & 0x1) { 29 | // Enable U-Mode to access all regions by setting spmpcfg0 and spmpaddr0 30 | csr_write(0x1a0, 0x1f); 31 | csr_write(0x1b0, 0xffffffff); 32 | } 33 | 34 | /* 35 | * If arch is rv32 or rv64 without svpbmt feature, you can use mattri to set ddr base:0xfd000000,size:0x10000 as non-cachable region. 36 | * xec dts node should contain desc_mem region from base:0xfd000000,size:0x10000; which is reserved region used to store xec descriptors. 37 | * if rv64 with svpbmt feature, xec dts node must not contain desc_mem property. 38 | */ 39 | #if __riscv_xlen == 32 40 | #define mattri1_base 0x7f5 41 | #define mattri1_mask 0x7f6 42 | 43 | csr_write(mattri1_mask, 0xffff0000); 44 | csr_write(mattri1_base, 0xfd000005); 45 | #endif 46 | 47 | return 0; 48 | } 49 | 50 | const struct platform_override nuclei_evalsoc = { 51 | .match_table = nuclei_evalsoc_match, 52 | .final_init = nuclei_evalsoc_final_init, 53 | }; 54 | -------------------------------------------------------------------------------- /conf/evalsoc/buildroot_initramfs_rv32imafdc_config: -------------------------------------------------------------------------------- 1 | BR2_riscv=y 2 | BR2_RISCV_32=y 3 | BR2_RISCV_ISA_RVC=y 4 | BR2_TOOLCHAIN_EXTERNAL=y 5 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM=y 6 | BR2_TOOLCHAIN_EXTERNAL_DOWNLOAD=y 7 | BR2_TOOLCHAIN_EXTERNAL_URL="https://download.nucleisys.com/upload/files/toolchain/linuxgcc/nuclei_riscv_glibc_prebuilt_linux64_2025.02.tar.bz2" 8 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="riscv64-unknown-linux-gnu" 9 | BR2_TOOLCHAIN_EXTERNAL_HEADERS_6_6=y 10 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y 11 | # BR2_TOOLCHAIN_EXTERNAL_INET_RPC is not set 12 | BR2_TOOLCHAIN_EXTERNAL_CXX=y 13 | BR2_TOOLCHAIN_EXTERNAL_FORTRAN=y 14 | BR2_TOOLCHAIN_EXTERNAL_OPENMP=y 15 | BR2_BACKUP_SITE="http://sources.buildroot.net" 16 | BR2_KERNEL_MIRROR="http://mirrors.163.com/kernel" 17 | BR2_GNU_MIRROR="https://mirrors.tuna.tsinghua.edu.cn/gnu" 18 | BR2_CPAN_MIRROR="https://mirrors.163.com/cpan" 19 | BR2_TARGET_GENERIC_HOSTNAME="nucleisys" 20 | BR2_TARGET_GENERIC_ISSUE="Welcome to Nuclei System Technology" 21 | BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y 22 | BR2_TARGET_GENERIC_ROOT_PASSWD="nuclei" 23 | BR2_SYSTEM_BIN_SH_BASH=y 24 | BR2_SYSTEM_DHCP="eth0" 25 | BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y 26 | BR2_PACKAGE_CACHE_CALIBRATOR=y 27 | BR2_PACKAGE_DUMA=y 28 | BR2_PACKAGE_MEMSTAT=y 29 | BR2_PACKAGE_RAMSMP=y 30 | BR2_PACKAGE_STRESS=y 31 | BR2_PACKAGE_DOSFSTOOLS=y 32 | BR2_PACKAGE_DOSFSTOOLS_FATLABEL=y 33 | BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y 34 | BR2_PACKAGE_DOSFSTOOLS_MKFS_FAT=y 35 | BR2_PACKAGE_F2FS_TOOLS=y 36 | BR2_PACKAGE_MMC_UTILS=y 37 | BR2_PACKAGE_MTD=y 38 | BR2_PACKAGE_MTD_FTL_CHECK=y 39 | BR2_PACKAGE_MTD_FTL_FORMAT=y 40 | BR2_PACKAGE_MTD_JFFS2DUMP=y 41 | BR2_PACKAGE_MTD_MKFSJFFS2=y 42 | BR2_PACKAGE_MTD_MTDPART=y 43 | BR2_PACKAGE_MINICOM=y 44 | BR2_PACKAGE_HAVEGED=y 45 | BR2_PACKAGE_ETHTOOL=y 46 | # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set 47 | -------------------------------------------------------------------------------- /conf/evalsoc/buildroot_initramfs_rv32imac_config: -------------------------------------------------------------------------------- 1 | BR2_riscv=y 2 | BR2_riscv_custom=y 3 | BR2_RISCV_ISA_RVM=y 4 | BR2_RISCV_ISA_RVA=y 5 | BR2_RISCV_ISA_RVC=y 6 | BR2_RISCV_32=y 7 | BR2_TOOLCHAIN_EXTERNAL=y 8 | BR2_TOOLCHAIN_EXTERNAL_DOWNLOAD=y 9 | BR2_TOOLCHAIN_EXTERNAL_URL="https://download.nucleisys.com/upload/files/toolchain/linuxgcc/nuclei_riscv_glibc_prebuilt_linux64_2025.02.tar.bz2" 10 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="riscv64-unknown-linux-gnu" 11 | BR2_TOOLCHAIN_EXTERNAL_HEADERS_6_6=y 12 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y 13 | # BR2_TOOLCHAIN_EXTERNAL_INET_RPC is not set 14 | BR2_TOOLCHAIN_EXTERNAL_CXX=y 15 | BR2_TOOLCHAIN_EXTERNAL_FORTRAN=y 16 | BR2_TOOLCHAIN_EXTERNAL_OPENMP=y 17 | BR2_BACKUP_SITE="http://sources.buildroot.net" 18 | BR2_KERNEL_MIRROR="http://mirrors.163.com/kernel" 19 | BR2_GNU_MIRROR="https://mirrors.tuna.tsinghua.edu.cn/gnu" 20 | BR2_CPAN_MIRROR="https://mirrors.163.com/cpan" 21 | BR2_TARGET_GENERIC_HOSTNAME="nucleisys" 22 | BR2_TARGET_GENERIC_ISSUE="Welcome to Nuclei System Technology" 23 | BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y 24 | BR2_TARGET_GENERIC_ROOT_PASSWD="nuclei" 25 | BR2_SYSTEM_BIN_SH_BASH=y 26 | BR2_SYSTEM_DHCP="eth0" 27 | BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y 28 | BR2_PACKAGE_CACHE_CALIBRATOR=y 29 | BR2_PACKAGE_DUMA=y 30 | BR2_PACKAGE_MEMSTAT=y 31 | BR2_PACKAGE_RAMSMP=y 32 | BR2_PACKAGE_STRESS=y 33 | BR2_PACKAGE_DOSFSTOOLS=y 34 | BR2_PACKAGE_DOSFSTOOLS_FATLABEL=y 35 | BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y 36 | BR2_PACKAGE_DOSFSTOOLS_MKFS_FAT=y 37 | BR2_PACKAGE_F2FS_TOOLS=y 38 | BR2_PACKAGE_MMC_UTILS=y 39 | BR2_PACKAGE_MTD=y 40 | BR2_PACKAGE_MTD_FTL_CHECK=y 41 | BR2_PACKAGE_MTD_FTL_FORMAT=y 42 | BR2_PACKAGE_MTD_JFFS2DUMP=y 43 | BR2_PACKAGE_MTD_MKFSJFFS2=y 44 | BR2_PACKAGE_MTD_MTDPART=y 45 | BR2_PACKAGE_MINICOM=y 46 | BR2_PACKAGE_HAVEGED=y 47 | BR2_PACKAGE_ETHTOOL=y 48 | # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set 49 | -------------------------------------------------------------------------------- /conf/evalsoc/buildroot_initramfs_rv64imafdc_config: -------------------------------------------------------------------------------- 1 | BR2_riscv=y 2 | BR2_RISCV_ISA_RVC=y 3 | BR2_TOOLCHAIN_EXTERNAL=y 4 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM=y 5 | BR2_TOOLCHAIN_EXTERNAL_DOWNLOAD=y 6 | BR2_TOOLCHAIN_EXTERNAL_URL="https://download.nucleisys.com/upload/files/toolchain/linuxgcc/nuclei_riscv_glibc_prebuilt_linux64_2025.02.tar.bz2" 7 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="riscv64-unknown-linux-gnu" 8 | BR2_TOOLCHAIN_EXTERNAL_HEADERS_6_6=y 9 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y 10 | # BR2_TOOLCHAIN_EXTERNAL_INET_RPC is not set 11 | BR2_TOOLCHAIN_EXTERNAL_CXX=y 12 | BR2_TOOLCHAIN_EXTERNAL_FORTRAN=y 13 | BR2_TOOLCHAIN_EXTERNAL_OPENMP=y 14 | BR2_BACKUP_SITE="http://sources.buildroot.net" 15 | BR2_KERNEL_MIRROR="http://mirrors.163.com/kernel" 16 | BR2_GNU_MIRROR="https://mirrors.tuna.tsinghua.edu.cn/gnu" 17 | BR2_CPAN_MIRROR="https://mirrors.163.com/cpan" 18 | BR2_TARGET_GENERIC_HOSTNAME="nucleisys" 19 | BR2_TARGET_GENERIC_ISSUE="Welcome to Nuclei System Technology" 20 | BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y 21 | BR2_TARGET_GENERIC_ROOT_PASSWD="nuclei" 22 | BR2_SYSTEM_BIN_SH_BASH=y 23 | BR2_SYSTEM_DHCP="eth0" 24 | BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y 25 | BR2_PACKAGE_CACHE_CALIBRATOR=y 26 | BR2_PACKAGE_DUMA=y 27 | BR2_PACKAGE_MEMSTAT=y 28 | BR2_PACKAGE_RAMSMP=y 29 | BR2_PACKAGE_STRACE=y 30 | BR2_PACKAGE_STRESS=y 31 | BR2_PACKAGE_STRESS_NG=y 32 | BR2_PACKAGE_DOSFSTOOLS=y 33 | BR2_PACKAGE_DOSFSTOOLS_FATLABEL=y 34 | BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y 35 | BR2_PACKAGE_DOSFSTOOLS_MKFS_FAT=y 36 | BR2_PACKAGE_F2FS_TOOLS=y 37 | BR2_PACKAGE_MMC_UTILS=y 38 | BR2_PACKAGE_MTD=y 39 | BR2_PACKAGE_MTD_FTL_CHECK=y 40 | BR2_PACKAGE_MTD_FTL_FORMAT=y 41 | BR2_PACKAGE_MTD_JFFS2DUMP=y 42 | BR2_PACKAGE_MTD_MKFSJFFS2=y 43 | BR2_PACKAGE_MTD_MTDPART=y 44 | BR2_PACKAGE_MINICOM=y 45 | BR2_PACKAGE_HAVEGED=y 46 | BR2_PACKAGE_ETHTOOL=y 47 | # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set 48 | -------------------------------------------------------------------------------- /conf/evalsoc/buildroot_initramfs_rv64imac_config: -------------------------------------------------------------------------------- 1 | BR2_riscv=y 2 | BR2_riscv_custom=y 3 | BR2_RISCV_ISA_RVM=y 4 | BR2_RISCV_ISA_RVA=y 5 | BR2_RISCV_ISA_RVC=y 6 | BR2_TOOLCHAIN_EXTERNAL=y 7 | BR2_TOOLCHAIN_EXTERNAL_DOWNLOAD=y 8 | BR2_TOOLCHAIN_EXTERNAL_URL="https://download.nucleisys.com/upload/files/toolchain/linuxgcc/nuclei_riscv_glibc_prebuilt_linux64_2025.02.tar.bz2" 9 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="riscv64-unknown-linux-gnu" 10 | BR2_TOOLCHAIN_EXTERNAL_HEADERS_6_6=y 11 | BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y 12 | # BR2_TOOLCHAIN_EXTERNAL_INET_RPC is not set 13 | BR2_TOOLCHAIN_EXTERNAL_CXX=y 14 | BR2_TOOLCHAIN_EXTERNAL_FORTRAN=y 15 | BR2_TOOLCHAIN_EXTERNAL_OPENMP=y 16 | BR2_BACKUP_SITE="http://sources.buildroot.net" 17 | BR2_KERNEL_MIRROR="http://mirrors.163.com/kernel" 18 | BR2_GNU_MIRROR="https://mirrors.tuna.tsinghua.edu.cn/gnu" 19 | BR2_CPAN_MIRROR="https://mirrors.163.com/cpan" 20 | BR2_TARGET_GENERIC_HOSTNAME="nucleisys" 21 | BR2_TARGET_GENERIC_ISSUE="Welcome to Nuclei System Technology" 22 | BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y 23 | BR2_TARGET_GENERIC_ROOT_PASSWD="nuclei" 24 | BR2_SYSTEM_BIN_SH_BASH=y 25 | BR2_SYSTEM_DHCP="eth0" 26 | BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y 27 | BR2_PACKAGE_CACHE_CALIBRATOR=y 28 | BR2_PACKAGE_DUMA=y 29 | BR2_PACKAGE_MEMSTAT=y 30 | BR2_PACKAGE_RAMSMP=y 31 | BR2_PACKAGE_STRACE=y 32 | BR2_PACKAGE_STRESS=y 33 | BR2_PACKAGE_STRESS_NG=y 34 | BR2_PACKAGE_DOSFSTOOLS=y 35 | BR2_PACKAGE_DOSFSTOOLS_FATLABEL=y 36 | BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y 37 | BR2_PACKAGE_DOSFSTOOLS_MKFS_FAT=y 38 | BR2_PACKAGE_F2FS_TOOLS=y 39 | BR2_PACKAGE_MMC_UTILS=y 40 | BR2_PACKAGE_MTD=y 41 | BR2_PACKAGE_MTD_FTL_CHECK=y 42 | BR2_PACKAGE_MTD_FTL_FORMAT=y 43 | BR2_PACKAGE_MTD_JFFS2DUMP=y 44 | BR2_PACKAGE_MTD_MKFSJFFS2=y 45 | BR2_PACKAGE_MTD_MTDPART=y 46 | BR2_PACKAGE_MINICOM=y 47 | BR2_PACKAGE_HAVEGED=y 48 | BR2_PACKAGE_ETHTOOL=y 49 | # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set 50 | -------------------------------------------------------------------------------- /.github/build_multiple_freeloader.sh: -------------------------------------------------------------------------------- 1 | #!/bin/env bash 2 | 3 | SCRIPTDIR=$(dirname $(readlink -f $BASH_SOURCE)) 4 | SCRIPTDIR=$(readlink -f $SCRIPTDIR) 5 | 6 | SOC=${SOC:-evalsoc} 7 | CORE=${CORE:-ux900fd} 8 | BOOT_MODE=${BOOT_MODE:-sd} 9 | SELVAR0=${SELVAR0:-CPU_HZ} 10 | VARLIST0=${VARLIST0:-"16000000,50000000"} 11 | SELVAR1=${SELVAR1:-SPFL1DCTRL1} 12 | VARLIST1=${VARLIST1:-"0x0"} 13 | GITSHA=${GITSHA:-$(git describe --always)} 14 | MAKEOPTS=${MAKEOPTS:-""} 15 | DRYRUN=${DRYRUN:-0} 16 | SHARELOC=${SHARELOC:-/home/xl_ci/linuxsdk} 17 | 18 | # eval MAKEOPTS to overwrite variable of SOC/CORE/BOOT_MODE 19 | if [ "x$MAKEOPTS" != "x" ] ; then 20 | echo "MAKEOPTS=$MAKEOPTS" 21 | eval export $MAKEOPTS 22 | fi 23 | 24 | echo "Git commit is $GITSHA" 25 | 26 | if [[ "$CI_JOB_ID" =~ ^[0-9]+$ ]] ; then 27 | echo "Create sync directory" 28 | SYNCDIR=$SHARELOC/$GITSHA 29 | mkdir -p $SYNCDIR 30 | fi 31 | 32 | source $SCRIPTDIR/utils.sh 33 | 34 | for var0 in ${VARLIST0//,/ } 35 | do 36 | for var1 in ${VARLIST1//,/ } 37 | do 38 | echo "Build freeloader for $MAKEOPTS $SELVAR0=$var0 $SELVAR1=$var1" 39 | eval export $SELVAR0=$var0 $SELVAR1=$var1 40 | # get freeloader and boot zip suffix 41 | gen_dstimg_names 42 | frldelf=work/${SOC}/${dstfldname} 43 | runcmd="make freeloader && cp -f work/${SOC}/freeloader/freeloader.elf ${frldelf}" 44 | echo $runcmd 45 | if [ "x$DRYRUN" == "x0" ] ; then 46 | prepare_dts 47 | eval $runcmd 48 | reset_dts 49 | fi 50 | unset $SELVAR0 $SELVAR1 51 | if [ "x$SYNCDIR" != "x" ] ; then 52 | echo "Sync freeloader $frldelf to ${SYNCDIR}" 53 | cp -f $frldelf $SYNCDIR/ 54 | fi 55 | done 56 | done 57 | 58 | if [ "x$SYNCDIR" != "x" ] && [ "x$DRYRUN" == "x0" ] ; then 59 | link_latest_freeloader 60 | fi 61 | 62 | exit 0 63 | -------------------------------------------------------------------------------- /conf/evalsoc/preramfs.sh: -------------------------------------------------------------------------------- 1 | #!/bin/env bash 2 | 3 | SOCCONF_DIR=$1 4 | ROOTFS_DIR=$2 5 | COPYLIST=$3 6 | 7 | RED='\e[31m' 8 | GREEN='\e[32m' 9 | YELLOW='\e[33m' 10 | BLUE='\e[34m' 11 | RESET='\e[0m' 12 | 13 | if [ "$#" -lt 2 ]; then 14 | echo -e "${RED}Usage: $0 [Copy File List]${RESET}" 15 | exit 1 16 | fi 17 | 18 | echo -e "${YELLOW}SOC Configuration Directory is ${SOCCONF_DIR}${RESET}" 19 | echo -e "${YELLOW}Rootfs Directory is ${ROOTFS_DIR}${RESET}" 20 | 21 | function copy_files() { 22 | local copyfl=$1 23 | if [ "x$copyfl" == "x" ] ; then 24 | echo -e ${RED}"No copy file list specified${RESET}" 25 | return 26 | fi 27 | if [ ! -f $copyfl ] ; then 28 | copyfl=${SOCCONF_DIR}/${copyfl} 29 | if [ ! -f $copyfl ] ; then 30 | echo -e "${RED}Can't find $copyfl, please check!${RESET}" 31 | return 32 | fi 33 | fi 34 | echo -e "${YELLOW}Will use $(readlink -f ${copyfl})${RESET}" 35 | while read -r src dst || [[ -n "$src" ]] 36 | do 37 | if [ "x$src" == "x" ] ; then 38 | continue 39 | fi 40 | if [ "x$dst" == "x" ] ; then 41 | dst=root 42 | fi 43 | if [[ ! -f $src ]] && [[ ! -d $src ]]; then 44 | src=${SOCCONF_DIR}/$src 45 | if [[ ! -f $src ]] && [[ ! -d $src ]]; then 46 | continue 47 | fi 48 | fi 49 | dstdir=${ROOTFS_DIR}/$dst 50 | mkdir -p $dstdir 51 | echo -e "${BLUE}Copy $src to $dstdir${RESET}" 52 | if [ -f $src ] ; then 53 | cp -f $src $dstdir 54 | else 55 | cp -rf $src $dstdir 56 | fi 57 | done < $copyfl 58 | } 59 | 60 | # do copy files specified in $COPYLIST 61 | # $COPYLIST is a file, format as follow 62 | # src dst 63 | copy_files $COPYLIST 64 | 65 | # TODO: You can add your extra operations here 66 | 67 | exit 0 68 | -------------------------------------------------------------------------------- /.github/workflows/docker.yml: -------------------------------------------------------------------------------- 1 | name: Build Linux SDK Docker Image 2 | 3 | # auto cancel previous in-progress job 4 | concurrency: 5 | group: ${{ github.workflow }}-${{ github.ref }} 6 | cancel-in-progress: true 7 | 8 | on: 9 | push: 10 | branches: [ dev* ] 11 | paths-ignore: 12 | - README.md 13 | - LICENSE 14 | - .gitlab-ci.yml 15 | - .gitignore 16 | pull_request: 17 | branches: [ dev* ] 18 | 19 | jobs: 20 | 21 | # This workflow contains a single job called "build" 22 | build: 23 | name: build docker image 24 | runs-on: ubuntu-latest 25 | 26 | # Steps represent a sequence of tasks that will be executed as part of the job 27 | steps: 28 | # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it 29 | - name: Checkout Linux SDK Code 30 | uses: actions/checkout@v4 31 | with: 32 | submodules: false 33 | 34 | - name: Build Docker Image 35 | run: | 36 | cd .github 37 | docker build . -f linuxsdk.Dockerfile -t linuxsdk:${{github.ref_name}} --build-arg BRANCH=${{github.ref_name}} 38 | docker images 39 | 40 | - name: Test Docker Image 41 | if: ${{ startsWith(github.ref_name, 'dev_') && github.event_name != 'pull_request' }} 42 | run: | 43 | docker run -i linuxsdk:${{github.ref_name}} bash run_qemu.sh 44 | 45 | - name: Publish Docker Image 46 | if: ${{ github.event_name != 'pull_request' }} 47 | run: | 48 | echo "Login to docker hub" 49 | docker login -u ${{ secrets.DOCKER_USER }} -p ${{ secrets.DOCKER_PWD }} docker.io 50 | DOCKER_REPO=docker.io/nucleisoftware/linuxsdk 51 | docker tag linuxsdk:${{github.ref_name}} ${DOCKER_REPO}:${{github.ref_name}} 52 | docker push ${DOCKER_REPO}:${{github.ref_name}} 53 | echo "Docker image is pushed to https://hub.docker.com/r/nucleisoftware/linuxsdk , tag ${{github.ref_name}}" 54 | -------------------------------------------------------------------------------- /.github/linuxsdk.Dockerfile: -------------------------------------------------------------------------------- 1 | FROM ubuntu:20.04 as base 2 | LABEL maintainer = "Huaqi Fang " 3 | 4 | ENV DEBIAN_FRONTEND=noninteractive 5 | 6 | # Certificate verification failed: The certificate is NOT trusted. The certificate issuer is unknown. 7 | # https://github.com/tuna/issues/issues/1342 8 | RUN apt update 9 | RUN apt install -y libgnutls30 ca-certificates 10 | 11 | # Don't copy source list for github ci build docker 12 | #COPY ubuntu20.04.list /etc/apt/sources.list 13 | 14 | RUN apt update && apt upgrade -y 15 | 16 | COPY apt.txt /home/ 17 | 18 | RUN xargs apt install -y < /home/apt.txt 19 | 20 | RUN rm -f /home/apt.txt 21 | 22 | RUN ln -s /lib/x86_64-linux-gnu/libgmp.so /lib/x86_64-linux-gnu/libgmp.so.3 23 | 24 | COPY pipreq.txt /home/ 25 | 26 | RUN pip3 install -U pip 27 | 28 | RUN pip install -r /home/pipreq.txt 29 | 30 | RUN rm -f /home/pipreq.txt 31 | 32 | # Cleanup apt/pip cache 33 | RUN apt autoclean 34 | RUN apt clean 35 | RUN pip3 cache purge 36 | 37 | # create USER with PASS 38 | ARG USER=nuclei 39 | ARG PASS=riscv123 40 | ARG QEMUVER=2025.02 41 | ARG BRANCH=dev_nuclei_next 42 | 43 | RUN groupadd --system $USER 44 | 45 | RUN useradd -rm -d /home/$USER -s /bin/bash -g $USER -G sudo -u 1001 $USER 46 | 47 | RUN echo "$USER:$PASS" | chpasswd 48 | 49 | USER $USER 50 | 51 | WORKDIR /home/$USER/ 52 | 53 | RUN mkdir -p prebuilt 54 | 55 | RUN wget -q https://download.nucleisys.com/upload/files/toolchain/qemu/nuclei-qemu-$QEMUVER-linux-x64.tar.gz -O prebuilt/nuclei-qemu.tar.gz 56 | 57 | RUN cd prebuilt && tar --no-same-owner -xzf nuclei-qemu.tar.gz 58 | 59 | ENV PATH "/home/$USER/prebuilt/qemu/bin:$PATH" 60 | 61 | RUN ldd `which qemu-system-riscv64` 62 | 63 | # do shallow clone for main repo 64 | RUN git clone --depth 5 -b $BRANCH https://github.com/Nuclei-Software/nuclei-linux-sdk 65 | 66 | # gitee mirror no longer works 67 | #RUN cd nuclei-linux-sdk && git remote add gitee https://gitee.com/Nuclei-Software/nuclei-linux-sdk 68 | 69 | # only do shallow clone for submodule to reduce clone size 70 | RUN cd nuclei-linux-sdk && git submodule init && git submodule update --recursive --init --depth 5 71 | 72 | RUN cd nuclei-linux-sdk && make freeloader bootimages 73 | 74 | COPY run_qemu.sh /home/$USER 75 | 76 | CMD [ "/bin/bash" ] 77 | -------------------------------------------------------------------------------- /.github/utils.sh: -------------------------------------------------------------------------------- 1 | #!/bin/env bash 2 | 3 | function gen_dstimg_names() { 4 | dstfldname=freeloader_${GITSHA}_${SOC}_${CORE}_${BOOT_MODE} 5 | dstbootzipname=boot_${GITSHA}_${SOC}_${CORE}_${BOOT_MODE} 6 | if [[ "$CI_JOB_ID" =~ ^[0-9]+$ ]] ; then 7 | dstfldname=${dstfldname}_job${CI_JOB_ID} 8 | dstbootzipname=${dstbootzipname}_job${CI_JOB_ID} 9 | fi 10 | 11 | if [ "x$CPU_HZ" != "x" ] ; then 12 | dstfldname=${dstfldname}_${CPU_HZ}Hz 13 | dstbootzipname=${dstbootzipname}_${CPU_HZ}Hz 14 | fi 15 | 16 | if [ "x$EXT_SSTC" == "xy" ] ; then 17 | dstfldname=${dstfldname}_sstc 18 | dstbootzipname=${dstbootzipname}_sstc 19 | fi 20 | 21 | if [ "x$HVC_CONSOLE" == "xy" ] ; then 22 | dstfldname=${dstfldname}_hvc 23 | dstbootzipname=${dstbootzipname}_hvc 24 | fi 25 | 26 | if [ "x$CACHE_CTRL" != "x" ] ; then 27 | dstfldname=${dstfldname}_l1-${CACHE_CTRL} 28 | fi 29 | 30 | if [ "x$TLB_CTRL" != "x" ] ; then 31 | dstfldname=${dstfldname}_tlb-${TLB_CTRL} 32 | fi 33 | 34 | if [ "x$ENABLE_SMP" != "x" ] ; then 35 | dstfldname=${dstfldname}_smp-${ENABLE_SMP} 36 | fi 37 | 38 | if [ "x$ENABLE_L2" != "x" ] ; then 39 | dstfldname=${dstfldname}_l2-${ENABLE_L2} 40 | fi 41 | 42 | if [ "x$MCACHE_CTL" != "x" ] ; then 43 | dstfldname=${dstfldname}_mcachectl-${MCACHE_CTL} 44 | fi 45 | 46 | if [ "x$MTLB_CTL" != "x" ] ; then 47 | dstfldname=${dstfldname}_mtlbctl-${MTLB_CTL} 48 | fi 49 | 50 | if [ "x$MMISC_CTL" != "x" ] ; then 51 | dstfldname=${dstfldname}_mmiscctl-${MMISC_CTL} 52 | fi 53 | 54 | if [ "x$SPFL1DCTRL1" != "x" ] ; then 55 | dstfldname=${dstfldname}_pfl1dc1-${SPFL1DCTRL1} 56 | fi 57 | 58 | if [ "x$SPFL1DCTRL2" != "x" ] ; then 59 | dstfldname=${dstfldname}_pfl1dc2-${SPFL1DCTRL2} 60 | fi 61 | 62 | if [ "x$MERGL1DCTRL" != "x" ] ; then 63 | dstfldname=${dstfldname}_mgl1dc-${MERGL1DCTRL} 64 | fi 65 | 66 | if [ "x$SIMULATION" != "x" ] && [ "x$SIMULATION" != "x0" ] ; then 67 | dstfldname=${dstfldname}_sim 68 | fi 69 | dstfldname=${dstfldname}.elf 70 | dstbootzipname=${dstbootzipname}.zip 71 | } 72 | 73 | function get_arch() { 74 | local arch=rv64imac 75 | if echo "$CORE" | grep -q "fd" > /dev/null ; then 76 | arch=rv64imafdc 77 | fi 78 | echo $arch 79 | } 80 | 81 | function replace_dts() { 82 | local arch=$1 83 | local old=$2 84 | local new=$3 85 | local dts=conf/${SOC}/nuclei_${arch}.dts 86 | echo "Replace $dts from $old to $new" 87 | sed -i "s/$old/$new/g" $dts 88 | } 89 | 90 | function prepare_sstc_dts() { 91 | local arch=$(get_arch) 92 | replace_dts $arch $arch ${arch}_sstc 93 | } 94 | 95 | function prepare_hvc_console_dts() { 96 | local arch=$(get_arch) 97 | replace_dts $arch ttyNUC0 hvc0 98 | } 99 | 100 | function prepare_dts() { 101 | if [ "x${EXT_SSTC}" == "xy" ] ; then 102 | prepare_sstc_dts 103 | fi 104 | if [ "x${HVC_CONSOLE}" == "xy" ] ; then 105 | prepare_hvc_console_dts 106 | fi 107 | } 108 | 109 | function reset_dts() { 110 | local arch=$(get_arch) 111 | local dts=conf/${SOC}/nuclei_${arch}.dts 112 | # if modified, then reset to default version 113 | if git status -s $dts | grep dts > /dev/null 2>&1 ; then 114 | echo "Reset dts $dts to unmodified version in git" 115 | git checkout -- $dts 116 | else 117 | echo "No need to reset dts $dts" 118 | fi 119 | } 120 | 121 | function link_latest_freeloader() { 122 | local tag=latest 123 | if [ "x${CI_COMMIT_BRANCH}" == "x" ] ; then 124 | echo "Maybe a tag commit or merge request commit, ignore it!" 125 | return 126 | fi 127 | if [ "x${CI_COMMIT_BRANCH}" == "xdev_nuclei_6.1" ] ; then 128 | tag=latest_6.1 129 | elif [ "x${CI_COMMIT_BRANCH}" != "xdev_nuclei_next" ] ; then 130 | tag=$CI_COMMIT_REF_SLUG 131 | fi 132 | echo "Link $tag to $SYNCDIR for ${CI_COMMIT_BRANCH}" 133 | rm -f $SHARELOC/$tag 134 | pushd $SHARELOC 135 | ln -s $GITSHA $tag 136 | } 137 | -------------------------------------------------------------------------------- /conf/evalsoc/linux_rv64imac_defconfig: -------------------------------------------------------------------------------- 1 | # CONFIG_LOCALVERSION_AUTO is not set 2 | CONFIG_DEFAULT_HOSTNAME="nucleisys" 3 | CONFIG_SYSVIPC=y 4 | # CONFIG_CROSS_MEMORY_ATTACH is not set 5 | CONFIG_CGROUPS=y 6 | CONFIG_NAMESPACES=y 7 | CONFIG_USER_NS=y 8 | CONFIG_BLK_DEV_INITRD=y 9 | # CONFIG_RD_BZIP2 is not set 10 | # CONFIG_RD_LZMA is not set 11 | # CONFIG_RD_XZ is not set 12 | # CONFIG_RD_LZO is not set 13 | CONFIG_EXPERT=y 14 | # CONFIG_KALLSYMS is not set 15 | CONFIG_NONPORTABLE=y 16 | CONFIG_SMP=y 17 | CONFIG_HZ_100=y 18 | CONFIG_RISCV_SBI_V01=y 19 | # CONFIG_RISCV_BOOT_SPINWAIT is not set 20 | CONFIG_CMDLINE="earlyprintk" 21 | CONFIG_MODULES=y 22 | CONFIG_MODULE_UNLOAD=y 23 | CONFIG_MODVERSIONS=y 24 | # CONFIG_COMPACTION is not set 25 | CONFIG_NET=y 26 | CONFIG_PACKET=y 27 | CONFIG_UNIX=y 28 | CONFIG_UNIX_DIAG=y 29 | CONFIG_TLS=y 30 | CONFIG_INET=y 31 | CONFIG_NETFILTER=y 32 | CONFIG_NETLINK_DIAG=y 33 | # CONFIG_WIRELESS is not set 34 | CONFIG_FAILOVER=y 35 | CONFIG_DEVTMPFS=y 36 | CONFIG_DEVTMPFS_MOUNT=y 37 | CONFIG_MTD=y 38 | CONFIG_MTD_CMDLINE_PARTS=y 39 | CONFIG_MTD_BLOCK=y 40 | CONFIG_FTL=y 41 | CONFIG_MTD_CFI=y 42 | CONFIG_MTD_SPI_NOR=y 43 | CONFIG_OF_OVERLAY=y 44 | CONFIG_BLK_DEV_LOOP=y 45 | CONFIG_BLK_DEV_RAM=y 46 | CONFIG_NETDEVICES=y 47 | # CONFIG_NET_VENDOR_ALACRITECH is not set 48 | # CONFIG_NET_VENDOR_AMAZON is not set 49 | # CONFIG_NET_VENDOR_AQUANTIA is not set 50 | # CONFIG_NET_VENDOR_ARC is not set 51 | # CONFIG_NET_VENDOR_ASIX is not set 52 | # CONFIG_NET_VENDOR_BROADCOM is not set 53 | # CONFIG_NET_VENDOR_CADENCE is not set 54 | # CONFIG_NET_VENDOR_CAVIUM is not set 55 | # CONFIG_NET_VENDOR_CORTINA is not set 56 | # CONFIG_NET_VENDOR_DAVICOM is not set 57 | # CONFIG_NET_VENDOR_ENGLEDER is not set 58 | # CONFIG_NET_VENDOR_EZCHIP is not set 59 | # CONFIG_NET_VENDOR_FUNGIBLE is not set 60 | # CONFIG_NET_VENDOR_GOOGLE is not set 61 | # CONFIG_NET_VENDOR_HUAWEI is not set 62 | # CONFIG_NET_VENDOR_INTEL is not set 63 | # CONFIG_NET_VENDOR_ADI is not set 64 | # CONFIG_NET_VENDOR_LITEX is not set 65 | # CONFIG_NET_VENDOR_MARVELL is not set 66 | # CONFIG_NET_VENDOR_MICREL is not set 67 | # CONFIG_NET_VENDOR_MICROCHIP is not set 68 | # CONFIG_NET_VENDOR_MICROSEMI is not set 69 | # CONFIG_NET_VENDOR_MICROSOFT is not set 70 | # CONFIG_NET_VENDOR_NI is not set 71 | # CONFIG_NET_VENDOR_NATSEMI is not set 72 | # CONFIG_NET_VENDOR_NETRONOME is not set 73 | CONFIG_NUCLEI_XEC=y 74 | # CONFIG_NET_VENDOR_PENSANDO is not set 75 | # CONFIG_NET_VENDOR_QUALCOMM is not set 76 | # CONFIG_NET_VENDOR_RENESAS is not set 77 | # CONFIG_NET_VENDOR_ROCKER is not set 78 | # CONFIG_NET_VENDOR_SAMSUNG is not set 79 | # CONFIG_NET_VENDOR_SEEQ is not set 80 | # CONFIG_NET_VENDOR_SOLARFLARE is not set 81 | # CONFIG_NET_VENDOR_SOCIONEXT is not set 82 | # CONFIG_NET_VENDOR_STMICRO is not set 83 | # CONFIG_NET_VENDOR_SYNOPSYS is not set 84 | # CONFIG_NET_VENDOR_VERTEXCOM is not set 85 | # CONFIG_NET_VENDOR_VIA is not set 86 | # CONFIG_NET_VENDOR_WANGXUN is not set 87 | # CONFIG_NET_VENDOR_WIZNET is not set 88 | # CONFIG_NET_VENDOR_XILINX is not set 89 | # CONFIG_WLAN is not set 90 | # CONFIG_INPUT_KEYBOARD is not set 91 | # CONFIG_INPUT_MOUSE is not set 92 | # CONFIG_VT is not set 93 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 94 | CONFIG_SERIAL_NUCLEI=y 95 | CONFIG_SERIAL_NUCLEI_CONSOLE=y 96 | CONFIG_HVC_RISCV_SBI=y 97 | # CONFIG_HW_RANDOM is not set 98 | CONFIG_SPI=y 99 | CONFIG_SPI_NUCLEI=y 100 | CONFIG_SPI_SPIDEV=y 101 | CONFIG_PINCTRL=y 102 | CONFIG_GPIOLIB=y 103 | CONFIG_GPIO_SYSFS=y 104 | CONFIG_GPIO_NUCLEI=y 105 | # CONFIG_HWMON is not set 106 | # CONFIG_HID_SUPPORT is not set 107 | # CONFIG_USB_SUPPORT is not set 108 | CONFIG_MMC=y 109 | CONFIG_MMC_SPI=y 110 | # CONFIG_VIRTIO_MENU is not set 111 | # CONFIG_VHOST_MENU is not set 112 | # CONFIG_IOMMU_SUPPORT is not set 113 | # CONFIG_NVMEM is not set 114 | CONFIG_EXT4_FS=y 115 | CONFIG_EXT4_FS_POSIX_ACL=y 116 | CONFIG_AUTOFS_FS=y 117 | CONFIG_MSDOS_FS=y 118 | CONFIG_VFAT_FS=y 119 | CONFIG_EXFAT_FS=y 120 | CONFIG_TMPFS=y 121 | CONFIG_TMPFS_POSIX_ACL=y 122 | CONFIG_EFIVAR_FS=y 123 | CONFIG_NLS_CODEPAGE_437=y 124 | CONFIG_NLS_ISO8859_1=y 125 | CONFIG_CRYPTO_USER=y 126 | CONFIG_CRYPTO_AUTHENC=y 127 | CONFIG_CRYPTO_RSA=y 128 | CONFIG_CRYPTO_CBC=y 129 | CONFIG_CRYPTO_SEQIV=y 130 | CONFIG_CRYPTO_ECHAINIV=y 131 | CONFIG_CRYPTO_SHA256=y 132 | CONFIG_CRYPTO_CRC32=y 133 | CONFIG_CRYPTO_DEFLATE=y 134 | CONFIG_CRYPTO_USER_API_HASH=y 135 | CONFIG_CRYPTO_USER_API_RNG=y 136 | CONFIG_PRINTK_TIME=y 137 | # CONFIG_DEBUG_MISC is not set 138 | # CONFIG_SLUB_DEBUG is not set 139 | # CONFIG_RCU_TRACE is not set 140 | # CONFIG_FTRACE is not set 141 | # CONFIG_RUNTIME_TESTING_MENU is not set 142 | -------------------------------------------------------------------------------- /conf/evalsoc/linux_rv64imafdc_defconfig: -------------------------------------------------------------------------------- 1 | # CONFIG_LOCALVERSION_AUTO is not set 2 | CONFIG_DEFAULT_HOSTNAME="nucleisys" 3 | CONFIG_SYSVIPC=y 4 | # CONFIG_CROSS_MEMORY_ATTACH is not set 5 | CONFIG_CGROUPS=y 6 | CONFIG_NAMESPACES=y 7 | CONFIG_USER_NS=y 8 | CONFIG_BLK_DEV_INITRD=y 9 | # CONFIG_RD_BZIP2 is not set 10 | # CONFIG_RD_LZMA is not set 11 | # CONFIG_RD_XZ is not set 12 | # CONFIG_RD_LZO is not set 13 | CONFIG_EXPERT=y 14 | # CONFIG_KALLSYMS is not set 15 | CONFIG_NONPORTABLE=y 16 | CONFIG_SMP=y 17 | CONFIG_HZ_100=y 18 | CONFIG_RISCV_SBI_V01=y 19 | # CONFIG_RISCV_BOOT_SPINWAIT is not set 20 | CONFIG_CMDLINE="earlyprintk" 21 | CONFIG_MODULES=y 22 | CONFIG_MODULE_UNLOAD=y 23 | CONFIG_MODVERSIONS=y 24 | # CONFIG_COMPACTION is not set 25 | CONFIG_NET=y 26 | CONFIG_PACKET=y 27 | CONFIG_UNIX=y 28 | CONFIG_UNIX_DIAG=y 29 | CONFIG_TLS=y 30 | CONFIG_INET=y 31 | CONFIG_NETFILTER=y 32 | CONFIG_NETLINK_DIAG=y 33 | # CONFIG_WIRELESS is not set 34 | CONFIG_FAILOVER=y 35 | CONFIG_DEVTMPFS=y 36 | CONFIG_DEVTMPFS_MOUNT=y 37 | CONFIG_MTD=y 38 | CONFIG_MTD_CMDLINE_PARTS=y 39 | CONFIG_MTD_BLOCK=y 40 | CONFIG_FTL=y 41 | CONFIG_MTD_CFI=y 42 | CONFIG_MTD_SPI_NOR=y 43 | CONFIG_OF_OVERLAY=y 44 | CONFIG_BLK_DEV_LOOP=y 45 | CONFIG_BLK_DEV_RAM=y 46 | CONFIG_NETDEVICES=y 47 | # CONFIG_NET_VENDOR_ALACRITECH is not set 48 | # CONFIG_NET_VENDOR_AMAZON is not set 49 | # CONFIG_NET_VENDOR_AQUANTIA is not set 50 | # CONFIG_NET_VENDOR_ARC is not set 51 | # CONFIG_NET_VENDOR_ASIX is not set 52 | # CONFIG_NET_VENDOR_BROADCOM is not set 53 | # CONFIG_NET_VENDOR_CADENCE is not set 54 | # CONFIG_NET_VENDOR_CAVIUM is not set 55 | # CONFIG_NET_VENDOR_CORTINA is not set 56 | # CONFIG_NET_VENDOR_DAVICOM is not set 57 | # CONFIG_NET_VENDOR_ENGLEDER is not set 58 | # CONFIG_NET_VENDOR_EZCHIP is not set 59 | # CONFIG_NET_VENDOR_FUNGIBLE is not set 60 | # CONFIG_NET_VENDOR_GOOGLE is not set 61 | # CONFIG_NET_VENDOR_HUAWEI is not set 62 | # CONFIG_NET_VENDOR_INTEL is not set 63 | # CONFIG_NET_VENDOR_ADI is not set 64 | # CONFIG_NET_VENDOR_LITEX is not set 65 | # CONFIG_NET_VENDOR_MARVELL is not set 66 | # CONFIG_NET_VENDOR_MICREL is not set 67 | # CONFIG_NET_VENDOR_MICROCHIP is not set 68 | # CONFIG_NET_VENDOR_MICROSEMI is not set 69 | # CONFIG_NET_VENDOR_MICROSOFT is not set 70 | # CONFIG_NET_VENDOR_NI is not set 71 | # CONFIG_NET_VENDOR_NATSEMI is not set 72 | # CONFIG_NET_VENDOR_NETRONOME is not set 73 | CONFIG_NUCLEI_XEC=y 74 | # CONFIG_NET_VENDOR_PENSANDO is not set 75 | # CONFIG_NET_VENDOR_QUALCOMM is not set 76 | # CONFIG_NET_VENDOR_RENESAS is not set 77 | # CONFIG_NET_VENDOR_ROCKER is not set 78 | # CONFIG_NET_VENDOR_SAMSUNG is not set 79 | # CONFIG_NET_VENDOR_SEEQ is not set 80 | # CONFIG_NET_VENDOR_SOLARFLARE is not set 81 | # CONFIG_NET_VENDOR_SOCIONEXT is not set 82 | # CONFIG_NET_VENDOR_STMICRO is not set 83 | # CONFIG_NET_VENDOR_SYNOPSYS is not set 84 | # CONFIG_NET_VENDOR_VERTEXCOM is not set 85 | # CONFIG_NET_VENDOR_VIA is not set 86 | # CONFIG_NET_VENDOR_WANGXUN is not set 87 | # CONFIG_NET_VENDOR_WIZNET is not set 88 | # CONFIG_NET_VENDOR_XILINX is not set 89 | # CONFIG_WLAN is not set 90 | # CONFIG_INPUT_KEYBOARD is not set 91 | # CONFIG_INPUT_MOUSE is not set 92 | # CONFIG_VT is not set 93 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 94 | CONFIG_SERIAL_NUCLEI=y 95 | CONFIG_SERIAL_NUCLEI_CONSOLE=y 96 | CONFIG_HVC_RISCV_SBI=y 97 | # CONFIG_HW_RANDOM is not set 98 | CONFIG_SPI=y 99 | CONFIG_SPI_NUCLEI=y 100 | CONFIG_SPI_SPIDEV=y 101 | CONFIG_PINCTRL=y 102 | CONFIG_GPIOLIB=y 103 | CONFIG_GPIO_SYSFS=y 104 | CONFIG_GPIO_NUCLEI=y 105 | # CONFIG_HWMON is not set 106 | # CONFIG_HID_SUPPORT is not set 107 | # CONFIG_USB_SUPPORT is not set 108 | CONFIG_MMC=y 109 | CONFIG_MMC_SPI=y 110 | # CONFIG_VIRTIO_MENU is not set 111 | # CONFIG_VHOST_MENU is not set 112 | # CONFIG_IOMMU_SUPPORT is not set 113 | # CONFIG_NVMEM is not set 114 | CONFIG_EXT4_FS=y 115 | CONFIG_EXT4_FS_POSIX_ACL=y 116 | CONFIG_AUTOFS_FS=y 117 | CONFIG_MSDOS_FS=y 118 | CONFIG_VFAT_FS=y 119 | CONFIG_EXFAT_FS=y 120 | CONFIG_TMPFS=y 121 | CONFIG_TMPFS_POSIX_ACL=y 122 | CONFIG_EFIVAR_FS=y 123 | CONFIG_NLS_CODEPAGE_437=y 124 | CONFIG_NLS_ISO8859_1=y 125 | CONFIG_CRYPTO_USER=y 126 | CONFIG_CRYPTO_AUTHENC=y 127 | CONFIG_CRYPTO_RSA=y 128 | CONFIG_CRYPTO_CBC=y 129 | CONFIG_CRYPTO_SEQIV=y 130 | CONFIG_CRYPTO_ECHAINIV=y 131 | CONFIG_CRYPTO_SHA256=y 132 | CONFIG_CRYPTO_CRC32=y 133 | CONFIG_CRYPTO_DEFLATE=y 134 | CONFIG_CRYPTO_USER_API_HASH=y 135 | CONFIG_CRYPTO_USER_API_RNG=y 136 | CONFIG_PRINTK_TIME=y 137 | # CONFIG_DEBUG_MISC is not set 138 | # CONFIG_SLUB_DEBUG is not set 139 | # CONFIG_RCU_TRACE is not set 140 | # CONFIG_FTRACE is not set 141 | # CONFIG_RUNTIME_TESTING_MENU is not set 142 | -------------------------------------------------------------------------------- /conf/evalsoc/linux_rv32imac_defconfig: -------------------------------------------------------------------------------- 1 | # CONFIG_LOCALVERSION_AUTO is not set 2 | CONFIG_DEFAULT_HOSTNAME="nucleisys" 3 | CONFIG_SYSVIPC=y 4 | # CONFIG_CROSS_MEMORY_ATTACH is not set 5 | CONFIG_CGROUPS=y 6 | CONFIG_NAMESPACES=y 7 | CONFIG_USER_NS=y 8 | CONFIG_BLK_DEV_INITRD=y 9 | # CONFIG_RD_BZIP2 is not set 10 | # CONFIG_RD_LZMA is not set 11 | # CONFIG_RD_XZ is not set 12 | # CONFIG_RD_LZO is not set 13 | CONFIG_EXPERT=y 14 | # CONFIG_KALLSYMS is not set 15 | CONFIG_NONPORTABLE=y 16 | CONFIG_ARCH_RV32I=y 17 | CONFIG_CMODEL_MEDANY=y 18 | CONFIG_SMP=y 19 | CONFIG_HZ_100=y 20 | CONFIG_RISCV_SBI_V01=y 21 | # CONFIG_RISCV_BOOT_SPINWAIT is not set 22 | CONFIG_CMDLINE="earlyprintk" 23 | CONFIG_MODULES=y 24 | CONFIG_MODULE_UNLOAD=y 25 | CONFIG_MODVERSIONS=y 26 | # CONFIG_COMPACTION is not set 27 | CONFIG_NET=y 28 | CONFIG_PACKET=y 29 | CONFIG_UNIX=y 30 | CONFIG_UNIX_DIAG=y 31 | CONFIG_TLS=y 32 | CONFIG_INET=y 33 | CONFIG_NETFILTER=y 34 | CONFIG_NETLINK_DIAG=y 35 | # CONFIG_WIRELESS is not set 36 | CONFIG_FAILOVER=y 37 | CONFIG_DEVTMPFS=y 38 | CONFIG_DEVTMPFS_MOUNT=y 39 | CONFIG_MTD=y 40 | CONFIG_MTD_CMDLINE_PARTS=y 41 | CONFIG_MTD_BLOCK=y 42 | CONFIG_FTL=y 43 | CONFIG_MTD_CFI=y 44 | CONFIG_MTD_SPI_NOR=y 45 | CONFIG_OF_OVERLAY=y 46 | CONFIG_BLK_DEV_LOOP=y 47 | CONFIG_BLK_DEV_RAM=y 48 | CONFIG_NETDEVICES=y 49 | # CONFIG_NET_VENDOR_ALACRITECH is not set 50 | # CONFIG_NET_VENDOR_AMAZON is not set 51 | # CONFIG_NET_VENDOR_AQUANTIA is not set 52 | # CONFIG_NET_VENDOR_ARC is not set 53 | # CONFIG_NET_VENDOR_ASIX is not set 54 | # CONFIG_NET_VENDOR_BROADCOM is not set 55 | # CONFIG_NET_VENDOR_CADENCE is not set 56 | # CONFIG_NET_VENDOR_CAVIUM is not set 57 | # CONFIG_NET_VENDOR_CORTINA is not set 58 | # CONFIG_NET_VENDOR_DAVICOM is not set 59 | # CONFIG_NET_VENDOR_ENGLEDER is not set 60 | # CONFIG_NET_VENDOR_EZCHIP is not set 61 | # CONFIG_NET_VENDOR_FUNGIBLE is not set 62 | # CONFIG_NET_VENDOR_GOOGLE is not set 63 | # CONFIG_NET_VENDOR_HUAWEI is not set 64 | # CONFIG_NET_VENDOR_INTEL is not set 65 | # CONFIG_NET_VENDOR_ADI is not set 66 | # CONFIG_NET_VENDOR_LITEX is not set 67 | # CONFIG_NET_VENDOR_MARVELL is not set 68 | # CONFIG_NET_VENDOR_MICREL is not set 69 | # CONFIG_NET_VENDOR_MICROCHIP is not set 70 | # CONFIG_NET_VENDOR_MICROSEMI is not set 71 | # CONFIG_NET_VENDOR_MICROSOFT is not set 72 | # CONFIG_NET_VENDOR_NI is not set 73 | # CONFIG_NET_VENDOR_NATSEMI is not set 74 | # CONFIG_NET_VENDOR_NETRONOME is not set 75 | CONFIG_NUCLEI_XEC=y 76 | # CONFIG_NET_VENDOR_PENSANDO is not set 77 | # CONFIG_NET_VENDOR_QUALCOMM is not set 78 | # CONFIG_NET_VENDOR_RENESAS is not set 79 | # CONFIG_NET_VENDOR_ROCKER is not set 80 | # CONFIG_NET_VENDOR_SAMSUNG is not set 81 | # CONFIG_NET_VENDOR_SEEQ is not set 82 | # CONFIG_NET_VENDOR_SOLARFLARE is not set 83 | # CONFIG_NET_VENDOR_SOCIONEXT is not set 84 | # CONFIG_NET_VENDOR_STMICRO is not set 85 | # CONFIG_NET_VENDOR_SYNOPSYS is not set 86 | # CONFIG_NET_VENDOR_VERTEXCOM is not set 87 | # CONFIG_NET_VENDOR_VIA is not set 88 | # CONFIG_NET_VENDOR_WANGXUN is not set 89 | # CONFIG_NET_VENDOR_WIZNET is not set 90 | # CONFIG_NET_VENDOR_XILINX is not set 91 | # CONFIG_WLAN is not set 92 | # CONFIG_INPUT_KEYBOARD is not set 93 | # CONFIG_INPUT_MOUSE is not set 94 | # CONFIG_VT is not set 95 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 96 | CONFIG_SERIAL_NUCLEI=y 97 | CONFIG_SERIAL_NUCLEI_CONSOLE=y 98 | CONFIG_HVC_RISCV_SBI=y 99 | # CONFIG_HW_RANDOM is not set 100 | CONFIG_SPI=y 101 | CONFIG_SPI_NUCLEI=y 102 | CONFIG_SPI_SPIDEV=y 103 | CONFIG_PINCTRL=y 104 | CONFIG_GPIOLIB=y 105 | CONFIG_GPIO_SYSFS=y 106 | CONFIG_GPIO_NUCLEI=y 107 | # CONFIG_HWMON is not set 108 | # CONFIG_HID_SUPPORT is not set 109 | # CONFIG_USB_SUPPORT is not set 110 | CONFIG_MMC=y 111 | CONFIG_MMC_SPI=y 112 | # CONFIG_VIRTIO_MENU is not set 113 | # CONFIG_VHOST_MENU is not set 114 | # CONFIG_IOMMU_SUPPORT is not set 115 | # CONFIG_NVMEM is not set 116 | CONFIG_EXT4_FS=y 117 | CONFIG_EXT4_FS_POSIX_ACL=y 118 | CONFIG_AUTOFS_FS=y 119 | CONFIG_MSDOS_FS=y 120 | CONFIG_VFAT_FS=y 121 | CONFIG_EXFAT_FS=y 122 | CONFIG_TMPFS=y 123 | CONFIG_TMPFS_POSIX_ACL=y 124 | CONFIG_EFIVAR_FS=y 125 | CONFIG_NLS_CODEPAGE_437=y 126 | CONFIG_NLS_ISO8859_1=y 127 | CONFIG_CRYPTO_USER=y 128 | CONFIG_CRYPTO_AUTHENC=y 129 | CONFIG_CRYPTO_RSA=y 130 | CONFIG_CRYPTO_CBC=y 131 | CONFIG_CRYPTO_SEQIV=y 132 | CONFIG_CRYPTO_ECHAINIV=y 133 | CONFIG_CRYPTO_SHA256=y 134 | CONFIG_CRYPTO_CRC32=y 135 | CONFIG_CRYPTO_DEFLATE=y 136 | CONFIG_CRYPTO_USER_API_HASH=y 137 | CONFIG_CRYPTO_USER_API_RNG=y 138 | CONFIG_PRINTK_TIME=y 139 | # CONFIG_DEBUG_MISC is not set 140 | # CONFIG_SLUB_DEBUG is not set 141 | # CONFIG_RCU_TRACE is not set 142 | # CONFIG_FTRACE is not set 143 | # CONFIG_RUNTIME_TESTING_MENU is not set 144 | -------------------------------------------------------------------------------- /conf/evalsoc/linux_rv32imafdc_defconfig: -------------------------------------------------------------------------------- 1 | # CONFIG_LOCALVERSION_AUTO is not set 2 | CONFIG_DEFAULT_HOSTNAME="nucleisys" 3 | CONFIG_SYSVIPC=y 4 | # CONFIG_CROSS_MEMORY_ATTACH is not set 5 | CONFIG_CGROUPS=y 6 | CONFIG_NAMESPACES=y 7 | CONFIG_USER_NS=y 8 | CONFIG_BLK_DEV_INITRD=y 9 | # CONFIG_RD_BZIP2 is not set 10 | # CONFIG_RD_LZMA is not set 11 | # CONFIG_RD_XZ is not set 12 | # CONFIG_RD_LZO is not set 13 | CONFIG_EXPERT=y 14 | # CONFIG_KALLSYMS is not set 15 | CONFIG_NONPORTABLE=y 16 | CONFIG_ARCH_RV32I=y 17 | CONFIG_CMODEL_MEDANY=y 18 | CONFIG_SMP=y 19 | CONFIG_HZ_100=y 20 | CONFIG_RISCV_SBI_V01=y 21 | # CONFIG_RISCV_BOOT_SPINWAIT is not set 22 | CONFIG_CMDLINE="earlyprintk" 23 | CONFIG_MODULES=y 24 | CONFIG_MODULE_UNLOAD=y 25 | CONFIG_MODVERSIONS=y 26 | # CONFIG_COMPACTION is not set 27 | CONFIG_NET=y 28 | CONFIG_PACKET=y 29 | CONFIG_UNIX=y 30 | CONFIG_UNIX_DIAG=y 31 | CONFIG_TLS=y 32 | CONFIG_INET=y 33 | CONFIG_NETFILTER=y 34 | CONFIG_NETLINK_DIAG=y 35 | # CONFIG_WIRELESS is not set 36 | CONFIG_FAILOVER=y 37 | CONFIG_DEVTMPFS=y 38 | CONFIG_DEVTMPFS_MOUNT=y 39 | CONFIG_MTD=y 40 | CONFIG_MTD_CMDLINE_PARTS=y 41 | CONFIG_MTD_BLOCK=y 42 | CONFIG_FTL=y 43 | CONFIG_MTD_CFI=y 44 | CONFIG_MTD_SPI_NOR=y 45 | CONFIG_OF_OVERLAY=y 46 | CONFIG_BLK_DEV_LOOP=y 47 | CONFIG_BLK_DEV_RAM=y 48 | CONFIG_NETDEVICES=y 49 | # CONFIG_NET_VENDOR_ALACRITECH is not set 50 | # CONFIG_NET_VENDOR_AMAZON is not set 51 | # CONFIG_NET_VENDOR_AQUANTIA is not set 52 | # CONFIG_NET_VENDOR_ARC is not set 53 | # CONFIG_NET_VENDOR_ASIX is not set 54 | # CONFIG_NET_VENDOR_BROADCOM is not set 55 | # CONFIG_NET_VENDOR_CADENCE is not set 56 | # CONFIG_NET_VENDOR_CAVIUM is not set 57 | # CONFIG_NET_VENDOR_CORTINA is not set 58 | # CONFIG_NET_VENDOR_DAVICOM is not set 59 | # CONFIG_NET_VENDOR_ENGLEDER is not set 60 | # CONFIG_NET_VENDOR_EZCHIP is not set 61 | # CONFIG_NET_VENDOR_FUNGIBLE is not set 62 | # CONFIG_NET_VENDOR_GOOGLE is not set 63 | # CONFIG_NET_VENDOR_HUAWEI is not set 64 | # CONFIG_NET_VENDOR_INTEL is not set 65 | # CONFIG_NET_VENDOR_ADI is not set 66 | # CONFIG_NET_VENDOR_LITEX is not set 67 | # CONFIG_NET_VENDOR_MARVELL is not set 68 | # CONFIG_NET_VENDOR_MICREL is not set 69 | # CONFIG_NET_VENDOR_MICROCHIP is not set 70 | # CONFIG_NET_VENDOR_MICROSEMI is not set 71 | # CONFIG_NET_VENDOR_MICROSOFT is not set 72 | # CONFIG_NET_VENDOR_NI is not set 73 | # CONFIG_NET_VENDOR_NATSEMI is not set 74 | # CONFIG_NET_VENDOR_NETRONOME is not set 75 | CONFIG_NUCLEI_XEC=y 76 | # CONFIG_NET_VENDOR_PENSANDO is not set 77 | # CONFIG_NET_VENDOR_QUALCOMM is not set 78 | # CONFIG_NET_VENDOR_RENESAS is not set 79 | # CONFIG_NET_VENDOR_ROCKER is not set 80 | # CONFIG_NET_VENDOR_SAMSUNG is not set 81 | # CONFIG_NET_VENDOR_SEEQ is not set 82 | # CONFIG_NET_VENDOR_SOLARFLARE is not set 83 | # CONFIG_NET_VENDOR_SOCIONEXT is not set 84 | # CONFIG_NET_VENDOR_STMICRO is not set 85 | # CONFIG_NET_VENDOR_SYNOPSYS is not set 86 | # CONFIG_NET_VENDOR_VERTEXCOM is not set 87 | # CONFIG_NET_VENDOR_VIA is not set 88 | # CONFIG_NET_VENDOR_WANGXUN is not set 89 | # CONFIG_NET_VENDOR_WIZNET is not set 90 | # CONFIG_NET_VENDOR_XILINX is not set 91 | # CONFIG_WLAN is not set 92 | # CONFIG_INPUT_KEYBOARD is not set 93 | # CONFIG_INPUT_MOUSE is not set 94 | # CONFIG_VT is not set 95 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 96 | CONFIG_SERIAL_NUCLEI=y 97 | CONFIG_SERIAL_NUCLEI_CONSOLE=y 98 | CONFIG_HVC_RISCV_SBI=y 99 | # CONFIG_HW_RANDOM is not set 100 | CONFIG_SPI=y 101 | CONFIG_SPI_NUCLEI=y 102 | CONFIG_SPI_SPIDEV=y 103 | CONFIG_PINCTRL=y 104 | CONFIG_GPIOLIB=y 105 | CONFIG_GPIO_SYSFS=y 106 | CONFIG_GPIO_NUCLEI=y 107 | # CONFIG_HWMON is not set 108 | # CONFIG_HID_SUPPORT is not set 109 | # CONFIG_USB_SUPPORT is not set 110 | CONFIG_MMC=y 111 | CONFIG_MMC_SPI=y 112 | # CONFIG_VIRTIO_MENU is not set 113 | # CONFIG_VHOST_MENU is not set 114 | # CONFIG_IOMMU_SUPPORT is not set 115 | # CONFIG_NVMEM is not set 116 | CONFIG_EXT4_FS=y 117 | CONFIG_EXT4_FS_POSIX_ACL=y 118 | CONFIG_AUTOFS_FS=y 119 | CONFIG_MSDOS_FS=y 120 | CONFIG_VFAT_FS=y 121 | CONFIG_EXFAT_FS=y 122 | CONFIG_TMPFS=y 123 | CONFIG_TMPFS_POSIX_ACL=y 124 | CONFIG_EFIVAR_FS=y 125 | CONFIG_NLS_CODEPAGE_437=y 126 | CONFIG_NLS_ISO8859_1=y 127 | CONFIG_CRYPTO_USER=y 128 | CONFIG_CRYPTO_AUTHENC=y 129 | CONFIG_CRYPTO_RSA=y 130 | CONFIG_CRYPTO_CBC=y 131 | CONFIG_CRYPTO_SEQIV=y 132 | CONFIG_CRYPTO_ECHAINIV=y 133 | CONFIG_CRYPTO_SHA256=y 134 | CONFIG_CRYPTO_CRC32=y 135 | CONFIG_CRYPTO_DEFLATE=y 136 | CONFIG_CRYPTO_USER_API_HASH=y 137 | CONFIG_CRYPTO_USER_API_RNG=y 138 | CONFIG_PRINTK_TIME=y 139 | # CONFIG_DEBUG_MISC is not set 140 | # CONFIG_SLUB_DEBUG is not set 141 | # CONFIG_RCU_TRACE is not set 142 | # CONFIG_FTRACE is not set 143 | # CONFIG_RUNTIME_TESTING_MENU is not set 144 | -------------------------------------------------------------------------------- /.github/build_sdk.sh: -------------------------------------------------------------------------------- 1 | #!/bin/env bash 2 | 3 | SCRIPTDIR=$(dirname $(readlink -f $BASH_SOURCE)) 4 | SCRIPTDIR=$(readlink -f $SCRIPTDIR) 5 | 6 | SOC=${SOC:-evalsoc} 7 | CORE=${CORE:-ux900fd} 8 | BOOT_MODE=${BOOT_MODE:-sd} 9 | MAKEOPTS=${MAKEOPTS:-""} 10 | DRYRUN=${DRYRUN:-0} 11 | DOBUILD=${DOBUILD:-1} 12 | DOSYMLINK=${DOSYMLINK:-1} 13 | BUILDBOOTIMAGES=${BUILDBOOTIMAGES:-1} 14 | OVERRIDEROOT=${OVERRIDEROOT:-} 15 | 16 | GITSHA=${GITSHA:-$(git describe --always)} 17 | 18 | SDKSYNCROOT=/home/share/devtools/linuxsdk 19 | FLDROOT=${SDKSYNCROOT}/local/$(whoami) 20 | BOOTROOT=${SDKSYNCROOT}/local/$(whoami) 21 | SYSENVROOT=${SDKSYNCROOT}/trigger/$(whoami) 22 | 23 | # eval MAKEOPTS to overwrite variable of SOC/CORE/BOOT_MODE 24 | if [ "x$MAKEOPTS" != "x" ] ; then 25 | echo "MAKEOPTS=$MAKEOPTS" 26 | eval export $MAKEOPTS 27 | fi 28 | 29 | if [[ "$CI_PIPELINE_ID" =~ ^[0-9]+$ ]] ; then 30 | echo "Triggered by gitlab ci runner, pipeline id is $CI_PIPELINE_ID" 31 | PIPELINEDIR=${SDKSYNCROOT}/pipelines/${CI_PIPELINE_ID} 32 | BOOTROOT=${PIPELINEDIR} 33 | FLDROOT=${PIPELINEDIR} 34 | else 35 | echo "Triggered locally via $(whoami)" 36 | fi 37 | 38 | if [ "x$OVERRIDEROOT" != "x$OVERRIDEROOT" ] ; then 39 | echo "Using overwrite freeloader, boot zip, sys environment root" 40 | BOOTROOT=${OVERRIDEROOT} 41 | FLDROOT=${OVERRIDEROOT} 42 | SYSENVROOT=${OVERRIDEROOT} 43 | fi 44 | 45 | echo "Final generated freeloader will be copy to ${FLDROOT}" 46 | if [ ! -d ${FLDROOT} ] ; then 47 | mkdir -p ${FLDROOT} 48 | fi 49 | echo "Final generated bootimages will be copy to ${BOOTROOT}" 50 | if [ ! -d ${BOOTROOT} ] ; then 51 | mkdir -p ${BOOTROOT} 52 | fi 53 | 54 | # get SYSENV, this is a text file contains some variable 55 | # since manual job of gitlab is not able to retrigger it with inputs 56 | # so we use a local share environment file accessable in shared shell 57 | # runner. 58 | # sample content 59 | # SPFL1DCTRL1=0x1f 60 | # SIMULATION=1 61 | # CACHE_CTRL=0x10001 62 | SYSENV=${SYSENV:-${SYSENVROOT}/build_${CORE}_${BOOT_MODE}.env} 63 | 64 | if [ -f ${SYSENV} ] ; then 65 | echo "Current share environment file for this build is ${SYSENV}" 66 | echo "If you to rerun this manual job, please change the content of ${SYSENV}" 67 | echo "Here is the content in it, now source it" 68 | cat ${SYSENV} 69 | # Each variable or function that is created or modified is given the export attribute and marked for export to the environment of subsequent commands. 70 | set -a 71 | source ${SYSENV} 72 | set +a 73 | else 74 | echo "Unable to find system environment file ${SYSENV} for this build" 75 | echo "Please make sure it exist, if you want to overwrite your build environment" 76 | fi 77 | 78 | # after sourcing ${SYSENV}, the build environment variable might change 79 | # such as SOC/CORE/BOOT_MODE 80 | 81 | echo "Git commit is $GITSHA" 82 | 83 | srcfld=work/${SOC}/freeloader/freeloader.elf 84 | srcbootzip=work/${SOC}/boot.zip 85 | 86 | source $SCRIPTDIR/utils.sh 87 | # get freeloader and boot zip suffix 88 | gen_dstimg_names 89 | 90 | dstfld=$FLDROOT/${dstfldname} 91 | dstbootzip=$BOOTROOT/${dstbootzipname} 92 | 93 | function prepare_workdir() { 94 | local workdir=work/${SOC} 95 | local realworkdir=work/${SOC}_${CORE} 96 | if [ -L $workdir ] && [ "x$DOSYMLINK" == "x1" ] ; then 97 | echo "This is a symbolic path, update the link from $workdir -> $realworkdir, sleep 3s to confirm it" 98 | sleep 3 99 | rm -f $workdir 100 | mkdir -p $realworkdir 101 | ln -s $(basename $realworkdir) $workdir 102 | fi 103 | } 104 | 105 | 106 | if [ "x$DOBUILD" == "x1" ] ; then 107 | echo "Build freeloader and boot images" 108 | prepare_workdir 109 | prepare_dts 110 | if [ "x${BUILDBOOTIMAGES}" == "x1" ] ; then 111 | echo "Build boot images now" 112 | make bootimages 113 | fi 114 | echo "Build freeloader now" 115 | make freeloader 116 | reset_dts 117 | fi 118 | 119 | if [ -d $FLDROOT ] && [ -d $BOOTROOT ] ; then 120 | echo "Freeloader and boot root exist, prepare to copy to internal place!" 121 | else 122 | echo "Can't locate freeloader and boot root directory" 123 | exit 1 124 | fi 125 | 126 | if [ -f ${SYSENV} ] ; then 127 | echo "Current share environment file for this build is ${SYSENV}" 128 | echo "If you to rerun this manual job, please change the content of ${SYSENV}" 129 | fi 130 | 131 | if [ -f $srcfld ] ; then 132 | echo "Copy freeloader $srcfld -> $dstfld" 133 | if [ "x$DRYRUN" == "x0" ] ; then 134 | cp -f $srcfld $dstfld 135 | fi 136 | fi 137 | 138 | if [ -f $srcbootzip ] ; then 139 | echo "Copy bootzip $srcbootzip -> $dstbootzip" 140 | if [ "x$DRYRUN" == "x0" ] ; then 141 | cp -f $srcbootzip $dstbootzip 142 | fi 143 | fi 144 | 145 | exit 0 146 | -------------------------------------------------------------------------------- /conf/evalsoc/openocd.cfg: -------------------------------------------------------------------------------- 1 | # please use >= 2022.08 openocd 2 | # some commands are changed to match latest openocd changes 3 | adapter speed 1000 4 | 5 | adapter driver ftdi 6 | ftdi vid_pid 0x0403 0x6010 7 | # for 2023.10 openocd, change oscan1_mode to nscan1_mode 8 | ftdi oscan1_mode off 9 | 10 | ## bindto 0.0.0.0 can be used to cover all available interfaces. 11 | ## Uncomment bindto line to enable remote machine debug 12 | # bindto 0.0.0.0 13 | 14 | ## you can also specify adapter serial to select a ftdi chip 15 | # adapter serial "FT6S9RD6" 16 | 17 | ## Bind JTAG with specified serial number passed by JTAGSN 18 | # https://doc.nucleisys.com/nuclei_sdk/develop/buildsystem.html#jtagsn 19 | if { [ info exists JTAGSN ] } { 20 | puts "Bind JTAG with serial number $JTAGSN" 21 | adapter serial $JTAGSN 22 | } 23 | 24 | transport select jtag 25 | 26 | ftdi layout_init 0x0008 0x001b 27 | ftdi layout_signal nSRST -oe 0x0020 -data 0x0020 28 | ftdi layout_signal TCK -data 0x0001 29 | ftdi layout_signal TDI -data 0x0002 30 | ftdi layout_signal TDO -input 0x0004 31 | ftdi layout_signal TMS -data 0x0008 32 | ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100 33 | 34 | # openocd variable set 35 | if { [ info exists BOOT_HARTID ] } { 36 | puts "boot hart id expected to be $BOOT_HARTID" 37 | set BOOTHART $BOOT_HARTID 38 | } else { 39 | puts "Set boot hart id to default 0" 40 | set BOOTHART 0 41 | } 42 | 43 | if { [ info exists SMP ] } { 44 | puts "SMP CPU count expected to be $SMP" 45 | set CORECNT $SMP 46 | } else { 47 | puts "Set default SMP CPU count to default 1" 48 | set CORECNT 1 49 | } 50 | 51 | # TODO: variables should be replaced by nuclei_gen 52 | set workmem_base 0x80000000 53 | set workmem_size 0x10000 54 | set flashxip_base 0x20000000 55 | set xipnuspi_base 0x10014000 56 | 57 | # if NOFLASH variable exist or passed by openocd command 58 | # will not probe flash device 59 | set _noflash [ info exists NOFLASH ] 60 | 61 | # Create JTAG chain 62 | set _CHIPNAME riscv 63 | if { [ info exists SPLITMODE ] } { 64 | # SPLIT MODE mainly for Nuclei NA product line 65 | # It can split the lock-step CPU into two standalone CPU core 66 | if { $SPLITMODE > 1 } { # when SPLITMODE > 1, it means you wan to expose two harts for gdb connections 67 | jtag newtap $_CHIPNAME.1 cpu -irlen 5 68 | jtag newtap $_CHIPNAME.0 cpu -irlen 5 69 | set _TARGETNAME $_CHIPNAME.1.cpu 70 | } else { 71 | # hart1 hart0 in split mode 72 | # only one hart will be exposed to be connnected via gdb 73 | # the hart is selected by BOOTHART 74 | if { $BOOTHART == 0 } { 75 | jtag newtap $_CHIPNAME.split cpu -irlen 5 76 | jtag newtap $_CHIPNAME cpu -irlen 5 77 | } else { 78 | jtag newtap $_CHIPNAME cpu -irlen 5 79 | jtag newtap $_CHIPNAME.split cpu -irlen 5 80 | } 81 | set _TARGETNAME $_CHIPNAME.cpu 82 | } 83 | } else { 84 | jtag newtap $_CHIPNAME cpu -irlen 5 85 | set _TARGETNAME $_CHIPNAME.cpu 86 | } 87 | 88 | set _smp_command "" 89 | 90 | if { $CORECNT > 1 } { 91 | set _BOOTHARTNAME $_TARGETNAME.$BOOTHART 92 | for { set _core 0 } { $_core < $CORECNT } { incr _core } { 93 | set _command "target create $_TARGETNAME.$_core riscv -chain-position $_TARGETNAME" 94 | if { $_core == 0 } { 95 | set _command "$_command -rtos hwthread" 96 | set _smp_command "target smp $_TARGETNAME.$_core" 97 | } else { 98 | set _command "$_command -coreid $_core" 99 | set _smp_command "$_smp_command $_TARGETNAME.$_core" 100 | } 101 | # do target create for each cpu 102 | eval $_command 103 | } 104 | # do target smp for all cpus 105 | eval $_smp_command 106 | } else { 107 | set _BOOTHARTNAME $_TARGETNAME 108 | if { [ info exists SPLITMODE ] } { 109 | if { $SPLITMODE > 1 } { 110 | target create $_CHIPNAME.0.cpu riscv -chain-position $_CHIPNAME.0.cpu 111 | target create $_CHIPNAME.1.cpu riscv -chain-position $_CHIPNAME.1.cpu 112 | } else { 113 | # split mode coreid is always 0 114 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 115 | } 116 | } else { 117 | # create a single hart target with coreid = $BOOTHART 118 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $BOOTHART 119 | } 120 | } 121 | 122 | $_BOOTHARTNAME configure -work-area-phys $workmem_base -work-area-size $workmem_size -work-area-backup 1 123 | 124 | if { $_noflash == 0 } { 125 | set _FLASHNAME $_CHIPNAME.flash 126 | flash bank $_FLASHNAME nuspi $flashxip_base 0 0 0 $_BOOTHARTNAME $xipnuspi_base 127 | } 128 | 129 | # Expose Nuclei self-defined CSRS 130 | # See https://github.com/riscv/riscv-gnu-toolchain/issues/319#issuecomment-358397306 131 | # Then user can view the csr register value in gdb using: info reg csr775 for CSR MTVT(0x307) 132 | # No need to expose it now for openocd >= 2022.01 133 | # riscv expose_csrs 416-496,770-800,835-850,1227-1231,1483-1486,1984-2040,2064-2070,2370-2380,2490-2500,4032-4040 134 | 135 | init 136 | 137 | if { [ info exists pulse_srst ] } { 138 | ftdi set_signal nSRST 0 139 | ftdi set_signal nSRST z 140 | } 141 | 142 | halt 143 | 144 | # We must turn on this because otherwise the IDE version debug cannot download the program into flash 145 | if { $_noflash == 0 } { 146 | flash protect 0 0 last off 147 | } 148 | 149 | arm semihosting enable 150 | -------------------------------------------------------------------------------- /.github/workflows/build.yml: -------------------------------------------------------------------------------- 1 | # This is a basic workflow to help you get started with Actions 2 | 3 | name: Build and Test Linux SDK 4 | 5 | # auto cancel previous in-progress job 6 | concurrency: 7 | group: ${{ github.workflow }}-${{ github.ref }} 8 | cancel-in-progress: true 9 | 10 | # Controls when the action will run. Triggers the workflow on push or pull request 11 | # events but only for the dev_* branch 12 | on: 13 | push: 14 | branches: [ dev* ] 15 | paths-ignore: 16 | - README.md 17 | - LICENSE 18 | - .gitlab-ci.yml 19 | - .gitignore 20 | pull_request: 21 | branches: [ dev_* ] 22 | 23 | # A workflow run is made up of one or more jobs that can run sequentially or in parallel 24 | jobs: 25 | # This workflow contains a single job called "build" 26 | build: 27 | name: build for ${{ matrix.soc }} - ${{ matrix.core }} - ${{ matrix.boot_mode }} 28 | runs-on: ubuntu-22.04 29 | strategy: 30 | matrix: 31 | soc: [evalsoc] 32 | core: [ux900, ux900fd, u900, u900fd] 33 | boot_mode: [sd, flash] 34 | 35 | # Steps represent a sequence of tasks that will be executed as part of the job 36 | steps: 37 | # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it 38 | - name: Checkout Linux SDK Code 39 | uses: actions/checkout@v4 40 | with: 41 | submodules: recursive 42 | 43 | - name: Tarball source 44 | run: | 45 | base=$(basename $PWD) 46 | cd .. 47 | tar czvf source.tar.gz --exclude-vcs -C $base . 48 | mv source.tar.gz $base/ 49 | 50 | - name: Upload source 51 | if: matrix.core == 'ux900fd' && matrix.boot_mode == 'sd' && matrix.soc == 'evalsoc' 52 | uses: actions/upload-artifact@v4 53 | with: 54 | name: nuclei_linux_sdk_source 55 | path: source.tar.gz 56 | # continue build on error 57 | continue-on-error: true 58 | 59 | - name: Caching packages 60 | uses: actions/cache@v4 61 | with: 62 | path: buildroot/dl 63 | key: build 64 | 65 | # Install dependendenc 66 | - name: Install dependencies 67 | run: | 68 | sudo apt-get install build-essential git autotools-dev cmake texinfo bison minicom flex liblz4-tool \ 69 | libgmp-dev libmpfr-dev libmpc-dev gawk libz-dev libssl-dev device-tree-compiler libncursesw5-dev libncursesw5 \ 70 | python3 python3-pip mtools 71 | sudo pip3 install git-archive-all 72 | mkdir -p buildroot/dl 73 | QEMUVER=2025.02 74 | if [ ! -f buildroot/dl/nuclei-qemu-${QEMUVER}-linux-x64.tar.gz ] ; then 75 | wget --progress=dot -P buildroot/dl https://download.nucleisys.com/upload/files/toolchain/qemu/nuclei-qemu-${QEMUVER}-linux-x64.tar.gz 76 | fi 77 | mkdir -p prebuilt_tools 78 | tar -xzf buildroot/dl/nuclei-qemu-${QEMUVER}-linux-x64.tar.gz -C prebuilt_tools 79 | 80 | # Build bootimages 81 | - name: Build bootimages for ${{ matrix.soc }} - ${{ matrix.core }} - ${{ matrix.boot_mode }} 82 | run: | 83 | export SOC=${{ matrix.soc }} CORE=${{ matrix.core }} BOOT_MODE=${{ matrix.boot_mode }} 84 | echo "Generate QEMU Disk" 85 | #echo ">>> Apply workaround: change TIMERCLK_FREQ from 32768 to 4000000" 86 | #sed -i "s/32768/4000000/" conf/$SOC/*.dts 87 | #export TIMER_HZ=4000000 88 | make genstamp 89 | make freeloader 90 | cp work/$SOC/freeloader/freeloader.elf work/$SOC/freeloader_qemu.elf 91 | make bootimages 92 | make DISK_SIZE=128 gendisk 93 | RUNQEMUSH=work/$SOC/run_qemu.sh 94 | SHOWQEMUSH=work/$SOC/show_qemu.sh 95 | qemucmd=qemu-system-riscv32 96 | if [[ $CORE == *ux* ]] ; then 97 | qemucmd=qemu-system-riscv64 98 | fi 99 | echo "which $qemucmd" > $SHOWQEMUSH 100 | echo "$qemucmd --version" >> $SHOWQEMUSH 101 | echo "$qemucmd -M nuclei_${SOC},download=flashxip -cpu nuclei-${CORE},ext=${ARCH_EXT}_svpbmt_zicbom_sstc_sscofpmf_zba_zbb_zbc_zbs_zicond -smp 8 -m 2g -bios freeloader_qemu.elf -nographic -drive file=disk.img,if=sd,format=raw" > $RUNQEMUSH 102 | chmod +x $RUNQEMUSH 103 | chmod +x $SHOWQEMUSH 104 | unset TIMER_HZ 105 | echo ">>> Reset workaround and source code" 106 | git reset --hard 107 | echo "Generate freeloader and boot images" 108 | make genboot 109 | 110 | # Run on qemu 111 | - name: Run and test on qemu for ${{ matrix.soc }} - ${{ matrix.core }} - ${{ matrix.boot_mode }} 112 | run: | 113 | QEMU_PATH=$(pwd)/prebuilt_tools/linux_qemu/bin:$(pwd)/prebuilt_tools/qemu/bin 114 | export PATH=${QEMU_PATH}:$PATH 115 | export SOC=${{ matrix.soc }} CORE=${{ matrix.core }} BOOT_MODE=${{ matrix.boot_mode }} 116 | cd work/$SOC 117 | # show qemu version 118 | bash show_qemu.sh 119 | # $(cat run_qemu.sh) is workaround for directly run bash run_qemu.sh 120 | # If do kill it will just kill bash process, the qemu process is not killed 121 | # SIGTERM is better for kill qemu 122 | timeout --foreground -s SIGTERM 5m $(cat run_qemu.sh) > >(tee run_qemu.log) || { 123 | if cat run_qemu.log | grep "Run /init" ; then echo "Kernel boot successfully" ; else echo "Kernel boot failed" && exit 1; fi; 124 | if cat run_qemu.log | grep "Welcome to" ; then echo "Pass simulation" && exit 0; else echo "Failed init process" && exit 1; fi; 125 | } 126 | 127 | - name: Upload bootimages for ${{ matrix.soc }} - ${{ matrix.core }} - ${{ matrix.boot_mode }} 128 | uses: actions/upload-artifact@v4 129 | with: 130 | name: bootimages_${{ matrix.soc }}_${{ matrix.core }}_${{ matrix.boot_mode }} 131 | path: | 132 | work/${{ matrix.soc }}/boot.zip 133 | work/${{ matrix.soc }}/freeloader/freeloader.elf 134 | work/${{ matrix.soc }}/buildstamp.txt 135 | 136 | - name: Upload qemu images for ${{ matrix.soc }} - ${{ matrix.core }} - ${{ matrix.boot_mode }} 137 | uses: actions/upload-artifact@v4 138 | with: 139 | name: qemu_images_${{ matrix.soc }}_${{ matrix.core }}_${{ matrix.boot_mode }} 140 | path: | 141 | work/${{ matrix.soc }}/boot.zip 142 | work/${{ matrix.soc }}/freeloader/freeloader.elf 143 | work/${{ matrix.soc }}/freeloader_qemu.elf 144 | work/${{ matrix.soc }}/buildstamp.txt 145 | work/${{ matrix.soc }}/disk.img 146 | work/${{ matrix.soc }}/*.sh 147 | 148 | - name: Upload cached packages 149 | if: matrix.core == 'ux900fd' && matrix.boot_mode == 'sd' && matrix.soc == 'evalsoc' 150 | uses: actions/upload-artifact@v4 151 | with: 152 | name: build_caching 153 | path: | 154 | buildroot/dl 155 | -------------------------------------------------------------------------------- /conf/README.md: -------------------------------------------------------------------------------- 1 | # Linux SDK SoC Configuration Generator 2 | 3 | To enhance the convenience and efficiency of porting the Nuclei Linux SDK for our users, we've developed a Python script 4 | designed to automate the generation of customized configuration files which located in `conf/`. 5 | 6 | With the help of the script, it will speedup the bringup of your SoC prototype using Nuclei RISC-V CPU IP, and can also evaluate 7 | it using Nuclei QEMU. 8 | 9 | By leveraging **conf/evalsoc** as the default reference template, this tool accept a **SoC configuration file** provided by you 10 | to generate proper linux sdk configuration files for your customized SoC. 11 | 12 | This script assumed your SoC used Nuclei RISC-V CPU and UART/QSPI IP, UART0, QSPI0 connected to SPIFlash, QSPI2 connected to SDCard. 13 | 14 | > If you are not using our IP, it may need more efforts to modify opensbi, uboot and linux drivers. 15 | 16 | > If you are using Nuclei UART/QSPI IP, the IP uboot and linux driver is still in development. 17 | 18 | ## SoC Configuration File 19 | 20 | The configuration file is in JSON format,mainly used to config ddr, flash address,size and device irq. 21 | 22 | A typical config file as following: 23 | 24 | ~~~json 25 | { 26 | "general_config": { 27 | "ddr": { 28 | "base": "0x80000000", 29 | "size": "0x80000000" 30 | }, 31 | "norflash": { 32 | "base": "0x20000000", 33 | "size": "32M" 34 | }, 35 | "iregion": { 36 | "base": "0x18000000" 37 | }, 38 | "uart0": { 39 | "base": "0x10013000", 40 | "irq": "33" 41 | }, 42 | "uart1": { 43 | "base": "0x10023000", 44 | "irq": "34" 45 | }, 46 | "qspi0": { 47 | "base": "0x10014000", 48 | "irq": "35" 49 | }, 50 | "qspi2": { 51 | "base": "0x10034000", 52 | "irq": "37" 53 | }, 54 | "cpu_freq": "50000000", 55 | "timer_freq": "32768" 56 | } 57 | } 58 | ~~~ 59 | 60 | - `general_config` is mainly used to configure the board resource or chip base address 61 | 62 | - `base` property : base address, only support hex format 63 | 64 | - `size` property : size, support hex, dec, size string format 65 | 66 | - `irq` property : peripheral interrupt id, dec format 67 | 68 | The `irq` peripheral interrupt id is equal to hardware interrupt wire connect number plus one, users should follow this rule when configuring irq. 69 | 70 | | IRQ_HW_ID | PLIC Interrupt ID | Source | 71 | | --------- | ----------------- | ------ | 72 | | 32 | 33 | uart0 | 73 | | 34 | 35 | qspi0 | 74 | | 35 | 36 | qspi1 | 75 | | 36 | 37 | qspi2 | 76 | 77 | The **iregion** is Nuclei RISC-V CPU internal region, you should provide correct iregion base to match with your SoC. 78 | 79 | If **ddr** parameter is not exist, we will use `base:0x80000000`,`size:0x80000000` as default value. 80 | 81 | If other parameters are not exist, we will skip update them. 82 | 83 | ## How to use 84 | 85 | Change directory to `/conf/`, then execute the python script `genconf.py`. 86 | 87 | ~~~shell 88 | $cd nuclei-linux-sdk/conf 89 | $ ./genconf.py --help 90 | usage: genconf.py [-h] [--conf CONF] [--refsoc REFSOC] custsoc 91 | 92 | Generate configuration files based on a reference SOC. 93 | 94 | positional arguments: 95 | custsoc new config files directory. 96 | 97 | optional arguments: 98 | -h, --help show this help message and exit 99 | --conf CONF json config file (default: genconf.json). 100 | --refsoc REFSOC reference soc config (default: evalsoc). 101 | ~~~ 102 | 103 | generate named **rvsoc** config files with default `evalsoc` and `genconf.json` 104 | 105 | ~~~shell 106 | $./genconf.py rvsoc 107 | ~~~ 108 | 109 | generate named **rvsoc** config files based on `xxxsoc` with `xxx.json`, support `xxxsoc` and 110 | `xxx.json` have exist in the same directory. 111 | 112 | ~~~shell 113 | $./genconf.py --conf xxx.json --refsoc xxxsoc rvsoc 114 | ~~~ 115 | 116 | After generate config files, you can build your linux sdk using command: 117 | 118 | > Assume you want to use ux900fd CORE. 119 | 120 | ~~~shell 121 | cd /path/to/nuclei-linux-sdk 122 | # you are now in the root of Nuclei Linux SDK 123 | # build your rvsoc and use ux900fd core 124 | make SOC=rvsoc CORE=ux900fd freeloader bootimages 125 | # run and evaluate it on qemu 126 | make SOC=rvsoc CORE=ux900fd run_qemu 127 | ~~~ 128 | 129 | More detail about how to build linux sdk, please refer to Linux SDK top **README.md**. 130 | 131 | ## Example 132 | 133 | generate rv64 rvsoc config files log as following: 134 | 135 | ~~~shell 136 | nuclei-linux-sdk/conf$ ./genconf.py rvsoc 137 | ===Start generating rvsoc config files based on evalsoc=== 138 | 139 | >>>Updating opensbi... 140 | Create 'rvsoc/opensbi/customsoc.c' based on 'rvsoc/opensbi/evalsoc.c'. 141 | Replace string evalsoc with customsoc in rvsoc/opensbi/customsoc.c 142 | Note: All custom soc should use customsoc.c for nuclei generic soc support 143 | 144 | >>>Updating uboot config... 145 | - rvsoc/uboot_rv32imac_sd_config: 146 | Update with CONFIG_TEXT_BASE=0x80400000 147 | 148 | Update with CONFIG_SYS_LOAD_ADDR=0x80400000 149 | 150 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 151 | 152 | - rvsoc/uboot_rv64imac_flash_config: 153 | Update with CONFIG_TEXT_BASE=0x80200000 154 | 155 | Update with CONFIG_SYS_LOAD_ADDR=0x80200000 156 | 157 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 158 | 159 | Update with CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 160 | 161 | - rvsoc/uboot_rv32imafdc_flash_config: 162 | Update with CONFIG_TEXT_BASE=0x80400000 163 | 164 | Update with CONFIG_SYS_LOAD_ADDR=0x80400000 165 | 166 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 167 | 168 | Update with CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 169 | 170 | - rvsoc/uboot_rv64imac_sd_config: 171 | Update with CONFIG_TEXT_BASE=0x80200000 172 | 173 | Update with CONFIG_SYS_LOAD_ADDR=0x80200000 174 | 175 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 176 | 177 | - rvsoc/uboot_rv32imac_flash_config: 178 | Update with CONFIG_TEXT_BASE=0x80400000 179 | 180 | Update with CONFIG_SYS_LOAD_ADDR=0x80400000 181 | 182 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 183 | 184 | Update with CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 185 | 186 | - rvsoc/uboot_rv64imafdc_sd_config: 187 | Update with CONFIG_TEXT_BASE=0x80200000 188 | 189 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 190 | 191 | Update with CONFIG_SYS_LOAD_ADDR=0x80200000 192 | 193 | - rvsoc/uboot_rv32imafdc_sd_config: 194 | Update with CONFIG_TEXT_BASE=0x80400000 195 | 196 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 197 | 198 | Update with CONFIG_SYS_LOAD_ADDR=0x80400000 199 | 200 | - rvsoc/uboot_rv64imafdc_flash_config: 201 | Update with CONFIG_TEXT_BASE=0x80200000 202 | 203 | Update with CONFIG_SYS_LOAD_ADDR=0x80200000 204 | 205 | Update with CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 206 | 207 | Update with CONFIG_BOOTCOMMAND="bootm 0x83000000 0x88300000 0x88000000" 208 | 209 | 210 | >>>Updating freeloader.mk... 211 | Update DDR_BASE to 0x80000000 212 | Update FLASH_BASE to 0x20000000 213 | Update FLASH_SIZE to 32M 214 | Update AMPFW_SIZE to 0x400000 215 | Update AMP_START_CORE to 8 216 | Update AMPFW_START_OFFSET to 0x7e000000 217 | 218 | >>>Updating build.mk... 219 | Update FW_TEXT_START to 0x80000000 220 | Update UIMAGE_AE_CMD to -a 0x80400000 -e 0x80400000 221 | Update QEMU_MACHINE_OPTS to -M nuclei_evalsoc,soc-cfg=conf/rvsoc/rvsoc.json,download=flashxip -smp 8 222 | 223 | Updating dts... 224 | - rvsoc/nuclei_rv32imafdc.dts: 225 | Replace string evalsoc with rvsoc in rvsoc/nuclei_rv32imafdc.dts 226 | Update TIMERCLK_FREQ to 32768 227 | Update CPUCLK_FREQ to 50000000 228 | Update memory@80000000 to memory@80000000, and update reg value. 229 | Update interrupt-controller@1c000000 to interrupt-controller@1c000000, and update reg value. 230 | Update clint@18031000 to clint@18031000, and update reg value. 231 | Update uart0@10013000 to uart0: serial@10013000, and update reg value. 232 | Update uart1@10023000 to uart1: serial@10023000, and update reg value. 233 | Update qspi0@10014000 to qspi0: spi@10014000, and update reg value. 234 | Update qspi2@10034000 to qspi2: spi@10034000, and update reg value. 235 | - rvsoc/nuclei_rv64imac.dts: 236 | Replace string evalsoc with rvsoc in rvsoc/nuclei_rv64imac.dts 237 | Update TIMERCLK_FREQ to 32768 238 | Update CPUCLK_FREQ to 50000000 239 | Update memory@80000000 to memory@80000000, and update reg value. 240 | Update interrupt-controller@1c000000 to interrupt-controller@1c000000, and update reg value. 241 | Update clint@18031000 to clint@18031000, and update reg value. 242 | Update uart0@10013000 to uart0: serial@10013000, and update reg value. 243 | Update uart1@10023000 to uart1: serial@10023000, and update reg value. 244 | Update qspi0@10014000 to qspi0: spi@10014000, and update reg value. 245 | Update qspi2@10034000 to qspi2: spi@10034000, and update reg value. 246 | - rvsoc/nuclei_rv32imac.dts: 247 | Replace string evalsoc with rvsoc in rvsoc/nuclei_rv32imac.dts 248 | Update TIMERCLK_FREQ to 32768 249 | Update CPUCLK_FREQ to 50000000 250 | Update memory@80000000 to memory@80000000, and update reg value. 251 | Update interrupt-controller@1c000000 to interrupt-controller@1c000000, and update reg value. 252 | Update clint@18031000 to clint@18031000, and update reg value. 253 | Update uart0@10013000 to uart0: serial@10013000, and update reg value. 254 | Update uart1@10023000 to uart1: serial@10023000, and update reg value. 255 | Update qspi0@10014000 to qspi0: spi@10014000, and update reg value. 256 | Update qspi2@10034000 to qspi2: spi@10034000, and update reg value. 257 | - rvsoc/nuclei_rv64imafdc.dts: 258 | Replace string evalsoc with rvsoc in rvsoc/nuclei_rv64imafdc.dts 259 | Update TIMERCLK_FREQ to 32768 260 | Update CPUCLK_FREQ to 50000000 261 | Update memory@80000000 to memory@80000000, and update reg value. 262 | Update interrupt-controller@1c000000 to interrupt-controller@1c000000, and update reg value. 263 | Update clint@18031000 to clint@18031000, and update reg value. 264 | Update uart0@10013000 to uart0: serial@10013000, and update reg value. 265 | Update uart1@10023000 to uart1: serial@10023000, and update reg value. 266 | Update qspi0@10014000 to qspi0: spi@10014000, and update reg value. 267 | Update qspi2@10034000 to qspi2: spi@10034000, and update reg value. 268 | 269 | >>>Updating uboot.cmd... 270 | Update kernel_addr to 0x83000000, rootfs_addr to 0x88300000, fdt_addr to 0x88000000 271 | ===generate successfully!=== 272 | 273 | Here are the reference build commands for compiling Linux SDK for you: 274 | $cd .. 275 | $make SOC=rvsoc CORE=ux900fd BOOT_MODE=sd freeloader bootimages 276 | $make SOC=rvsoc CORE=ux900fd BOOT_MODE=sd run_qemu 277 | Please adjust the compilation parameters according to your real environment. 278 | ~~~ 279 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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-------------------------------------------------------------------------------- 1 | variables: 2 | GIT_SUBMODULE_STRATEGY: recursive 3 | GET_SOURCES_ATTEMPTS: 5 4 | GIT_STRATEGY: fetch 5 | FF_USE_FASTZIP: "true" 6 | SHARELOC: "/home/xl_ci/linuxsdk/" 7 | QEMUPATH: "/home/share/devtools/qemu/linux64/2025.02" 8 | 9 | workflow: 10 | rules: 11 | - if: $CI_COMMIT_MESSAGE =~ /draft|wip|stash/i 12 | when: never 13 | # open merge quest and request target branch is dev_nuclei* 14 | - if: $CI_MERGE_REQUEST_TARGET_BRANCH_NAME =~ /dev_nuclei*/ && $CI_PIPELINE_SOURCE == "merge_request_event" 15 | # no open merge request and branch pipeline 16 | - if: $CI_COMMIT_BRANCH && $CI_OPEN_MERGE_REQUESTS 17 | when: never 18 | - if: $CI_COMMIT_BRANCH =~ /master|develop|dev_nuclei*|feature\/.|/ 19 | 20 | before_script: 21 | - source /home/share/devtools/env.sh 22 | - echo "Use qemu located in $QEMUPATH" 23 | - export PATH=$QEMUPATH/bin:$PATH 24 | 25 | stages: 26 | - build 27 | - run 28 | - manual 29 | 30 | cache: 31 | paths: 32 | - buildroot/dl 33 | 34 | .snippet_build_sdk: &snippet_build_sdk 35 | - echo ">>Clean previous build workspace" 36 | - make clean 37 | - echo ">>Show help message for $SOC - $CORE - $BOOT_MODE" 38 | - make help 39 | - echo ">>Build buildroot_initramfs_sysroot for $CORE" 40 | - | 41 | make -j buildroot_initramfs_sysroot > >(tee build_sysroot.log |grep '>>>') || { 42 | echo 'Show last 200 lines of build log' 43 | tail -n 200 build_sysroot.log 44 | xz -f -z build_sysroot.log 45 | exit 1 46 | } 47 | - xz -f -z build_sysroot.log 48 | - echo ">>Build multiple prefetch freeloader for $SOC - $CORE - $BOOT_MODE" 49 | - | 50 | export MAKEOPTS="SOC=$SOC CORE=$CORE BOOT_MODE=${BOOT_MODE}" 51 | export SELVAR0="CPU_HZ" 52 | export VARLIST0="30000000,50000000,100000000" 53 | export SELVAR1="SPFL1DCTRL1" 54 | export VARLIST1="0x0,0x1f,0xf,0x3f" 55 | bash .github/build_multiple_freeloader.sh > >(tee build_pref_freeloader.log) || { 56 | xz -f -z build_pref_freeloader.log 57 | exit 1 58 | } 59 | unset MAKEOPTS SELVAR0 VARLIST0 SELVAR1 VARLIST1 60 | - echo ">>Build multiple prefetch freeloader for $SOC - $CORE - $BOOT_MODE for sstc extension" 61 | - | 62 | export MAKEOPTS="SOC=$SOC CORE=$CORE BOOT_MODE=${BOOT_MODE} EXT_SSTC=y" 63 | export SELVAR0="CPU_HZ" 64 | export VARLIST0="30000000,50000000,100000000" 65 | export SELVAR1="SPFL1DCTRL1" 66 | export VARLIST1="0x0,0x1f,0xf,0x3f" 67 | bash .github/build_multiple_freeloader.sh > >(tee build_pref_sstc_freeloader.log) || { 68 | xz -f -z build_pref_sstc_freeloader.log 69 | exit 1 70 | } 71 | unset MAKEOPTS SELVAR0 VARLIST0 SELVAR1 VARLIST1 72 | - echo ">>Build multiple cache settings freeloader for $SOC - $CORE - $BOOT_MODE" 73 | - | 74 | export MAKEOPTS="SOC=$SOC CORE=$CORE BOOT_MODE=${BOOT_MODE}" 75 | export SELVAR0="CPU_HZ" 76 | export VARLIST0="30000000,50000000,100000000" 77 | export SELVAR1="CACHE_CTRL" 78 | export VARLIST1="0x100C1,0x10001" 79 | bash .github/build_multiple_freeloader.sh > >(tee build_cache_freeloader.log) || { 80 | xz -f -z build_cache_freeloader.log 81 | exit 1 82 | } 83 | unset MAKEOPTS SELVAR0 VARLIST0 SELVAR1 VARLIST1 84 | - xz -f -z build_cache_freeloader.log 85 | - echo ">>Build simulation freeloader for $SOC - $CORE - $BOOT_MODE" 86 | - | 87 | export MAKEOPTS="SOC=$SOC CORE=$CORE BOOT_MODE=${BOOT_MODE}" 88 | export SELVAR0="SIMULATION" 89 | export VARLIST0="1" 90 | export SELVAR1="SPFL1DCTRL1" 91 | export VARLIST1="0x0,0x1f,0xf,0x3f" 92 | bash .github/build_multiple_freeloader.sh > >(tee build_simu_freeloader.log) || { 93 | xz -f -z build_simu_freeloader.log 94 | exit 1 95 | } 96 | unset MAKEOPTS SELVAR0 VARLIST0 SELVAR1 VARLIST1 97 | - xz -f -z build_simu_freeloader.log 98 | - echo ">>Build simulation freeloader console=hvc0 for $SOC - $CORE - $BOOT_MODE" 99 | - | 100 | export MAKEOPTS="SOC=$SOC CORE=$CORE BOOT_MODE=${BOOT_MODE} HVC_CONSOLE=y" 101 | export SELVAR0="SIMULATION" 102 | export VARLIST0="1" 103 | export SELVAR1="SPFL1DCTRL1" 104 | export VARLIST1="0x0,0x1f,0xf,0x3f" 105 | bash .github/build_multiple_freeloader.sh > >(tee build_simu_hvc_freeloader.log) || { 106 | xz -f -z build_simu_hvc_freeloader.log 107 | exit 1 108 | } 109 | unset MAKEOPTS SELVAR0 VARLIST0 SELVAR1 VARLIST1 110 | - xz -f -z build_simu_hvc_freeloader.log 111 | - echo ">>Build freeloader for $SOC - $CORE - $BOOT_MODE" 112 | - | 113 | echo ">>>Build freeloader for default MHz" 114 | make freeloader > >(tee build_freeloader.log) || { 115 | xz -f -z build_freeloader.log 116 | exit 1 117 | } 118 | - xz -f -z build_freeloader.log 119 | - echo ">>Build and generate boot images for $SOC - $CORE - $BOOT_MODE" 120 | - | 121 | make preboot && make -j bootimages > >(tee build_bootimages.log) || { 122 | xz -f -z build_bootimages.log 123 | exit 1 124 | } 125 | - xz -f -z build_bootimages.log 126 | - | 127 | echo ">>Build and generate qemu images for $SOC - $CORE - $BOOT_MODE" 128 | #echo ">>> Apply workaround: change TIMERCLK_FREQ from 32768 to 1000000" 129 | #sed -i "s/32768/1000000/" conf/$SOC/*.dts 130 | #export TIMER_HZ=1000000 131 | make freeloader 132 | QEMU_FREELOADER=work/$SOC/freeloader_qemu.elf 133 | cp work/$SOC/freeloader/freeloader.elf $QEMU_FREELOADER 134 | make -j DISK_SIZE=128 gendisk > >(tee build_qemu_disk.log) || { 135 | xz -f -z build_qemu_disk.log 136 | exit 1 137 | } 138 | echo ">>> Reset workaround and source code, and rebuilt freeloader and boot images" 139 | git reset --hard 140 | make genboot 141 | xz -f -z build_qemu_disk.log 142 | unset TIMER_HZ 143 | - | 144 | RUNQEMUSH=work/$SOC/run_qemu.sh 145 | SHOWQEMUSH=work/$SOC/show_qemu.sh 146 | qemucmd=qemu-system-riscv32 147 | if [[ $CORE == *ux* ]] ; then 148 | qemucmd=qemu-system-riscv64 149 | fi 150 | echo "which $qemucmd" > $SHOWQEMUSH 151 | echo "$qemucmd --version" >> $SHOWQEMUSH 152 | echo "$qemucmd -M nuclei_${SOC},download=flashxip -cpu nuclei-${CORE},ext=${ARCH_EXT}_svpbmt_zicbom_sstc_sscofpmf_zba_zbb_zbc_zbs_zicond -smp 8 -m 2g -bios freeloader_qemu.elf -nographic -drive file=disk.img,if=sd,format=raw" > $RUNQEMUSH 153 | chmod +x $RUNQEMUSH 154 | chmod +x $SHOWQEMUSH 155 | - | 156 | if [ "x$SOC" == "xevalsoc" ] ; then 157 | echo ">>Will build xlspike simulation images only for evalsoc" 158 | echo ">>Build simulation target for $SOC - $CORE - $BOOT_MODE" 159 | make presim && make -j opensbi_sim > >(tee build_opensbi_payload.log) || { 160 | xz -f -z build_opensbi_payload.log 161 | exit 1 162 | } 163 | cp -f work/${SOC}/opensbi/platform/generic/firmware/fw_payload.elf work/${SOC}/fw_payload_xlspike.elf 164 | xz -f -z build_opensbi_payload.log 165 | fi 166 | - | 167 | genbootzip=work/${SOC}/genboot_artifacts_${CI_COMMIT_SHA::8}.zip 168 | echo "Zip all generated boot images and freeloader elfs to ${genbootzip}" 169 | rm -f ${genbootzip} 170 | zip -r ${genbootzip} work/${SOC}/boot.zip work/${SOC}/freeloader/freeloader.elf work/${SOC}/run_qemu.sh work/${SOC}/disk.img work/${SOC}/freeloader_*.elf work/${SOC}/buildstamp.txt work/${SOC}/fw_payload_xlspike.elf 171 | - echo "Please find generated freeloaders in $SHARELOC/$(git describe --always)" 172 | 173 | .snippet_run_sdk_in_xlspike: &snippet_run_sdk_in_xlspike 174 | - | 175 | if [ "x$SOC" != "xevalsoc" ] ; then 176 | echo ">>Will not run xlspike simulation for $SOC" 177 | exit 0 178 | fi 179 | # show xlspike help and version 180 | which xl_spike 181 | xl_spike -h 182 | # run xlspike with timeout 183 | timeout --foreground -s SIGKILL 16m xl_spike work/${SOC}/fw_payload_xlspike.elf > >(tee run_xlspike.log) || { 184 | if cat run_xlspike.log | grep "Run /init" ; then echo "Kernel boot successfully" ; else echo "Kernel boot failed" && exit 1; fi; 185 | if cat run_xlspike.log | grep "Welcome to" ; then echo "Pass simulation" && exit 0; else echo "Failed init process" && exit 1; fi; 186 | } 187 | 188 | .snippet_run_sdk_in_qemu: &snippet_run_sdk_in_qemu 189 | - echo ">>Run using qemu for $SOC - $CORE - $BOOT_MODE" 190 | - | 191 | cd work/$SOC 192 | # show qemu version 193 | bash show_qemu.sh 194 | cat run_qemu.sh 195 | # $(cat run_qemu.sh) is workaround for directly run bash run_qemu.sh 196 | # If do kill it will just kill bash process, the qemu process is not killed 197 | # SIGTERM is better for kill qemu 198 | timeout --foreground -s SIGTERM 3m $(cat run_qemu.sh) > >(tee run_qemu.log) || { 199 | if cat run_qemu.log | grep "Run /init" ; then echo "Kernel boot successfully" ; else echo "Kernel boot failed" && exit 1; fi; 200 | if cat run_qemu.log | grep "Welcome to" ; then echo "Pass simulation" && exit 0; else echo "Failed init process" && exit 1; fi; 201 | } 202 | 203 | .job_rules: 204 | interruptible: true 205 | # Rules are evaluated when the pipeline is created, and evaluated in order. 206 | # When a match is found, no more rules are checked 207 | rules: 208 | - if: $CI_JOB_STAGE == "manual" 209 | changes: 210 | - conf/**/* 211 | - .github/**/* 212 | - Makefile* 213 | - .gitlab-ci.yml 214 | - buildroot 215 | - opensbi 216 | - freeloader 217 | - linux 218 | - u-boot 219 | when: manual 220 | - changes: 221 | - conf/**/* 222 | - .github/**/* 223 | - Makefile* 224 | - .gitlab-ci.yml 225 | - buildroot 226 | - opensbi 227 | - freeloader 228 | - linux 229 | - u-boot 230 | tags: 231 | - env::shell 232 | - net::outside 233 | - user::xl_ci 234 | 235 | ## Job template for build linux sdk 236 | .build_linux_sdk_template: &build_linux_sdk_job_def 237 | extends: .job_rules 238 | artifacts: 239 | name: "bootimages-${SOC}-${CORE}-${BOOT_MODE}-${CI_COMMIT_SHA::8}" 240 | paths: 241 | - work/${SOC}/ 242 | - build_*.log.* 243 | expire_in: 2 day 244 | script: 245 | - *snippet_build_sdk 246 | 247 | ## Job template for run linux in xlspike 248 | .run_linux_sdk_xlspike_template: &run_linux_sdk_xlspike_job_def 249 | extends: .job_rules 250 | script: 251 | - *snippet_run_sdk_in_xlspike 252 | 253 | ## Job template for run linux in qemu 254 | .run_linux_sdk_qemu_template: &run_linux_sdk_qemu_job_def 255 | extends: .job_rules 256 | script: 257 | - *snippet_run_sdk_in_qemu 258 | 259 | ## Job template for build linux sdk 260 | .build_run_linux_sdk_template: &build_run_linux_sdk_job_def 261 | <<: *build_linux_sdk_job_def 262 | script: 263 | - *snippet_build_sdk 264 | - *snippet_run_sdk_in_qemu 265 | 266 | # Manual job template 267 | .build_linux_sdk_manual_template: &build_linux_sdk_manual_job_def 268 | extends: .job_rules 269 | # https://docs.gitlab.com/ci/jobs/job_control/#types-of-manual-jobs 270 | allow_failure: true 271 | artifacts: 272 | name: "bootimages-${SOC}-${CORE}-${BOOT_MODE}-${CI_COMMIT_SHA::8}" 273 | paths: 274 | - work/${SOC}/freeloader/freeloader.elf 275 | - work/${SOC}/boot.zip 276 | expire_in: 2 day 277 | script: 278 | - export MAKEOPTS="${MAKEOPTS}" 279 | - make preboot 280 | - BUILDBOOTIMAGES=0 bash .github/build_sdk.sh 281 | 282 | ## Job for build sdk 283 | # Build For ux900 Core, without FPU, flash boot mode 284 | build_ux900_flash: 285 | stage: build 286 | variables: 287 | SOC: "evalsoc" 288 | CORE: "ux900" 289 | ARCH_EXT: "" 290 | BOOT_MODE: "flash" 291 | parallel: 292 | matrix: 293 | - SOC: ["evalsoc"] 294 | <<: *build_linux_sdk_job_def 295 | 296 | ## Job for build sdk 297 | # Build For ux900 Core, without FPU, sd boot mode 298 | build_ux900_sd: 299 | stage: build 300 | variables: 301 | SOC: "evalsoc" 302 | CORE: "ux900" 303 | ARCH_EXT: "" 304 | BOOT_MODE: "sd" 305 | parallel: 306 | matrix: 307 | - SOC: ["evalsoc"] 308 | <<: *build_linux_sdk_job_def 309 | 310 | # Manual job for ux900 sd 311 | build_ux900_sd_manual: 312 | stage: manual 313 | needs: 314 | - job: build_ux900_sd 315 | variables: 316 | SOC: "evalsoc" 317 | CORE: "ux900" 318 | ARCH_EXT: "" 319 | BOOT_MODE: "sd" 320 | <<: *build_linux_sdk_manual_job_def 321 | 322 | # Manual job for ux900 flash 323 | build_ux900_flash_manual: 324 | stage: manual 325 | needs: 326 | - job: build_ux900_flash 327 | variables: 328 | SOC: "evalsoc" 329 | CORE: "ux900" 330 | ARCH_EXT: "" 331 | BOOT_MODE: "flash" 332 | <<: *build_linux_sdk_manual_job_def 333 | 334 | release_sources: 335 | extends: .job_rules 336 | stage: build 337 | needs: 338 | - job: build_ux900_flash 339 | script: 340 | - activate_swdev 341 | - make snapshot 342 | - snapshot_zip=($(ls -t1 GENERATED/snapshot/snapshot_*.zip)) 343 | - ls -lh ${snapshot_zip} 344 | - linuxsdk_zip=linuxsdk_${CI_COMMIT_REF_NAME//\//\_}_${CI_COMMIT_SHA::8}.zip 345 | - echo "Copy ${snapshot_zip} to ${linuxsdk_zip}" 346 | - cp -f ${snapshot_zip} ${linuxsdk_zip} 347 | # try to workaround ERROR: Uploading artifacts as "archive" to coordinator... 413 Request Entity Too Large 348 | # when uploading artifacts, must exclude buildroot/dl/toolchain-external-custom/ folder 349 | # because in gitlab-runner jobs, it is cached and many different versions are cached, this folder size is very big 350 | # so it can easily exceed Maximum artifacts size(MB) settings in admin ci_cd page 351 | - echo "Adding buildroot/dl folder into ${linuxsdk_zip}" 352 | - zip -9 -ur ${linuxsdk_zip} buildroot/dl -x "buildroot/dl/toolchain-external-custom/*" 353 | - ls -lh linuxsdk_*.zip 354 | artifacts: 355 | name: "nuclei_linuxsdk-job${CI_JOB_ID}_${CI_COMMIT_SHA::8}" 356 | paths: 357 | - linuxsdk_*_${CI_COMMIT_SHA::8}.zip 358 | expire_in: 2 day 359 | 360 | ## Job for run sim 361 | # Run For ux900 Core, without FPU, flash boot mode 362 | run_ux900_flash_xlspike: 363 | stage: run 364 | allow_failure: true 365 | dependencies: 366 | - build_ux900_flash 367 | variables: 368 | SOC: "evalsoc" 369 | CORE: "ux900" 370 | BOOT_MODE: "flash" 371 | <<: *run_linux_sdk_xlspike_job_def 372 | 373 | ## Job for run sim 374 | # Run For ux900 Core, without FPU, sd boot mode 375 | run_ux900_sd_xlspike: 376 | stage: run 377 | allow_failure: true 378 | dependencies: 379 | - build_ux900_sd 380 | variables: 381 | SOC: "evalsoc" 382 | CORE: "ux900" 383 | BOOT_MODE: "sd" 384 | <<: *run_linux_sdk_xlspike_job_def 385 | 386 | ## Job for run qemu 387 | # Run For ux900 Core, without FPU, flash boot mode 388 | run_ux900_flash_qemu: 389 | stage: run 390 | dependencies: 391 | - build_ux900_flash 392 | parallel: 393 | matrix: 394 | - SOC: ["evalsoc"] 395 | variables: 396 | CORE: "ux900" 397 | BOOT_MODE: "flash" 398 | <<: *run_linux_sdk_qemu_job_def 399 | 400 | ## Job for run qemu 401 | # Run For ux900 Core, without FPU, sd boot mode 402 | run_ux900_sd_qemu: 403 | stage: run 404 | dependencies: 405 | - build_ux900_sd 406 | parallel: 407 | matrix: 408 | - SOC: ["evalsoc"] 409 | variables: 410 | CORE: "ux900" 411 | BOOT_MODE: "sd" 412 | <<: *run_linux_sdk_qemu_job_def 413 | 414 | ## Job for build sdk 415 | # Build For ux900FD Core, with FPU, flash boot mode 416 | build_ux900fd_flash: 417 | stage: build 418 | dependencies: 419 | variables: 420 | SOC: "evalsoc" 421 | CORE: "ux900fd" 422 | ARCH_EXT: "" 423 | BOOT_MODE: "flash" 424 | parallel: 425 | matrix: 426 | - SOC: ["evalsoc"] 427 | <<: *build_linux_sdk_job_def 428 | 429 | ## Job for build sdk 430 | # Build For ux900FD Core, with FPU, sd boot mode 431 | build_ux900fd_sd: 432 | stage: build 433 | dependencies: 434 | variables: 435 | SOC: "evalsoc" 436 | CORE: "ux900fd" 437 | ARCH_EXT: "" 438 | BOOT_MODE: "sd" 439 | parallel: 440 | matrix: 441 | - SOC: ["evalsoc"] 442 | <<: *build_linux_sdk_job_def 443 | 444 | ## Job for build sdk 445 | # Build For ux900FD Core, with FPU, sd boot mode 446 | build_ux1000fd_sd: 447 | stage: build 448 | dependencies: 449 | variables: 450 | SOC: "evalsoc" 451 | CORE: "ux1000fd" 452 | ARCH_EXT: "" 453 | BOOT_MODE: "sd" 454 | ENABLE_LDSPEC: "1" 455 | parallel: 456 | matrix: 457 | - SOC: ["evalsoc"] 458 | <<: *build_linux_sdk_job_def 459 | 460 | # Manual job for ux900fd sd 461 | build_ux900fd_sd_manual: 462 | stage: manual 463 | needs: 464 | - job: build_ux900fd_sd 465 | variables: 466 | SOC: "evalsoc" 467 | CORE: "ux900fd" 468 | ARCH_EXT: "" 469 | BOOT_MODE: "sd" 470 | <<: *build_linux_sdk_manual_job_def 471 | 472 | # Manual job for ux900fd flash 473 | build_ux900fd_flash_manual: 474 | stage: manual 475 | needs: 476 | - job: build_ux900fd_flash 477 | variables: 478 | SOC: "evalsoc" 479 | CORE: "ux900fd" 480 | ARCH_EXT: "" 481 | BOOT_MODE: "flash" 482 | <<: *build_linux_sdk_manual_job_def 483 | 484 | ## Job for run sim 485 | # Run For ux900FD Core, with FPU, flash boot mode 486 | # This ux900fd init process will fail 487 | run_ux900fd_flash_xlspike: 488 | stage: run 489 | allow_failure: true 490 | dependencies: 491 | - build_ux900fd_flash 492 | variables: 493 | SOC: "evalsoc" 494 | CORE: "ux900fd" 495 | BOOT_MODE: "flash" 496 | <<: *run_linux_sdk_xlspike_job_def 497 | 498 | ## Job for run sim 499 | # Run For ux900FD Core, with FPU, sd boot mode 500 | # This ux900fd init process will fail 501 | run_ux900fd_sd_xlspike: 502 | stage: run 503 | allow_failure: true 504 | dependencies: 505 | - build_ux900fd_sd 506 | variables: 507 | SOC: "evalsoc" 508 | CORE: "ux900fd" 509 | BOOT_MODE: "sd" 510 | <<: *run_linux_sdk_xlspike_job_def 511 | 512 | ## Job for run qemu 513 | run_ux900fd_flash_qemu: 514 | stage: run 515 | dependencies: 516 | - build_ux900fd_flash 517 | parallel: 518 | matrix: 519 | - SOC: ["evalsoc"] 520 | variables: 521 | CORE: "ux900fd" 522 | BOOT_MODE: "flash" 523 | <<: *run_linux_sdk_qemu_job_def 524 | 525 | ## Job for run qemu 526 | run_ux900fd_sd_qemu: 527 | stage: run 528 | allow_failure: true 529 | dependencies: 530 | - build_ux900fd_sd 531 | parallel: 532 | matrix: 533 | - SOC: ["evalsoc"] 534 | variables: 535 | CORE: "ux900fd" 536 | BOOT_MODE: "sd" 537 | <<: *run_linux_sdk_qemu_job_def 538 | 539 | # Build and run for rv32 core 540 | build_run_rv32: 541 | stage: build 542 | variables: 543 | SOC: "evalsoc" 544 | ARCH_EXT: "" 545 | parallel: 546 | matrix: 547 | - CORE: ["u900", "u900fd"] 548 | BOOT_MODE: ["sd", "flash"] 549 | <<: *build_run_linux_sdk_job_def 550 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # Makefile Variable SOC 2 | ## SOC Supported: 3 | ## evalsoc: Nuclei Evaluation SoC 4 | SOC ?= evalsoc 5 | 6 | ## Makefile Variable CORE 7 | ## CORE Supported: 8 | ## ux600/ux900: rv64imac, lp64 9 | ## ux600fd/ux900fd: rv64imafdc, lp64d 10 | CORE ?= ux900fd 11 | 12 | ## Makefile Variable ARCH_EXT 13 | ARCH_EXT ?= 14 | 15 | ## Makefile Variable BOOT_MODE 16 | ## BOOT_MODE Supported: 17 | ## sd: boot from flash + sdcard, extra SDCard is required(kernel, rootfs, dtb placed in it) 18 | ## flash: boot from flash only, flash will contain images placed in sdcard of sd boot mode 19 | BOOT_MODE ?= sd 20 | ## QEMU Disk Size in MBytes 21 | ## DISK_SIZE should >= 64 22 | DISK_SIZE ?= 1024 23 | 24 | # Include Nuclei RISC-V Core Makefile 25 | include Makefile.core 26 | 27 | CORE_UPPER = $(shell echo $(CORE) | tr 'a-z' 'A-Z') 28 | check_item_exist = $(strip $(if $(filter 1, $(words $(1))),$(filter $(1), $(sort $(2))),)) 29 | CORE_ARCH_ABI = $($(CORE_UPPER)_CORE_ARCH_ABI) 30 | ifneq ($(words $(CORE_ARCH_ABI)), 2) 31 | $(warning Here we only support these cores: $(SUPPORTED_CORES)) 32 | $(error There is no coresponding ARCH_ABI setting for CORE $(CORE), please check Makefile.core) 33 | endif 34 | 35 | # Set ISA and ABI 36 | ISA := $(word 1, $(CORE_ARCH_ABI)) 37 | ABI := $(word 2, $(CORE_ARCH_ABI)) 38 | 39 | ifneq ($(findstring 32,$(ABI)),) 40 | XLEN := 32 41 | else 42 | XLEN := 64 43 | endif 44 | 45 | srcdir := $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) 46 | srcdir := $(srcdir:/=) 47 | wrkdir_root := $(CURDIR)/work 48 | 49 | # Set confdir and workdir for different SoC 50 | confdir := $(srcdir)/conf/$(SOC) 51 | wrkdir := $(wrkdir_root)/$(SOC) 52 | gendir := $(srcdir)/GENERATED 53 | backupdir := $(gendir)/backup/$(SOC) 54 | releasedir := $(gendir)/release 55 | snapshotdir := $(gendir)/snapshot 56 | gentimestamp := $(shell date -u +"%Y%m%dT%H%M%S") 57 | gengitdesver := $(shell which git >/dev/null && git describe --always --abbrev=10 --dirty 2>/dev/null) 58 | backupdir_snap := $(backupdir)/prebuilt_$(SOC)_$(shell date -u +"%Y%m%d-%H%M%S").zip 59 | sourcezip_snap := $(snapshotdir)/snapshot_$(gentimestamp)_$(gengitdesver).zip 60 | 61 | buildroot_srcdir := $(srcdir)/buildroot 62 | buildroot_initramfs_wrkdir := $(wrkdir)/buildroot_initramfs 63 | 64 | RISCV ?= $(buildroot_initramfs_wrkdir)/host 65 | RVPATH := $(RISCV)/bin:$(PATH) 66 | 67 | platform_dts := $(confdir)/nuclei_$(ISA).dts 68 | platform_preproc_dts := $(wrkdir)/nuclei_$(ISA).dts.preprocessed 69 | platform_dtb := $(wrkdir)/nuclei_$(ISA).dtb 70 | platform_sim_dts := $(confdir)/nuclei_$(ISA).dts 71 | platform_preproc_sim_dts := $(wrkdir)/nuclei_$(ISA)_sim.dts.preprocessed 72 | platform_sim_dtb := $(wrkdir)/nuclei_$(ISA)_sim.dtb 73 | 74 | platform_openocd_cfg := $(confdir)/openocd.cfg 75 | 76 | buildroot_initramfs_config := $(confdir)/buildroot_initramfs_$(ISA)_config 77 | 78 | buildroot_initramfs_tar := $(buildroot_initramfs_wrkdir)/images/rootfs.tar 79 | buildroot_initramfs_sysroot_stamp := $(wrkdir)/.buildroot_initramfs_sysroot 80 | buildroot_initramfs_sysroot := $(wrkdir)/buildroot_initramfs_sysroot 81 | 82 | linux_srcdir := $(srcdir)/linux 83 | linux_wrkdir := $(wrkdir)/linux 84 | linux_defconfig := $(confdir)/linux_$(ISA)_defconfig 85 | linux_gen_initramfs=$(linux_srcdir)/usr/gen_initramfs.sh 86 | 87 | vmlinux := $(linux_wrkdir)/vmlinux 88 | vmlinux_sim := $(linux_wrkdir)/vmlinux_sim 89 | linux_image := $(linux_wrkdir)/arch/riscv/boot/Image 90 | vmlinux_stripped := $(linux_wrkdir)/vmlinux-stripped 91 | vmlinux_bin := $(wrkdir)/vmlinux.bin 92 | vmlinux_sim_bin := $(wrkdir)/vmlinux_sim.bin 93 | 94 | initramfs := $(wrkdir)/initramfs.cpio.gz 95 | 96 | opensbi_srcdir := $(srcdir)/opensbi 97 | opensbi_wrkdir := $(wrkdir)/opensbi 98 | opensbi_plat_confdir := $(confdir)/opensbi 99 | opensbi_plat_srcdir := $(srcdir)/opensbi/platform/generic/nuclei/ 100 | opensbi_firmware_wrkdir := $(opensbi_wrkdir)/platform/generic/firmware 101 | opensbi_payload := $(opensbi_firmware_wrkdir)/fw_payload.elf 102 | opensbi_jumpbin := $(opensbi_firmware_wrkdir)/fw_jump.bin 103 | opensbi_jumpelf := $(opensbi_firmware_wrkdir)/fw_jump.elf 104 | 105 | opensbi_plat_deps := $(wildcard $(addprefix $(opensbi_plat_confdir)/, *.mk *.c *.h)) 106 | 107 | freeloader_srcdir := $(srcdir)/freeloader 108 | freeloader_wrkdir := $(wrkdir)/freeloader 109 | freeloader_confmk := $(confdir)/freeloader.mk 110 | freeloader_elf := $(freeloader_wrkdir)/freeloader.elf 111 | 112 | uboot_srcdir := $(srcdir)/u-boot 113 | uboot_wrkdir := $(wrkdir)/u-boot 114 | uboot_config := $(confdir)/uboot_$(ISA)_$(BOOT_MODE)_config 115 | uboot_bin := $(uboot_wrkdir)/u-boot.bin 116 | uboot_elf := $(uboot_wrkdir)/u-boot 117 | uboot_mkimage := $(uboot_wrkdir)/tools/mkimage 118 | 119 | uboot_cmd := $(confdir)/uboot.cmd 120 | 121 | # Directory for boot images stored in sdcard 122 | boot_wrkdir := $(wrkdir)/boot 123 | boot_zip := $(wrkdir)/boot.zip 124 | boot_ubootscr := $(boot_wrkdir)/boot.scr 125 | boot_image := $(boot_wrkdir)/Image.lz4 126 | boot_uimage_lz4 := $(boot_wrkdir)/uImage.lz4 127 | boot_uinitrd_lz4 := $(boot_wrkdir)/uInitrd.lz4 128 | boot_kernel_dtb := $(boot_wrkdir)/kernel.dtb 129 | 130 | # qemu related disk image 131 | qemu_disk := $(wrkdir)/disk.img 132 | 133 | buildstamp_txt := $(wrkdir)/buildstamp.txt 134 | fullboot_zip := $(wrkdir)/bootimages.zip 135 | 136 | # Files need to backup 137 | BACKUPMSG := $(wrkdir)/README.txt 138 | RUNLOG := $(wrkdir)/run.log 139 | FULL_BACKUPMSG := $(backupdir)/README.txt 140 | FILES2BACKUP := $(boot_zip) $(uboot_elf) $(freeloader_elf) $(vmlinux) $(linux_image) \ 141 | $(platform_preproc_dts) $(platform_dtb) $(opensbi_jumpelf) $(opensbi_payload) $(initramfs) \ 142 | $(addsuffix /.config, $(uboot_wrkdir) $(linux_wrkdir) $(buildroot_initramfs_wrkdir)) \ 143 | $(RUNLOG) $(BACKUPMSG) 144 | 145 | FILES2BACKUP := $(subst $(realpath $(srcdir))/,, $(realpath $(FILES2BACKUP))) 146 | 147 | # Include SoC related Makefile 148 | include $(confdir)/build.mk 149 | 150 | target := riscv64-unknown-linux-gnu 151 | CROSS_COMPILE := $(RISCV)/bin/$(target)- 152 | 153 | amp_bins = $(CORE1_APP_BIN) $(CORE2_APP_BIN) $(CORE3_APP_BIN) $(CORE4_APP_BIN) $(CORE5_APP_BIN) $(CORE6_APP_BIN) $(CORE7_APP_BIN) 154 | 155 | # Freq defines for dts preprocessing 156 | DTS_DEFINES := 157 | ifneq ($(TIMER_HZ),) 158 | DTS_DEFINES += -DTIMERCLK_FREQ=$(TIMER_HZ) 159 | endif 160 | ifneq ($(CPU_HZ),) 161 | DTS_DEFINES += -DCPUCLK_FREQ=$(CPU_HZ) 162 | endif 163 | ifneq ($(PERIPH_HZ),) 164 | DTS_DEFINES += -DPERIPHCLK_FREQ=$(PERIPH_HZ) 165 | endif 166 | ifneq ($(SIMULATION),) 167 | DTS_DEFINES += -DSIMULATION=$(SIMULATION) 168 | endif 169 | 170 | # xlspike is prebuilt and installed to PATH 171 | xlspike := xl_spike 172 | 173 | # openocd is prebuilt and installed to PATH 174 | openocd := openocd 175 | 176 | # qemu is prebuild and installed to PATH 177 | qemu := qemu-system-riscv$(XLEN) 178 | 179 | ## Makefile Variable GDBREMOTE 180 | # You can change GDBREMOTE to other gdb remotes 181 | ## eg. if you have started openocd server with (bindto 0.0.0.0 defined in openocd.cfg) 182 | ## make sure your machine can connect to remote machine 183 | ## in remote machine(ipaddr 192.168.43.199) which connect the hardware board, 184 | ## then you can change the GDBREMOTE to 192.168.43.199:3333 185 | ## GDBREMOTE ?= 192.168.43.199:3333 186 | GDBREMOTE ?= | $(openocd) -c \"gdb_port pipe; log_output openocd.log\" -f $(platform_openocd_cfg) 187 | 188 | target_gcc := $(CROSS_COMPILE)gcc 189 | target_gdb := $(CROSS_COMPILE)gdb 190 | 191 | .PHONY: all help 192 | all: help 193 | 194 | help: 195 | @echo "Current build configuration: SOC=$(SOC) CORE=$(CORE) BOOT_MODE=$(BOOT_MODE) RISCV_ARCH=$(ISA) RISCV_ABI=$(ABI)" 196 | @echo "Here is a list of make targets supported" 197 | @echo "" 198 | @echo "- buildroot_initramfs-menuconfig : run menuconfig for buildroot, configuration will be saved into conf/$(SOC)" 199 | @echo "- buildroot_busybox-menuconfig : run menuconfig for busybox in buildroot, configuration is not saved into conf/$(SOC)" 200 | @echo "- linux-menuconfig : run menuconfig for linux kernel, configuration will be saved into conf/$(SOC)" 201 | @echo "- uboot-menuconfig : run menuconfig for uboot, configuration will be saved into conf/$(SOC)" 202 | @echo "- buildroot_initramfs_sysroot : generate rootfs directory using buildroot" 203 | @echo "- initrd : generate initramfs cpio file" 204 | @echo "- bootimages : generate boot images for SDCard" 205 | @echo "- freeloader : generate freeloader(first stage loader) run in norflash" 206 | @echo "- upload_freeloader : upload freeloader into development board using openocd and gdb" 207 | @echo "- debug_freeloader : connect to board, and debug it using openocd and gdb" 208 | @echo "- run_openocd : Run openocd to connect hardware board and start gdb server" 209 | @echo "- linux : build linux image" 210 | @echo "- opensbi : build opensbi jump binary" 211 | @echo "- uboot : build uboot and generate uboot binary" 212 | @echo "- clean : clean this full workspace" 213 | @echo "- cleanboot : clean generated boot images" 214 | @echo "- cleanlinux : clean linux workspace" 215 | @echo "- cleanbuildroot : clean buildroot workspace" 216 | @echo "- cleansysroot : clean buildroot sysroot files" 217 | @echo "- cleanuboot : clean u-boot workspace" 218 | @echo "- cleanfreeloader : clean freeloader generated objects" 219 | @echo "- cleanopensbi : clean opensbi workspace" 220 | @echo "- backup : backup generated prebuilt images into $(backupdir) folder, you need to input backup message when this target is triggered" 221 | @echo "- snapshot : snapshot linux sdk source code into $(snapshotdir) folder, this snapshot zip files will not contain any vcs control files" 222 | @echo "- preboot : If you run sim target before, and want to change to bootimages target, run this to prepare environment" 223 | @echo "- presim : deprecated, If you run bootimages target before, and want to change to sim target, run this to prepare environment" 224 | @echo "- sim : deprecated, run opensbi + linux payload in simulation using xl_spike" 225 | @echo "" 226 | @echo "Main targets used frequently depending on your user case" 227 | @echo "If you want to run linux on development board, please run preboot, freeloader, bootimages targets" 228 | @echo "Deprecated: If you want to run linux in simulation using xlspike, please run presim, sim targets" 229 | @echo "Deprecated: The xl-spike support will be deprecated in future release" 230 | 231 | 232 | $(target_gcc): buildroot_initramfs_sysroot 233 | 234 | $(wrkdir): 235 | mkdir -p $@ 236 | 237 | $(buildroot_initramfs_wrkdir)/.config: 238 | rm -rf $(dir $@) 239 | mkdir -p $(dir $@) 240 | cp $(buildroot_initramfs_config) $@ 241 | $(MAKE) -C ${buildroot_srcdir} RISCV=$(RISCV) O=$(buildroot_initramfs_wrkdir) olddefconfig 242 | 243 | # buildroot_initramfs provides gcc 244 | $(buildroot_initramfs_tar): $(buildroot_srcdir) $(buildroot_initramfs_wrkdir)/.config $(buildroot_initramfs_config) 245 | $(MAKE) -C $< RISCV=$(RISCV) O=$(buildroot_initramfs_wrkdir) 246 | 247 | .PHONY: buildroot_initramfs-menuconfig 248 | buildroot_initramfs-menuconfig: $(buildroot_initramfs_wrkdir)/.config $(buildroot_srcdir) 249 | $(MAKE) -C $(dir $<) O=$(buildroot_initramfs_wrkdir) menuconfig 250 | $(MAKE) -C $(dir $<) O=$(buildroot_initramfs_wrkdir) savedefconfig 251 | cp $(dir $<)/defconfig $(buildroot_initramfs_config) 252 | 253 | .PHONY: buildroot_busybox-menuconfig 254 | buildroot_busybox-menuconfig: $(buildroot_initramfs_wrkdir)/.config $(buildroot_srcdir) $(target_gcc) 255 | $(MAKE) -C $(dir $<) O=$(buildroot_initramfs_wrkdir) busybox-menuconfig 256 | 257 | $(buildroot_initramfs_sysroot_stamp): $(buildroot_initramfs_tar) 258 | mkdir -p $(buildroot_initramfs_sysroot) 259 | tar -xpf $< -C $(buildroot_initramfs_sysroot) --exclude ./dev --exclude ./usr/share/locale 260 | touch $@ 261 | 262 | .PHONY: initrd linux 263 | 264 | $(linux_wrkdir)/.config: $(linux_defconfig) $(target_gcc) 265 | mkdir -p $(dir $@) 266 | cp -p $< $@ 267 | $(MAKE) -C $(linux_srcdir) O=$(linux_wrkdir) ARCH=riscv CROSS_COMPILE=$(CROSS_COMPILE) olddefconfig 268 | 269 | $(vmlinux): linux 270 | 271 | $(linux_image): linux 272 | @echo "Linux image is generated $@" 273 | 274 | initrd: $(initramfs) 275 | @echo "initramfs cpio file is generated into $<" 276 | 277 | linux: $(linux_wrkdir)/.config 278 | $(MAKE) -C $(linux_srcdir) O=$(linux_wrkdir) \ 279 | CONFIG_INITRAMFS_ROOT_UID=$(shell id -u) \ 280 | CONFIG_INITRAMFS_ROOT_GID=$(shell id -g) \ 281 | ARCH=riscv \ 282 | CROSS_COMPILE=$(CROSS_COMPILE) \ 283 | PATH=$(RVPATH) \ 284 | vmlinux Image 285 | 286 | $(initramfs): $(buildroot_initramfs_sysroot) $(linux_image) 287 | $(INITRAMFS_PRECMD) 288 | # Copy files required for xec network startup 289 | [ -f $(confdir)/S03net ] && cp -af $(confdir)/S03net $(buildroot_initramfs_sysroot)/etc/init.d/ || true 290 | cd $(linux_wrkdir) && \ 291 | $(linux_gen_initramfs) \ 292 | -o $@ -u $(shell id -u) -g $(shell id -g) \ 293 | $(confdir)/initramfs.txt \ 294 | $(buildroot_initramfs_sysroot) 295 | 296 | $(vmlinux_stripped): $(vmlinux) 297 | PATH=$(RVPATH) $(target)-strip -o $@ $< 298 | 299 | $(vmlinux_bin): $(vmlinux) 300 | PATH=$(RVPATH) $(target)-objcopy -O binary $< $@ 301 | 302 | $(vmlinux_sim): $(linux_wrkdir)/.config 303 | $(MAKE) -C $(linux_srcdir) O=$(linux_wrkdir) \ 304 | CONFIG_INITRAMFS_SOURCE="$(confdir)/initramfs.txt $(buildroot_initramfs_sysroot)" \ 305 | CONFIG_INITRAMFS_ROOT_UID=$(shell id -u) \ 306 | CONFIG_INITRAMFS_ROOT_GID=$(shell id -g) \ 307 | ARCH=riscv \ 308 | CROSS_COMPILE=$(CROSS_COMPILE) \ 309 | PATH=$(RVPATH) \ 310 | vmlinux 311 | cp -f $(vmlinux) $@ 312 | 313 | $(vmlinux_sim_bin): $(vmlinux_sim) 314 | PATH=$(RVPATH) $(target)-objcopy -O binary $< $@ 315 | 316 | .PHONY: linux-menuconfig gen-dts gen-simdts 317 | linux-menuconfig: $(linux_wrkdir)/.config 318 | $(MAKE) -C $(linux_srcdir) O=$(dir $<) ARCH=riscv CROSS_COMPILE=$(CROSS_COMPILE) menuconfig 319 | $(MAKE) -C $(linux_srcdir) O=$(dir $<) ARCH=riscv CROSS_COMPILE=$(CROSS_COMPILE) savedefconfig 320 | cp $(dir $<)/defconfig $(linux_defconfig) 321 | 322 | $(platform_preproc_dts): gen-dts 323 | echo "Platform preprocessed dts located in $(platform_preproc_dts), processed with defines $(DTS_DEFINES)" 324 | 325 | gen-dts: $(platform_dts) $(target_gcc) 326 | $(target_gcc) -E -nostdinc -undef -x assembler-with-cpp $(DTS_DEFINES) $(platform_dts) -o $(platform_preproc_dts) 327 | 328 | $(platform_preproc_sim_dts): gen-simdts 329 | echo "Platform sim preprocessed dts located in $(platform_preproc_sim_dts), processed with defines $(DTS_DEFINES)" 330 | 331 | gen-simdts: $(platform_sim_dts) $(target_gcc) 332 | $(target_gcc) -E -nostdinc -undef -x assembler-with-cpp $(DTS_DEFINES) -DSIMULATION=2 $(platform_sim_dts) -o $(platform_preproc_sim_dts) 333 | 334 | $(platform_dtb) : $(platform_preproc_dts) $(target_gcc) 335 | dtc -O dtb -o $(platform_dtb) $(platform_preproc_dts) 336 | 337 | $(platform_sim_dtb) : $(platform_preproc_sim_dts) $(target_gcc) 338 | dtc -O dtb -o $(platform_sim_dtb) $(platform_preproc_sim_dts) 339 | 340 | .PHONY: opensbi opensbi_cp_plat 341 | 342 | $(opensbi_jumpbin): opensbi 343 | 344 | opensbi: $(target_gcc) $(opensbi_plat_deps) 345 | mkdir -p $(opensbi_plat_srcdir) 346 | cp -u $(opensbi_plat_confdir)/* $(opensbi_plat_srcdir) 347 | $(MAKE) -C $(opensbi_srcdir) O=$(opensbi_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) BUILD_INFO=y \ 348 | PLATFORM_RISCV_ABI=$(ABI) PLATFORM_RISCV_ISA=$(ISA) PLATFORM_RISCV_XLEN=$(XLEN) \ 349 | PLATFORM=generic FW_TEXT_START=$(FW_TEXT_START) 350 | 351 | # internal usage for xlspike, deprecated 352 | $(opensbi_payload): $(opensbi_srcdir) $(vmlinux_sim_bin) $(platform_sim_dtb) $(opensbi_plat_deps) 353 | rm -rf $(opensbi_wrkdir) 354 | mkdir -p $(opensbi_wrkdir) 355 | mkdir -p $(opensbi_plat_srcdir) 356 | cp -u $(opensbi_plat_confdir)/* $(opensbi_plat_srcdir) 357 | $(MAKE) -C $(opensbi_srcdir) O=$(opensbi_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) BUILD_INFO=y \ 358 | PLATFORM_RISCV_ABI=$(ABI) PLATFORM_RISCV_ISA=$(ISA) PLATFORM_RISCV_XLEN=$(XLEN) \ 359 | PLATFORM=generic FW_TEXT_START=$(FW_TEXT_START) \ 360 | FW_PAYLOAD_PATH=$(vmlinux_sim_bin) FW_FDT_PATH=$(platform_sim_dtb) 361 | 362 | $(buildroot_initramfs_sysroot): $(buildroot_initramfs_sysroot_stamp) 363 | 364 | .PHONY: buildroot_initramfs_sysroot vmlinux 365 | buildroot_initramfs_sysroot: $(buildroot_initramfs_sysroot) 366 | vmlinux: $(vmlinux) 367 | 368 | .PHONY: bootimages 369 | bootimages: $(boot_zip) 370 | @echo "SDCard boot images are generated into $(boot_zip) and $(boot_wrkdir)" 371 | @echo "You can extract the $(boot_zip) to SDCard and insert the SDCard back to board" 372 | @echo "If freeloader is already flashed to board's norflash, then you can reset power of the board" 373 | @echo "Then you can open UART terminal with baudrate 115200, you will be able to see kernel boot message" 374 | 375 | $(boot_wrkdir): 376 | mkdir -p $@ 377 | 378 | $(boot_ubootscr): $(uboot_cmd) $(uboot_mkimage) 379 | $(uboot_mkimage) -A riscv -T script -O linux -C none -a 0 -e 0 -n "bootscript" -d $(uboot_cmd) $@ 380 | 381 | # UIMAGE_AE_CMD is defined in conf/$(SOC)/build.mk 382 | # For DDR_BASE = 0x80000000, eg. 383 | # UIMAGE_AE_CMD := -a 0x80400000 -e 0x80400000 384 | $(boot_uimage_lz4): $(linux_image) 385 | # For xlen = 32 target, the uncompressed kernel image is 25M, but for rv64, it is only 15M 386 | # compressed kernel image, facing an uncompress error -93 in Uncompressing Kernel Image stage 387 | # when decompressed to 0x810000000, which only left 15.75M space, so we changed kernel decompress 388 | # address to 0x83000000, to left about 48M space to decompress 389 | lz4 $< $(boot_image) -f -9 390 | $(uboot_mkimage) -A riscv -O linux -T kernel -C lz4 $(UIMAGE_AE_CMD) -n Linux -d $(boot_image) $@ 391 | rm -f $(boot_image) 392 | 393 | $(boot_uinitrd_lz4): $(initramfs) 394 | lz4 $(initramfs) $(initramfs).lz4 -f -9 -l 395 | $(uboot_mkimage) -A riscv -T ramdisk -C lz4 -n Initrd -d $(initramfs).lz4 $(boot_uinitrd_lz4) 396 | 397 | $(boot_kernel_dtb): $(platform_preproc_dts) 398 | dtc -O dtb -o $(boot_kernel_dtb) $(platform_preproc_dts) 399 | 400 | $(boot_zip): $(boot_wrkdir) $(boot_ubootscr) $(boot_uimage_lz4) $(boot_uinitrd_lz4) $(boot_kernel_dtb) 401 | rm -f $(boot_zip) 402 | cd $(boot_wrkdir) && zip -q -r $(boot_zip) . 403 | 404 | .PHONY: uboot uboot-menuconfig 405 | uboot: $(uboot_wrkdir)/.config $(platform_dtb) 406 | # use external device tree binary for uboot 407 | $(MAKE) -C $(uboot_srcdir) O=$(uboot_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) EXT_DTB=$(platform_dtb) all 408 | 409 | uboot-menuconfig: $(uboot_wrkdir)/.config $(uboot_srcdir) 410 | $(MAKE) -C $(uboot_srcdir) O=$(uboot_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) menuconfig 411 | $(MAKE) -C $(uboot_srcdir) O=$(uboot_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) savedefconfig 412 | cp $(dir $<)/defconfig $(uboot_config) 413 | 414 | $(uboot_wrkdir)/.config: $(target_gcc) $(uboot_config) 415 | mkdir -p $(uboot_wrkdir) 416 | cp $(uboot_config) $@ 417 | $(MAKE) -C $(uboot_srcdir) O=$(uboot_wrkdir) CROSS_COMPILE=$(CROSS_COMPILE) olddefconfig 418 | 419 | $(uboot_mkimage) $(uboot_bin): uboot 420 | @echo "Uboot binary is generated into $<" 421 | 422 | .PHONY: freeloader upload_freeloader debug_freeloader run_openocd 423 | 424 | freeloader: $(freeloader_elf) 425 | @echo "freeloader is generated in $(freeloader_elf)" 426 | @echo "You can download this elf into development board using make upload_freeloader" 427 | @echo "or using openocd and gdb to achieve it" 428 | @echo "If you want to use gdb and openocd to debug it" 429 | @echo "You can run make debug_freeloader to connect to the running target cpu" 430 | 431 | ifeq ($(BOOT_MODE),flash) 432 | # Internal used 433 | .PHONY: prepare4m freeloader4m 434 | prepare4m: buildroot_initramfs_sysroot 435 | find $(buildroot_initramfs_wrkdir)/build/ -type f -wholename "*busybox*/.config" | xargs sed -i '/CONFIG_STATIC/cCONFIG_STATIC=y' 436 | rm -rf $(buildroot_initramfs_wrkdir)/images/* 437 | rm -rf $(buildroot_initramfs_sysroot) $(buildroot_initramfs_sysroot_stamp) 438 | $(MAKE) -C $(buildroot_srcdir) O=$(buildroot_initramfs_wrkdir) busybox-rebuild 439 | $(MAKE) CORE=$(CORE) buildroot_initramfs_sysroot 440 | sed -i '/sbin\/getty/cconsole::respawn:/bin/sh' $(buildroot_initramfs_sysroot)/etc/inittab 441 | #sed -i '/init\.d/d' $(buildroot_initramfs_sysroot)/etc/inittab 442 | rm -rf $(buildroot_initramfs_sysroot)/lib/* 443 | $(MAKE) CORE=$(CORE) cleanboot bootimages 444 | 445 | freeloader4m: prepare4m $(freeloader_elf) 446 | @echo "freeloader is generated in $(freeloader_elf)" 447 | @echo "You can download this elf into development board using make upload_freeloader" 448 | @echo "or using openocd and gdb to achieve it" 449 | @echo "File size of freeloader is as below:" 450 | size $(freeloader_elf) 451 | ls -lh $(freeloader_elf) 452 | endif 453 | 454 | ifeq ($(BOOT_MODE),sd) 455 | $(freeloader_elf): $(freeloader_srcdir) $(uboot_bin) $(opensbi_jumpbin) $(platform_dtb) $(amp_bins) 456 | else 457 | $(freeloader_elf): $(freeloader_srcdir) $(uboot_bin) $(opensbi_jumpbin) $(platform_dtb) $(boot_zip) $(amp_bins) 458 | endif 459 | mkdir -p $(freeloader_wrkdir) 460 | $(MAKE) -C $(freeloader_srcdir) O=$(freeloader_wrkdir) ARCH=$(ISA) ABI=$(ABI) ARCH_EXT=$(ARCH_EXT) \ 461 | BOOT_MODE=$(BOOT_MODE) CROSS_COMPILE=$(CROSS_COMPILE) \ 462 | OPENSBI_BIN=$(opensbi_jumpbin) UBOOT_BIN=$(uboot_bin) DTB=$(platform_dtb) \ 463 | KERNEL_BIN=$(boot_uimage_lz4) INITRD_BIN=$(boot_uinitrd_lz4) CONFIG_MK=$(freeloader_confmk) \ 464 | CORE1_APP_BIN=$(CORE1_APP_BIN) CORE2_APP_BIN=$(CORE2_APP_BIN) CORE3_APP_BIN=$(CORE3_APP_BIN) \ 465 | CORE4_APP_BIN=$(CORE4_APP_BIN) CORE5_APP_BIN=$(CORE5_APP_BIN) CORE6_APP_BIN=$(CORE6_APP_BIN) CORE7_APP_BIN=$(CORE7_APP_BIN) 466 | 467 | upload_freeloader: $(freeloader_elf) 468 | $(target_gdb) $< -ex "set remotetimeout 240" \ 469 | -ex "target remote $(GDBREMOTE)" \ 470 | --batch -ex "monitor reset halt" -ex "load" \ 471 | -ex "monitor resume" -ex "quit" 472 | 473 | # Please make sure freeloader, linux and uboot are generated 474 | debug_freeloader: 475 | $(target_gdb) $(freeloader_elf) -ex "set remotetimeout 240" \ 476 | -ex "target remote $(GDBREMOTE)" \ 477 | -ex "set confirm off" -ex "add-symbol-file $(vmlinux)" \ 478 | -ex "add-symbol-file $(opensbi_jumpelf)" \ 479 | -ex "add-symbol-file $(uboot_elf)" -ex "set confirm on" 480 | 481 | # Internal used 482 | upload_sbipayload: $(opensbi_payload) 483 | $(target_gdb) $< -ex "set remotetimeout 240" \ 484 | -ex "target remote $(GDBREMOTE)" \ 485 | --batch -ex "monitor reset halt" -ex "load" \ 486 | -ex "monitor resume" -ex "quit" 487 | 488 | # Internal used, please make sure freeloader and linux are generated 489 | debug_sbipayload: 490 | $(target_gdb) $(opensbi_payload) -ex "set remotetimeout 240" \ 491 | -ex "target remote $(GDBREMOTE)" \ 492 | -ex "set confirm off" -ex "add-symbol-file $(vmlinux)" \ 493 | -ex "add-symbol-file $(opensbi_payload)" \ 494 | -ex "set confirm on" 495 | 496 | run_openocd: 497 | @echo "Start openocd server" 498 | $(openocd) -f $(platform_openocd_cfg) 499 | 500 | 501 | .PHONY: distclean clean cleanboot cleanlinux cleanbuildroot cleansysroot cleanfreeloader clean_freeloader cleanopensbi prepare presim preboot 502 | distclean: 503 | rm -rf $(wrkdir_root) 504 | 505 | clean: cleanfreeloader 506 | rm -rf $(wrkdir) 507 | 508 | cleanboot: 509 | rm -rf $(boot_wrkdir) $(boot_zip) $(initramfs) $(initramfs).lz4 510 | 511 | cleanlinux: 512 | rm -rf $(linux_wrkdir) $(vmlinux_bin) $(vmlinux_sim_bin) 513 | 514 | cleanbuildroot: 515 | rm -rf $(buildroot_initramfs_wrkdir) 516 | 517 | cleansysroot: 518 | rm -rf $(buildroot_initramfs_sysroot) $(buildroot_initramfs_sysroot_stamp) 519 | 520 | cleanuboot: 521 | rm -rf $(uboot_wrkdir) 522 | 523 | clean_freeloader: cleanfreeloader 524 | 525 | cleanfreeloader: 526 | $(MAKE) -C $(freeloader_srcdir) O=$(freeloader_wrkdir) clean 527 | 528 | cleanopensbi: 529 | rm -rf $(opensbi_wrkdir) 530 | 531 | # If you change your make target from sim to bootimages, you need to run preboot first 532 | preboot: prepare 533 | 534 | prepare: 535 | rm -rf $(vmlinux_bin) $(vmlinux) $(linux_image) $(vmlinux_sim_bin) $(vmlinux_sim) $(opensbi_firmware_wrkdir) 536 | 537 | .PHONY: sim opensbi_sim presim 538 | 539 | # If you change your make target from bootimages to sim, you need to run presim first 540 | presim: prepare 541 | opensbi_sim: $(opensbi_payload) 542 | 543 | # Deprecated, internal usage for xlspike 544 | sim: $(opensbi_payload) 545 | $(xlspike) --isa=$(ISA) $(opensbi_payload) 546 | 547 | .PHONY: gendisk run_qemu 548 | 549 | gendisk: $(qemu_disk) 550 | @echo "QEMU SDCard Disk Image is generated to $(qemu_disk)" 551 | 552 | $(qemu_disk): $(boot_zip) 553 | cd $(boot_wrkdir) && dd if=/dev/zero of=$(qemu_disk) bs=$(DISK_SIZE)M count=1 554 | echo "Please make sure mformat version is >= 4.0.24, current version $(shell mformat --version)" 555 | cd $(boot_wrkdir) && mformat -F -h 64 -s 32 -t $$(($(DISK_SIZE)-1)) :: -i $(qemu_disk) || rm -f $(qemu_disk) 556 | cd $(boot_wrkdir) && mcopy -i $(qemu_disk) boot.scr kernel.dtb uImage.lz4 uInitrd.lz4 :: || rm -f $(qemu_disk) 557 | 558 | run_qemu: $(qemu_disk) $(freeloader_elf) 559 | @echo "Run on qemu for simulation" 560 | $(qemu) --version 561 | $(qemu) $(QEMU_MACHINE_OPTS) -cpu nuclei-$(CORE),ext=$(ARCH_EXT)_svpbmt_zicbom_sstc_sscofpmf_zba_zbb_zbc_zbs_zicond -bios $(freeloader_elf) -nographic -drive file=$(qemu_disk),if=sd,format=raw 562 | 563 | .PHONY: backup snapshot genstamp genboot 564 | # backup your build 565 | backup: $(wrkdir) 566 | mkdir -p $(backupdir) 567 | @echo "Backup SOC=$(SOC) built configs linux image, freeloader, opensbi, uboot, rootfs, dts and dtb into $(backupdir_snap)" 568 | @echo "Backup Date : $(shell date)" > $(BACKUPMSG) 569 | read -p 'Input your backup message: ' backupmsg ; echo "Backup messasge: $$backupmsg" >> $(BACKUPMSG) 570 | @echo "> git log --oneline -1" >> $(BACKUPMSG) 571 | git log --oneline -1 >> $(BACKUPMSG) 572 | @echo "> git describe --always --abbrev=10 --dirty" >> $(BACKUPMSG) 573 | git describe --always --abbrev=10 --dirty >> $(BACKUPMSG) 574 | @echo "> git status -b -s" >> $(BACKUPMSG) 575 | git status -b -s >> $(BACKUPMSG) 576 | @echo "> git submodule" >> $(BACKUPMSG) 577 | git submodule >> $(BACKUPMSG) 578 | zip -q -r $(backupdir_snap) $(FILES2BACKUP) 579 | # tar -czf $(backupdir_snap) $(FILES2BACKUP) 580 | @echo "\n-----------------------------------------" >> $(FULL_BACKUPMSG) 581 | @md5sum $(backupdir_snap) >> $(FULL_BACKUPMSG) 582 | @cat $(BACKUPMSG) >> $(FULL_BACKUPMSG) 583 | @echo "empty content in run log file $(RUNLOG)" 584 | @echo "" > $(RUNLOG) 585 | 586 | # snapshot source code 587 | snapshot: 588 | @git-archive-all --version 589 | @echo "Archive linux sdk source code snapshot to $(sourcezip_snap)" 590 | @mkdir -p $(snapshotdir) 591 | git-archive-all --prefix=nuclei-linux-sdk $(sourcezip_snap) 592 | 593 | # generate build stamp 594 | genstamp: $(wrkdir) 595 | @echo "Record build date and build git information into $(buildstamp_txt)" 596 | @echo "Build Date : $(shell date)" > $(buildstamp_txt) 597 | @echo "Build Configuration: SOC=$(SOC) CORE=$(CORE) ARCH_EXT=$(ARCH_EXT) BOOT_MODE=$(BOOT_MODE)" >> $(buildstamp_txt) 598 | @echo "Repo Git Information:" >> $(buildstamp_txt) 599 | git log --oneline -1 >> $(buildstamp_txt) 600 | git describe --always --abbrev=10 --dirty >> $(buildstamp_txt) 601 | git submodule >> $(buildstamp_txt) 602 | @echo "Repo Workspace Information:" >> $(buildstamp_txt) 603 | git status -b -s >> $(buildstamp_txt) 604 | 605 | # generate boot images and freeloader zip 606 | genboot: genstamp freeloader bootimages 607 | @rm -f $(fullboot_zip) 608 | cd $(wrkdir) && zip -q -r -j $(fullboot_zip) $(boot_zip) $(freeloader_elf) $(buildstamp_txt) 609 | @echo "SDCard boot images and freeloader elf are generated into $(fullboot_zip)" 610 | -------------------------------------------------------------------------------- /conf/evalsoc/nuclei_rv64imac.dts: -------------------------------------------------------------------------------- 1 | /dts-v1/; 2 | 3 | #ifndef SIMULATION 4 | #define SIMULATION 0 5 | #endif 6 | 7 | #if SIMULATION == 2 8 | #undef TIMERCLK_FREQ 9 | #define TIMERCLK_FREQ 500000 10 | #else 11 | #ifndef TIMERCLK_FREQ 12 | #define TIMERCLK_FREQ 32768 13 | #endif 14 | #endif 15 | 16 | #ifndef CPUCLK_FREQ 17 | #define CPUCLK_FREQ 50000000 18 | #endif 19 | #ifndef PERIPHCLK_FREQ 20 | #define PERIPHCLK_FREQ CPUCLK_FREQ 21 | #endif 22 | 23 | / { 24 | #address-cells = <2>; 25 | #size-cells = <2>; 26 | compatible = "nuclei,evalsoc"; 27 | model = "nuclei,evalsoc"; 28 | dma-noncoherent; 29 | chosen { 30 | #if SIMULATION == 2 31 | bootargs = "earlycon=sbi console=hvc0"; 32 | #else 33 | bootargs = "earlycon=sbi console=ttyNUC0"; 34 | #endif 35 | stdout-path = "serial0"; 36 | }; 37 | 38 | aliases { 39 | serial0 = &uart0; 40 | serial1 = &uart1; 41 | }; 42 | 43 | cpus { 44 | #address-cells = <1>; 45 | #size-cells = <0>; 46 | timebase-frequency = ; 47 | cpu0: cpu@0 { 48 | device_type = "cpu"; 49 | reg = <0>; 50 | status = "okay"; 51 | compatible = "riscv"; 52 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 53 | riscv,cbom-block-size =<64>; 54 | mmu-type = "riscv,sv39"; 55 | clock-frequency = ; 56 | cpu0_intc: interrupt-controller { 57 | #interrupt-cells = <1>; 58 | interrupt-controller; 59 | compatible = "riscv,cpu-intc"; 60 | }; 61 | }; 62 | cpu1: cpu@1 { 63 | device_type = "cpu"; 64 | reg = <1>; 65 | status = "okay"; 66 | compatible = "riscv"; 67 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 68 | riscv,cbom-block-size =<64>; 69 | mmu-type = "riscv,sv39"; 70 | clock-frequency = ; 71 | cpu1_intc: interrupt-controller { 72 | #interrupt-cells = <1>; 73 | interrupt-controller; 74 | compatible = "riscv,cpu-intc"; 75 | }; 76 | }; 77 | cpu2: cpu@2 { 78 | device_type = "cpu"; 79 | reg = <2>; 80 | status = "okay"; 81 | compatible = "riscv"; 82 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 83 | riscv,cbom-block-size =<64>; 84 | mmu-type = "riscv,sv39"; 85 | clock-frequency = ; 86 | cpu2_intc: interrupt-controller { 87 | #interrupt-cells = <1>; 88 | interrupt-controller; 89 | compatible = "riscv,cpu-intc"; 90 | }; 91 | }; 92 | cpu3: cpu@3 { 93 | device_type = "cpu"; 94 | reg = <3>; 95 | status = "okay"; 96 | compatible = "riscv"; 97 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 98 | riscv,cbom-block-size =<64>; 99 | mmu-type = "riscv,sv39"; 100 | clock-frequency = ; 101 | cpu3_intc: interrupt-controller { 102 | #interrupt-cells = <1>; 103 | interrupt-controller; 104 | compatible = "riscv,cpu-intc"; 105 | }; 106 | }; 107 | cpu4: cpu@4 { 108 | device_type = "cpu"; 109 | reg = <4>; 110 | status = "okay"; 111 | compatible = "riscv"; 112 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 113 | riscv,cbom-block-size =<64>; 114 | mmu-type = "riscv,sv39"; 115 | clock-frequency = ; 116 | cpu4_intc: interrupt-controller { 117 | #interrupt-cells = <1>; 118 | interrupt-controller; 119 | compatible = "riscv,cpu-intc"; 120 | }; 121 | }; 122 | cpu5: cpu@5 { 123 | device_type = "cpu"; 124 | reg = <5>; 125 | status = "okay"; 126 | compatible = "riscv"; 127 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 128 | riscv,cbom-block-size =<64>; 129 | mmu-type = "riscv,sv39"; 130 | clock-frequency = ; 131 | cpu5_intc: interrupt-controller { 132 | #interrupt-cells = <1>; 133 | interrupt-controller; 134 | compatible = "riscv,cpu-intc"; 135 | }; 136 | }; 137 | cpu6: cpu@6 { 138 | device_type = "cpu"; 139 | reg = <6>; 140 | status = "okay"; 141 | compatible = "riscv"; 142 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 143 | riscv,cbom-block-size =<64>; 144 | mmu-type = "riscv,sv39"; 145 | clock-frequency = ; 146 | cpu6_intc: interrupt-controller { 147 | #interrupt-cells = <1>; 148 | interrupt-controller; 149 | compatible = "riscv,cpu-intc"; 150 | }; 151 | }; 152 | cpu7: cpu@7 { 153 | device_type = "cpu"; 154 | reg = <7>; 155 | status = "okay"; 156 | compatible = "riscv"; 157 | riscv,isa = "rv64imac_zicbom_svpbmt_sstc_sscofpmf"; 158 | riscv,cbom-block-size =<64>; 159 | mmu-type = "riscv,sv39"; 160 | clock-frequency = ; 161 | cpu7_intc: interrupt-controller { 162 | #interrupt-cells = <1>; 163 | interrupt-controller; 164 | compatible = "riscv,cpu-intc"; 165 | }; 166 | }; 167 | }; 168 | 169 | memory@80000000 { 170 | device_type = "memory"; 171 | reg = <0x0 0x80000000 0x0 0x7E000000>; 172 | }; 173 | 174 | soc { 175 | #address-cells = <2>; 176 | #size-cells = <2>; 177 | compatible = "nuclei,evalsoc", "simple-bus"; 178 | ranges; 179 | }; 180 | 181 | /* Used for Uboot SBI Console */ 182 | console { 183 | compatible = "sbi,console"; 184 | }; 185 | 186 | hfclk: hfclk { 187 | #clock-cells = <0>; 188 | compatible = "fixed-clock"; 189 | clock-frequency = ; 190 | clock-output-names = "hfclk"; 191 | }; 192 | 193 | xecclk: xecclk { 194 | #clock-cells = <0>; 195 | compatible = "fixed-clock"; 196 | clock-frequency = <25000000>; 197 | }; 198 | 199 | pmu { 200 | compatible = "riscv,pmu"; 201 | /* https://perf.wiki.kernel.org/index.php/Tutorial#Events */ 202 | /* eg. perf stat -B coremark */ 203 | /* eg. perf stat -e cycles -e instructions -e cache-misses -e branches -e branch-misses coremark */ 204 | /* eg. perf stat -e cycles -e instructions -e L1-icache-load-misses -e L1-dcache-load-misses -e iTLB-load-misses -e dTLB-load-misses coremark */ 205 | /* Note: in the dts comment, v2 means your Nuclei RISC-V CPU need to support HPM_VER = Version 2 */ 206 | riscv,event-to-mhpmevent = 207 | /* Type #0 SBI_PMU_HW_CPU_CYCLES -> Nuclei event sel=0 idx=1 Cycle count */ 208 | <0x00001 0x00000000 0x00000010>, 209 | /* Type #0 SBI_PMU_HW_INSTRUCTIONS -> Nuclei event sel=0 idx=2 Retired instruction count */ 210 | <0x00002 0x00000000 0x00000020>, 211 | /* Type #0 SBI_PMU_HW_CACHE_REFERENCES -> v2, Nuclei event sel=1 idx=8 L2-Cache access count */ 212 | <0x00003 0x00000000 0x00000081>, 213 | /* Type #0 SBI_PMU_HW_CACHE_MISSES -> v2, Nuclei event sel=1 idx=9 L2-Cache miss count */ 214 | <0x00004 0x00000000 0x00000091>, 215 | /* Type #0 SBI_PMU_HW_BRANCH_INSTRUCTIONS -> v2, Nuclei event sel=2 idx=2 Branch instruction commit count */ 216 | <0x00005 0x00000000 0x00000022>, 217 | /* Type #0 SBI_PMU_HW_BRANCH_MISSES -> v2, Nuclei event sel=2 idx=3 Branch predict fail count */ 218 | <0x00006 0x00000000 0x00000032>, 219 | /* Type #0 SBI_PMU_HW_BUS_CYCLES -> v2, Nuclei event sel=1 idx=10 Memory bus request count */ 220 | <0x00007 0x00000000 0x000000A1>, 221 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_FRONTEND -> v2, Nuclei event sel=1 idx=11 IFU stall cycle count */ 222 | <0x00008 0x00000000 0x000000B1>, 223 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_BACKEND -> v2, Nuclei event sel=1 idx=12 EXU stall cycle count */ 224 | <0x00009 0x00000000 0x000000C1>, 225 | /* Type #0 SBI_PMU_HW_REF_CPU_CYCLES -> v2, Nuclei event sel=1 idx=13 Timer count */ 226 | <0x0000A 0x00000000 0x000000D1>, 227 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=0 Dcache read count */ 228 | <0x10000 0x00000000 0x00000003>, 229 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=1 Dcache read miss count */ 230 | <0x10001 0x00000000 0x00000013>, 231 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=2 Dcache write count */ 232 | <0x10002 0x00000000 0x00000023>, 233 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=3 Dcache write miss count */ 234 | <0x10003 0x00000000 0x00000033>, 235 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=4 Dcache prefetch count */ 236 | <0x10004 0x00000000 0x00000043>, 237 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=5 Dcache prefetch miss count */ 238 | <0x10005 0x00000000 0x00000053>, 239 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=6 Icache read count */ 240 | <0x10008 0x00000000 0x00000063>, 241 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=1 Icache read miss count */ 242 | <0x10009 0x00000000 0x00000011>, 243 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=8 Icache prefetch count */ 244 | <0x1000C 0x00000000 0x00000083>, 245 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=9 Icache prefetch miss count */ 246 | <0x1000D 0x00000000 0x00000093>, 247 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 248 | <0x10010 0x00000000 0x000000A3>, 249 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 250 | <0x10011 0x00000000 0x000000B3>, 251 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 252 | <0x10012 0x00000000 0x000000C3>, 253 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 254 | <0x10013 0x00000000 0x000000D3>, 255 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 256 | <0x10014 0x00000000 0x000000E3>, 257 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 258 | <0x10015 0x00000000 0x000000F3>, 259 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=16 DTLB read count */ 260 | <0x10018 0x00000000 0x00000103>, 261 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=17 DTLB read miss count */ 262 | <0x10019 0x00000000 0x00000113>, 263 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=18 DTLB write count */ 264 | <0x1001A 0x00000000 0x00000123>, 265 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=19 DTLB write miss count */ 266 | <0x1001B 0x00000000 0x00000133>, 267 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=20 ITLB read count */ 268 | <0x10020 0x00000000 0x00000143>, 269 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=3 ITLB read miss count */ 270 | <0x10021 0x00000000 0x00000031>, 271 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=22 BTB read count */ 272 | <0x10028 0x00000000 0x00000163>, 273 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=23 BTB read miss count */ 274 | <0x10029 0x00000000 0x00000173>, 275 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=24 BTB write count */ 276 | <0x1002A 0x00000000 0x00000183>, 277 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=25 BTB write miss count */ 278 | <0x1002B 0x00000000 0x00000193>, 279 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 280 | <0x10030 0x00000000 0x000000A3>, 281 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 282 | <0x10031 0x00000000 0x000000B3>, 283 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 284 | <0x10032 0x00000000 0x000000C3>, 285 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 286 | <0x10033 0x00000000 0x000000D3>, 287 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 288 | <0x10034 0x00000000 0x000000E3>, 289 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 290 | <0x10035 0x00000000 0x000000F3>; 291 | /* make hpm3-6 counter available for all hardware events */ 292 | riscv,event-to-mhpmcounters = 293 | <0x00001 0x0000000A 0x00000078>, 294 | <0x10000 0x00010035 0x00000078>; 295 | /* Raw event: eg. perf stat -e cycles -e instructions -e r00000190 -e r00000010 coremark */ 296 | riscv,raw-event-to-mhpmcounters = 297 | /* Event Types 0 events - 0x1 Cycle count */ 298 | <0x00000000 0x00000010 0xffffffff 0xffffffff 0x00000078>, 299 | /* Event Types 0 events - 0x2 Retired instruction count */ 300 | <0x00000000 0x00000020 0xffffffff 0xffffffff 0x00000078>, 301 | /* Event Types 0 events - 0x3 Integer load instruction (includes LR) */ 302 | <0x00000000 0x00000030 0xffffffff 0xffffffff 0x00000078>, 303 | /* Event Types 0 events - 0x4 Integer store instruction (includes SC) */ 304 | <0x00000000 0x00000040 0xffffffff 0xffffffff 0x00000078>, 305 | /* Event Types 0 events - 0x5 Atomic memory operation (do not include LR and SC) */ 306 | <0x00000000 0x00000050 0xffffffff 0xffffffff 0x00000078>, 307 | /* Event Types 0 events - 0x6 System instruction */ 308 | <0x00000000 0x00000060 0xffffffff 0xffffffff 0x00000078>, 309 | /* Event Types 0 events - 0x7 Integer computational instruction(excluding multiplication/division/remainder) */ 310 | <0x00000000 0x00000070 0xffffffff 0xffffffff 0x00000078>, 311 | /* Event Types 0 events - 0x8 Conditional branch */ 312 | <0x00000000 0x00000080 0xffffffff 0xffffffff 0x00000078>, 313 | /* Event Types 0 events - 0x9 Taken conditional branch */ 314 | <0x00000000 0x00000090 0xffffffff 0xffffffff 0x00000078>, 315 | /* Event Types 0 events - 0xa JAL instruction */ 316 | <0x00000000 0x000000a0 0xffffffff 0xffffffff 0x00000078>, 317 | /* Event Types 0 events - 0xb JALR instruction */ 318 | <0x00000000 0x000000b0 0xffffffff 0xffffffff 0x00000078>, 319 | /* Event Types 0 events - 0xc Return instruction */ 320 | <0x00000000 0x000000c0 0xffffffff 0xffffffff 0x00000078>, 321 | /* Event Types 0 events - 0xd Control transfer instruction (CBR+JAL+JALR) */ 322 | <0x00000000 0x000000d0 0xffffffff 0xffffffff 0x00000078>, 323 | /* Event Types 0 events - 0xe fence instruction(Not include fence.i) */ 324 | <0x00000000 0x000000e0 0xffffffff 0xffffffff 0x00000078>, 325 | /* Event Types 0 events - 0xf Integer multiplication instruction */ 326 | <0x00000000 0x000000f0 0xffffffff 0xffffffff 0x00000078>, 327 | /* Event Types 0 events - 0x10 Integer division/remainder instruction */ 328 | <0x00000000 0x00000100 0xffffffff 0xffffffff 0x00000078>, 329 | /* Event Types 0 events - 0x11 Floating-point load instruction */ 330 | <0x00000000 0x00000110 0xffffffff 0xffffffff 0x00000078>, 331 | /* Event Types 0 events - 0x12 Floating-point store instruction */ 332 | <0x00000000 0x00000120 0xffffffff 0xffffffff 0x00000078>, 333 | /* Event Types 0 events - 0x13 Floating-point addition/subtraction */ 334 | <0x00000000 0x00000130 0xffffffff 0xffffffff 0x00000078>, 335 | /* Event Types 0 events - 0x14 Floating-point multiplication */ 336 | <0x00000000 0x00000140 0xffffffff 0xffffffff 0x00000078>, 337 | /* Event Types 0 events - 0x15 Floating-point fused multiply-add (FMADD, FMSUB,FNMSUB, FNMADD) */ 338 | <0x00000000 0x00000150 0xffffffff 0xffffffff 0x00000078>, 339 | /* Event Types 0 events - 0x16 Floating-point division or square-root */ 340 | <0x00000000 0x00000160 0xffffffff 0xffffffff 0x00000078>, 341 | /* Event Types 0 events - 0x17 Other floating-point instruction */ 342 | <0x00000000 0x00000170 0xffffffff 0xffffffff 0x00000078>, 343 | /* Event Types 0 events - 0x18 Conditional branch(BXX) prediction fail */ 344 | <0x00000000 0x00000180 0xffffffff 0xffffffff 0x00000078>, 345 | /* Event Types 0 events - 0x19 JALR prediction fail */ 346 | <0x00000000 0x00000190 0xffffffff 0xffffffff 0x00000078>, 347 | /* Event Types 0 events - 0x1a POP prediction fail */ 348 | <0x00000000 0x000001a0 0xffffffff 0xffffffff 0x00000078>, 349 | /* Event Types 0 events - 0x1b FENCEI instruction */ 350 | <0x00000000 0x000001b0 0xffffffff 0xffffffff 0x00000078>, 351 | /* Event Types 0 events - 0x1c SFENCE instruction */ 352 | <0x00000000 0x000001c0 0xffffffff 0xffffffff 0x00000078>, 353 | /* Event Types 0 events - 0x1d ECALL instruction */ 354 | <0x00000000 0x000001d0 0xffffffff 0xffffffff 0x00000078>, 355 | /* Event Types 0 events - 0x1e EXCEPTION instruction */ 356 | <0x00000000 0x000001e0 0xffffffff 0xffffffff 0x00000078>, 357 | /* Event Types 0 events - 0x1f INTERRUPT instruction */ 358 | <0x00000000 0x000001f0 0xffffffff 0xffffffff 0x00000078>, 359 | /* Event Types 1 events - 0x1 Icache read miss count */ 360 | <0x00000000 0x00000011 0xffffffff 0xffffffff 0x00000078>, 361 | /* Event Types 1 events - 0x2 Dcache read/write miss count */ 362 | <0x00000000 0x00000021 0xffffffff 0xffffffff 0x00000078>, 363 | /* Event Types 1 events - 0x3 ITLB read miss count */ 364 | <0x00000000 0x00000031 0xffffffff 0xffffffff 0x00000078>, 365 | /* Event Types 1 events - 0x4 DTLB read/write miss count */ 366 | <0x00000000 0x00000041 0xffffffff 0xffffffff 0x00000078>, 367 | /* Event Types 1 events - 0x5 Main TLB miss count */ 368 | <0x00000000 0x00000051 0xffffffff 0xffffffff 0x00000078>, 369 | /* Event Types 1 events - 0x6 Reserved */ 370 | <0x00000000 0x00000061 0xffffffff 0xffffffff 0x00000078>, 371 | /* Event Types 1 events - 0x7 Reserved */ 372 | <0x00000000 0x00000071 0xffffffff 0xffffffff 0x00000078>, 373 | /* Event Types 1 events - 0x8 L2-Cache access count */ 374 | <0x00000000 0x00000081 0xffffffff 0xffffffff 0x00000078>, 375 | /* Event Types 1 events - 0x9 L2-Cache miss count */ 376 | <0x00000000 0x00000091 0xffffffff 0xffffffff 0x00000078>, 377 | /* Event Types 1 events - 0xa Memory bus request count */ 378 | <0x00000000 0x000000a1 0xffffffff 0xffffffff 0x00000078>, 379 | /* Event Types 1 events - 0xb IFU stall cycle count */ 380 | <0x00000000 0x000000b1 0xffffffff 0xffffffff 0x00000078>, 381 | /* Event Types 1 events - 0xc EXU stall cycle count */ 382 | <0x00000000 0x000000c1 0xffffffff 0xffffffff 0x00000078>, 383 | /* Event Types 1 events - 0xd Timer count */ 384 | <0x00000000 0x000000d1 0xffffffff 0xffffffff 0x00000078>, 385 | /* Event Types 2 events - 0x1 VPU store instruction commit count */ 386 | <0x00000000 0x00000012 0xffffffff 0xffffffff 0x00000078>, 387 | /* Event Types 2 events - 0x2 Reserved */ 388 | <0x00000000 0x00000022 0xffffffff 0xffffffff 0x00000078>, 389 | /* Event Types 2 events - 0x3 VPU load instruction commit count */ 390 | <0x00000000 0x00000032 0xffffffff 0xffffffff 0x00000078>, 391 | /* Event Types 2 events - 0x4 VPU computational instruction commit count */ 392 | <0x00000000 0x00000042 0xffffffff 0xffffffff 0x00000078>, 393 | /* Event Types 2 events - 0x5 Branch predict fail count */ 394 | <0x00000000 0x00000052 0xffffffff 0xffffffff 0x00000078>, 395 | /* Event Types 3 events - 0x1 Icache read count */ 396 | <0x00000000 0x00000013 0xffffffff 0xffffffff 0x00000078>, 397 | /* Event Types 3 events - 0x2 L2-Cache read hit count */ 398 | <0x00000000 0x00000023 0xffffffff 0xffffffff 0x00000078>, 399 | /* Event Types 3 events - 0x3 DTLB write count */ 400 | <0x00000000 0x00000033 0xffffffff 0xffffffff 0x00000078>, 401 | /* Event Types 3 events - 0x4 L2-Cache write miss count */ 402 | <0x00000000 0x00000043 0xffffffff 0xffffffff 0x00000078>, 403 | /* Event Types 3 events - 0x5 Reserved */ 404 | <0x00000000 0x00000053 0xffffffff 0xffffffff 0x00000078>, 405 | /* Event Types 3 events - 0x6 Icache prefetch miss count */ 406 | <0x00000000 0x00000063 0xffffffff 0xffffffff 0x00000078>, 407 | /* Event Types 3 events - 0x7 BTB write count */ 408 | <0x00000000 0x00000073 0xffffffff 0xffffffff 0x00000078>, 409 | /* Event Types 3 events - 0x8 L2-Cache read miss count */ 410 | <0x00000000 0x00000083 0xffffffff 0xffffffff 0x00000078>, 411 | /* Event Types 3 events - 0x9 DTLB write miss count */ 412 | <0x00000000 0x00000093 0xffffffff 0xffffffff 0x00000078>, 413 | /* Event Types 3 events - 0xa ITLB read count */ 414 | <0x00000000 0x000000a3 0xffffffff 0xffffffff 0x00000078>, 415 | /* Event Types 3 events - 0xb BTB read count */ 416 | <0x00000000 0x000000b3 0xffffffff 0xffffffff 0x00000078>, 417 | /* Event Types 3 events - 0xc Dcache prefetch count */ 418 | <0x00000000 0x000000c3 0xffffffff 0xffffffff 0x00000078>, 419 | /* Event Types 3 events - 0xd Icache prefetch count */ 420 | <0x00000000 0x000000d3 0xffffffff 0xffffffff 0x00000078>, 421 | /* Event Types 3 events - 0xe Dcache write count */ 422 | <0x00000000 0x000000e3 0xffffffff 0xffffffff 0x00000078>, 423 | /* Event Types 3 events - 0xf DTLB read count */ 424 | <0x00000000 0x000000f3 0xffffffff 0xffffffff 0x00000078>, 425 | /* Event Types 3 events - 0x10 Dcache write miss count */ 426 | <0x00000000 0x00000103 0xffffffff 0xffffffff 0x00000078>, 427 | /* Event Types 3 events - 0x11 BTB write miss count */ 428 | <0x00000000 0x00000113 0xffffffff 0xffffffff 0x00000078>, 429 | /* Event Types 3 events - 0x12 Dcache read count */ 430 | <0x00000000 0x00000123 0xffffffff 0xffffffff 0x00000078>, 431 | /* Event Types 3 events - 0x13 L2-Cache write hit count */ 432 | <0x00000000 0x00000133 0xffffffff 0xffffffff 0x00000078>, 433 | /* Event Types 3 events - 0x14 L2-Cache prefetch miss count */ 434 | <0x00000000 0x00000143 0xffffffff 0xffffffff 0x00000078>, 435 | /* Event Types 3 events - 0x15 BTB read miss count */ 436 | <0x00000000 0x00000153 0xffffffff 0xffffffff 0x00000078>, 437 | /* Event Types 3 events - 0x16 Dcache read miss count */ 438 | <0x00000000 0x00000163 0xffffffff 0xffffffff 0x00000078>, 439 | /* Event Types 3 events - 0x17 L2-Cache prefetch hit count */ 440 | <0x00000000 0x00000173 0xffffffff 0xffffffff 0x00000078>, 441 | /* Event Types 3 events - 0x18 DTLB read miss count */ 442 | <0x00000000 0x00000183 0xffffffff 0xffffffff 0x00000078>; 443 | }; 444 | 445 | plic0: interrupt-controller@1c000000 { 446 | #interrupt-cells = <1>; 447 | compatible = "riscv,plic0"; 448 | interrupt-controller; 449 | riscv,ndev = <53>; 450 | interrupts-extended = 451 | <&cpu0_intc 11 &cpu0_intc 9 452 | &cpu1_intc 11 &cpu1_intc 9 453 | &cpu2_intc 11 &cpu2_intc 9 454 | &cpu3_intc 11 &cpu3_intc 9 455 | &cpu4_intc 11 &cpu4_intc 9 456 | &cpu5_intc 11 &cpu5_intc 9 457 | &cpu6_intc 11 &cpu6_intc 9 458 | &cpu7_intc 11 &cpu7_intc 9>; 459 | reg = <0x0 0x1c000000 0x0 0x4000000>; 460 | }; 461 | 462 | clint0: clint@18031000 { 463 | #interrupt-cells = <1>; 464 | compatible = "riscv,clint0"; 465 | reg = <0x0 0x18031000 0x0 0xC000>; 466 | interrupts-extended = 467 | <&cpu0_intc 3 &cpu0_intc 7 468 | &cpu1_intc 3 &cpu1_intc 7 469 | &cpu2_intc 3 &cpu2_intc 7 470 | &cpu3_intc 3 &cpu3_intc 7 471 | &cpu4_intc 3 &cpu4_intc 7 472 | &cpu5_intc 3 &cpu5_intc 7 473 | &cpu6_intc 3 &cpu6_intc 7 474 | &cpu7_intc 3 &cpu7_intc 7>; 475 | clocks = <&hfclk>; 476 | }; 477 | 478 | uart0: serial@10013000 { 479 | compatible = "nuclei,uart0"; 480 | reg = <0x0 0x10013000 0x0 0x1000>; 481 | interrupt-parent = <&plic0>; 482 | interrupts = <33>; 483 | clocks = <&hfclk>; 484 | clock-frequency = ; 485 | status = "okay"; 486 | }; 487 | 488 | uart1: serial@10023000 { 489 | compatible = "nuclei,uart0"; 490 | reg = <0x0 0x10023000 0x0 0x1000>; 491 | interrupt-parent = <&plic0>; 492 | interrupts = <34>; 493 | clocks = <&hfclk>; 494 | clock-frequency = ; 495 | status = "disabled"; 496 | }; 497 | 498 | #if SIMULATION == 0 499 | qspi0: spi@10014000 { 500 | compatible = "nuclei,spi0"; 501 | reg = <0x0 0x10014000 0x0 0x1000>; 502 | interrupt-parent = <&plic0>; 503 | interrupts = <35>; 504 | num-cs = <1>; 505 | #address-cells = <1>; 506 | #size-cells = <0>; 507 | clocks = <&hfclk>; 508 | status = "okay"; 509 | 510 | flash@0 { 511 | compatible = "jedec,spi-nor"; 512 | reg = <0>; 513 | spi-max-frequency = <1000000>; 514 | m25p,fast-read; 515 | spi-tx-bus-width = <1>; 516 | spi-rx-bus-width = <1>; 517 | }; 518 | }; 519 | 520 | qspi2: spi@10034000 { 521 | compatible = "nuclei,spi0"; 522 | reg = <0x0 0x10034000 0x0 0x1000>; 523 | interrupt-parent = <&plic0>; 524 | interrupts = <37>; 525 | num-cs = <1>; 526 | #address-cells = <1>; 527 | #size-cells = <0>; 528 | clocks = <&hfclk>; 529 | status = "okay"; 530 | 531 | mmc@0 { 532 | compatible = "mmc-spi-slot"; 533 | reg = <0>; 534 | spi-max-frequency = <20000000>; 535 | voltage-ranges = <3300 3300>; 536 | disable-wp; 537 | spi-tx-bus-width = <1>; 538 | spi-rx-bus-width = <1>; 539 | }; 540 | }; 541 | #endif 542 | 543 | xec0: xec@10002000 { 544 | compatible = "nuclei,xec"; 545 | reg = <0x0 0x10002000 0x0 0x1000>; 546 | interrupt-parent = <&plic0>; 547 | interrupts = <8>; 548 | clocks = <&xecclk>; 549 | /*local-mac-address = [00 2b 20 21 03 23];*/ 550 | phy-handle = <&rtl8211f>; 551 | phy-mode = "rgmii"; 552 | 553 | status = "disabled"; 554 | mdio { 555 | compatible = "snps,dwmac-mdio"; 556 | #address-cells = <1>; 557 | #size-cells = <0>; 558 | 559 | rtl8211f: ethernet-phy@0 { 560 | compatible = "ethernet-phy-ieee802.3-c22"; 561 | reg = <0>; 562 | }; 563 | }; 564 | }; 565 | 566 | sysrst@18030ff0 { 567 | compatible = "nuclei,sysrst"; 568 | reg = <0x0 0x18030ff0 0x0 0x0>; 569 | }; 570 | }; 571 | -------------------------------------------------------------------------------- /conf/evalsoc/nuclei_rv64imafdc.dts: -------------------------------------------------------------------------------- 1 | /dts-v1/; 2 | 3 | #ifndef SIMULATION 4 | #define SIMULATION 0 5 | #endif 6 | 7 | #if SIMULATION == 2 8 | #undef TIMERCLK_FREQ 9 | #define TIMERCLK_FREQ 500000 10 | #else 11 | #ifndef TIMERCLK_FREQ 12 | #define TIMERCLK_FREQ 32768 13 | #endif 14 | #endif 15 | 16 | #ifndef CPUCLK_FREQ 17 | #define CPUCLK_FREQ 50000000 18 | #endif 19 | #ifndef PERIPHCLK_FREQ 20 | #define PERIPHCLK_FREQ CPUCLK_FREQ 21 | #endif 22 | 23 | / { 24 | #address-cells = <2>; 25 | #size-cells = <2>; 26 | compatible = "nuclei,evalsoc"; 27 | model = "nuclei,evalsoc"; 28 | dma-noncoherent; 29 | chosen { 30 | #if SIMULATION == 2 31 | bootargs = "earlycon=sbi console=hvc0"; 32 | #else 33 | bootargs = "earlycon=sbi console=ttyNUC0"; 34 | #endif 35 | stdout-path = "serial0"; 36 | }; 37 | 38 | aliases { 39 | serial0 = &uart0; 40 | serial1 = &uart1; 41 | }; 42 | 43 | cpus { 44 | #address-cells = <1>; 45 | #size-cells = <0>; 46 | timebase-frequency = ; 47 | cpu0: cpu@0 { 48 | device_type = "cpu"; 49 | reg = <0>; 50 | status = "okay"; 51 | compatible = "riscv"; 52 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 53 | riscv,cbom-block-size =<64>; 54 | mmu-type = "riscv,sv39"; 55 | clock-frequency = ; 56 | cpu0_intc: interrupt-controller { 57 | #interrupt-cells = <1>; 58 | interrupt-controller; 59 | compatible = "riscv,cpu-intc"; 60 | }; 61 | }; 62 | cpu1: cpu@1 { 63 | device_type = "cpu"; 64 | reg = <1>; 65 | status = "okay"; 66 | compatible = "riscv"; 67 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 68 | riscv,cbom-block-size =<64>; 69 | mmu-type = "riscv,sv39"; 70 | clock-frequency = ; 71 | cpu1_intc: interrupt-controller { 72 | #interrupt-cells = <1>; 73 | interrupt-controller; 74 | compatible = "riscv,cpu-intc"; 75 | }; 76 | }; 77 | cpu2: cpu@2 { 78 | device_type = "cpu"; 79 | reg = <2>; 80 | status = "okay"; 81 | compatible = "riscv"; 82 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 83 | riscv,cbom-block-size =<64>; 84 | mmu-type = "riscv,sv39"; 85 | clock-frequency = ; 86 | cpu2_intc: interrupt-controller { 87 | #interrupt-cells = <1>; 88 | interrupt-controller; 89 | compatible = "riscv,cpu-intc"; 90 | }; 91 | }; 92 | cpu3: cpu@3 { 93 | device_type = "cpu"; 94 | reg = <3>; 95 | status = "okay"; 96 | compatible = "riscv"; 97 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 98 | riscv,cbom-block-size =<64>; 99 | mmu-type = "riscv,sv39"; 100 | clock-frequency = ; 101 | cpu3_intc: interrupt-controller { 102 | #interrupt-cells = <1>; 103 | interrupt-controller; 104 | compatible = "riscv,cpu-intc"; 105 | }; 106 | }; 107 | cpu4: cpu@4 { 108 | device_type = "cpu"; 109 | reg = <4>; 110 | status = "okay"; 111 | compatible = "riscv"; 112 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 113 | riscv,cbom-block-size =<64>; 114 | mmu-type = "riscv,sv39"; 115 | clock-frequency = ; 116 | cpu4_intc: interrupt-controller { 117 | #interrupt-cells = <1>; 118 | interrupt-controller; 119 | compatible = "riscv,cpu-intc"; 120 | }; 121 | }; 122 | cpu5: cpu@5 { 123 | device_type = "cpu"; 124 | reg = <5>; 125 | status = "okay"; 126 | compatible = "riscv"; 127 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 128 | riscv,cbom-block-size =<64>; 129 | mmu-type = "riscv,sv39"; 130 | clock-frequency = ; 131 | cpu5_intc: interrupt-controller { 132 | #interrupt-cells = <1>; 133 | interrupt-controller; 134 | compatible = "riscv,cpu-intc"; 135 | }; 136 | }; 137 | cpu6: cpu@6 { 138 | device_type = "cpu"; 139 | reg = <6>; 140 | status = "okay"; 141 | compatible = "riscv"; 142 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 143 | riscv,cbom-block-size =<64>; 144 | mmu-type = "riscv,sv39"; 145 | clock-frequency = ; 146 | cpu6_intc: interrupt-controller { 147 | #interrupt-cells = <1>; 148 | interrupt-controller; 149 | compatible = "riscv,cpu-intc"; 150 | }; 151 | }; 152 | cpu7: cpu@7 { 153 | device_type = "cpu"; 154 | reg = <7>; 155 | status = "okay"; 156 | compatible = "riscv"; 157 | riscv,isa = "rv64imafdc_zicbom_svpbmt_sstc_sscofpmf"; 158 | riscv,cbom-block-size =<64>; 159 | mmu-type = "riscv,sv39"; 160 | clock-frequency = ; 161 | cpu7_intc: interrupt-controller { 162 | #interrupt-cells = <1>; 163 | interrupt-controller; 164 | compatible = "riscv,cpu-intc"; 165 | }; 166 | }; 167 | }; 168 | 169 | memory@80000000 { 170 | device_type = "memory"; 171 | reg = <0x0 0x80000000 0x0 0x7E000000>; 172 | }; 173 | 174 | soc { 175 | #address-cells = <2>; 176 | #size-cells = <2>; 177 | compatible = "nuclei,evalsoc", "simple-bus"; 178 | ranges; 179 | }; 180 | 181 | /* Used for Uboot SBI Console */ 182 | console { 183 | compatible = "sbi,console"; 184 | }; 185 | 186 | hfclk: hfclk { 187 | #clock-cells = <0>; 188 | compatible = "fixed-clock"; 189 | clock-frequency = ; 190 | clock-output-names = "hfclk"; 191 | }; 192 | 193 | xecclk: xecclk { 194 | #clock-cells = <0>; 195 | compatible = "fixed-clock"; 196 | clock-frequency = <25000000>; 197 | }; 198 | 199 | pmu { 200 | compatible = "riscv,pmu"; 201 | /* https://perf.wiki.kernel.org/index.php/Tutorial#Events */ 202 | /* eg. perf stat -B coremark */ 203 | /* eg. perf stat -e cycles -e instructions -e cache-misses -e branches -e branch-misses coremark */ 204 | /* eg. perf stat -e cycles -e instructions -e L1-icache-load-misses -e L1-dcache-load-misses -e iTLB-load-misses -e dTLB-load-misses coremark */ 205 | /* Note: in the dts comment, v2 means your Nuclei RISC-V CPU need to support HPM_VER = Version 2 */ 206 | riscv,event-to-mhpmevent = 207 | /* Type #0 SBI_PMU_HW_CPU_CYCLES -> Nuclei event sel=0 idx=1 Cycle count */ 208 | <0x00001 0x00000000 0x00000010>, 209 | /* Type #0 SBI_PMU_HW_INSTRUCTIONS -> Nuclei event sel=0 idx=2 Retired instruction count */ 210 | <0x00002 0x00000000 0x00000020>, 211 | /* Type #0 SBI_PMU_HW_CACHE_REFERENCES -> v2, Nuclei event sel=1 idx=8 L2-Cache access count */ 212 | <0x00003 0x00000000 0x00000081>, 213 | /* Type #0 SBI_PMU_HW_CACHE_MISSES -> v2, Nuclei event sel=1 idx=9 L2-Cache miss count */ 214 | <0x00004 0x00000000 0x00000091>, 215 | /* Type #0 SBI_PMU_HW_BRANCH_INSTRUCTIONS -> v2, Nuclei event sel=2 idx=2 Branch instruction commit count */ 216 | <0x00005 0x00000000 0x00000022>, 217 | /* Type #0 SBI_PMU_HW_BRANCH_MISSES -> v2, Nuclei event sel=2 idx=3 Branch predict fail count */ 218 | <0x00006 0x00000000 0x00000032>, 219 | /* Type #0 SBI_PMU_HW_BUS_CYCLES -> v2, Nuclei event sel=1 idx=10 Memory bus request count */ 220 | <0x00007 0x00000000 0x000000A1>, 221 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_FRONTEND -> v2, Nuclei event sel=1 idx=11 IFU stall cycle count */ 222 | <0x00008 0x00000000 0x000000B1>, 223 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_BACKEND -> v2, Nuclei event sel=1 idx=12 EXU stall cycle count */ 224 | <0x00009 0x00000000 0x000000C1>, 225 | /* Type #0 SBI_PMU_HW_REF_CPU_CYCLES -> v2, Nuclei event sel=1 idx=13 Timer count */ 226 | <0x0000A 0x00000000 0x000000D1>, 227 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=0 Dcache read count */ 228 | <0x10000 0x00000000 0x00000003>, 229 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=1 Dcache read miss count */ 230 | <0x10001 0x00000000 0x00000013>, 231 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=2 Dcache write count */ 232 | <0x10002 0x00000000 0x00000023>, 233 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=3 Dcache write miss count */ 234 | <0x10003 0x00000000 0x00000033>, 235 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=4 Dcache prefetch count */ 236 | <0x10004 0x00000000 0x00000043>, 237 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=5 Dcache prefetch miss count */ 238 | <0x10005 0x00000000 0x00000053>, 239 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=6 Icache read count */ 240 | <0x10008 0x00000000 0x00000063>, 241 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=1 Icache read miss count */ 242 | <0x10009 0x00000000 0x00000011>, 243 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=8 Icache prefetch count */ 244 | <0x1000C 0x00000000 0x00000083>, 245 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=9 Icache prefetch miss count */ 246 | <0x1000D 0x00000000 0x00000093>, 247 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 248 | <0x10010 0x00000000 0x000000A3>, 249 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 250 | <0x10011 0x00000000 0x000000B3>, 251 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 252 | <0x10012 0x00000000 0x000000C3>, 253 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 254 | <0x10013 0x00000000 0x000000D3>, 255 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 256 | <0x10014 0x00000000 0x000000E3>, 257 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 258 | <0x10015 0x00000000 0x000000F3>, 259 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=16 DTLB read count */ 260 | <0x10018 0x00000000 0x00000103>, 261 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=17 DTLB read miss count */ 262 | <0x10019 0x00000000 0x00000113>, 263 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=18 DTLB write count */ 264 | <0x1001A 0x00000000 0x00000123>, 265 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=19 DTLB write miss count */ 266 | <0x1001B 0x00000000 0x00000133>, 267 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=20 ITLB read count */ 268 | <0x10020 0x00000000 0x00000143>, 269 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=3 ITLB read miss count */ 270 | <0x10021 0x00000000 0x00000031>, 271 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=22 BTB read count */ 272 | <0x10028 0x00000000 0x00000163>, 273 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=23 BTB read miss count */ 274 | <0x10029 0x00000000 0x00000173>, 275 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=24 BTB write count */ 276 | <0x1002A 0x00000000 0x00000183>, 277 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=25 BTB write miss count */ 278 | <0x1002B 0x00000000 0x00000193>, 279 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 280 | <0x10030 0x00000000 0x000000A3>, 281 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 282 | <0x10031 0x00000000 0x000000B3>, 283 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 284 | <0x10032 0x00000000 0x000000C3>, 285 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 286 | <0x10033 0x00000000 0x000000D3>, 287 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 288 | <0x10034 0x00000000 0x000000E3>, 289 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 290 | <0x10035 0x00000000 0x000000F3>; 291 | /* make hpm3-6 counter available for all hardware events */ 292 | riscv,event-to-mhpmcounters = 293 | <0x00001 0x0000000A 0x00000078>, 294 | <0x10000 0x00010035 0x00000078>; 295 | /* Raw event: eg. perf stat -e cycles -e instructions -e r00000190 -e r00000010 coremark */ 296 | riscv,raw-event-to-mhpmcounters = 297 | /* Event Types 0 events - 0x1 Cycle count */ 298 | <0x00000000 0x00000010 0xffffffff 0xffffffff 0x00000078>, 299 | /* Event Types 0 events - 0x2 Retired instruction count */ 300 | <0x00000000 0x00000020 0xffffffff 0xffffffff 0x00000078>, 301 | /* Event Types 0 events - 0x3 Integer load instruction (includes LR) */ 302 | <0x00000000 0x00000030 0xffffffff 0xffffffff 0x00000078>, 303 | /* Event Types 0 events - 0x4 Integer store instruction (includes SC) */ 304 | <0x00000000 0x00000040 0xffffffff 0xffffffff 0x00000078>, 305 | /* Event Types 0 events - 0x5 Atomic memory operation (do not include LR and SC) */ 306 | <0x00000000 0x00000050 0xffffffff 0xffffffff 0x00000078>, 307 | /* Event Types 0 events - 0x6 System instruction */ 308 | <0x00000000 0x00000060 0xffffffff 0xffffffff 0x00000078>, 309 | /* Event Types 0 events - 0x7 Integer computational instruction(excluding multiplication/division/remainder) */ 310 | <0x00000000 0x00000070 0xffffffff 0xffffffff 0x00000078>, 311 | /* Event Types 0 events - 0x8 Conditional branch */ 312 | <0x00000000 0x00000080 0xffffffff 0xffffffff 0x00000078>, 313 | /* Event Types 0 events - 0x9 Taken conditional branch */ 314 | <0x00000000 0x00000090 0xffffffff 0xffffffff 0x00000078>, 315 | /* Event Types 0 events - 0xa JAL instruction */ 316 | <0x00000000 0x000000a0 0xffffffff 0xffffffff 0x00000078>, 317 | /* Event Types 0 events - 0xb JALR instruction */ 318 | <0x00000000 0x000000b0 0xffffffff 0xffffffff 0x00000078>, 319 | /* Event Types 0 events - 0xc Return instruction */ 320 | <0x00000000 0x000000c0 0xffffffff 0xffffffff 0x00000078>, 321 | /* Event Types 0 events - 0xd Control transfer instruction (CBR+JAL+JALR) */ 322 | <0x00000000 0x000000d0 0xffffffff 0xffffffff 0x00000078>, 323 | /* Event Types 0 events - 0xe fence instruction(Not include fence.i) */ 324 | <0x00000000 0x000000e0 0xffffffff 0xffffffff 0x00000078>, 325 | /* Event Types 0 events - 0xf Integer multiplication instruction */ 326 | <0x00000000 0x000000f0 0xffffffff 0xffffffff 0x00000078>, 327 | /* Event Types 0 events - 0x10 Integer division/remainder instruction */ 328 | <0x00000000 0x00000100 0xffffffff 0xffffffff 0x00000078>, 329 | /* Event Types 0 events - 0x11 Floating-point load instruction */ 330 | <0x00000000 0x00000110 0xffffffff 0xffffffff 0x00000078>, 331 | /* Event Types 0 events - 0x12 Floating-point store instruction */ 332 | <0x00000000 0x00000120 0xffffffff 0xffffffff 0x00000078>, 333 | /* Event Types 0 events - 0x13 Floating-point addition/subtraction */ 334 | <0x00000000 0x00000130 0xffffffff 0xffffffff 0x00000078>, 335 | /* Event Types 0 events - 0x14 Floating-point multiplication */ 336 | <0x00000000 0x00000140 0xffffffff 0xffffffff 0x00000078>, 337 | /* Event Types 0 events - 0x15 Floating-point fused multiply-add (FMADD, FMSUB,FNMSUB, FNMADD) */ 338 | <0x00000000 0x00000150 0xffffffff 0xffffffff 0x00000078>, 339 | /* Event Types 0 events - 0x16 Floating-point division or square-root */ 340 | <0x00000000 0x00000160 0xffffffff 0xffffffff 0x00000078>, 341 | /* Event Types 0 events - 0x17 Other floating-point instruction */ 342 | <0x00000000 0x00000170 0xffffffff 0xffffffff 0x00000078>, 343 | /* Event Types 0 events - 0x18 Conditional branch(BXX) prediction fail */ 344 | <0x00000000 0x00000180 0xffffffff 0xffffffff 0x00000078>, 345 | /* Event Types 0 events - 0x19 JALR prediction fail */ 346 | <0x00000000 0x00000190 0xffffffff 0xffffffff 0x00000078>, 347 | /* Event Types 0 events - 0x1a POP prediction fail */ 348 | <0x00000000 0x000001a0 0xffffffff 0xffffffff 0x00000078>, 349 | /* Event Types 0 events - 0x1b FENCEI instruction */ 350 | <0x00000000 0x000001b0 0xffffffff 0xffffffff 0x00000078>, 351 | /* Event Types 0 events - 0x1c SFENCE instruction */ 352 | <0x00000000 0x000001c0 0xffffffff 0xffffffff 0x00000078>, 353 | /* Event Types 0 events - 0x1d ECALL instruction */ 354 | <0x00000000 0x000001d0 0xffffffff 0xffffffff 0x00000078>, 355 | /* Event Types 0 events - 0x1e EXCEPTION instruction */ 356 | <0x00000000 0x000001e0 0xffffffff 0xffffffff 0x00000078>, 357 | /* Event Types 0 events - 0x1f INTERRUPT instruction */ 358 | <0x00000000 0x000001f0 0xffffffff 0xffffffff 0x00000078>, 359 | /* Event Types 1 events - 0x1 Icache read miss count */ 360 | <0x00000000 0x00000011 0xffffffff 0xffffffff 0x00000078>, 361 | /* Event Types 1 events - 0x2 Dcache read/write miss count */ 362 | <0x00000000 0x00000021 0xffffffff 0xffffffff 0x00000078>, 363 | /* Event Types 1 events - 0x3 ITLB read miss count */ 364 | <0x00000000 0x00000031 0xffffffff 0xffffffff 0x00000078>, 365 | /* Event Types 1 events - 0x4 DTLB read/write miss count */ 366 | <0x00000000 0x00000041 0xffffffff 0xffffffff 0x00000078>, 367 | /* Event Types 1 events - 0x5 Main TLB miss count */ 368 | <0x00000000 0x00000051 0xffffffff 0xffffffff 0x00000078>, 369 | /* Event Types 1 events - 0x6 Reserved */ 370 | <0x00000000 0x00000061 0xffffffff 0xffffffff 0x00000078>, 371 | /* Event Types 1 events - 0x7 Reserved */ 372 | <0x00000000 0x00000071 0xffffffff 0xffffffff 0x00000078>, 373 | /* Event Types 1 events - 0x8 L2-Cache access count */ 374 | <0x00000000 0x00000081 0xffffffff 0xffffffff 0x00000078>, 375 | /* Event Types 1 events - 0x9 L2-Cache miss count */ 376 | <0x00000000 0x00000091 0xffffffff 0xffffffff 0x00000078>, 377 | /* Event Types 1 events - 0xa Memory bus request count */ 378 | <0x00000000 0x000000a1 0xffffffff 0xffffffff 0x00000078>, 379 | /* Event Types 1 events - 0xb IFU stall cycle count */ 380 | <0x00000000 0x000000b1 0xffffffff 0xffffffff 0x00000078>, 381 | /* Event Types 1 events - 0xc EXU stall cycle count */ 382 | <0x00000000 0x000000c1 0xffffffff 0xffffffff 0x00000078>, 383 | /* Event Types 1 events - 0xd Timer count */ 384 | <0x00000000 0x000000d1 0xffffffff 0xffffffff 0x00000078>, 385 | /* Event Types 2 events - 0x1 VPU store instruction commit count */ 386 | <0x00000000 0x00000012 0xffffffff 0xffffffff 0x00000078>, 387 | /* Event Types 2 events - 0x2 Reserved */ 388 | <0x00000000 0x00000022 0xffffffff 0xffffffff 0x00000078>, 389 | /* Event Types 2 events - 0x3 VPU load instruction commit count */ 390 | <0x00000000 0x00000032 0xffffffff 0xffffffff 0x00000078>, 391 | /* Event Types 2 events - 0x4 VPU computational instruction commit count */ 392 | <0x00000000 0x00000042 0xffffffff 0xffffffff 0x00000078>, 393 | /* Event Types 2 events - 0x5 Branch predict fail count */ 394 | <0x00000000 0x00000052 0xffffffff 0xffffffff 0x00000078>, 395 | /* Event Types 3 events - 0x1 Icache read count */ 396 | <0x00000000 0x00000013 0xffffffff 0xffffffff 0x00000078>, 397 | /* Event Types 3 events - 0x2 L2-Cache read hit count */ 398 | <0x00000000 0x00000023 0xffffffff 0xffffffff 0x00000078>, 399 | /* Event Types 3 events - 0x3 DTLB write count */ 400 | <0x00000000 0x00000033 0xffffffff 0xffffffff 0x00000078>, 401 | /* Event Types 3 events - 0x4 L2-Cache write miss count */ 402 | <0x00000000 0x00000043 0xffffffff 0xffffffff 0x00000078>, 403 | /* Event Types 3 events - 0x5 Reserved */ 404 | <0x00000000 0x00000053 0xffffffff 0xffffffff 0x00000078>, 405 | /* Event Types 3 events - 0x6 Icache prefetch miss count */ 406 | <0x00000000 0x00000063 0xffffffff 0xffffffff 0x00000078>, 407 | /* Event Types 3 events - 0x7 BTB write count */ 408 | <0x00000000 0x00000073 0xffffffff 0xffffffff 0x00000078>, 409 | /* Event Types 3 events - 0x8 L2-Cache read miss count */ 410 | <0x00000000 0x00000083 0xffffffff 0xffffffff 0x00000078>, 411 | /* Event Types 3 events - 0x9 DTLB write miss count */ 412 | <0x00000000 0x00000093 0xffffffff 0xffffffff 0x00000078>, 413 | /* Event Types 3 events - 0xa ITLB read count */ 414 | <0x00000000 0x000000a3 0xffffffff 0xffffffff 0x00000078>, 415 | /* Event Types 3 events - 0xb BTB read count */ 416 | <0x00000000 0x000000b3 0xffffffff 0xffffffff 0x00000078>, 417 | /* Event Types 3 events - 0xc Dcache prefetch count */ 418 | <0x00000000 0x000000c3 0xffffffff 0xffffffff 0x00000078>, 419 | /* Event Types 3 events - 0xd Icache prefetch count */ 420 | <0x00000000 0x000000d3 0xffffffff 0xffffffff 0x00000078>, 421 | /* Event Types 3 events - 0xe Dcache write count */ 422 | <0x00000000 0x000000e3 0xffffffff 0xffffffff 0x00000078>, 423 | /* Event Types 3 events - 0xf DTLB read count */ 424 | <0x00000000 0x000000f3 0xffffffff 0xffffffff 0x00000078>, 425 | /* Event Types 3 events - 0x10 Dcache write miss count */ 426 | <0x00000000 0x00000103 0xffffffff 0xffffffff 0x00000078>, 427 | /* Event Types 3 events - 0x11 BTB write miss count */ 428 | <0x00000000 0x00000113 0xffffffff 0xffffffff 0x00000078>, 429 | /* Event Types 3 events - 0x12 Dcache read count */ 430 | <0x00000000 0x00000123 0xffffffff 0xffffffff 0x00000078>, 431 | /* Event Types 3 events - 0x13 L2-Cache write hit count */ 432 | <0x00000000 0x00000133 0xffffffff 0xffffffff 0x00000078>, 433 | /* Event Types 3 events - 0x14 L2-Cache prefetch miss count */ 434 | <0x00000000 0x00000143 0xffffffff 0xffffffff 0x00000078>, 435 | /* Event Types 3 events - 0x15 BTB read miss count */ 436 | <0x00000000 0x00000153 0xffffffff 0xffffffff 0x00000078>, 437 | /* Event Types 3 events - 0x16 Dcache read miss count */ 438 | <0x00000000 0x00000163 0xffffffff 0xffffffff 0x00000078>, 439 | /* Event Types 3 events - 0x17 L2-Cache prefetch hit count */ 440 | <0x00000000 0x00000173 0xffffffff 0xffffffff 0x00000078>, 441 | /* Event Types 3 events - 0x18 DTLB read miss count */ 442 | <0x00000000 0x00000183 0xffffffff 0xffffffff 0x00000078>; 443 | }; 444 | 445 | plic0: interrupt-controller@1c000000 { 446 | #interrupt-cells = <1>; 447 | compatible = "riscv,plic0"; 448 | interrupt-controller; 449 | riscv,ndev = <53>; 450 | interrupts-extended = 451 | <&cpu0_intc 11 &cpu0_intc 9 452 | &cpu1_intc 11 &cpu1_intc 9 453 | &cpu2_intc 11 &cpu2_intc 9 454 | &cpu3_intc 11 &cpu3_intc 9 455 | &cpu4_intc 11 &cpu4_intc 9 456 | &cpu5_intc 11 &cpu5_intc 9 457 | &cpu6_intc 11 &cpu6_intc 9 458 | &cpu7_intc 11 &cpu7_intc 9>; 459 | reg = <0x0 0x1c000000 0x0 0x4000000>; 460 | }; 461 | 462 | clint0: clint@18031000 { 463 | #interrupt-cells = <1>; 464 | compatible = "riscv,clint0"; 465 | reg = <0x0 0x18031000 0x0 0xC000>; 466 | interrupts-extended = 467 | <&cpu0_intc 3 &cpu0_intc 7 468 | &cpu1_intc 3 &cpu1_intc 7 469 | &cpu2_intc 3 &cpu2_intc 7 470 | &cpu3_intc 3 &cpu3_intc 7 471 | &cpu4_intc 3 &cpu4_intc 7 472 | &cpu5_intc 3 &cpu5_intc 7 473 | &cpu6_intc 3 &cpu6_intc 7 474 | &cpu7_intc 3 &cpu7_intc 7>; 475 | clocks = <&hfclk>; 476 | }; 477 | 478 | uart0: serial@10013000 { 479 | compatible = "nuclei,uart0"; 480 | reg = <0x0 0x10013000 0x0 0x1000>; 481 | interrupt-parent = <&plic0>; 482 | interrupts = <33>; 483 | clocks = <&hfclk>; 484 | clock-frequency = ; 485 | status = "okay"; 486 | }; 487 | 488 | uart1: serial@10023000 { 489 | compatible = "nuclei,uart0"; 490 | reg = <0x0 0x10023000 0x0 0x1000>; 491 | interrupt-parent = <&plic0>; 492 | interrupts = <34>; 493 | clocks = <&hfclk>; 494 | clock-frequency = ; 495 | status = "disabled"; 496 | }; 497 | 498 | #if SIMULATION == 0 499 | qspi0: spi@10014000 { 500 | compatible = "nuclei,spi0"; 501 | reg = <0x0 0x10014000 0x0 0x1000>; 502 | interrupt-parent = <&plic0>; 503 | interrupts = <35>; 504 | num-cs = <1>; 505 | #address-cells = <1>; 506 | #size-cells = <0>; 507 | clocks = <&hfclk>; 508 | status = "okay"; 509 | 510 | flash@0 { 511 | compatible = "jedec,spi-nor"; 512 | reg = <0>; 513 | spi-max-frequency = <1000000>; 514 | m25p,fast-read; 515 | spi-tx-bus-width = <1>; 516 | spi-rx-bus-width = <1>; 517 | }; 518 | }; 519 | 520 | qspi2: spi@10034000 { 521 | compatible = "nuclei,spi0"; 522 | reg = <0x0 0x10034000 0x0 0x1000>; 523 | interrupt-parent = <&plic0>; 524 | interrupts = <37>; 525 | num-cs = <1>; 526 | #address-cells = <1>; 527 | #size-cells = <0>; 528 | clocks = <&hfclk>; 529 | status = "okay"; 530 | 531 | mmc@0 { 532 | compatible = "mmc-spi-slot"; 533 | reg = <0>; 534 | spi-max-frequency = <20000000>; 535 | voltage-ranges = <3300 3300>; 536 | disable-wp; 537 | spi-tx-bus-width = <1>; 538 | spi-rx-bus-width = <1>; 539 | }; 540 | }; 541 | #endif 542 | 543 | xec0: xec@10002000 { 544 | compatible = "nuclei,xec"; 545 | reg = <0x0 0x10002000 0x0 0x1000>; 546 | interrupt-parent = <&plic0>; 547 | interrupts = <8>; 548 | clocks = <&xecclk>; 549 | /*local-mac-address = [00 2b 20 21 03 23];*/ 550 | phy-handle = <&rtl8211f>; 551 | phy-mode = "rgmii"; 552 | 553 | status = "disabled"; 554 | mdio { 555 | compatible = "snps,dwmac-mdio"; 556 | #address-cells = <1>; 557 | #size-cells = <0>; 558 | 559 | rtl8211f: ethernet-phy@0 { 560 | compatible = "ethernet-phy-ieee802.3-c22"; 561 | reg = <0>; 562 | }; 563 | }; 564 | }; 565 | 566 | sysrst@18030ff0 { 567 | compatible = "nuclei,sysrst"; 568 | reg = <0x0 0x18030ff0 0x0 0x0>; 569 | }; 570 | }; 571 | -------------------------------------------------------------------------------- /conf/evalsoc/nuclei_rv32imac.dts: -------------------------------------------------------------------------------- 1 | /dts-v1/; 2 | 3 | #ifndef SIMULATION 4 | #define SIMULATION 0 5 | #endif 6 | 7 | #if SIMULATION == 2 8 | #undef TIMERCLK_FREQ 9 | #define TIMERCLK_FREQ 500000 10 | #else 11 | #ifndef TIMERCLK_FREQ 12 | #define TIMERCLK_FREQ 32768 13 | #endif 14 | #endif 15 | 16 | #ifndef CPUCLK_FREQ 17 | #define CPUCLK_FREQ 50000000 18 | #endif 19 | #ifndef PERIPHCLK_FREQ 20 | #define PERIPHCLK_FREQ CPUCLK_FREQ 21 | #endif 22 | 23 | / { 24 | #address-cells = <2>; 25 | #size-cells = <2>; 26 | compatible = "nuclei,evalsoc"; 27 | model = "nuclei,evalsoc"; 28 | dma-noncoherent; 29 | chosen { 30 | #if SIMULATION == 2 31 | bootargs = "earlycon=sbi console=hvc0"; 32 | #else 33 | bootargs = "earlycon=sbi console=ttyNUC0"; 34 | #endif 35 | stdout-path = "serial0"; 36 | }; 37 | 38 | aliases { 39 | serial0 = &uart0; 40 | serial1 = &uart1; 41 | }; 42 | 43 | cpus { 44 | #address-cells = <1>; 45 | #size-cells = <0>; 46 | timebase-frequency = ; 47 | cpu0: cpu@0 { 48 | device_type = "cpu"; 49 | reg = <0>; 50 | status = "okay"; 51 | compatible = "riscv"; 52 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 53 | riscv,cbom-block-size =<64>; 54 | mmu-type = "riscv,sv32"; 55 | clock-frequency = ; 56 | cpu0_intc: interrupt-controller { 57 | #interrupt-cells = <1>; 58 | interrupt-controller; 59 | compatible = "riscv,cpu-intc"; 60 | }; 61 | }; 62 | cpu1: cpu@1 { 63 | device_type = "cpu"; 64 | reg = <1>; 65 | status = "okay"; 66 | compatible = "riscv"; 67 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 68 | riscv,cbom-block-size =<64>; 69 | mmu-type = "riscv,sv32"; 70 | clock-frequency = ; 71 | cpu1_intc: interrupt-controller { 72 | #interrupt-cells = <1>; 73 | interrupt-controller; 74 | compatible = "riscv,cpu-intc"; 75 | }; 76 | }; 77 | cpu2: cpu@2 { 78 | device_type = "cpu"; 79 | reg = <2>; 80 | status = "okay"; 81 | compatible = "riscv"; 82 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 83 | riscv,cbom-block-size =<64>; 84 | mmu-type = "riscv,sv32"; 85 | clock-frequency = ; 86 | cpu2_intc: interrupt-controller { 87 | #interrupt-cells = <1>; 88 | interrupt-controller; 89 | compatible = "riscv,cpu-intc"; 90 | }; 91 | }; 92 | cpu3: cpu@3 { 93 | device_type = "cpu"; 94 | reg = <3>; 95 | status = "okay"; 96 | compatible = "riscv"; 97 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 98 | riscv,cbom-block-size =<64>; 99 | mmu-type = "riscv,sv32"; 100 | clock-frequency = ; 101 | cpu3_intc: interrupt-controller { 102 | #interrupt-cells = <1>; 103 | interrupt-controller; 104 | compatible = "riscv,cpu-intc"; 105 | }; 106 | }; 107 | cpu4: cpu@4 { 108 | device_type = "cpu"; 109 | reg = <4>; 110 | status = "okay"; 111 | compatible = "riscv"; 112 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 113 | riscv,cbom-block-size =<64>; 114 | mmu-type = "riscv,sv32"; 115 | clock-frequency = ; 116 | cpu4_intc: interrupt-controller { 117 | #interrupt-cells = <1>; 118 | interrupt-controller; 119 | compatible = "riscv,cpu-intc"; 120 | }; 121 | }; 122 | cpu5: cpu@5 { 123 | device_type = "cpu"; 124 | reg = <5>; 125 | status = "okay"; 126 | compatible = "riscv"; 127 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 128 | riscv,cbom-block-size =<64>; 129 | mmu-type = "riscv,sv32"; 130 | clock-frequency = ; 131 | cpu5_intc: interrupt-controller { 132 | #interrupt-cells = <1>; 133 | interrupt-controller; 134 | compatible = "riscv,cpu-intc"; 135 | }; 136 | }; 137 | cpu6: cpu@6 { 138 | device_type = "cpu"; 139 | reg = <6>; 140 | status = "okay"; 141 | compatible = "riscv"; 142 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 143 | riscv,cbom-block-size =<64>; 144 | mmu-type = "riscv,sv32"; 145 | clock-frequency = ; 146 | cpu6_intc: interrupt-controller { 147 | #interrupt-cells = <1>; 148 | interrupt-controller; 149 | compatible = "riscv,cpu-intc"; 150 | }; 151 | }; 152 | cpu7: cpu@7 { 153 | device_type = "cpu"; 154 | reg = <7>; 155 | status = "okay"; 156 | compatible = "riscv"; 157 | riscv,isa = "rv32imac_zicbom_sstc_sscofpmf"; 158 | riscv,cbom-block-size =<64>; 159 | mmu-type = "riscv,sv32"; 160 | clock-frequency = ; 161 | cpu7_intc: interrupt-controller { 162 | #interrupt-cells = <1>; 163 | interrupt-controller; 164 | compatible = "riscv,cpu-intc"; 165 | }; 166 | }; 167 | }; 168 | 169 | memory@80000000 { 170 | device_type = "memory"; 171 | reg = <0x0 0x80000000 0x0 0x7E000000>; 172 | }; 173 | 174 | /* 175 | * Because rv32 not support svpbmt, 176 | * so we reserve 64KB memory for rv32 xec ethernet, 177 | * use Nuclei mattri csr to make it as non-cachable 178 | * region for xec descriptor. 179 | */ 180 | reserved-memory { 181 | #address-cells = <2>; 182 | #size-cells = <2>; 183 | ranges; 184 | 185 | noncachable_memory: region@FD000000 { 186 | /* reserve 64KB memroy as non-cachable region */ 187 | no-map; 188 | reg = <0x0 0xFD000000 0x0 0x10000>; 189 | status = "okay"; 190 | }; 191 | }; 192 | 193 | soc { 194 | #address-cells = <2>; 195 | #size-cells = <2>; 196 | compatible = "nuclei,evalsoc", "simple-bus"; 197 | ranges; 198 | }; 199 | 200 | /* Used for Uboot SBI Console */ 201 | console { 202 | compatible = "sbi,console"; 203 | }; 204 | 205 | hfclk: hfclk { 206 | #clock-cells = <0>; 207 | compatible = "fixed-clock"; 208 | clock-frequency = ; 209 | clock-output-names = "hfclk"; 210 | }; 211 | 212 | xecclk: xecclk { 213 | #clock-cells = <0>; 214 | compatible = "fixed-clock"; 215 | clock-frequency = <25000000>; 216 | }; 217 | 218 | pmu { 219 | compatible = "riscv,pmu"; 220 | /* https://perf.wiki.kernel.org/index.php/Tutorial#Events */ 221 | /* eg. perf stat -B coremark */ 222 | /* eg. perf stat -e cycles -e instructions -e cache-misses -e branches -e branch-misses coremark */ 223 | /* eg. perf stat -e cycles -e instructions -e L1-icache-load-misses -e L1-dcache-load-misses -e iTLB-load-misses -e dTLB-load-misses coremark */ 224 | /* Note: in the dts comment, v2 means your Nuclei RISC-V CPU need to support HPM_VER = Version 2 */ 225 | riscv,event-to-mhpmevent = 226 | /* Type #0 SBI_PMU_HW_CPU_CYCLES -> Nuclei event sel=0 idx=1 Cycle count */ 227 | <0x00001 0x00000000 0x00000010>, 228 | /* Type #0 SBI_PMU_HW_INSTRUCTIONS -> Nuclei event sel=0 idx=2 Retired instruction count */ 229 | <0x00002 0x00000000 0x00000020>, 230 | /* Type #0 SBI_PMU_HW_CACHE_REFERENCES -> v2, Nuclei event sel=1 idx=8 L2-Cache access count */ 231 | <0x00003 0x00000000 0x00000081>, 232 | /* Type #0 SBI_PMU_HW_CACHE_MISSES -> v2, Nuclei event sel=1 idx=9 L2-Cache miss count */ 233 | <0x00004 0x00000000 0x00000091>, 234 | /* Type #0 SBI_PMU_HW_BRANCH_INSTRUCTIONS -> v2, Nuclei event sel=2 idx=2 Branch instruction commit count */ 235 | <0x00005 0x00000000 0x00000022>, 236 | /* Type #0 SBI_PMU_HW_BRANCH_MISSES -> v2, Nuclei event sel=2 idx=3 Branch predict fail count */ 237 | <0x00006 0x00000000 0x00000032>, 238 | /* Type #0 SBI_PMU_HW_BUS_CYCLES -> v2, Nuclei event sel=1 idx=10 Memory bus request count */ 239 | <0x00007 0x00000000 0x000000A1>, 240 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_FRONTEND -> v2, Nuclei event sel=1 idx=11 IFU stall cycle count */ 241 | <0x00008 0x00000000 0x000000B1>, 242 | /* Type #0 SBI_PMU_HW_STALLED_CYCLES_BACKEND -> v2, Nuclei event sel=1 idx=12 EXU stall cycle count */ 243 | <0x00009 0x00000000 0x000000C1>, 244 | /* Type #0 SBI_PMU_HW_REF_CPU_CYCLES -> v2, Nuclei event sel=1 idx=13 Timer count */ 245 | <0x0000A 0x00000000 0x000000D1>, 246 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=0 Dcache read count */ 247 | <0x10000 0x00000000 0x00000003>, 248 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=1 Dcache read miss count */ 249 | <0x10001 0x00000000 0x00000013>, 250 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=2 Dcache write count */ 251 | <0x10002 0x00000000 0x00000023>, 252 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=3 Dcache write miss count */ 253 | <0x10003 0x00000000 0x00000033>, 254 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=4 Dcache prefetch count */ 255 | <0x10004 0x00000000 0x00000043>, 256 | /* Type #1 SBI_PMU_HW_CACHE_L1D(0) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=5 Dcache prefetch miss count */ 257 | <0x10005 0x00000000 0x00000053>, 258 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=6 Icache read count */ 259 | <0x10008 0x00000000 0x00000063>, 260 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=1 Icache read miss count */ 261 | <0x10009 0x00000000 0x00000011>, 262 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=8 Icache prefetch count */ 263 | <0x1000C 0x00000000 0x00000083>, 264 | /* Type #1 SBI_PMU_HW_CACHE_L1I(1) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=9 Icache prefetch miss count */ 265 | <0x1000D 0x00000000 0x00000093>, 266 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 267 | <0x10010 0x00000000 0x000000A3>, 268 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 269 | <0x10011 0x00000000 0x000000B3>, 270 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 271 | <0x10012 0x00000000 0x000000C3>, 272 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 273 | <0x10013 0x00000000 0x000000D3>, 274 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 275 | <0x10014 0x00000000 0x000000E3>, 276 | /* Type #1 SBI_PMU_HW_CACHE_LL(2) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 277 | <0x10015 0x00000000 0x000000F3>, 278 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=16 DTLB read count */ 279 | <0x10018 0x00000000 0x00000103>, 280 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=17 DTLB read miss count */ 281 | <0x10019 0x00000000 0x00000113>, 282 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=18 DTLB write count */ 283 | <0x1001A 0x00000000 0x00000123>, 284 | /* Type #1 SBI_PMU_HW_CACHE_DTLB(3) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=19 DTLB write miss count */ 285 | <0x1001B 0x00000000 0x00000133>, 286 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=20 ITLB read count */ 287 | <0x10020 0x00000000 0x00000143>, 288 | /* Type #1 SBI_PMU_HW_CACHE_ITLB(4) READ(0) MISS(1) -> v1, Nuclei event sel=1 idx=3 ITLB read miss count */ 289 | <0x10021 0x00000000 0x00000031>, 290 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=22 BTB read count */ 291 | <0x10028 0x00000000 0x00000163>, 292 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=23 BTB read miss count */ 293 | <0x10029 0x00000000 0x00000173>, 294 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=24 BTB write count */ 295 | <0x1002A 0x00000000 0x00000183>, 296 | /* Type #1 SBI_PMU_HW_CACHE_BTB(5) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=25 BTB write miss count */ 297 | <0x1002B 0x00000000 0x00000193>, 298 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) ACCESS(0) -> v2, Nuclei event sel=3 idx=10 L2 Cache read count */ 299 | <0x10030 0x00000000 0x000000A3>, 300 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) READ(0) MISS(1) -> v2, Nuclei event sel=3 idx=11 L2 Cache read miss count */ 301 | <0x10031 0x00000000 0x000000B3>, 302 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) ACCESS(0) -> v2, Nuclei event sel=3 idx=12 L2 Cache write count */ 303 | <0x10032 0x00000000 0x000000C3>, 304 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) WRITE(1) MISS(1) -> v2, Nuclei event sel=3 idx=13 L2 Cache write miss count */ 305 | <0x10033 0x00000000 0x000000D3>, 306 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) ACCESS(0) -> v2, Nuclei event sel=3 idx=14 L2 Cache prefetch count */ 307 | <0x10034 0x00000000 0x000000E3>, 308 | /* Type #1 SBI_PMU_HW_CACHE_NODE(6) PREFETCH(2) MISS(1) -> v2, Nuclei event sel=3 idx=15 L2 Cache prefetch miss count */ 309 | <0x10035 0x00000000 0x000000F3>; 310 | /* make hpm3-6 counter available for all hardware events */ 311 | riscv,event-to-mhpmcounters = 312 | <0x00001 0x0000000A 0x00000078>, 313 | <0x10000 0x00010035 0x00000078>; 314 | /* Raw event: eg. perf stat -e cycles -e instructions -e r00000190 -e r00000010 coremark */ 315 | riscv,raw-event-to-mhpmcounters = 316 | /* Event Types 0 events - 0x1 Cycle count */ 317 | <0x00000000 0x00000010 0xffffffff 0xffffffff 0x00000078>, 318 | /* Event Types 0 events - 0x2 Retired instruction count */ 319 | <0x00000000 0x00000020 0xffffffff 0xffffffff 0x00000078>, 320 | /* Event Types 0 events - 0x3 Integer load instruction (includes LR) */ 321 | <0x00000000 0x00000030 0xffffffff 0xffffffff 0x00000078>, 322 | /* Event Types 0 events - 0x4 Integer store instruction (includes SC) */ 323 | <0x00000000 0x00000040 0xffffffff 0xffffffff 0x00000078>, 324 | /* Event Types 0 events - 0x5 Atomic memory operation (do not include LR and SC) */ 325 | <0x00000000 0x00000050 0xffffffff 0xffffffff 0x00000078>, 326 | /* Event Types 0 events - 0x6 System instruction */ 327 | <0x00000000 0x00000060 0xffffffff 0xffffffff 0x00000078>, 328 | /* Event Types 0 events - 0x7 Integer computational instruction(excluding multiplication/division/remainder) */ 329 | <0x00000000 0x00000070 0xffffffff 0xffffffff 0x00000078>, 330 | /* Event Types 0 events - 0x8 Conditional branch */ 331 | <0x00000000 0x00000080 0xffffffff 0xffffffff 0x00000078>, 332 | /* Event Types 0 events - 0x9 Taken conditional branch */ 333 | <0x00000000 0x00000090 0xffffffff 0xffffffff 0x00000078>, 334 | /* Event Types 0 events - 0xa JAL instruction */ 335 | <0x00000000 0x000000a0 0xffffffff 0xffffffff 0x00000078>, 336 | /* Event Types 0 events - 0xb JALR instruction */ 337 | <0x00000000 0x000000b0 0xffffffff 0xffffffff 0x00000078>, 338 | /* Event Types 0 events - 0xc Return instruction */ 339 | <0x00000000 0x000000c0 0xffffffff 0xffffffff 0x00000078>, 340 | /* Event Types 0 events - 0xd Control transfer instruction (CBR+JAL+JALR) */ 341 | <0x00000000 0x000000d0 0xffffffff 0xffffffff 0x00000078>, 342 | /* Event Types 0 events - 0xe fence instruction(Not include fence.i) */ 343 | <0x00000000 0x000000e0 0xffffffff 0xffffffff 0x00000078>, 344 | /* Event Types 0 events - 0xf Integer multiplication instruction */ 345 | <0x00000000 0x000000f0 0xffffffff 0xffffffff 0x00000078>, 346 | /* Event Types 0 events - 0x10 Integer division/remainder instruction */ 347 | <0x00000000 0x00000100 0xffffffff 0xffffffff 0x00000078>, 348 | /* Event Types 0 events - 0x11 Floating-point load instruction */ 349 | <0x00000000 0x00000110 0xffffffff 0xffffffff 0x00000078>, 350 | /* Event Types 0 events - 0x12 Floating-point store instruction */ 351 | <0x00000000 0x00000120 0xffffffff 0xffffffff 0x00000078>, 352 | /* Event Types 0 events - 0x13 Floating-point addition/subtraction */ 353 | <0x00000000 0x00000130 0xffffffff 0xffffffff 0x00000078>, 354 | /* Event Types 0 events - 0x14 Floating-point multiplication */ 355 | <0x00000000 0x00000140 0xffffffff 0xffffffff 0x00000078>, 356 | /* Event Types 0 events - 0x15 Floating-point fused multiply-add (FMADD, FMSUB,FNMSUB, FNMADD) */ 357 | <0x00000000 0x00000150 0xffffffff 0xffffffff 0x00000078>, 358 | /* Event Types 0 events - 0x16 Floating-point division or square-root */ 359 | <0x00000000 0x00000160 0xffffffff 0xffffffff 0x00000078>, 360 | /* Event Types 0 events - 0x17 Other floating-point instruction */ 361 | <0x00000000 0x00000170 0xffffffff 0xffffffff 0x00000078>, 362 | /* Event Types 0 events - 0x18 Conditional branch(BXX) prediction fail */ 363 | <0x00000000 0x00000180 0xffffffff 0xffffffff 0x00000078>, 364 | /* Event Types 0 events - 0x19 JALR prediction fail */ 365 | <0x00000000 0x00000190 0xffffffff 0xffffffff 0x00000078>, 366 | /* Event Types 0 events - 0x1a POP prediction fail */ 367 | <0x00000000 0x000001a0 0xffffffff 0xffffffff 0x00000078>, 368 | /* Event Types 0 events - 0x1b FENCEI instruction */ 369 | <0x00000000 0x000001b0 0xffffffff 0xffffffff 0x00000078>, 370 | /* Event Types 0 events - 0x1c SFENCE instruction */ 371 | <0x00000000 0x000001c0 0xffffffff 0xffffffff 0x00000078>, 372 | /* Event Types 0 events - 0x1d ECALL instruction */ 373 | <0x00000000 0x000001d0 0xffffffff 0xffffffff 0x00000078>, 374 | /* Event Types 0 events - 0x1e EXCEPTION instruction */ 375 | <0x00000000 0x000001e0 0xffffffff 0xffffffff 0x00000078>, 376 | /* Event Types 0 events - 0x1f INTERRUPT instruction */ 377 | <0x00000000 0x000001f0 0xffffffff 0xffffffff 0x00000078>, 378 | /* Event Types 1 events - 0x1 Icache read miss count */ 379 | <0x00000000 0x00000011 0xffffffff 0xffffffff 0x00000078>, 380 | /* Event Types 1 events - 0x2 Dcache read/write miss count */ 381 | <0x00000000 0x00000021 0xffffffff 0xffffffff 0x00000078>, 382 | /* Event Types 1 events - 0x3 ITLB read miss count */ 383 | <0x00000000 0x00000031 0xffffffff 0xffffffff 0x00000078>, 384 | /* Event Types 1 events - 0x4 DTLB read/write miss count */ 385 | <0x00000000 0x00000041 0xffffffff 0xffffffff 0x00000078>, 386 | /* Event Types 1 events - 0x5 Main TLB miss count */ 387 | <0x00000000 0x00000051 0xffffffff 0xffffffff 0x00000078>, 388 | /* Event Types 1 events - 0x6 Reserved */ 389 | <0x00000000 0x00000061 0xffffffff 0xffffffff 0x00000078>, 390 | /* Event Types 1 events - 0x7 Reserved */ 391 | <0x00000000 0x00000071 0xffffffff 0xffffffff 0x00000078>, 392 | /* Event Types 1 events - 0x8 L2-Cache access count */ 393 | <0x00000000 0x00000081 0xffffffff 0xffffffff 0x00000078>, 394 | /* Event Types 1 events - 0x9 L2-Cache miss count */ 395 | <0x00000000 0x00000091 0xffffffff 0xffffffff 0x00000078>, 396 | /* Event Types 1 events - 0xa Memory bus request count */ 397 | <0x00000000 0x000000a1 0xffffffff 0xffffffff 0x00000078>, 398 | /* Event Types 1 events - 0xb IFU stall cycle count */ 399 | <0x00000000 0x000000b1 0xffffffff 0xffffffff 0x00000078>, 400 | /* Event Types 1 events - 0xc EXU stall cycle count */ 401 | <0x00000000 0x000000c1 0xffffffff 0xffffffff 0x00000078>, 402 | /* Event Types 1 events - 0xd Timer count */ 403 | <0x00000000 0x000000d1 0xffffffff 0xffffffff 0x00000078>, 404 | /* Event Types 2 events - 0x1 VPU store instruction commit count */ 405 | <0x00000000 0x00000012 0xffffffff 0xffffffff 0x00000078>, 406 | /* Event Types 2 events - 0x2 Reserved */ 407 | <0x00000000 0x00000022 0xffffffff 0xffffffff 0x00000078>, 408 | /* Event Types 2 events - 0x3 VPU load instruction commit count */ 409 | <0x00000000 0x00000032 0xffffffff 0xffffffff 0x00000078>, 410 | /* Event Types 2 events - 0x4 VPU computational instruction commit count */ 411 | <0x00000000 0x00000042 0xffffffff 0xffffffff 0x00000078>, 412 | /* Event Types 2 events - 0x5 Branch predict fail count */ 413 | <0x00000000 0x00000052 0xffffffff 0xffffffff 0x00000078>, 414 | /* Event Types 3 events - 0x1 Icache read count */ 415 | <0x00000000 0x00000013 0xffffffff 0xffffffff 0x00000078>, 416 | /* Event Types 3 events - 0x2 L2-Cache read hit count */ 417 | <0x00000000 0x00000023 0xffffffff 0xffffffff 0x00000078>, 418 | /* Event Types 3 events - 0x3 DTLB write count */ 419 | <0x00000000 0x00000033 0xffffffff 0xffffffff 0x00000078>, 420 | /* Event Types 3 events - 0x4 L2-Cache write miss count */ 421 | <0x00000000 0x00000043 0xffffffff 0xffffffff 0x00000078>, 422 | /* Event Types 3 events - 0x5 Reserved */ 423 | <0x00000000 0x00000053 0xffffffff 0xffffffff 0x00000078>, 424 | /* Event Types 3 events - 0x6 Icache prefetch miss count */ 425 | <0x00000000 0x00000063 0xffffffff 0xffffffff 0x00000078>, 426 | /* Event Types 3 events - 0x7 BTB write count */ 427 | <0x00000000 0x00000073 0xffffffff 0xffffffff 0x00000078>, 428 | /* Event Types 3 events - 0x8 L2-Cache read miss count */ 429 | <0x00000000 0x00000083 0xffffffff 0xffffffff 0x00000078>, 430 | /* Event Types 3 events - 0x9 DTLB write miss count */ 431 | <0x00000000 0x00000093 0xffffffff 0xffffffff 0x00000078>, 432 | /* Event Types 3 events - 0xa ITLB read count */ 433 | <0x00000000 0x000000a3 0xffffffff 0xffffffff 0x00000078>, 434 | /* Event Types 3 events - 0xb BTB read count */ 435 | <0x00000000 0x000000b3 0xffffffff 0xffffffff 0x00000078>, 436 | /* Event Types 3 events - 0xc Dcache prefetch count */ 437 | <0x00000000 0x000000c3 0xffffffff 0xffffffff 0x00000078>, 438 | /* Event Types 3 events - 0xd Icache prefetch count */ 439 | <0x00000000 0x000000d3 0xffffffff 0xffffffff 0x00000078>, 440 | /* Event Types 3 events - 0xe Dcache write count */ 441 | <0x00000000 0x000000e3 0xffffffff 0xffffffff 0x00000078>, 442 | /* Event Types 3 events - 0xf DTLB read count */ 443 | <0x00000000 0x000000f3 0xffffffff 0xffffffff 0x00000078>, 444 | /* Event Types 3 events - 0x10 Dcache write miss count */ 445 | <0x00000000 0x00000103 0xffffffff 0xffffffff 0x00000078>, 446 | /* Event Types 3 events - 0x11 BTB write miss count */ 447 | <0x00000000 0x00000113 0xffffffff 0xffffffff 0x00000078>, 448 | /* Event Types 3 events - 0x12 Dcache read count */ 449 | <0x00000000 0x00000123 0xffffffff 0xffffffff 0x00000078>, 450 | /* Event Types 3 events - 0x13 L2-Cache write hit count */ 451 | <0x00000000 0x00000133 0xffffffff 0xffffffff 0x00000078>, 452 | /* Event Types 3 events - 0x14 L2-Cache prefetch miss count */ 453 | <0x00000000 0x00000143 0xffffffff 0xffffffff 0x00000078>, 454 | /* Event Types 3 events - 0x15 BTB read miss count */ 455 | <0x00000000 0x00000153 0xffffffff 0xffffffff 0x00000078>, 456 | /* Event Types 3 events - 0x16 Dcache read miss count */ 457 | <0x00000000 0x00000163 0xffffffff 0xffffffff 0x00000078>, 458 | /* Event Types 3 events - 0x17 L2-Cache prefetch hit count */ 459 | <0x00000000 0x00000173 0xffffffff 0xffffffff 0x00000078>, 460 | /* Event Types 3 events - 0x18 DTLB read miss count */ 461 | <0x00000000 0x00000183 0xffffffff 0xffffffff 0x00000078>; 462 | }; 463 | 464 | plic0: interrupt-controller@1c000000 { 465 | #interrupt-cells = <1>; 466 | compatible = "riscv,plic0"; 467 | interrupt-controller; 468 | riscv,ndev = <53>; 469 | interrupts-extended = 470 | <&cpu0_intc 11 &cpu0_intc 9 471 | &cpu1_intc 11 &cpu1_intc 9 472 | &cpu2_intc 11 &cpu2_intc 9 473 | &cpu3_intc 11 &cpu3_intc 9 474 | &cpu4_intc 11 &cpu4_intc 9 475 | &cpu5_intc 11 &cpu5_intc 9 476 | &cpu6_intc 11 &cpu6_intc 9 477 | &cpu7_intc 11 &cpu7_intc 9>; 478 | reg = <0x0 0x1c000000 0x0 0x4000000>; 479 | }; 480 | 481 | clint0: clint@18031000 { 482 | #interrupt-cells = <1>; 483 | compatible = "riscv,clint0"; 484 | reg = <0x0 0x18031000 0x0 0xC000>; 485 | interrupts-extended = 486 | <&cpu0_intc 3 &cpu0_intc 7 487 | &cpu1_intc 3 &cpu1_intc 7 488 | &cpu2_intc 3 &cpu2_intc 7 489 | &cpu3_intc 3 &cpu3_intc 7 490 | &cpu4_intc 3 &cpu4_intc 7 491 | &cpu5_intc 3 &cpu5_intc 7 492 | &cpu6_intc 3 &cpu6_intc 7 493 | &cpu7_intc 3 &cpu7_intc 7>; 494 | clocks = <&hfclk>; 495 | }; 496 | 497 | uart0: serial@10013000 { 498 | compatible = "nuclei,uart0"; 499 | reg = <0x0 0x10013000 0x0 0x1000>; 500 | interrupt-parent = <&plic0>; 501 | interrupts = <33>; 502 | clocks = <&hfclk>; 503 | clock-frequency = ; 504 | status = "okay"; 505 | }; 506 | 507 | uart1: serial@10023000 { 508 | compatible = "nuclei,uart0"; 509 | reg = <0x0 0x10023000 0x0 0x1000>; 510 | interrupt-parent = <&plic0>; 511 | interrupts = <34>; 512 | clocks = <&hfclk>; 513 | clock-frequency = ; 514 | status = "disabled"; 515 | }; 516 | 517 | #if SIMULATION == 0 518 | qspi0: spi@10014000 { 519 | compatible = "nuclei,spi0"; 520 | reg = <0x0 0x10014000 0x0 0x1000>; 521 | interrupt-parent = <&plic0>; 522 | interrupts = <35>; 523 | num-cs = <1>; 524 | #address-cells = <1>; 525 | #size-cells = <0>; 526 | clocks = <&hfclk>; 527 | status = "okay"; 528 | 529 | flash@0 { 530 | compatible = "jedec,spi-nor"; 531 | reg = <0>; 532 | spi-max-frequency = <1000000>; 533 | m25p,fast-read; 534 | spi-tx-bus-width = <1>; 535 | spi-rx-bus-width = <1>; 536 | }; 537 | }; 538 | 539 | qspi2: spi@10034000 { 540 | compatible = "nuclei,spi0"; 541 | reg = <0x0 0x10034000 0x0 0x1000>; 542 | interrupt-parent = <&plic0>; 543 | interrupts = <37>; 544 | num-cs = <1>; 545 | #address-cells = <1>; 546 | #size-cells = <0>; 547 | clocks = <&hfclk>; 548 | status = "okay"; 549 | 550 | mmc@0 { 551 | compatible = "mmc-spi-slot"; 552 | reg = <0>; 553 | spi-max-frequency = <20000000>; 554 | voltage-ranges = <3300 3300>; 555 | disable-wp; 556 | spi-tx-bus-width = <1>; 557 | spi-rx-bus-width = <1>; 558 | }; 559 | }; 560 | #endif 561 | 562 | xec0: xec@10002000 { 563 | compatible = "nuclei,xec"; 564 | reg = <0x0 0x10002000 0x0 0x1000>; 565 | interrupt-parent = <&plic0>; 566 | interrupts = <8>; 567 | clocks = <&xecclk>; 568 | /*local-mac-address = [00 2b 20 21 03 23];*/ 569 | phy-handle = <&rtl8211f>; 570 | phy-mode = "rgmii"; 571 | desc_mem = <&noncachable_memory>; 572 | status = "disabled"; 573 | mdio { 574 | compatible = "snps,dwmac-mdio"; 575 | #address-cells = <1>; 576 | #size-cells = <0>; 577 | 578 | rtl8211f: ethernet-phy@0 { 579 | compatible = "ethernet-phy-ieee802.3-c22"; 580 | reg = <0>; 581 | }; 582 | }; 583 | }; 584 | 585 | sysrst@18030ff0 { 586 | compatible = "nuclei,sysrst"; 587 | reg = <0x0 0x18030ff0 0x0 0x0>; 588 | }; 589 | }; 590 | --------------------------------------------------------------------------------