├── .gitignore ├── LICENSE ├── README.md ├── bitstreams └── Alhambra-II │ ├── demo-Alhambra-II.bin │ ├── soc-rars-MMIO-1-port.bin │ └── soc-rars-MMIO-2-ports.bin ├── blocks ├── Parts │ ├── Bus.ice │ ├── Flash-soc.ice │ ├── IO.ice │ ├── RAM-1KB-soc.ice │ ├── RAM-1KB.ice │ ├── SPI_flash.ice │ ├── uart-soc.ice │ └── uart.ice ├── RV32i.ice └── RV32imc.ice ├── firmware ├── soc-demo │ ├── src-asm │ │ ├── 01-leds.bin │ │ ├── 01-leds.s │ │ ├── 02-count-rars.s │ │ ├── 02-count-sim.s │ │ ├── 02-count.bin │ │ ├── 02-count.s │ │ ├── 03-count2.s │ │ ├── Makefile │ │ ├── sections.lds │ │ └── test.s │ └── src-c │ │ ├── Makefile │ │ ├── leds-on.bin │ │ ├── leds-on.c │ │ ├── leds-on.s │ │ ├── sections.lds │ │ ├── start.s │ │ ├── test.bin │ │ └── test.c ├── soc-rars-MMIO-1-port │ └── rars │ │ ├── counter.bin │ │ ├── counter.s │ │ ├── counter.sh │ │ ├── leds-on.bin │ │ ├── leds-on.s │ │ └── leds-on.sh └── soc-rars-MMIO-2-ports │ └── rars │ ├── 01-leds-on.bin │ ├── 01-leds-on.s │ ├── 02-test-2-ports.bin │ ├── 02-test-2-ports.s │ └── test-2-ports.sh ├── package.json ├── soc-demo.ice ├── soc-rars-MMIO-1-port.ice ├── soc-rars-MMIO-2-ports.ice └── wiki ├── github-project-logo.png ├── project-logo.png ├── src ├── github-project-logo.svg └── project-logo.svg └── v1.2.0 ├── demo-01.gif └── terminal-01.png /.gitignore: -------------------------------------------------------------------------------- 1 | ice-build/ 2 | rars1_5.jar 3 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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Interpretation of Sections 15 and 16. 613 | 614 | If the disclaimer of warranty and limitation of liability provided 615 | above cannot be given local legal effect according to their terms, 616 | reviewing courts shall apply local law that most closely approximates 617 | an absolute waiver of all civil liability in connection with the 618 | Program, unless a warranty or assumption of liability accompanies a 619 | copy of the Program in return for a fee. 620 | 621 | END OF TERMS AND CONDITIONS 622 | 623 | How to Apply These Terms to Your New Programs 624 | 625 | If you develop a new program, and you want it to be of the greatest 626 | possible use to the public, the best way to achieve this is to make it 627 | free software which everyone can redistribute and change under these terms. 628 | 629 | To do so, attach the following notices to the program. It is safest 630 | to attach them to the start of each source file to most effectively 631 | state the exclusion of warranty; and each file should have at least 632 | the "copyright" line and a pointer to where the full notice is found. 633 | 634 | 635 | Copyright (C) 636 | 637 | This program is free software: you can redistribute it and/or modify 638 | it under the terms of the GNU General Public License as published by 639 | the Free Software Foundation, either version 3 of the License, or 640 | (at your option) any later version. 641 | 642 | This program is distributed in the hope that it will be useful, 643 | but WITHOUT ANY WARRANTY; without even the implied warranty of 644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 645 | GNU General Public License for more details. 646 | 647 | You should have received a copy of the GNU General Public License 648 | along with this program. If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | ![](https://github.com/Obijuan/RISC-V-FPGA/raw/master/wiki/project-logo.png) 2 | 3 | # RISC-V-FPGA 4 | RISC-V CPU for OpenFPGAs, in Icestudio 5 | 6 | 7 | ## Quick start 8 | 9 | * Open the **soc-demo.ice** file with Icestudio 12 or higher 10 | * Connect the Alhambra-II board (or compatible) and upload the design 11 | * It will take around 1 min to sinthesize and upload to the board 12 | * The system is ready for executing your firmware! 13 | 14 | ### Testing the firmaware in C 15 | 16 | * go to the firmware/soc-demo/src-c folder 17 | * Execute make (It is assumed that you already have the risc-v tools installed) 18 | * You should see a binary counter in the LEDs 19 | * If you open a serial terminal (115200 bauds) you will see messages 20 | 21 | ![](wiki/v1.2.0/terminal-01.png) 22 | 23 | * In this [youtube video](https://www.youtube.com/watch?v=mv1SFoqzZWY) you can see it in action! 24 | 25 | ![](wiki//v1.2.0/demo-01.gif) 26 | 27 | * Pressing the "1" key will reset the counter and show the intial message again 28 | 29 | 30 | ### Testing the firmware in asm 31 | 32 | * go to the firmware/soc-demo/src-asm folder 33 | * Execute make 34 | * You should see a value in the LEDs 35 | 36 | ## Credits 37 | 38 | It is based on the picorv32 by Clifford Wolf 39 | https://github.com/cliffordwolf/picorv32 40 | 41 | ## SOCs for the RARs simulator 42 | 43 | There are two socs for using with the RARs simulador: 44 | * soc-rars-MMIO-1-port.ice: It have no uart and 1 output port at address 0xFFFF0000, connected to the LEDs 45 | * soc-rars-MMIO-2-ports.ice: The previous soc plus one additional output port, connected to the D0-D7 pins in the Alhambra II board 46 | 47 | In the firmware/soc-rars-MMIO-1/rars and firmware/soc-rars-MMIO-2/rars folderS there are examples for trying. Open them with the RARs simulator, assemble and dump the code into a .bin file. Then flash it into the FPGA with iceprog tool: 48 | 49 | ``` 50 | iceprog -o 1M file.bin 51 | ``` 52 | 53 | or [apio](https://github.com/FPGAwars/apio): 54 | 55 | ``` 56 | apio raw "iceprog -o 1M file.bin" 57 | ``` 58 | -------------------------------------------------------------------------------- /bitstreams/Alhambra-II/demo-Alhambra-II.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/bitstreams/Alhambra-II/demo-Alhambra-II.bin -------------------------------------------------------------------------------- /bitstreams/Alhambra-II/soc-rars-MMIO-1-port.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/bitstreams/Alhambra-II/soc-rars-MMIO-1-port.bin -------------------------------------------------------------------------------- /bitstreams/Alhambra-II/soc-rars-MMIO-2-ports.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/bitstreams/Alhambra-II/soc-rars-MMIO-2-ports.bin -------------------------------------------------------------------------------- /blocks/Parts/Bus.ice: -------------------------------------------------------------------------------- 1 | { 2 | "version": "1.2", 3 | "package": { 4 | "name": "Bus-4", 5 | "version": "0.1", 6 | "description": "Bus de 32 bits de 4 canales", 7 | "author": "Juan González-Gómez (Obijuan)", 8 | "image": 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"name": "i1", 1385 | "range": "[31:0]", 1386 | "clock": false, 1387 | "size": 32 1388 | }, 1389 | "position": { 1390 | "x": -720, 1391 | "y": -8 1392 | } 1393 | }, 1394 | { 1395 | "id": "ba21cc3b-aa4f-4a93-a7c0-57af882594ef", 1396 | "type": "basic.input", 1397 | "data": { 1398 | "name": "i0", 1399 | "range": "[31:0]", 1400 | "clock": false, 1401 | "size": 32 1402 | }, 1403 | "position": { 1404 | "x": -720, 1405 | "y": 40 1406 | } 1407 | }, 1408 | { 1409 | "id": "c8d09e8a-5bb8-4af3-acc5-694739670699", 1410 | "type": "basic.input", 1411 | "data": { 1412 | "name": "sel", 1413 | "range": "[1:0]", 1414 | "clock": false, 1415 | "size": 2 1416 | }, 1417 | "position": { 1418 | "x": -616, 1419 | "y": 96 1420 | } 1421 | }, 1422 | { 1423 | "id": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1424 | "type": "basic.code", 1425 | "data": { 1426 | "code": "//-- Multiplexor de 4 a 1, \n//-- de 32 bits\n\nassign o = (s == 3'h0) ? i0 :\n (s == 3'h1) ? i1 :\n (s == 3'h2) ? i2 : \n (s == 3'h3) ? i3 :\n 32'h0;\n \n\n", 1427 | "params": [], 1428 | "ports": { 1429 | "in": [ 1430 | { 1431 | "name": "i3", 1432 | "range": "[31:0]", 1433 | "size": 32 1434 | }, 1435 | { 1436 | "name": "i2", 1437 | "range": "[31:0]", 1438 | "size": 32 1439 | }, 1440 | { 1441 | "name": "i1", 1442 | "range": "[31:0]", 1443 | "size": 32 1444 | }, 1445 | { 1446 | "name": "i0", 1447 | "range": "[31:0]", 1448 | "size": 32 1449 | }, 1450 | { 1451 | "name": "s", 1452 | "range": "[1:0]", 1453 | "size": 2 1454 | } 1455 | ], 1456 | "out": [ 1457 | { 1458 | "name": "o", 1459 | "range": "[31:0]", 1460 | "size": 32 1461 | } 1462 | ] 1463 | } 1464 | }, 1465 | "position": { 1466 | "x": -464, 1467 | "y": -104 1468 | }, 1469 | "size": { 1470 | "width": 352, 1471 | "height": 256 1472 | } 1473 | } 1474 | ], 1475 | "wires": [ 1476 | { 1477 | "source": { 1478 | "block": "79c35ba1-d425-4fd6-966a-211c9e7012c7", 1479 | "port": "out" 1480 | }, 1481 | "target": { 1482 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1483 | "port": "i3" 1484 | }, 1485 | "size": 32 1486 | }, 1487 | { 1488 | "source": { 1489 | "block": "7d2a0e23-88a0-4674-baf3-6c916e9f6744", 1490 | "port": "out" 1491 | }, 1492 | "target": { 1493 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1494 | "port": "i2" 1495 | }, 1496 | "size": 32 1497 | }, 1498 | { 1499 | "source": { 1500 | "block": "fcdf38f3-2b14-413b-80f2-6c10cb054215", 1501 | "port": "out" 1502 | }, 1503 | "target": { 1504 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1505 | "port": "i1" 1506 | }, 1507 | "size": 32 1508 | }, 1509 | { 1510 | "source": { 1511 | "block": "ba21cc3b-aa4f-4a93-a7c0-57af882594ef", 1512 | "port": "out" 1513 | }, 1514 | "target": { 1515 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1516 | "port": "i0" 1517 | }, 1518 | "vertices": [], 1519 | "size": 32 1520 | }, 1521 | { 1522 | "source": { 1523 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1524 | "port": "o" 1525 | }, 1526 | "target": { 1527 | "block": "b246c71c-7d24-489d-9dfc-48dd229bad4d", 1528 | "port": "in" 1529 | }, 1530 | "size": 32 1531 | }, 1532 | { 1533 | "source": { 1534 | "block": "c8d09e8a-5bb8-4af3-acc5-694739670699", 1535 | "port": "out" 1536 | }, 1537 | "target": { 1538 | "block": "34e6d77b-15a8-4b7c-8c41-09e9b8d4d2be", 1539 | "port": "s" 1540 | }, 1541 | "size": 2 1542 | } 1543 | ] 1544 | } 1545 | } 1546 | }, 1547 | "eecece47b8724b759ba289c7374654e039c95263": { 1548 | "package": { 1549 | "name": "Codificador-4-2", 1550 | "version": "0.1", 1551 | "description": "Codificador de 4 a 2, con prioridad. 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2'h3 :\n (i2 == 1) ? 2'h2 :\n (i1 == 1) ? 2'h1 : 0;\n \n", 1635 | "params": [], 1636 | "ports": { 1637 | "in": [ 1638 | { 1639 | "name": "i3" 1640 | }, 1641 | { 1642 | "name": "i2" 1643 | }, 1644 | { 1645 | "name": "i1" 1646 | }, 1647 | { 1648 | "name": "i0" 1649 | } 1650 | ], 1651 | "out": [ 1652 | { 1653 | "name": "y", 1654 | "range": "[1:0]", 1655 | "size": 2 1656 | }, 1657 | { 1658 | "name": "zero" 1659 | } 1660 | ] 1661 | } 1662 | }, 1663 | "position": { 1664 | "x": 376, 1665 | "y": 104 1666 | }, 1667 | "size": { 1668 | "width": 360, 1669 | "height": 176 1670 | } 1671 | } 1672 | ], 1673 | "wires": [ 1674 | { 1675 | "source": { 1676 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1677 | "port": "y" 1678 | }, 1679 | "target": { 1680 | "block": "e903ef36-4c4c-454c-96a8-1ec29f586779", 1681 | "port": "in" 1682 | }, 1683 | "size": 2 1684 | }, 1685 | { 1686 | "source": { 1687 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1688 | "port": "zero" 1689 | }, 1690 | "target": { 1691 | "block": "0665fc89-33f6-486e-b881-aa40b95e41e5", 1692 | "port": "in" 1693 | } 1694 | }, 1695 | { 1696 | "source": { 1697 | "block": "b3485778-770a-4376-a6cf-0255a60c9099", 1698 | "port": "out" 1699 | }, 1700 | "target": { 1701 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1702 | "port": "i3" 1703 | } 1704 | }, 1705 | { 1706 | "source": { 1707 | "block": "4ce44022-063f-48e0-84ba-6d3b897d8bb1", 1708 | "port": "out" 1709 | }, 1710 | "target": { 1711 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1712 | "port": "i2" 1713 | } 1714 | }, 1715 | { 1716 | "source": { 1717 | "block": "cdd4fb27-84bd-4556-9bce-7c8d782b125c", 1718 | "port": "out" 1719 | }, 1720 | "target": { 1721 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1722 | "port": "i1" 1723 | }, 1724 | "vertices": [] 1725 | }, 1726 | { 1727 | "source": { 1728 | "block": "ec204846-3e57-4ee8-a267-08023b485411", 1729 | "port": "out" 1730 | }, 1731 | "target": { 1732 | "block": "3f02a995-3a83-44a4-8956-b2640956baac", 1733 | "port": "i0" 1734 | } 1735 | } 1736 | ] 1737 | } 1738 | } 1739 | }, 1740 | "725d0b6f29b4664d09f569f3db4a0d0aa0da7e0f": { 1741 | "package": { 1742 | "name": "Valor_00_32bits", 1743 | "version": "0.0.1", 1744 | "description": "Valor constante 0, de 32 bits", 1745 | "author": "Juan Gonzalez-Gomez (Obijuan)", 1746 | "image": "%3Csvg%20xmlns=%22http://www.w3.org/2000/svg%22%20width=%22145.966%22%20height=%22231.112%22%20viewBox=%220%200%20136.84269%20216.6676%22%3E%3Cg%20font-weight=%22400%22%20font-family=%22Ubuntu%20Mono%22%20letter-spacing=%220%22%20word-spacing=%220%22%3E%3Ctext%20style=%22line-height:0%25;-inkscape-font-specification:'Ubuntu%20Mono'%22%20x=%22334.615%22%20y=%22646.344%22%20fill=%22green%22%20transform=%22translate(-350.044%20-434.037)%22%3E%3Ctspan%20x=%22334.615%22%20y=%22646.344%22%20style=%22line-height:1.25%22%20font-size=%22335.399%22%3E0%3C/tspan%3E%3C/text%3E%3Ctext%20style=%22line-height:0%25;-inkscape-font-specification:'Ubuntu%20Mono'%22%20x=%22322.722%22%20y=%22721.624%22%20transform=%22translate(-350.044%20-434.037)%22/%3E%3Ctext%20style=%22line-height:0%25;-inkscape-font-specification:'Ubuntu%20Mono'%22%20x=%22484.66%22%20y=%22655.999%22%20fill=%22#00f%22%20transform=%22translate(-350.044%20-434.037)%22/%3E%3C/g%3E%3C/svg%3E" 1747 | }, 1748 | "design": { 1749 | "graph": { 1750 | "blocks": [ 1751 | { 1752 | "id": "50bf65d5-567c-4024-bb76-f821a169dcf8", 1753 | "type": "basic.output", 1754 | "data": { 1755 | "name": "", 1756 | "range": "[31:0]", 1757 | "size": 32 1758 | }, 1759 | "position": { 1760 | "x": 960, 1761 | "y": 248 1762 | } 1763 | }, 1764 | { 1765 | "id": "c0fb4784-5e8c-4f41-9f4b-6daa2e9e03a4", 1766 | "type": "basic.constant", 1767 | "data": { 1768 | "name": "", 1769 | "value": "0", 1770 | "local": true 1771 | }, 1772 | "position": { 1773 | "x": 728, 1774 | "y": 152 1775 | } 1776 | }, 1777 | { 1778 | "id": "9885feb6-ca56-493f-8f9b-7c1ed5ba5713", 1779 | "type": "70cd061f4d24e2bfb4a1264785cd2a7d0ff1bd12", 1780 | "position": { 1781 | "x": 728, 1782 | "y": 248 1783 | }, 1784 | "size": { 1785 | "width": 96, 1786 | "height": 64 1787 | } 1788 | } 1789 | ], 1790 | "wires": [ 1791 | { 1792 | "source": { 1793 | "block": "c0fb4784-5e8c-4f41-9f4b-6daa2e9e03a4", 1794 | "port": "constant-out" 1795 | }, 1796 | "target": { 1797 | "block": "9885feb6-ca56-493f-8f9b-7c1ed5ba5713", 1798 | "port": "c0fb4784-5e8c-4f41-9f4b-6daa2e9e03a4" 1799 | } 1800 | }, 1801 | { 1802 | "source": { 1803 | "block": "9885feb6-ca56-493f-8f9b-7c1ed5ba5713", 1804 | "port": "6c6347fd-d955-489b-acab-c4eef791127f" 1805 | }, 1806 | "target": { 1807 | "block": "50bf65d5-567c-4024-bb76-f821a169dcf8", 1808 | "port": "in" 1809 | }, 1810 | "size": 32 1811 | } 1812 | ] 1813 | } 1814 | } 1815 | }, 1816 | "70cd061f4d24e2bfb4a1264785cd2a7d0ff1bd12": { 1817 | "package": { 1818 | "name": "Constante-32bits", 1819 | "version": "0.0.1", 1820 | "description": "Valor genérico constante, de 32 bits. Su valor se introduce como parámetro. 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"10", 485 | "name": "", 486 | "value": "" 487 | }, 488 | { 489 | "index": "9", 490 | "name": "", 491 | "value": "" 492 | }, 493 | { 494 | "index": "8", 495 | "name": "", 496 | "value": "" 497 | }, 498 | { 499 | "index": "7", 500 | "name": "", 501 | "value": "" 502 | }, 503 | { 504 | "index": "6", 505 | "name": "", 506 | "value": "" 507 | }, 508 | { 509 | "index": "5", 510 | "name": "", 511 | "value": "" 512 | }, 513 | { 514 | "index": "4", 515 | "name": "", 516 | "value": "" 517 | }, 518 | { 519 | "index": "3", 520 | "name": "", 521 | "value": "" 522 | }, 523 | { 524 | "index": "2", 525 | "name": "", 526 | "value": "" 527 | }, 528 | { 529 | "index": "1", 530 | "name": "", 531 | "value": "" 532 | }, 533 | { 534 | "index": "0", 535 | "name": "", 536 | "value": "" 537 | } 538 | ], 539 | "virtual": true, 540 | "clock": false 541 | }, 542 | "position": { 543 | "x": 224, 544 | "y": 408 545 | } 546 | }, 547 | { 548 | "id": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 549 | "type": "basic.code", 550 | "data": { 551 | "code": "localparam integer WORDS = 256;\n\nreg [31:0] mem [0:WORDS-1];\nreg [31:0] rdata;\n\n\talways @(posedge clk) begin\n\t\trdata <= mem[addr];\n\t\tif (wen[0]) mem[addr][ 7: 0] <= wdata[ 7: 0];\n\t\tif (wen[1]) mem[addr][15: 8] <= wdata[15: 8];\n\t\tif (wen[2]) mem[addr][23:16] <= wdata[23:16];\n\t\tif (wen[3]) mem[addr][31:24] <= wdata[31:24];\n\tend", 552 | "params": [], 553 | "ports": { 554 | "in": [ 555 | { 556 | "name": "clk" 557 | }, 558 | { 559 | "name": "wen", 560 | "range": "[3:0]", 561 | "size": 4 562 | }, 563 | { 564 | "name": "addr", 565 | "range": "[21:0]", 566 | "size": 22 567 | }, 568 | { 569 | "name": "wdata", 570 | "range": "[31:0]", 571 | "size": 32 572 | } 573 | ], 574 | "out": [ 575 | { 576 | "name": "rdata", 577 | "range": "[31:0]", 578 | "size": 32 579 | } 580 | ] 581 | } 582 | }, 583 | "position": { 584 | "x": 424, 585 | "y": 224 586 | }, 587 | "size": { 588 | "width": 448, 589 | "height": 216 590 | } 591 | }, 592 | { 593 | "id": "978c99eb-6544-47be-8ce5-d2e0a872b09e", 594 | "type": "basic.info", 595 | "data": { 596 | "info": "RAM", 597 | "readonly": true 598 | }, 599 | "position": { 600 | "x": 608, 601 | "y": 176 602 | }, 603 | "size": { 604 | "width": 88, 605 | "height": 40 606 | } 607 | } 608 | ], 609 | "wires": [ 610 | { 611 | "source": { 612 | "block": "3c511a64-4e42-4e0f-ba8d-0c1bfeed12fc", 613 | "port": "out" 614 | }, 615 | "target": { 616 | "block": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 617 | "port": "wen" 618 | }, 619 | "size": 4 620 | }, 621 | { 622 | "source": { 623 | "block": "ed936c91-8989-43ab-a5ab-41747154be9b", 624 | "port": "out" 625 | }, 626 | "target": { 627 | "block": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 628 | "port": "addr" 629 | }, 630 | "size": 22 631 | }, 632 | { 633 | "source": { 634 | "block": "c5ea68d0-3f96-45af-a29a-4f25117b4fb1", 635 | "port": "out" 636 | }, 637 | "target": { 638 | "block": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 639 | "port": "wdata" 640 | }, 641 | "size": 32 642 | }, 643 | { 644 | "source": { 645 | "block": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 646 | "port": "rdata" 647 | }, 648 | "target": { 649 | "block": "c1f9da94-da10-4643-9876-1ef4f239faea", 650 | "port": "in" 651 | }, 652 | "size": 32 653 | }, 654 | { 655 | "source": { 656 | "block": "99e711ec-7a69-42b3-8feb-808051de583f", 657 | "port": "out" 658 | }, 659 | "target": { 660 | "block": "5e3ef3b0-a327-4f73-b996-3d167b69109f", 661 | "port": "clk" 662 | } 663 | } 664 | ] 665 | } 666 | }, 667 | "dependencies": {} 668 | } -------------------------------------------------------------------------------- /blocks/Parts/uart.ice: -------------------------------------------------------------------------------- 1 | { 2 | "version": "1.2", 3 | "package": { 4 | "name": "UART", 5 | "version": "0.1", 6 | "description": "Uart para comunicaciones serie con el pico-riscv", 7 | "author": "Juan Gonzalez-Gomez (Código de Clifford wolf, del proyecto picoriscv)", 8 | "image": "" 9 | }, 10 | "design": { 11 | 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"value": "" 850 | }, 851 | { 852 | "index": "5", 853 | "name": "", 854 | "value": "" 855 | }, 856 | { 857 | "index": "4", 858 | "name": "", 859 | "value": "" 860 | }, 861 | { 862 | "index": "3", 863 | "name": "", 864 | "value": "" 865 | }, 866 | { 867 | "index": "2", 868 | "name": "", 869 | "value": "" 870 | }, 871 | { 872 | "index": "1", 873 | "name": "", 874 | "value": "" 875 | }, 876 | { 877 | "index": "0", 878 | "name": "", 879 | "value": "" 880 | } 881 | ], 882 | "virtual": true, 883 | "clock": false 884 | }, 885 | "position": { 886 | "x": 632, 887 | "y": 880 888 | } 889 | }, 890 | { 891 | "id": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 892 | "type": "basic.code", 893 | "data": { 894 | "code": "reg [31:0] cfg_divider;\n\n\treg [3:0] recv_state;\n\treg [31:0] recv_divcnt;\n\treg [7:0] recv_pattern;\n\treg [7:0] recv_buf_data;\n\treg recv_buf_valid;\n\n\treg [9:0] send_pattern;\n\treg [3:0] send_bitcnt;\n\treg [31:0] send_divcnt;\n\treg send_dummy;\n\n\tassign reg_div_do = cfg_divider;\n\n\tassign reg_dat_wait = reg_dat_we && (send_bitcnt || send_dummy);\n\tassign reg_dat_do = recv_buf_valid ? recv_buf_data : ~0;\n\n\talways @(posedge clk) begin\n\t\tif (!resetn) begin\n\t\t\tcfg_divider <= 1;\n\t\tend else begin\n\t\t\tif (reg_div_we[0]) cfg_divider[ 7: 0] <= reg_div_di[ 7: 0];\n\t\t\tif (reg_div_we[1]) cfg_divider[15: 8] <= reg_div_di[15: 8];\n\t\t\tif (reg_div_we[2]) cfg_divider[23:16] <= reg_div_di[23:16];\n\t\t\tif (reg_div_we[3]) cfg_divider[31:24] <= reg_div_di[31:24];\n\t\tend\n\tend\n\n\talways @(posedge clk) begin\n\t\tif (!resetn) begin\n\t\t\trecv_state <= 0;\n\t\t\trecv_divcnt <= 0;\n\t\t\trecv_pattern <= 0;\n\t\t\trecv_buf_data <= 0;\n\t\t\trecv_buf_valid <= 0;\n\t\tend else begin\n\t\t\trecv_divcnt <= recv_divcnt + 1;\n\t\t\tif (reg_dat_re)\n\t\t\t\trecv_buf_valid <= 0;\n\t\t\tcase (recv_state)\n\t\t\t\t0: begin\n\t\t\t\t\tif (!ser_rx)\n\t\t\t\t\t\trecv_state <= 1;\n\t\t\t\t\trecv_divcnt <= 0;\n\t\t\t\tend\n\t\t\t\t1: begin\n\t\t\t\t\tif (2*recv_divcnt > cfg_divider) begin\n\t\t\t\t\t\trecv_state <= 2;\n\t\t\t\t\t\trecv_divcnt <= 0;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\t10: begin\n\t\t\t\t\tif (recv_divcnt > cfg_divider) begin\n\t\t\t\t\t\trecv_buf_data <= recv_pattern;\n\t\t\t\t\t\trecv_buf_valid <= 1;\n\t\t\t\t\t\trecv_state <= 0;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\tdefault: begin\n\t\t\t\t\tif (recv_divcnt > cfg_divider) begin\n\t\t\t\t\t\trecv_pattern <= {ser_rx, recv_pattern[7:1]};\n\t\t\t\t\t\trecv_state <= recv_state + 1;\n\t\t\t\t\t\trecv_divcnt <= 0;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\tendcase\n\t\tend\n\tend\n\n\tassign ser_tx = send_pattern[0];\n\n\talways @(posedge clk) begin\n\t\tif (reg_div_we)\n\t\t\tsend_dummy <= 1;\n\t\tsend_divcnt <= send_divcnt + 1;\n\t\tif (!resetn) begin\n\t\t\tsend_pattern <= ~0;\n\t\t\tsend_bitcnt <= 0;\n\t\t\tsend_divcnt <= 0;\n\t\t\tsend_dummy <= 1;\n\t\tend else begin\n\t\t\tif (send_dummy && !send_bitcnt) begin\n\t\t\t\tsend_pattern <= ~0;\n\t\t\t\tsend_bitcnt <= 15;\n\t\t\t\tsend_divcnt <= 0;\n\t\t\t\tsend_dummy <= 0;\n\t\t\tend else\n\t\t\tif (reg_dat_we && !send_bitcnt) begin\n\t\t\t\tsend_pattern <= {1'b1, reg_dat_di[7:0], 1'b0};\n\t\t\t\tsend_bitcnt <= 10;\n\t\t\t\tsend_divcnt <= 0;\n\t\t\tend else\n\t\t\tif (send_divcnt > cfg_divider && send_bitcnt) begin\n\t\t\t\tsend_pattern <= {1'b1, send_pattern[9:1]};\n\t\t\t\tsend_bitcnt <= send_bitcnt - 1;\n\t\t\t\tsend_divcnt <= 0;\n\t\t\tend\n\t\tend\n\tend", 895 | "params": [], 896 | "ports": { 897 | "in": [ 898 | { 899 | "name": "clk" 900 | }, 901 | { 902 | "name": "resetn" 903 | }, 904 | { 905 | "name": "ser_rx" 906 | }, 907 | { 908 | "name": "reg_div_we", 909 | "range": "[3:0]", 910 | "size": 4 911 | }, 912 | { 913 | "name": "reg_dat_we" 914 | }, 915 | { 916 | "name": "reg_dat_re" 917 | }, 918 | { 919 | "name": "reg_dat_di", 920 | "range": "[31:0]", 921 | "size": 32 922 | }, 923 | { 924 | "name": "reg_div_di", 925 | "range": "[31:0]", 926 | "size": 32 927 | } 928 | ], 929 | "out": [ 930 | { 931 | "name": "ser_tx" 932 | }, 933 | { 934 | "name": "reg_div_do", 935 | "range": "[31:0]", 936 | "size": 32 937 | }, 938 | { 939 | "name": "reg_dat_do", 940 | "range": "[31:0]", 941 | "size": 32 942 | }, 943 | { 944 | "name": "reg_dat_wait" 945 | } 946 | ] 947 | } 948 | }, 949 | "position": { 950 | "x": 856, 951 | "y": 472 952 | }, 953 | "size": { 954 | "width": 640, 955 | "height": 472 956 | } 957 | } 958 | ], 959 | "wires": [ 960 | { 961 | "source": { 962 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 963 | "port": "ser_tx" 964 | }, 965 | "target": { 966 | "block": "4140f966-3fd4-4c7f-a3d3-4528b9ffc39c", 967 | "port": "in" 968 | }, 969 | "vertices": [] 970 | }, 971 | { 972 | "source": { 973 | "block": "b041c073-0b69-45bc-82f8-dc0ca159d915", 974 | "port": "out" 975 | }, 976 | "target": { 977 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 978 | "port": "ser_rx" 979 | } 980 | }, 981 | { 982 | "source": { 983 | "block": "f66f77e6-ad74-4cec-9aa4-402b22c70cd1", 984 | "port": "out" 985 | }, 986 | "target": { 987 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 988 | "port": "clk" 989 | } 990 | }, 991 | { 992 | "source": { 993 | "block": "54e644fb-09a9-4a4d-ac1d-e9c7456cb66f", 994 | "port": "out" 995 | }, 996 | "target": { 997 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 998 | "port": "resetn" 999 | } 1000 | }, 1001 | { 1002 | "source": { 1003 | "block": "595770ed-92a3-472a-8ba9-ed6ddd9361f9", 1004 | "port": "out" 1005 | }, 1006 | "target": { 1007 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1008 | "port": "reg_div_we" 1009 | }, 1010 | "size": 4 1011 | }, 1012 | { 1013 | "source": { 1014 | "block": "260c6329-dcd4-43be-8f9d-d6298c6e6943", 1015 | "port": "out" 1016 | }, 1017 | "target": { 1018 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1019 | "port": "reg_dat_we" 1020 | } 1021 | }, 1022 | { 1023 | "source": { 1024 | "block": "883ab68b-6299-4ca7-824f-bac1f0d287c2", 1025 | "port": "out" 1026 | }, 1027 | "target": { 1028 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1029 | "port": "reg_dat_re" 1030 | } 1031 | }, 1032 | { 1033 | "source": { 1034 | "block": "a83e8a9b-8c0c-4df9-93a9-0d509cd84bfd", 1035 | "port": "out" 1036 | }, 1037 | "target": { 1038 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1039 | "port": "reg_dat_di" 1040 | }, 1041 | "size": 32 1042 | }, 1043 | { 1044 | "source": { 1045 | "block": "669f2c1b-cf09-4f0f-8c4f-6be071f4a331", 1046 | "port": "out" 1047 | }, 1048 | "target": { 1049 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1050 | "port": "reg_div_di" 1051 | }, 1052 | "size": 32 1053 | }, 1054 | { 1055 | "source": { 1056 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1057 | "port": "reg_div_do" 1058 | }, 1059 | "target": { 1060 | "block": "b87d2e9e-04d4-4c3e-84c6-c8e185c9224e", 1061 | "port": "in" 1062 | }, 1063 | "size": 32 1064 | }, 1065 | { 1066 | "source": { 1067 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1068 | "port": "reg_dat_do" 1069 | }, 1070 | "target": { 1071 | "block": "a6af2241-52d5-49ac-a891-ea6e7c675be0", 1072 | "port": "in" 1073 | }, 1074 | "size": 32 1075 | }, 1076 | { 1077 | "source": { 1078 | "block": "17dcdd21-83c4-4f56-83b9-9303bfdc10cb", 1079 | "port": "reg_dat_wait" 1080 | }, 1081 | "target": { 1082 | "block": "ce413c5f-e187-4460-aca5-5a0cc713da6b", 1083 | "port": "in" 1084 | } 1085 | } 1086 | ] 1087 | } 1088 | }, 1089 | "dependencies": {} 1090 | } -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/01-leds.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-demo/src-asm/01-leds.bin -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/01-leds.s: -------------------------------------------------------------------------------- 1 | .section .text 2 | 3 | #--- Hola Mundo para Risc-V 4 | #--- Sacar un valor por los LEDs 5 | 6 | #-- Direccion de mepeo de los LEDs 7 | li a0, 0x03000000 8 | 9 | #-- Valor a sacar por los leds 10 | li a1, 0x55 11 | 12 | #-- Sacar el valor por los LEDs 13 | sw a1, 0(a0) 14 | 15 | 16 | #-- FIN: bucle infinito 17 | inf: 18 | j inf 19 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/02-count-rars.s: -------------------------------------------------------------------------------- 1 | #--- Direccion donde está mapeado el Puerto de salida 2 | #--- conectado a los LEDs 3 | .eqv LEDS 0xFFFF0000 4 | 5 | #--- Direccion del segundo puerto 6 | .eqv DISP 0xFFFF0010 7 | 8 | 9 | .text 10 | 11 | #-- Usamos el regitro x5 como puntero de acceso al puerto 12 | li x5, LEDS 13 | 14 | #-- Inicializar contador a 0 15 | li a1, 0 16 | 17 | 18 | bucle: 19 | #-- Mostrar valor en los leds 20 | sw a1, 0(x5) 21 | 22 | #-- Pausa 23 | li a2, 0x1000 24 | delay: 25 | addi a2,a2, -1 26 | bgt a2, zero, delay 27 | 28 | #-- Incrementar el contador 29 | addi a1, a1, 1 30 | 31 | #-- Repetir 32 | j bucle 33 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/02-count-sim.s: -------------------------------------------------------------------------------- 1 | .text 2 | 3 | #--- Hola Mundo para Risc-V 4 | #--- Sacar un valor por los LEDs 5 | 6 | #-- Direccion de mepeo de los LEDs 7 | li a0, 0x10010000 8 | 9 | #-- Inicializar contador a 0 10 | li a1, 0 11 | 12 | 13 | bucle: 14 | #-- Mostrar valor en los leds 15 | sw a1, 0(a0) 16 | 17 | #-- Pausa 18 | li a2, 0x1000 19 | delay: 20 | addi a2,a2, -1 21 | bgt a2, zero, delay 22 | 23 | #-- Incrementar el contador 24 | addi a1, a1, 1 25 | 26 | #-- Repetir 27 | j bucle 28 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/02-count.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-demo/src-asm/02-count.bin -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/02-count.s: -------------------------------------------------------------------------------- 1 | .text 2 | 3 | #--- Hola Mundo para Risc-V 4 | #--- Sacar un valor por los LEDs 5 | 6 | #-- Direccion de mepeo de los LEDs 7 | li a0, 0x03000000 8 | 9 | #-- Inicializar contador a 0 10 | li a1, 0 11 | 12 | 13 | bucle: 14 | #-- Mostrar valor en los leds 15 | sw a1, 0(a0) 16 | 17 | #-- Pausa 18 | li a2, 0x1000 19 | delay: 20 | addi a2,a2, -1 21 | bgt a2, zero, delay 22 | 23 | #-- Incrementar el contador 24 | addi a1, a1, 1 25 | 26 | #-- Repetir 27 | j bucle 28 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/03-count2.s: -------------------------------------------------------------------------------- 1 | #--------------------------------- 2 | #-- Constantes 3 | #--------------------------------- 4 | 5 | 6 | #-- Direccion base de los LEDs 7 | .equ LEDS, 0x03000000 8 | 9 | #-- Valor a sacar por los LEDs 10 | .equ VALOR, 0xAA 11 | 12 | 13 | #-------------------------- 14 | #-- Comienzo del programa 15 | #-------------------------- 16 | .section .text 17 | 18 | #-- a0: Puntero a los LEDs 19 | li s0, LEDS 20 | 21 | #-- Sacar el valor por los LEDs 22 | li a1, VALOR 23 | sb a1, 0(s0) 24 | 25 | #-- ESPERAR 26 | li a0, 10 27 | jal delay 28 | 29 | #-- Almacenar un valor en la dirección 0 de memoria 30 | li t0, 0xFF 31 | sb t0, 0(x0) 32 | 33 | #-- Leer el valor de la memoria 34 | lb t1, 0(x0) 35 | 36 | #-- Sacarlo por los LEDs 37 | sb t1, 0(s0) 38 | 39 | #-- Terminar 40 | inf: 41 | j inf 42 | 43 | 44 | #--------------------------------------- 45 | #-- Subrutina DELAY 46 | #-- ENTRADAS: 47 | #-- a0: Cantidad a esperar 48 | #-------------------------------------- 49 | delay: 50 | 51 | #-- Bucle de ciclos de pausa 52 | delay_loop: 53 | 54 | #-- Si a0==0, hemos terminado 55 | beq a0, zero, delay_end 56 | 57 | #-- Queda un ciclo menos 58 | addi a0, a0, -1 59 | 60 | #-- Pausa minima 61 | li t0, 0x1000 62 | delay2: 63 | addi t0, t0, -1 64 | bgt t0, zero, delay2 65 | j delay_loop 66 | 67 | delay_end: 68 | ret 69 | 70 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/Makefile: -------------------------------------------------------------------------------- 1 | ##-- Directorio donde esta instalada la toolchain de Riscv 2 | RISCV = /opt/riscv32i/bin 3 | 4 | #-- Opcion de Arquitectura 5 | ARCH = -march=rv32im 6 | 7 | #-- Opciones de compilacion 8 | OPTIONS = -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib 9 | 10 | #-- Compilador 11 | GCC = $(RISCV)/riscv32-unknown-elf-gcc $(ARCH) 12 | 13 | 14 | E01 = 01-leds 15 | E02 = 02-count 16 | E03 = 03-count2 17 | 18 | $(E01): $(E01).bin 19 | apio raw "iceprog -o 1M $<" 20 | 21 | $(E02): $(E02).bin 22 | apio raw "iceprog -o 1M $<" 23 | 24 | $(E03): $(E03).bin 25 | apio raw "iceprog -o 1M $<" 26 | 27 | ##-- Crear el ejecutable a partir el fichero ensamblador 28 | %.elf : %.s 29 | $(GCC) $(OPTIONS) -o $@ $< 30 | 31 | 32 | ##-- Crear el fichero binary para grabar en la flash 33 | %.bin : %.elf 34 | $(RISCV)/riscv32-unknown-elf-objcopy -O binary $< $@ 35 | 36 | # ---- Clean ---- 37 | 38 | clean: 39 | rm -f *.elf *.hex *.bin 40 | 41 | .PHONY: $(E01) 42 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/sections.lds: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | FLASH (rx) : ORIGIN = 0x00100000, LENGTH = 0x400000 /* entire flash, 4 MiB */ 4 | RAM (xrw) : ORIGIN = 0x00000000, LENGTH = 0x000400 /* 1 KB */ 5 | } 6 | 7 | SECTIONS { 8 | /* The program code and other data goes into FLASH */ 9 | .text : 10 | { 11 | . = ALIGN(4); 12 | *(.text) /* .text sections (code) */ 13 | *(.text*) /* .text* sections (code) */ 14 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 15 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 16 | *(.srodata) /* .rodata sections (constants, strings, etc.) */ 17 | *(.srodata*) /* .rodata* sections (constants, strings, etc.) */ 18 | _etext = .; /* define a global symbol at end of code */ 19 | _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ 20 | } >FLASH 21 | 22 | 23 | /* This is the initialized data section 24 | The program executes knowing that the data is in the RAM 25 | but the loader puts the initial values in the FLASH (inidata). 26 | It is one task of the startup to copy the initial values from FLASH to RAM. */ 27 | .data : AT ( _sidata ) 28 | { 29 | . = ALIGN(4); 30 | _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ 31 | _ram_start = .; /* create a global symbol at ram start for garbage collector */ 32 | . = ALIGN(4); 33 | *(.data) /* .data sections */ 34 | *(.data*) /* .data* sections */ 35 | *(.sdata) /* .sdata sections */ 36 | *(.sdata*) /* .sdata* sections */ 37 | . = ALIGN(4); 38 | _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ 39 | } >RAM 40 | 41 | /* Uninitialized data section */ 42 | .bss : 43 | { 44 | . = ALIGN(4); 45 | _sbss = .; /* define a global symbol at bss start; used by startup code */ 46 | *(.bss) 47 | *(.bss*) 48 | *(.sbss) 49 | *(.sbss*) 50 | *(COMMON) 51 | 52 | . = ALIGN(4); 53 | _ebss = .; /* define a global symbol at bss end; used by startup code */ 54 | } >RAM 55 | 56 | /* this is to define the start of the heap, and make sure we have a minimum size */ 57 | .heap : 58 | { 59 | . = ALIGN(4); 60 | _heap_start = .; /* define a global symbol at heap start */ 61 | } >RAM 62 | } 63 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-asm/test.s: -------------------------------------------------------------------------------- 1 | .text 2 | 3 | #--- Hola Mundo para Risc-V 4 | #--- Sacar un valor por los LEDs 5 | 6 | #-- Direccion de mepeo de los LEDs 7 | li a0, 0x03000000 8 | 9 | #-- Inicializar contador a 0 10 | li a1, 0 11 | 12 | 13 | bucle: 14 | #-- Mostrar valor en los leds 15 | sw a1, 0(a0) 16 | 17 | #-- Pausa 18 | li a2, 0x1000 19 | delay: 20 | addi a2,a2, -1 21 | bgt a2, zero, delay 22 | 23 | #-- Incrementar el contador 24 | addi a1, a1, 1 25 | 26 | #-- Repetir 27 | j bucle 28 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/Makefile: -------------------------------------------------------------------------------- 1 | ##-- Riscv toolchain path 2 | RISCV = /opt/riscv32i/bin 3 | FIRMWARE = test 4 | 5 | 6 | prog: $(FIRMWARE).bin 7 | apio raw "iceprog -o 1M $(FIRMWARE).bin" 8 | 9 | $(FIRMWARE).elf: sections.lds start.s $(FIRMWARE).c 10 | $(RISCV)/riscv32-unknown-elf-gcc -DHX8KDEMO -march=rv32im -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o $(FIRMWARE).elf start.s $(FIRMWARE).c 11 | 12 | $(FIRMWARE).hex: $(FIRMWARE).elf 13 | $(RISCV)/riscv32-unknown-elf-objcopy -O verilog $(FIRMWARE).elf $(FIRMWARE).hex 14 | 15 | $(FIRMWARE).bin: $(FIRMWARE).elf 16 | $(RISCV)/riscv32-unknown-elf-objcopy -O binary $(FIRMWARE).elf $(FIRMWARE).bin 17 | 18 | # ---- Clean ---- 19 | 20 | clean: 21 | rm -f $(FIRMWARE).elf $(FIRMWARE).hex $(FIRMWARE).bin 22 | 23 | .PHONY: prog 24 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/leds-on.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-demo/src-c/leds-on.bin -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/leds-on.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | 4 | //-- LED's Address 5 | #define LEDs *(volatile uint32_t*)0x03000000 6 | 7 | 8 | void main() 9 | { 10 | //-- Turn on all the LEDs 11 | LEDs = 0xFF; 12 | 13 | while (1); 14 | 15 | } 16 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/leds-on.s: -------------------------------------------------------------------------------- 1 | .file "leds-on.c" 2 | .option nopic 3 | .text 4 | .comm leds,4,4 5 | .align 2 6 | .globl main 7 | .type main, @function 8 | main: 9 | addi sp,sp,-16 10 | sw s0,12(sp) 11 | addi s0,sp,16 12 | lui a5,%hi(leds) 13 | li a4,-65536 14 | sw a4,%lo(leds)(a5) 15 | lui a5,%hi(leds) 16 | lw a5,%lo(leds)(a5) 17 | li a4,170 18 | sw a4,0(a5) 19 | .L2: 20 | j .L2 21 | .size main, .-main 22 | .ident "GCC: (GNU) 8.2.0" 23 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/sections.lds: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | FLASH (rx) : ORIGIN = 0x00100000, LENGTH = 0x400000 /* entire flash, 4 MiB */ 4 | RAM (xrw) : ORIGIN = 0x00000000, LENGTH = 0x000400 /* 1 KB */ 5 | } 6 | 7 | SECTIONS { 8 | /* The program code and other data goes into FLASH */ 9 | .text : 10 | { 11 | . = ALIGN(4); 12 | *(.text) /* .text sections (code) */ 13 | *(.text*) /* .text* sections (code) */ 14 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 15 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 16 | *(.srodata) /* .rodata sections (constants, strings, etc.) */ 17 | *(.srodata*) /* .rodata* sections (constants, strings, etc.) */ 18 | _etext = .; /* define a global symbol at end of code */ 19 | _sidata = _etext; /* This is used by the startup in order to initialize the .data secion */ 20 | } >FLASH 21 | 22 | 23 | /* This is the initialized data section 24 | The program executes knowing that the data is in the RAM 25 | but the loader puts the initial values in the FLASH (inidata). 26 | It is one task of the startup to copy the initial values from FLASH to RAM. */ 27 | .data : AT ( _sidata ) 28 | { 29 | . = ALIGN(4); 30 | _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ 31 | _ram_start = .; /* create a global symbol at ram start for garbage collector */ 32 | . = ALIGN(4); 33 | *(.data) /* .data sections */ 34 | *(.data*) /* .data* sections */ 35 | *(.sdata) /* .sdata sections */ 36 | *(.sdata*) /* .sdata* sections */ 37 | . = ALIGN(4); 38 | _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ 39 | } >RAM 40 | 41 | /* Uninitialized data section */ 42 | .bss : 43 | { 44 | . = ALIGN(4); 45 | _sbss = .; /* define a global symbol at bss start; used by startup code */ 46 | *(.bss) 47 | *(.bss*) 48 | *(.sbss) 49 | *(.sbss*) 50 | *(COMMON) 51 | 52 | . = ALIGN(4); 53 | _ebss = .; /* define a global symbol at bss end; used by startup code */ 54 | } >RAM 55 | 56 | /* this is to define the start of the heap, and make sure we have a minimum size */ 57 | .heap : 58 | { 59 | . = ALIGN(4); 60 | _heap_start = .; /* define a global symbol at heap start */ 61 | } >RAM 62 | } 63 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/start.s: -------------------------------------------------------------------------------- 1 | .section .text 2 | 3 | start: 4 | 5 | # zero-initialize register file 6 | addi x1, zero, 0 7 | # x2 (sp) is initialized by reset 8 | addi x3, zero, 0 9 | addi x4, zero, 0 10 | addi x5, zero, 0 11 | addi x6, zero, 0 12 | addi x7, zero, 0 13 | addi x8, zero, 0 14 | addi x9, zero, 0 15 | addi x10, zero, 0 16 | addi x11, zero, 0 17 | addi x12, zero, 0 18 | addi x13, zero, 0 19 | addi x14, zero, 0 20 | addi x15, zero, 0 21 | addi x16, zero, 0 22 | addi x17, zero, 0 23 | addi x18, zero, 0 24 | addi x19, zero, 0 25 | addi x20, zero, 0 26 | addi x21, zero, 0 27 | addi x22, zero, 0 28 | addi x23, zero, 0 29 | addi x24, zero, 0 30 | addi x25, zero, 0 31 | addi x26, zero, 0 32 | addi x27, zero, 0 33 | addi x28, zero, 0 34 | addi x29, zero, 0 35 | addi x30, zero, 0 36 | addi x31, zero, 0 37 | 38 | # Update LEDs 39 | li a0, 0x03000000 40 | li a1, 1 41 | sw a1, 0(a0) 42 | 43 | # zero initialize entire scratchpad memory 44 | li a0, 0x00000000 45 | setmemloop: 46 | sw a0, 0(a0) 47 | addi a0, a0, 4 48 | blt a0, sp, setmemloop 49 | 50 | # Update LEDs 51 | li a0, 0x03000000 52 | li a1, 3 53 | sw a1, 0(a0) 54 | 55 | # copy data section 56 | la a0, _sidata 57 | la a1, _sdata 58 | la a2, _edata 59 | bge a1, a2, end_init_data 60 | loop_init_data: 61 | lw a3, 0(a0) 62 | sw a3, 0(a1) 63 | addi a0, a0, 4 64 | addi a1, a1, 4 65 | blt a1, a2, loop_init_data 66 | end_init_data: 67 | 68 | # Update LEDs 69 | li a0, 0x03000000 70 | li a1, 7 71 | sw a1, 0(a0) 72 | 73 | # zero-init bss section 74 | la a0, _sbss 75 | la a1, _ebss 76 | bge a0, a1, end_init_bss 77 | loop_init_bss: 78 | sw zero, 0(a0) 79 | addi a0, a0, 4 80 | blt a0, a1, loop_init_bss 81 | end_init_bss: 82 | 83 | # Update LEDs 84 | li a0, 0x03000000 85 | li a1, 15 86 | sw a1, 0(a0) 87 | 88 | # call main 89 | call main 90 | loop: 91 | j loop 92 | 93 | .global flashio_worker_begin 94 | .global flashio_worker_end 95 | 96 | .balign 4 97 | 98 | flashio_worker_begin: 99 | # a0 ... data pointer 100 | # a1 ... data length 101 | # a2 ... optional WREN cmd (0 = disable) 102 | 103 | # address of SPI ctrl reg 104 | li t0, 0x02000000 105 | 106 | # Set CS high, IO0 is output 107 | li t1, 0x120 108 | sh t1, 0(t0) 109 | 110 | # Enable Manual SPI Ctrl 111 | sb zero, 3(t0) 112 | 113 | # Send optional WREN cmd 114 | beqz a2, flashio_worker_L1 115 | li t5, 8 116 | andi t2, a2, 0xff 117 | flashio_worker_L4: 118 | srli t4, t2, 7 119 | sb t4, 0(t0) 120 | ori t4, t4, 0x10 121 | sb t4, 0(t0) 122 | slli t2, t2, 1 123 | andi t2, t2, 0xff 124 | addi t5, t5, -1 125 | bnez t5, flashio_worker_L4 126 | sb t1, 0(t0) 127 | 128 | # SPI transfer 129 | flashio_worker_L1: 130 | beqz a1, flashio_worker_L3 131 | li t5, 8 132 | lbu t2, 0(a0) 133 | flashio_worker_L2: 134 | srli t4, t2, 7 135 | sb t4, 0(t0) 136 | ori t4, t4, 0x10 137 | sb t4, 0(t0) 138 | lbu t4, 0(t0) 139 | andi t4, t4, 2 140 | srli t4, t4, 1 141 | slli t2, t2, 1 142 | or t2, t2, t4 143 | andi t2, t2, 0xff 144 | addi t5, t5, -1 145 | bnez t5, flashio_worker_L2 146 | sb t2, 0(a0) 147 | addi a0, a0, 1 148 | addi a1, a1, -1 149 | j flashio_worker_L1 150 | flashio_worker_L3: 151 | 152 | # Back to MEMIO mode 153 | li t1, 0x80 154 | sb t1, 3(t0) 155 | 156 | ret 157 | 158 | .balign 4 159 | flashio_worker_end: 160 | -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/test.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-demo/src-c/test.bin -------------------------------------------------------------------------------- /firmware/soc-demo/src-c/test.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | 4 | //-- Registros mapeados 5 | #define reg_uart_data (*(volatile uint32_t*)0x02000008) 6 | #define reg_leds (*(volatile uint32_t*)0x03000000) 7 | 8 | // -------------------------------------------------------- 9 | 10 | void putchar(char c) 11 | { 12 | if (c == '\n') 13 | putchar('\r'); 14 | reg_uart_data = c; 15 | } 16 | 17 | void print(const char *p) 18 | { 19 | while (*p) 20 | putchar(*(p++)); 21 | } 22 | 23 | char getchar_prompt(char *prompt) 24 | { 25 | int32_t c = -1; 26 | int32_t count = 0; 27 | 28 | uint32_t cycles_begin, cycles_now, cycles; 29 | __asm__ volatile ("rdcycle %0" : "=r"(cycles_begin)); 30 | 31 | reg_leds = ~0; 32 | count = 0; 33 | 34 | if (prompt) 35 | print(prompt); 36 | 37 | while (c == -1) { 38 | __asm__ volatile ("rdcycle %0" : "=r"(cycles_now)); 39 | cycles = cycles_now - cycles_begin; 40 | if (cycles > 2000000) { 41 | if (prompt) 42 | print(prompt); 43 | cycles_begin = cycles_now; 44 | count += 1; 45 | reg_leds = count; 46 | } 47 | c = reg_uart_data; 48 | } 49 | 50 | reg_leds = 0; 51 | return c; 52 | } 53 | 54 | char getchar() 55 | { 56 | return getchar_prompt(0); 57 | } 58 | 59 | void menu() 60 | { 61 | print("\n"); 62 | print(" ____ _ ____ ____\n"); 63 | print(" | _ \\(_) ___ ___/ ___| ___ / ___|\n"); 64 | print(" | |_) | |/ __/ _ \\___ \\ / _ \\| |\n"); 65 | print(" | __/| | (_| (_) |__) | (_) | |___\n"); 66 | print(" |_| |_|\\___\\___/____/ \\___/ \\____|\n"); 67 | print("\nRunning on the Alhambra II board :-)\n"); 68 | print("\n"); 69 | } 70 | 71 | // -------------------------------------------------------- 72 | 73 | void main() 74 | { 75 | char c; 76 | 77 | reg_leds = 0x1F; 78 | print("Booting...\n\n "); 79 | 80 | reg_leds = 0x7F; 81 | print("Press ENTER to continue..."); 82 | 83 | //-- Wait until /n or /r is received 84 | do { 85 | c = getchar_prompt(0); 86 | } while (c != '\n' && c != '\r'); 87 | 88 | menu(); 89 | 90 | while (1) 91 | { 92 | print("Command> "); 93 | char cmd = getchar(); 94 | if (cmd > 32 && cmd < 127) 95 | putchar(cmd); 96 | print("\n"); 97 | 98 | switch (cmd) 99 | { 100 | case '1': 101 | menu(); 102 | break; 103 | default: 104 | continue; 105 | } 106 | 107 | } 108 | } 109 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/counter.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-rars-MMIO-1-port/rars/counter.bin -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/counter.s: -------------------------------------------------------------------------------- 1 | #--- Direccion donde está mapeado el Puerto de salida 2 | #--- conectado a los LEDs 3 | .eqv LEDS 0xFFFF0000 4 | 5 | #--- Direccion del segundo puerto 6 | .eqv DISP 0xFFFF0010 7 | 8 | 9 | .text 10 | 11 | #-- Usamos el regitro x5 como puntero de acceso al puerto 12 | li x5, LEDS 13 | 14 | #-- Inicializar contador a 0 15 | li a1, 0 16 | 17 | 18 | bucle: 19 | #-- Mostrar valor en los leds 20 | sw a1, 0(x5) 21 | 22 | #-- Pausa 23 | li a2, 0x1000 24 | delay: 25 | addi a2,a2, -1 26 | bgt a2, zero, delay 27 | 28 | #-- Incrementar el contador 29 | addi a1, a1, 1 30 | 31 | #-- Repetir 32 | j bucle 33 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/counter.sh: -------------------------------------------------------------------------------- 1 | java -jar rars1_5.jar a dump .text Binary counter.bin counter.s 2 | apio raw "iceprog -o 1M counter.bin" 3 | 4 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/leds-on.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-rars-MMIO-1-port/rars/leds-on.bin -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/leds-on.s: -------------------------------------------------------------------------------- 1 | #-- Ejemplo de escritura en un puerto de salida 2 | #-- Sacar un valor binario por los LEDs 3 | 4 | #--- Direccion donde está mapeado el Puerto de salida 5 | #--- conectado a los LEDs 6 | .eqv LEDS 0xFFFF0000 7 | 8 | #-- Valor a sacar por el puerto de salida 9 | #-- Se corresponde con el valor binario 10101010 10 | .eqv VALOR 0xAA 11 | 12 | .text 13 | 14 | #-- Usamos el regitro x5 como puntero de acceso al puerto 15 | #-- Cargamos en x5 la direccion de memoria del puerto de salida 16 | li x5, LEDS 17 | 18 | #-- Cargar el valor a sacar por los LEDs en el registro x6 19 | li x6, VALOR 20 | 21 | #-- Sacar el valor por el puerto, para que se iluminen los LEDs 22 | sw x6, 0(x5) 23 | 24 | #-- Ya no hacemos nada mas 25 | #-- Terminamos con un bucle infinito (porque en el RISC-V de la FPGA 26 | #-- no hay un Sistema operativo) 27 | stop: b stop 28 | 29 | 30 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-1-port/rars/leds-on.sh: -------------------------------------------------------------------------------- 1 | java -jar rars1_5.jar a dump .text Binary leds-on.bin leds-on.s 2 | apio raw "iceprog -o 1M leds-on.bin" 3 | 4 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-2-ports/rars/01-leds-on.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-rars-MMIO-2-ports/rars/01-leds-on.bin -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-2-ports/rars/01-leds-on.s: -------------------------------------------------------------------------------- 1 | #-- Ejemplo de escritura en un puerto de salida 2 | #-- Sacar un valor binario por los LEDs 3 | 4 | #--- Direccion donde está mapeado el Puerto de salida 5 | #--- conectado a los LEDs 6 | .eqv LEDS 0xFFFF0000 7 | 8 | #-- Valor a sacar por el puerto de salida 9 | #-- Se corresponde con el valor binario 10101010 10 | .eqv VALOR 0xAA 11 | 12 | .text 13 | 14 | #-- Usamos el regitro x5 como puntero de acceso al puerto 15 | #-- Cargamos en x5 la direccion de memoria del puerto de salida 16 | li x5, LEDS 17 | 18 | #-- Cargar el valor a sacar por los LEDs en el registro x6 19 | li x6, VALOR 20 | 21 | #-- Sacar el valor por el puerto, para que se iluminen los LEDs 22 | sw x6, 0(x5) 23 | 24 | #-- Ya no hacemos nada mas 25 | #-- Terminamos con un bucle infinito (porque en el RISC-V de la FPGA 26 | #-- no hay un Sistema operativo) 27 | stop: b stop 28 | 29 | 30 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-2-ports/rars/02-test-2-ports.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/firmware/soc-rars-MMIO-2-ports/rars/02-test-2-ports.bin -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-2-ports/rars/02-test-2-ports.s: -------------------------------------------------------------------------------- 1 | #-- Ejemplo de escritura los dos puertos 2 | #-- para comprobar que funcionan 3 | 4 | #--- Direccion donde está mapeado el Puerto de salida 5 | #--- conectado a los LEDs 6 | .eqv LEDS 0xFFFF0000 7 | 8 | #--- Direccion del segundo puerto 9 | .eqv DISP 0xFFFF0010 10 | 11 | .text 12 | 13 | #-- Usamos el regitro x5 como puntero de acceso al puerto 14 | li x5, LEDS 15 | 16 | #-- Registro x6 puntero al puerto del display 17 | li x6, DISP 18 | 19 | #-- Valores a sacar por ambos puestos 20 | li x10, 0x55 21 | li x11, 0xFF 22 | 23 | #-- LEDs 24 | sw x10, 0(x5) 25 | 26 | #-- Display 27 | sw x11, 0(x6) 28 | 29 | #-- Ya no hacemos nada mas 30 | #-- Terminamos con un bucle infinito (porque en el RISC-V de la FPGA 31 | #-- no hay un Sistema operativo) 32 | stop: b stop 33 | 34 | 35 | -------------------------------------------------------------------------------- /firmware/soc-rars-MMIO-2-ports/rars/test-2-ports.sh: -------------------------------------------------------------------------------- 1 | java -jar rars1_5.jar a dump .text Binary 02-test-2-ports.bin 02-test-2-ports.s 2 | apio raw "iceprog -o 1M 02-test-2-ports.bin" 3 | 4 | -------------------------------------------------------------------------------- /package.json: -------------------------------------------------------------------------------- 1 | { 2 | "name": "risc-v-fpga", 3 | "version": "0.1.0", 4 | "description": "Working with RV32I RISC-V processor", 5 | "footer": "https://github.com/FPGAwars/icestudio-wiki/raw/main/Logos/fgpawars-banner.svg", 6 | "keywords": ["procesor","softprocesor","RISC-V"], 7 | "license": "LGPL-3.0", 8 | "authors": [{ 9 | "name": "Juan Gonzalez-Gomez (Obijuan)", 10 | "email": "", 11 | "url": "https://github.com/Obijuan" 12 | }], 13 | "repository": { 14 | "type": "git", 15 | "branch": "main", 16 | "url": "https://github.com/Obijuan/RISC-V-FPGA" 17 | } 18 | } 19 | -------------------------------------------------------------------------------- /wiki/github-project-logo.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/wiki/github-project-logo.png -------------------------------------------------------------------------------- /wiki/project-logo.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/wiki/project-logo.png -------------------------------------------------------------------------------- /wiki/v1.2.0/demo-01.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/wiki/v1.2.0/demo-01.gif -------------------------------------------------------------------------------- /wiki/v1.2.0/terminal-01.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Obijuan/RISC-V-FPGA/7c4c654670fdd986438c4ea7f347c294e97d7386/wiki/v1.2.0/terminal-01.png --------------------------------------------------------------------------------