├── .gitignore ├── .project ├── altera ├── components │ ├── convRmiiToMii.qip │ ├── doc │ │ ├── index.docx │ │ └── index.pdf │ ├── hostinterface_hw.tcl │ ├── hostinterface_sw.tcl │ ├── img │ │ └── br.png │ ├── libcommon.qip │ ├── openmac_hw.tcl │ ├── openmac_sw.tcl │ ├── prlMaster_hw.tcl │ ├── prlSlave_hw.tcl │ ├── sdc │ │ ├── hostinterface-async.sdc │ │ ├── openmacTop-mii.sdc │ │ ├── openmacTop-rmii.sdc │ │ ├── prlMaster.sdc │ │ ├── prlSlave.sdc │ │ └── spiBridge-aclk.sdc │ ├── spiBridge_hw.tcl │ ├── tcl │ │ ├── hostinterface.tcl │ │ ├── openmac.tcl │ │ ├── qsysUtil.tcl │ │ ├── spiBridgeGui.tcl │ │ ├── tripleBuffer.tcl │ │ └── tripleBufferGui.tcl │ ├── tripleBuffer_hw.tcl │ └── tripleBuffer_sw.tcl ├── fifo │ └── src │ │ └── asyncFifo-syn-a.vhd ├── hostinterface │ └── src │ │ └── alteraHostInterfaceRtl.vhd ├── latch │ ├── sh │ │ └── tbDataLatch.settings │ └── src │ │ └── dataLatch-syn-a.vhd ├── memory │ ├── sh │ │ ├── tbDpRam.settings │ │ └── tbDpRamSplx.settings │ └── src │ │ ├── dpRam-rtl-a.vhd │ │ └── dpRamSplx-rtl-a.vhd ├── openmac │ └── src │ │ └── alteraOpenmacTop-rtl-ea.vhd ├── spi │ └── src │ │ └── alteraSpiBridgeRtl.vhd └── tripleBuffer │ └── src │ └── alteraTripleBufferRtl.vhd ├── checkTclScripts.sh ├── common ├── axiwrapper │ ├── sh │ │ ├── tbAxiLiteMasterWrapper.settings │ │ └── tbAxiLiteSlaveWrapper.settings │ ├── src │ │ ├── axiLiteMasterWrapper-rtl-ea.vhd │ │ └── axiLiteSlaveWrapper-rtl-ea.vhd │ └── tb │ │ ├── tbAxiLiteMasterWrapper-bhv-ea.vhd │ │ ├── tbAxiLiteSlaveWrapper-bhv-ea.vhd │ │ └── tbMasterBhv_TB_stim.txt ├── fifo │ ├── sh │ │ └── tbAsyncFifo.settings │ ├── src │ │ ├── asyncFifo-e.vhd │ │ ├── asyncFifo-rtl-a.vhd │ │ ├── fifoRead-rtl-ea.vhd │ │ └── fifoWrite-rtl-ea.vhd │ └── tb │ │ ├── tbAsyncFifo-bhv-tb.vhd │ │ ├── tbAsyncFifo-read_stim.txt │ │ └── tbAsyncFifo-write_stim.txt ├── hostinterface │ ├── sh │ │ ├── tbDynamicBridgeBhv.settings │ │ └── tbHostInterfaceBhv.settings │ ├── src │ │ ├── dynamicBridgeRtl.vhd │ │ ├── hostInterfacePkg.vhd │ │ ├── hostInterfaceRtl.vhd │ │ ├── irqGenRtl.vhd │ │ └── statusControlRegRtl.vhd │ └── tb │ │ ├── tbDynamicBridgeBhv-stim.txt │ │ ├── tbDynamicBridgeBhv.vhd │ │ ├── tbHostInterfaceBhv.vhd │ │ ├── tbHostInterface_ap_stim.txt │ │ ├── tbHostInterface_pcp_stim.txt │ │ └── tbIrqGenBhv.vhd ├── latch │ ├── src │ │ └── dataLatch-e.vhd │ └── tb │ │ └── tbDataLatch-bhv-tb.vhd ├── lib │ ├── sh │ │ ├── libcommon.settings │ │ ├── tbAddrDecodeBhv.settings │ │ ├── tbBcd2ledBhv.settings │ │ ├── tbBinaryEncoderBhv.settings │ │ ├── tbClkXing.settings │ │ ├── tbCntBhv.settings │ │ ├── tbEdgedetectorBhv.settings │ │ ├── tbNshiftRegBhv.settings │ │ ├── tbRegisterFileBhv.settings │ │ └── tbSynchronizerBhv.settings │ ├── src │ │ ├── addrDecodeRtl.vhd │ │ ├── bcd2ledRtl.vhd │ │ ├── binaryEncoderRtl.vhd │ │ ├── clkXingRtl.vhd │ │ ├── cntRtl.vhd │ │ ├── edgedetectorRtl.vhd │ │ ├── global.vhd │ │ ├── lutFileRtl.vhd │ │ ├── nShiftRegRtl.vhd │ │ ├── registerFileRtl.vhd │ │ ├── syncTog-rtl-ea.vhd │ │ └── synchronizerRtl.vhd │ └── tb │ │ ├── tbAddrDecodeBhv.vhd │ │ ├── tbBcd2ledBhv.vhd │ │ ├── tbBinaryEncoderBhv.vhd │ │ ├── tbClkXing-bhv-tb.txt │ │ ├── tbClkXing-bhv-tb.vhd │ │ ├── tbCntBhv.vhd │ │ ├── tbEdgedetectorBhv.vhd │ │ ├── tbLutFileBhv.vhd │ │ ├── tbNshiftRegBhv.vhd │ │ ├── tbRegisterFileBhv.vhd │ │ ├── tbRegisterFile_stim.txt │ │ └── tbSynchronizerBhv.vhd ├── memory │ ├── src │ │ ├── dpRam-bhv-a.vhd │ │ ├── dpRam-e.vhd │ │ ├── dpRamSplx-e.vhd │ │ └── dpRamSplxNbe-e.vhd │ └── tb │ │ ├── tbDpRam-bhv-tb.vhd │ │ ├── tbDpRamSplx-bhv-tb.vhd │ │ ├── tbDpRamSplx_stim.txt │ │ └── tbDpRam_stim.txt ├── openmac │ ├── sh │ │ ├── tbMmSlaveConv.settings │ │ └── tbOpenmacTop.settings │ ├── src │ │ ├── convRmiiToMii-rtl-ea.vhd │ │ ├── dma_handler.vhd │ │ ├── master_handler.vhd │ │ ├── mmSlaveConv-rtl-ea.vhd │ │ ├── openMAC_DMAmaster.vhd │ │ ├── openfilter-rtl-ea.vhd │ │ ├── openhub-rtl-ea.vhd │ │ ├── openmac-rtl-ea.vhd │ │ ├── openmacPkg-p.vhd │ │ ├── openmacTimer-rtl-ea.vhd │ │ ├── openmacTop-rtl-ea.vhd │ │ ├── phyActGen-rtl-ea.vhd │ │ └── phyMgmt-rtl-ea.vhd │ ├── tb │ │ ├── tbMmSlaveConv-bhv-tb.vhd │ │ ├── tbMmSlaveConv_stim.txt │ │ ├── tbOpenmacTop-bhv-tb.vhd │ │ ├── tbOpenmacTop-macReg_stim.txt │ │ ├── tbOpenmacTop-macTimer_stim.txt │ │ └── tbOpenmacTop-pktBuf_stim.txt │ └── tcl │ │ └── openmac.tcl ├── parallelinterface │ ├── sh │ │ └── tbPrlMaster.settings │ ├── src │ │ ├── prlMaster-rtl-ea.vhd │ │ └── prlSlave-rtl-ea.vhd │ └── tb │ │ ├── tbPrlMaster-bhv-tb.vhd │ │ └── tbPrlMaster_stim.txt ├── spi │ ├── sh │ │ ├── tbProtStreamBhv.settings │ │ └── tbSpiSlaveBhv.settings │ ├── src │ │ ├── protStreamRtl.vhd │ │ ├── spiBridgeRtl.vhd │ │ ├── spiSlave-e.vhd │ │ ├── spiSlave-rtl_aclk-a.vhd │ │ └── spiSlave-rtl_sclk-a.vhd │ └── tb │ │ ├── tbProtStreamBhv.vhd │ │ └── tbSpiSlaveBhv.vhd ├── tripleBuffer │ ├── sh │ │ ├── tbTripleBridgeBhv.settings │ │ ├── tbTripleBufferBhv.settings │ │ └── tbTripleLogicBhv.settings │ ├── src │ │ ├── tripleBridgeRtl.vhd │ │ ├── tripleBufferPkg.vhd │ │ ├── tripleBufferRtl.vhd │ │ └── tripleLogicRtl.vhd │ ├── tb │ │ ├── tbTripleBridgeBhv.vhd │ │ ├── tbTripleBufferBhv.vhd │ │ └── tbTripleLogicBhv.vhd │ └── tcl │ │ ├── calcTriBuf.tcl │ │ └── test-calcTriBuf.tcl └── util │ ├── sh │ ├── libutil.settings │ └── tbBusMasterBhv.settings │ ├── src │ ├── busMasterBhv.vhd │ ├── busMasterPkg.vhd │ ├── clkGenBhv.vhd │ ├── enableGenBhv.vhd │ ├── ethPktGenBhv.vhd │ ├── resetGenBhv.vhd │ └── spRamBhv.vhd │ ├── tb │ ├── tbBusMasterBhv.vhd │ └── tbBusMasterBhv_TB_stim.txt │ └── tcl │ ├── .gitignore │ ├── golden-writeFile.h │ ├── ipcoreUtil.tcl │ ├── test-writeFile.tcl │ └── writeFile.tcl ├── doc ├── axiwrapper │ ├── .gitignore │ ├── create-this-doc │ └── wavedrom │ │ ├── master-read.json │ │ ├── master-write.json │ │ ├── slave-read.json │ │ └── slave-write.json ├── hostinterface │ ├── .gitignore │ ├── create-this-doc │ ├── doxyfile │ ├── images │ │ ├── hostif-common_vs_dynamic_bridge.png │ │ ├── hostif-dyn_bridge.png │ │ ├── hostif-example_sys_int.png │ │ └── hostif-memmap.png │ ├── mainpage.txt │ └── md │ │ ├── hostif.md │ │ └── hostif_sc.md ├── openmac │ ├── .gitignore │ ├── create-this-doc │ ├── doxyfile │ ├── images │ │ └── openmac-overview.png │ ├── mainpage.txt │ ├── md │ │ └── openmac.md │ └── wavedrom │ │ ├── master-read.json │ │ ├── master-write.json │ │ ├── slave-read.json │ │ └── slave-write.json └── parallelinterface │ └── wavedrom │ ├── hostif_mplx_rd-wr.json │ ├── hostif_mplx_rd.json │ ├── hostif_mplx_wr.json │ ├── hostif_rd-wr.json │ ├── hostif_rd.json │ └── hostif_wr.json ├── load-all-libs.sh ├── release_hostinterface.sh ├── release_libcommon.sh ├── release_openmac.sh ├── release_prlMaster.sh ├── release_prlSlave.sh ├── release_spiBridge.sh ├── release_tripleBuffer_ipcore.sh ├── simulate.sh ├── tools ├── msim-sim.sh ├── msim-vcomLib.sh ├── sim.do └── wavedrom.sh └── xilinx ├── components └── pcores │ ├── axi_hostinterface_vX_YY_Z │ └── data │ │ ├── axi_hostinterface_v2_1_0.mdd │ │ ├── axi_hostinterface_v2_1_0.mpd │ │ ├── axi_hostinterface_v2_1_0.mui │ │ ├── axi_hostinterface_v2_1_0.pao │ │ └── axi_hostinterface_v2_1_0.tcl │ ├── axi_openmac_vX_YY_Z │ └── data │ │ ├── axi_openmac_v2_1_0.mdd │ │ ├── axi_openmac_v2_1_0.mpd │ │ ├── axi_openmac_v2_1_0.mui │ │ ├── axi_openmac_v2_1_0.pao │ │ └── axi_openmac_v2_1_0.tcl │ └── libcommon │ └── data │ └── libcommon_v2_1_0.pao ├── hostinterface ├── sh │ └── tbAxiHostInterface.settings ├── src │ └── axi_hostinterface-rtl-ea.vhd └── tb │ ├── tbAxiHostinterface-bhv-ea.vhd │ ├── tbHostMasterBhv_TB_stim.txt │ └── tbPCPMasterBhv_TB_stim.txt ├── latch └── src │ └── dataLatch-syn-a.vhd ├── memory ├── sh │ ├── tbDpRam.settings │ └── tbDpRamSplx.settings └── src │ ├── dpRam-rtl-a.vhd │ ├── dpRamSplx-rtl-a.vhd │ └── dpRamSplxNbe-rtl-a.vhd ├── openmac └── src │ ├── axi_openmac-rtl-ea.vhd │ └── ipifMasterHandler-rtl-ea.vhd └── parallelinterface └── src └── parallelInterface-rtl-ea.vhd /.gitignore: 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