├── LICENSE ├── README.md ├── afu └── thymesisflow │ ├── aurora_global_poweron.v │ ├── hls_modules │ ├── memory_egress │ │ ├── build_hls_module.tcl │ │ ├── globals.hpp │ │ ├── ocx_flit.cpp │ │ ├── ocx_flit.hpp │ │ ├── ocx_memory_egress_top.cpp │ │ ├── ocx_resp_eng.cpp │ │ ├── ocx_resp_eng.hpp │ │ ├── ocx_rty_eng.cpp │ │ ├── ocx_rty_eng.hpp │ │ └── types.hpp │ └── memory_egress_lookup │ │ ├── build_hls_module.tcl │ │ ├── globals.hpp │ │ ├── ocx_cmd_fifo_load.cpp │ │ ├── ocx_cmd_fifo_load.hpp │ │ ├── ocx_flit.cpp │ │ ├── ocx_flit.hpp │ │ ├── ocx_memory_egress_lookup_top.cpp │ │ └── types.hpp │ ├── ip │ ├── aurora_qsfp0.tcl │ ├── aurora_qsfp1.tcl │ ├── capptag_fifo.tcl │ ├── clock_domain_cross_fifo.tcl │ ├── cmd_lookup_bram.tcl │ ├── data_lookup_bram.tcl │ ├── dataflit_fifo.tcl │ ├── llc_framer_bram_32B.tcl │ ├── memory_egress.tcl │ ├── memory_egress_lookup.tcl │ ├── rty_data_fifo.tcl │ └── tl_resp_fifo.tcl │ ├── lpc_cmdfifo.v │ ├── lpc_errary.v │ ├── lpc_tlx_afu_credit_mgr.v │ ├── mem_cmd_fifo.v │ ├── mem_data_fifo.v │ ├── mem_respfifo.v │ ├── net_cmdfifo.v │ ├── oc_function.v │ ├── rmem_afu.v │ ├── rmem_mmio_regs.v │ ├── rmem_respfifo.v │ ├── thymesisflow_32B_64B_routing_compute_ingress.v │ ├── thymesisflow_32B_64B_routing_memory_ingress.v │ ├── thymesisflow_32B_bckpressure_egress.v │ ├── thymesisflow_32B_bckpressure_ingress.v │ ├── thymesisflow_64B_32B_routing_egress.v │ ├── thymesisflow_64B_compute_egress_adapter.v │ ├── thymesisflow_credit_mgr.v │ ├── thymesisflow_llc │ ├── thymesisflow_32B_llc_top.v │ ├── thymesisflow_llc_egress_driver.v │ ├── thymesisflow_llc_framer_crc_replay.v │ ├── thymesisflow_llc_ingress_driver.v │ └── thymesisflow_llc_parser_crc_replay.v │ ├── thymesisflow_memory_ingress.v │ ├── thymesisflow_rr_arbiter.v │ └── thymesisflow_top.v ├── board_support_packages └── ad9v3 │ ├── ip │ ├── axi_hwicap.tcl │ ├── axi_quad_spi.tcl │ ├── create_DLx_PHY_bypass_20.0g.tcl │ ├── create_DLx_PHY_bypass_25.78125g.tcl │ ├── create_DLx_PHY_elastic_20.0g.tcl │ ├── create_vio_DLx_phy_vio_0.tcl │ └── create_vio_reset_n.tcl │ ├── verilog │ ├── cfg_reg_to_axi4lite.v │ ├── cfg_tieoffs.v │ ├── flash_sub_system.v │ ├── oc_bsp.v │ ├── oc_fpga_top.v │ ├── vpd_stub.v │ └── xilinx │ │ ├── encrypted_buffer_bypass │ │ ├── DLx_phy_example_bit_sync.v │ │ ├── DLx_phy_example_gtwiz_buffbypass_rx.v │ │ ├── DLx_phy_example_gtwiz_buffbypass_tx.v │ │ ├── DLx_phy_example_gtwiz_buffbypass_tx_mstrln3.v │ │ ├── DLx_phy_example_gtwiz_reset.v │ │ ├── DLx_phy_example_gtwiz_userclk_rx.v │ │ ├── DLx_phy_example_gtwiz_userclk_tx.v │ │ ├── DLx_phy_example_gtwiz_userclk_tx_mstrln3.v │ │ ├── DLx_phy_example_init.v │ │ ├── DLx_phy_example_reset_inv_sync.v │ │ ├── DLx_phy_example_reset_sync.v │ │ ├── DLx_phy_example_wrapper.v │ │ ├── DLx_phy_example_wrapper_functions.v │ │ ├── DLx_phy_example_wrapper_functions_mstrln3.v │ │ ├── DLx_phy_example_wrapper_mstrln3.v │ │ ├── dlx_phy_wrap.v │ │ ├── drp_read_modify_write.v │ │ ├── elastic_buffer_dlx_phy_wrap.v │ │ ├── tx_mod_da_fsm.v │ │ └── tx_mod_da_fsm_mstrln3.v │ │ └── encrypted_elastic_buffer │ │ ├── DLx_phy_example_bit_sync.v │ │ ├── DLx_phy_example_gtwiz_buffbypass_rx.v │ │ ├── DLx_phy_example_gtwiz_buffbypass_tx.v │ │ ├── DLx_phy_example_gtwiz_userclk_tx.v │ │ ├── DLx_phy_example_init.v │ │ ├── DLx_phy_example_reset_inv_sync.v │ │ ├── DLx_phy_example_reset_sync.v │ │ ├── DLx_phy_example_wrapper.v │ │ ├── DLx_phy_example_wrapper_functions.v │ │ └── dlx_phy_wrap.v │ └── xdc │ ├── extra.xdc │ ├── gty_properties.xdc │ ├── main_pinout.xdc │ ├── main_placement_bypass.xdc │ ├── main_placement_bypass_thymesisflow_cpu.xdc │ ├── main_placement_bypass_thymesisflow_mem.xdc │ ├── main_placement_elastic.xdc │ ├── main_timing.xdc │ ├── main_timing_thymesisflow_cpu.xdc │ ├── main_timing_thymesisflow_mem.xdc │ ├── qsfp_pinout.xdc │ ├── qspi_pinout.xdc │ └── qspi_timing.xdc ├── config_subsystem ├── cfg_cmdfifo.v ├── cfg_descriptor.v ├── cfg_fence.v ├── cfg_func0.v ├── cfg_func0_init.v ├── cfg_func1.v ├── cfg_func1_init.v ├── cfg_reg_to_axi4lite.v ├── cfg_respfifo.v ├── cfg_seq.v └── oc_cfg.v ├── create_project.tcl ├── dlx ├── ocx_bram_infer.v ├── ocx_dlx_crc.v ├── ocx_dlx_rx_lane.v ├── ocx_dlx_rx_lane_66.v ├── ocx_dlx_rx_main.v ├── ocx_dlx_rxdf.v ├── ocx_dlx_top.v ├── ocx_dlx_tx_ctl.v ├── ocx_dlx_tx_flt.v ├── ocx_dlx_tx_gbx.v ├── ocx_dlx_tx_que.v ├── ocx_dlx_txdf.v └── ocx_dlx_xlx_if.v ├── libtfshmem ├── Makefile ├── README.md ├── include │ ├── custom_mm.h │ ├── tf_shmem.h │ ├── tf_shmem_api.h │ └── utils.h ├── kernel_module │ ├── Kbuild │ ├── Makefile │ ├── tfshmem.conf │ ├── tfshmem.h │ ├── tfshmem_mod.c │ └── tfshmem_ops.c ├── src │ ├── custom_mm.c │ └── tf_shmem.c └── test │ ├── test_compute.c │ └── test_memory.c ├── libthymesisflow ├── Dockerfile ├── Doxyfile ├── Makefile ├── README.md ├── cmd │ ├── thymesisf-agent.c │ └── thymesisf-cli.c ├── include │ ├── agent.h │ ├── client.h │ ├── connection.h │ ├── errcode.h │ ├── iport.h │ ├── logger.h │ ├── proto.h │ ├── protoconst.h │ ├── stats.h │ └── thymesisflow.h ├── scripts │ └── read_counters.py ├── src │ ├── agent.c │ ├── client.c │ ├── connection.c │ ├── iport.c │ ├── proto.c │ ├── stats.c │ └── thymesisflow.c └── unittest │ └── unittest.c ├── reference_design_doc ├── TLX_3.0_Reference_Design.pdf ├── ThymesisFlow Design and Deployment v1.1.pdf └── thymesis_arch.jpg ├── scripts ├── setup_environment.csh └── setup_environment.ksh ├── tcl ├── write_bitstream.tcl ├── write_mcs.tcl └── write_proj_config.tcl └── tlx ├── bram_syn_test.v ├── dram_syn_test.v ├── ocx_leaf_inferd_regfile.v ├── ocx_tlx_513x32_fifo.v ├── ocx_tlx_514x16_fifo.v ├── ocx_tlx_bdi_mac.v ├── ocx_tlx_cfg_mac.v ├── ocx_tlx_cmd_fifo_mac.v ├── ocx_tlx_ctl_fsm.v ├── ocx_tlx_data_arb.v ├── ocx_tlx_data_fifo_mac.v ├── ocx_tlx_dcp_fifo_ctl.v ├── ocx_tlx_fifo_cntlr.v ├── ocx_tlx_flit_parser.v ├── ocx_tlx_framer.v ├── ocx_tlx_framer_cmd_fifo.v ├── ocx_tlx_framer_rsp_fifo.v ├── ocx_tlx_parse_mac.v ├── ocx_tlx_parser_err_mac.v ├── ocx_tlx_rcv_mac.v ├── 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