├── README.md ├── ip ├── 100t │ ├── bram_bar_zero4k.xci │ ├── bram_pcie_cfgspace.xci │ ├── clk_wiz_0.xci │ ├── drom_pcie_cfgspace_writemask.xci │ ├── fifo_129_129_clk1.xci │ ├── fifo_134_134_clk1_bar_rdrsp.xci │ ├── fifo_134_134_clk2.xci │ ├── fifo_134_134_clk2_rxfifo.xci │ ├── fifo_141_141_clk1_bar_wr.xci │ ├── fifo_1_1_clk2.xci │ ├── fifo_256_32_clk2_comtx.xci │ ├── fifo_32_32_clk1_comtx.xci │ ├── fifo_32_32_clk2.xci │ ├── fifo_34_34.xci │ ├── fifo_43_43_clk2.xci │ ├── fifo_49_49_clk2.xci │ ├── fifo_64_64.xci │ ├── fifo_64_64_clk1_fifocmd.xci │ ├── fifo_64_64_clk2_comrx.xci │ ├── fifo_74_74_clk1_bar_rd1.xci │ ├── pcie_7x_0.xci │ ├── pcileech_bar_zero4k.coe │ ├── pcileech_cfgspace.coe │ └── pcileech_cfgspace_writemask.coe ├── bram_bar_zero4k.xci ├── bram_pcie_cfgspace.xci ├── drom_pcie_cfgspace_writemask.xci ├── fifo_129_129_clk1.xci ├── fifo_134_134_clk1_bar_rdrsp.xci ├── fifo_134_134_clk2.xci ├── fifo_134_134_clk2_rxfifo.xci ├── fifo_141_141_clk1_bar_wr.xci ├── fifo_1_1_clk2.xci ├── fifo_256_32_clk2_comtx.xci ├── fifo_32_32_clk1_comtx.xci ├── fifo_32_32_clk2.xci ├── fifo_34_34.xci ├── fifo_43_43_clk2.xci ├── fifo_49_49_clk2.xci ├── fifo_4_4_clk1_bar_rd1.xci ├── fifo_64_64.xci ├── fifo_64_64_clk1_fifocmd.xci ├── fifo_64_64_clk2_comrx.xci ├── fifo_74_74_clk1_bar_rd1.xci ├── pcie_7x_0.xci ├── pcileech_bar_zero4k.coe ├── pcileech_cfgspace.coe └── pcileech_cfgspace_writemask.coe ├── vivado_build.tcl ├── vivado_build_100t.tcl ├── vivado_generate_project_100t.tcl ├── vivado_generate_project_captain_75T.tcl ├── vivado_generate_project_enigma_x1.tcl ├── vivado_generate_project_immortal_35T.tcl ├── vivado_generate_project_immortal_75T.tcl ├── vivado_generate_project_immortal_75Ts.tcl ├── vivado_generate_project_m2.tcl └── vivado_generate_project_squirrel.tcl /README.md: -------------------------------------------------------------------------------- 1 | # intel ax nic Emulated Firmware 2 | 3 | ## Legal Devices Emulated 4 | - 1:1 configuration space with IP core 5 | - Driver support 6 | - Full BAR support 7 | - Response in TLP regarding non-uniform memory alignment 8 | - TLPs error checking 9 | ## Caution Against Scammers 10 | Currently, there are many fake users cloning this open-source library and using our information to deceive others. 11 | 12 | 13 | 14 | ## ⚠️ About TLP Interrupts 15 | 16 | The TLP interrupt mechanism requires proper echoing with the computer motherboard. This project was developed specifically for **ASUS motherboards**, ensuring compatibility. However, many individuals who have **stolen this project** fail to adapt the kernel interrupts for other systems. As a result, users might experience issues such as **blue screens** or other errors due to these unaddressed compatibility problems. These individuals often mislead users into switching to specific motherboards instead of resolving the underlying issues, highlighting their lack of technical expertise. 17 | 18 | While **network card firmware technology is outdated**, some developers continue to sell it at **high prices**, exploiting users who may not know better. Our decision to open-source this technology has disrupted many fraudulent developers, leading to retaliation instead of constructive improvements on their part. We believe that true developers should focus on **learning, innovating**, and solving compatibility challenges rather than deceiving customers or charging unreasonable fees. 19 | 20 | ## ⚠️ Important Update on Network Card Firmware 21 | 22 | ACE has now marked all **Intel** and **Realtek** series network cards. In the future, **network card firmware** will be fully detected. Scammers who are exploiting our open-source technology will soon be exposed. 23 | 24 | ### Why We Open-Sourced This Project 25 | The primary purpose of open-sourcing this project was to **counter the exploitation of our work**. By making the technology publicly available, we ensure that **malicious users** cannot hide behind our creations and resell them unlawfully. 26 | 27 | We will continue to monitor and update the firmware to stay ahead of these attempts. 28 | 29 | Thank you for your continued support. 30 | > ⚠️ **Note to Malicious Attackers and Troublemakers** 31 | > Please refrain from joining our group. We do not welcome individuals who intend to misuse our free resources for resale purposes. Such members will be removed from the community 32 | 33 | ### Open Access to Network Card DMA Firmware 34 | ACE has recently restricted many RTL-type devices, including network card DMA firmware. Importantly, this technology has become **publicly accessible**, allowing anyone with basic technical knowledge to quickly learn and create it. As a result, prices for these firmware solutions remain relatively affordable, generally within the **100-180 USD** range. This applies to both Killer cards and other models, so prices should not vary significantly. 35 | 36 | 37 | ### Recognizing False Claims and High-Price Tactics 38 | Some individuals may attempt to mislead new players by claiming that open-source network card devices, often with additional modifications, are exclusive "internal" products. They may also assert that their versions are unique or private. 39 | 40 | There are a lot of malicious attackers we have made IP restriction 41 | Please keep your IP safe and enter our group. 42 | https://discord.gg/PLTJOHN 43 | 44 | However: 45 | - **Unique Firmware:** ACE is likely to soon gather data on all such devices. Each firmware version requires unique encoding, ensuring distinct versions for each user. 46 | - **Open and Accessible Technology:** With the right emulation skills, anyone can achieve stability and reliability in these devices. There is no "private" firmware—only **thousands of lines of code** accessible to those who seek it. 47 | 48 | ### Scam Alert 49 | If you’ve paid **300 USD** for network card emulation firmware, there’s a strong chance you’ve been overcharged, as this technology is now widely accessible. 50 | 51 | -------------------------------------------------------------------------------- /ip/100t/bram_bar_zero4k.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "bram_bar_zero4k", 5 | "component_reference": "xilinx.com:ip:blk_mem_gen:8.4", 6 | "ip_revision": "7", 7 | "gen_directory": "../../../../pcileech_tbx4.gen/sources_1/ip/bram_bar_zero4k", 8 | "parameters": { 9 | "component_parameters": { 10 | "Component_Name": [ { "value": "bram_bar_zero4k", "resolve_type": "user", "usage": "all" } ], 11 | "Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ], 12 | "AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ], 13 | "AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ], 14 | "Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 15 | "AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 16 | "Memory_Type": [ { "value": "Simple_Dual_Port_RAM", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 17 | "PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "usage": "all" } ], 18 | "Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 19 | "ecctype": [ { "value": "No_ECC", "resolve_type": "user", "usage": "all" } ], 20 | "ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 21 | "softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 24 | "EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 25 | "EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 26 | "RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 27 | "RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 28 | "Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 29 | "Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ], 30 | "Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 32 | "Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ], 33 | "Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ], 34 | "Assume_Synchronous_Clk": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 36 | "Write_Depth_A": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 37 | "Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 38 | "Operating_Mode_A": [ { "value": "NO_CHANGE", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 39 | "Enable_A": [ { "value": "Use_ENA_Pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 40 | "Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 41 | "Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 42 | "Operating_Mode_B": [ { "value": "READ_FIRST", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 43 | "Enable_B": [ { "value": "Use_ENB_Pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 44 | "Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 45 | "Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 46 | "Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 47 | "Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 48 | "Register_PortB_Output_of_Memory_Core": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 49 | "Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 50 | "register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 51 | "register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 52 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 53 | "Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 54 | "Coe_File": [ { "value": "pcileech_bar_zero4k.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 55 | "Fill_Remaining_Memory_Locations": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 56 | "Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 57 | "Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 58 | "Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 59 | "Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 60 | "Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 61 | "Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 62 | "Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 63 | "Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 64 | "Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 65 | "Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ], 66 | "Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 67 | "Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 68 | "Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ], 69 | "Port_B_Clock": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 70 | "Port_B_Write_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 71 | "Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 72 | "Port_B_Enable_Rate": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 73 | "Collision_Warnings": [ { "value": "ALL", "resolve_type": "user", "usage": "all" } ], 74 | "Disable_Collision_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 75 | "Disable_Out_of_Range_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 76 | "use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ], 77 | "MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ], 78 | "CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ], 79 | "EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 80 | "READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 81 | "READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ] 82 | }, 83 | "model_parameters": { 84 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 85 | "C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 86 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 87 | "C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 88 | "C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 89 | "C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 90 | "C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 91 | "C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 92 | "C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ], 93 | "C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 94 | "C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 95 | "C_MEM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 96 | "C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 97 | "C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 98 | "C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 99 | "C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 100 | "C_INIT_FILE_NAME": [ { "value": "bram_bar_zero4k.mif", "resolve_type": "generated", "usage": "all" } ], 101 | "C_INIT_FILE": [ { "value": "bram_bar_zero4k.mem", "resolve_type": "generated", "usage": "all" } ], 102 | "C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 103 | "C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 104 | "C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 105 | "C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 106 | "C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 107 | "C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 108 | "C_HAS_ENA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 109 | "C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 110 | "C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 111 | "C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 112 | "C_WRITE_MODE_A": [ { "value": "NO_CHANGE", "resolve_type": "generated", "usage": "all" } ], 113 | "C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 114 | "C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 115 | "C_WRITE_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 116 | "C_READ_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 117 | "C_ADDRA_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 118 | "C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 119 | "C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 120 | "C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 121 | "C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 122 | "C_HAS_ENB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 123 | "C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 124 | "C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 125 | "C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 126 | "C_WRITE_MODE_B": [ { "value": "READ_FIRST", "resolve_type": "generated", "usage": "all" } ], 127 | "C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 128 | "C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 129 | "C_WRITE_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 130 | "C_READ_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 131 | "C_ADDRB_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 132 | "C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 133 | "C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 134 | "C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 135 | "C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 136 | "C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 137 | "C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 138 | "C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 139 | "C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 140 | "C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 141 | "C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 142 | "C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 143 | "C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 144 | "C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 145 | "C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ], 146 | "C_COMMON_CLK": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 147 | "C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 148 | "C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 149 | "C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 150 | "C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 151 | "C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 152 | "C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 153 | "C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 154 | "C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 155 | "C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 156 | "C_COUNT_36K_BRAM": [ { "value": "1", "resolve_type": "generated", "usage": "all" } ], 157 | "C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 158 | "C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 5.466975 mW", "resolve_type": "generated", "usage": "all" } ] 159 | }, 160 | "project_parameters": { 161 | "ARCHITECTURE": [ { "value": "artix7" } ], 162 | "BASE_BOARD_PART": [ { "value": "" } ], 163 | "BOARD_CONNECTIONS": [ { "value": "" } ], 164 | "DEVICE": [ { "value": "xc7a100t" } ], 165 | "PACKAGE": [ { "value": "fgg484" } ], 166 | "PREFHDL": [ { "value": "VERILOG" } ], 167 | "SILICON_REVISION": [ { "value": "" } ], 168 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 169 | "SPEEDGRADE": [ { "value": "-2" } ], 170 | "STATIC_POWER": [ { "value": "" } ], 171 | "TEMPERATURE_GRADE": [ { "value": "" } ] 172 | }, 173 | "runtime_parameters": { 174 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 175 | "IPREVISION": [ { "value": "7" } ], 176 | "MANAGED": [ { "value": "TRUE" } ], 177 | "OUTPUTDIR": [ { "value": "../../../../pcileech_tbx4.gen/sources_1/ip/bram_bar_zero4k" } ], 178 | "SELECTEDSIMMODEL": [ { "value": "" } ], 179 | "SHAREDDIR": [ { "value": "." } ], 180 | "SWVERSION": [ { "value": "2023.2" } ], 181 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 182 | } 183 | }, 184 | "boundary": { 185 | "ports": { 186 | "clka": [ { "direction": "in", "driver_value": "0" } ], 187 | "ena": [ { "direction": "in", "driver_value": "0" } ], 188 | "wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 189 | "addra": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 190 | "dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ], 191 | "clkb": [ { "direction": "in", "driver_value": "0" } ], 192 | "enb": [ { "direction": "in", "driver_value": "0" } ], 193 | "addrb": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 194 | "doutb": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 195 | }, 196 | "interfaces": { 197 | "CLK.ACLK": { 198 | "vlnv": "xilinx.com:signal:clock:1.0", 199 | "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", 200 | "mode": "slave", 201 | "parameters": { 202 | "ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ], 203 | "ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ], 204 | "FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 205 | "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 206 | "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], 207 | "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 208 | "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 209 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 210 | } 211 | }, 212 | "RST.ARESETN": { 213 | "vlnv": "xilinx.com:signal:reset:1.0", 214 | "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", 215 | "mode": "slave", 216 | "parameters": { 217 | "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ], 218 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 219 | } 220 | }, 221 | "BRAM_PORTA": { 222 | "vlnv": "xilinx.com:interface:bram:1.0", 223 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 224 | "mode": "slave", 225 | "parameters": { 226 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 227 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 228 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 229 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 230 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 231 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 232 | }, 233 | "port_maps": { 234 | "ADDR": [ { "physical_name": "addra" } ], 235 | "CLK": [ { "physical_name": "clka" } ], 236 | "DIN": [ { "physical_name": "dina" } ], 237 | "EN": [ { "physical_name": "ena" } ], 238 | "WE": [ { "physical_name": "wea" } ] 239 | } 240 | }, 241 | "BRAM_PORTB": { 242 | "vlnv": "xilinx.com:interface:bram:1.0", 243 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 244 | "mode": "slave", 245 | "parameters": { 246 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 247 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 248 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 249 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 250 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 251 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 252 | }, 253 | "port_maps": { 254 | "ADDR": [ { "physical_name": "addrb" } ], 255 | "CLK": [ { "physical_name": "clkb" } ], 256 | "DOUT": [ { "physical_name": "doutb" } ], 257 | "EN": [ { "physical_name": "enb" } ] 258 | } 259 | } 260 | }, 261 | "memory_maps": { 262 | "S_1": { 263 | "address_blocks": { 264 | "Mem0": { 265 | "base_address": "0", 266 | "range": "4096", 267 | "usage": "memory", 268 | "access": "read-write", 269 | "parameters": { 270 | "OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ], 271 | "OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ] 272 | } 273 | } 274 | } 275 | } 276 | } 277 | } 278 | } 279 | } -------------------------------------------------------------------------------- /ip/100t/bram_pcie_cfgspace.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "bram_pcie_cfgspace", 5 | "component_reference": "xilinx.com:ip:blk_mem_gen:8.4", 6 | "ip_revision": "7", 7 | "gen_directory": "../../../../pcileech_tbx4.gen/sources_1/ip/bram_pcie_cfgspace", 8 | "parameters": { 9 | "component_parameters": { 10 | "Component_Name": [ { "value": "bram_pcie_cfgspace", "resolve_type": "user", "usage": "all" } ], 11 | "Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ], 12 | "AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ], 13 | "AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ], 14 | "Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 15 | "AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 16 | "Memory_Type": [ { "value": "Simple_Dual_Port_RAM", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 17 | "PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "usage": "all" } ], 18 | "Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 19 | "ecctype": [ { "value": "No_ECC", "resolve_type": "user", "usage": "all" } ], 20 | "ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 21 | "softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 24 | "EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 25 | "EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 26 | "RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 27 | "RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 28 | "Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 29 | "Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ], 30 | "Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 32 | "Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ], 33 | "Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ], 34 | "Assume_Synchronous_Clk": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 36 | "Write_Depth_A": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 37 | "Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 38 | "Operating_Mode_A": [ { "value": "WRITE_FIRST", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 39 | "Enable_A": [ { "value": "Always_Enabled", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 40 | "Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 41 | "Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 42 | "Operating_Mode_B": [ { "value": "READ_FIRST", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 43 | "Enable_B": [ { "value": "Always_Enabled", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 44 | "Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 45 | "Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 46 | "Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 47 | "Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 48 | "Register_PortB_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 49 | "Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 50 | "register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 51 | "register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 52 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 53 | "Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 54 | "Coe_File": [ { "value": "pcileech_cfgspace.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 55 | "Fill_Remaining_Memory_Locations": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 56 | "Remaining_Memory_Locations": [ { "value": "0", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 57 | "Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 58 | "Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 59 | "Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 60 | "Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 61 | "Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 62 | "Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 63 | "Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 64 | "Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 65 | "Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ], 66 | "Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 67 | "Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 68 | "Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ], 69 | "Port_B_Clock": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 70 | "Port_B_Write_Rate": [ { "value": "0", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 71 | "Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 72 | "Port_B_Enable_Rate": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 73 | "Collision_Warnings": [ { "value": "ALL", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 74 | "Disable_Collision_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 75 | "Disable_Out_of_Range_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 76 | "use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ], 77 | "MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ], 78 | "CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ], 79 | "EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 80 | "READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 81 | "READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ] 82 | }, 83 | "model_parameters": { 84 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 85 | "C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 86 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 87 | "C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 88 | "C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 89 | "C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 90 | "C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 91 | "C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 92 | "C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ], 93 | "C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 94 | "C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 95 | "C_MEM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 96 | "C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 97 | "C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 98 | "C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 99 | "C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 100 | "C_INIT_FILE_NAME": [ { "value": "bram_pcie_cfgspace.mif", "resolve_type": "generated", "usage": "all" } ], 101 | "C_INIT_FILE": [ { "value": "bram_pcie_cfgspace.mem", "resolve_type": "generated", "usage": "all" } ], 102 | "C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 103 | "C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 104 | "C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 105 | "C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 106 | "C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 107 | "C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 108 | "C_HAS_ENA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 109 | "C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 110 | "C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 111 | "C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 112 | "C_WRITE_MODE_A": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ], 113 | "C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 114 | "C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 115 | "C_WRITE_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 116 | "C_READ_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 117 | "C_ADDRA_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 118 | "C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 119 | "C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 120 | "C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 121 | "C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 122 | "C_HAS_ENB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 123 | "C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 124 | "C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 125 | "C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 126 | "C_WRITE_MODE_B": [ { "value": "READ_FIRST", "resolve_type": "generated", "usage": "all" } ], 127 | "C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 128 | "C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 129 | "C_WRITE_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 130 | "C_READ_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 131 | "C_ADDRB_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 132 | "C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 133 | "C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 134 | "C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 135 | "C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 136 | "C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 137 | "C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 138 | "C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 139 | "C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 140 | "C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 141 | "C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 142 | "C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 143 | "C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 144 | "C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 145 | "C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ], 146 | "C_COMMON_CLK": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 147 | "C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 148 | "C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 149 | "C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 150 | "C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 151 | "C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 152 | "C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 153 | "C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 154 | "C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 155 | "C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 156 | "C_COUNT_36K_BRAM": [ { "value": "1", "resolve_type": "generated", "usage": "all" } ], 157 | "C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 158 | "C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 5.7864 mW", "resolve_type": "generated", "usage": "all" } ] 159 | }, 160 | "project_parameters": { 161 | "ARCHITECTURE": [ { "value": "artix7" } ], 162 | "BASE_BOARD_PART": [ { "value": "" } ], 163 | "BOARD_CONNECTIONS": [ { "value": "" } ], 164 | "DEVICE": [ { "value": "xc7a100t" } ], 165 | "PACKAGE": [ { "value": "fgg484" } ], 166 | "PREFHDL": [ { "value": "VERILOG" } ], 167 | "SILICON_REVISION": [ { "value": "" } ], 168 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 169 | "SPEEDGRADE": [ { "value": "-2" } ], 170 | "STATIC_POWER": [ { "value": "" } ], 171 | "TEMPERATURE_GRADE": [ { "value": "" } ], 172 | "USE_RDI_CUSTOMIZATION": [ { "value": "TRUE" } ], 173 | "USE_RDI_GENERATION": [ { "value": "TRUE" } ] 174 | }, 175 | "runtime_parameters": { 176 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 177 | "IPREVISION": [ { "value": "7" } ], 178 | "MANAGED": [ { "value": "TRUE" } ], 179 | "OUTPUTDIR": [ { "value": "../../../../pcileech_tbx4.gen/sources_1/ip/bram_pcie_cfgspace" } ], 180 | "SELECTEDSIMMODEL": [ { "value": "" } ], 181 | "SHAREDDIR": [ { "value": "." } ], 182 | "SWVERSION": [ { "value": "2023.2" } ], 183 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 184 | } 185 | }, 186 | "boundary": { 187 | "ports": { 188 | "clka": [ { "direction": "in", "driver_value": "0" } ], 189 | "wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 190 | "addra": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 191 | "dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ], 192 | "clkb": [ { "direction": "in", "driver_value": "0" } ], 193 | "addrb": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 194 | "doutb": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 195 | }, 196 | "interfaces": { 197 | "CLK.ACLK": { 198 | "vlnv": "xilinx.com:signal:clock:1.0", 199 | "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", 200 | "mode": "slave", 201 | "parameters": { 202 | "ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ], 203 | "ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ], 204 | "FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 205 | "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 206 | "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], 207 | "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 208 | "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 209 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 210 | } 211 | }, 212 | "RST.ARESETN": { 213 | "vlnv": "xilinx.com:signal:reset:1.0", 214 | "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", 215 | "mode": "slave", 216 | "parameters": { 217 | "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ], 218 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 219 | } 220 | }, 221 | "BRAM_PORTA": { 222 | "vlnv": "xilinx.com:interface:bram:1.0", 223 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 224 | "mode": "slave", 225 | "parameters": { 226 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 227 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 228 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 229 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 230 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 231 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 232 | }, 233 | "port_maps": { 234 | "ADDR": [ { "physical_name": "addra" } ], 235 | "CLK": [ { "physical_name": "clka" } ], 236 | "DIN": [ { "physical_name": "dina" } ], 237 | "WE": [ { "physical_name": "wea" } ] 238 | } 239 | }, 240 | "BRAM_PORTB": { 241 | "vlnv": "xilinx.com:interface:bram:1.0", 242 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 243 | "mode": "slave", 244 | "parameters": { 245 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 246 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 247 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 248 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 249 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 250 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 251 | }, 252 | "port_maps": { 253 | "ADDR": [ { "physical_name": "addrb" } ], 254 | "CLK": [ { "physical_name": "clkb" } ], 255 | "DOUT": [ { "physical_name": "doutb" } ] 256 | } 257 | } 258 | }, 259 | "memory_maps": { 260 | "S_1": { 261 | "address_blocks": { 262 | "Mem0": { 263 | "base_address": "0", 264 | "range": "4096", 265 | "usage": "memory", 266 | "access": "read-write", 267 | "parameters": { 268 | "OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ], 269 | "OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ] 270 | } 271 | } 272 | } 273 | } 274 | } 275 | } 276 | } 277 | } -------------------------------------------------------------------------------- /ip/100t/drom_pcie_cfgspace_writemask.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "drom_pcie_cfgspace_writemask", 5 | "component_reference": "xilinx.com:ip:dist_mem_gen:8.0", 6 | "ip_revision": "14", 7 | "gen_directory": "../../../../pcileech_tbx4.gen/sources_1/ip/drom_pcie_cfgspace_writemask", 8 | "parameters": { 9 | "component_parameters": { 10 | "depth": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 11 | "data_width": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 12 | "Component_Name": [ { "value": "drom_pcie_cfgspace_writemask", "resolve_type": "user", "usage": "all" } ], 13 | "memory_type": [ { "value": "rom", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 14 | "input_options": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 15 | "input_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 16 | "qualify_we_with_i_ce": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 17 | "dual_port_address": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 18 | "simple_dual_port_address": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 19 | "output_options": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 20 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "usage": "all" } ], 21 | "common_output_clk": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "single_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "common_output_ce": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 24 | "dual_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 25 | "simple_dual_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 26 | "coefficient_file": [ { "value": "pcileech_cfgspace_writemask.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 27 | "default_data_radix": [ { "value": "16", "resolve_type": "user", "usage": "all" } ], 28 | "default_data": [ { "value": "ffffffff", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 29 | "reset_qspo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 30 | "reset_qdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "reset_qsdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 32 | "sync_reset_qspo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 33 | "sync_reset_qdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 34 | "sync_reset_qsdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "ce_overrides": [ { "value": "ce_overrides_sync_controls", "resolve_type": "user", "usage": "all" } ] 36 | }, 37 | "model_parameters": { 38 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 39 | "C_ADDR_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 40 | "C_DEFAULT_DATA": [ { "value": "11111111111111111111111111111111", "resolve_type": "generated", "usage": "all" } ], 41 | "C_DEPTH": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 42 | "C_HAS_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 43 | "C_HAS_D": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 44 | "C_HAS_DPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 45 | "C_HAS_DPRA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 46 | "C_HAS_I_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 47 | "C_HAS_QDPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 48 | "C_HAS_QDPO_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 49 | "C_HAS_QDPO_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 50 | "C_HAS_QDPO_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 51 | "C_HAS_QDPO_SRST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 52 | "C_HAS_QSPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 53 | "C_HAS_QSPO_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 54 | "C_HAS_QSPO_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 55 | "C_HAS_QSPO_SRST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 56 | "C_HAS_SPO": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 57 | "C_HAS_WE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 58 | "C_MEM_INIT_FILE": [ { "value": "drom_pcie_cfgspace_writemask.mif", "resolve_type": "generated", "usage": "all" } ], 59 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 60 | "C_MEM_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 61 | "C_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 62 | "C_QCE_JOINED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 63 | "C_QUALIFY_WE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 64 | "C_READ_MIF": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 65 | "C_REG_A_D_INPUTS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 66 | "C_REG_DPRA_INPUT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 67 | "C_SYNC_ENABLE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 68 | "C_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 69 | "C_PARSER_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ] 70 | }, 71 | "project_parameters": { 72 | "ARCHITECTURE": [ { "value": "artix7" } ], 73 | "BASE_BOARD_PART": [ { "value": "" } ], 74 | "BOARD_CONNECTIONS": [ { "value": "" } ], 75 | "DEVICE": [ { "value": "xc7a100t" } ], 76 | "PACKAGE": [ { "value": "fgg484" } ], 77 | "PREFHDL": [ { "value": "VERILOG" } ], 78 | "SILICON_REVISION": [ { "value": "" } ], 79 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 80 | "SPEEDGRADE": [ { "value": "-2" } ], 81 | "STATIC_POWER": [ { "value": "" } ], 82 | "TEMPERATURE_GRADE": [ { "value": "" } ] 83 | }, 84 | "runtime_parameters": { 85 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 86 | "IPREVISION": [ { "value": "14" } ], 87 | "MANAGED": [ { "value": "TRUE" } ], 88 | "OUTPUTDIR": [ { "value": "../../../../pcileech_tbx4.gen/sources_1/ip/drom_pcie_cfgspace_writemask" } ], 89 | "SELECTEDSIMMODEL": [ { "value": "" } ], 90 | "SHAREDDIR": [ { "value": "." } ], 91 | "SWVERSION": [ { "value": "2023.2" } ], 92 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 93 | } 94 | }, 95 | "boundary": { 96 | "ports": { 97 | "a": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 98 | "spo": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 99 | } 100 | } 101 | } 102 | } -------------------------------------------------------------------------------- /ip/100t/pcileech_bar_zero4k.coe: -------------------------------------------------------------------------------- 1 | memory_initialization_radix=16; 2 | memory_initialization_vector= 3 | 4 | 00000000,00000000,00000000,00000000, 5 | 00000000,00000000,00000000,00000000, 6 | 00000000,00000000,00000000,00000000, 7 | 00000000,00000000,00000000,00000000, 8 | 00000000,00000000,00000000,00000000, 9 | 00000000,00000000,00000000,00000000, 10 | 00000000,00000000,00000000,00000000, 11 | 00000000,00000000,00000000,00000000, 12 | 00000000,00000000,00000000,00000000, 13 | 00000000,00000000,00000000,00000000, 14 | 00000000,00000000,00000000,00000000, 15 | 00000000,00000000,00000000,00000000, 16 | 00000000,00000000,00000000,00000000, 17 | 00000000,00000000,00000000,00000000, 18 | 00000000,00000000,00000000,00000000, 19 | 00000000,00000000,00000000,00000000, 20 | 21 | 00000000,00000000,00000000,00000000, 22 | 00000000,00000000,00000000,00000000, 23 | 00000000,00000000,00000000,00000000, 24 | 00000000,00000000,00000000,00000000, 25 | 00000000,00000000,00000000,00000000, 26 | 00000000,00000000,00000000,00000000, 27 | 00000000,00000000,00000000,00000000, 28 | 00000000,00000000,00000000,00000000, 29 | 00000000,00000000,00000000,00000000, 30 | 00000000,00000000,00000000,00000000, 31 | 00000000,00000000,00000000,00000000, 32 | 00000000,00000000,00000000,00000000, 33 | 00000000,00000000,00000000,00000000, 34 | 00000000,00000000,00000000,00000000, 35 | 00000000,00000000,00000000,00000000, 36 | 00000000,00000000,00000000,00000000, 37 | 38 | 00000000,00000000,00000000,00000000, 39 | 00000000,00000000,00000000,00000000, 40 | 00000000,00000000,00000000,00000000, 41 | 00000000,00000000,00000000,00000000, 42 | 00000000,00000000,00000000,00000000, 43 | 00000000,00000000,00000000,00000000, 44 | 00000000,00000000,00000000,00000000, 45 | 00000000,00000000,00000000,00000000, 46 | 00000000,00000000,00000000,00000000, 47 | 00000000,00000000,00000000,00000000, 48 | 00000000,00000000,00000000,00000000, 49 | 00000000,00000000,00000000,00000000, 50 | 00000000,00000000,00000000,00000000, 51 | 00000000,00000000,00000000,00000000, 52 | 00000000,00000000,00000000,00000000, 53 | 00000000,00000000,00000000,00000000, 54 | 55 | 00000000,00000000,00000000,00000000, 56 | 00000000,00000000,00000000,00000000, 57 | 00000000,00000000,00000000,00000000, 58 | 00000000,00000000,00000000,00000000, 59 | 00000000,00000000,00000000,00000000, 60 | 00000000,00000000,00000000,00000000, 61 | 00000000,00000000,00000000,00000000, 62 | 00000000,00000000,00000000,00000000, 63 | 00000000,00000000,00000000,00000000, 64 | 00000000,00000000,00000000,00000000, 65 | 00000000,00000000,00000000,00000000, 66 | 00000000,00000000,00000000,00000000, 67 | 00000000,00000000,00000000,00000000, 68 | 00000000,00000000,00000000,00000000, 69 | 00000000,00000000,00000000,00000000, 70 | 00000000,00000000,00000000,00000000, 71 | 72 | 73 | 74 | 00000000,00000000,00000000,00000000, 75 | 00000000,00000000,00000000,00000000, 76 | 00000000,00000000,00000000,00000000, 77 | 00000000,00000000,00000000,00000000, 78 | 00000000,00000000,00000000,00000000, 79 | 00000000,00000000,00000000,00000000, 80 | 00000000,00000000,00000000,00000000, 81 | 00000000,00000000,00000000,00000000, 82 | 00000000,00000000,00000000,00000000, 83 | 00000000,00000000,00000000,00000000, 84 | 00000000,00000000,00000000,00000000, 85 | 00000000,00000000,00000000,00000000, 86 | 00000000,00000000,00000000,00000000, 87 | 00000000,00000000,00000000,00000000, 88 | 00000000,00000000,00000000,00000000, 89 | 00000000,00000000,00000000,00000000, 90 | 91 | 00000000,00000000,00000000,00000000, 92 | 00000000,00000000,00000000,00000000, 93 | 00000000,00000000,00000000,00000000, 94 | 00000000,00000000,00000000,00000000, 95 | 00000000,00000000,00000000,00000000, 96 | 00000000,00000000,00000000,00000000, 97 | 00000000,00000000,00000000,00000000, 98 | 00000000,00000000,00000000,00000000, 99 | 00000000,00000000,00000000,00000000, 100 | 00000000,00000000,00000000,00000000, 101 | 00000000,00000000,00000000,00000000, 102 | 00000000,00000000,00000000,00000000, 103 | 00000000,00000000,00000000,00000000, 104 | 00000000,00000000,00000000,00000000, 105 | 00000000,00000000,00000000,00000000, 106 | 00000000,00000000,00000000,00000000, 107 | 108 | 00000000,00000000,00000000,00000000, 109 | 00000000,00000000,00000000,00000000, 110 | 00000000,00000000,00000000,00000000, 111 | 00000000,00000000,00000000,00000000, 112 | 00000000,00000000,00000000,00000000, 113 | 00000000,00000000,00000000,00000000, 114 | 00000000,00000000,00000000,00000000, 115 | 00000000,00000000,00000000,00000000, 116 | 00000000,00000000,00000000,00000000, 117 | 00000000,00000000,00000000,00000000, 118 | 00000000,00000000,00000000,00000000, 119 | 00000000,00000000,00000000,00000000, 120 | 00000000,00000000,00000000,00000000, 121 | 00000000,00000000,00000000,00000000, 122 | 00000000,00000000,00000000,00000000, 123 | 00000000,00000000,00000000,00000000, 124 | 125 | 00000000,00000000,00000000,00000000, 126 | 00000000,00000000,00000000,00000000, 127 | 00000000,00000000,00000000,00000000, 128 | 00000000,00000000,00000000,00000000, 129 | 00000000,00000000,00000000,00000000, 130 | 00000000,00000000,00000000,00000000, 131 | 00000000,00000000,00000000,00000000, 132 | 00000000,00000000,00000000,00000000, 133 | 00000000,00000000,00000000,00000000, 134 | 00000000,00000000,00000000,00000000, 135 | 00000000,00000000,00000000,00000000, 136 | 00000000,00000000,00000000,00000000, 137 | 00000000,00000000,00000000,00000000, 138 | 00000000,00000000,00000000,00000000, 139 | 00000000,00000000,00000000,00000000, 140 | 00000000,00000000,00000000,00000000, 141 | 142 | 143 | 00000000,00000000,00000000,00000000, 144 | 00000000,00000000,00000000,00000000, 145 | 00000000,00000000,00000000,00000000, 146 | 00000000,00000000,00000000,00000000, 147 | 00000000,00000000,00000000,00000000, 148 | 00000000,00000000,00000000,00000000, 149 | 00000000,00000000,00000000,00000000, 150 | 00000000,00000000,00000000,00000000, 151 | 00000000,00000000,00000000,00000000, 152 | 00000000,00000000,00000000,00000000, 153 | 00000000,00000000,00000000,00000000, 154 | 00000000,00000000,00000000,00000000, 155 | 00000000,00000000,00000000,00000000, 156 | 00000000,00000000,00000000,00000000, 157 | 00000000,00000000,00000000,00000000, 158 | 00000000,00000000,00000000,00000000, 159 | 160 | 00000000,00000000,00000000,00000000, 161 | 00000000,00000000,00000000,00000000, 162 | 00000000,00000000,00000000,00000000, 163 | 00000000,00000000,00000000,00000000, 164 | 00000000,00000000,00000000,00000000, 165 | 00000000,00000000,00000000,00000000, 166 | 00000000,00000000,00000000,00000000, 167 | 00000000,00000000,00000000,00000000, 168 | 00000000,00000000,00000000,00000000, 169 | 00000000,00000000,00000000,00000000, 170 | 00000000,00000000,00000000,00000000, 171 | 00000000,00000000,00000000,00000000, 172 | 00000000,00000000,00000000,00000000, 173 | 00000000,00000000,00000000,00000000, 174 | 00000000,00000000,00000000,00000000, 175 | 00000000,00000000,00000000,00000000, 176 | 177 | 00000000,00000000,00000000,00000000, 178 | 00000000,00000000,00000000,00000000, 179 | 00000000,00000000,00000000,00000000, 180 | 00000000,00000000,00000000,00000000, 181 | 00000000,00000000,00000000,00000000, 182 | 00000000,00000000,00000000,00000000, 183 | 00000000,00000000,00000000,00000000, 184 | 00000000,00000000,00000000,00000000, 185 | 00000000,00000000,00000000,00000000, 186 | 00000000,00000000,00000000,00000000, 187 | 00000000,00000000,00000000,00000000, 188 | 00000000,00000000,00000000,00000000, 189 | 00000000,00000000,00000000,00000000, 190 | 00000000,00000000,00000000,00000000, 191 | 00000000,00000000,00000000,00000000, 192 | 00000000,00000000,00000000,00000000, 193 | 194 | 00000000,00000000,00000000,00000000, 195 | 00000000,00000000,00000000,00000000, 196 | 00000000,00000000,00000000,00000000, 197 | 00000000,00000000,00000000,00000000, 198 | 00000000,00000000,00000000,00000000, 199 | 00000000,00000000,00000000,00000000, 200 | 00000000,00000000,00000000,00000000, 201 | 00000000,00000000,00000000,00000000, 202 | 00000000,00000000,00000000,00000000, 203 | 00000000,00000000,00000000,00000000, 204 | 00000000,00000000,00000000,00000000, 205 | 00000000,00000000,00000000,00000000, 206 | 00000000,00000000,00000000,00000000, 207 | 00000000,00000000,00000000,00000000, 208 | 00000000,00000000,00000000,00000000, 209 | 00000000,00000000,00000000,00000000, 210 | 211 | 212 | 213 | 00000000,00000000,00000000,00000000, 214 | 00000000,00000000,00000000,00000000, 215 | 00000000,00000000,00000000,00000000, 216 | 00000000,00000000,00000000,00000000, 217 | 00000000,00000000,00000000,00000000, 218 | 00000000,00000000,00000000,00000000, 219 | 00000000,00000000,00000000,00000000, 220 | 00000000,00000000,00000000,00000000, 221 | 00000000,00000000,00000000,00000000, 222 | 00000000,00000000,00000000,00000000, 223 | 00000000,00000000,00000000,00000000, 224 | 00000000,00000000,00000000,00000000, 225 | 00000000,00000000,00000000,00000000, 226 | 00000000,00000000,00000000,00000000, 227 | 00000000,00000000,00000000,00000000, 228 | 00000000,00000000,00000000,00000000, 229 | 230 | 00000000,00000000,00000000,00000000, 231 | 00000000,00000000,00000000,00000000, 232 | 00000000,00000000,00000000,00000000, 233 | 00000000,00000000,00000000,00000000, 234 | 00000000,00000000,00000000,00000000, 235 | 00000000,00000000,00000000,00000000, 236 | 00000000,00000000,00000000,00000000, 237 | 00000000,00000000,00000000,00000000, 238 | 00000000,00000000,00000000,00000000, 239 | 00000000,00000000,00000000,00000000, 240 | 00000000,00000000,00000000,00000000, 241 | 00000000,00000000,00000000,00000000, 242 | 00000000,00000000,00000000,00000000, 243 | 00000000,00000000,00000000,00000000, 244 | 00000000,00000000,00000000,00000000, 245 | 00000000,00000000,00000000,00000000, 246 | 247 | 00000000,00000000,00000000,00000000, 248 | 00000000,00000000,00000000,00000000, 249 | 00000000,00000000,00000000,00000000, 250 | 00000000,00000000,00000000,00000000, 251 | 00000000,00000000,00000000,00000000, 252 | 00000000,00000000,00000000,00000000, 253 | 00000000,00000000,00000000,00000000, 254 | 00000000,00000000,00000000,00000000, 255 | 00000000,00000000,00000000,00000000, 256 | 00000000,00000000,00000000,00000000, 257 | 00000000,00000000,00000000,00000000, 258 | 00000000,00000000,00000000,00000000, 259 | 00000000,00000000,00000000,00000000, 260 | 00000000,00000000,00000000,00000000, 261 | 00000000,00000000,00000000,00000000, 262 | 00000000,00000000,00000000,00000000, 263 | 264 | 00000000,00000000,00000000,00000000, 265 | 00000000,00000000,00000000,00000000, 266 | 00000000,00000000,00000000,00000000, 267 | 00000000,00000000,00000000,00000000, 268 | 00000000,00000000,00000000,00000000, 269 | 00000000,00000000,00000000,00000000, 270 | 00000000,00000000,00000000,00000000, 271 | 00000000,00000000,00000000,00000000, 272 | 00000000,00000000,00000000,00000000, 273 | 00000000,00000000,00000000,00000000, 274 | 00000000,00000000,00000000,00000000, 275 | 00000000,00000000,00000000,00000000, 276 | 00000000,00000000,00000000,00000000, 277 | 00000000,00000000,00000000,00000000, 278 | 00000000,00000000,00000000,00000000, 279 | 00000000,00000000,00000000,00000000 280 | ; 281 | -------------------------------------------------------------------------------- /ip/100t/pcileech_cfgspace.coe: -------------------------------------------------------------------------------- 1 | memory_initialization_radix=16; 2 | memory_initialization_vector= 3 | 4 | fffff000,fffff004,fffff008,fffff00c, 5 | fffff010,fffff014,fffff018,fffff01c, 6 | fffff020,fffff024,fffff028,fffff02c, 7 | fffff030,fffff034,fffff038,fffff03c, 8 | fffff040,fffff044,fffff048,fffff04c, 9 | fffff050,fffff054,fffff058,fffff05c, 10 | fffff060,fffff064,fffff068,fffff06c, 11 | fffff070,fffff074,fffff078,fffff07c, 12 | fffff080,fffff084,fffff088,fffff08c, 13 | fffff090,fffff094,fffff098,fffff09c, 14 | fffff0a0,fffff0a4,fffff0a8,fffff0ac, 15 | fffff0b0,fffff0b4,fffff0b8,fffff0bc, 16 | fffff0c0,fffff0c4,fffff0c8,fffff0cc, 17 | fffff0d0,fffff0d4,fffff0d8,fffff0dc, 18 | fffff0e0,fffff0e4,fffff0e8,fffff0ec, 19 | fffff0f0,fffff0f4,fffff0f8,fffff0fc, 20 | 21 | fffff100,fffff104,fffff108,fffff10c, 22 | fffff110,fffff114,fffff118,fffff11c, 23 | fffff120,fffff124,fffff128,fffff12c, 24 | fffff130,fffff134,fffff138,fffff13c, 25 | fffff140,fffff144,fffff148,fffff14c, 26 | fffff150,fffff154,fffff158,fffff15c, 27 | fffff160,fffff164,fffff168,fffff16c, 28 | fffff170,fffff174,fffff178,fffff17c, 29 | fffff180,fffff184,fffff188,fffff18c, 30 | fffff190,fffff194,fffff198,fffff19c, 31 | fffff1a0,fffff1a4,fffff1a8,fffff1ac, 32 | fffff1b0,fffff1b4,fffff1b8,fffff1bc, 33 | fffff1c0,fffff1c4,fffff1c8,fffff1cc, 34 | fffff1d0,fffff1d4,fffff1d8,fffff1dc, 35 | fffff1e0,fffff1e4,fffff1e8,fffff1ec, 36 | fffff1f0,fffff1f4,fffff1f8,fffff1fc, 37 | 38 | fffff200,fffff204,fffff208,fffff20c, 39 | fffff210,fffff214,fffff218,fffff21c, 40 | fffff220,fffff224,fffff228,fffff22c, 41 | fffff230,fffff234,fffff238,fffff23c, 42 | fffff240,fffff244,fffff248,fffff24c, 43 | fffff250,fffff254,fffff258,fffff25c, 44 | fffff260,fffff264,fffff268,fffff26c, 45 | fffff270,fffff274,fffff278,fffff27c, 46 | fffff280,fffff284,fffff288,fffff28c, 47 | fffff290,fffff294,fffff298,fffff29c, 48 | fffff2a0,fffff2a4,fffff2a8,fffff2ac, 49 | fffff2b0,fffff2b4,fffff2b8,fffff2bc, 50 | fffff2c0,fffff2c4,fffff2c8,fffff2cc, 51 | fffff2d0,fffff2d4,fffff2d8,fffff2dc, 52 | fffff2e0,fffff2e4,fffff2e8,fffff2ec, 53 | fffff2f0,fffff2f4,fffff2f8,fffff2fc, 54 | 55 | fffff300,fffff304,fffff308,fffff30c, 56 | fffff310,fffff314,fffff318,fffff31c, 57 | fffff320,fffff324,fffff328,fffff32c, 58 | fffff330,fffff334,fffff338,fffff33c, 59 | fffff340,fffff344,fffff348,fffff34c, 60 | fffff350,fffff354,fffff358,fffff35c, 61 | fffff360,fffff364,fffff368,fffff36c, 62 | fffff370,fffff374,fffff378,fffff37c, 63 | fffff380,fffff384,fffff388,fffff38c, 64 | fffff390,fffff394,fffff398,fffff39c, 65 | fffff3a0,fffff3a4,fffff3a8,fffff3ac, 66 | fffff3b0,fffff3b4,fffff3b8,fffff3bc, 67 | fffff3c0,fffff3c4,fffff3c8,fffff3cc, 68 | fffff3d0,fffff3d4,fffff3d8,fffff3dc, 69 | fffff3e0,fffff3e4,fffff3e8,fffff3ec, 70 | fffff3f0,fffff3f4,fffff3f8,fffff3fc, 71 | 72 | 73 | 74 | fffff400,fffff404,fffff408,fffff40c, 75 | fffff410,fffff414,fffff418,fffff41c, 76 | fffff420,fffff424,fffff428,fffff42c, 77 | fffff430,fffff434,fffff438,fffff43c, 78 | fffff440,fffff444,fffff448,fffff44c, 79 | fffff450,fffff454,fffff458,fffff45c, 80 | fffff460,fffff464,fffff468,fffff46c, 81 | fffff470,fffff474,fffff478,fffff47c, 82 | fffff480,fffff484,fffff488,fffff48c, 83 | fffff490,fffff494,fffff498,fffff49c, 84 | fffff4a0,fffff4a4,fffff4a8,fffff4ac, 85 | fffff4b0,fffff4b4,fffff4b8,fffff4bc, 86 | fffff4c0,fffff4c4,fffff4c8,fffff4cc, 87 | fffff4d0,fffff4d4,fffff4d8,fffff4dc, 88 | fffff4e0,fffff4e4,fffff4e8,fffff4ec, 89 | fffff4f0,fffff4f4,fffff4f8,fffff4fc, 90 | 91 | fffff500,fffff504,fffff508,fffff50c, 92 | fffff510,fffff514,fffff518,fffff51c, 93 | fffff520,fffff524,fffff528,fffff52c, 94 | fffff530,fffff534,fffff538,fffff53c, 95 | fffff540,fffff544,fffff548,fffff54c, 96 | fffff550,fffff554,fffff558,fffff55c, 97 | fffff560,fffff564,fffff568,fffff56c, 98 | fffff570,fffff574,fffff578,fffff57c, 99 | fffff580,fffff584,fffff588,fffff58c, 100 | fffff590,fffff594,fffff598,fffff59c, 101 | fffff5a0,fffff5a4,fffff5a8,fffff5ac, 102 | fffff5b0,fffff5b4,fffff5b8,fffff5bc, 103 | fffff5c0,fffff5c4,fffff5c8,fffff5cc, 104 | fffff5d0,fffff5d4,fffff5d8,fffff5dc, 105 | fffff5e0,fffff5e4,fffff5e8,fffff5ec, 106 | fffff5f0,fffff5f4,fffff5f8,fffff5fc, 107 | 108 | fffff600,fffff604,fffff608,fffff60c, 109 | fffff610,fffff614,fffff618,fffff61c, 110 | fffff620,fffff624,fffff628,fffff62c, 111 | fffff630,fffff634,fffff638,fffff63c, 112 | fffff640,fffff644,fffff648,fffff64c, 113 | fffff650,fffff654,fffff658,fffff65c, 114 | fffff660,fffff664,fffff668,fffff66c, 115 | fffff670,fffff674,fffff678,fffff67c, 116 | fffff680,fffff684,fffff688,fffff68c, 117 | fffff690,fffff694,fffff698,fffff69c, 118 | fffff6a0,fffff6a4,fffff6a8,fffff6ac, 119 | fffff6b0,fffff6b4,fffff6b8,fffff6bc, 120 | fffff6c0,fffff6c4,fffff6c8,fffff6cc, 121 | fffff6d0,fffff6d4,fffff6d8,fffff6dc, 122 | fffff6e0,fffff6e4,fffff6e8,fffff6ec, 123 | fffff6f0,fffff6f4,fffff6f8,fffff6fc, 124 | 125 | fffff700,fffff704,fffff708,fffff70c, 126 | fffff710,fffff714,fffff718,fffff71c, 127 | fffff720,fffff724,fffff728,fffff72c, 128 | fffff730,fffff734,fffff738,fffff73c, 129 | fffff740,fffff744,fffff748,fffff74c, 130 | fffff750,fffff754,fffff758,fffff75c, 131 | fffff760,fffff764,fffff768,fffff76c, 132 | fffff770,fffff774,fffff778,fffff77c, 133 | fffff780,fffff784,fffff788,fffff78c, 134 | fffff790,fffff794,fffff798,fffff79c, 135 | fffff7a0,fffff7a4,fffff7a8,fffff7ac, 136 | fffff7b0,fffff7b4,fffff7b8,fffff7bc, 137 | fffff7c0,fffff7c4,fffff7c8,fffff7cc, 138 | fffff7d0,fffff7d4,fffff7d8,fffff7dc, 139 | fffff7e0,fffff7e4,fffff7e8,fffff7ec, 140 | fffff7f0,fffff7f4,fffff7f8,fffff7fc, 141 | 142 | 143 | fffff800,fffff804,fffff808,fffff80c, 144 | fffff810,fffff814,fffff818,fffff81c, 145 | fffff820,fffff824,fffff828,fffff82c, 146 | fffff830,fffff834,fffff838,fffff83c, 147 | fffff840,fffff844,fffff848,fffff84c, 148 | fffff850,fffff854,fffff858,fffff85c, 149 | fffff860,fffff864,fffff868,fffff86c, 150 | fffff870,fffff874,fffff878,fffff87c, 151 | fffff880,fffff884,fffff888,fffff88c, 152 | fffff890,fffff894,fffff898,fffff89c, 153 | fffff8a0,fffff8a4,fffff8a8,fffff8ac, 154 | fffff8b0,fffff8b4,fffff8b8,fffff8bc, 155 | fffff8c0,fffff8c4,fffff8c8,fffff8cc, 156 | fffff8d0,fffff8d4,fffff8d8,fffff8dc, 157 | fffff8e0,fffff8e4,fffff8e8,fffff8ec, 158 | fffff8f0,fffff8f4,fffff8f8,fffff8fc, 159 | 160 | fffff900,fffff904,fffff908,fffff90c, 161 | fffff910,fffff914,fffff918,fffff91c, 162 | fffff920,fffff924,fffff928,fffff92c, 163 | fffff930,fffff934,fffff938,fffff93c, 164 | fffff940,fffff944,fffff948,fffff94c, 165 | fffff950,fffff954,fffff958,fffff95c, 166 | fffff960,fffff964,fffff968,fffff96c, 167 | fffff970,fffff974,fffff978,fffff97c, 168 | fffff980,fffff984,fffff988,fffff98c, 169 | fffff990,fffff994,fffff998,fffff99c, 170 | fffff9a0,fffff9a4,fffff9a8,fffff9ac, 171 | fffff9b0,fffff9b4,fffff9b8,fffff9bc, 172 | fffff9c0,fffff9c4,fffff9c8,fffff9cc, 173 | fffff9d0,fffff9d4,fffff9d8,fffff9dc, 174 | fffff9e0,fffff9e4,fffff9e8,fffff9ec, 175 | fffff9f0,fffff9f4,fffff9f8,fffff9fc, 176 | 177 | fffffa00,fffffa04,fffffa08,fffffa0c, 178 | fffffa10,fffffa14,fffffa18,fffffa1c, 179 | fffffa20,fffffa24,fffffa28,fffffa2c, 180 | fffffa30,fffffa34,fffffa38,fffffa3c, 181 | fffffa40,fffffa44,fffffa48,fffffa4c, 182 | fffffa50,fffffa54,fffffa58,fffffa5c, 183 | fffffa60,fffffa64,fffffa68,fffffa6c, 184 | fffffa70,fffffa74,fffffa78,fffffa7c, 185 | fffffa80,fffffa84,fffffa88,fffffa8c, 186 | fffffa90,fffffa94,fffffa98,fffffa9c, 187 | fffffaa0,fffffaa4,fffffaa8,fffffaac, 188 | fffffab0,fffffab4,fffffab8,fffffabc, 189 | fffffac0,fffffac4,fffffac8,fffffacc, 190 | fffffad0,fffffad4,fffffad8,fffffadc, 191 | fffffae0,fffffae4,fffffae8,fffffaec, 192 | fffffaf0,fffffaf4,fffffaf8,fffffafc, 193 | 194 | fffffb00,fffffb04,fffffb08,fffffb0c, 195 | fffffb10,fffffb14,fffffb18,fffffb1c, 196 | fffffb20,fffffb24,fffffb28,fffffb2c, 197 | fffffb30,fffffb34,fffffb38,fffffb3c, 198 | fffffb40,fffffb44,fffffb48,fffffb4c, 199 | fffffb50,fffffb54,fffffb58,fffffb5c, 200 | fffffb60,fffffb64,fffffb68,fffffb6c, 201 | fffffb70,fffffb74,fffffb78,fffffb7c, 202 | fffffb80,fffffb84,fffffb88,fffffb8c, 203 | fffffb90,fffffb94,fffffb98,fffffb9c, 204 | fffffba0,fffffba4,fffffba8,fffffbac, 205 | fffffbb0,fffffbb4,fffffbb8,fffffbbc, 206 | fffffbc0,fffffbc4,fffffbc8,fffffbcc, 207 | fffffbd0,fffffbd4,fffffbd8,fffffbdc, 208 | fffffbe0,fffffbe4,fffffbe8,fffffbec, 209 | fffffbf0,fffffbf4,fffffbf8,fffffbfc, 210 | 211 | 212 | 213 | fffffc00,fffffc04,fffffc08,fffffc0c, 214 | fffffc10,fffffc14,fffffc18,fffffc1c, 215 | fffffc20,fffffc24,fffffc28,fffffc2c, 216 | fffffc30,fffffc34,fffffc38,fffffc3c, 217 | fffffc40,fffffc44,fffffc48,fffffc4c, 218 | fffffc50,fffffc54,fffffc58,fffffc5c, 219 | fffffc60,fffffc64,fffffc68,fffffc6c, 220 | fffffc70,fffffc74,fffffc78,fffffc7c, 221 | fffffc80,fffffc84,fffffc88,fffffc8c, 222 | fffffc90,fffffc94,fffffc98,fffffc9c, 223 | fffffca0,fffffca4,fffffca8,fffffcac, 224 | fffffcb0,fffffcb4,fffffcb8,fffffcbc, 225 | fffffcc0,fffffcc4,fffffcc8,fffffccc, 226 | fffffcd0,fffffcd4,fffffcd8,fffffcdc, 227 | fffffce0,fffffce4,fffffce8,fffffcec, 228 | fffffcf0,fffffcf4,fffffcf8,fffffcfc, 229 | 230 | fffffd00,fffffd04,fffffd08,fffffd0c, 231 | fffffd10,fffffd14,fffffd18,fffffd1c, 232 | fffffd20,fffffd24,fffffd28,fffffd2c, 233 | fffffd30,fffffd34,fffffd38,fffffd3c, 234 | fffffd40,fffffd44,fffffd48,fffffd4c, 235 | fffffd50,fffffd54,fffffd58,fffffd5c, 236 | fffffd60,fffffd64,fffffd68,fffffd6c, 237 | fffffd70,fffffd74,fffffd78,fffffd7c, 238 | fffffd80,fffffd84,fffffd88,fffffd8c, 239 | fffffd90,fffffd94,fffffd98,fffffd9c, 240 | fffffda0,fffffda4,fffffda8,fffffdac, 241 | fffffdb0,fffffdb4,fffffdb8,fffffdbc, 242 | fffffdc0,fffffdc4,fffffdc8,fffffdcc, 243 | fffffdd0,fffffdd4,fffffdd8,fffffddc, 244 | fffffde0,fffffde4,fffffde8,fffffdec, 245 | fffffdf0,fffffdf4,fffffdf8,fffffdfc, 246 | 247 | fffffe00,fffffe04,fffffe08,fffffe0c, 248 | fffffe10,fffffe14,fffffe18,fffffe1c, 249 | fffffe20,fffffe24,fffffe28,fffffe2c, 250 | fffffe30,fffffe34,fffffe38,fffffe3c, 251 | fffffe40,fffffe44,fffffe48,fffffe4c, 252 | fffffe50,fffffe54,fffffe58,fffffe5c, 253 | fffffe60,fffffe64,fffffe68,fffffe6c, 254 | fffffe70,fffffe74,fffffe78,fffffe7c, 255 | fffffe80,fffffe84,fffffe88,fffffe8c, 256 | fffffe90,fffffe94,fffffe98,fffffe9c, 257 | fffffea0,fffffea4,fffffea8,fffffeac, 258 | fffffeb0,fffffeb4,fffffeb8,fffffebc, 259 | fffffec0,fffffec4,fffffec8,fffffecc, 260 | fffffed0,fffffed4,fffffed8,fffffedc, 261 | fffffee0,fffffee4,fffffee8,fffffeec, 262 | fffffef0,fffffef4,fffffef8,fffffefc, 263 | 264 | ffffff00,ffffff04,ffffff08,ffffff0c, 265 | ffffff10,ffffff14,ffffff18,ffffff1c, 266 | ffffff20,ffffff24,ffffff28,ffffff2c, 267 | ffffff30,ffffff34,ffffff38,ffffff3c, 268 | ffffff40,ffffff44,ffffff48,ffffff4c, 269 | ffffff50,ffffff54,ffffff58,ffffff5c, 270 | ffffff60,ffffff64,ffffff68,ffffff6c, 271 | ffffff70,ffffff74,ffffff78,ffffff7c, 272 | ffffff80,ffffff84,ffffff88,ffffff8c, 273 | ffffff90,ffffff94,ffffff98,ffffff9c, 274 | ffffffa0,ffffffa4,ffffffa8,ffffffac, 275 | ffffffb0,ffffffb4,ffffffb8,ffffffbc, 276 | ffffffc0,ffffffc4,ffffffc8,ffffffcc, 277 | ffffffd0,ffffffd4,ffffffd8,ffffffdc, 278 | ffffffe0,ffffffe4,ffffffe8,ffffffec, 279 | fffffff0,fffffff4,fffffff8,fffffffc 280 | ; 281 | -------------------------------------------------------------------------------- /ip/100t/pcileech_cfgspace_writemask.coe: -------------------------------------------------------------------------------- 1 | memory_initialization_radix=16; 2 | memory_initialization_vector= 3 | 4 | ffffffff,ffffffff,ffffffff,ffffffff, 5 | ffffffff,ffffffff,ffffffff,ffffffff, 6 | ffffffff,ffffffff,ffffffff,ffffffff, 7 | ffffffff,ffffffff,ffffffff,ffffffff, 8 | ffffffff,ffffffff,ffffffff,ffffffff, 9 | ffffffff,ffffffff,ffffffff,ffffffff, 10 | ffffffff,ffffffff,ffffffff,ffffffff, 11 | ffffffff,ffffffff,ffffffff,ffffffff, 12 | ffffffff,ffffffff,ffffffff,ffffffff, 13 | ffffffff,ffffffff,ffffffff,ffffffff, 14 | ffffffff,ffffffff,ffffffff,ffffffff, 15 | ffffffff,ffffffff,ffffffff,ffffffff, 16 | ffffffff,ffffffff,ffffffff,ffffffff, 17 | ffffffff,ffffffff,ffffffff,ffffffff, 18 | ffffffff,ffffffff,ffffffff,ffffffff, 19 | ffffffff,ffffffff,ffffffff,ffffffff, 20 | 21 | ffffffff,ffffffff,ffffffff,ffffffff, 22 | ffffffff,ffffffff,ffffffff,ffffffff, 23 | ffffffff,ffffffff,ffffffff,ffffffff, 24 | ffffffff,ffffffff,ffffffff,ffffffff, 25 | ffffffff,ffffffff,ffffffff,ffffffff, 26 | ffffffff,ffffffff,ffffffff,ffffffff, 27 | ffffffff,ffffffff,ffffffff,ffffffff, 28 | ffffffff,ffffffff,ffffffff,ffffffff, 29 | ffffffff,ffffffff,ffffffff,ffffffff, 30 | ffffffff,ffffffff,ffffffff,ffffffff, 31 | ffffffff,ffffffff,ffffffff,ffffffff, 32 | ffffffff,ffffffff,ffffffff,ffffffff, 33 | ffffffff,ffffffff,ffffffff,ffffffff, 34 | ffffffff,ffffffff,ffffffff,ffffffff, 35 | ffffffff,ffffffff,ffffffff,ffffffff, 36 | ffffffff,ffffffff,ffffffff,ffffffff, 37 | 38 | ffffffff,ffffffff,ffffffff,ffffffff, 39 | ffffffff,ffffffff,ffffffff,ffffffff, 40 | ffffffff,ffffffff,ffffffff,ffffffff, 41 | ffffffff,ffffffff,ffffffff,ffffffff, 42 | ffffffff,ffffffff,ffffffff,ffffffff, 43 | ffffffff,ffffffff,ffffffff,ffffffff, 44 | ffffffff,ffffffff,ffffffff,ffffffff, 45 | ffffffff,ffffffff,ffffffff,ffffffff, 46 | ffffffff,ffffffff,ffffffff,ffffffff, 47 | ffffffff,ffffffff,ffffffff,ffffffff, 48 | ffffffff,ffffffff,ffffffff,ffffffff, 49 | ffffffff,ffffffff,ffffffff,ffffffff, 50 | ffffffff,ffffffff,ffffffff,ffffffff, 51 | ffffffff,ffffffff,ffffffff,ffffffff, 52 | ffffffff,ffffffff,ffffffff,ffffffff, 53 | ffffffff,ffffffff,ffffffff,ffffffff, 54 | 55 | ffffffff,ffffffff,ffffffff,ffffffff, 56 | ffffffff,ffffffff,ffffffff,ffffffff, 57 | ffffffff,ffffffff,ffffffff,ffffffff, 58 | ffffffff,ffffffff,ffffffff,ffffffff, 59 | ffffffff,ffffffff,ffffffff,ffffffff, 60 | ffffffff,ffffffff,ffffffff,ffffffff, 61 | ffffffff,ffffffff,ffffffff,ffffffff, 62 | ffffffff,ffffffff,ffffffff,ffffffff, 63 | ffffffff,ffffffff,ffffffff,ffffffff, 64 | ffffffff,ffffffff,ffffffff,ffffffff, 65 | ffffffff,ffffffff,ffffffff,ffffffff, 66 | ffffffff,ffffffff,ffffffff,ffffffff, 67 | ffffffff,ffffffff,ffffffff,ffffffff, 68 | ffffffff,ffffffff,ffffffff,ffffffff, 69 | ffffffff,ffffffff,ffffffff,ffffffff, 70 | ffffffff,ffffffff,ffffffff,ffffffff, 71 | 72 | 73 | 74 | ffffffff,ffffffff,ffffffff,ffffffff, 75 | ffffffff,ffffffff,ffffffff,ffffffff, 76 | ffffffff,ffffffff,ffffffff,ffffffff, 77 | ffffffff,ffffffff,ffffffff,ffffffff, 78 | ffffffff,ffffffff,ffffffff,ffffffff, 79 | ffffffff,ffffffff,ffffffff,ffffffff, 80 | ffffffff,ffffffff,ffffffff,ffffffff, 81 | ffffffff,ffffffff,ffffffff,ffffffff, 82 | ffffffff,ffffffff,ffffffff,ffffffff, 83 | ffffffff,ffffffff,ffffffff,ffffffff, 84 | ffffffff,ffffffff,ffffffff,ffffffff, 85 | ffffffff,ffffffff,ffffffff,ffffffff, 86 | ffffffff,ffffffff,ffffffff,ffffffff, 87 | ffffffff,ffffffff,ffffffff,ffffffff, 88 | ffffffff,ffffffff,ffffffff,ffffffff, 89 | ffffffff,ffffffff,ffffffff,ffffffff, 90 | 91 | ffffffff,ffffffff,ffffffff,ffffffff, 92 | ffffffff,ffffffff,ffffffff,ffffffff, 93 | ffffffff,ffffffff,ffffffff,ffffffff, 94 | ffffffff,ffffffff,ffffffff,ffffffff, 95 | ffffffff,ffffffff,ffffffff,ffffffff, 96 | ffffffff,ffffffff,ffffffff,ffffffff, 97 | ffffffff,ffffffff,ffffffff,ffffffff, 98 | ffffffff,ffffffff,ffffffff,ffffffff, 99 | ffffffff,ffffffff,ffffffff,ffffffff, 100 | ffffffff,ffffffff,ffffffff,ffffffff, 101 | ffffffff,ffffffff,ffffffff,ffffffff, 102 | ffffffff,ffffffff,ffffffff,ffffffff, 103 | ffffffff,ffffffff,ffffffff,ffffffff, 104 | ffffffff,ffffffff,ffffffff,ffffffff, 105 | ffffffff,ffffffff,ffffffff,ffffffff, 106 | ffffffff,ffffffff,ffffffff,ffffffff, 107 | 108 | ffffffff,ffffffff,ffffffff,ffffffff, 109 | ffffffff,ffffffff,ffffffff,ffffffff, 110 | ffffffff,ffffffff,ffffffff,ffffffff, 111 | ffffffff,ffffffff,ffffffff,ffffffff, 112 | ffffffff,ffffffff,ffffffff,ffffffff, 113 | ffffffff,ffffffff,ffffffff,ffffffff, 114 | ffffffff,ffffffff,ffffffff,ffffffff, 115 | ffffffff,ffffffff,ffffffff,ffffffff, 116 | ffffffff,ffffffff,ffffffff,ffffffff, 117 | ffffffff,ffffffff,ffffffff,ffffffff, 118 | ffffffff,ffffffff,ffffffff,ffffffff, 119 | ffffffff,ffffffff,ffffffff,ffffffff, 120 | ffffffff,ffffffff,ffffffff,ffffffff, 121 | ffffffff,ffffffff,ffffffff,ffffffff, 122 | ffffffff,ffffffff,ffffffff,ffffffff, 123 | ffffffff,ffffffff,ffffffff,ffffffff, 124 | 125 | ffffffff,ffffffff,ffffffff,ffffffff, 126 | ffffffff,ffffffff,ffffffff,ffffffff, 127 | ffffffff,ffffffff,ffffffff,ffffffff, 128 | ffffffff,ffffffff,ffffffff,ffffffff, 129 | ffffffff,ffffffff,ffffffff,ffffffff, 130 | ffffffff,ffffffff,ffffffff,ffffffff, 131 | ffffffff,ffffffff,ffffffff,ffffffff, 132 | ffffffff,ffffffff,ffffffff,ffffffff, 133 | ffffffff,ffffffff,ffffffff,ffffffff, 134 | ffffffff,ffffffff,ffffffff,ffffffff, 135 | ffffffff,ffffffff,ffffffff,ffffffff, 136 | ffffffff,ffffffff,ffffffff,ffffffff, 137 | ffffffff,ffffffff,ffffffff,ffffffff, 138 | ffffffff,ffffffff,ffffffff,ffffffff, 139 | ffffffff,ffffffff,ffffffff,ffffffff, 140 | ffffffff,ffffffff,ffffffff,ffffffff, 141 | 142 | 143 | ffffffff,ffffffff,ffffffff,ffffffff, 144 | ffffffff,ffffffff,ffffffff,ffffffff, 145 | ffffffff,ffffffff,ffffffff,ffffffff, 146 | ffffffff,ffffffff,ffffffff,ffffffff, 147 | ffffffff,ffffffff,ffffffff,ffffffff, 148 | ffffffff,ffffffff,ffffffff,ffffffff, 149 | ffffffff,ffffffff,ffffffff,ffffffff, 150 | ffffffff,ffffffff,ffffffff,ffffffff, 151 | ffffffff,ffffffff,ffffffff,ffffffff, 152 | ffffffff,ffffffff,ffffffff,ffffffff, 153 | ffffffff,ffffffff,ffffffff,ffffffff, 154 | ffffffff,ffffffff,ffffffff,ffffffff, 155 | ffffffff,ffffffff,ffffffff,ffffffff, 156 | ffffffff,ffffffff,ffffffff,ffffffff, 157 | ffffffff,ffffffff,ffffffff,ffffffff, 158 | ffffffff,ffffffff,ffffffff,ffffffff, 159 | 160 | ffffffff,ffffffff,ffffffff,ffffffff, 161 | ffffffff,ffffffff,ffffffff,ffffffff, 162 | ffffffff,ffffffff,ffffffff,ffffffff, 163 | ffffffff,ffffffff,ffffffff,ffffffff, 164 | ffffffff,ffffffff,ffffffff,ffffffff, 165 | ffffffff,ffffffff,ffffffff,ffffffff, 166 | ffffffff,ffffffff,ffffffff,ffffffff, 167 | ffffffff,ffffffff,ffffffff,ffffffff, 168 | ffffffff,ffffffff,ffffffff,ffffffff, 169 | ffffffff,ffffffff,ffffffff,ffffffff, 170 | ffffffff,ffffffff,ffffffff,ffffffff, 171 | ffffffff,ffffffff,ffffffff,ffffffff, 172 | ffffffff,ffffffff,ffffffff,ffffffff, 173 | ffffffff,ffffffff,ffffffff,ffffffff, 174 | ffffffff,ffffffff,ffffffff,ffffffff, 175 | ffffffff,ffffffff,ffffffff,ffffffff, 176 | 177 | ffffffff,ffffffff,ffffffff,ffffffff, 178 | ffffffff,ffffffff,ffffffff,ffffffff, 179 | ffffffff,ffffffff,ffffffff,ffffffff, 180 | ffffffff,ffffffff,ffffffff,ffffffff, 181 | ffffffff,ffffffff,ffffffff,ffffffff, 182 | ffffffff,ffffffff,ffffffff,ffffffff, 183 | ffffffff,ffffffff,ffffffff,ffffffff, 184 | ffffffff,ffffffff,ffffffff,ffffffff, 185 | ffffffff,ffffffff,ffffffff,ffffffff, 186 | ffffffff,ffffffff,ffffffff,ffffffff, 187 | ffffffff,ffffffff,ffffffff,ffffffff, 188 | ffffffff,ffffffff,ffffffff,ffffffff, 189 | ffffffff,ffffffff,ffffffff,ffffffff, 190 | ffffffff,ffffffff,ffffffff,ffffffff, 191 | ffffffff,ffffffff,ffffffff,ffffffff, 192 | ffffffff,ffffffff,ffffffff,ffffffff, 193 | 194 | ffffffff,ffffffff,ffffffff,ffffffff, 195 | ffffffff,ffffffff,ffffffff,ffffffff, 196 | ffffffff,ffffffff,ffffffff,ffffffff, 197 | ffffffff,ffffffff,ffffffff,ffffffff, 198 | ffffffff,ffffffff,ffffffff,ffffffff, 199 | ffffffff,ffffffff,ffffffff,ffffffff, 200 | ffffffff,ffffffff,ffffffff,ffffffff, 201 | ffffffff,ffffffff,ffffffff,ffffffff, 202 | ffffffff,ffffffff,ffffffff,ffffffff, 203 | ffffffff,ffffffff,ffffffff,ffffffff, 204 | ffffffff,ffffffff,ffffffff,ffffffff, 205 | ffffffff,ffffffff,ffffffff,ffffffff, 206 | ffffffff,ffffffff,ffffffff,ffffffff, 207 | ffffffff,ffffffff,ffffffff,ffffffff, 208 | ffffffff,ffffffff,ffffffff,ffffffff, 209 | ffffffff,ffffffff,ffffffff,ffffffff, 210 | 211 | 212 | 213 | ffffffff,ffffffff,ffffffff,ffffffff, 214 | ffffffff,ffffffff,ffffffff,ffffffff, 215 | ffffffff,ffffffff,ffffffff,ffffffff, 216 | ffffffff,ffffffff,ffffffff,ffffffff, 217 | ffffffff,ffffffff,ffffffff,ffffffff, 218 | ffffffff,ffffffff,ffffffff,ffffffff, 219 | ffffffff,ffffffff,ffffffff,ffffffff, 220 | ffffffff,ffffffff,ffffffff,ffffffff, 221 | ffffffff,ffffffff,ffffffff,ffffffff, 222 | ffffffff,ffffffff,ffffffff,ffffffff, 223 | ffffffff,ffffffff,ffffffff,ffffffff, 224 | ffffffff,ffffffff,ffffffff,ffffffff, 225 | ffffffff,ffffffff,ffffffff,ffffffff, 226 | ffffffff,ffffffff,ffffffff,ffffffff, 227 | ffffffff,ffffffff,ffffffff,ffffffff, 228 | ffffffff,ffffffff,ffffffff,ffffffff, 229 | 230 | ffffffff,ffffffff,ffffffff,ffffffff, 231 | ffffffff,ffffffff,ffffffff,ffffffff, 232 | ffffffff,ffffffff,ffffffff,ffffffff, 233 | ffffffff,ffffffff,ffffffff,ffffffff, 234 | ffffffff,ffffffff,ffffffff,ffffffff, 235 | ffffffff,ffffffff,ffffffff,ffffffff, 236 | ffffffff,ffffffff,ffffffff,ffffffff, 237 | ffffffff,ffffffff,ffffffff,ffffffff, 238 | ffffffff,ffffffff,ffffffff,ffffffff, 239 | ffffffff,ffffffff,ffffffff,ffffffff, 240 | ffffffff,ffffffff,ffffffff,ffffffff, 241 | ffffffff,ffffffff,ffffffff,ffffffff, 242 | ffffffff,ffffffff,ffffffff,ffffffff, 243 | ffffffff,ffffffff,ffffffff,ffffffff, 244 | ffffffff,ffffffff,ffffffff,ffffffff, 245 | ffffffff,ffffffff,ffffffff,ffffffff, 246 | 247 | ffffffff,ffffffff,ffffffff,ffffffff, 248 | ffffffff,ffffffff,ffffffff,ffffffff, 249 | ffffffff,ffffffff,ffffffff,ffffffff, 250 | ffffffff,ffffffff,ffffffff,ffffffff, 251 | ffffffff,ffffffff,ffffffff,ffffffff, 252 | ffffffff,ffffffff,ffffffff,ffffffff, 253 | ffffffff,ffffffff,ffffffff,ffffffff, 254 | ffffffff,ffffffff,ffffffff,ffffffff, 255 | ffffffff,ffffffff,ffffffff,ffffffff, 256 | ffffffff,ffffffff,ffffffff,ffffffff, 257 | ffffffff,ffffffff,ffffffff,ffffffff, 258 | ffffffff,ffffffff,ffffffff,ffffffff, 259 | ffffffff,ffffffff,ffffffff,ffffffff, 260 | ffffffff,ffffffff,ffffffff,ffffffff, 261 | ffffffff,ffffffff,ffffffff,ffffffff, 262 | ffffffff,ffffffff,ffffffff,ffffffff, 263 | 264 | ffffffff,ffffffff,ffffffff,ffffffff, 265 | ffffffff,ffffffff,ffffffff,ffffffff, 266 | ffffffff,ffffffff,ffffffff,ffffffff, 267 | ffffffff,ffffffff,ffffffff,ffffffff, 268 | ffffffff,ffffffff,ffffffff,ffffffff, 269 | ffffffff,ffffffff,ffffffff,ffffffff, 270 | ffffffff,ffffffff,ffffffff,ffffffff, 271 | ffffffff,ffffffff,ffffffff,ffffffff, 272 | ffffffff,ffffffff,ffffffff,ffffffff, 273 | ffffffff,ffffffff,ffffffff,ffffffff, 274 | ffffffff,ffffffff,ffffffff,ffffffff, 275 | ffffffff,ffffffff,ffffffff,ffffffff, 276 | ffffffff,ffffffff,ffffffff,ffffffff, 277 | ffffffff,ffffffff,ffffffff,ffffffff, 278 | ffffffff,ffffffff,ffffffff,ffffffff, 279 | ffffffff,ffffffff,ffffffff,ffffffff 280 | ; 281 | -------------------------------------------------------------------------------- /ip/bram_bar_zero4k.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "bram_bar_zero4k", 5 | "component_reference": "xilinx.com:ip:blk_mem_gen:8.4", 6 | "ip_revision": "7", 7 | "gen_directory": "../../../../pcileech_enigma_x1.gen/sources_1/ip/bram_bar_zero4k", 8 | "parameters": { 9 | "component_parameters": { 10 | "Component_Name": [ { "value": "bram_bar_zero4k", "resolve_type": "user", "usage": "all" } ], 11 | "Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ], 12 | "AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ], 13 | "AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ], 14 | "Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 15 | "AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 16 | "Memory_Type": [ { "value": "Simple_Dual_Port_RAM", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 17 | "PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "usage": "all" } ], 18 | "Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 19 | "ecctype": [ { "value": "No_ECC", "resolve_type": "user", "usage": "all" } ], 20 | "ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 21 | "softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 24 | "EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 25 | "EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 26 | "RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 27 | "RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 28 | "Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 29 | "Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ], 30 | "Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 32 | "Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ], 33 | "Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ], 34 | "Assume_Synchronous_Clk": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 36 | "Write_Depth_A": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 37 | "Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 38 | "Operating_Mode_A": [ { "value": "NO_CHANGE", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 39 | "Enable_A": [ { "value": "Use_ENA_Pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 40 | "Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 41 | "Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 42 | "Operating_Mode_B": [ { "value": "READ_FIRST", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 43 | "Enable_B": [ { "value": "Use_ENB_Pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 44 | "Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 45 | "Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 46 | "Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 47 | "Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 48 | "Register_PortB_Output_of_Memory_Core": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 49 | "Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 50 | "register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 51 | "register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 52 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 53 | "Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 54 | "Coe_File": [ { "value": "pcileech_bar_zero4k.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 55 | "Fill_Remaining_Memory_Locations": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 56 | "Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 57 | "Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 58 | "Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 59 | "Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 60 | "Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 61 | "Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 62 | "Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 63 | "Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 64 | "Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 65 | "Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ], 66 | "Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 67 | "Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 68 | "Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ], 69 | "Port_B_Clock": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 70 | "Port_B_Write_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 71 | "Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 72 | "Port_B_Enable_Rate": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 73 | "Collision_Warnings": [ { "value": "ALL", "resolve_type": "user", "usage": "all" } ], 74 | "Disable_Collision_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 75 | "Disable_Out_of_Range_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 76 | "use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ], 77 | "MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ], 78 | "CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ], 79 | "EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 80 | "READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 81 | "READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ] 82 | }, 83 | "model_parameters": { 84 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 85 | "C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 86 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 87 | "C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 88 | "C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 89 | "C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 90 | "C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 91 | "C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 92 | "C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ], 93 | "C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 94 | "C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 95 | "C_MEM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 96 | "C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 97 | "C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 98 | "C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 99 | "C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 100 | "C_INIT_FILE_NAME": [ { "value": "bram_bar_zero4k.mif", "resolve_type": "generated", "usage": "all" } ], 101 | "C_INIT_FILE": [ { "value": "bram_bar_zero4k.mem", "resolve_type": "generated", "usage": "all" } ], 102 | "C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 103 | "C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 104 | "C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 105 | "C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 106 | "C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 107 | "C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 108 | "C_HAS_ENA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 109 | "C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 110 | "C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 111 | "C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 112 | "C_WRITE_MODE_A": [ { "value": "NO_CHANGE", "resolve_type": "generated", "usage": "all" } ], 113 | "C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 114 | "C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 115 | "C_WRITE_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 116 | "C_READ_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 117 | "C_ADDRA_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 118 | "C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 119 | "C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 120 | "C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 121 | "C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 122 | "C_HAS_ENB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 123 | "C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 124 | "C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 125 | "C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 126 | "C_WRITE_MODE_B": [ { "value": "READ_FIRST", "resolve_type": "generated", "usage": "all" } ], 127 | "C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 128 | "C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 129 | "C_WRITE_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 130 | "C_READ_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 131 | "C_ADDRB_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 132 | "C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 133 | "C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 134 | "C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 135 | "C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 136 | "C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 137 | "C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 138 | "C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 139 | "C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 140 | "C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 141 | "C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 142 | "C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 143 | "C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 144 | "C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 145 | "C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ], 146 | "C_COMMON_CLK": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 147 | "C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 148 | "C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 149 | "C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 150 | "C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 151 | "C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 152 | "C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 153 | "C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 154 | "C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 155 | "C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 156 | "C_COUNT_36K_BRAM": [ { "value": "1", "resolve_type": "generated", "usage": "all" } ], 157 | "C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 158 | "C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 5.466975 mW", "resolve_type": "generated", "usage": "all" } ] 159 | }, 160 | "project_parameters": { 161 | "ARCHITECTURE": [ { "value": "artix7" } ], 162 | "BASE_BOARD_PART": [ { "value": "" } ], 163 | "BOARD_CONNECTIONS": [ { "value": "" } ], 164 | "DEVICE": [ { "value": "xc7a75t" } ], 165 | "PACKAGE": [ { "value": "fgg484" } ], 166 | "PREFHDL": [ { "value": "VERILOG" } ], 167 | "SILICON_REVISION": [ { "value": "" } ], 168 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 169 | "SPEEDGRADE": [ { "value": "-2" } ], 170 | "STATIC_POWER": [ { "value": "" } ], 171 | "TEMPERATURE_GRADE": [ { "value": "" } ] 172 | }, 173 | "runtime_parameters": { 174 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 175 | "IPREVISION": [ { "value": "7" } ], 176 | "MANAGED": [ { "value": "TRUE" } ], 177 | "OUTPUTDIR": [ { "value": "../../../../pcileech_enigma_x1.gen/sources_1/ip/bram_bar_zero4k" } ], 178 | "SELECTEDSIMMODEL": [ { "value": "" } ], 179 | "SHAREDDIR": [ { "value": "." } ], 180 | "SWVERSION": [ { "value": "2023.2" } ], 181 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 182 | } 183 | }, 184 | "boundary": { 185 | "ports": { 186 | "clka": [ { "direction": "in", "driver_value": "0" } ], 187 | "ena": [ { "direction": "in", "driver_value": "0" } ], 188 | "wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 189 | "addra": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 190 | "dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ], 191 | "clkb": [ { "direction": "in", "driver_value": "0" } ], 192 | "enb": [ { "direction": "in", "driver_value": "0" } ], 193 | "addrb": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 194 | "doutb": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 195 | }, 196 | "interfaces": { 197 | "CLK.ACLK": { 198 | "vlnv": "xilinx.com:signal:clock:1.0", 199 | "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", 200 | "mode": "slave", 201 | "parameters": { 202 | "ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ], 203 | "ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ], 204 | "FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 205 | "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 206 | "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], 207 | "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 208 | "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 209 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 210 | } 211 | }, 212 | "RST.ARESETN": { 213 | "vlnv": "xilinx.com:signal:reset:1.0", 214 | "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", 215 | "mode": "slave", 216 | "parameters": { 217 | "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ], 218 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 219 | } 220 | }, 221 | "BRAM_PORTA": { 222 | "vlnv": "xilinx.com:interface:bram:1.0", 223 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 224 | "mode": "slave", 225 | "parameters": { 226 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 227 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 228 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 229 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 230 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 231 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 232 | }, 233 | "port_maps": { 234 | "ADDR": [ { "physical_name": "addra" } ], 235 | "CLK": [ { "physical_name": "clka" } ], 236 | "DIN": [ { "physical_name": "dina" } ], 237 | "EN": [ { "physical_name": "ena" } ], 238 | "WE": [ { "physical_name": "wea" } ] 239 | } 240 | }, 241 | "BRAM_PORTB": { 242 | "vlnv": "xilinx.com:interface:bram:1.0", 243 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 244 | "mode": "slave", 245 | "parameters": { 246 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 247 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 248 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 249 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 250 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 251 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 252 | }, 253 | "port_maps": { 254 | "ADDR": [ { "physical_name": "addrb" } ], 255 | "CLK": [ { "physical_name": "clkb" } ], 256 | "DOUT": [ { "physical_name": "doutb" } ], 257 | "EN": [ { "physical_name": "enb" } ] 258 | } 259 | } 260 | }, 261 | "memory_maps": { 262 | "S_1": { 263 | "address_blocks": { 264 | "Mem0": { 265 | "base_address": "0", 266 | "range": "4096", 267 | "usage": "memory", 268 | "access": "read-write", 269 | "parameters": { 270 | "OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ], 271 | "OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ] 272 | } 273 | } 274 | } 275 | } 276 | } 277 | } 278 | } 279 | } -------------------------------------------------------------------------------- /ip/bram_pcie_cfgspace.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "bram_pcie_cfgspace", 5 | "component_reference": "xilinx.com:ip:blk_mem_gen:8.4", 6 | "ip_revision": "7", 7 | "gen_directory": "../../../../pcileech_squirrel.gen/sources_1/ip/bram_pcie_cfgspace", 8 | "parameters": { 9 | "component_parameters": { 10 | "Component_Name": [ { "value": "bram_pcie_cfgspace", "resolve_type": "user", "usage": "all" } ], 11 | "Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ], 12 | "AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ], 13 | "AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ], 14 | "Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 15 | "AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 16 | "Memory_Type": [ { "value": "Simple_Dual_Port_RAM", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 17 | "PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "usage": "all" } ], 18 | "Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 19 | "ecctype": [ { "value": "No_ECC", "resolve_type": "user", "usage": "all" } ], 20 | "ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 21 | "softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 24 | "EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 25 | "EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 26 | "RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 27 | "RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 28 | "Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 29 | "Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ], 30 | "Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 32 | "Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ], 33 | "Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ], 34 | "Assume_Synchronous_Clk": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 36 | "Write_Depth_A": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 37 | "Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 38 | "Operating_Mode_A": [ { "value": "WRITE_FIRST", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 39 | "Enable_A": [ { "value": "Always_Enabled", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 40 | "Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 41 | "Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 42 | "Operating_Mode_B": [ { "value": "READ_FIRST", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 43 | "Enable_B": [ { "value": "Always_Enabled", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 44 | "Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 45 | "Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 46 | "Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 47 | "Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 48 | "Register_PortB_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 49 | "Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 50 | "register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 51 | "register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 52 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 53 | "Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 54 | "Coe_File": [ { "value": "pcileech_cfgspace.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 55 | "Fill_Remaining_Memory_Locations": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 56 | "Remaining_Memory_Locations": [ { "value": "0", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ], 57 | "Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 58 | "Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 59 | "Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 60 | "Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 61 | "Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 62 | "Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 63 | "Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ], 64 | "Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 65 | "Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ], 66 | "Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 67 | "Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 68 | "Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ], 69 | "Port_B_Clock": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 70 | "Port_B_Write_Rate": [ { "value": "0", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 71 | "Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ], 72 | "Port_B_Enable_Rate": [ { "value": "100", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 73 | "Collision_Warnings": [ { "value": "ALL", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 74 | "Disable_Collision_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 75 | "Disable_Out_of_Range_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 76 | "use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ], 77 | "MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ], 78 | "CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ], 79 | "EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 80 | "READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 81 | "READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ] 82 | }, 83 | "model_parameters": { 84 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 85 | "C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 86 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 87 | "C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 88 | "C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 89 | "C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 90 | "C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 91 | "C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 92 | "C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ], 93 | "C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 94 | "C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 95 | "C_MEM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 96 | "C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 97 | "C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 98 | "C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 99 | "C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 100 | "C_INIT_FILE_NAME": [ { "value": "bram_pcie_cfgspace.mif", "resolve_type": "generated", "usage": "all" } ], 101 | "C_INIT_FILE": [ { "value": "bram_pcie_cfgspace.mem", "resolve_type": "generated", "usage": "all" } ], 102 | "C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 103 | "C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 104 | "C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 105 | "C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 106 | "C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 107 | "C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 108 | "C_HAS_ENA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 109 | "C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 110 | "C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 111 | "C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 112 | "C_WRITE_MODE_A": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ], 113 | "C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 114 | "C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 115 | "C_WRITE_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 116 | "C_READ_DEPTH_A": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 117 | "C_ADDRA_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 118 | "C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 119 | "C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ], 120 | "C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 121 | "C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 122 | "C_HAS_ENB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 123 | "C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 124 | "C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 125 | "C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 126 | "C_WRITE_MODE_B": [ { "value": "READ_FIRST", "resolve_type": "generated", "usage": "all" } ], 127 | "C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 128 | "C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 129 | "C_WRITE_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 130 | "C_READ_DEPTH_B": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 131 | "C_ADDRB_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 132 | "C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 133 | "C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 134 | "C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 135 | "C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 136 | "C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 137 | "C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 138 | "C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 139 | "C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 140 | "C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 141 | "C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 142 | "C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 143 | "C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 144 | "C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 145 | "C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ], 146 | "C_COMMON_CLK": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 147 | "C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 148 | "C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 149 | "C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 150 | "C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 151 | "C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 152 | "C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 153 | "C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 154 | "C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 155 | "C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 156 | "C_COUNT_36K_BRAM": [ { "value": "1", "resolve_type": "generated", "usage": "all" } ], 157 | "C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 158 | "C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 5.7864 mW", "resolve_type": "generated", "usage": "all" } ] 159 | }, 160 | "project_parameters": { 161 | "ARCHITECTURE": [ { "value": "artix7" } ], 162 | "BASE_BOARD_PART": [ { "value": "" } ], 163 | "BOARD_CONNECTIONS": [ { "value": "" } ], 164 | "DEVICE": [ { "value": "xc7a35t" } ], 165 | "PACKAGE": [ { "value": "fgg484" } ], 166 | "PREFHDL": [ { "value": "VERILOG" } ], 167 | "SILICON_REVISION": [ { "value": "" } ], 168 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 169 | "SPEEDGRADE": [ { "value": "-2" } ], 170 | "STATIC_POWER": [ { "value": "" } ], 171 | "TEMPERATURE_GRADE": [ { "value": "" } ], 172 | "USE_RDI_CUSTOMIZATION": [ { "value": "TRUE" } ], 173 | "USE_RDI_GENERATION": [ { "value": "TRUE" } ] 174 | }, 175 | "runtime_parameters": { 176 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 177 | "IPREVISION": [ { "value": "7" } ], 178 | "MANAGED": [ { "value": "TRUE" } ], 179 | "OUTPUTDIR": [ { "value": "../../../../pcileech_squirrel.gen/sources_1/ip/bram_pcie_cfgspace" } ], 180 | "SELECTEDSIMMODEL": [ { "value": "" } ], 181 | "SHAREDDIR": [ { "value": "." } ], 182 | "SWVERSION": [ { "value": "2023.2" } ], 183 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 184 | } 185 | }, 186 | "boundary": { 187 | "ports": { 188 | "clka": [ { "direction": "in", "driver_value": "0" } ], 189 | "wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 190 | "addra": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 191 | "dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ], 192 | "clkb": [ { "direction": "in", "driver_value": "0" } ], 193 | "addrb": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 194 | "doutb": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 195 | }, 196 | "interfaces": { 197 | "CLK.ACLK": { 198 | "vlnv": "xilinx.com:signal:clock:1.0", 199 | "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", 200 | "mode": "slave", 201 | "parameters": { 202 | "ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ], 203 | "ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ], 204 | "FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 205 | "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 206 | "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], 207 | "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 208 | "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 209 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 210 | } 211 | }, 212 | "RST.ARESETN": { 213 | "vlnv": "xilinx.com:signal:reset:1.0", 214 | "abstraction_type": "xilinx.com:signal:reset_rtl:1.0", 215 | "mode": "slave", 216 | "parameters": { 217 | "POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ], 218 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 219 | } 220 | }, 221 | "BRAM_PORTA": { 222 | "vlnv": "xilinx.com:interface:bram:1.0", 223 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 224 | "mode": "slave", 225 | "parameters": { 226 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 227 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 228 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 229 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 230 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 231 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 232 | }, 233 | "port_maps": { 234 | "ADDR": [ { "physical_name": "addra" } ], 235 | "CLK": [ { "physical_name": "clka" } ], 236 | "DIN": [ { "physical_name": "dina" } ], 237 | "WE": [ { "physical_name": "wea" } ] 238 | } 239 | }, 240 | "BRAM_PORTB": { 241 | "vlnv": "xilinx.com:interface:bram:1.0", 242 | "abstraction_type": "xilinx.com:interface:bram_rtl:1.0", 243 | "mode": "slave", 244 | "parameters": { 245 | "MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 246 | "MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 247 | "MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 248 | "MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 249 | "READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 250 | "READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ] 251 | }, 252 | "port_maps": { 253 | "ADDR": [ { "physical_name": "addrb" } ], 254 | "CLK": [ { "physical_name": "clkb" } ], 255 | "DOUT": [ { "physical_name": "doutb" } ] 256 | } 257 | } 258 | }, 259 | "memory_maps": { 260 | "S_1": { 261 | "address_blocks": { 262 | "Mem0": { 263 | "base_address": "0", 264 | "range": "4096", 265 | "usage": "memory", 266 | "access": "read-write", 267 | "parameters": { 268 | "OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ], 269 | "OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ] 270 | } 271 | } 272 | } 273 | } 274 | } 275 | } 276 | } 277 | } -------------------------------------------------------------------------------- /ip/drom_pcie_cfgspace_writemask.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "drom_pcie_cfgspace_writemask", 5 | "component_reference": "xilinx.com:ip:dist_mem_gen:8.0", 6 | "ip_revision": "14", 7 | "gen_directory": "../../../../pcileech_enigma_x1.gen/sources_1/ip/drom_pcie_cfgspace_writemask", 8 | "parameters": { 9 | "component_parameters": { 10 | "depth": [ { "value": "1024", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 11 | "data_width": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 12 | "Component_Name": [ { "value": "drom_pcie_cfgspace_writemask", "resolve_type": "user", "usage": "all" } ], 13 | "memory_type": [ { "value": "rom", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 14 | "input_options": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 15 | "input_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 16 | "qualify_we_with_i_ce": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 17 | "dual_port_address": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 18 | "simple_dual_port_address": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 19 | "output_options": [ { "value": "non_registered", "resolve_type": "user", "usage": "all" } ], 20 | "Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "usage": "all" } ], 21 | "common_output_clk": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "single_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "common_output_ce": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 24 | "dual_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 25 | "simple_dual_port_output_clock_enable": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 26 | "coefficient_file": [ { "value": "pcileech_cfgspace_writemask.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 27 | "default_data_radix": [ { "value": "16", "resolve_type": "user", "usage": "all" } ], 28 | "default_data": [ { "value": "00000000", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 29 | "reset_qspo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 30 | "reset_qdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "reset_qsdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 32 | "sync_reset_qspo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 33 | "sync_reset_qdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 34 | "sync_reset_qsdpo": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "ce_overrides": [ { "value": "ce_overrides_sync_controls", "resolve_type": "user", "usage": "all" } ] 36 | }, 37 | "model_parameters": { 38 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 39 | "C_ADDR_WIDTH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 40 | "C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 41 | "C_DEPTH": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 42 | "C_HAS_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 43 | "C_HAS_D": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 44 | "C_HAS_DPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 45 | "C_HAS_DPRA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 46 | "C_HAS_I_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 47 | "C_HAS_QDPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 48 | "C_HAS_QDPO_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 49 | "C_HAS_QDPO_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 50 | "C_HAS_QDPO_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 51 | "C_HAS_QDPO_SRST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 52 | "C_HAS_QSPO": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 53 | "C_HAS_QSPO_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 54 | "C_HAS_QSPO_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 55 | "C_HAS_QSPO_SRST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 56 | "C_HAS_SPO": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 57 | "C_HAS_WE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 58 | "C_MEM_INIT_FILE": [ { "value": "drom_pcie_cfgspace_writemask.mif", "resolve_type": "generated", "usage": "all" } ], 59 | "C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ], 60 | "C_MEM_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 61 | "C_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 62 | "C_QCE_JOINED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 63 | "C_QUALIFY_WE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 64 | "C_READ_MIF": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 65 | "C_REG_A_D_INPUTS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 66 | "C_REG_DPRA_INPUT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 67 | "C_SYNC_ENABLE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 68 | "C_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 69 | "C_PARSER_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ] 70 | }, 71 | "project_parameters": { 72 | "ARCHITECTURE": [ { "value": "artix7" } ], 73 | "BASE_BOARD_PART": [ { "value": "" } ], 74 | "BOARD_CONNECTIONS": [ { "value": "" } ], 75 | "DEVICE": [ { "value": "xc7a75t" } ], 76 | "PACKAGE": [ { "value": "fgg484" } ], 77 | "PREFHDL": [ { "value": "VERILOG" } ], 78 | "SILICON_REVISION": [ { "value": "" } ], 79 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 80 | "SPEEDGRADE": [ { "value": "-2" } ], 81 | "STATIC_POWER": [ { "value": "" } ], 82 | "TEMPERATURE_GRADE": [ { "value": "" } ] 83 | }, 84 | "runtime_parameters": { 85 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 86 | "IPREVISION": [ { "value": "14" } ], 87 | "MANAGED": [ { "value": "TRUE" } ], 88 | "OUTPUTDIR": [ { "value": "../../../../pcileech_enigma_x1.gen/sources_1/ip/drom_pcie_cfgspace_writemask" } ], 89 | "SELECTEDSIMMODEL": [ { "value": "" } ], 90 | "SHAREDDIR": [ { "value": "." } ], 91 | "SWVERSION": [ { "value": "2023.2" } ], 92 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 93 | } 94 | }, 95 | "boundary": { 96 | "ports": { 97 | "a": [ { "direction": "in", "size_left": "9", "size_right": "0", "driver_value": "0" } ], 98 | "spo": [ { "direction": "out", "size_left": "31", "size_right": "0" } ] 99 | } 100 | } 101 | } 102 | } -------------------------------------------------------------------------------- /ip/fifo_4_4_clk1_bar_rd1.xci: -------------------------------------------------------------------------------- 1 | { 2 | "schema": "xilinx.com:schema:json_instance:1.0", 3 | "ip_inst": { 4 | "xci_name": "fifo_4_4_clk1_bar_rd1", 5 | "component_reference": "xilinx.com:ip:fifo_generator:13.2", 6 | "ip_revision": "9", 7 | "gen_directory": "../../../../pcileech_enigma_x1.gen/sources_1/ip/fifo_4_4_clk1_bar_rd1", 8 | "parameters": { 9 | "component_parameters": { 10 | "Component_Name": [ { "value": "fifo_4_4_clk1_bar_rd1", "resolve_type": "user", "usage": "all" } ], 11 | "Fifo_Implementation": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 12 | "synchronization_stages": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], 13 | "synchronization_stages_axi": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], 14 | "INTERFACE_TYPE": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ], 15 | "Performance_Options": [ { "value": "Standard_FIFO", "resolve_type": "user", "usage": "all" } ], 16 | "asymmetric_port_width": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 17 | "Input_Data_Width": [ { "value": "4", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], 18 | "Input_Depth": [ { "value": "512", "value_src": "user", "resolve_type": "user", "usage": "all" } ], 19 | "Output_Data_Width": [ { "value": "4", "resolve_type": "user", "usage": "all" } ], 20 | "Output_Depth": [ { "value": "512", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 21 | "Enable_ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 22 | "Use_Embedded_Registers": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 23 | "Reset_Pin": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], 24 | "Enable_Reset_Synchronization": [ { "value": "true", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 25 | "Reset_Type": [ { "value": "Synchronous_Reset", "resolve_type": "user", "usage": "all" } ], 26 | "Full_Flags_Reset_Value": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ], 27 | "Use_Dout_Reset": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ], 28 | "Dout_Reset_Value": [ { "value": "0", "resolve_type": "user", "usage": "all" } ], 29 | "dynamic_power_saving": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 30 | "Almost_Full_Flag": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 31 | "Almost_Empty_Flag": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 32 | "Valid_Flag": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ], 33 | "Valid_Sense": [ { "value": "Active_High", "resolve_type": "user", "usage": "all" } ], 34 | "Underflow_Flag": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 35 | "Underflow_Sense": [ { "value": "Active_High", "resolve_type": "user", "enabled": false, "usage": "all" } ], 36 | "Write_Acknowledge_Flag": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 37 | "Write_Acknowledge_Sense": [ { "value": "Active_High", "resolve_type": "user", "enabled": false, "usage": "all" } ], 38 | "Overflow_Flag": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 39 | "Overflow_Sense": [ { "value": "Active_High", "resolve_type": "user", "enabled": false, "usage": "all" } ], 40 | "Inject_Sbit_Error": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 41 | "Inject_Dbit_Error": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 42 | "ecc_pipeline_reg": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 43 | "Use_Extra_Logic": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 44 | "Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 45 | "Data_Count_Width": [ { "value": "9", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 46 | "Write_Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 47 | "Write_Data_Count_Width": [ { "value": "9", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 48 | "Read_Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 49 | "Read_Data_Count_Width": [ { "value": "9", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 50 | "Disable_Timing_Violations": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 51 | "Read_Clock_Frequency": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 52 | "Write_Clock_Frequency": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 53 | "Programmable_Full_Type": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "usage": "all" } ], 54 | "Full_Threshold_Assert_Value": [ { "value": "510", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 55 | "Full_Threshold_Negate_Value": [ { "value": "509", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 56 | "Programmable_Empty_Type": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "usage": "all" } ], 57 | "Empty_Threshold_Assert_Value": [ { "value": "2", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 58 | "Empty_Threshold_Negate_Value": [ { "value": "3", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 59 | "PROTOCOL": [ { "value": "AXI4", "resolve_type": "user", "enabled": false, "usage": "all" } ], 60 | "Clock_Type_AXI": [ { "value": "Common_Clock", "resolve_type": "user", "usage": "all" } ], 61 | "HAS_ACLKEN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 62 | "Clock_Enable_Type": [ { "value": "Slave_Interface_Clock_Enable", "resolve_type": "user", "enabled": false, "usage": "all" } ], 63 | "READ_WRITE_MODE": [ { "value": "READ_WRITE", "resolve_type": "user", "usage": "all" } ], 64 | "ID_WIDTH": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 65 | "ADDRESS_WIDTH": [ { "value": "32", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 66 | "DATA_WIDTH": [ { "value": "64", "resolve_type": "user", "enabled": false, "usage": "all" } ], 67 | "AWUSER_Width": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 68 | "WUSER_Width": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 69 | "BUSER_Width": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 70 | "ARUSER_Width": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 71 | "RUSER_Width": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 72 | "TDATA_NUM_BYTES": [ { "value": "1", "resolve_type": "user", "usage": "all" } ], 73 | "TID_WIDTH": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 74 | "TDEST_WIDTH": [ { "value": "0", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 75 | "TUSER_WIDTH": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 76 | "Enable_TREADY": [ { "value": "true", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 77 | "Enable_TLAST": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 78 | "HAS_TSTRB": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 79 | "TSTRB_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 80 | "HAS_TKEEP": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 81 | "TKEEP_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 82 | "wach_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 83 | "FIFO_Implementation_wach": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 84 | "FIFO_Application_Type_wach": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 85 | "Enable_ECC_wach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 86 | "Inject_Sbit_Error_wach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 87 | "Inject_Dbit_Error_wach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 88 | "Input_Depth_wach": [ { "value": "16", "resolve_type": "user", "usage": "all" } ], 89 | "Enable_Data_Counts_wach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 90 | "Programmable_Full_Type_wach": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 91 | "Full_Threshold_Assert_Value_wach": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 92 | "Programmable_Empty_Type_wach": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 93 | "Empty_Threshold_Assert_Value_wach": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 94 | "wdch_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 95 | "FIFO_Implementation_wdch": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 96 | "FIFO_Application_Type_wdch": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 97 | "Enable_ECC_wdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 98 | "Inject_Sbit_Error_wdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 99 | "Inject_Dbit_Error_wdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 100 | "Input_Depth_wdch": [ { "value": "1024", "resolve_type": "user", "usage": "all" } ], 101 | "Enable_Data_Counts_wdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 102 | "Programmable_Full_Type_wdch": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 103 | "Full_Threshold_Assert_Value_wdch": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 104 | "Programmable_Empty_Type_wdch": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 105 | "Empty_Threshold_Assert_Value_wdch": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 106 | "wrch_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 107 | "FIFO_Implementation_wrch": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 108 | "FIFO_Application_Type_wrch": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 109 | "Enable_ECC_wrch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 110 | "Inject_Sbit_Error_wrch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 111 | "Inject_Dbit_Error_wrch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 112 | "Input_Depth_wrch": [ { "value": "16", "resolve_type": "user", "usage": "all" } ], 113 | "Enable_Data_Counts_wrch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 114 | "Programmable_Full_Type_wrch": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 115 | "Full_Threshold_Assert_Value_wrch": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 116 | "Programmable_Empty_Type_wrch": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 117 | "Empty_Threshold_Assert_Value_wrch": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 118 | "rach_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 119 | "FIFO_Implementation_rach": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 120 | "FIFO_Application_Type_rach": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 121 | "Enable_ECC_rach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 122 | "Inject_Sbit_Error_rach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 123 | "Inject_Dbit_Error_rach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 124 | "Input_Depth_rach": [ { "value": "16", "resolve_type": "user", "usage": "all" } ], 125 | "Enable_Data_Counts_rach": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 126 | "Programmable_Full_Type_rach": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 127 | "Full_Threshold_Assert_Value_rach": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 128 | "Programmable_Empty_Type_rach": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 129 | "Empty_Threshold_Assert_Value_rach": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 130 | "rdch_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 131 | "FIFO_Implementation_rdch": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 132 | "FIFO_Application_Type_rdch": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 133 | "Enable_ECC_rdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 134 | "Inject_Sbit_Error_rdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 135 | "Inject_Dbit_Error_rdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 136 | "Input_Depth_rdch": [ { "value": "1024", "resolve_type": "user", "usage": "all" } ], 137 | "Enable_Data_Counts_rdch": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 138 | "Programmable_Full_Type_rdch": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 139 | "Full_Threshold_Assert_Value_rdch": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 140 | "Programmable_Empty_Type_rdch": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 141 | "Empty_Threshold_Assert_Value_rdch": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 142 | "axis_type": [ { "value": "FIFO", "resolve_type": "user", "usage": "all" } ], 143 | "FIFO_Implementation_axis": [ { "value": "Common_Clock_Block_RAM", "resolve_type": "user", "usage": "all" } ], 144 | "FIFO_Application_Type_axis": [ { "value": "Data_FIFO", "resolve_type": "user", "enabled": false, "usage": "all" } ], 145 | "Enable_ECC_axis": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 146 | "Inject_Sbit_Error_axis": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 147 | "Inject_Dbit_Error_axis": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 148 | "Input_Depth_axis": [ { "value": "1024", "resolve_type": "user", "usage": "all" } ], 149 | "Enable_Data_Counts_axis": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 150 | "Programmable_Full_Type_axis": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 151 | "Full_Threshold_Assert_Value_axis": [ { "value": "1023", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 152 | "Programmable_Empty_Type_axis": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "enabled": false, "usage": "all" } ], 153 | "Empty_Threshold_Assert_Value_axis": [ { "value": "1022", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ], 154 | "Register_Slice_Mode_wach": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 155 | "Register_Slice_Mode_wdch": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 156 | "Register_Slice_Mode_wrch": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 157 | "Register_Slice_Mode_rach": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 158 | "Register_Slice_Mode_rdch": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 159 | "Register_Slice_Mode_axis": [ { "value": "Fully_Registered", "resolve_type": "user", "usage": "all" } ], 160 | "Underflow_Flag_AXI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 161 | "Underflow_Sense_AXI": [ { "value": "Active_High", "resolve_type": "user", "usage": "all" } ], 162 | "Overflow_Flag_AXI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 163 | "Overflow_Sense_AXI": [ { "value": "Active_High", "resolve_type": "user", "usage": "all" } ], 164 | "Disable_Timing_Violations_AXI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 165 | "Add_NGC_Constraint_AXI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 166 | "Enable_Common_Underflow": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 167 | "Enable_Common_Overflow": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 168 | "enable_read_pointer_increment_by2": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ], 169 | "Use_Embedded_Registers_axis": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 170 | "enable_low_latency": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 171 | "use_dout_register": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 172 | "Master_interface_Clock_enable_memory_mapped": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 173 | "Slave_interface_Clock_enable_memory_mapped": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 174 | "Output_Register_Type": [ { "value": "Embedded_Reg", "resolve_type": "user", "enabled": false, "usage": "all" } ], 175 | "Enable_Safety_Circuit": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ], 176 | "Enable_ECC_Type": [ { "value": "Hard_ECC", "resolve_type": "user", "enabled": false, "usage": "all" } ], 177 | "C_SELECT_XPM": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ] 178 | }, 179 | "model_parameters": { 180 | "C_COMMON_CLOCK": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 181 | "C_SELECT_XPM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 182 | "C_COUNT_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 183 | "C_DATA_COUNT_WIDTH": [ { "value": "9", "resolve_type": "generated", "format": "long", "usage": "all" } ], 184 | "C_DEFAULT_VALUE": [ { "value": "BlankString", "resolve_type": "generated", "usage": "all" } ], 185 | "C_DIN_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 186 | "C_DOUT_RST_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ], 187 | "C_DOUT_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 188 | "C_ENABLE_RLOCS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 189 | "C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ], 190 | "C_FULL_FLAGS_RST_VAL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 191 | "C_HAS_ALMOST_EMPTY": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 192 | "C_HAS_ALMOST_FULL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 193 | "C_HAS_BACKUP": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 194 | "C_HAS_DATA_COUNT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 195 | "C_HAS_INT_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 196 | "C_HAS_MEMINIT_FILE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 197 | "C_HAS_OVERFLOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 198 | "C_HAS_RD_DATA_COUNT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 199 | "C_HAS_RD_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 200 | "C_HAS_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 201 | "C_HAS_SRST": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 202 | "C_HAS_UNDERFLOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 203 | "C_HAS_VALID": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 204 | "C_HAS_WR_ACK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 205 | "C_HAS_WR_DATA_COUNT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 206 | "C_HAS_WR_RST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 207 | "C_IMPLEMENTATION_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 208 | "C_INIT_WR_PNTR_VAL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 209 | "C_MEMORY_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 210 | "C_MIF_FILE_NAME": [ { "value": "BlankString", "resolve_type": "generated", "usage": "all" } ], 211 | "C_OPTIMIZATION_MODE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 212 | "C_OVERFLOW_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 213 | "C_PRELOAD_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 214 | "C_PRELOAD_REGS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 215 | "C_PRIM_FIFO_TYPE": [ { "value": "512x36", "resolve_type": "generated", "usage": "all" } ], 216 | "C_PROG_EMPTY_THRESH_ASSERT_VAL": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ], 217 | "C_PROG_EMPTY_THRESH_NEGATE_VAL": [ { "value": "3", "resolve_type": "generated", "format": "long", "usage": "all" } ], 218 | "C_PROG_EMPTY_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 219 | "C_PROG_FULL_THRESH_ASSERT_VAL": [ { "value": "510", "resolve_type": "generated", "format": "long", "usage": "all" } ], 220 | "C_PROG_FULL_THRESH_NEGATE_VAL": [ { "value": "509", "resolve_type": "generated", "format": "long", "usage": "all" } ], 221 | "C_PROG_FULL_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 222 | "C_RD_DATA_COUNT_WIDTH": [ { "value": "9", "resolve_type": "generated", "format": "long", "usage": "all" } ], 223 | "C_RD_DEPTH": [ { "value": "512", "resolve_type": "generated", "format": "long", "usage": "all" } ], 224 | "C_RD_FREQ": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 225 | "C_RD_PNTR_WIDTH": [ { "value": "9", "resolve_type": "generated", "format": "long", "usage": "all" } ], 226 | "C_UNDERFLOW_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 227 | "C_USE_DOUT_RST": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 228 | "C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 229 | "C_USE_EMBEDDED_REG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 230 | "C_USE_PIPELINE_REG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 231 | "C_POWER_SAVING_MODE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 232 | "C_USE_FIFO16_FLAGS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 233 | "C_USE_FWFT_DATA_COUNT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 234 | "C_VALID_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 235 | "C_WR_ACK_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 236 | "C_WR_DATA_COUNT_WIDTH": [ { "value": "9", "resolve_type": "generated", "format": "long", "usage": "all" } ], 237 | "C_WR_DEPTH": [ { "value": "512", "resolve_type": "generated", "format": "long", "usage": "all" } ], 238 | "C_WR_FREQ": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 239 | "C_WR_PNTR_WIDTH": [ { "value": "9", "resolve_type": "generated", "format": "long", "usage": "all" } ], 240 | "C_WR_RESPONSE_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 241 | "C_MSGON_VAL": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 242 | "C_ENABLE_RST_SYNC": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 243 | "C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 244 | "C_ERROR_INJECTION_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 245 | "C_SYNCHRONIZER_STAGE": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ], 246 | "C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 247 | "C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 248 | "C_HAS_AXI_WR_CHANNEL": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 249 | "C_HAS_AXI_RD_CHANNEL": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 250 | "C_HAS_SLAVE_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 251 | "C_HAS_MASTER_CE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 252 | "C_ADD_NGC_CONSTRAINT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 253 | "C_USE_COMMON_OVERFLOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 254 | "C_USE_COMMON_UNDERFLOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 255 | "C_USE_DEFAULT_SETTINGS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 256 | "C_AXI_ID_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 257 | "C_AXI_ADDR_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 258 | "C_AXI_DATA_WIDTH": [ { "value": "64", "resolve_type": "generated", "format": "long", "usage": "all" } ], 259 | "C_AXI_LEN_WIDTH": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 260 | "C_AXI_LOCK_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 261 | "C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 262 | "C_HAS_AXI_AWUSER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 263 | "C_HAS_AXI_WUSER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 264 | "C_HAS_AXI_BUSER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 265 | "C_HAS_AXI_ARUSER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 266 | "C_HAS_AXI_RUSER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 267 | "C_AXI_ARUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 268 | "C_AXI_AWUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 269 | "C_AXI_WUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 270 | "C_AXI_BUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 271 | "C_AXI_RUSER_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 272 | "C_HAS_AXIS_TDATA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 273 | "C_HAS_AXIS_TID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 274 | "C_HAS_AXIS_TDEST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 275 | "C_HAS_AXIS_TUSER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 276 | "C_HAS_AXIS_TREADY": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 277 | "C_HAS_AXIS_TLAST": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 278 | "C_HAS_AXIS_TSTRB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 279 | "C_HAS_AXIS_TKEEP": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 280 | "C_AXIS_TDATA_WIDTH": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ], 281 | "C_AXIS_TID_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 282 | "C_AXIS_TDEST_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 283 | "C_AXIS_TUSER_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 284 | "C_AXIS_TSTRB_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 285 | "C_AXIS_TKEEP_WIDTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 286 | "C_WACH_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 287 | "C_WDCH_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 288 | "C_WRCH_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 289 | "C_RACH_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 290 | "C_RDCH_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 291 | "C_AXIS_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 292 | "C_IMPLEMENTATION_TYPE_WACH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 293 | "C_IMPLEMENTATION_TYPE_WDCH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 294 | "C_IMPLEMENTATION_TYPE_WRCH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 295 | "C_IMPLEMENTATION_TYPE_RACH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 296 | "C_IMPLEMENTATION_TYPE_RDCH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 297 | "C_IMPLEMENTATION_TYPE_AXIS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 298 | "C_APPLICATION_TYPE_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 299 | "C_APPLICATION_TYPE_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 300 | "C_APPLICATION_TYPE_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 301 | "C_APPLICATION_TYPE_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 302 | "C_APPLICATION_TYPE_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 303 | "C_APPLICATION_TYPE_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 304 | "C_PRIM_FIFO_TYPE_WACH": [ { "value": "512x36", "resolve_type": "generated", "usage": "all" } ], 305 | "C_PRIM_FIFO_TYPE_WDCH": [ { "value": "1kx36", "resolve_type": "generated", "usage": "all" } ], 306 | "C_PRIM_FIFO_TYPE_WRCH": [ { "value": "512x36", "resolve_type": "generated", "usage": "all" } ], 307 | "C_PRIM_FIFO_TYPE_RACH": [ { "value": "512x36", "resolve_type": "generated", "usage": "all" } ], 308 | "C_PRIM_FIFO_TYPE_RDCH": [ { "value": "1kx36", "resolve_type": "generated", "usage": "all" } ], 309 | "C_PRIM_FIFO_TYPE_AXIS": [ { "value": "1kx18", "resolve_type": "generated", "usage": "all" } ], 310 | "C_USE_ECC_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 311 | "C_USE_ECC_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 312 | "C_USE_ECC_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 313 | "C_USE_ECC_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 314 | "C_USE_ECC_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 315 | "C_USE_ECC_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 316 | "C_ERROR_INJECTION_TYPE_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 317 | "C_ERROR_INJECTION_TYPE_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 318 | "C_ERROR_INJECTION_TYPE_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 319 | "C_ERROR_INJECTION_TYPE_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 320 | "C_ERROR_INJECTION_TYPE_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 321 | "C_ERROR_INJECTION_TYPE_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 322 | "C_DIN_WIDTH_WACH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 323 | "C_DIN_WIDTH_WDCH": [ { "value": "64", "resolve_type": "generated", "format": "long", "usage": "all" } ], 324 | "C_DIN_WIDTH_WRCH": [ { "value": "2", "resolve_type": "generated", "format": "long", "usage": "all" } ], 325 | "C_DIN_WIDTH_RACH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ], 326 | "C_DIN_WIDTH_RDCH": [ { "value": "64", "resolve_type": "generated", "format": "long", "usage": "all" } ], 327 | "C_DIN_WIDTH_AXIS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], 328 | "C_WR_DEPTH_WACH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ], 329 | "C_WR_DEPTH_WDCH": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 330 | "C_WR_DEPTH_WRCH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ], 331 | "C_WR_DEPTH_RACH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ], 332 | "C_WR_DEPTH_RDCH": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 333 | "C_WR_DEPTH_AXIS": [ { "value": "1024", "resolve_type": "generated", "format": "long", "usage": "all" } ], 334 | "C_WR_PNTR_WIDTH_WACH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 335 | "C_WR_PNTR_WIDTH_WDCH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 336 | "C_WR_PNTR_WIDTH_WRCH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 337 | "C_WR_PNTR_WIDTH_RACH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ], 338 | "C_WR_PNTR_WIDTH_RDCH": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 339 | "C_WR_PNTR_WIDTH_AXIS": [ { "value": "10", "resolve_type": "generated", "format": "long", "usage": "all" } ], 340 | "C_HAS_DATA_COUNTS_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 341 | "C_HAS_DATA_COUNTS_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 342 | "C_HAS_DATA_COUNTS_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 343 | "C_HAS_DATA_COUNTS_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 344 | "C_HAS_DATA_COUNTS_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 345 | "C_HAS_DATA_COUNTS_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 346 | "C_HAS_PROG_FLAGS_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 347 | "C_HAS_PROG_FLAGS_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 348 | "C_HAS_PROG_FLAGS_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 349 | "C_HAS_PROG_FLAGS_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 350 | "C_HAS_PROG_FLAGS_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 351 | "C_HAS_PROG_FLAGS_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 352 | "C_PROG_FULL_TYPE_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 353 | "C_PROG_FULL_TYPE_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 354 | "C_PROG_FULL_TYPE_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 355 | "C_PROG_FULL_TYPE_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 356 | "C_PROG_FULL_TYPE_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 357 | "C_PROG_FULL_TYPE_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 358 | "C_PROG_FULL_THRESH_ASSERT_VAL_WACH": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 359 | "C_PROG_FULL_THRESH_ASSERT_VAL_WDCH": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 360 | "C_PROG_FULL_THRESH_ASSERT_VAL_WRCH": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 361 | "C_PROG_FULL_THRESH_ASSERT_VAL_RACH": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 362 | "C_PROG_FULL_THRESH_ASSERT_VAL_RDCH": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 363 | "C_PROG_FULL_THRESH_ASSERT_VAL_AXIS": [ { "value": "1023", "resolve_type": "generated", "format": "long", "usage": "all" } ], 364 | "C_PROG_EMPTY_TYPE_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 365 | "C_PROG_EMPTY_TYPE_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 366 | "C_PROG_EMPTY_TYPE_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 367 | "C_PROG_EMPTY_TYPE_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 368 | "C_PROG_EMPTY_TYPE_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 369 | "C_PROG_EMPTY_TYPE_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 370 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_WACH": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 371 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_WDCH": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 372 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_WRCH": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 373 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_RACH": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 374 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_RDCH": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 375 | "C_PROG_EMPTY_THRESH_ASSERT_VAL_AXIS": [ { "value": "1022", "resolve_type": "generated", "format": "long", "usage": "all" } ], 376 | "C_REG_SLICE_MODE_WACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 377 | "C_REG_SLICE_MODE_WDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 378 | "C_REG_SLICE_MODE_WRCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 379 | "C_REG_SLICE_MODE_RACH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 380 | "C_REG_SLICE_MODE_RDCH": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], 381 | "C_REG_SLICE_MODE_AXIS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ] 382 | }, 383 | "project_parameters": { 384 | "ARCHITECTURE": [ { "value": "artix7" } ], 385 | "BASE_BOARD_PART": [ { "value": "" } ], 386 | "BOARD_CONNECTIONS": [ { "value": "" } ], 387 | "DEVICE": [ { "value": "xc7a75t" } ], 388 | "PACKAGE": [ { "value": "fgg484" } ], 389 | "PREFHDL": [ { "value": "VERILOG" } ], 390 | "SILICON_REVISION": [ { "value": "" } ], 391 | "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], 392 | "SPEEDGRADE": [ { "value": "-2" } ], 393 | "STATIC_POWER": [ { "value": "" } ], 394 | "TEMPERATURE_GRADE": [ { "value": "" } ] 395 | }, 396 | "runtime_parameters": { 397 | "IPCONTEXT": [ { "value": "IP_Flow" } ], 398 | "IPREVISION": [ { "value": "9" } ], 399 | "MANAGED": [ { "value": "TRUE" } ], 400 | "OUTPUTDIR": [ { "value": "../../../../pcileech_enigma_x1.gen/sources_1/ip/fifo_4_4_clk1_bar_rd1" } ], 401 | "SELECTEDSIMMODEL": [ { "value": "" } ], 402 | "SHAREDDIR": [ { "value": "." } ], 403 | "SWVERSION": [ { "value": "2023.2" } ], 404 | "SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ] 405 | } 406 | }, 407 | "boundary": { 408 | "ports": { 409 | "clk": [ { "direction": "in", "driver_value": "0" } ], 410 | "srst": [ { "direction": "in", "driver_value": "0" } ], 411 | "din": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 412 | "wr_en": [ { "direction": "in", "driver_value": "0" } ], 413 | "rd_en": [ { "direction": "in", "driver_value": "0" } ], 414 | "dout": [ { "direction": "out", "size_left": "3", "size_right": "0", "driver_value": "0" } ], 415 | "full": [ { "direction": "out", "driver_value": "0x0" } ], 416 | "empty": [ { "direction": "out", "driver_value": "0x1" } ], 417 | "valid": [ { "direction": "out", "driver_value": "0x0" } ] 418 | }, 419 | "interfaces": { 420 | "core_clk": { 421 | "vlnv": "xilinx.com:signal:clock:1.0", 422 | "abstraction_type": "xilinx.com:signal:clock_rtl:1.0", 423 | "mode": "slave", 424 | "parameters": { 425 | "FREQ_HZ": [ { "value": "100000000", "resolve_type": "user", "format": "long", "usage": "all" } ], 426 | "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ], 427 | "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ], 428 | "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 429 | "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 430 | "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 431 | "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ], 432 | "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ] 433 | }, 434 | "port_maps": { 435 | "CLK": [ { "physical_name": "clk" } ] 436 | } 437 | }, 438 | "FIFO_WRITE": { 439 | "vlnv": "xilinx.com:interface:fifo_write:1.0", 440 | "abstraction_type": "xilinx.com:interface:fifo_write_rtl:1.0", 441 | "mode": "slave", 442 | "port_maps": { 443 | "FULL": [ { "physical_name": "full" } ], 444 | "WR_DATA": [ { "physical_name": "din" } ], 445 | "WR_EN": [ { "physical_name": "wr_en" } ] 446 | } 447 | }, 448 | "FIFO_READ": { 449 | "vlnv": "xilinx.com:interface:fifo_read:1.0", 450 | "abstraction_type": "xilinx.com:interface:fifo_read_rtl:1.0", 451 | "mode": "slave", 452 | "port_maps": { 453 | "EMPTY": [ { "physical_name": "empty" } ], 454 | "RD_DATA": [ { "physical_name": "dout" } ], 455 | "RD_EN": [ { "physical_name": "rd_en" } ] 456 | } 457 | } 458 | } 459 | } 460 | } 461 | } -------------------------------------------------------------------------------- /ip/pcileech_bar_zero4k.coe: -------------------------------------------------------------------------------- 1 | memory_initialization_radix=16; 2 | memory_initialization_vector= 3 | 4 | 00000000,00000000,00000000,00000000, 5 | 00000000,00000000,00000000,00000000, 6 | 00000000,00000000,00000000,00000000, 7 | 00000000,00000000,00000000,00000000, 8 | 00000000,00000000,00000000,00000000, 9 | 00000000,00000000,00000000,00000000, 10 | 00000000,00000000,00000000,00000000, 11 | 00000000,00000000,00000000,00000000, 12 | 00000000,00000000,00000000,00000000, 13 | 00000000,00000000,00000000,00000000, 14 | 00000000,00000000,00000000,00000000, 15 | 00000000,00000000,00000000,00000000, 16 | 00000000,00000000,00000000,00000000, 17 | 00000000,00000000,00000000,00000000, 18 | 00000000,00000000,00000000,00000000, 19 | 00000000,00000000,00000000,00000000, 20 | 21 | 00000000,00000000,00000000,00000000, 22 | 00000000,00000000,00000000,00000000, 23 | 00000000,00000000,00000000,00000000, 24 | 00000000,00000000,00000000,00000000, 25 | 00000000,00000000,00000000,00000000, 26 | 00000000,00000000,00000000,00000000, 27 | 00000000,00000000,00000000,00000000, 28 | 00000000,00000000,00000000,00000000, 29 | 00000000,00000000,00000000,00000000, 30 | 00000000,00000000,00000000,00000000, 31 | 00000000,00000000,00000000,00000000, 32 | 00000000,00000000,00000000,00000000, 33 | 00000000,00000000,00000000,00000000, 34 | 00000000,00000000,00000000,00000000, 35 | 00000000,00000000,00000000,00000000, 36 | 00000000,00000000,00000000,00000000, 37 | 38 | 00000000,00000000,00000000,00000000, 39 | 00000000,00000000,00000000,00000000, 40 | 00000000,00000000,00000000,00000000, 41 | 00000000,00000000,00000000,00000000, 42 | 00000000,00000000,00000000,00000000, 43 | 00000000,00000000,00000000,00000000, 44 | 00000000,00000000,00000000,00000000, 45 | 00000000,00000000,00000000,00000000, 46 | 00000000,00000000,00000000,00000000, 47 | 00000000,00000000,00000000,00000000, 48 | 00000000,00000000,00000000,00000000, 49 | 00000000,00000000,00000000,00000000, 50 | 00000000,00000000,00000000,00000000, 51 | 00000000,00000000,00000000,00000000, 52 | 00000000,00000000,00000000,00000000, 53 | 00000000,00000000,00000000,00000000, 54 | 55 | 00000000,00000000,00000000,00000000, 56 | 00000000,00000000,00000000,00000000, 57 | 00000000,00000000,00000000,00000000, 58 | 00000000,00000000,00000000,00000000, 59 | 00000000,00000000,00000000,00000000, 60 | 00000000,00000000,00000000,00000000, 61 | 00000000,00000000,00000000,00000000, 62 | 00000000,00000000,00000000,00000000, 63 | 00000000,00000000,00000000,00000000, 64 | 00000000,00000000,00000000,00000000, 65 | 00000000,00000000,00000000,00000000, 66 | 00000000,00000000,00000000,00000000, 67 | 00000000,00000000,00000000,00000000, 68 | 00000000,00000000,00000000,00000000, 69 | 00000000,00000000,00000000,00000000, 70 | 00000000,00000000,00000000,00000000, 71 | 72 | 73 | 74 | 00000000,00000000,00000000,00000000, 75 | 00000000,00000000,00000000,00000000, 76 | 00000000,00000000,00000000,00000000, 77 | 00000000,00000000,00000000,00000000, 78 | 00000000,00000000,00000000,00000000, 79 | 00000000,00000000,00000000,00000000, 80 | 00000000,00000000,00000000,00000000, 81 | 00000000,00000000,00000000,00000000, 82 | 00000000,00000000,00000000,00000000, 83 | 00000000,00000000,00000000,00000000, 84 | 00000000,00000000,00000000,00000000, 85 | 00000000,00000000,00000000,00000000, 86 | 00000000,00000000,00000000,00000000, 87 | 00000000,00000000,00000000,00000000, 88 | 00000000,00000000,00000000,00000000, 89 | 00000000,00000000,00000000,00000000, 90 | 91 | 00000000,00000000,00000000,00000000, 92 | 00000000,00000000,00000000,00000000, 93 | 00000000,00000000,00000000,00000000, 94 | 00000000,00000000,00000000,00000000, 95 | 00000000,00000000,00000000,00000000, 96 | 00000000,00000000,00000000,00000000, 97 | 00000000,00000000,00000000,00000000, 98 | 00000000,00000000,00000000,00000000, 99 | 00000000,00000000,00000000,00000000, 100 | 00000000,00000000,00000000,00000000, 101 | 00000000,00000000,00000000,00000000, 102 | 00000000,00000000,00000000,00000000, 103 | 00000000,00000000,00000000,00000000, 104 | 00000000,00000000,00000000,00000000, 105 | 00000000,00000000,00000000,00000000, 106 | 00000000,00000000,00000000,00000000, 107 | 108 | 00000000,00000000,00000000,00000000, 109 | 00000000,00000000,00000000,00000000, 110 | 00000000,00000000,00000000,00000000, 111 | 00000000,00000000,00000000,00000000, 112 | 00000000,00000000,00000000,00000000, 113 | 00000000,00000000,00000000,00000000, 114 | 00000000,00000000,00000000,00000000, 115 | 00000000,00000000,00000000,00000000, 116 | 00000000,00000000,00000000,00000000, 117 | 00000000,00000000,00000000,00000000, 118 | 00000000,00000000,00000000,00000000, 119 | 00000000,00000000,00000000,00000000, 120 | 00000000,00000000,00000000,00000000, 121 | 00000000,00000000,00000000,00000000, 122 | 00000000,00000000,00000000,00000000, 123 | 00000000,00000000,00000000,00000000, 124 | 125 | 00000000,00000000,00000000,00000000, 126 | 00000000,00000000,00000000,00000000, 127 | 00000000,00000000,00000000,00000000, 128 | 00000000,00000000,00000000,00000000, 129 | 00000000,00000000,00000000,00000000, 130 | 00000000,00000000,00000000,00000000, 131 | 00000000,00000000,00000000,00000000, 132 | 00000000,00000000,00000000,00000000, 133 | 00000000,00000000,00000000,00000000, 134 | 00000000,00000000,00000000,00000000, 135 | 00000000,00000000,00000000,00000000, 136 | 00000000,00000000,00000000,00000000, 137 | 00000000,00000000,00000000,00000000, 138 | 00000000,00000000,00000000,00000000, 139 | 00000000,00000000,00000000,00000000, 140 | 00000000,00000000,00000000,00000000, 141 | 142 | 143 | 00000000,00000000,00000000,00000000, 144 | 00000000,00000000,00000000,00000000, 145 | 00000000,00000000,00000000,00000000, 146 | 00000000,00000000,00000000,00000000, 147 | 00000000,00000000,00000000,00000000, 148 | 00000000,00000000,00000000,00000000, 149 | 00000000,00000000,00000000,00000000, 150 | 00000000,00000000,00000000,00000000, 151 | 00000000,00000000,00000000,00000000, 152 | 00000000,00000000,00000000,00000000, 153 | 00000000,00000000,00000000,00000000, 154 | 00000000,00000000,00000000,00000000, 155 | 00000000,00000000,00000000,00000000, 156 | 00000000,00000000,00000000,00000000, 157 | 00000000,00000000,00000000,00000000, 158 | 00000000,00000000,00000000,00000000, 159 | 160 | 00000000,00000000,00000000,00000000, 161 | 00000000,00000000,00000000,00000000, 162 | 00000000,00000000,00000000,00000000, 163 | 00000000,00000000,00000000,00000000, 164 | 00000000,00000000,00000000,00000000, 165 | 00000000,00000000,00000000,00000000, 166 | 00000000,00000000,00000000,00000000, 167 | 00000000,00000000,00000000,00000000, 168 | 00000000,00000000,00000000,00000000, 169 | 00000000,00000000,00000000,00000000, 170 | 00000000,00000000,00000000,00000000, 171 | 00000000,00000000,00000000,00000000, 172 | 00000000,00000000,00000000,00000000, 173 | 00000000,00000000,00000000,00000000, 174 | 00000000,00000000,00000000,00000000, 175 | 00000000,00000000,00000000,00000000, 176 | 177 | 00000000,00000000,00000000,00000000, 178 | 00000000,00000000,00000000,00000000, 179 | 00000000,00000000,00000000,00000000, 180 | 00000000,00000000,00000000,00000000, 181 | 00000000,00000000,00000000,00000000, 182 | 00000000,00000000,00000000,00000000, 183 | 00000000,00000000,00000000,00000000, 184 | 00000000,00000000,00000000,00000000, 185 | 00000000,00000000,00000000,00000000, 186 | 00000000,00000000,00000000,00000000, 187 | 00000000,00000000,00000000,00000000, 188 | 00000000,00000000,00000000,00000000, 189 | 00000000,00000000,00000000,00000000, 190 | 00000000,00000000,00000000,00000000, 191 | 00000000,00000000,00000000,00000000, 192 | 00000000,00000000,00000000,00000000, 193 | 194 | 00000000,00000000,00000000,00000000, 195 | 00000000,00000000,00000000,00000000, 196 | 00000000,00000000,00000000,00000000, 197 | 00000000,00000000,00000000,00000000, 198 | 00000000,00000000,00000000,00000000, 199 | 00000000,00000000,00000000,00000000, 200 | 00000000,00000000,00000000,00000000, 201 | 00000000,00000000,00000000,00000000, 202 | 00000000,00000000,00000000,00000000, 203 | 00000000,00000000,00000000,00000000, 204 | 00000000,00000000,00000000,00000000, 205 | 00000000,00000000,00000000,00000000, 206 | 00000000,00000000,00000000,00000000, 207 | 00000000,00000000,00000000,00000000, 208 | 00000000,00000000,00000000,00000000, 209 | 00000000,00000000,00000000,00000000, 210 | 211 | 212 | 213 | 00000000,00000000,00000000,00000000, 214 | 00000000,00000000,00000000,00000000, 215 | 00000000,00000000,00000000,00000000, 216 | 00000000,00000000,00000000,00000000, 217 | 00000000,00000000,00000000,00000000, 218 | 00000000,00000000,00000000,00000000, 219 | 00000000,00000000,00000000,00000000, 220 | 00000000,00000000,00000000,00000000, 221 | 00000000,00000000,00000000,00000000, 222 | 00000000,00000000,00000000,00000000, 223 | 00000000,00000000,00000000,00000000, 224 | 00000000,00000000,00000000,00000000, 225 | 00000000,00000000,00000000,00000000, 226 | 00000000,00000000,00000000,00000000, 227 | 00000000,00000000,00000000,00000000, 228 | 00000000,00000000,00000000,00000000, 229 | 230 | 00000000,00000000,00000000,00000000, 231 | 00000000,00000000,00000000,00000000, 232 | 00000000,00000000,00000000,00000000, 233 | 00000000,00000000,00000000,00000000, 234 | 00000000,00000000,00000000,00000000, 235 | 00000000,00000000,00000000,00000000, 236 | 00000000,00000000,00000000,00000000, 237 | 00000000,00000000,00000000,00000000, 238 | 00000000,00000000,00000000,00000000, 239 | 00000000,00000000,00000000,00000000, 240 | 00000000,00000000,00000000,00000000, 241 | 00000000,00000000,00000000,00000000, 242 | 00000000,00000000,00000000,00000000, 243 | 00000000,00000000,00000000,00000000, 244 | 00000000,00000000,00000000,00000000, 245 | 00000000,00000000,00000000,00000000, 246 | 247 | 00000000,00000000,00000000,00000000, 248 | 00000000,00000000,00000000,00000000, 249 | 00000000,00000000,00000000,00000000, 250 | 00000000,00000000,00000000,00000000, 251 | 00000000,00000000,00000000,00000000, 252 | 00000000,00000000,00000000,00000000, 253 | 00000000,00000000,00000000,00000000, 254 | 00000000,00000000,00000000,00000000, 255 | 00000000,00000000,00000000,00000000, 256 | 00000000,00000000,00000000,00000000, 257 | 00000000,00000000,00000000,00000000, 258 | 00000000,00000000,00000000,00000000, 259 | 00000000,00000000,00000000,00000000, 260 | 00000000,00000000,00000000,00000000, 261 | 00000000,00000000,00000000,00000000, 262 | 00000000,00000000,00000000,00000000, 263 | 264 | 00000000,00000000,00000000,00000000, 265 | 00000000,00000000,00000000,00000000, 266 | 00000000,00000000,00000000,00000000, 267 | 00000000,00000000,00000000,00000000, 268 | 00000000,00000000,00000000,00000000, 269 | 00000000,00000000,00000000,00000000, 270 | 00000000,00000000,00000000,00000000, 271 | 00000000,00000000,00000000,00000000, 272 | 00000000,00000000,00000000,00000000, 273 | 00000000,00000000,00000000,00000000, 274 | 00000000,00000000,00000000,00000000, 275 | 00000000,00000000,00000000,00000000, 276 | 00000000,00000000,00000000,00000000, 277 | 00000000,00000000,00000000,00000000, 278 | 00000000,00000000,00000000,00000000, 279 | 00000000,00000000,00000000,00000000 280 | ; 281 | -------------------------------------------------------------------------------- /ip/pcileech_cfgspace.coe: -------------------------------------------------------------------------------- 1 | ; Converted to COE from "RTL8188EE.tlscan" on 2024-07-15 17:48:17.250677 2 | memory_initialization_radix=16; 3 | memory_initialization_vector= 4 | ; 0000 5 | ec107981,07041000,01008002,10000000, 6 | 01df0000,00000000,04c0dffb,00000000, 7 | 00000000,00000000,00000000,aa177981, 8 | 00000000,40000000,00000000,00010000, 9 | 0150c3ff,08000000,00000000,00000000, 10 | 05708100,0cf0e0fe,00000000,70490000, 11 | 00000000,00000000,00000000,00000000, 12 | 10000200,40829005,07501100,113c0700, 13 | 40001110,00000000,00000000,00000000, 14 | 00000000,10080c00,10000000,02000000, 15 | 00000000,00000000,00000000,00000000, 16 | 00000000,00000000,00000000,00000000, 17 | 00000000,00000000,00000000,00000000, 18 | 00000000,00000000,00000000,00000000, 19 | 00000000,00000000,00000000,00000000, 20 | 00000000,00000000,00000000,00000000, 21 | ; 0100 22 | 01000114,00000000,00000000,30200600, 23 | 01000000,00000000,80000000,00000000, 24 | 00000000,00000000,00000000,00000000, 25 | 00000000,00000000,00000000,00000000, 26 | 03000115,019181fe,ff4ce000,00000000, 27 | 18000100,00000000,00000000,00000000, 28 | 00000000,00000000,00000000,00000000, 29 | 00000000,00000000,00000000,00000000, 30 | 00000000,00000000,00000000,00000000, 31 | 00000000,00000000,00000000,00000000, 32 | 00000000,00000000,00000000,00000000, 33 | 00000000,00000000,00000000,00000000, 34 | 00000000,00000000,00000000,00000000, 35 | 00000000,00000000,00000000,00000000, 36 | 00000000,00000000,00000000,00000000, 37 | 00000000,00000000,00000000,00000000, 38 | ; 0200 39 | 00000000,00000000,00000000,00000000, 40 | 00000000,00000000,00000000,00000000, 41 | 00000000,00000000,00000000,00000000, 42 | 00000000,00000000,00000000,00000000, 43 | 00000000,00000000,00000000,00000000, 44 | 00000000,00000000,00000000,00000000, 45 | 00000000,00000000,00000000,00000000, 46 | 00000000,00000000,00000000,00000000, 47 | 00000000,00000000,00000000,00000000, 48 | 00000000,00000000,00000000,00000000, 49 | 00000000,00000000,00000000,00000000, 50 | 00000000,00000000,00000000,00000000, 51 | 00000000,00000000,00000000,00000000, 52 | 00000000,00000000,00000000,00000000, 53 | 00000000,00000000,00000000,00000000, 54 | 00000000,00000000,00000000,00000000, 55 | ; 0300 56 | 00000000,00000000,00000000,00000000, 57 | 00000000,00000000,00000000,00000000, 58 | 00000000,00000000,00000000,00000000, 59 | 00000000,00000000,00000000,00000000, 60 | 00000000,00000000,00000000,00000000, 61 | 00000000,00000000,00000000,00000000, 62 | 00000000,00000000,00000000,00000000, 63 | 00000000,00000000,00000000,00000000, 64 | 00000000,00000000,00000000,00000000, 65 | 00000000,00000000,00000000,00000000, 66 | 00000000,00000000,00000000,00000000, 67 | 00000000,00000000,00000000,00000000, 68 | 00000000,00000000,00000000,00000000, 69 | 00000000,00000000,00000000,00000000, 70 | 00000000,00000000,00000000,00000000, 71 | 00000000,00000000,00000000,00000000, 72 | ; 0400 73 | 00000000,00000000,00000000,00000000, 74 | 00000000,00000000,00000000,00000000, 75 | 00000000,00000000,00000000,00000000, 76 | 00000000,00000000,00000000,00000000, 77 | 00000000,00000000,00000000,00000000, 78 | 00000000,00000000,00000000,00000000, 79 | 00000000,00000000,00000000,00000000, 80 | 00000000,00000000,00000000,00000000, 81 | 00000000,00000000,00000000,00000000, 82 | 00000000,00000000,00000000,00000000, 83 | 00000000,00000000,00000000,00000000, 84 | 00000000,00000000,00000000,00000000, 85 | 00000000,00000000,00000000,00000000, 86 | 00000000,00000000,00000000,00000000, 87 | 00000000,00000000,00000000,00000000, 88 | 00000000,00000000,00000000,00000000, 89 | ; 0500 90 | 00000000,00000000,00000000,00000000, 91 | 00000000,00000000,00000000,00000000, 92 | 00000000,00000000,00000000,00000000, 93 | 00000000,00000000,00000000,00000000, 94 | 00000000,00000000,00000000,00000000, 95 | 00000000,00000000,00000000,00000000, 96 | 00000000,00000000,00000000,00000000, 97 | 00000000,00000000,00000000,00000000, 98 | 00000000,00000000,00000000,00000000, 99 | 00000000,00000000,00000000,00000000, 100 | 00000000,00000000,00000000,00000000, 101 | 00000000,00000000,00000000,00000000, 102 | 00000000,00000000,00000000,00000000, 103 | 00000000,00000000,00000000,00000000, 104 | 00000000,00000000,00000000,00000000, 105 | 00000000,00000000,00000000,00000000, 106 | ; 0600 107 | 00000000,00000000,00000000,00000000, 108 | 00000000,00000000,00000000,00000000, 109 | 00000000,00000000,00000000,00000000, 110 | 00000000,00000000,00000000,00000000, 111 | 00000000,00000000,00000000,00000000, 112 | 00000000,00000000,00000000,00000000, 113 | 00000000,00000000,00000000,00000000, 114 | 00000000,00000000,00000000,00000000, 115 | 00000000,00000000,00000000,00000000, 116 | 00000000,00000000,00000000,00000000, 117 | 00000000,00000000,00000000,00000000, 118 | 00000000,00000000,00000000,00000000, 119 | 00000000,00000000,00000000,00000000, 120 | 00000000,00000000,00000000,00000000, 121 | 00000000,00000000,00000000,00000000, 122 | 00000000,00000000,00000000,00000000, 123 | ; 0700 124 | 3b00b100,00000000,00004000,01400097, 125 | 00400000,00000000,000d0200,40010000, 126 | 00000000,00000000,115bc303,10000008, 127 | 00000000,00000000,00000000,00000000, 128 | 00000000,00000000,00000000,00000000, 129 | 00000000,00000000,00000000,00000000, 130 | 00000000,00000000,00000000,00000000, 131 | 00000000,00000000,00000000,00000000, 132 | 00000000,00000000,00000000,00000000, 133 | 00000000,00000000,00000000,00000000, 134 | 00000000,00000000,00000000,00000000, 135 | 00000000,00000000,00000000,00000000, 136 | 00000000,00000000,00000000,00000000, 137 | 00000000,00000000,00000000,00000000, 138 | 00000000,00000000,00000000,00000000, 139 | 00000000,00000000,00000000,00000000, 140 | ; 0800 141 | 00000000,00000000,00000000,00000000, 142 | 00000000,00000000,00000000,00000000, 143 | 00000000,00000000,00000000,00000000, 144 | 00000000,00000000,00000000,00000000, 145 | 00000000,00000000,00000000,00000000, 146 | 00000000,00000000,00000000,00000000, 147 | 00000000,00000000,00000000,00000000, 148 | 00000000,00000000,00000000,00000000, 149 | 00000000,00000000,00000000,00000000, 150 | 00000000,00000000,00000000,00000000, 151 | 00000000,00000000,00000000,00000000, 152 | 00000000,00000000,00000000,00000000, 153 | 00000000,00000000,00000000,00000000, 154 | 00000000,00000000,00000000,00000000, 155 | 00000000,00000000,00000000,00000000, 156 | 00000000,00000000,00000000,00000000, 157 | ; 0900 158 | 00000000,00000000,00000000,00000000, 159 | 00000000,00000000,00000000,00000000, 160 | 00000000,00000000,00000000,00000000, 161 | 00000000,00000000,00000000,00000000, 162 | 00000000,00000000,00000000,00000000, 163 | 00000000,00000000,00000000,00000000, 164 | 00000000,00000000,00000000,00000000, 165 | 00000000,00000000,00000000,00000000, 166 | 00000000,00000000,00000000,00000000, 167 | 00000000,00000000,00000000,00000000, 168 | 00000000,00000000,00000000,00000000, 169 | 00000000,00000000,00000000,00000000, 170 | 00000000,00000000,00000000,00000000, 171 | 00000000,00000000,00000000,00000000, 172 | 00000000,00000000,00000000,00000000, 173 | 00000000,00000000,00000000,00000000, 174 | ; 0A00 175 | 00000000,00000000,00000000,00000000, 176 | 00000000,00000000,00000000,00000000, 177 | 00000000,00000000,00000000,00000000, 178 | 00000000,00000000,00000000,00000000, 179 | 00000000,00000000,00000000,00000000, 180 | 00000000,00000000,00000000,00000000, 181 | 00000000,00000000,00000000,00000000, 182 | 00000000,00000000,00000000,00000000, 183 | 00000000,00000000,00000000,00000000, 184 | 00000000,00000000,00000000,00000000, 185 | 00000000,00000000,00000000,00000000, 186 | 00000000,00000000,00000000,00000000, 187 | 00000000,00000000,00000000,00000000, 188 | 00000000,00000000,00000000,00000000, 189 | 00000000,00000000,00000000,00000000, 190 | 00000000,00000000,00000000,00000000, 191 | ; 0B00 192 | 00000000,00000000,00000000,00000000, 193 | 00000000,00000000,00000000,00000000, 194 | 00000000,00000000,00000000,00000000, 195 | 00000000,00000000,00000000,00000000, 196 | 00000000,00000000,00000000,00000000, 197 | 00000000,00000000,00000000,00000000, 198 | 00000000,00000000,00000000,00000000, 199 | 00000000,00000000,00000000,00000000, 200 | 00000000,00000000,00000000,00000000, 201 | 00000000,00000000,00000000,00000000, 202 | 00000000,00000000,00000000,00000000, 203 | 00000000,00000000,00000000,00000000, 204 | 00000000,00000000,00000000,00000000, 205 | 00000000,00000000,00000000,00000000, 206 | 00000000,00000000,00000000,00000000, 207 | 00000000,00000000,00000000,00000000, 208 | ; 0C00 209 | 00000000,00000000,00000000,00000000, 210 | 00000000,00000000,00000000,00000000, 211 | 00000000,00000000,00000000,00000000, 212 | 00000000,00000000,00000000,00000000, 213 | 00000000,00000000,00000000,00000000, 214 | 00000000,00000000,00000000,00000000, 215 | 00000000,00000000,00000000,00000000, 216 | 00000000,00000000,00000000,00000000, 217 | 00000000,00000000,00000000,00000000, 218 | 00000000,00000000,00000000,00000000, 219 | 00000000,00000000,00000000,00000000, 220 | 00000000,00000000,00000000,00000000, 221 | 00000000,00000000,00000000,00000000, 222 | 00000000,00000000,00000000,00000000, 223 | 00000000,00000000,00000000,00000000, 224 | 00000000,00000000,00000000,00000000, 225 | ; 0D00 226 | 00000000,00000000,00000000,00000000, 227 | 00000000,00000000,00000000,00000000, 228 | 00000000,00000000,00000000,00000000, 229 | 00000000,00000000,00000000,00000000, 230 | 00000000,00000000,00000000,00000000, 231 | 00000000,00000000,00000000,00000000, 232 | 00000000,00000000,00000000,00000000, 233 | 00000000,00000000,00000000,00000000, 234 | 00000000,00000000,00000000,00000000, 235 | 00000000,00000000,00000000,00000000, 236 | 00000000,00000000,00000000,00000000, 237 | 00000000,00000000,00000000,00000000, 238 | 00000000,00000000,00000000,00000000, 239 | 00000000,00000000,00000000,00000000, 240 | 00000000,00000000,00000000,00000000, 241 | 00000000,00000000,00000000,00000000, 242 | ; 0E00 243 | 00000000,00000000,00000000,00000000, 244 | 00000000,00000000,00000000,00000000, 245 | 00000000,00000000,00000000,00000000, 246 | 00000000,00000000,00000000,00000000, 247 | 00000000,00000000,00000000,00000000, 248 | 00000000,00000000,00000000,00000000, 249 | 00000000,00000000,00000000,00000000, 250 | 00000000,00000000,00000000,00000000, 251 | 00000000,00000000,00000000,00000000, 252 | 00000000,00000000,00000000,00000000, 253 | 00000000,00000000,00000000,00000000, 254 | 00000000,00000000,00000000,00000000, 255 | 00000000,00000000,00000000,00000000, 256 | 00000000,00000000,00000000,00000000, 257 | 00000000,00000000,00000000,00000000, 258 | 00000000,00000000,00000000,00000000, 259 | ; 0F00 260 | 00000000,00000000,00000000,00000000, 261 | 00000000,00000000,00000000,00000000, 262 | 00000000,00000000,00000000,00000000, 263 | 00000000,00000000,00000000,00000000, 264 | 00000000,00000000,00000000,00000000, 265 | 00000000,00000000,00000000,00000000, 266 | 00000000,00000000,00000000,00000000, 267 | 00000000,00000000,00000000,00000000, 268 | 00000000,00000000,00000000,00000000, 269 | 00000000,00000000,00000000,00000000, 270 | 00000000,00000000,00000000,00000000, 271 | 00000000,00000000,00000000,00000000, 272 | 00000000,00000000,00000000,00000000, 273 | 00000000,00000000,00000000,00000000, 274 | 00000000,00000000,00000000,00000000, 275 | 00000000,00000000,00000000,00000000, 276 | ; 277 | -------------------------------------------------------------------------------- /ip/pcileech_cfgspace_writemask.coe: -------------------------------------------------------------------------------- 1 | memory_initialization_radix=16; 2 | memory_initialization_vector= 3 | 4 | 00000000,00000000,00000000,00000000, 5 | 00000000,00000000,00000000,00000000, 6 | 00000000,00000000,00000000,00000000, 7 | 00000000,00000000,00000000,00000000, 8 | 00000000,00000000,00000000,00000000, 9 | 00000000,00000000,00000000,00000000, 10 | 00000000,00000000,00000000,00000000, 11 | 00000000,00000000,00000000,00000000, 12 | 00000000,00000000,00000000,00000000, 13 | 00000000,00000000,00000000,00000000, 14 | 00000000,00000000,00000000,00000000, 15 | 00000000,00000000,00000000,00000000, 16 | 00000000,00000000,00000000,00000000, 17 | 00000000,00000000,00000000,00000000, 18 | 00000000,00000000,00000000,00000000, 19 | 00000000,00000000,00000000,00000000, 20 | 21 | 00000000,00000000,00000000,00000000, 22 | 00000000,00000000,00000000,00000000, 23 | 00000000,00000000,00000000,00000000, 24 | 00000000,00000000,00000000,00000000, 25 | 00000000,00000000,00000000,00000000, 26 | 00000000,00000000,00000000,00000000, 27 | 00000000,00000000,00000000,00000000, 28 | 00000000,00000000,00000000,00000000, 29 | 00000000,00000000,00000000,00000000, 30 | 00000000,00000000,00000000,00000000, 31 | 00000000,00000000,00000000,00000000, 32 | 00000000,00000000,00000000,00000000, 33 | 00000000,00000000,00000000,00000000, 34 | 00000000,00000000,00000000,00000000, 35 | 00000000,00000000,00000000,00000000, 36 | 00000000,00000000,00000000,00000000, 37 | 38 | 00000000,00000000,00000000,00000000, 39 | 00000000,00000000,00000000,00000000, 40 | 00000000,00000000,00000000,00000000, 41 | 00000000,00000000,00000000,00000000, 42 | 00000000,00000000,00000000,00000000, 43 | 00000000,00000000,00000000,00000000, 44 | 00000000,00000000,00000000,00000000, 45 | 00000000,00000000,00000000,00000000, 46 | 00000000,00000000,00000000,00000000, 47 | 00000000,00000000,00000000,00000000, 48 | 00000000,00000000,00000000,00000000, 49 | 00000000,00000000,00000000,00000000, 50 | 00000000,00000000,00000000,00000000, 51 | 00000000,00000000,00000000,00000000, 52 | 00000000,00000000,00000000,00000000, 53 | 00000000,00000000,00000000,00000000, 54 | 55 | 00000000,00000000,00000000,00000000, 56 | 00000000,00000000,00000000,00000000, 57 | 00000000,00000000,00000000,00000000, 58 | 00000000,00000000,00000000,00000000, 59 | 00000000,00000000,00000000,00000000, 60 | 00000000,00000000,00000000,00000000, 61 | 00000000,00000000,00000000,00000000, 62 | 00000000,00000000,00000000,00000000, 63 | 00000000,00000000,00000000,00000000, 64 | 00000000,00000000,00000000,00000000, 65 | 00000000,00000000,00000000,00000000, 66 | 00000000,00000000,00000000,00000000, 67 | 00000000,00000000,00000000,00000000, 68 | 00000000,00000000,00000000,00000000, 69 | 00000000,00000000,00000000,00000000, 70 | 00000000,00000000,00000000,00000000, 71 | 72 | 73 | 74 | 00000000,00000000,00000000,00000000, 75 | 00000000,00000000,00000000,00000000, 76 | 00000000,00000000,00000000,00000000, 77 | 00000000,00000000,00000000,00000000, 78 | 00000000,00000000,00000000,00000000, 79 | 00000000,00000000,00000000,00000000, 80 | 00000000,00000000,00000000,00000000, 81 | 00000000,00000000,00000000,00000000, 82 | 00000000,00000000,00000000,00000000, 83 | 00000000,00000000,00000000,00000000, 84 | 00000000,00000000,00000000,00000000, 85 | 00000000,00000000,00000000,00000000, 86 | 00000000,00000000,00000000,00000000, 87 | 00000000,00000000,00000000,00000000, 88 | 00000000,00000000,00000000,00000000, 89 | 00000000,00000000,00000000,00000000, 90 | 91 | 00000000,00000000,00000000,00000000, 92 | 00000000,00000000,00000000,00000000, 93 | 00000000,00000000,00000000,00000000, 94 | 00000000,00000000,00000000,00000000, 95 | 00000000,00000000,00000000,00000000, 96 | 00000000,00000000,00000000,00000000, 97 | 00000000,00000000,00000000,00000000, 98 | 00000000,00000000,00000000,00000000, 99 | 00000000,00000000,00000000,00000000, 100 | 00000000,00000000,00000000,00000000, 101 | 00000000,00000000,00000000,00000000, 102 | 00000000,00000000,00000000,00000000, 103 | 00000000,00000000,00000000,00000000, 104 | 00000000,00000000,00000000,00000000, 105 | 00000000,00000000,00000000,00000000, 106 | 00000000,00000000,00000000,00000000, 107 | 108 | 00000000,00000000,00000000,00000000, 109 | 00000000,00000000,00000000,00000000, 110 | 00000000,00000000,00000000,00000000, 111 | 00000000,00000000,00000000,00000000, 112 | 00000000,00000000,00000000,00000000, 113 | 00000000,00000000,00000000,00000000, 114 | 00000000,00000000,00000000,00000000, 115 | 00000000,00000000,00000000,00000000, 116 | 00000000,00000000,00000000,00000000, 117 | 00000000,00000000,00000000,00000000, 118 | 00000000,00000000,00000000,00000000, 119 | 00000000,00000000,00000000,00000000, 120 | 00000000,00000000,00000000,00000000, 121 | 00000000,00000000,00000000,00000000, 122 | 00000000,00000000,00000000,00000000, 123 | 00000000,00000000,00000000,00000000, 124 | 125 | 00000000,00000000,00000000,00000000, 126 | 00000000,00000000,00000000,00000000, 127 | 00000000,00000000,00000000,00000000, 128 | 00000000,00000000,00000000,00000000, 129 | 00000000,00000000,00000000,00000000, 130 | 00000000,00000000,00000000,00000000, 131 | 00000000,00000000,00000000,00000000, 132 | 00000000,00000000,00000000,00000000, 133 | 00000000,00000000,00000000,00000000, 134 | 00000000,00000000,00000000,00000000, 135 | 00000000,00000000,00000000,00000000, 136 | 00000000,00000000,00000000,00000000, 137 | 00000000,00000000,00000000,00000000, 138 | 00000000,00000000,00000000,00000000, 139 | 00000000,00000000,00000000,00000000, 140 | 00000000,00000000,00000000,00000000, 141 | 142 | 143 | 00000000,00000000,00000000,00000000, 144 | 00000000,00000000,00000000,00000000, 145 | 00000000,00000000,00000000,00000000, 146 | 00000000,00000000,00000000,00000000, 147 | 00000000,00000000,00000000,00000000, 148 | 00000000,00000000,00000000,00000000, 149 | 00000000,00000000,00000000,00000000, 150 | 00000000,00000000,00000000,00000000, 151 | 00000000,00000000,00000000,00000000, 152 | 00000000,00000000,00000000,00000000, 153 | 00000000,00000000,00000000,00000000, 154 | 00000000,00000000,00000000,00000000, 155 | 00000000,00000000,00000000,00000000, 156 | 00000000,00000000,00000000,00000000, 157 | 00000000,00000000,00000000,00000000, 158 | 00000000,00000000,00000000,00000000, 159 | 160 | 00000000,00000000,00000000,00000000, 161 | 00000000,00000000,00000000,00000000, 162 | 00000000,00000000,00000000,00000000, 163 | 00000000,00000000,00000000,00000000, 164 | 00000000,00000000,00000000,00000000, 165 | 00000000,00000000,00000000,00000000, 166 | 00000000,00000000,00000000,00000000, 167 | 00000000,00000000,00000000,00000000, 168 | 00000000,00000000,00000000,00000000, 169 | 00000000,00000000,00000000,00000000, 170 | 00000000,00000000,00000000,00000000, 171 | 00000000,00000000,00000000,00000000, 172 | 00000000,00000000,00000000,00000000, 173 | 00000000,00000000,00000000,00000000, 174 | 00000000,00000000,00000000,00000000, 175 | 00000000,00000000,00000000,00000000, 176 | 177 | 00000000,00000000,00000000,00000000, 178 | 00000000,00000000,00000000,00000000, 179 | 00000000,00000000,00000000,00000000, 180 | 00000000,00000000,00000000,00000000, 181 | 00000000,00000000,00000000,00000000, 182 | 00000000,00000000,00000000,00000000, 183 | 00000000,00000000,00000000,00000000, 184 | 00000000,00000000,00000000,00000000, 185 | 00000000,00000000,00000000,00000000, 186 | 00000000,00000000,00000000,00000000, 187 | 00000000,00000000,00000000,00000000, 188 | 00000000,00000000,00000000,00000000, 189 | 00000000,00000000,00000000,00000000, 190 | 00000000,00000000,00000000,00000000, 191 | 00000000,00000000,00000000,00000000, 192 | 00000000,00000000,00000000,00000000, 193 | 194 | 00000000,00000000,00000000,00000000, 195 | 00000000,00000000,00000000,00000000, 196 | 00000000,00000000,00000000,00000000, 197 | 00000000,00000000,00000000,00000000, 198 | 00000000,00000000,00000000,00000000, 199 | 00000000,00000000,00000000,00000000, 200 | 00000000,00000000,00000000,00000000, 201 | 00000000,00000000,00000000,00000000, 202 | 00000000,00000000,00000000,00000000, 203 | 00000000,00000000,00000000,00000000, 204 | 00000000,00000000,00000000,00000000, 205 | 00000000,00000000,00000000,00000000, 206 | 00000000,00000000,00000000,00000000, 207 | 00000000,00000000,00000000,00000000, 208 | 00000000,00000000,00000000,00000000, 209 | 00000000,00000000,00000000,00000000, 210 | 211 | 212 | 213 | 00000000,00000000,00000000,00000000, 214 | 00000000,00000000,00000000,00000000, 215 | 00000000,00000000,00000000,00000000, 216 | 00000000,00000000,00000000,00000000, 217 | 00000000,00000000,00000000,00000000, 218 | 00000000,00000000,00000000,00000000, 219 | 00000000,00000000,00000000,00000000, 220 | 00000000,00000000,00000000,00000000, 221 | 00000000,00000000,00000000,00000000, 222 | 00000000,00000000,00000000,00000000, 223 | 00000000,00000000,00000000,00000000, 224 | 00000000,00000000,00000000,00000000, 225 | 00000000,00000000,00000000,00000000, 226 | 00000000,00000000,00000000,00000000, 227 | 00000000,00000000,00000000,00000000, 228 | 00000000,00000000,00000000,00000000, 229 | 230 | 00000000,00000000,00000000,00000000, 231 | 00000000,00000000,00000000,00000000, 232 | 00000000,00000000,00000000,00000000, 233 | 00000000,00000000,00000000,00000000, 234 | 00000000,00000000,00000000,00000000, 235 | 00000000,00000000,00000000,00000000, 236 | 00000000,00000000,00000000,00000000, 237 | 00000000,00000000,00000000,00000000, 238 | 00000000,00000000,00000000,00000000, 239 | 00000000,00000000,00000000,00000000, 240 | 00000000,00000000,00000000,00000000, 241 | 00000000,00000000,00000000,00000000, 242 | 00000000,00000000,00000000,00000000, 243 | 00000000,00000000,00000000,00000000, 244 | 00000000,00000000,00000000,00000000, 245 | 00000000,00000000,00000000,00000000, 246 | 247 | 00000000,00000000,00000000,00000000, 248 | 00000000,00000000,00000000,00000000, 249 | 00000000,00000000,00000000,00000000, 250 | 00000000,00000000,00000000,00000000, 251 | 00000000,00000000,00000000,00000000, 252 | 00000000,00000000,00000000,00000000, 253 | 00000000,00000000,00000000,00000000, 254 | 00000000,00000000,00000000,00000000, 255 | 00000000,00000000,00000000,00000000, 256 | 00000000,00000000,00000000,00000000, 257 | 00000000,00000000,00000000,00000000, 258 | 00000000,00000000,00000000,00000000, 259 | 00000000,00000000,00000000,00000000, 260 | 00000000,00000000,00000000,00000000, 261 | 00000000,00000000,00000000,00000000, 262 | 00000000,00000000,00000000,00000000, 263 | 264 | 00000000,00000000,00000000,00000000, 265 | 00000000,00000000,00000000,00000000, 266 | 00000000,00000000,00000000,00000000, 267 | 00000000,00000000,00000000,00000000, 268 | 00000000,00000000,00000000,00000000, 269 | 00000000,00000000,00000000,00000000, 270 | 00000000,00000000,00000000,00000000, 271 | 00000000,00000000,00000000,00000000, 272 | 00000000,00000000,00000000,00000000, 273 | 00000000,00000000,00000000,00000000, 274 | 00000000,00000000,00000000,00000000, 275 | 00000000,00000000,00000000,00000000, 276 | 00000000,00000000,00000000,00000000, 277 | 00000000,00000000,00000000,00000000, 278 | 00000000,00000000,00000000,00000000, 279 | 00000000,00000000,00000000,00000000 280 | ; 281 | -------------------------------------------------------------------------------- /vivado_build.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # RUN FROM WITHIN "Vivado Tcl Shell" WITH COMMAND: 3 | # source vivado_build.tcl -notrace 4 | # 5 | puts "-------------------------------------------------------" 6 | puts " STARTING SYNTHESIS STEP. " 7 | puts "-------------------------------------------------------" 8 | launch_runs synth_1 9 | puts "-------------------------------------------------------" 10 | puts " WAITING FOR SYNTHESIS STEP TO FINISH ... " 11 | puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " 12 | puts "-------------------------------------------------------" 13 | wait_on_run synth_1 14 | puts "-------------------------------------------------------" 15 | puts " STARTING IMPLEMENTATION STEP. " 16 | puts "-------------------------------------------------------" 17 | launch_runs impl_1 -to_step write_bitstream 18 | puts "-------------------------------------------------------" 19 | puts " WAITING FOR IMPLEMENTATION STEP TO FINISH ... " 20 | puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " 21 | puts "-------------------------------------------------------" 22 | wait_on_run impl_1 23 | file copy -force ./pcileech_squirrel/pcileech_squirrel.runs/impl_1/pcileech_squirrel_top.bin pcileech_squirrel.bin 24 | puts "-------------------------------------------------------" 25 | puts " BUILD HOPEFULLY COMPLETED. " 26 | puts "-------------------------------------------------------" -------------------------------------------------------------------------------- /vivado_build_100t.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # RUN FROM WITHIN "Vivado Tcl Shell" WITH COMMAND: 3 | # source vivado_build.tcl -notrace 4 | # 5 | puts "-------------------------------------------------------" 6 | puts " STARTING SYNTHESIS STEP. " 7 | puts "-------------------------------------------------------" 8 | launch_runs -jobs 6 synth_1 9 | puts "-------------------------------------------------------" 10 | puts " WAITING FOR SYNTHESIS STEP TO FINISH ... " 11 | puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " 12 | puts "-------------------------------------------------------" 13 | wait_on_run synth_1 14 | puts "-------------------------------------------------------" 15 | puts " STARTING IMPLEMENTATION STEP. " 16 | puts "-------------------------------------------------------" 17 | launch_runs -jobs 4 impl_1 -to_step write_bitstream 18 | puts "-------------------------------------------------------" 19 | puts " WAITING FOR IMPLEMENTATION STEP TO FINISH ... " 20 | puts " THIS IS LIKELY TO TAKE A VERY LONG TIME. " 21 | puts "-------------------------------------------------------" 22 | wait_on_run impl_1 23 | file copy -force ./pcileech_tbx4_100t/pcileech_tbx4_100t.runs/impl_1/pcileech_tbx4_100t_top.bin pcileech_zdma_100t_fpga0.bin 24 | puts "-------------------------------------------------------" 25 | puts " BUILD HOPEFULLY COMPLETED. " 26 | puts "-------------------------------------------------------" --------------------------------------------------------------------------------