├── LICENSE ├── apb3_v00_00_slave_rtl_v ├── sim │ ├── .install │ ├── comp_filelist │ │ └── compile_filelist.list │ └── Makefile ├── common │ ├── ip_amba_apb_slave_top_defines.vh │ └── ip_amba_apb_slave_top_parameters.vh ├── README.md └── top │ └── ip_amba_apb_slave_top.v ├── apb3_v00_00_master_rtl_v ├── sim │ ├── comp_filelist │ │ └── compile_filelist.list │ ├── .install │ └── Makefile ├── common │ ├── ip_amba_apb_top_defines.vh │ └── ip_amba_apb_top_parameters.vh ├── README.md └── top │ └── ip_amba_apb_master_top.v ├── apb4_v00_00_ms_rtl_v ├── apb4_v00_00_m_rtl_v │ ├── sim │ │ ├── comp_filelist │ │ │ └── compile_filelist.list │ │ ├── .install │ │ └── Makefile │ ├── common │ │ ├── ip_amba_apb4_m_top_defines.vh │ │ └── ip_amba_apb4_m_top_parameters.vh │ ├── README.md │ └── top │ │ └── ip_amba_apb4_m_top.v ├── apb4_v00_00_s_rtl_v │ ├── sim │ │ ├── comp_filelist │ │ │ └── compile_filelist.list │ │ ├── .install │ │ └── Makefile │ ├── common │ │ ├── ip_amba_apb4_s_top_defines.vh │ │ └── ip_amba_apb4_s_top_parameters.vh │ ├── top │ │ └── ip_amba_apb4_s_top.v │ └── README.md ├── sim │ ├── comp_filelist │ │ └── compile_filelist.list │ ├── .install │ ├── Makefile │ └── apb_tb_top.gtkw └── top │ ├── ip_amba_apb4_ms_integration_top.v │ └── apb4_master_stim_driver.sv └── README.md /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2020 k-sva 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/sim/.install: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | temp_path=`echo $PWD` 34 | 35 | # Setting the Work Environment Variable 36 | export WORK_HOME="${temp_path}/../" 37 | export UVM_PATH="/home/EDA/mentor/questasim/uvm-1.1d/" 38 | export IP_AMBA_APB_SLAVE_HOME="${temp_path}/../" 39 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/sim/comp_filelist/compile_filelist.list: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Make Sure You Have Set The $WORK_HOME Path to the VIP 34 | 35 | // Compile List 36 | 37 | // If the UVM Path Can't be given directly 38 | //+incdir+$WORK_HOME/sim_run/uvm_files/ 39 | // else 40 | //+incdir+$UVM_PATH/ 41 | 42 | +incdir+$IP_AMBA_APB_MASTER_HOME/common/ 43 | +incdir+$IP_AMBA_APB_MASTER_HOME/top/ 44 | 45 | // User Specific Defines 46 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/sim/comp_filelist/compile_filelist.list: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Make Sure You Have Set The $WORK_HOME Path to the VIP 34 | 35 | // Compile List 36 | 37 | // If the UVM Path Can't be given directly 38 | //+incdir+$WORK_HOME/sim_run/uvm_files/ 39 | // else 40 | //+incdir+$UVM_PATH/ 41 | 42 | +incdir+$IP_AMBA_APB_SLAVE_HOME/common/ 43 | +incdir+$IP_AMBA_APB_SLAVE_HOME/top/ 44 | 45 | // User Specific Defines 46 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/sim/.install: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | temp_path=`echo $PWD` 34 | 35 | # Setting the Work Environment Variable 36 | export WORK_HOME="${temp_path}/../" 37 | export UVM_PATH="/home/EDA/mentor/questasim/uvm-1.1d/" 38 | export IP_AMBA_APB_MASTER_HOME="${temp_path}/../" 39 | 40 | echo -n "WORK_HOME : "; 41 | echo $WORK_HOME; 42 | echo -n "UVM_PATH : "; 43 | echo $UVM_PATH; 44 | echo -n "IP_AMBA_APB_MASTER_HOME : "; 45 | echo $IP_AMBA_APB_MASTER_HOME; 46 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/sim/comp_filelist/compile_filelist.list: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 12:00:43 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Make Sure You Have Set The $WORK_HOME Path to the VIP 34 | 35 | // Compile List 36 | 37 | // If the UVM Path Can't be given directly 38 | //+incdir+$WORK_HOME/sim_run/uvm_files/ 39 | // else 40 | //+incdir+$UVM_PATH/ 41 | 42 | +incdir+$IP_AMBA_APB4_MASTER_HOME/common/ 43 | +incdir+$IP_AMBA_APB4_MASTER_HOME/top/ 44 | 45 | // User Specific Defines 46 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/sim/comp_filelist/compile_filelist.list: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Make Sure You Have Set The $WORK_HOME Path to the VIP 34 | 35 | // Compile List 36 | 37 | // If the UVM Path Can't be given directly 38 | //+incdir+$WORK_HOME/sim_run/uvm_files/ 39 | // else 40 | //+incdir+$UVM_PATH/ 41 | 42 | +incdir+$IP_AMBA_APB4_SLAVE_HOME/common/ 43 | +incdir+$IP_AMBA_APB4_SLAVE_HOME/top/ 44 | 45 | // User Specific Defines 46 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/sim/.install: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 11:59:42 IST, 29 March, 2021 [ Monday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | temp_path=`echo $PWD` 34 | 35 | # Setting the Work Environment Variable 36 | export WORK_HOME="${temp_path}/../" 37 | echo -n "WORK_HOME : "; 38 | echo $WORK_HOME; 39 | export UVM_PATH="/home/EDA/mentor/questasim/uvm-1.1d/" 40 | echo -n "UVM_PATH : "; 41 | echo $UVM_PATH; 42 | export IP_AMBA_APB4_MASTER_HOME="${temp_path}/../" 43 | echo -n "IP_AMBA_APB4_MASTER_HOME : "; 44 | echo $IP_AMBA_APB4_MASTER_HOME; 45 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/sim/.install: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | temp_path=`echo $PWD` 34 | 35 | # Setting the Work Environment Variable 36 | export WORK_HOME="${temp_path}/../" 37 | echo -n "WORK_HOME : "; 38 | echo $WORK_HOME; 39 | export UVM_PATH="/home/EDA/mentor/questasim/uvm-1.1d/" 40 | echo -n "UVM_PATH : "; 41 | echo $UVM_PATH; 42 | export IP_AMBA_APB4_SLAVE_HOME="${temp_path}/../" 43 | echo -n "IP_AMBA_APB4_SLAVE_HOME : "; 44 | echo $IP_AMBA_APB4_SLAVE_HOME; 45 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/sim/comp_filelist/compile_filelist.list: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 15:21:42 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Compile List 34 | 35 | // If the UVM Path Can't be given directly 36 | //+incdir+$WORK_HOME/sim_run/uvm_files/ 37 | // else 38 | //+incdir+$UVM_PATH/ 39 | 40 | -f $IP_AMBA_APB4_MASTER_HOME/sim/comp_filelist/compile_filelist.list 41 | -f $IP_AMBA_APB4_SLAVE_HOME/sim/comp_filelist/compile_filelist.list 42 | 43 | +incdir+$IP_AMBA_APB4_TB_HOME/top/ 44 | 45 | // User Specific Defines 46 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/common/ip_amba_apb_top_defines.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // PSELx Timeout Value : In terms of Clock Cycles 34 | // ---------------------------------------------- 35 | `define APB3_MST_PSEL_TIMEOUT_CYCLES 20 36 | 37 | `define APB3_MST_PSTRB_WIDTH 4 38 | `define APB3_MST_PWDATA_WIDTH 8 * `APB3_MST_PSTRB_WIDTH 39 | `define APB3_MST_PRDATA_WIDTH 32 40 | `define APB3_MST_PADDR_WIDTH 32 41 | `define APB3_MST_PSEL_WIDTH 1 42 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/common/ip_amba_apb4_m_top_defines.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:53:39 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // PSELx Timeout Value : In terms of Clock Cycles 34 | // ---------------------------------------------- 35 | `define APB4_MST_PSEL_TIMEOUT_CYCLES 20 36 | 37 | `define APB4_MST_PSTRB_WIDTH 4 38 | `define APB4_MST_PWDATA_WIDTH 8 * `APB4_MST_PSTRB_WIDTH 39 | `define APB4_MST_PRDATA_WIDTH 32 40 | `define APB4_MST_PADDR_WIDTH 32 41 | `define APB4_MST_PSEL_WIDTH 1 42 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # ip_amba_apb_ms_rtl_v 2 | 3 | This repository houses various AMBA APB master and slave protocol IPs. The protocol version which is supported by the RTLs is **Arm's AMBA3** open standard protocol. 4 | 5 | The reason for adding version numbers for the IP is that the RTL is functionally stable in every aspect, but will need more user specific features in the future and if a new feature is added; it will be provided as a stand alone IP built over the existing one. 6 | 7 | ## Contents of the repository 8 | 9 | ### APB3 Master Zero (v00.00) 10 | 11 | Located in: `apb3_v00_00_master_rtl_v/` 12 | 13 | A fully compliant AMBA APB3 Master IP with comprehensive transaction control capabilities. 14 | 15 | **Features:** 16 | - Generic application/CPU interface for easy integration 17 | - Heavy user control for transaction initiations 18 | - Parameterized interface port widths 19 | - Fully compliant with the APB3 protocol 20 | - Complete granular support for interfacing with any kind of bridge 21 | - Additional support for protocol timeout timers 22 | - Back-to-back transaction support 23 | - Asynchronous reset support 24 | 25 | ### APB3 Slave Zero (v00.00) 26 | 27 | **Note**: Ongoing Bug Fixes. Core is unusable at this moment. 28 | 29 | **Features:** 30 | - Generic memory supporting interface 31 | - Fully compliant with the APB3 protocol 32 | - Parameterized interface port widths 33 | - Modifiable granularity 34 | - No support for timeouts 35 | 36 | ### APB3 Master One (v00.00) 37 | 38 | A lighter, simplified version of the APB3 Master IP. 39 | 40 | **Features:** 41 | - Simple interface 42 | - Easy transaction generation 43 | - Parameterized design 44 | - Full APB3 compliance 45 | - Lighter version (easier to use and configure) 46 | 47 | ### APB3 Slave One (v00.00) 48 | 49 | A lighter, simplified version of the APB3 Slave IP. 50 | 51 | **Features:** 52 | - Simple interface 53 | - Easy transaction generation 54 | - Parameterized design 55 | - Full APB3 Slave compliance 56 | - Light version 57 | 58 | ## License 59 | 60 | This project is licensed under the MIT License. See individual file headers for copyright information. 61 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/common/ip_amba_apb_top_parameters.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Design Attributes Parameters 34 | // ----------------------------- 35 | `define APB3_MST_DESIGN_ATTRIBUTES #( \ 36 | parameter PRDATA_width = `APB3_MST_PRDATA_WIDTH, \ 37 | parameter PWDATA_width = `APB3_MST_PWDATA_WIDTH, \ 38 | parameter PSTRB_width = `APB3_MST_PSTRB_WIDTH, \ 39 | parameter PADDR_width = `APB3_MST_PADDR_WIDTH, \ 40 | parameter PSELx_width = `APB3_MST_PSEL_WIDTH \ 41 | ) 42 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/sim/.install: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 15:26:56 IST, 29 March, 2021 [ Monday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | temp_path=`echo $PWD` 34 | 35 | # Setting the Work Environment Variable 36 | export WORK_HOME="${temp_path}/../" 37 | echo -n "WORK_HOME : "; 38 | echo $WORK_HOME; 39 | export UVM_PATH="/home/EDA/mentor/questasim/uvm-1.1d/" 40 | echo -n "UVM_PATH : "; 41 | echo $UVM_PATH; 42 | 43 | export IP_AMBA_APB4_TB_HOME="${temp_path}/../" 44 | echo -n "IP_AMBA_APB4_TB_HOME : "; 45 | echo $IP_AMBA_APB4_TB_HOME; 46 | 47 | # Master 48 | cd $IP_AMBA_APB4_TB_HOME/apb4_v00_00_m_rtl_v/sim/; 49 | source .install 50 | 51 | # Slave 52 | cd $IP_AMBA_APB4_TB_HOME/apb4_v00_00_s_rtl_v/sim/; 53 | source .install 54 | 55 | cd $IP_AMBA_APB4_TB_HOME/sim 56 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/common/ip_amba_apb4_m_top_parameters.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:53:39 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Design Attributes Parameters 34 | // ----------------------------- 35 | `define APB4_MST_DESIGN_ATTRIBUTES #( \ 36 | parameter PRDATA_width = `APB4_MST_PRDATA_WIDTH, \ 37 | parameter PWDATA_width = `APB4_MST_PWDATA_WIDTH, \ 38 | parameter PSTRB_width = `APB4_MST_PSTRB_WIDTH, \ 39 | parameter PADDR_width = `APB4_MST_PADDR_WIDTH, \ 40 | parameter PSELx_width = `APB4_MST_PSEL_WIDTH \ 41 | ) 42 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/common/ip_amba_apb_slave_top_defines.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `define APB3_SLV_PSTRB_WIDTH 4 34 | `define APB3_SLV_PWDATA_WIDTH 8 * `APB3_SLV_PSTRB_WIDTH 35 | `define APB3_SLV_PRDATA_WIDTH 32 36 | `define APB3_SLV_PADDR_WIDTH 32 37 | `define APB3_SLV_PSEL_WIDTH 1 38 | 39 | `define APB3_SLV_BASE_ADDR 1 40 | 41 | // By default the Memory Depth is 2**MEM_ARRAY_SIZE_INT 42 | `define APB3_SLV_MEM_ARRAY_SIZE_INT 2 43 | 44 | // By Default the Declaration is in Bytes 45 | `ifndef GB 46 | `ifndef MB 47 | `ifndef B 48 | `define B 1 49 | `else 50 | `define KB 1 51 | `endif 52 | `else 53 | `define MB 1 54 | `endif 55 | `else 56 | `define GB 1 57 | `endif 58 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/common/ip_amba_apb4_s_top_defines.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 12:04:30 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `define APB4_SLV_PSTRB_WIDTH 4 34 | `define APB4_SLV_PWDATA_WIDTH 8 * `APB4_SLV_PSTRB_WIDTH 35 | `define APB4_SLV_PRDATA_WIDTH 32 36 | `define APB4_SLV_PADDR_WIDTH 32 37 | `define APB4_SLV_PSEL_WIDTH 1 38 | 39 | // By default the Memory Depth is 2**MEM_ARRAY_SIZE_INT 40 | `define APB4_SLV_MEM_ARRAY_SIZE_INT 2 41 | 42 | // By Default the Declaration is in Bytes 43 | `ifndef GB 44 | `ifndef MB 45 | `ifndef B 46 | `define B 1 47 | `else 48 | `define KB 1 49 | `endif 50 | `else 51 | `define MB 1 52 | `endif 53 | `else 54 | `define GB 1 55 | `endif 56 | 57 | `define APB4_SLV_DEV_BASE_ADDRESS 32'h0 58 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/common/ip_amba_apb_slave_top_parameters.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Design Attributes Parameters 34 | // ----------------------------- 35 | `define APB3_SLV_DESIGN_ATTRIBUTES #( \ 36 | parameter PRDATA_width = `APB3_SLV_PRDATA_WIDTH, \ 37 | parameter PWDATA_width = `APB3_SLV_PWDATA_WIDTH, \ 38 | parameter PSTRB_width = `APB3_SLV_PSTRB_WIDTH, \ 39 | parameter PADDR_width = `APB3_SLV_PADDR_WIDTH, \ 40 | parameter PSELx_width = `APB3_SLV_PSEL_WIDTH, \ 41 | parameter WORD_LENGTH = `APB3_SLV_PRDATA_WIDTH, \ 42 | parameter MEM_DEPTH = `APB3_SLV_MEM_ARRAY_SIZE_INT, \ 43 | parameter APB_BASE_ADDR = `APB3_SLV_BASE_ADDR \ 44 | ) 45 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/common/ip_amba_apb4_s_top_parameters.vh: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 12:04:37 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | // Design Attributes Parameters 34 | // ----------------------------- 35 | `define APB4_SLV_DESIGN_ATTRIBUTES #( \ 36 | parameter PRDATA_width = `APB4_SLV_PRDATA_WIDTH, \ 37 | parameter PWDATA_width = `APB4_SLV_PWDATA_WIDTH, \ 38 | parameter PSTRB_width = `APB4_SLV_PSTRB_WIDTH, \ 39 | parameter PADDR_width = `APB4_SLV_PADDR_WIDTH, \ 40 | parameter PSELx_width = `APB4_SLV_PSEL_WIDTH, \ 41 | parameter WORD_LENGTH = `APB4_SLV_PRDATA_WIDTH, \ 42 | parameter MEM_DEPTH = `APB4_SLV_MEM_ARRAY_SIZE_INT, \ 43 | parameter DEV_BASE_ADDRESS = `APB4_SLV_DEV_BASE_ADDRESS \ 44 | ) 45 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/sim/Makefile: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | # ********************** 34 | # Arguments Declarations 35 | # ********************** 36 | 37 | TESTNAME?=NO_TEST 38 | 39 | FILENAME?=./../top/ip_amba_apb_slave_top.v 40 | 41 | COMPILE_FILELIST?=./comp_filelist/compile_filelist.list 42 | 43 | TOP_NAME?=ip_amba_apb_slave_top 44 | 45 | ifdef $(DO_FILE) 46 | DO_CMD= -do $(DO_FILE) 47 | else 48 | DO_CMD= -do "run -all; quit -f" 49 | endif 50 | 51 | LINT?=0 52 | WALL?=0 53 | 54 | ifeq ($(WALL),1) 55 | WALL_ARG=-Wall 56 | else 57 | WALL__ARG= 58 | endif 59 | 60 | # ********************** 61 | # Labels Declarations 62 | # ********************** 63 | 64 | ifeq ($(LINT),1) 65 | all : clean lint lib comp opt sim 66 | else 67 | all : clean lib comp opt sim 68 | endif 69 | 70 | comp_only : clean lib comp 71 | 72 | # To Clean Redundant Files and Other Things 73 | # -------------------------------------------- 74 | clean: 75 | @echo "Running Clean Command..."; 76 | @rm -rf *.log *.vcd *.wlf; 77 | @rm -rf work questa.tops transcript; 78 | @rm -rf ./debug; 79 | @rm -rf ./obj_dir; 80 | 81 | # Compilation 82 | # -------------------------------------------- 83 | comp: 84 | @echo "Compiling the files..."; 85 | @vlog \ 86 | -64 \ 87 | -work ./work \ 88 | +acc \ 89 | -l compile.log \ 90 | -sv \ 91 | -vopt \ 92 | -writetoplevels questa.tops \ 93 | $(FILENAME) \ 94 | -f $(COMPILE_FILELIST); 95 | 96 | 97 | # Simulation 98 | # -------------------------------------------- 99 | sim: 100 | @echo "Starting Simulation..."; 101 | @vsim \ 102 | top_opt \ 103 | -wlf vsim.wlf \ 104 | $(DO_CMD) \ 105 | -l $(TESTNAME).log \ 106 | -64 \ 107 | -c \ 108 | +define+UVM_NO_DPI \ 109 | +UVM_TESTNAME=$(TESTNAME); 110 | 111 | # Library Generation 112 | # -------------------------------------------- 113 | lib: 114 | @echo "Making Work Directory..."; 115 | @vlib work; 116 | 117 | # For the Optimization 118 | # -------------------------------------------- 119 | opt: 120 | @echo "Running Optimization..."; 121 | @vopt \ 122 | +acc \ 123 | $(TOP_NAME) \ 124 | -o top_opt; 125 | 126 | # Generate WLF from VCD 127 | # -------------------------------------------- 128 | wave: 129 | @echo "Converting dump.vcd file to dump.wlf..."; 130 | @echo "Removing all the redundant dumps..."; 131 | @echo "Complete!"; 132 | @vcd2wlf dump.vcd dump.wlf; 133 | @rm -rf dump.vcd; 134 | 135 | # Move the Geberated Debug Logs 136 | # -------------------------------------------- 137 | logs: 138 | @echo "Creating a new ./debug directory..."; 139 | @mkdir ./debug; 140 | @mv *debug.log ./debug/; 141 | @echo "Moved all the logs successfully."; 142 | 143 | # For the Qverilog Command 144 | # -------------------------------------------- 145 | qv: 146 | qverilog \ 147 | $(FILENAME); 148 | 149 | qvc: clean qv 150 | 151 | # Running a Lint using Verilator 152 | # -------------------------------------------- 153 | lint: 154 | @echo "Linting the design..." 155 | @verilator \ 156 | -f $(COMPILE_FILELIST) \ 157 | $(FILENAME) \ 158 | $(WALL_ARG) \ 159 | --lint-only; 160 | @echo "Linting Complete!" 161 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/sim/Makefile: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | # ********************** 34 | # Arguments Declarations 35 | # ********************** 36 | 37 | TESTNAME?=NO_TEST 38 | 39 | FILENAME?=./../top/ip_amba_apb_master_top.v 40 | 41 | COMPILE_FILELIST?=./comp_filelist/compile_filelist.list 42 | 43 | TOP_NAME?=ip_amba_apb_master_top 44 | 45 | ifdef $(DO_FILE) 46 | DO_CMD= -do $(DO_FILE) 47 | else 48 | DO_CMD= -do "run -all; quit -f" 49 | endif 50 | 51 | LINT?=0 52 | WALL?=0 53 | 54 | ifeq ($(WALL),1) 55 | WALL_ARG=-Wall 56 | else 57 | WALL__ARG= 58 | endif 59 | 60 | # ********************** 61 | # Labels Declarations 62 | # ********************** 63 | 64 | ifeq ($(LINT),1) 65 | all : clean lint lib comp opt sim 66 | else 67 | all : clean lib comp opt sim 68 | endif 69 | 70 | comp_only : clean lib comp 71 | 72 | # To Clean Redundant Files and Other Things 73 | # -------------------------------------------- 74 | clean: 75 | @echo "Running Clean Command..."; 76 | @rm -rf *.log *.vcd *.wlf; 77 | @rm -rf work questa.tops transcript; 78 | @rm -rf ./debug; 79 | @rm -rf ./obj_dir; 80 | 81 | # Compilation 82 | # -------------------------------------------- 83 | comp: 84 | @echo "Compiling the files..."; 85 | @vlog \ 86 | -64 \ 87 | -work ./work \ 88 | +acc \ 89 | -l compile.log \ 90 | -sv \ 91 | -vopt \ 92 | -writetoplevels questa.tops \ 93 | $(FILENAME) \ 94 | -f $(COMPILE_FILELIST); 95 | 96 | 97 | # Simulation 98 | # -------------------------------------------- 99 | sim: 100 | @echo "Starting Simulation..."; 101 | @vsim \ 102 | top_opt \ 103 | -wlf vsim.wlf \ 104 | $(DO_CMD) \ 105 | -l $(TESTNAME).log \ 106 | -64 \ 107 | -c \ 108 | +define+UVM_NO_DPI \ 109 | +UVM_TESTNAME=$(TESTNAME); 110 | 111 | # Library Generation 112 | # -------------------------------------------- 113 | lib: 114 | @echo "Making Work Directory..."; 115 | @vlib work; 116 | 117 | # For the Optimization 118 | # -------------------------------------------- 119 | opt: 120 | @echo "Running Optimization..."; 121 | @vopt \ 122 | +acc \ 123 | $(TOP_NAME) \ 124 | -o top_opt; 125 | 126 | # Generate WLF from VCD 127 | # -------------------------------------------- 128 | wave: 129 | @echo "Converting dump.vcd file to dump.wlf..."; 130 | @echo "Removing all the redundant dumps..."; 131 | @echo "Complete!"; 132 | @vcd2wlf dump.vcd dump.wlf; 133 | @rm -rf dump.vcd; 134 | 135 | # Move the Geberated Debug Logs 136 | # -------------------------------------------- 137 | logs: 138 | @echo "Creating a new ./debug directory..."; 139 | @mkdir ./debug; 140 | @mv *debug.log ./debug/; 141 | @echo "Moved all the logs successfully."; 142 | 143 | # For the Qverilog Command 144 | # -------------------------------------------- 145 | qv: 146 | qverilog \ 147 | $(FILENAME); 148 | 149 | qvc: clean qv 150 | 151 | # Running a Lint using Verilator 152 | # -------------------------------------------- 153 | lint: 154 | @echo "Linting the design..." 155 | @verilator \ 156 | -f $(COMPILE_FILELIST) \ 157 | $(FILENAME) \ 158 | $(WALL_ARG) \ 159 | --lint-only; 160 | @echo "Linting Complete!" 161 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/sim/Makefile: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | # ********************** 34 | # Arguments Declarations 35 | # ********************** 36 | 37 | TESTNAME?=NO_TEST 38 | 39 | FILENAME?=./../top/ip_amba_apb4_m_top.v 40 | 41 | COMPILE_FILELIST?=./comp_filelist/compile_filelist.list 42 | 43 | TOP_NAME?=ip_amba_apb4_m_top 44 | 45 | ifdef $(DO_FILE) 46 | DO_CMD= -do $(DO_FILE) 47 | else 48 | DO_CMD= -do "run -all; quit -f" 49 | endif 50 | 51 | LINT?=0 52 | WALL?=0 53 | 54 | ifeq ($(WALL),1) 55 | WALL_ARG=-Wall 56 | else 57 | WALL__ARG= 58 | endif 59 | 60 | # ********************** 61 | # Labels Declarations 62 | # ********************** 63 | 64 | ifeq ($(LINT),1) 65 | all : clean lint lib comp opt sim 66 | else 67 | all : clean lib comp opt sim 68 | endif 69 | 70 | comp_only : clean lib comp 71 | 72 | # To Clean Redundant Files and Other Things 73 | # -------------------------------------------- 74 | clean: 75 | @echo "Running Clean Command..."; 76 | @rm -rf *.log *.vcd *.wlf; 77 | @rm -rf work questa.tops transcript; 78 | @rm -rf ./debug; 79 | @rm -rf ./obj_dir; 80 | 81 | # Compilation 82 | # -------------------------------------------- 83 | comp: 84 | @echo "Compiling the files..."; 85 | @vlog \ 86 | -64 \ 87 | -work ./work \ 88 | +acc \ 89 | -l compile.log \ 90 | -sv \ 91 | -vopt \ 92 | -writetoplevels questa.tops \ 93 | $(FILENAME) \ 94 | -f $(COMPILE_FILELIST); 95 | 96 | 97 | # Simulation 98 | # -------------------------------------------- 99 | sim: 100 | @echo "Starting Simulation..."; 101 | @vsim \ 102 | top_opt \ 103 | -wlf vsim.wlf \ 104 | $(DO_CMD) \ 105 | -l $(TESTNAME).log \ 106 | -64 \ 107 | -c \ 108 | +define+UVM_NO_DPI \ 109 | +UVM_TESTNAME=$(TESTNAME); 110 | 111 | # Library Generation 112 | # -------------------------------------------- 113 | lib: 114 | @echo "Making Work Directory..."; 115 | @vlib work; 116 | 117 | # For the Optimization 118 | # -------------------------------------------- 119 | opt: 120 | @echo "Running Optimization..."; 121 | @vopt \ 122 | +acc \ 123 | $(TOP_NAME) \ 124 | -o top_opt; 125 | 126 | # Generate WLF from VCD 127 | # -------------------------------------------- 128 | wave: 129 | @echo "Converting dump.vcd file to dump.wlf..."; 130 | @echo "Removing all the redundant dumps..."; 131 | @echo "Complete!"; 132 | @vcd2wlf dump.vcd dump.wlf; 133 | @rm -rf dump.vcd; 134 | 135 | # Move the Geberated Debug Logs 136 | # -------------------------------------------- 137 | logs: 138 | @echo "Creating a new ./debug directory..."; 139 | @mkdir ./debug; 140 | @mv *debug.log ./debug/; 141 | @echo "Moved all the logs successfully."; 142 | 143 | # For the Qverilog Command 144 | # -------------------------------------------- 145 | qv: 146 | qverilog \ 147 | $(FILENAME); 148 | 149 | qvc: clean qv 150 | 151 | # Running a Lint using Verilator 152 | # -------------------------------------------- 153 | lint: 154 | @echo "Linting the design..." 155 | @verilator \ 156 | -f $(COMPILE_FILELIST) \ 157 | $(FILENAME) \ 158 | $(WALL_ARG) \ 159 | --lint-only; 160 | @echo "Linting Complete!" 161 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/sim/Makefile: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | # ********************** 34 | # Arguments Declarations 35 | # ********************** 36 | 37 | TESTNAME?=NO_TEST 38 | 39 | FILENAME?=./../top/ip_amba_apb4_s_top.v 40 | 41 | COMPILE_FILELIST?=./comp_filelist/compile_filelist.list 42 | 43 | TOP_NAME?=ip_amba_apb4_s_top 44 | 45 | ifdef $(DO_FILE) 46 | DO_CMD= -do $(DO_FILE) 47 | else 48 | DO_CMD= -do "run -all; quit -f" 49 | endif 50 | 51 | LINT?=0 52 | WALL?=0 53 | 54 | ifeq ($(WALL),1) 55 | WALL_ARG=-Wall 56 | else 57 | WALL__ARG= 58 | endif 59 | 60 | # ********************** 61 | # Labels Declarations 62 | # ********************** 63 | 64 | ifeq ($(LINT),1) 65 | all : clean lint lib comp opt sim 66 | else 67 | all : clean lib comp opt sim 68 | endif 69 | 70 | comp_only : clean lib comp 71 | 72 | # To Clean Redundant Files and Other Things 73 | # -------------------------------------------- 74 | clean: 75 | @echo "Running Clean Command..."; 76 | @rm -rf *.log *.vcd *.wlf; 77 | @rm -rf work questa.tops transcript; 78 | @rm -rf ./debug; 79 | @rm -rf ./obj_dir; 80 | 81 | # Compilation 82 | # -------------------------------------------- 83 | comp: 84 | @echo "Compiling the files..."; 85 | @vlog \ 86 | -64 \ 87 | -work ./work \ 88 | +acc \ 89 | -l compile.log \ 90 | -sv \ 91 | -vopt \ 92 | -writetoplevels questa.tops \ 93 | $(FILENAME) \ 94 | -f $(COMPILE_FILELIST); 95 | 96 | 97 | # Simulation 98 | # -------------------------------------------- 99 | sim: 100 | @echo "Starting Simulation..."; 101 | @vsim \ 102 | top_opt \ 103 | -wlf vsim.wlf \ 104 | $(DO_CMD) \ 105 | -l $(TESTNAME).log \ 106 | -64 \ 107 | -c \ 108 | +define+UVM_NO_DPI \ 109 | +UVM_TESTNAME=$(TESTNAME); 110 | 111 | # Library Generation 112 | # -------------------------------------------- 113 | lib: 114 | @echo "Making Work Directory..."; 115 | @vlib work; 116 | 117 | # For the Optimization 118 | # -------------------------------------------- 119 | opt: 120 | @echo "Running Optimization..."; 121 | @vopt \ 122 | +acc \ 123 | $(TOP_NAME) \ 124 | -o top_opt; 125 | 126 | # Generate WLF from VCD 127 | # -------------------------------------------- 128 | wave: 129 | @echo "Converting dump.vcd file to dump.wlf..."; 130 | @echo "Removing all the redundant dumps..."; 131 | @echo "Complete!"; 132 | @vcd2wlf dump.vcd dump.wlf; 133 | @rm -rf dump.vcd; 134 | 135 | # Move the Geberated Debug Logs 136 | # -------------------------------------------- 137 | logs: 138 | @echo "Creating a new ./debug directory..."; 139 | @mkdir ./debug; 140 | @mv *debug.log ./debug/; 141 | @echo "Moved all the logs successfully."; 142 | 143 | # For the Qverilog Command 144 | # -------------------------------------------- 145 | qv: 146 | qverilog \ 147 | $(FILENAME); 148 | 149 | qvc: clean qv 150 | 151 | # Running a Lint using Verilator 152 | # -------------------------------------------- 153 | lint: 154 | @echo "Linting the design..." 155 | @verilator \ 156 | -f $(COMPILE_FILELIST) \ 157 | $(FILENAME) \ 158 | $(WALL_ARG) \ 159 | --lint-only; 160 | @echo "Linting Complete!" 161 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/sim/Makefile: -------------------------------------------------------------------------------- 1 | # ----------------------------------------------------------------------------------- 2 | # Module Name : 3 | # Date Created : 15:28:36 IST, 29 March, 2021 [ Monday ] 4 | # 5 | # Author : pxvi 6 | # Description : 7 | # ----------------------------------------------------------------------------------- 8 | # 9 | # MIT License 10 | # 11 | # Copyright (c) 2020 k-sva 12 | # 13 | # Permission is hereby granted, free of charge, to any person obtaining a copy 14 | # of this software and associated documentation files (the Software), to deal 15 | # in the Software without restriction, including without limitation the rights 16 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | # copies of the Software, and to permit persons to whom the Software is 18 | # furnished to do so, subject to the following conditions: 19 | # 20 | # The above copyright notice and this permission notice shall be included in all 21 | # copies or substantial portions of the Software. 22 | # 23 | # THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | # SOFTWARE. 30 | # 31 | # ----------------------------------------------------------------------------------- */ 32 | 33 | # ********************** 34 | # Arguments Declarations 35 | # ********************** 36 | 37 | TESTNAME?=NO_TEST 38 | 39 | FILENAME?=./../top/ip_amba_apb4_ms_integration_top.v 40 | 41 | COMPILE_FILELIST?=./comp_filelist/compile_filelist.list 42 | 43 | TOP_NAME?=ip_amba_apb4_ms_integration_top 44 | 45 | ifdef $(DO_FILE) 46 | DO_CMD= -do $(DO_FILE) 47 | else 48 | DO_CMD= -do "run -all; quit -f" 49 | endif 50 | 51 | DUMP?=0 52 | ENABLE_TB?=0 53 | LINT?=0 54 | WALL?=0 55 | 56 | ifeq ($(WALL),1) 57 | WALL_ARG=-Wall 58 | else 59 | WALL__ARG= 60 | endif 61 | 62 | ifeq ($(LINT),1) 63 | TB_STIMULUS_ARGS= 64 | else 65 | ifeq ($(ENABLE_TB),1) 66 | TB_STIMULUS_ARGS=+define+TESTBENCH_STIMULUS_ENABLED 67 | endif 68 | endif 69 | 70 | ifeq ($(DUMP),1) 71 | DUMP_ARG=+define+ENABLE_DUMP 72 | endif 73 | 74 | # ********************** 75 | # Labels Declarations 76 | # ********************** 77 | 78 | ifeq ($(LINT),1) 79 | all : clean lint lib comp opt sim 80 | else 81 | all : clean lib comp opt sim 82 | endif 83 | 84 | comp_only : clean lib comp 85 | 86 | # To Clean Redundant Files and Other Things 87 | # -------------------------------------------- 88 | clean: 89 | @echo "Running Clean Command..."; 90 | @rm -rf *.log *.vcd *.wlf *.fst; 91 | @rm -rf work questa.tops transcript; 92 | @rm -rf ./debug; 93 | @rm -rf ./obj_dir; 94 | 95 | # Compilation 96 | # -------------------------------------------- 97 | comp: 98 | @echo "Compiling the files..."; 99 | @vlog \ 100 | -64 \ 101 | -work ./work \ 102 | +acc \ 103 | -l compile.log \ 104 | -sv \ 105 | -vopt \ 106 | $(TB_STIMULUS_ARGS) \ 107 | $(DUMP_ARG) \ 108 | -writetoplevels questa.tops \ 109 | $(FILENAME) \ 110 | -f $(COMPILE_FILELIST); 111 | 112 | 113 | # Simulation 114 | # -------------------------------------------- 115 | sim: 116 | @echo "Starting Simulation..."; 117 | @vsim \ 118 | top_opt \ 119 | -wlf vsim.wlf \ 120 | $(DO_CMD) \ 121 | -l $(TESTNAME).log \ 122 | -64 \ 123 | -c \ 124 | +define+UVM_NO_DPI \ 125 | $(DUMP_ARG) \ 126 | +UVM_TESTNAME=$(TESTNAME); 127 | 128 | # Library Generation 129 | # -------------------------------------------- 130 | lib: 131 | @echo "Making Work Directory..."; 132 | @vlib work; 133 | 134 | # For the Optimization 135 | # -------------------------------------------- 136 | opt: 137 | @echo "Running Optimization..."; 138 | @vopt \ 139 | -64 \ 140 | +acc \ 141 | $(TOP_NAME) \ 142 | -o top_opt; 143 | 144 | # Generate WLF from VCD 145 | # -------------------------------------------- 146 | wave: 147 | @echo "Converting dump.vcd file to dump.wlf..."; 148 | @echo "Removing all the redundant dumps..."; 149 | @echo "Complete!"; 150 | @vcd2wlf dump.vcd dump.wlf; 151 | @rm -rf dump.vcd; 152 | 153 | # Move the Geberated Debug Logs 154 | # -------------------------------------------- 155 | logs: 156 | @echo "Creating a new ./debug directory..."; 157 | @mkdir ./debug; 158 | @mv *debug.log ./debug/; 159 | @echo "Moved all the logs successfully."; 160 | 161 | # For the Qverilog Command 162 | # -------------------------------------------- 163 | qv: 164 | qverilog \ 165 | $(FILENAME); 166 | 167 | qvc: clean qv 168 | 169 | # Running a Lint using Verilator 170 | # -------------------------------------------- 171 | lint: 172 | @echo "Linting the design..." 173 | @verilator \ 174 | -f $(COMPILE_FILELIST) \ 175 | $(FILENAME) \ 176 | $(WALL_ARG) \ 177 | --lint-only; 178 | @echo "Linting Complete!" 179 | 180 | # Open TB GTKWave 181 | # -------------------------------------------- 182 | gtk: 183 | @echo "Open gtkwave..." 184 | @gtkwave -o apb_tb_top.gtkw & 185 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/top/ip_amba_apb4_s_top.v: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 12:04:16 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `include "ip_amba_apb4_s_top_defines.vh" 34 | `include "ip_amba_apb4_s_top_parameters.vh" 35 | 36 | module ip_amba_apb4_s_top `APB4_SLV_DESIGN_ATTRIBUTES ( 37 | 38 | // APB Interface Side Signals 39 | // Global Inputs 40 | PCLK, 41 | PRESETn, 42 | 43 | // Slave Inputs 44 | PADDR, 45 | PPROT, 46 | PSELx, 47 | PENABLE, 48 | PWRITE, 49 | PWDATA, 50 | PSTRB, 51 | 52 | // Slave Outputs 53 | PREADY, 54 | PRDATA, 55 | PSLVERR 56 | ); 57 | 58 | input wire PCLK; 59 | input wire PRESETn; 60 | 61 | output reg PREADY; 62 | output reg [PRDATA_width-1:0] PRDATA; 63 | output reg PSLVERR; 64 | 65 | input wire [PADDR_width-1:0] PADDR; 66 | input wire [3-1:0] PPROT; 67 | input wire PSELx; 68 | input wire PENABLE; 69 | input wire PWRITE; 70 | input wire [PWDATA_width-1:0] PWDATA; 71 | input wire [PSTRB_width-1:0] PSTRB; 72 | 73 | localparam DEBUG_WAIT_STATES = 0; // For testing purposes only 74 | 75 | // Local Variables 76 | // --------------- 77 | integer i; 78 | integer count; 79 | 80 | // Memory Declaration 81 | // ------------------ 82 | reg [WORD_LENGTH-1:0] MEM[MEM_DEPTH-1:0]; 83 | 84 | // State Machine 85 | // ------------- 86 | always@( posedge PCLK or negedge PRESETn ) 87 | begin 88 | for( i = 0; i < MEM_DEPTH; i = i + 1 ) 89 | begin 90 | MEM[i] <= MEM[i]; 91 | end 92 | 93 | if( !PRESETn ) 94 | begin 95 | PREADY <= 1; // Default Value 96 | PSLVERR <= 0; // Default Value for now 97 | end 98 | else 99 | begin 100 | if( PSELx && ( !PENABLE || !PREADY ) ) 101 | begin 102 | if( PWRITE ) 103 | begin 104 | // Writing Logic Goes Here. PRREADY needs to be deasserted 105 | // when more than one clock will be used to write data 106 | 107 | /* 108 | * Logic here will make sure the PREADY is deasserted if the 109 | * data has not been written completely in this cycle 110 | */ 111 | 112 | for( i = 0; i < PSTRB_width; i = i + 1 ) 113 | begin 114 | MEM[PADDR][8*i+:8] <= PWDATA[8*i+:8] & {8{PSTRB[i]}}; 115 | //$display( "%d", PSTRB[i] ); 116 | end 117 | //$display( "%8d - Write done ( Addr - %d, Data - %d, Strobe - %d )", $time, PADDR, PWDATA, PSTRB ); 118 | end 119 | else 120 | begin 121 | // Reading Logic Goes Here. PRREADY needs to be deasserted 122 | // here when more than one clock is needed to retrieve data. 123 | 124 | /* 125 | * Logic here will make sure the PREADY is deasserted if the 126 | * data has not been read back completely in this cycle 127 | */ 128 | 129 | PRDATA <= MEM[PADDR]; 130 | $display( "%8d - Read done ( Addr - %d, Data - %d )", $time, PADDR, MEM[PADDR] ); 131 | end 132 | end 133 | end 134 | end 135 | 136 | endmodule 137 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_s_rtl_v/README.md: -------------------------------------------------------------------------------- 1 | # APB4 Slave RTL (v00.00) - One 2 | 3 | A fully compliant AMBA APB4 Slave IP core with parameterized interface widths and internal memory support. 4 | 5 | ## Overview 6 | 7 | This IP implements a complete AMBA APB4 Slave controller with an internal memory array. The design provides a simple, configurable memory interface that is fully compliant with the APB4 protocol specification. 8 | 9 | ## Features 10 | 11 | - **Parameterized Interface Ports**: Fully configurable data, address, and control signal widths 12 | - **Full APB4 Protocol Compliance**: Implements all required APB4 protocol states and signals 13 | - **Internal Memory Array**: Configurable memory depth and word length 14 | - **Byte-Level Write Support**: Write strobe (PSTRB) support for byte-level writes 15 | - **Zero-Wait-State Operation**: Always-ready operation for maximum throughput 16 | - **Asynchronous Reset Support**: Active-low asynchronous reset 17 | 18 | ## Configuration and Naming Conventions 19 | 20 | The APB4 Slave One RTL uses a unique naming convention with the `APB4_SLV_` prefix to ensure no conflicts with other IPs. All configuration defines are located in `common/ip_amba_apb4_s_top_defines.vh`: 21 | 22 | ### Configuration Defines 23 | 24 | - `APB4_SLV_PSTRB_WIDTH`: Write strobe width in bytes (default: 4) 25 | - `APB4_SLV_PWDATA_WIDTH`: Write data width in bits (default: 8 * PSTRB_WIDTH = 32) 26 | - `APB4_SLV_PRDATA_WIDTH`: Read data width in bits (default: 32) 27 | - `APB4_SLV_PADDR_WIDTH`: Address width in bits (default: 32) 28 | - `APB4_SLV_PSEL_WIDTH`: Slave select signal width (default: 1) 29 | - `APB4_SLV_MEM_ARRAY_SIZE_INT`: Memory array size exponent (default: 2, resulting in 2^2 = 4 words) 30 | - `APB4_SLV_DEV_BASE_ADDRESS`: Device base address (default: 32'h0) 31 | 32 | ### Parameter Declaration Macro 33 | 34 | The module uses the `APB4_SLV_DESIGN_ATTRIBUTES` macro (defined in `common/ip_amba_apb4_s_top_parameters.vh`) for parameterized instantiation. This macro allows customization of all interface widths, memory depth, and base address during module instantiation. 35 | 36 | ## Module Interface 37 | 38 | ### Top-Level Module: `ip_amba_apb4_s_top` 39 | 40 | #### APB4 Protocol Signals 41 | 42 | **Clock and Reset:** 43 | - `PCLK`: APB clock input 44 | - `PRESETn`: APB active-low reset input 45 | 46 | **Slave Inputs:** 47 | - `PADDR[PADDR_width-1:0]`: Address bus 48 | - `PPROT[2:0]`: Protection type 49 | - `PSELx[PSELx_width-1:0]`: Peripheral select signal 50 | - `PENABLE`: Enable signal for access phase 51 | - `PWRITE`: Write/read control (1 = write, 0 = read) 52 | - `PWDATA[PWDATA_width-1:0]`: Write data bus 53 | - `PSTRB[PSTRB_width-1:0]`: Write strobe signals 54 | 55 | **Slave Outputs:** 56 | - `PREADY`: Ready signal indicating transaction completion (always asserted) 57 | - `PRDATA[PRDATA_width-1:0]`: Read data bus 58 | - `PSLVERR`: Slave error response (currently not used, defaults to 0) 59 | 60 | ## Memory Organization 61 | 62 | The slave implements an internal memory array with the following characteristics: 63 | 64 | - **Memory Depth**: Configurable via `MEM_DEPTH` parameter (default: 2^MEM_ARRAY_SIZE_INT) 65 | - **Word Length**: Configurable via `WORD_LENGTH` parameter (default: PRDATA_width) 66 | - **Byte-Level Writes**: Write strobe (PSTRB) allows selective byte writes within a word 67 | - **Direct Addressing**: Memory accessed directly via PADDR 68 | 69 | ### Write Operation 70 | 71 | - Each byte within a word can be selectively written using PSTRB 72 | - PSTRB[i] = 1 enables write to byte i of the word 73 | - Write data is masked with PSTRB before being written to memory 74 | 75 | ### Read Operation 76 | 77 | - Complete word is read from memory location specified by PADDR 78 | - Read data is available on PRDATA in the ACCESS phase 79 | 80 | ## Protocol Compliance 81 | 82 | The IP implements a standard APB4 slave interface with: 83 | 84 | - **SETUP Phase**: Address and control signals are sampled 85 | - **ACCESS Phase**: Data transfer occurs when PENABLE is asserted 86 | - **PREADY Handling**: Always asserted (zero-wait-state operation) 87 | - **Error Handling**: PSLVERR currently defaults to 0 (can be extended for address validation) 88 | 89 | ## File Structure 90 | 91 | ``` 92 | apb4_v00_00_s_rtl_v/ 93 | ├── common/ 94 | │ ├── ip_amba_apb4_s_top_defines.vh # Configuration defines 95 | │ └── ip_amba_apb4_s_top_parameters.vh # Parameter declaration macro 96 | ├── top/ 97 | │ └── ip_amba_apb4_s_top.v # Top-level module 98 | └── README.md # This file 99 | ``` 100 | 101 | ## Usage Example 102 | 103 | ```verilog 104 | `include "common/ip_amba_apb4_s_top_defines.vh" 105 | `include "common/ip_amba_apb4_s_top_parameters.vh" 106 | 107 | ip_amba_apb4_s_top `APB4_SLV_DESIGN_ATTRIBUTES ( 108 | // APB Interface 109 | .PCLK(clk), 110 | .PRESETn(rstn), 111 | .PADDR(apb_addr), 112 | .PPROT(apb_prot), 113 | .PSELx(apb_sel), 114 | .PENABLE(apb_enable), 115 | .PWRITE(apb_write), 116 | .PWDATA(apb_wdata), 117 | .PSTRB(apb_strb), 118 | .PREADY(slave_ready), 119 | .PRDATA(slave_rdata), 120 | .PSLVERR(slave_error) 121 | ); 122 | ``` 123 | 124 | ## License 125 | 126 | This project is licensed under the MIT License. See individual file headers for copyright information. 127 | 128 | Copyright (c) 2020 k-sva 129 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/README.md: -------------------------------------------------------------------------------- 1 | # APB3 Slave RTL (v00.00) - Zero 2 | 3 | A fully compliant AMBA APB3 Slave IP core with parameterized interface widths and internal memory support. 4 | 5 | ## Overview 6 | 7 | This IP implements a complete AMBA APB3 Slave controller that acts as a simple memory storage device. The design provides a programmable base address register for flexible memory access and includes address boundary checking with error reporting. 8 | 9 | ## Features 10 | 11 | - **Parameterized Interface Ports**: Fully configurable data, address, and control signal widths 12 | - **Full APB3 Protocol Compliance**: Implements all required APB3 protocol states and signals 13 | - **Internal Memory Array**: Configurable memory depth and word length 14 | - **Programmable Base Address**: Base address register allows offset-based memory access 15 | - **Address Boundary Checking**: PSLVERR assertion for out-of-bounds accesses 16 | - **Granular Control**: Efficient integration with memory or specific applications 17 | - **Asynchronous Reset Support**: Active-low asynchronous reset 18 | 19 | ## Configuration and Naming Conventions 20 | 21 | The APB3 Slave Zero RTL uses a unique naming convention with the `APB3_SLV_` prefix to ensure no conflicts with other IPs. All configuration defines are located in `common/ip_amba_apb_slave_top_defines.vh`: 22 | 23 | ### Configuration Defines 24 | 25 | - `APB3_SLV_PSTRB_WIDTH`: Write strobe width in bytes (default: 4) 26 | - `APB3_SLV_PWDATA_WIDTH`: Write data width in bits (default: 8 * PSTRB_WIDTH = 32) 27 | - `APB3_SLV_PRDATA_WIDTH`: Read data width in bits (default: 32) 28 | - `APB3_SLV_PADDR_WIDTH`: Address width in bits (default: 32) 29 | - `APB3_SLV_PSEL_WIDTH`: Slave select signal width (default: 1) 30 | - `APB3_SLV_BASE_ADDR`: Default base address value (default: 1) 31 | - `APB3_SLV_MEM_ARRAY_SIZE_INT`: Memory array size exponent (default: 2, resulting in 2^2 = 4 words) 32 | 33 | ### Parameter Declaration Macro 34 | 35 | The module uses the `APB3_SLV_DESIGN_ATTRIBUTES` macro (defined in `common/ip_amba_apb_slave_top_parameters.vh`) for parameterized instantiation. This macro allows customization of all interface widths, memory depth, and base address during module instantiation. 36 | 37 | ## Module Interface 38 | 39 | ### Top-Level Module: `ip_amba_apb_slave_top` 40 | 41 | #### APB3 Protocol Signals 42 | 43 | **Clock and Reset:** 44 | - `PCLK`: APB clock input 45 | - `PRESETn`: APB active-low reset input 46 | 47 | **Slave Inputs:** 48 | - `PADDR[PADDR_width-1:0]`: Address bus 49 | - `PPROT[2:0]`: Protection type 50 | - `PSELx[PSELx_width-1:0]`: Peripheral select signal 51 | - `PENABLE`: Enable signal for access phase 52 | - `PWRITE`: Write/read control (1 = write, 0 = read) 53 | - `PWDATA[PWDATA_width-1:0]`: Write data bus 54 | - `PSTRB[PSTRB_width-1:0]`: Write strobe signals 55 | 56 | **Slave Outputs:** 57 | - `PREADY`: Ready signal indicating transaction completion 58 | - `PRDATA[PRDATA_width-1:0]`: Read data bus 59 | - `PSLVERR`: Slave error response (asserted for out-of-bounds accesses) 60 | 61 | ## Memory Organization 62 | 63 | The slave implements an internal memory array with the following characteristics: 64 | 65 | - **Memory Depth**: Configurable via `MEM_DEPTH` parameter (default: 2^MEM_ARRAY_SIZE_INT) 66 | - **Word Length**: Configurable via `WORD_LENGTH` parameter (default: PRDATA_width) 67 | - **Base Address Register**: Located at address 0x0, programmable to set the lower address boundary 68 | - **Address Mapping**: Memory access uses offset addressing relative to the base address register 69 | 70 | ### Base Address Register 71 | 72 | The base address register provides the following functionality: 73 | 74 | - Default value after reset: `APB_BASE_ADDR` (default: 1) 75 | - Allows memory access using offsets relative to the programmed base address 76 | - Out-of-bounds accesses (relative to base address) result in PSLVERR assertion 77 | - Can be written via APB write transactions to address 0x0 78 | 79 | ## Protocol Compliance 80 | 81 | The IP implements a standard APB3 slave interface with: 82 | 83 | - **SETUP Phase**: Address and control signals are sampled 84 | - **ACCESS Phase**: Data transfer occurs when PENABLE is asserted 85 | - **PREADY Handling**: Always asserted (zero-wait-state operation) 86 | - **Error Handling**: PSLVERR asserted for invalid address ranges 87 | 88 | ## File Structure 89 | 90 | ``` 91 | apb3_v00_00_slave_rtl_v/ 92 | ├── common/ 93 | │ ├── ip_amba_apb_slave_top_defines.vh # Configuration defines 94 | │ └── ip_amba_apb_slave_top_parameters.vh # Parameter declaration macro 95 | ├── top/ 96 | │ └── ip_amba_apb_slave_top.v # Top-level module 97 | └── README.md # This file 98 | ``` 99 | 100 | ## Usage Example 101 | 102 | ```verilog 103 | `include "common/ip_amba_apb_slave_top_defines.vh" 104 | `include "common/ip_amba_apb_slave_top_parameters.vh" 105 | 106 | ip_amba_apb_slave_top `APB3_SLV_DESIGN_ATTRIBUTES ( 107 | // APB Interface 108 | .PCLK(clk), 109 | .PRESETn(rstn), 110 | .PADDR(apb_addr), 111 | .PPROT(apb_prot), 112 | .PSELx(apb_sel), 113 | .PENABLE(apb_enable), 114 | .PWRITE(apb_write), 115 | .PWDATA(apb_wdata), 116 | .PSTRB(apb_strb), 117 | .PREADY(slave_ready), 118 | .PRDATA(slave_rdata), 119 | .PSLVERR(slave_error) 120 | ); 121 | ``` 122 | 123 | ## License 124 | 125 | This project is licensed under the MIT License. See individual file headers for copyright information. 126 | 127 | Copyright (c) 2020 k-sva 128 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/README.md: -------------------------------------------------------------------------------- 1 | # APB4 Master RTL (v00.00) - One 2 | 3 | A fully compliant AMBA APB4 Master IP core with parameterized interface widths and simplified application interface. 4 | 5 | ## Overview 6 | 7 | This IP implements a complete AMBA APB4 Master controller with a lightweight, easy-to-use application interface. The design emphasizes simplicity while maintaining full protocol compliance and efficient transaction handling. 8 | 9 | ## Features 10 | 11 | - **Parameterized Interface Ports**: Fully configurable data, address, and control signal widths 12 | - **Simplified Application Interface**: Easy-to-use interface for transaction initiation 13 | - **Full APB4 Protocol Compliance**: Implements all required APB4 protocol states and signals 14 | - **Granular Transaction Control**: Fine-grained control over transaction initiation 15 | - **Back-to-Back Transaction Support**: Efficient handling of consecutive data transactions 16 | - **Asynchronous Reset Support**: Active-low asynchronous reset 17 | - **Zero-Wait-State Ready**: Application interface ready signal for immediate transaction acceptance 18 | 19 | ## Configuration and Naming Conventions 20 | 21 | The APB4 Master One RTL uses a unique naming convention with the `APB4_MST_` prefix to ensure no conflicts with other IPs. All configuration defines are located in `common/ip_amba_apb4_m_top_defines.vh`: 22 | 23 | ### Configuration Defines 24 | 25 | - `APB4_MST_PSEL_TIMEOUT_CYCLES`: Timeout value for PSELx signal in clock cycles (default: 20) 26 | - `APB4_MST_PSTRB_WIDTH`: Write strobe width in bytes (default: 4) 27 | - `APB4_MST_PWDATA_WIDTH`: Write data width in bits (default: 8 * PSTRB_WIDTH = 32) 28 | - `APB4_MST_PRDATA_WIDTH`: Read data width in bits (default: 32) 29 | - `APB4_MST_PADDR_WIDTH`: Address width in bits (default: 32) 30 | - `APB4_MST_PSEL_WIDTH`: Slave select signal width (default: 1) 31 | 32 | ### Parameter Declaration Macro 33 | 34 | The module uses the `APB4_MST_DESIGN_ATTRIBUTES` macro (defined in `common/ip_amba_apb4_m_top_parameters.vh`) for parameterized instantiation. This macro allows customization of all interface widths during module instantiation. 35 | 36 | ## Module Interface 37 | 38 | ### Top-Level Module: `ip_amba_apb4_m_top` 39 | 40 | #### APB4 Protocol Signals 41 | 42 | **Clock and Reset:** 43 | - `PCLK`: APB clock input 44 | - `PRESETn`: APB active-low reset input 45 | 46 | **Master Outputs:** 47 | - `PADDR[PADDR_width-1:0]`: Address bus 48 | - `PPROT[2:0]`: Protection type 49 | - `PSELx[PSELx_width-1:0]`: Peripheral select signal 50 | - `PENABLE`: Enable signal for access phase 51 | - `PWRITE`: Write/read control (1 = write, 0 = read) 52 | - `PWDATA[PWDATA_width-1:0]`: Write data bus 53 | - `PSTRB[PSTRB_width-1:0]`: Write strobe signals 54 | 55 | **Master Inputs:** 56 | - `PREADY`: Ready signal from slave 57 | - `PRDATA[PRDATA_width-1:0]`: Read data bus from slave 58 | - `PSLVERR`: Slave error response 59 | 60 | #### Application Interface 61 | 62 | **Control Inputs:** 63 | - `vld_ap`: Valid transaction request 64 | - `rw_ap`: Read/write control (1 = write, 0 = read) 65 | - `addr_ap[PADDR_width-1:0]`: Transaction address 66 | - `wdata_ap[PWDATA_width-1:0]`: Write data for write transactions 67 | - `wstrb_ap[PSTRB_width-1:0]`: Write strobe for write transactions 68 | 69 | **Status Outputs:** 70 | - `rdy_ap`: Ready signal indicating when the master can accept new transactions 71 | - `rdata_ap[PRDATA_width-1:0]`: Read data from completed read transactions 72 | - `err_ap`: Error flag (set when PSLVERR is asserted) 73 | 74 | ## Protocol State Machine 75 | 76 | The IP implements a standard APB4 three-state finite state machine: 77 | 78 | 1. **IDLE**: Default state, waiting for transaction request (rdy_ap = 1) 79 | 2. **SETUP**: Address and control signals are set up, PSELx is asserted (rdy_ap = 0) 80 | 3. **ACCESS**: PENABLE is asserted, waiting for PREADY from slave (rdy_ap = 0) 81 | 82 | The state machine handles: 83 | - Normal transaction completion 84 | - Back-to-back transactions (when vld_ap remains asserted) 85 | - Error responses (PSLVERR) 86 | 87 | ## Application Interface Behavior 88 | 89 | - **rdy_ap**: Asserted in IDLE and ACCESS states, deasserted in SETUP state 90 | - **Transaction Initiation**: When vld_ap is asserted and rdy_ap is high, transaction starts 91 | - **Back-to-Back Transactions**: If vld_ap remains asserted after PREADY, next transaction begins immediately 92 | - **Error Reporting**: err_ap mirrors PSLVERR signal 93 | 94 | ## File Structure 95 | 96 | ``` 97 | apb4_v00_00_m_rtl_v/ 98 | ├── common/ 99 | │ ├── ip_amba_apb4_m_top_defines.vh # Configuration defines 100 | │ └── ip_amba_apb4_m_top_parameters.vh # Parameter declaration macro 101 | ├── top/ 102 | │ └── ip_amba_apb4_m_top.v # Top-level module 103 | └── README.md # This file 104 | ``` 105 | 106 | ## Usage Example 107 | 108 | ```verilog 109 | `include "common/ip_amba_apb4_m_top_defines.vh" 110 | `include "common/ip_amba_apb4_m_top_parameters.vh" 111 | 112 | ip_amba_apb4_m_top `APB4_MST_DESIGN_ATTRIBUTES ( 113 | // APB Interface 114 | .PCLK(clk), 115 | .PRESETn(rstn), 116 | .PREADY(slave_ready), 117 | .PRDATA(slave_rdata), 118 | .PSLVERR(slave_error), 119 | .PADDR(apb_addr), 120 | .PPROT(apb_prot), 121 | .PSELx(apb_sel), 122 | .PENABLE(apb_enable), 123 | .PWRITE(apb_write), 124 | .PWDATA(apb_wdata), 125 | .PSTRB(apb_strb), 126 | 127 | // Application Interface 128 | .vld_ap(app_valid), 129 | .rw_ap(app_write), 130 | .addr_ap(app_addr), 131 | .wdata_ap(app_wdata), 132 | .wstrb_ap(app_strb), 133 | .rdy_ap(app_ready), 134 | .rdata_ap(app_rdata), 135 | .err_ap(app_error) 136 | ); 137 | ``` 138 | 139 | ## License 140 | 141 | This project is licensed under the MIT License. See individual file headers for copyright information. 142 | 143 | Copyright (c) 2020 k-sva 144 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/README.md: -------------------------------------------------------------------------------- 1 | # APB3 Master RTL (v00.00) - Zero 2 | 3 | A fully compliant AMBA APB3 Master IP core with parameterized interface widths and comprehensive transaction control capabilities. 4 | 5 | ## Overview 6 | 7 | This IP implements a complete AMBA APB3 Master controller that provides a generic CPU/application interface for easy integration into system-on-chip designs. The design emphasizes granular user control over transaction initiation while maintaining full protocol compliance. 8 | 9 | ## Features 10 | 11 | - **Parameterized Interface Ports**: Fully configurable data, address, and control signal widths 12 | - **Generic Application Interface**: Easy-to-use CPU-side interface for transaction initiation 13 | - **Programmable PSELx Timeout**: Configurable timeout mechanism for slave response detection (hardcoded default value) 14 | - **Full APB3 Protocol Compliance**: Implements all required APB3 protocol states and signals 15 | - **Granular Transaction Control**: Fine-grained control over transaction initiation and timing 16 | - **Back-to-Back Transaction Support**: Efficient handling of consecutive data transactions 17 | - **Asynchronous Reset Support**: Active-low asynchronous reset for both APB and CPU interfaces 18 | 19 | ## Configuration and Naming Conventions 20 | 21 | The APB3 Master Zero RTL uses a unique naming convention with the `APB3_MST_` prefix to ensure no conflicts with other IPs. All configuration defines are located in `common/ip_amba_apb_top_defines.vh`: 22 | 23 | ### Configuration Defines 24 | 25 | - `APB3_MST_PSEL_TIMEOUT_CYCLES`: Timeout value for PSELx signal in clock cycles (default: 20) 26 | - `APB3_MST_PSTRB_WIDTH`: Write strobe width in bytes (default: 4) 27 | - `APB3_MST_PWDATA_WIDTH`: Write data width in bits (default: 8 * PSTRB_WIDTH = 32) 28 | - `APB3_MST_PRDATA_WIDTH`: Read data width in bits (default: 32) 29 | - `APB3_MST_PADDR_WIDTH`: Address width in bits (default: 32) 30 | - `APB3_MST_PSEL_WIDTH`: Slave select signal width (default: 1) 31 | 32 | ### Parameter Declaration Macro 33 | 34 | The module uses the `APB3_MST_DESIGN_ATTRIBUTES` macro (defined in `common/ip_amba_apb_top_parameters.vh`) for parameterized instantiation. This macro allows customization of all interface widths during module instantiation. 35 | 36 | ## Module Interface 37 | 38 | ### Top-Level Module: `ip_amba_apb_master_top` 39 | 40 | #### APB3 Protocol Signals 41 | 42 | **Clock and Reset:** 43 | - `PCLK`: APB clock input 44 | - `PRESETn`: APB active-low reset input 45 | 46 | **Master Outputs:** 47 | - `PADDR[PADDR_width-1:0]`: Address bus 48 | - `PPROT[2:0]`: Protection type (currently hardcoded to 0) 49 | - `PSELx[PSELx_width-1:0]`: Peripheral select signal 50 | - `PENABLE`: Enable signal for access phase 51 | - `PWRITE`: Write/read control (1 = write, 0 = read) 52 | - `PWDATA[PWDATA_width-1:0]`: Write data bus 53 | - `PSTRB[PSTRB_width-1:0]`: Write strobe signals 54 | 55 | **Master Inputs:** 56 | - `PREADY`: Ready signal from slave 57 | - `PRDATA[PRDATA_width-1:0]`: Read data bus from slave 58 | - `PSLVERR`: Slave error response 59 | 60 | #### CPU/Application Interface 61 | 62 | **Control Inputs:** 63 | - `from_cpu_resetn`: CPU-side active-low reset 64 | - `from_cpu_valid_txn`: Valid transaction request 65 | - `from_cpu_rd_wr`: Read/write control (1 = write, 0 = read) 66 | - `from_cpu_address[PADDR_width-1:0]`: Transaction address 67 | - `from_cpu_wr_STRB[PSTRB_width-1:0]`: Write strobe for write transactions 68 | - `from_cpu_wr_WDATA[PWDATA_width-1:0]`: Write data for write transactions 69 | - `from_cpu_slave_sel`: Slave select signal 70 | 71 | **Status Outputs:** 72 | - `apb_ready_for_txn`: Indicates when the master is ready to accept new transactions 73 | - `to_cpu_RDATA[PRDATA_width-1:0]`: Read data from completed read transactions 74 | - `to_cpu_RDATA_valid_WDATA_done`: Valid signal for read data or write completion 75 | - `to_cpu_txn_err`: Transaction error flag (set when PSLVERR is asserted) 76 | - `to_cpu_txn_timeout`: Timeout flag (set when PSELx timeout occurs) 77 | 78 | ## Protocol State Machine 79 | 80 | The IP implements a standard APB3 three-state finite state machine: 81 | 82 | 1. **IDLE**: Default state, waiting for transaction request 83 | 2. **SETUP**: Address and control signals are set up, PSELx is asserted 84 | 3. **ACCESS**: PENABLE is asserted, waiting for PREADY from slave 85 | 86 | The state machine handles: 87 | - Normal transaction completion 88 | - Back-to-back transactions 89 | - Error responses (PSLVERR) 90 | - Timeout conditions 91 | 92 | ## Timeout Mechanism 93 | 94 | The IP includes a configurable timeout counter that monitors the PSELx signal. If a slave does not respond with PREADY within the configured timeout period, the transaction is aborted and the `to_cpu_txn_timeout` signal is asserted. The timeout value is controlled by the `APB3_MST_PSEL_TIMEOUT_CYCLES` define. 95 | 96 | ## File Structure 97 | 98 | ``` 99 | apb3_v00_00_master_rtl_v/ 100 | ├── common/ 101 | │ ├── ip_amba_apb_top_defines.vh # Configuration defines 102 | │ └── ip_amba_apb_top_parameters.vh # Parameter declaration macro 103 | ├── top/ 104 | │ └── ip_amba_apb_master_top.v # Top-level module 105 | └── README.md # This file 106 | ``` 107 | 108 | ## Usage Example 109 | 110 | ```verilog 111 | `include "common/ip_amba_apb_top_defines.vh" 112 | `include "common/ip_amba_apb_top_parameters.vh" 113 | 114 | ip_amba_apb_master_top `APB3_MST_DESIGN_ATTRIBUTES ( 115 | // APB Interface 116 | .PCLK(clk), 117 | .PRESETn(rstn), 118 | .PREADY(slave_ready), 119 | .PRDATA(slave_rdata), 120 | .PSLVERR(slave_error), 121 | .PADDR(apb_addr), 122 | .PPROT(apb_prot), 123 | .PSELx(apb_sel), 124 | .PENABLE(apb_enable), 125 | .PWRITE(apb_write), 126 | .PWDATA(apb_wdata), 127 | .PSTRB(apb_strb), 128 | 129 | // CPU Interface 130 | .from_cpu_resetn(cpu_rstn), 131 | .from_cpu_valid_txn(cpu_valid), 132 | .from_cpu_rd_wr(cpu_write), 133 | .from_cpu_address(cpu_addr), 134 | .from_cpu_wr_STRB(cpu_strb), 135 | .from_cpu_wr_WDATA(cpu_wdata), 136 | .from_cpu_slave_sel(cpu_sel), 137 | .apb_ready_for_txn(ready), 138 | .to_cpu_RDATA(cpu_rdata), 139 | .to_cpu_RDATA_valid_WDATA_done(cpu_valid_out), 140 | .to_cpu_txn_err(cpu_error), 141 | .to_cpu_txn_timeout(cpu_timeout) 142 | ); 143 | ``` 144 | 145 | ## License 146 | 147 | This project is licensed under the MIT License. See individual file headers for copyright information. 148 | 149 | Copyright (c) 2020 k-sva 150 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/top/ip_amba_apb4_ms_integration_top.v: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 15:20:14 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `include "ip_amba_apb4_m_top.v" 34 | `include "ip_amba_apb4_s_top.v" 35 | 36 | module ip_amba_apb4_ms_integration_top; 37 | 38 | parameter PRDATA_W = 32, 39 | PWDATA_W = 32, 40 | PSTRB_W = 4, 41 | PADDR_W = 32, 42 | PPROT_W = 3; 43 | 44 | parameter WORD_LENGTH = 32, 45 | MEM_DEPTH = 128, 46 | DEV_BASE_ADDRESS = 0; 47 | 48 | // Interfacing Signals 49 | // ------------------- 50 | 51 | wire PCLK_w; 52 | wire PRESETn_w; 53 | 54 | wire PREADY_w; 55 | wire [PRDATA_W-1:0] PRDATA_w; 56 | wire PSLVERR_w; 57 | 58 | wire [PADDR_W-1:0] PADDR_w; 59 | wire [PPROT_W-1:0] PPROT_w; 60 | wire PSELx_w; 61 | wire PENABLE_w; 62 | wire PWRITE_w; 63 | wire [PWDATA_W-1:0] PWDATA_w; 64 | wire [PSTRB_W-1:0] PSTRB_w; 65 | 66 | wire vld_ap; 67 | wire [PADDR_W-1:0] addr_ap; 68 | wire [PWDATA_W-1:0] wdata_ap; 69 | wire [PSTRB_W-1:0] wstrb_ap; 70 | 71 | wire rdy_ap; 72 | wire [PRDATA_W-1:0] rdata_ap; 73 | wire err_ap; 74 | 75 | // Stimulus Driving Signals ( For APB Master ) 76 | // ------------------------------------------- 77 | 78 | reg PCLK_sr; 79 | reg PRESETn_sr; 80 | 81 | // Integration of the two IPs 82 | // -------------------------- 83 | 84 | ip_amba_apb4_m_top #( 85 | .PRDATA_width(PRDATA_W), 86 | .PWDATA_width(PWDATA_W), 87 | .PSTRB_width(PSTRB_W), 88 | .PADDR_width(PADDR_W) 89 | ) 90 | master 91 | ( 92 | // Protocol Signals 93 | .PCLK(PCLK_w), 94 | .PRESETn(PRESETn_w), 95 | 96 | .PREADY(PREADY_w), 97 | .PRDATA(PRDATA_w), 98 | .PSLVERR(PSLVERR_w), 99 | 100 | .PADDR(PADDR_w), 101 | .PPROT(PPROT_w), 102 | .PSELx(PSELx_w), 103 | .PENABLE(PENABLE_w), 104 | .PWRITE(PWRITE_w), 105 | .PWDATA(PWDATA_w), 106 | .PSTRB(PSTRB_w), 107 | 108 | // App Interface Signals 109 | .rdy_ap( rdy_ap ), 110 | .vld_ap( vld_ap ), 111 | .rw_ap( rw_ap ), 112 | .addr_ap( addr_ap ), 113 | .wdata_ap( wdata_ap ), 114 | .wstrb_ap( wstrb_ap ), 115 | .rdata_ap( rdata_ap ), 116 | .err_ap( err_ap ) 117 | ); 118 | 119 | ip_amba_apb4_s_top #( 120 | .PRDATA_width(PRDATA_W), 121 | .PWDATA_width(PWDATA_W), 122 | .PSTRB_width(PSTRB_W), 123 | .PADDR_width(PADDR_W), 124 | .WORD_LENGTH(WORD_LENGTH), 125 | .MEM_DEPTH(MEM_DEPTH), 126 | .DEV_BASE_ADDRESS(DEV_BASE_ADDRESS) 127 | ) 128 | slave 129 | ( 130 | // Protocol Signals 131 | .PCLK(PCLK_w), 132 | .PRESETn(PRESETn_w), 133 | 134 | .PREADY(PREADY_w), 135 | .PRDATA(PRDATA_w), 136 | .PSLVERR(PSLVERR_w), 137 | 138 | .PADDR(PADDR_w), 139 | .PPROT(PPROT_w), 140 | .PSELx(PSELx_w), 141 | .PENABLE(PENABLE_w), 142 | .PWRITE(PWRITE_w), 143 | .PWDATA(PWDATA_w), 144 | .PSTRB(PSTRB_w) 145 | ); 146 | 147 | // Stimulus Generation ( And Monitoring ) 148 | // -------------------------------------- 149 | 150 | `ifdef TESTBENCH_STIMULUS_ENABLED 151 | 152 | `include "apb4_master_stim_driver.sv" 153 | 154 | // Dump Generation 155 | // --------------- 156 | `ifdef ENABLE_DUMP 157 | initial 158 | begin 159 | $dumpfile( "apb_dump.vcd" ); 160 | $dumpvars( 0,ip_amba_apb4_ms_integration_top ); 161 | end 162 | `endif 163 | 164 | `endif 165 | 166 | endmodule 167 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/apb4_v00_00_m_rtl_v/top/ip_amba_apb4_m_top.v: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 12:02:16 IST, 29 March, 2021 [ Monday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `include "ip_amba_apb4_m_top_defines.vh" 34 | `include "ip_amba_apb4_m_top_parameters.vh" 35 | 36 | module ip_amba_apb4_m_top `APB4_MST_DESIGN_ATTRIBUTES ( 37 | 38 | // APB Interface Side Signals 39 | // Global Inputs 40 | PCLK, 41 | PRESETn, 42 | 43 | // Master Inputs 44 | PREADY, 45 | PRDATA, 46 | PSLVERR, 47 | 48 | // Master Outputs 49 | PADDR, 50 | PPROT, 51 | PSELx, 52 | PENABLE, 53 | PWRITE, 54 | PWDATA, 55 | PSTRB, 56 | 57 | // Application Interface Signals 58 | rdy_ap, 59 | vld_ap, 60 | rw_ap, 61 | addr_ap, 62 | wdata_ap, 63 | wstrb_ap, 64 | rdata_ap, 65 | err_ap 66 | ); 67 | 68 | input wire PCLK; 69 | input wire PRESETn; 70 | 71 | input wire PREADY; 72 | input wire [PRDATA_width-1:0] PRDATA; 73 | input wire PSLVERR; 74 | 75 | input wire vld_ap; 76 | input wire rw_ap; // Write - 1, Read - 0 77 | input wire [PADDR_width-1:0] addr_ap; 78 | input wire [PWDATA_width-1:0] wdata_ap; 79 | input wire [PSTRB_width-1:0] wstrb_ap; 80 | 81 | output wire [PADDR_width-1:0] PADDR; 82 | output wire [3-1:0] PPROT; 83 | output wire PSELx; 84 | output wire PENABLE; 85 | output wire PWRITE; 86 | output wire [PWDATA_width-1:0] PWDATA; 87 | output wire [PSTRB_width-1:0] PSTRB; 88 | 89 | output wire rdy_ap; 90 | output wire [PRDATA_width-1:0] rdata_ap; 91 | output wire err_ap; 92 | 93 | reg PWRITE_r; 94 | reg [PWDATA_width-1:0] PWDATA_r; 95 | reg PENABLE_r; 96 | reg [PSELx_width-1:0] PSELx_r; 97 | reg [3-1:0] PPROT_r; 98 | reg [PSTRB_width-1:0] PSTRB_r; 99 | reg [PADDR_width-1:0] PADDR_r; 100 | 101 | // State Names 102 | // ----------- 103 | localparam IDLE = 0, 104 | SETUP = 1, 105 | ACCESS = 2; 106 | 107 | // State Variables 108 | // --------------- 109 | reg [1:0] ps, ns; 110 | 111 | // Assignments 112 | // ----------- 113 | assign PWRITE = PWRITE_r; 114 | assign PWDATA = PWDATA_r; 115 | assign PENABLE = PENABLE_r; 116 | assign PSELx = PSELx_r; 117 | assign PPROT = PPROT_r; 118 | assign PSTRB = PSTRB_r; 119 | assign PADDR = PADDR_r; 120 | 121 | assign rdy_ap = ( ps == SETUP ) ? 1'b0 : 1'b1; 122 | assign rdata_ap = PRDATA; 123 | assign err_ap = PSLVERR; 124 | 125 | // State Machine 126 | // ------------- 127 | always@( posedge PCLK or negedge PRESETn ) 128 | begin 129 | ps <= ns; 130 | if( !PRESETn ) 131 | begin 132 | ps <= IDLE; 133 | end 134 | end 135 | 136 | always@( * ) 137 | begin 138 | ns = ps; 139 | case( ps ) 140 | IDLE : begin 141 | if( vld_ap ) 142 | begin 143 | ns = SETUP; 144 | end 145 | end 146 | SETUP : begin 147 | ns = ACCESS; 148 | end 149 | ACCESS : begin 150 | if( PREADY ) 151 | begin 152 | if( vld_ap ) 153 | begin 154 | ns = SETUP; 155 | end 156 | else 157 | begin 158 | ns = IDLE; 159 | end 160 | end 161 | end 162 | endcase 163 | end 164 | 165 | // Output Control 166 | always@( posedge PCLK or negedge PRESETn ) 167 | begin 168 | PADDR_r <= PADDR_r; 169 | PWDATA_r <= PWDATA_r; 170 | PENABLE_r <= PENABLE_r; 171 | PWRITE_r <= PWRITE_r; 172 | PSTRB_r <= PSTRB_r; 173 | PSELx_r <= PSELx_r; 174 | 175 | if( !PRESETn ) 176 | begin 177 | PENABLE_r <= 0; 178 | PSELx_r <= 0; 179 | end 180 | else 181 | begin 182 | if( ( ps == IDLE || ps == ACCESS ) && ( ns == SETUP ) ) 183 | begin 184 | PADDR_r <= addr_ap; 185 | PWDATA_r <= wdata_ap; 186 | PWRITE_r <= rw_ap; 187 | PSTRB_r <= wstrb_ap; 188 | PSELx_r <= 1; 189 | end 190 | if( ( ps == SETUP ) && ( ns == ACCESS ) ) 191 | begin 192 | PENABLE_r <= 1; 193 | end 194 | if( ps == ACCESS ) 195 | begin 196 | PENABLE_r <= 0; 197 | end 198 | if( ps == ACCESS && ns == IDLE ) 199 | begin 200 | PSELx_r <= 0; 201 | end 202 | end 203 | end 204 | 205 | endmodule 206 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/top/apb4_master_stim_driver.sv: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 01:13:41 IST, 26 August, 2021 [ Thursday ] 4 | * 5 | * Author : pxvi 6 | * Description : APB4 master stimulus generator and driver 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2021 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | class apb_mp; 34 | rand bit [PWDATA_W-1:0] wdata; 35 | rand bit [PRDATA_W-1:0] rdata; 36 | rand bit [PADDR_W-1:0] addr; 37 | rand bit [PSTRB_W-1:0] strb; 38 | bit [PSTRB_W-1:0] strb_0; 39 | rand bit rw; 40 | rand bit [31:0] before_empty_cycles; 41 | rand bit [31:0] after_empty_cycles; 42 | 43 | constraint defaults { 44 | soft before_empty_cycles == 0; 45 | soft after_empty_cycles == 0; 46 | } 47 | endclass 48 | 49 | // Clock 50 | 51 | `define clk_pw 10 52 | 53 | // Scoreboard 54 | // ---------- 55 | bit [PWDATA_W-1:0] scb[*]; 56 | 57 | // Stimulus Signals 58 | // ---------------- 59 | reg vld_ap_r; 60 | reg [PADDR_W-1:0] addr_ap_r; 61 | reg [PWDATA_W-1:0] wdata_ap_r; 62 | reg [PSTRB_W-1:0] wstrb_ap_r; 63 | reg rw_ap_r; 64 | 65 | assign vld_ap = vld_ap_r; 66 | assign addr_ap = addr_ap_r; 67 | assign wdata_ap = wdata_ap_r; 68 | assign wstrb_ap = wstrb_ap_r; 69 | assign rw_ap = rw_ap_r; 70 | 71 | initial 72 | begin 73 | PCLK_sr <= 0; 74 | forever 75 | begin 76 | #(`clk_pw/2) PCLK_sr <= ~PCLK_sr; 77 | end 78 | end 79 | 80 | assign PCLK_w = PCLK_sr; 81 | assign PRESETn_w = PRESETn_sr; 82 | 83 | // Stimulus 84 | 85 | task transfer( apb_mp t ); 86 | forever 87 | begin 88 | if( rdy_ap ) 89 | begin 90 | repeat( t.before_empty_cycles ) 91 | begin 92 | @( negedge PCLK_w ); 93 | end 94 | vld_ap_r <= 1; 95 | addr_ap_r <= t.addr; 96 | wdata_ap_r <= t.wdata; 97 | wstrb_ap_r <= t.strb; 98 | rw_ap_r <= t.rw; 99 | forever 100 | begin 101 | @( negedge PCLK_w ); 102 | if( !rdy_ap ) 103 | begin 104 | if( t.rw ) 105 | begin 106 | fork 107 | begin 108 | time a; 109 | a = $time; 110 | @( negedge PCLK_w ); 111 | $display( "%8d - APB4 Master App Interface Transaction Driven ( Addr : %d, Data : %d, Strobe : %d, Mode : Write )", $time, PADDR_w, PWDATA_w, PSTRB_w ); 112 | end 113 | join_none 114 | end 115 | else 116 | begin 117 | fork 118 | begin 119 | time a; 120 | a = $time; 121 | @( negedge PCLK_w ); 122 | $display( "%8d - APB4 Master App Interface Transaction Registered By APB Master ( Read : %d )", a, rdata_ap ); 123 | end 124 | join_none 125 | end 126 | vld_ap_r <= 0; 127 | break; 128 | end 129 | end 130 | repeat( t.after_empty_cycles ) 131 | begin 132 | @( negedge PCLK_w ); 133 | end 134 | break; 135 | end 136 | else 137 | begin 138 | @( negedge PCLK_w ); 139 | end 140 | end 141 | endtask 142 | 143 | apb_mp txn = new; 144 | 145 | initial 146 | begin 147 | 148 | $display( "%8d - Stimulus generator started", $time ); 149 | 150 | PRESETn_sr <= 1; 151 | PRESETn_sr <= 0; 152 | repeat( 5 ) 153 | begin 154 | @( negedge PCLK_w ); 155 | end 156 | PRESETn_sr <= 1; 157 | repeat( $urandom % 10 ) 158 | begin 159 | bit [PWDATA_W-1:0] ad; 160 | txn = new; 161 | txn.randomize() with { addr < MEM_DEPTH; wdata == 16; rw == 1; }; 162 | transfer( txn ); 163 | ad = txn.addr; 164 | txn.randomize() with { addr == ad; rw == 0; }; 165 | transfer( txn ); 166 | end 167 | 168 | repeat( $urandom % 50 ) 169 | begin 170 | PRESETn_sr <= 1; 171 | PRESETn_sr <= 0; 172 | repeat( 5 ) 173 | begin 174 | @( negedge PCLK_w ); 175 | end 176 | PRESETn_sr <= 1; 177 | repeat( $urandom % 100 ) 178 | begin 179 | bit [PWDATA_W-1:0] ad; 180 | txn = new; 181 | txn.randomize() with { addr < MEM_DEPTH; rw == 1; }; 182 | transfer( txn ); 183 | ad = txn.addr; 184 | txn.randomize() with { addr == ad; rw == 0; }; 185 | transfer( txn ); 186 | end 187 | end 188 | end 189 | 190 | // Monitor 191 | 192 | initial 193 | begin 194 | end 195 | 196 | // Simulation End 197 | 198 | initial 199 | begin 200 | // $finish is call when the protocol interface is idle for 2000 clocks 201 | fork 202 | begin 203 | #300000; 204 | $display( "%8d - Manual End Test Called", $time ); 205 | end 206 | begin 207 | int counter; 208 | bit psel_temp; 209 | psel_temp = PSELx_w; 210 | 211 | forever 212 | begin 213 | @( posedge PCLK_w ); 214 | if( psel_temp === PSELx_w ) 215 | begin 216 | if( counter == 100 ) 217 | begin 218 | $display( "%8d - PSELx signal did not change for over 1000 clock cycles. End test is being raised.", $time ); 219 | break; 220 | end 221 | else 222 | begin 223 | counter++; 224 | end 225 | end 226 | else 227 | begin 228 | counter = 0; 229 | end 230 | end 231 | end 232 | join_any 233 | $finish; 234 | end 235 | -------------------------------------------------------------------------------- /apb3_v00_00_slave_rtl_v/top/ip_amba_apb_slave_top.v: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `include "ip_amba_apb_slave_top_defines.vh" 34 | `include "ip_amba_apb_slave_top_parameters.vh" 35 | 36 | // ++++++++++++++++++ 37 | // Module Description 38 | // ++++++++++++++++++ 39 | // This primarily is an APB3 Compliant Slave. 40 | // Additionally, this slave acts like a simple memory storage device. 41 | // The depth and the Work Length are decided by the passed parameters. 42 | // Features : 43 | // - Provided a base_address register which makes the data access to memory array in terms of offset. 44 | // This provides the advantage of, being able to access the memory space with respect to the address rogrammed in the 'h0 register location rather than using memory offsets directly on the address bus. 45 | // After reset, the default base_address register value is 'b1 46 | // - PSLVERR is triggered for any address out of bounds errors in terms of base_address register. 47 | // 48 | // + RLT Tested Againt A Stable VIP. Bug Free as of 14 January, 2020 [11:25:38 AM IST] 49 | // ++++++++++++++++++ 50 | 51 | module ip_amba_apb_slave_top `APB3_SLV_DESIGN_ATTRIBUTES ( 52 | 53 | // APB Interface Side Signals 54 | // Global Inputs 55 | PCLK, 56 | PRESETn, 57 | 58 | // Slave Inputs 59 | PADDR, 60 | PPROT, 61 | PSELx, 62 | PENABLE, 63 | PWRITE, 64 | PWDATA, 65 | PSTRB, 66 | 67 | // Slave Outputs 68 | PREADY, 69 | PRDATA, 70 | PSLVERR 71 | 72 | // Memory Array Pins 73 | // TODO : Need to add external memory interfacing access 74 | // This is needed because the internally declared memory cannot be always symmetrical in architecture. Plus external memory design will give a better control over it's instantiation wherever needed. 75 | ); 76 | 77 | input wire PCLK; 78 | input wire PRESETn; 79 | 80 | output reg PREADY; 81 | output reg [PRDATA_width-1:0] PRDATA; 82 | output reg PSLVERR; 83 | 84 | input wire [PADDR_width-1:0] PADDR; 85 | input wire [3-1:0] PPROT; 86 | input wire [PSELx_width-1:0] PSELx; 87 | input wire PENABLE; 88 | input wire PWRITE; 89 | input wire [PWDATA_width-1:0] PWDATA; 90 | input wire [PSTRB_width-1:0] PSTRB; 91 | 92 | // Local Parameter Declarations 93 | // ---------------------------- 94 | 95 | localparam BASE_ADDR = 0; 96 | 97 | // Memory Array Declaration 98 | // ------------------------ 99 | reg [WORD_LENGTH-1:0] mem_arr[2**MEM_DEPTH]; 100 | 101 | // Internal Programmable Register Declaration. 102 | // This will become the base addresss for DATA Access. 103 | // In short this will act as the lower address boundary of the module. 104 | // Accesses which are out of bounds will result in a PSLVERR. 105 | // ------------------------------------------ 106 | reg [PWDATA_width-1:0] base_address; 107 | 108 | // Synchronous Read/Write Block For APB 109 | // ------------------------------------ 110 | always@( posedge PCLK or negedge PRESETn ) 111 | begin 112 | mem_arr <= mem_arr; 113 | PRDATA <= PRDATA; 114 | PREADY <= PREADY; 115 | PSLVERR <= 1'b0; 116 | 117 | if( !PRESETn ) 118 | begin 119 | //reset_task(); // TODO : Need to look for an alternative 120 | PRDATA <= {PRDATA_width{1'b0}}; 121 | PREADY <= 1'b0; 122 | PSLVERR <= 1'b0; 123 | 124 | // Setting the Default Base Address Value to 'h1 125 | base_address <= {PWDATA_width{ 1'b0 }}; 126 | base_address[0] <= 1'b1; 127 | end 128 | else 129 | begin 130 | if( PSELx[0] && !PREADY && !PENABLE && ( ( PADDR < base_address )|| ( PADDR > ( base_address + 2**MEM_DEPTH - 1'b1 ) ) ) ) 131 | begin 132 | PSLVERR <= 1'b1; 133 | PRDATA <= {PRDATA_width{1'b0}}; 134 | PREADY <= 1'b1; 135 | end 136 | else if( PSELx[0]&& !PWRITE ) 137 | begin 138 | if( !PREADY && !PENABLE ) 139 | begin 140 | PRDATA <= mem_arr[(PADDR-base_address)/PSTRB_width]; 141 | PREADY <= 1'b1; 142 | end 143 | else if( PREADY && PENABLE ) 144 | begin 145 | PREADY <= 1'b0; 146 | end 147 | end 148 | else if( PSELx[0] && PWRITE ) 149 | begin 150 | if( PREADY && PENABLE ) 151 | begin 152 | int i; 153 | 154 | if( ( PADDR / PSTRB_width ) == {PWDATA_width{ 1'b0 }} ) 155 | begin 156 | for( i = 0; i < PSTRB_width; i++ ) 157 | begin 158 | if( PSTRB[i] ) 159 | begin 160 | base_address[(i*8)+:8] <= PWDATA[(i*8)+:8]; 161 | end 162 | end 163 | end 164 | else 165 | begin 166 | for( i = 0; i < PSTRB_width; i++ ) 167 | begin 168 | if( PSTRB[i] ) 169 | begin 170 | mem_arr[(PADDR-base_address)/PSTRB_width][(i*8)+:8] <= PWDATA[(i*8)+:8]; 171 | end 172 | end 173 | end 174 | 175 | PREADY <= 1'b0; 176 | end 177 | else if( !PREADY && !PENABLE ) 178 | begin 179 | PREADY <= 1'b1; 180 | end 181 | end 182 | end 183 | end 184 | 185 | 186 | // Memory Re-Initialize Task 187 | // ------------------------- 188 | task reset_task(); 189 | int i; 190 | 191 | for( i = 0; i < 2**MEM_DEPTH; i++ ) 192 | begin 193 | mem_arr[i] <= {WORD_LENGTH {1'b0}}; 194 | end 195 | endtask 196 | 197 | endmodule 198 | -------------------------------------------------------------------------------- /apb4_v00_00_ms_rtl_v/sim/apb_tb_top.gtkw: -------------------------------------------------------------------------------- 1 | [*] 2 | [*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI 3 | [*] Sat Aug 28 16:23:44 2021 4 | [*] 5 | [dumpfile] "/home/padmakar/WORKSPACE/workspace_pxvi/ip_amba_apb_ms_rtl_v/apb4_v00_00_ms_rtl_v/sim/apb_dump.vcd" 6 | [dumpfile_mtime] "Sat Aug 28 16:22:34 2021" 7 | [dumpfile_size] 12816217 8 | [savefile] "/home/padmakar/WORKSPACE/workspace_pxvi/ip_amba_apb_ms_rtl_v/apb4_v00_00_ms_rtl_v/sim/apb_tb_top.gtkw" 9 | [timestart] 11086 10 | [size] 1920 1057 11 | [pos] -1 -1 12 | *-5.044456 11135 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 | [treeopen] ip_amba_apb4_ms_integration_top. 14 | [sst_width] 258 15 | [signals_width] 204 16 | [sst_expanded] 1 17 | [sst_vpaned_height] 318 18 | @28 19 | ip_amba_apb4_ms_integration_top.master.PCLK 20 | ip_amba_apb4_ms_integration_top.master.PRESETn 21 | ip_amba_apb4_ms_integration_top.master.PSELx 22 | ip_amba_apb4_ms_integration_top.master.PENABLE 23 | @29 24 | ip_amba_apb4_ms_integration_top.master.PWRITE 25 | @22 26 | #{ip_amba_apb4_ms_integration_top.master.PSTRB[3:0]} ip_amba_apb4_ms_integration_top.master.PSTRB[3] ip_amba_apb4_ms_integration_top.master.PSTRB[2] ip_amba_apb4_ms_integration_top.master.PSTRB[1] ip_amba_apb4_ms_integration_top.master.PSTRB[0] 27 | #{ip_amba_apb4_ms_integration_top.master.PADDR[31:0]} ip_amba_apb4_ms_integration_top.master.PADDR[31] ip_amba_apb4_ms_integration_top.master.PADDR[30] ip_amba_apb4_ms_integration_top.master.PADDR[29] ip_amba_apb4_ms_integration_top.master.PADDR[28] ip_amba_apb4_ms_integration_top.master.PADDR[27] ip_amba_apb4_ms_integration_top.master.PADDR[26] ip_amba_apb4_ms_integration_top.master.PADDR[25] ip_amba_apb4_ms_integration_top.master.PADDR[24] ip_amba_apb4_ms_integration_top.master.PADDR[23] ip_amba_apb4_ms_integration_top.master.PADDR[22] ip_amba_apb4_ms_integration_top.master.PADDR[21] ip_amba_apb4_ms_integration_top.master.PADDR[20] ip_amba_apb4_ms_integration_top.master.PADDR[19] ip_amba_apb4_ms_integration_top.master.PADDR[18] ip_amba_apb4_ms_integration_top.master.PADDR[17] ip_amba_apb4_ms_integration_top.master.PADDR[16] ip_amba_apb4_ms_integration_top.master.PADDR[15] ip_amba_apb4_ms_integration_top.master.PADDR[14] ip_amba_apb4_ms_integration_top.master.PADDR[13] ip_amba_apb4_ms_integration_top.master.PADDR[12] ip_amba_apb4_ms_integration_top.master.PADDR[11] ip_amba_apb4_ms_integration_top.master.PADDR[10] ip_amba_apb4_ms_integration_top.master.PADDR[9] ip_amba_apb4_ms_integration_top.master.PADDR[8] ip_amba_apb4_ms_integration_top.master.PADDR[7] ip_amba_apb4_ms_integration_top.master.PADDR[6] ip_amba_apb4_ms_integration_top.master.PADDR[5] ip_amba_apb4_ms_integration_top.master.PADDR[4] ip_amba_apb4_ms_integration_top.master.PADDR[3] ip_amba_apb4_ms_integration_top.master.PADDR[2] ip_amba_apb4_ms_integration_top.master.PADDR[1] ip_amba_apb4_ms_integration_top.master.PADDR[0] 28 | #{ip_amba_apb4_ms_integration_top.master.PWDATA[31:0]} ip_amba_apb4_ms_integration_top.master.PWDATA[31] ip_amba_apb4_ms_integration_top.master.PWDATA[30] ip_amba_apb4_ms_integration_top.master.PWDATA[29] ip_amba_apb4_ms_integration_top.master.PWDATA[28] ip_amba_apb4_ms_integration_top.master.PWDATA[27] ip_amba_apb4_ms_integration_top.master.PWDATA[26] ip_amba_apb4_ms_integration_top.master.PWDATA[25] ip_amba_apb4_ms_integration_top.master.PWDATA[24] ip_amba_apb4_ms_integration_top.master.PWDATA[23] ip_amba_apb4_ms_integration_top.master.PWDATA[22] ip_amba_apb4_ms_integration_top.master.PWDATA[21] ip_amba_apb4_ms_integration_top.master.PWDATA[20] ip_amba_apb4_ms_integration_top.master.PWDATA[19] ip_amba_apb4_ms_integration_top.master.PWDATA[18] ip_amba_apb4_ms_integration_top.master.PWDATA[17] ip_amba_apb4_ms_integration_top.master.PWDATA[16] ip_amba_apb4_ms_integration_top.master.PWDATA[15] ip_amba_apb4_ms_integration_top.master.PWDATA[14] ip_amba_apb4_ms_integration_top.master.PWDATA[13] ip_amba_apb4_ms_integration_top.master.PWDATA[12] ip_amba_apb4_ms_integration_top.master.PWDATA[11] ip_amba_apb4_ms_integration_top.master.PWDATA[10] ip_amba_apb4_ms_integration_top.master.PWDATA[9] ip_amba_apb4_ms_integration_top.master.PWDATA[8] ip_amba_apb4_ms_integration_top.master.PWDATA[7] ip_amba_apb4_ms_integration_top.master.PWDATA[6] ip_amba_apb4_ms_integration_top.master.PWDATA[5] ip_amba_apb4_ms_integration_top.master.PWDATA[4] ip_amba_apb4_ms_integration_top.master.PWDATA[3] ip_amba_apb4_ms_integration_top.master.PWDATA[2] ip_amba_apb4_ms_integration_top.master.PWDATA[1] ip_amba_apb4_ms_integration_top.master.PWDATA[0] 29 | #{ip_amba_apb4_ms_integration_top.master.PRDATA[31:0]} ip_amba_apb4_ms_integration_top.master.PRDATA[31] ip_amba_apb4_ms_integration_top.master.PRDATA[30] ip_amba_apb4_ms_integration_top.master.PRDATA[29] ip_amba_apb4_ms_integration_top.master.PRDATA[28] ip_amba_apb4_ms_integration_top.master.PRDATA[27] ip_amba_apb4_ms_integration_top.master.PRDATA[26] ip_amba_apb4_ms_integration_top.master.PRDATA[25] ip_amba_apb4_ms_integration_top.master.PRDATA[24] ip_amba_apb4_ms_integration_top.master.PRDATA[23] ip_amba_apb4_ms_integration_top.master.PRDATA[22] ip_amba_apb4_ms_integration_top.master.PRDATA[21] ip_amba_apb4_ms_integration_top.master.PRDATA[20] ip_amba_apb4_ms_integration_top.master.PRDATA[19] ip_amba_apb4_ms_integration_top.master.PRDATA[18] ip_amba_apb4_ms_integration_top.master.PRDATA[17] ip_amba_apb4_ms_integration_top.master.PRDATA[16] ip_amba_apb4_ms_integration_top.master.PRDATA[15] ip_amba_apb4_ms_integration_top.master.PRDATA[14] ip_amba_apb4_ms_integration_top.master.PRDATA[13] ip_amba_apb4_ms_integration_top.master.PRDATA[12] ip_amba_apb4_ms_integration_top.master.PRDATA[11] ip_amba_apb4_ms_integration_top.master.PRDATA[10] ip_amba_apb4_ms_integration_top.master.PRDATA[9] ip_amba_apb4_ms_integration_top.master.PRDATA[8] ip_amba_apb4_ms_integration_top.master.PRDATA[7] ip_amba_apb4_ms_integration_top.master.PRDATA[6] ip_amba_apb4_ms_integration_top.master.PRDATA[5] ip_amba_apb4_ms_integration_top.master.PRDATA[4] ip_amba_apb4_ms_integration_top.master.PRDATA[3] ip_amba_apb4_ms_integration_top.master.PRDATA[2] ip_amba_apb4_ms_integration_top.master.PRDATA[1] ip_amba_apb4_ms_integration_top.master.PRDATA[0] 30 | @28 31 | #{ip_amba_apb4_ms_integration_top.master.PPROT[2:0]} ip_amba_apb4_ms_integration_top.master.PPROT[2] ip_amba_apb4_ms_integration_top.master.PPROT[1] ip_amba_apb4_ms_integration_top.master.PPROT[0] 32 | ip_amba_apb4_ms_integration_top.master.PREADY 33 | ip_amba_apb4_ms_integration_top.master.PSLVERR 34 | @22 35 | #{ip_amba_apb4_ms_integration_top.master.PSTRB[3:0]} ip_amba_apb4_ms_integration_top.master.PSTRB[3] ip_amba_apb4_ms_integration_top.master.PSTRB[2] ip_amba_apb4_ms_integration_top.master.PSTRB[1] ip_amba_apb4_ms_integration_top.master.PSTRB[0] 36 | @28 37 | ip_amba_apb4_ms_integration_top.master.rdy_ap 38 | ip_amba_apb4_ms_integration_top.master.vld_ap 39 | ip_amba_apb4_ms_integration_top.master.rw_ap 40 | @22 41 | #{ip_amba_apb4_ms_integration_top.master.wdata_ap[31:0]} ip_amba_apb4_ms_integration_top.master.wdata_ap[31] ip_amba_apb4_ms_integration_top.master.wdata_ap[30] ip_amba_apb4_ms_integration_top.master.wdata_ap[29] ip_amba_apb4_ms_integration_top.master.wdata_ap[28] ip_amba_apb4_ms_integration_top.master.wdata_ap[27] ip_amba_apb4_ms_integration_top.master.wdata_ap[26] ip_amba_apb4_ms_integration_top.master.wdata_ap[25] ip_amba_apb4_ms_integration_top.master.wdata_ap[24] ip_amba_apb4_ms_integration_top.master.wdata_ap[23] ip_amba_apb4_ms_integration_top.master.wdata_ap[22] ip_amba_apb4_ms_integration_top.master.wdata_ap[21] ip_amba_apb4_ms_integration_top.master.wdata_ap[20] ip_amba_apb4_ms_integration_top.master.wdata_ap[19] ip_amba_apb4_ms_integration_top.master.wdata_ap[18] ip_amba_apb4_ms_integration_top.master.wdata_ap[17] ip_amba_apb4_ms_integration_top.master.wdata_ap[16] ip_amba_apb4_ms_integration_top.master.wdata_ap[15] ip_amba_apb4_ms_integration_top.master.wdata_ap[14] ip_amba_apb4_ms_integration_top.master.wdata_ap[13] ip_amba_apb4_ms_integration_top.master.wdata_ap[12] ip_amba_apb4_ms_integration_top.master.wdata_ap[11] ip_amba_apb4_ms_integration_top.master.wdata_ap[10] ip_amba_apb4_ms_integration_top.master.wdata_ap[9] ip_amba_apb4_ms_integration_top.master.wdata_ap[8] ip_amba_apb4_ms_integration_top.master.wdata_ap[7] ip_amba_apb4_ms_integration_top.master.wdata_ap[6] ip_amba_apb4_ms_integration_top.master.wdata_ap[5] ip_amba_apb4_ms_integration_top.master.wdata_ap[4] ip_amba_apb4_ms_integration_top.master.wdata_ap[3] ip_amba_apb4_ms_integration_top.master.wdata_ap[2] ip_amba_apb4_ms_integration_top.master.wdata_ap[1] ip_amba_apb4_ms_integration_top.master.wdata_ap[0] 42 | #{ip_amba_apb4_ms_integration_top.master.wstrb_ap[3:0]} ip_amba_apb4_ms_integration_top.master.wstrb_ap[3] ip_amba_apb4_ms_integration_top.master.wstrb_ap[2] ip_amba_apb4_ms_integration_top.master.wstrb_ap[1] ip_amba_apb4_ms_integration_top.master.wstrb_ap[0] 43 | @28 44 | ip_amba_apb4_ms_integration_top.master.err_ap 45 | @22 46 | #{ip_amba_apb4_ms_integration_top.master.rdata_ap[31:0]} ip_amba_apb4_ms_integration_top.master.rdata_ap[31] ip_amba_apb4_ms_integration_top.master.rdata_ap[30] ip_amba_apb4_ms_integration_top.master.rdata_ap[29] ip_amba_apb4_ms_integration_top.master.rdata_ap[28] ip_amba_apb4_ms_integration_top.master.rdata_ap[27] ip_amba_apb4_ms_integration_top.master.rdata_ap[26] ip_amba_apb4_ms_integration_top.master.rdata_ap[25] ip_amba_apb4_ms_integration_top.master.rdata_ap[24] ip_amba_apb4_ms_integration_top.master.rdata_ap[23] ip_amba_apb4_ms_integration_top.master.rdata_ap[22] ip_amba_apb4_ms_integration_top.master.rdata_ap[21] ip_amba_apb4_ms_integration_top.master.rdata_ap[20] ip_amba_apb4_ms_integration_top.master.rdata_ap[19] ip_amba_apb4_ms_integration_top.master.rdata_ap[18] ip_amba_apb4_ms_integration_top.master.rdata_ap[17] ip_amba_apb4_ms_integration_top.master.rdata_ap[16] ip_amba_apb4_ms_integration_top.master.rdata_ap[15] ip_amba_apb4_ms_integration_top.master.rdata_ap[14] ip_amba_apb4_ms_integration_top.master.rdata_ap[13] ip_amba_apb4_ms_integration_top.master.rdata_ap[12] ip_amba_apb4_ms_integration_top.master.rdata_ap[11] ip_amba_apb4_ms_integration_top.master.rdata_ap[10] ip_amba_apb4_ms_integration_top.master.rdata_ap[9] ip_amba_apb4_ms_integration_top.master.rdata_ap[8] ip_amba_apb4_ms_integration_top.master.rdata_ap[7] ip_amba_apb4_ms_integration_top.master.rdata_ap[6] ip_amba_apb4_ms_integration_top.master.rdata_ap[5] ip_amba_apb4_ms_integration_top.master.rdata_ap[4] ip_amba_apb4_ms_integration_top.master.rdata_ap[3] ip_amba_apb4_ms_integration_top.master.rdata_ap[2] ip_amba_apb4_ms_integration_top.master.rdata_ap[1] ip_amba_apb4_ms_integration_top.master.rdata_ap[0] 47 | @28 48 | ip_amba_apb4_ms_integration_top.master.ps[1:0] 49 | [pattern_trace] 1 50 | [pattern_trace] 0 51 | -------------------------------------------------------------------------------- /apb3_v00_00_master_rtl_v/top/ip_amba_apb_master_top.v: -------------------------------------------------------------------------------- 1 | /* ----------------------------------------------------------------------------------- 2 | * Module Name : 3 | * Date Created : 10:27:43 IS, 14 January, 2020 [ Tuesday ] 4 | * 5 | * Author : pxvi 6 | * Description : 7 | * ----------------------------------------------------------------------------------- 8 | 9 | MIT License 10 | 11 | Copyright (c) 2020 k-sva 12 | 13 | Permission is hereby granted, free of charge, to any person obtaining a copy 14 | of this software and associated documentation files (the Software), to deal 15 | in the Software without restriction, including without limitation the rights 16 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 | copies of the Software, and to permit persons to whom the Software is 18 | furnished to do so, subject to the following conditions: 19 | 20 | The above copyright notice and this permission notice shall be included in all 21 | copies or substantial portions of the Software. 22 | 23 | THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 | SOFTWARE. 30 | 31 | * ----------------------------------------------------------------------------------- */ 32 | 33 | `include "ip_amba_apb_top_defines.vh" 34 | `include "ip_amba_apb_top_parameters.vh" 35 | 36 | module ip_amba_apb_master_top `APB3_MST_DESIGN_ATTRIBUTES ( 37 | 38 | // APB Interface Side Signals 39 | // Global Inputs 40 | PCLK, 41 | PRESETn, 42 | 43 | // Master Inputs 44 | PREADY, 45 | PRDATA, 46 | PSLVERR, 47 | 48 | // Master Outputs 49 | PADDR, 50 | PPROT, 51 | PSELx, 52 | PENABLE, 53 | PWRITE, 54 | PWDATA, 55 | PSTRB, 56 | 57 | // CPU End's Control Signals 58 | // TODO 59 | // To CPU ( Outputs ) 60 | apb_ready_for_txn, 61 | to_cpu_RDATA, 62 | to_cpu_RDATA_valid_WDATA_done, 63 | to_cpu_txn_err, 64 | to_cpu_txn_timeout, 65 | 66 | // From CPU ( Inputs ) 67 | from_cpu_resetn, 68 | from_cpu_valid_txn, 69 | from_cpu_rd_wr, 70 | from_cpu_address, 71 | from_cpu_wr_STRB, 72 | from_cpu_wr_WDATA, 73 | from_cpu_slave_sel 74 | ); 75 | 76 | output wire apb_ready_for_txn; 77 | output wire [PRDATA_width-1:0] to_cpu_RDATA; 78 | output wire to_cpu_RDATA_valid_WDATA_done; 79 | output wire to_cpu_txn_err; 80 | output wire to_cpu_txn_timeout; 81 | 82 | input wire from_cpu_resetn; 83 | input wire from_cpu_valid_txn; 84 | input wire from_cpu_rd_wr; 85 | input wire [PADDR_width-1:0] from_cpu_address; 86 | input wire [PSTRB_width-1:0] from_cpu_wr_STRB; 87 | input wire [PWDATA_width-1:0] from_cpu_wr_WDATA; 88 | input wire from_cpu_slave_sel; 89 | 90 | input wire PCLK; 91 | input wire PRESETn; 92 | 93 | input wire PREADY; 94 | input wire [PRDATA_width-1:0] PRDATA; 95 | input wire PSLVERR; 96 | 97 | output wire [PADDR_width-1:0] PADDR; 98 | output wire [3-1:0] PPROT; 99 | output wire [PSELx_width-1:0] PSELx; 100 | output wire PENABLE; 101 | output wire PWRITE; 102 | output wire [PWDATA_width-1:0] PWDATA; 103 | output wire [PSTRB_width-1:0] PSTRB; 104 | 105 | 106 | 107 | // APB FSM States Declaration 108 | // -------------------------- 109 | localparam reg [2:0] IDLE = 3'b000, 110 | SETUP = 3'b010, 111 | ACCESS = 3'b100; 112 | 113 | // APB FSM State Variable Declaration 114 | // ---------------------------------- 115 | reg [2:0] STATE; 116 | 117 | // Registers and Wires Declaration 118 | // ------------------------------- 119 | reg [PADDR_width-1:0] PADDR_r; 120 | reg [3-1:0] PPROT_r; 121 | reg [PSELx_width-1:0] PSELx_r; 122 | reg PENABLE_r; 123 | reg PWRITE_r; 124 | reg [PWDATA_width-1:0] PWDATA_r; 125 | reg [PSTRB_width-1:0] PSTRB_r; 126 | 127 | reg apb_ready_for_txn_r; 128 | reg to_cpu_txn_err_r; 129 | reg to_cpu_txn_timeout_r; 130 | 131 | // Timeout Counter 132 | // --------------- 133 | reg [32-1:0] pselx_timeout_counter_r; 134 | 135 | // Register Space : TODO Make this Programmable 136 | // -------------------------------------------- 137 | reg [32-1:0] pselx_timeout_reg; 138 | reg [1-1:0] pselx_timeout_flag_reg; 139 | 140 | // FSM Design 141 | // ---------- 142 | always@( posedge PCLK or negedge PRESETn or negedge from_cpu_resetn ) 143 | begin : APB_FSM 144 | 145 | // Register to Register Assignment to avoid Latch formation 146 | PADDR_r <= PADDR_r; 147 | PPROT_r <= PPROT_r; 148 | PSELx_r <= PSELx; 149 | PENABLE_r <= PENABLE_r; 150 | PWRITE_r <= PWRITE_r; 151 | PWDATA_r <= PWDATA_r; 152 | PSTRB_r <= PSTRB_r; 153 | 154 | STATE <= SETUP; 155 | 156 | if( ~PRESETn || ~from_cpu_resetn ) 157 | begin : RESET_STATE 158 | PSELx_r <= 0; 159 | PPROT_r <= 0; 160 | PENABLE_r <= 0; 161 | 162 | STATE <= IDLE; 163 | end : RESET_STATE 164 | else 165 | begin 166 | case( STATE ) 167 | IDLE : begin 168 | if( from_cpu_valid_txn && from_cpu_slave_sel ) // Transaction Bus Values may or may not be latched here 169 | begin 170 | STATE <= SETUP; 171 | PADDR_r <= from_cpu_address; 172 | PPROT_r <= 0; //TODO 173 | PSELx_r <= from_cpu_slave_sel; 174 | PWRITE_r <= from_cpu_rd_wr; 175 | if( from_cpu_rd_wr ) 176 | begin 177 | PWDATA_r <= from_cpu_wr_WDATA; 178 | PSTRB_r <= from_cpu_wr_STRB; 179 | end 180 | else if( !from_cpu_rd_wr ) 181 | begin 182 | PSTRB_r <= 0; 183 | end 184 | end 185 | end 186 | SETUP : begin // NOTE : Slave samples the DATA at the posedge of PCLK in this state while the needed sel is enabled 187 | if( from_cpu_valid_txn && from_cpu_slave_sel ) // Transaction Bus Values must be latched here 188 | begin 189 | PADDR_r <= from_cpu_address; 190 | PPROT_r <= 0; //TODO 191 | PSELx_r <= from_cpu_slave_sel; 192 | PWRITE_r <= from_cpu_rd_wr; 193 | if( from_cpu_rd_wr ) 194 | begin 195 | PWDATA_r <= from_cpu_wr_WDATA; 196 | PSTRB_r <= from_cpu_wr_STRB; 197 | end 198 | else if( !from_cpu_rd_wr ) 199 | begin 200 | PSTRB_r <= 0; 201 | end 202 | end 203 | PENABLE_r <= 1; 204 | STATE <= ACCESS; 205 | end 206 | ACCESS : begin 207 | if( PSLVERR == 1 ) 208 | begin 209 | STATE <= IDLE; 210 | PENABLE_r <= 0; 211 | PSELx_r <= 0; 212 | end 213 | /* The STATE moves into SETUP only when 214 | * the Slave select signal is set to a non 215 | * zero value indicating that the CPU 216 | * intends to send a back to back transfer 217 | * */ 218 | else if( PREADY == 1 && from_cpu_slave_sel && from_cpu_valid_txn ) // In case of consecutive transfers 219 | begin 220 | STATE <= SETUP; 221 | PENABLE_r <= 0; 222 | 223 | PADDR_r <= from_cpu_address; 224 | PPROT_r <= 0; //TODO 225 | PSELx_r <= from_cpu_slave_sel; 226 | PWRITE_r <= from_cpu_rd_wr; 227 | if( from_cpu_rd_wr ) 228 | begin 229 | PWDATA_r <= from_cpu_wr_WDATA; 230 | PSTRB_r <= from_cpu_wr_STRB; 231 | end 232 | else if( !from_cpu_rd_wr ) 233 | begin 234 | PSTRB_r <= 0; 235 | end 236 | end 237 | /* STATE transition happens only when the 238 | * slave select signal is zero and then 239 | * the from_cpu_valid_txn bit is checked. 240 | * */ 241 | else if( PREADY == 1 && ~from_cpu_valid_txn ) 242 | begin 243 | STATE <= IDLE; 244 | PENABLE_r <= 0; 245 | PSELx_r <= 0; 246 | end 247 | end 248 | default : begin 249 | // Do nothing, because the register values are already getting updated at the top 250 | end 251 | endcase 252 | 253 | if( pselx_timeout_flag_reg ) 254 | begin 255 | PSELx_r <= 0; 256 | PENABLE_r <= 0; 257 | STATE <= IDLE; // TODO It is possible to move into SETUP ( Maybe :] ) -> Implementation Pending 258 | end 259 | end 260 | end : APB_FSM 261 | 262 | // APB Port Signal Assignents 263 | // -------------------------- 264 | assign PADDR = PADDR_r; 265 | assign PPROT = PPROT_r; 266 | assign PSELx = PSELx_r; 267 | assign PENABLE = PENABLE_r; 268 | assign PWRITE = PWRITE_r; 269 | assign PWDATA = PWDATA_r; 270 | assign PSTRB = PSTRB_r; 271 | 272 | // CPU Signals Ouput Assignments 273 | // ----------------------------- 274 | always@( posedge PCLK or negedge PRESETn or negedge from_cpu_resetn ) 275 | begin : CPU_SIGNALS_ASSIGNMENT 276 | 277 | // Register to Register Assignment to avoid Latch Formation 278 | // -------------------------------------------------------- 279 | to_cpu_txn_err_r <= to_cpu_txn_err_r; 280 | 281 | if( ~from_cpu_resetn || ~PRESETn ) 282 | begin : RESET_STATE 283 | to_cpu_txn_err_r <= 0; 284 | end : RESET_STATE 285 | else 286 | begin 287 | case( STATE ) 288 | IDLE : begin 289 | end 290 | SETUP : begin 291 | if( from_cpu_valid_txn ) 292 | begin 293 | to_cpu_txn_err_r <= 0; 294 | end 295 | end 296 | ACCESS : begin 297 | if( PSLVERR == 1 ) 298 | begin 299 | to_cpu_txn_err_r <= 1; 300 | end 301 | end 302 | default : begin 303 | // Do nothing because the default value is already begin assigned at the top 304 | end 305 | endcase 306 | end 307 | end : CPU_SIGNALS_ASSIGNMENT 308 | 309 | // Combinational State Dependent Output Signal Assignment 310 | // ------------------------------------------------------ 311 | assign apb_ready_for_txn_r = ( STATE == IDLE || STATE == SETUP ); 312 | assign to_cpu_RDATA = PRDATA; 313 | assign to_cpu_RDATA_valid_WDATA_done = PREADY; 314 | 315 | // CPU Port Signal Assignents 316 | // -------------------------- 317 | assign apb_ready_for_txn = ( apb_ready_for_txn_r || ( PSELx_r && PENABLE_r && PREADY ) ); 318 | assign to_cpu_txn_err = to_cpu_txn_err_r; 319 | assign to_cpu_txn_timeout = to_cpu_txn_timeout_r; 320 | 321 | // APB PSELx Timeout Counter FSM 322 | // ----------------------------- 323 | always@( posedge PCLK or negedge PRESETn ) 324 | begin 325 | pselx_timeout_counter_r <= pselx_timeout_counter_r; 326 | pselx_timeout_reg <= pselx_timeout_reg; 327 | pselx_timeout_flag_reg <= pselx_timeout_flag_reg; 328 | to_cpu_txn_timeout_r <= 1'b0; 329 | 330 | if( !PRESETn ) 331 | begin 332 | pselx_timeout_counter_r <= 'd0; 333 | pselx_timeout_reg <= `ifdef APB3_MST_PSEL_TIMEOUT_CYCLES `APB3_MST_PSEL_TIMEOUT_CYCLES-1 `else 'd20-1 `endif; 334 | pselx_timeout_flag_reg <= 1'b0; 335 | end 336 | else if( PSELx_r && PENABLE_r && PREADY ) 337 | begin 338 | pselx_timeout_flag_reg <= 1'b0; 339 | pselx_timeout_counter_r <= 'd0; 340 | end 341 | else if( PSELx_r ) 342 | begin 343 | if( pselx_timeout_counter_r == pselx_timeout_reg ) 344 | begin 345 | pselx_timeout_counter_r <= 'd0; 346 | pselx_timeout_flag_reg <= 1'b1; 347 | to_cpu_txn_timeout_r <= 1'b1; 348 | end 349 | else 350 | begin 351 | pselx_timeout_counter_r <= pselx_timeout_counter_r + 1'b1; 352 | end 353 | end 354 | else if( !PSELx_r ) 355 | begin 356 | pselx_timeout_flag_reg <= 1'b0; 357 | pselx_timeout_counter_r <= 'd0; 358 | end 359 | end 360 | 361 | endmodule 362 | --------------------------------------------------------------------------------