├── .gitignore ├── General ├── OS │ ├── Arch-Linux │ │ └── README.md │ ├── Full-Windows │ │ └── README.md │ └── Windows-PE │ │ └── README.md └── README.md ├── README.md ├── Silicium ├── Porting │ └── Snapdragon │ │ ├── ACPI │ │ └── README.md │ │ ├── Device │ │ ├── Pictures │ │ │ ├── APRIORI1.png │ │ │ ├── APRIORI2.png │ │ │ └── DXE.png │ │ └── README.md │ │ └── SoC │ │ ├── Pictures │ │ ├── GHex-Search-1.png │ │ ├── GHex-Search-2.png │ │ └── GHex-Timer-PCDs.png │ │ └── README.md └── README.md ├── SoCs └── Snapdragon │ ├── Fixing-UFS-LUNs │ ├── Pictures │ │ ├── Preview-1.png │ │ ├── Preview-2.png │ │ ├── Preview-3.png │ │ ├── Preview-4.png │ │ └── Preview-5.png │ └── README.md │ ├── Mass-Storage │ ├── 0x04E00000 │ │ └── MassStorage.sh │ ├── 0x0A600000 │ │ └── MassStorage.sh │ ├── 0x0A800000 │ │ └── MassStorage.sh │ └── README.md │ └── README.md └── Vendors ├── README.md └── Samsung ├── Modding-UFS ├── Pictures │ ├── Preview-1.png │ ├── Preview-2.png │ └── Preview-3.png └── README.md └── README.md /.gitignore: -------------------------------------------------------------------------------- 1 | .vscode 2 | *:Zone.Identifier -------------------------------------------------------------------------------- /General/OS/Arch-Linux/README.md: -------------------------------------------------------------------------------- 1 | # Arch Linux ARM 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | Make sure to check the Status of your Device [here](https://github.com/Robotix22/Mu-Qcom/blob/main/Status.md). 7 | 8 | ## Description 9 | 10 | This Guide will show you how to Arch Linux Arm on your Device. 11 | You can either use built-in UFS storage, SD Card or external USB device. 12 | 13 | 14 | 15 |
Table of Contents
16 | 17 | - Installing Arch Linux 18 | - [What's needed](#needed-things) 19 | - [Partition Device](#partition-device-step-1) 20 | - [Partition UFS](#partition-ufs) 21 | - [Partition USB](#partition-usb--sd-card-method-2) 22 | - [Install](#installing-system-step-2) 23 | - [Install Bootloader](#installing-and-configuring-refind-step-3) 24 | - [Things to do post install](#things-to-do-post-installation) 25 | 26 |
27 | 28 | ## Needed Things: 29 | - PC / Laptop with Linux (VM can be used / WSL to be tested) 30 | - Unlocked Bootloader 31 | - [UEFI Image](https://github.com/Robotix22/Mu-Qcom/releases) 32 | - [Generic Arch Linux Arm image](https://archlinuxarm.org/platforms/armv8/generic) 33 | - [rEFInd](https://sourceforge.net/projects/refind/files/0.14.0.2/refind-bin-0.14.0.2.zip/download) 34 | 35 | ## Partition Device (Step 1) 36 | 37 | ## Partition UFS (Method 1) 38 | 39 | ***⚠️ In this Section of the Guide you can easily brick your Device! ⚠️*** 40 | 41 | Boot into your Custom Recovery and unmount `userdata`, then open Command Promt on your PC / Laptop and enter ADB Shell.
42 | Once in ADB Shell create a directory called `worksapce` in `/`: 43 | ``` 44 | mkdir /workspace/ 45 | ``` 46 | Then extract the .7z Files and push the content with `adb push` into the workspace folder: 47 | ``` 48 | adb push parted gdisk /workspace/ 49 | ``` 50 | After you copied parted and gdisk to workspace make it executable and run parted: 51 | ``` 52 | # NOTE: If your device has memory type eMMC, instead of sda use mmcblk0! 53 | chmod 744 parted gdisk 54 | ./parted /dev/block/sda 55 | ``` 56 | Once you executed parted print the partition table: 57 | ``` 58 | (parted) print 59 | ``` 60 | Find userdata in output and note the Number, Start and End Address.
61 | Example: 62 | ``` 63 | # NOTE: Don't use these Values it just an Example! 64 | Number Start End Size File system Name Flags 65 | 38 141GB 241GB 100GB userdata 66 | ``` 67 | Once you noted the Number, Start and End Address delete userdata and create is again but smaller:
68 | ``` 69 | # NOTE: Some devices use f2fs filesystem for userdata, ext4 won't suit them! 70 | # If you have a problem with the number of partitions 71 | # (can’t create another partition), you can try: 72 | # NOTE: If your device has memory type eMMC, instead of sda use mmcblk0! 73 | sgdisk --resize-table 99 /dev/block/sda # 99 number of maximum allowed partitions 74 | # Deleting userdata will wipe all your data in Android! 75 | (parted) rm 76 | (parted) mkpart userdata ext4 77 | ``` 78 | After shrinking userdata We can move on to creating the other Partitions: 79 | ``` 80 | (parted) mkpart esp fat32 81 | (parted) mkpart arch ext4 82 | ``` 83 | Now we set esp to active by running: `set esp on`.
84 | Once that is done we exit parted and reboot again to recovery: 85 | ``` 86 | (parted) quit 87 | reboot recovery 88 | ``` 89 | After that format the partitions: 90 | ``` 91 | mke2fs -t ext4 /dev/block/by-name/userdata # Userdata 92 | mkfs.fat -F32 -s1 /dev/block/by-name/esp # ESP 93 | mke2fs -t ext4 /dev/block/by-name/arch # Arch 94 | ``` 95 | If formatting userdata gives an error reboot to recovery and format userdata in the Custom Recovery GUI.
96 | 97 | ***⚠️ End of the Dangerous Section! ⚠️*** 98 | 99 | ### Mounting UFS 100 | 101 | If your Device has a Mass Storage Guide use that.
102 | If Not, Use [Mass-Storage.zip](https://github.com/Robotix22/Mu-Qcom-Guides/files/11005130/Mass-Storage.zip) and copy it contents to a FAT32 Partition on your Device.
103 | After that boot the UEFI Image then it enters Windows Boot Manager select `Developer Menu` -> `USB Mass Storage Mode`.
104 | 105 | Then connect your Device to the PC / Laptop and find the Arch and esp partition.
106 | 107 | Mount your device like this: 108 | ``` 109 | ~/uefi » su root 110 | [root@wisnia uefi]# mkdir tmp 111 | [root@wisnia uefi]# mount /dev/sdx tmp/ 112 | [root@wisnia uefi]# mkdir tmp/boot 113 | [root@wisnia uefi]# mount /dev/sdx tmp/boot/ 114 | ``` 115 | 116 | ## Partition USB / SD Card (Method 2) 117 | 118 | Use your favourite way to partition the USB drive according to this scheme: 119 | 120 | | Mount point | Partition | Partition Type| Suggested size | 121 | | ------------- | ------------- | ------------- | ------------- | 122 | | mnt/boot | Esp Part | fat32 | 1 GiB | 123 | | mnt | Arch Root | ext4 | Rest of the device| 124 | 125 | Then Create a temp folder somewhere on your pc and open a terminal. 126 | 127 | You can also copy the `ArchLinuxARM-aarch64-latest.tar.gz` you got earlier as you are gonna need it later 128 | 129 | Mount the External Storage Device according to the mount points above: 130 | 131 | Like this: 132 | ``` 133 | ~/uefi » su root 134 | [root@wisnia uefi]# mkdir tmp 135 | [root@wisnia uefi]# mount /dev/sdx2 tmp/ 136 | [root@wisnia uefi]# mkdir tmp/boot 137 | [root@wisnia uefi]# mount /dev/sdx1 tmp/boot/ 138 | ``` 139 | 140 | ## Installing System (Step 2) 141 | 142 | Unpack the rootfs onto the mounted device 143 | > NOTE: You **NEED** to be logged in as root, sudo won't work 144 | 145 | ``` 146 | ~/uefi » su root 147 | [root@wisnia uefi]# bsdtar -xpf ArchLinuxARM-aarch64-latest.tar.gz -C tmp/ 148 | ``` 149 | 150 | ## Installing and configuring Refind (Step 3) 151 | 152 | Okay so now you have a system, now you need a bootloader I'm going to use refind but you could use something like GRUB2 if you wish. 153 | 154 | Unpack `refind-bin-x.xx.x.x.zip` into `refind/` directory. 155 | 156 | Copy over this files/folders from `refind/refind/` folder into the `tmp/boot/EFI/boot/` folder (if it dosen't exist create it) 157 | ``` 158 | drivers_aa64/ 159 | icons/ 160 | tools_aa64/ 161 | refind_aa64.efi 162 | ``` 163 | 164 | rename `refind_aa64.efi` to `bootaa64.efi` 165 | 166 | Go back into the `tmp/boot` folder 167 | Rename the `Image.gz` to `vmlinuz-linux.gz` 168 | 169 | Create `refind_linux.conf` file and add this line: 170 | 171 | > If you don't have mainline device tree add `acpi=force` after the UUID 172 | ``` 173 | "Boot with UUID" "rw root=UUID=" 174 | ``` 175 | 176 | You can get the UUID by using the blkid command: 177 | ``` 178 | ~/uefi » sudo blkid /dev/sdx2 179 | /dev/sdx2: UUID="cbcc0246-582a-4edf-933b-8a85011b7646" BLOCK_SIZE="4096" TYPE="ext4" PARTUUID="5f351c6d-8f34-4d6f-b958-f00646d5e640" 180 | ``` 181 | 182 | In this case UUID would be `cbcc0246-582a-4edf-933b-8a85011b7646` 183 | 184 | > NOTE: You might want to add `acpi=force` to the command line, because at the time of writing this guide booting with mainline device tree isn't working 185 | 186 | After that unmount device: 187 | 188 | ``` 189 | [root@wisnia tmp]# umount tmp/boot 190 | [root@wisnia tmp]# umount tmp/ 191 | [root@wisnia tmp]# sync 192 | ``` 193 | 194 | ## Things to do post installation 195 | 196 | ### Login 197 | 198 | Username: `alarm` 199 | 200 | Password: `alarm` 201 | 202 | ### Connect to the internet 203 | 204 | 1. Connect USB internet source (USB tethering or USB to Ethernet card) 205 | 2. Run `dhcpcd &` after logging in to get IP address 206 | 3. Check internet access by `ping 1.1.1.1` 207 | 208 | ### Initialize the pacman keyring and populate the Arch Linux ARM package signing keys 209 | 210 | ``` 211 | pacman-key --init 212 | pacman-key --populate archlinuxarm 213 | ``` 214 | After doing this you can now use pacman to install packages 215 | 216 | ### Install Desktop Environment 217 | 218 | > TODO: figure out how to force Xorg to use framebuffer provided by UEFI 219 | -------------------------------------------------------------------------------- /General/OS/Full-Windows/README.md: -------------------------------------------------------------------------------- 1 | # Installing Windows 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | Make sure to check the Status of your Device [here](https://github.com/Robotix22/Mu-Qcom/blob/main/Status.md). 7 | 8 | ## Description 9 | 10 | This Guide will show you how to install full Windows on your Device. 11 | 12 | 13 | 14 |
Table of Contents
15 | 16 | - Installing Windows 17 | - [What's needed](#needed-things) 18 | - [Prepare](#preparing-step-1) 19 | - [ISO](#windows-image-step-11) 20 | - [Drivers](#windows-drivers-step-12) 21 | - [Partition UFS](#partition-ufs-step-2) 22 | - [Install](#installing-step-3) 23 | - [Apply Drivers](#applying-drivers-step-4) 24 | - [Reinstall Windows](#reinstalling-windows) 25 | 26 |
27 | 28 | ## Needed Things: 29 | - PC / Laptop with Windows (Recommended: Windows 10 or higher) 30 | - [ADB](https://developer.android.com/studio/releases/platform-tools#downloads) 31 | - Custom Recovery 32 | - Unlocked Bootloader 33 | - [UEFI Image](https://github.com/Robotix22/Mu-Qcom) 34 | - install.wim from an Windows 10/11 ISO 35 | - [Parted](https://renegade-project.tech/tools/parted.7z) 36 | - [GDisk](https://renegade-project.tech/tools/gdisk.7z) 37 | 38 | ## Preparing (Step 1) 39 | 40 | ## Windows Image (Step 1.1) 41 | 42 | [UUP Dump](https://uupdump.net/) is recommended to get a Windows 10/11 ARM64 ISO Image.
43 | It's not recommended to choose Windows 24H2 Builds or Higher as they Might Brick your Device! 44 | Unless its Noted that the Device Requires 24H2 Builds or higher
45 | Choose a Build and select all Options you prefer.
46 | After that download the zip File and extract it on your PC / Laptop. (The Path should not contain any spaces)
47 | Then Open the extracted Folder and run the Build script, wait once it is finished. (Some AntiVirus Programs stop the Build)
48 | A ISO will appear in the Folder, open the ISO File and extract the install.wim from `sources` and place it somewhere, where you can reach it. 49 | 50 | ## Windows Drivers (Step 1.2) 51 | 52 | TODO: Add this Section if any Drivers are created for a Device 53 | 54 | ## Partition UFS (Step 2) 55 | 56 | ***⚠️ In this Section of the Guide you can easly brick your Device! ⚠️*** 57 | 58 | Boot into your Custom Recovery and unmount `userdata`, then open Command Promt on your PC / Laptop and enter ADB Shell.
59 | Once in ADB Shell create a directory called `worksapce` in `/`: 60 | ``` 61 | mkdir /workspace/ 62 | ``` 63 | Then extract the .7z Files and push the content with `adb push` into the workspace folder: 64 | ``` 65 | adb push parted gdisk /workspace/ 66 | ``` 67 | After you copied parted and gdisk to workspace make it executeable and run parted: 68 | ``` 69 | # NOTE: If your device has memory type eMMC, instead of sda use mmcblk0! 70 | chmod 744 parted gdisk 71 | ./parted /dev/block/sda 72 | ``` 73 | Once you executed parted print the partition table: 74 | ``` 75 | (parted) print 76 | ``` 77 | Find userdata in output and note the Number, Start and End Address.
78 | Example: 79 | ``` 80 | # NOTE: Don't use these Values it just an Example! 81 | Number Start End Size File system Name Flags 82 | 38 141GB 241GB 100GB userdata 83 | ``` 84 | Once you noted the Number, Start and End Address delete userdata and create is again but smaller:
85 | ``` 86 | # NOTE: Some devices use f2fs filesystem for userdata, ext4 won't suit them! 87 | # If you have a problem with the number of partitions 88 | # (can’t create another partition), you can try: 89 | # NOTE: If your device has memory type eMMC, instead of sda use mmcblk0! 90 | sgdisk --resize-table 99 /dev/block/sda # 99 number of maximum allowed partitions 91 | # Deleting userdata will wipe all your data in Android! 92 | (parted) rm 93 | (parted) mkpart userdata ext4 94 | ``` 95 | After shrinking userdata We can move on to creating the other Partitions: 96 | ``` 97 | (parted) mkpart esp fat32 98 | (parted) mkpart win ntfs 99 | ``` 100 | Now we set esp to active by running: `set esp on`.
101 | Once that is done we exit parted and reboot again to recovery: 102 | ``` 103 | (parted) quit 104 | reboot recovery 105 | ``` 106 | After that format the partitions: 107 | ``` 108 | mke2fs -t ext4 /dev/block/by-name/userdata # Userdata 109 | mkfs.fat -F32 -s1 /dev/block/by-name/esp # ESP 110 | mkfs.ntfs -f /dev/block/by-name/win # Windows 111 | ``` 112 | If formating userdata gives a error reboot to recovery and format userdata in the Custom Recovery GUI.
113 | 114 | ***⚠️ End of the Dangerous Section! ⚠️*** 115 | 116 | ## Installing (Step 3) 117 | 118 | If your Device has an Mass Storage Guide use that.
119 | If Not Use [Mass-Storage.zip](https://github.com/Robotix22/Mu-Qcom-Guides/files/11005130/Mass-Storage.zip) and copy it contents to a FAT32 Partition on your Device.
120 | After that boot the UEFI Image then it enters Windows Boot Manager select `Developer Menu` -> `USB Mass Storage Mode`.
121 | 122 | Then connect your Device to the PC / Laptop and find the Windows and esp partition.
123 | Open diskpart in Command Promt and Find all needed Partitions: 124 | ``` 125 | # NOTE: Most likely, your system itself will assign a letter to the win partition. 126 | DISKPART> lis dis 127 | # you can findout the Device ID by looking at the Sizes you may regonize your Device Internal Storage Size. 128 | DISKPART> sel dis 129 | DISKPART> lis par 130 | DISKPART> sel par 131 | # Use a other Letter if "X" is not availbe. 132 | DISKPART> assign letter X 133 | DISKPART> sel par 134 | # Use a other Letter if "R" is not availbe. 135 | DISKPART> assign letter R 136 | DISKPART> exit 137 | ``` 138 | Now we will apply install.wim using dism: 139 | ``` 140 | # R: Is what we assigned in the diskpart part, replace the letter if you used another letter. 141 | dism /apply-image /ImageFile: /index:1 /ApplyDir:R:\ 142 | ``` 143 | After that we need to create the Boot Files other wise our UEFI won't regonise Windows: 144 | ``` 145 | # R: and X: Is what we assigned in the diskpart part, replace the letter if you used another letter. 146 | bcdboot R:\Windows /s X: /f UEFI 147 | ``` 148 | 149 | ## Applying Drivers (Step 4) 150 | 151 | TODO: Add this Sections if there are any Drivers for a Device. 152 | 153 | ## Configure BCD (Step 5) 154 | 155 | cd into the EFI Partition of your Device and edit some BCD Values: 156 | ``` 157 | # Start CMD as Admin if you can't access The ESP Partition. 158 | # X: Is what we assinged in the diskpart part, replace the letter if you used another letter. 159 | cd X:\EFI\Microsoft\Boot 160 | bcdedit /store BCD /set "{default}" testsigning on 161 | bcdedit /store BCD /set "{default}" nointegritychecks on 162 | bcdedit /store BCD /set "{default}" recoveryenabled no 163 | ``` 164 | After that reboot to recovery and remove Mass Storage, then reboot into UEFI and enjoy your Windows Installation. 165 | 166 | ## Fixing work USB (Step 6) 167 | 168 | After you boot into the system, you will be taken to OOBE or the desktop (depending on the image) and find that the USB does not work. In order to fix this you must: 169 | 170 | Boot into custom recovery and run them mass storage script according to the instructions that can be found for your device here [Mu-Qcom Guides](/Mu-Qcom/README.md) 171 | 172 | After that, in the command line of your PC, enter: 173 | ``` 174 | # R: Is what we assigned in the diskpart part, replace the letter if you used another letter. 175 | reg load HKLM\OFFLINE R:\Windows\System32\Config\System 176 | regedit 177 | ``` 178 | In HKEY_LOCAL_MACHINE/OFFLINE/ControlSet001/Control/USB/OsDefaultRoleSwitchMode change value to 1 179 | After, in the command line of your PC, enter 180 | ```reg unload HKLM\OFFLINE``` 181 | Done! 182 | 183 | ## Reinstalling Windows 184 | 185 | To reinstall you need Mass Storage again.
186 | Boot into Mass Storage, plug in your Phone into the PC / Laptop and format the Windows Partition on your Phone to NTFS using the GUI.
187 | After that apply again the install.wim and then, create the boot files again.
188 | Then also apply the BCD Settings again. 189 | -------------------------------------------------------------------------------- /General/OS/Windows-PE/README.md: -------------------------------------------------------------------------------- 1 | # Installing Windows PE 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | Make sure to check the Status of your Device [here](https://github.com/Robotix22/Mu-Qcom/blob/main/Status.md). 7 | 8 | ## Description 9 | 10 | This Guide will show you how to Install Windows PE on your Device. 11 | 12 | 13 | 14 |
Table of Contents
15 | 16 | - Installing Windows PE 17 | - [What's needed](#things-you-need) 18 | - [Installing](#installation) 19 | - [Method 1](#method-1-cust) 20 | - [Preparing](#preparing-step-1) 21 | - [Formatting](#formating-cust-partition-step-2) 22 | - [Copy Files](#copying-windows-pe-files-step-3) 23 | - [Method 2](#method-2-partitions) 24 | - [Preparing](#preparing-step-1-1) 25 | - [Partition](#partitions-step-2) 26 | - [Copy Files](#copying-winpe-files-step-3) 27 | 28 |
29 | 30 | ## Things you need: 31 | - PC / Laptop 32 | - [ADB and Fastboot](https://developer.android.com/studio/releases/platform-tools#downloads) 33 | - Custom Recovery 34 | - Unlocked Bootloader 35 | - [UEFI Image](https://github.com/Robotix22/Mu-Qcom) 36 | - Windows PE (Recommended: [Driverless WinPE](https://drive.google.com/drive/folders/1-k4LwTuVw48e3Es_CIKPNf68CA9HXYRb)) 37 | 38 | ## Installation 39 | 40 | ## Method 1 (Cust) 41 | 42 | ## Preparing (Step 1) 43 | 44 | First of we need to prepare some things before we install Windows PE on our Device.
45 | Make sure you have a Custom Recovery installed on your Device and have ADB on your PC / Laptop.
46 | Compile a UEFI Image and place it somewhere on your PC / Laptop where you can find it again.
47 | Download Windows PE and extract the zip File somewhere, where you can reach it. 48 | 49 | ## Formatting Cust Partition (Step 2) 50 | 51 | We will now format the cust Partition to FAT32: 52 | ``` 53 | # NOTE: Not all Devices have a cust Partition 54 | # Some OnePlus Devices also have a cust Partition but under a diffrent Name 55 | # The Name is as we know this: oem_cust1_a/b 56 | mkfs.fat -F32 -s1 /dev/block/by-name/cust 57 | ``` 58 | 59 | ## Copying Windows PE Files (Step 3) 60 | 61 | After that we copy the Windows PE Files into cust.
62 | First mount cust with ADB Shell: 63 | ``` 64 | mkdir /cust 65 | mount /dev/block/by-name/cust /cust 66 | ``` 67 | then use `adb push` to copy all Windows PE Files to cust: 68 | ``` 69 | adb push /cust/ 70 | ``` 71 | After that it should contain `sources`, `efi` and `boot`.
72 | You have now successfully installed Windows PE. 73 | 74 | ## Method 2 (Partitions) 75 | 76 | ## Preparing (Step 1) 77 | 78 | First we need to prepare some things like Programs, etc. before we install Windows PE.
79 | Check if your Device has a Custom Recovery installed and if your PC / Laptop has ADB installed.
80 | Download [parted](https://renegade-project.tech/tools/parted.7z) and [gdisk](https://renegade-project.tech/tools/gdisk.7z), save them somewhere you can reach them again.
81 | Find a version of Windows PE that you want to download and save it somewhere, where it can be reached
82 | 83 | ## Partitions (Step 2) 84 | 85 | Boot into your Custom Recovery and plug your Device into the PC / Laptop.
86 | Create a Workspace where you put `parted` and `gdisk`: 87 | ``` 88 | adb shell mkdir /workspace 89 | ``` 90 | then push `parted` and `gdisk` into the workspace: 91 | ``` 92 | adb push parted gdisk /workspace/ 93 | adb shell chmod 744 /workspace/parted /workspace/gdisk 94 | ``` 95 | before we use parted unmount `userdata` or else some weird stuff is going to happen!
96 | After that enter ADB Shell and open sda with parted: 97 | ``` 98 | adb shell 99 | cd /workspace 100 | ./parted /dev/block/by-name/sda 101 | ``` 102 | 103 | ⚠️ ***This Section can break your Device if you are not careful!*** ⚠️
104 | 105 | After you open sda with parted list all partitions and note all infos about userdata (Start, End and Number): 106 | ``` 107 | (parted) print 108 | ``` 109 | Something like this should show up: 110 | ``` 111 | # NOTE: Don't use these Values it just an Example! 112 | Number Start End Size File system Name Flags 113 | 38 141GB 241GB 100GB userdata 114 | ``` 115 | Once you noted `Start`, `End` and `Number` from Userdata we can move on to creating Partitions.
116 | First delete userdada (This will erase all your Data in Android) and create it again but smaller: 117 | ``` 118 | (parted) rm 119 | (parted) mkpart userdata ext4 120 | ``` 121 | After that create the Win PE Partition: 122 | ``` 123 | (parted) mkpart pe fat32 124 | ``` 125 | 126 | ⚠️ ***End of Dangerous Section!*** ⚠️
127 | 128 | After you created the new Partitions quit parted and format `userdata` and `pe`: 129 | ``` 130 | (parted) quit 131 | mke2fs -t ext4 /dev/block/sda 132 | mkfs.fat -F32 -s1 /dev/block/sda 133 | ``` 134 | 135 | ## Copying WinPE Files (Step 3) 136 | 137 | Now mount `pe` and move all Windows PE Files in it: 138 | ``` 139 | mkdir /mnt/pe 140 | mount /dev/block/by-name/pe /mnt/pe 141 | exit 142 | adb push /mnt/pe/ 143 | ``` 144 | Reboot into UEFI and thats it! You successfully installed Windows PE! 145 | -------------------------------------------------------------------------------- /General/README.md: -------------------------------------------------------------------------------- 1 | # General Guides 2 | 3 | > [!WARNING] 4 | > These Guides are Outdated! Remasters of these Guides will come soon. 5 | 6 | ## [Installing Windows](OS/Full-Windows/README.md) 7 | 8 | - This Guide Explains how you can Install Windows on your Device. 9 | 10 | ## [Installing Windows PE](OS/Windows-PE/README.md) 11 | 12 | - This Guide Explains how you can Install Windows PE on your Device. 13 | 14 | --- 15 | 16 | ## [Installing Arch Linux](OS/Arch-Linux/README.md) 17 | 18 | - This Guide Explains how you can Install Arch Linux on your Device. 19 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Guides 2 | 3 | ## [General Guides](General/README.md) 4 | 5 | - This Section contains Guides like: Installing Windows or Linux. 6 | 7 | --- 8 | 9 | ## [Vendor Guides](Vendors/README.md) 10 | 11 | - This Section contains Guides for Vendor Specific Guides. 12 | 13 | ## Device Guides 14 | 15 | - No Guides yet. 16 | 17 | --- 18 | 19 | ## Exynos Guides 20 | 21 | - No Guides yet. 22 | 23 | ## [Snapdragon Guides](SoCs/Snapdragon/README.md) 24 | 25 | - This Section contains Guides like how to use Mass Storage in TWRP. 26 | 27 | ## Tegra Guides 28 | 29 | - No Guides yet. 30 | 31 | --- 32 | 33 | ## [Silicium Guides](Silicium/README.md) 34 | 35 | - This Section Contains Guides like How to Port a Device and/or SoC. 36 | -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/ACPI/README.md: -------------------------------------------------------------------------------- 1 | # Creating Minimal ACPI Tables 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | ## Before you Begin 7 | 8 | Make sure that there aren't already any Minimal ACPI Tables in the SoC Folder.
9 | Otherwise Skip this entire Guide. 10 | 11 | ## Description 12 | 13 | This Guide will show you how to create minimal ACPI Tables for a SoC that Devices with that SoC can use. 14 | 15 | 16 | 17 |
Table of Contents
18 | 19 | - Minimal ACPI Tables 20 | - [Requirements](#recuirements) 21 | - [Explanation](#explanation-for-acpi-tables) 22 | - [Creating ACPI Tables](#creating-acpi-tables-step-1) 23 | - [Creating APIC](#creating-apicdsl-step-11) 24 | - [Creating APIC UniCore](#creating-apicunicoredsl-step-12) 25 | - [Creating DSDT](#creating-dsdtminimaldsl-step-13) 26 | - [Creating FACP](#creating-facpdsl-step-14) 27 | - [Creating GTDT](#creating-gtdtdsl-step-15) 28 | - [Compiling](#compiling-acpi-tables-step-2) 29 | 30 |
31 | 32 | ## Requirements 33 | 34 | To Create Minimal ACPI you need these following Things: 35 | 36 | - Linux Terminal with `iasl` Command 37 | - An Editor to edit the decompiled ACPI Tables 38 | - DTB from your Device 39 | 40 | ## Explanation for ACPI Tables 41 | 42 | For a Snapdragon Device To Boot Windows are only 4 ACPI Tables needed: APIC, FACP, GTDT and DSDT. 43 | 44 | APIC (Multiple APIC Description Table) in a Descriptor ACPI Table wich Describes the CPU and Interrupt Controller (GIC).
45 | FACP (Fixed ACPI Description Table) is used to define Varios Static and Configuration Details about the System.
46 | GTDT (Generic Timer Description Table) stores the Generic Timer Infos about the System.
47 | DSDT (Differentiated System Description Table) stores all Device Specific Values of Devices like UFS for Windows Drivers to pick up.
48 | See it as the UEFI DTB Version for Example. 49 | 50 | ## Creating ACPI Tables (Step 1) 51 | 52 | ## Creating APIC.dsl (Step 1.1) 53 | 54 | Lets Beginn with APIC ACPI Table first.
55 | Create a File called `APIC.dsl` in `Silicon/Qualcomm/Pkg/AcpiTables/`.
56 | That File should Contain this: 57 | ``` 58 | [000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)] 59 | [004h 0004 004h] Table Length : 000002FC 60 | [008h 0008 001h] Revision : 05 61 | [009h 0009 001h] Checksum : 00 62 | [00Ah 0010 006h] Oem ID : "QCOM " 63 | [010h 0016 008h] Oem Table ID : "QCOMEDK2" 64 | [018h 0024 004h] Oem Revision : 65 | [01Ch 0028 004h] Asl Compiler ID : "INTL" 66 | [020h 0032 004h] Asl Compiler Revision : 20230628 67 | 68 | [024h 0036 004h] Local Apic Address : 00000000 69 | [028h 0040 004h] Flags (decoded below) : 00000000 70 | PC-AT Compatibility : 0 71 | 72 | [02Ch 0044 001h] Subtable Type : 0B [Generic Interrupt Controller] 73 | [02Dh 0045 001h] Length : 50 74 | [02Eh 0046 002h] Reserved : 0000 75 | [030h 0048 004h] CPU Interface Number : 00000000 76 | [034h 0052 004h] Processor UID : 00000000 77 | [038h 0056 004h] Flags (decoded below) : 00000001 78 | Processor Enabled : 1 79 | Performance Interrupt Trigger Mode : 0 80 | Virtual GIC Interrupt Trigger Mode : 0 81 | [03Ch 0060 004h] Parking Protocol Version : 00000000 82 | [040h 0064 004h] Performance Interrupt : 83 | [044h 0068 008h] Parked Address : 0000000000000000 84 | [04Ch 0076 008h] Base Address : 0000000000000000 85 | [054h 0084 008h] Virtual GIC Base Address : 0000000000000000 86 | [05Ch 0092 008h] Hypervisor GIC Base Address : 0000000000000000 87 | [064h 0100 004h] Virtual GIC Interrupt : 88 | [068h 0104 008h] Redistributor Base Address : 0000000000000000 89 | [070h 0112 008h] ARM MPIDR : 90 | [078h 0120 001h] Efficiency Class : 91 | [079h 0121 001h] Reserved : 00 92 | [07Ah 0122 002h] SPE Overflow Interrupt : 0000 93 | 94 | [07Eh 0126 001h] Subtable Type : 0B [Generic Interrupt Controller] 95 | [07Fh 0127 001h] Length : 50 96 | [080h 0128 002h] Reserved : 0000 97 | [082h 0130 004h] CPU Interface Number : 00000001 98 | [086h 0134 004h] Processor UID : 00000001 99 | [08Ah 0138 004h] Flags (decoded below) : 00000001 100 | Processor Enabled : 1 101 | Performance Interrupt Trigger Mode : 0 102 | Virtual GIC Interrupt Trigger Mode : 0 103 | [08Eh 0142 004h] Parking Protocol Version : 00000000 104 | [092h 0146 004h] Performance Interrupt : 105 | [096h 0150 008h] Parked Address : 0000000000000000 106 | [09Eh 0158 008h] Base Address : 0000000000000000 107 | [0A6h 0166 008h] Virtual GIC Base Address : 0000000000000000 108 | [0AEh 0174 008h] Hypervisor GIC Base Address : 0000000000000000 109 | [0B6h 0182 004h] Virtual GIC Interrupt : 110 | [0BAh 0186 008h] Redistributor Base Address : 0000000000000000 111 | [0C2h 0194 008h] ARM MPIDR : 112 | [0CAh 0202 001h] Efficiency Class : 113 | [0CBh 0203 001h] Reserved : 00 114 | [0CCh 0204 002h] SPE Overflow Interrupt : 0000 115 | 116 | [0D0h 0208 001h] Subtable Type : 0B [Generic Interrupt Controller] 117 | [0D1h 0209 001h] Length : 50 118 | [0D2h 0210 002h] Reserved : 0000 119 | [0D4h 0212 004h] CPU Interface Number : 00000002 120 | [0D8h 0216 004h] Processor UID : 00000002 121 | [0DCh 0220 004h] Flags (decoded below) : 00000001 122 | Processor Enabled : 1 123 | Performance Interrupt Trigger Mode : 0 124 | Virtual GIC Interrupt Trigger Mode : 0 125 | [0E0h 0224 004h] Parking Protocol Version : 00000000 126 | [0E4h 0228 004h] Performance Interrupt : 127 | [0E8h 0232 008h] Parked Address : 0000000000000000 128 | [0F0h 0240 008h] Base Address : 0000000000000000 129 | [0F8h 0248 008h] Virtual GIC Base Address : 0000000000000000 130 | [100h 0256 008h] Hypervisor GIC Base Address : 0000000000000000 131 | [108h 0264 004h] Virtual GIC Interrupt : 132 | [10Ch 0268 008h] Redistributor Base Address : 0000000000000000 133 | [114h 0276 008h] ARM MPIDR : 134 | [11Ch 0284 001h] Efficiency Class : 135 | [11Dh 0285 001h] Reserved : 00 136 | [11Eh 0286 002h] SPE Overflow Interrupt : 0000 137 | 138 | [122h 0290 001h] Subtable Type : 0B [Generic Interrupt Controller] 139 | [123h 0291 001h] Length : 50 140 | [124h 0292 002h] Reserved : 0000 141 | [126h 0294 004h] CPU Interface Number : 00000003 142 | [12Ah 0298 004h] Processor UID : 00000003 143 | [12Eh 0302 004h] Flags (decoded below) : 00000001 144 | Processor Enabled : 1 145 | Performance Interrupt Trigger Mode : 0 146 | Virtual GIC Interrupt Trigger Mode : 0 147 | [132h 0306 004h] Parking Protocol Version : 00000000 148 | [136h 0310 004h] Performance Interrupt : 149 | [13Ah 0314 008h] Parked Address : 0000000000000000 150 | [142h 0322 008h] Base Address : 0000000000000000 151 | [14Ah 0330 008h] Virtual GIC Base Address : 0000000000000000 152 | [152h 0338 008h] Hypervisor GIC Base Address : 0000000000000000 153 | [15Ah 0346 004h] Virtual GIC Interrupt : 154 | [15Eh 0350 008h] Redistributor Base Address : 0000000000000000 155 | [166h 0358 008h] ARM MPIDR : 156 | [16Eh 0366 001h] Efficiency Class : 157 | [16Fh 0367 001h] Reserved : 00 158 | [170h 0368 002h] SPE Overflow Interrupt : 0000 159 | 160 | [174h 0372 001h] Subtable Type : 0B [Generic Interrupt Controller] 161 | [175h 0373 001h] Length : 50 162 | [176h 0374 002h] Reserved : 0000 163 | [178h 0376 004h] CPU Interface Number : 00000004 164 | [17Ch 0380 004h] Processor UID : 00000004 165 | [180h 0384 004h] Flags (decoded below) : 00000001 166 | Processor Enabled : 1 167 | Performance Interrupt Trigger Mode : 0 168 | Virtual GIC Interrupt Trigger Mode : 0 169 | [184h 0388 004h] Parking Protocol Version : 00000000 170 | [188h 0392 004h] Performance Interrupt : 171 | [18Ch 0396 008h] Parked Address : 0000000000000000 172 | [194h 0404 008h] Base Address : 0000000000000000 173 | [19Ch 0412 008h] Virtual GIC Base Address : 0000000000000000 174 | [1A4h 0420 008h] Hypervisor GIC Base Address : 0000000000000000 175 | [1ACh 0428 004h] Virtual GIC Interrupt : 176 | [1B0h 0432 008h] Redistributor Base Address : 0000000000000000 177 | [1B8h 0440 008h] ARM MPIDR : 178 | [1C0h 0448 001h] Efficiency Class : 179 | [1C1h 0449 001h] Reserved : 00 180 | [1C2h 0450 002h] SPE Overflow Interrupt : 0000 181 | 182 | [1C6h 0454 001h] Subtable Type : 0B [Generic Interrupt Controller] 183 | [1C7h 0455 001h] Length : 50 184 | [1C8h 0456 002h] Reserved : 0000 185 | [1CAh 0458 004h] CPU Interface Number : 00000005 186 | [1CEh 0462 004h] Processor UID : 00000005 187 | [1D2h 0466 004h] Flags (decoded below) : 00000001 188 | Processor Enabled : 1 189 | Performance Interrupt Trigger Mode : 0 190 | Virtual GIC Interrupt Trigger Mode : 0 191 | [1D6h 0470 004h] Parking Protocol Version : 00000000 192 | [1DAh 0474 004h] Performance Interrupt : 193 | [1DEh 0478 008h] Parked Address : 0000000000000000 194 | [1E6h 0486 008h] Base Address : 0000000000000000 195 | [1EEh 0494 008h] Virtual GIC Base Address : 0000000000000000 196 | [1F6h 0502 008h] Hypervisor GIC Base Address : 0000000000000000 197 | [1FEh 0510 004h] Virtual GIC Interrupt : 198 | [202h 0514 008h] Redistributor Base Address : 0000000000000000 199 | [20Ah 0522 008h] ARM MPIDR : 200 | [212h 0530 001h] Efficiency Class : 201 | [213h 0531 001h] Reserved : 00 202 | [214h 0532 002h] SPE Overflow Interrupt : 0000 203 | 204 | [218h 0536 001h] Subtable Type : 0B [Generic Interrupt Controller] 205 | [219h 0537 001h] Length : 50 206 | [21Ah 0538 002h] Reserved : 0000 207 | [21Ch 0540 004h] CPU Interface Number : 00000006 208 | [220h 0544 004h] Processor UID : 00000006 209 | [224h 0548 004h] Flags (decoded below) : 00000001 210 | Processor Enabled : 1 211 | Performance Interrupt Trigger Mode : 0 212 | Virtual GIC Interrupt Trigger Mode : 0 213 | [228h 0552 004h] Parking Protocol Version : 00000000 214 | [22Ch 0556 004h] Performance Interrupt : 215 | [230h 0560 008h] Parked Address : 0000000000000000 216 | [238h 0568 008h] Base Address : 0000000000000000 217 | [240h 0576 008h] Virtual GIC Base Address : 0000000000000000 218 | [248h 0584 008h] Hypervisor GIC Base Address : 0000000000000000 219 | [250h 0592 004h] Virtual GIC Interrupt : 220 | [254h 0596 008h] Redistributor Base Address : 0000000000000000 221 | [25Ch 0604 008h] ARM MPIDR : 222 | [264h 0612 001h] Efficiency Class : 223 | [265h 0613 001h] Reserved : 00 224 | [266h 0614 002h] SPE Overflow Interrupt : 0000 225 | 226 | [26Ah 0618 001h] Subtable Type : 0B [Generic Interrupt Controller] 227 | [26Bh 0619 001h] Length : 50 228 | [26Ch 0620 002h] Reserved : 0000 229 | [26Eh 0622 004h] CPU Interface Number : 00000007 230 | [272h 0626 004h] Processor UID : 00000007 231 | [276h 0630 004h] Flags (decoded below) : 00000001 232 | Processor Enabled : 1 233 | Performance Interrupt Trigger Mode : 0 234 | Virtual GIC Interrupt Trigger Mode : 0 235 | [27Ah 0634 004h] Parking Protocol Version : 00000000 236 | [27Eh 0638 004h] Performance Interrupt : 237 | [282h 0642 008h] Parked Address : 0000000000000000 238 | [28Ah 0650 008h] Base Address : 0000000000000000 239 | [292h 0658 008h] Virtual GIC Base Address : 0000000000000000 240 | [29Ah 0666 008h] Hypervisor GIC Base Address : 0000000000000000 241 | [2A2h 0674 004h] Virtual GIC Interrupt : 242 | [2A6h 0678 008h] Redistributor Base Address : 0000000000000000 243 | [2AEh 0686 008h] ARM MPIDR : 244 | [2B6h 0694 001h] Efficiency Class : 245 | [2B7h 0695 001h] Reserved : 00 246 | [2B8h 0696 002h] SPE Overflow Interrupt : 0000 247 | 248 | [2BCh 0700 001h] Subtable Type : 0C [Generic Interrupt Distributor] 249 | [2BDh 0701 001h] Length : 18 250 | [2BEh 0702 002h] Reserved : 0000 251 | [2C0h 0704 004h] Local GIC Hardware ID : 00000000 252 | [2C4h 0708 008h] Base Address : 253 | [2CCh 0716 004h] Interrupt Base : 00000000 254 | [2D0h 0720 001h] Version : 255 | [2D1h 0721 003h] Reserved : 000000 256 | 257 | [2D4h 0724 001h] Subtable Type : 0E [Generic Interrupt Redistributor] 258 | [2D5h 0725 001h] Length : 10 259 | [2D6h 0726 002h] Reserved : 0000 260 | [2D8h 0728 008h] Base Address : 261 | [2E0h 0736 004h] Length : 262 | ``` 263 | 264 | Depending on how much Cores your SoC has, Add the Count of `Generic Interrupt Controller`.
265 | For Example your SoC has 4 Cores instead of 8, Then you Only add 4 of `eneric Interrupt Controller` to APIC.dsl.
266 | 267 | `` Is the Interrupt Value of the `cpu-pwm` Node in your DTB.
268 | More Infos How to get the Interrupt: 269 | ``` 270 | # NOTE: Just an Example, Use your own. 271 | cpu-pmu { 272 | compatible = "arm,armv8-pmuv3"; 273 | interrupts = <0x01 0x07 0x04>; 274 | | | 275 | GIC_PPI | 276 | Interrupt 277 | phandle = <0x286>; 278 | }; 279 | ``` 280 | `GIC_PPI` (0x01) is `0x10`.
281 | So its like this: `0x07 + 0x10`, Thats your Interrupt in ACPI. 282 | 283 | `` is the Interrupt Value of the `interrupt-controller` Node in the DTB.
284 | More Infos How to get the Interrupt: 285 | ``` 286 | # NOTE: Just an Example, Use your own. 287 | interrupt-controller@17100000 { 288 | compatible = "arm,gic-v3"; 289 | #interrupt-cells = <0x03>; 290 | interrupt-controller; 291 | ranges; 292 | #redistributor-regions = <0x01>; 293 | redistributor-stride = <0x00 0x40000>; 294 | reg = <0x17100000 0x10000 0x17180000 0x200000>; 295 | interrupts = <0x01 0x09 0x04>; 296 | | | 297 | GIC_PPI | 298 | Interrupt 299 | phandle = <0x01>; 300 | }; 301 | ``` 302 | `GIC_PPI` (0x01) is `0x10`.
303 | So its like this: `0x09 + 0x10`, Thats your Interrupt in ACPI. 304 | 305 | `` is the ID of the current CPU, These Values are in the `cpus` Node.
306 | Example: 307 | ``` 308 | # NOTE: Just an Example, Use your own. 309 | cpus { 310 | #address-cells = <0x02>; 311 | #size-cells = <0x00>; 312 | 313 | cpu@0 { 314 | device_type = "cpu"; 315 | compatible = "qcom,kryo"; 316 | reg = <0x00 0x00>; 317 | | 318 | CPU ID 319 | enable-method = "psci"; 320 | next-level-cache = <0x03>; 321 | cpu-idle-states = <0x04>; 322 | power-domains = <0x05>; 323 | power-domain-names = "psci"; 324 | qcom,freq-domain = <0x06 0x00 0x04>; 325 | capacity-dmips-mhz = <0x400>; 326 | dynamic-power-coefficient = <0x64>; 327 | #cooling-cells = <0x02>; 328 | phandle = <0x15>; 329 | 330 | l2-cache { 331 | compatible = "arm,arch-cache"; 332 | cache-level = <0x02>; 333 | next-level-cache = <0x07>; 334 | phandle = <0x03>; 335 | 336 | l3-cache { 337 | compatible = "arm,arch-cache"; 338 | cache-level = <0x03>; 339 | phandle = <0x07>; 340 | }; 341 | }; 342 | }; 343 | }; 344 | ``` 345 | `CPU ID` is `0x00` there so its ID is 0 346 | 347 | `` is the Current Cluster of the Current CPU Core.
348 | The Clusters and CPU Cores can be found in the `cpu-map` Node of the DTB. 349 | 350 | `` and `` can be taken from the SoC .dsc.inc File. 351 | 352 | `` is the Version of GIC, The `compatible` Part of the `interrupt-controller` Node tell you that. 353 | 354 | `` is the Size Address of Redistributors, It can be taken from the `interrupt-controller` Node.
355 | Example: 356 | ``` 357 | # NOTE: Just an Example, Use your own. 358 | interrupt-controller@17100000 { 359 | compatible = "arm,gic-v3"; 360 | #interrupt-cells = <0x03>; 361 | interrupt-controller; 362 | ranges; 363 | #redistributor-regions = <0x01>; 364 | redistributor-stride = <0x00 0x40000>; 365 | reg = <0x17100000 0x10000 0x17180000 0x200000>; 366 | | 367 | Size Addr 368 | interrupts = <0x01 0x09 0x04>; 369 | phandle = <0x01>; 370 | }; 371 | ``` 372 | 373 | Now, There is extra Stuff in ACPI that only Some SoCs have.
374 | If your `interrupt-controller` Node has an subnode called `msi-controller` Then you need to add this too to APIC.dsl: 375 | ``` 376 | [2E4h 0740 001h] Subtable Type : 0D [Generic MSI Frame] 377 | [2E5h 0741 001h] Length : 18 378 | [2E6h 0742 002h] Reserved : 0000 379 | [2E8h 0744 004h] MSI Frame ID : 00000000 380 | [2ECh 0748 008h] Base Address : 381 | [2F4h 0756 004h] Flags (decoded below) : 00000001 382 | Select SPI : 1 383 | [2F8h 0760 002h] SPI Count : 0080 # We still have no Idea where to get this Value. 384 | [2FAh 0762 002h] SPI Base : 0340 # We still have no Idea where to get this Value. 385 | ``` 386 | It should be under the `Generic Interrupt Redistributor` Part. 387 | 388 | `` is the Base Address of the MSI Controller.
389 | Example: 390 | ``` 391 | # NOTE: Just an Example, Use your own. 392 | interrupt-controller@17100000 { 393 | compatible = "arm,gic-v3"; 394 | #interrupt-cells = <0x03>; 395 | interrupt-controller; 396 | ranges; 397 | #redistributor-regions = <0x01>; 398 | redistributor-stride = <0x00 0x40000>; 399 | reg = <0x17100000 0x10000 0x17180000 0x200000>; 400 | | 401 | Size Addr 402 | interrupts = <0x01 0x09 0x04>; 403 | phandle = <0x01>; 404 | 405 | msi-controller@17140000 { 406 | compatible = "arm,gic-v3-its"; 407 | msi-controller; 408 | #msi-cells = <0x01>; 409 | reg = <0x17140000 0x20000>; 410 | | 411 | Base Addr 412 | phandle = <0xcb>; 413 | }; 414 | }; 415 | ``` 416 | 417 | ## Creating APIC.UniCore.dsl (Step 1.2) 418 | 419 | This File is APIC but just with One Core Enabled, Its in some Cases usefull if Windows won't boot with 8 Cores.
420 | The Only thing that needs to be done here is Changing every: 421 | ``` 422 | [224h 0548 004h] Flags (decoded below) : 00000001 423 | Processor Enabled : 1 424 | ``` 425 | To 0, Just Core 0 Should stay 1. 426 | 427 | ## Creating DSDT_minimal.dsl (Step 1.3) 428 | 429 | ## TODO: Find out where to get the Values for DSDT ACPI Table 430 | 431 | ## Creating FACP.dsl (Step 1.4) 432 | 433 | The FACP ACPI Tables are the Same on every Snapdragon SoC. (Well we think so)
434 | Copy any FACP.dsl from any other SoC with ACPI Tables and paste it in `Silicon/Qualcomm/Pkg/AcpiTables/`.
435 | The Only thing that needs to be Changed is `Oem Revision`.
436 | Like in APIC.dsl, Change it to the SoC Codename Numbers. 437 | 438 | ## Creating GTDT.dsl (Step 1.5) 439 | 440 | Create a File called `GTDT.dsl` in `Silicon/Qualcomm/Pkg/AcpiTables/`.
441 | The Contents of the File should look like this: 442 | ``` 443 | [000h 0000 004h] Signature : "GTDT" [Generic Timer Description Table] 444 | [004h 0004 004h] Table Length : 0000009C 445 | [008h 0008 001h] Revision : 02 446 | [009h 0009 001h] Checksum : 00 447 | [00Ah 0010 006h] Oem ID : "QCOM " 448 | [010h 0016 008h] Oem Table ID : "QCOMEDK2" 449 | [018h 0024 004h] Oem Revision : 450 | [01Ch 0028 004h] Asl Compiler ID : "INTL" 451 | [020h 0032 004h] Asl Compiler Revision : 20230628 452 | 453 | [024h 0036 008h] Counter Block Address : FFFFFFFFFFFFFFFF 454 | [02Ch 0044 004h] Reserved : 00000000 455 | 456 | [030h 0048 004h] Secure EL1 Interrupt : 457 | [034h 0052 004h] EL1 Flags (decoded below) : 00000000 458 | Trigger Mode : 0 459 | Polarity : 0 460 | Always On : 0 461 | 462 | [038h 0056 004h] Non-Secure EL1 Interrupt : 463 | [03Ch 0060 004h] NEL1 Flags (decoded below) : 00000000 464 | Trigger Mode : 0 465 | Polarity : 0 466 | Always On : 0 467 | 468 | [040h 0064 004h] Virtual Timer Interrupt : 469 | [044h 0068 004h] VT Flags (decoded below) : 00000000 470 | Trigger Mode : 0 471 | Polarity : 0 472 | Always On : 0 473 | 474 | [048h 0072 004h] Non-Secure EL2 Interrupt : 475 | [04Ch 0076 004h] NEL2 Flags (decoded below) : 00000000 476 | Trigger Mode : 0 477 | Polarity : 0 478 | Always On : 0 479 | [050h 0080 008h] Counter Read Block Address : FFFFFFFFFFFFFFFF 480 | 481 | [058h 0088 004h] Platform Timer Count : 00000001 482 | [05Ch 0092 004h] Platform Timer Offset : 00000060 483 | 484 | [060h 0096 001h] Subtable Type : 00 [Generic Timer Block] 485 | [061h 0097 002h] Length : 003C 486 | [063h 0099 001h] Reserved : 00 487 | [064h 0100 008h] Block Address : 488 | [06Ch 0108 004h] Timer Count : 00000001 489 | [070h 0112 004h] Timer Offset : 00000014 490 | 491 | [074h 0116 001h] Frame Number : 00 492 | [075h 0117 003h] Reserved : 000000 493 | [078h 0120 008h] Base Address : <1st Base Addr of Timer Frame 1> 494 | [080h 0128 008h] EL0 Base Address : <2nd Base Addr of Timer Frame 1> 495 | [088h 0136 004h] Timer Interrupt : <1st Interrupt of Timer Frame 1> 496 | [08Ch 0140 004h] Timer Flags (decoded below) : 00000000 497 | Trigger Mode : 0 498 | Polarity : 0 499 | [090h 0144 004h] Virtual Timer Interrupt : <2nd Interrupt of Timer Frame 1> 500 | [094h 0148 004h] Virtual Timer Flags (decoded below) : 00000000 501 | Trigger Mode : 0 502 | Polarity : 0 503 | [098h 0152 004h] Common Flags (decoded below) : 00000002 504 | Secure : 0 505 | Always On : 1 506 | ``` 507 | 508 | `` Do it like in APIC.dsl and FACP.dsl.
509 | `` can be found in the `timer` Node in the DTB.
510 | Example: 511 | ``` 512 | # NOTE: Just an Example, Use your own. 513 | timer { 514 | compatible = "arm,armv8-timer"; 515 | interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0c 0xff08>; 516 | | | | | | | | | 517 | GIC_PPI | GIC_PPI | GIC_PPI | GIC_PPI | 518 | 1st Interrupt 2nd Interrupt 3rd Interrupt 4th Interrupt 519 | clock-frequency = <0x124f800>; 520 | phandle = <0x27e>; 521 | always-on; 522 | }; 523 | ``` 524 | Again Its `GIC_PPI` (0x01), And its Value is `0x10`.
525 | So its like this: `1st/2nd/3rf/4th Interrupt + 0x10`, These are then the Interrupts for your GTDT ACPI Table. 526 | 527 | `` is the Base Address of the `timer` Node in your DTB.
528 | Example: 529 | ``` 530 | # NOTE: Just an Example, Use your own. 531 | timer@17420000 { 532 | #address-cells = <0x01>; 533 | #size-cells = <0x01>; 534 | ranges; 535 | compatible = "arm,armv7-timer-mem"; 536 | reg = <0x17420000 0x1000>; 537 | | 538 | Base Addr 539 | clock-frequency = <0x124f800>; 540 | phandle = <0x27f>; 541 | }; 542 | ``` 543 | 544 | `<1st/2nd Base Addr of Timer Frame 1>` is the Base Address of the First Timer Frame Node in your DTB.
545 | Example: 546 | ``` 547 | # NOTE: Just an Example, Use your own. 548 | timer@17420000 { 549 | #address-cells = <0x01>; 550 | #size-cells = <0x01>; 551 | ranges; 552 | compatible = "arm,armv7-timer-mem"; 553 | reg = <0x17420000 0x1000>; 554 | clock-frequency = <0x124f800>; 555 | phandle = <0x27f>; 556 | 557 | frame@17421000 { 558 | frame-number = <0x00>; 559 | interrupts = <0x00 0x08 0x04 0x00 0x06 0x04>; 560 | reg = <0x17421000 0x1000 0x17422000 0x1000>; 561 | | | 562 | 1st Base Addr 2nd Base Addr 563 | }; 564 | }; 565 | ``` 566 | 567 | `<1st/2nd Interrupt of Timer Frame 1>` is the Interrupt of the Timer Frame Node in the DTB.
568 | Example: 569 | ``` 570 | # NOTE: Just an Example, Use your own. 571 | timer@17420000 { 572 | #address-cells = <0x01>; 573 | #size-cells = <0x01>; 574 | ranges; 575 | compatible = "arm,armv7-timer-mem"; 576 | reg = <0x17420000 0x1000>; 577 | clock-frequency = <0x124f800>; 578 | phandle = <0x27f>; 579 | 580 | frame@17421000 { 581 | frame-number = <0x00>; 582 | interrupts = <0x00 0x08 0x04 0x00 0x06 0x04>; 583 | | | | | 584 | GIC_SPI | GIC_SPI | 585 | 1st Interrupt 2nd Interrupt 586 | reg = <0x17421000 0x1000 0x17422000 0x1000>; 587 | }; 588 | }; 589 | ``` 590 | In that Case it is `GIC_SPI` (0x00) instead of `GIC_PPI` (0x00).
591 | The Value of `GIC_SPI` is `0x20`, So The Calc is: `1st/2nd Interrupt + 0x20`. 592 | 593 | ## Compiling ACPI Tables (Step 2) 594 | 595 | Now as you finished all ACPI Tables, Its now Time to Compile them.
596 | Open a Linux Terminal in the `AcpiTables` Folder of your SoC Folder and run this command: 597 | ```bash 598 | iasl * 599 | ``` 600 | 601 | After that Command was Executed, There should now be .aml Files in your Folder.
602 | If Some ACPI Tables don't have an .aml File, You made an Mistake in the ACPI Table. 603 | -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/Device/Pictures/APRIORI1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/Device/Pictures/APRIORI1.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/Device/Pictures/APRIORI2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/Device/Pictures/APRIORI2.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/Device/Pictures/DXE.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/Device/Pictures/DXE.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/Device/README.md: -------------------------------------------------------------------------------- 1 | # Adding Devices 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | ## Description 7 | 8 | This Guide will show you how to create a UEFI Port for your Device.
9 | 10 | ## WARNING 11 | 12 | **Booting Windows/Linux on Sony/Google Device will wipe your UFS Clean! (Unable to recover)** 13 | 14 | 15 | 16 |
Table of Contents
17 | 18 | - Adding Devices 19 | - [Requirements](#requirements) 20 | - [Copying Files](#copying-files-step-1) 21 | - [Creating Config](#creating-the-config-file-step-2) 22 | - [Creating Files](#creating-files-step-3) 23 | - [Creating .dsc & .dec & .fdf File](#creating-dsc--dec--fdf-file-step-31) 24 | - [Creating .dsc](#creating-dsc-file-step-311) 25 | - [Creating .dec](#creating-dec-file-step-312) 26 | - [Creating .fdf](#creating-fdf-file-step-313) 27 | - [Creating fdf.inc Files](#creating-fdfinc-files-step-32) 28 | - [Creating ACPI.inc](#creating-acpiinc-step-321) 29 | - [Creating APRIORI.inc](#creating-aprioriinc-step-322) 30 | - [Creating DXE.inc](#creating-dxeinc-step-323) 31 | - [Creating RAW.inc](#creating-rawinc-step-324) 32 | - [Creating Config Map](#creating-configurationmap-library-step-33) 33 | - [Creating MemoryMap](#creating-devicememorymap-library-step-34) 34 | - [Creating Boot Script](#creating-android-boot-image-script-step-35) 35 | - [Building](#building) 36 | - [Troubleshooting](#troubleshooting) 37 | 38 |
39 | 40 | ## Requirements 41 | 42 | To Port UEFI to your Phone, It needs the following things: 43 | 44 | - An Snapdragon SoC 45 | - `xbl` or `uefi` in `/dev/block/by-name/` 46 | - `fdt` in `/sys/firmware/` 47 | 48 | It's also recommended to have already some Knowledge about Linux and Windows.
49 | ~~Also a Brain is required to do this.~~
50 | 51 | > [!WARNING] 52 | > Don't edit any Files using Programs like Notepad/++.
53 | > It will break the Files while Porting! 54 | 55 | ## Copying Files (Step 1) 56 | 57 | Lets begin with Copying Files.
58 | Copy the `fdt` File from 59 | `/sys/firmware/`
60 | you can get it using adb with root 61 | ```bash 62 | adb shell "dd if=/sys/firmware/fdt of=/sdcard/.img" 63 | 64 | adb pull /sdcard/.img . 65 | ``` 66 | Rename `.img` to `.dtb`
67 | > NOTE: If it doesn't works for some devices(i.e. stuck on download mode with Samsung logo) try extracting dtb from boot.img 68 | 69 | unpack stock boot.img with AIK(Android Image Kitchen) and go to split_img directory. Here you can see boot.img-dtb.
70 | Rename `boot.img-dtb` to `.dtb`
71 | and make a Humam Readable Format.
72 | > NOTE: This can be maked only on Wsl or an Linux Distro 73 | ``` 74 | dtc -I dtb -O dts -o .dts .dtb 75 | ``` 76 | Now copy .dts and .dtb to `Mu-Silicium/Resources/DTBs/`.
77 | 78 | Now extract your `xbl` or `uefi` from `/dev/block/by-name/` and Place it somewhere you can reach it: 79 | ```bash 80 | adb shell 81 | 82 | dd if=/dev/block/by-name/ of=/.img 83 | exit 84 | 85 | adb pull /.img 86 | ``` 87 | After Copying the `xbl` File or the `uefi` File, Extract all UEFI Binaries from it with [UEFIReader](https://github.com/WOA-Project/UEFIReader).
88 | A Compiled Version is Pinned in `#general` in our Discord.
89 | Also you can compile it yourself: 90 | ``` 91 | # Linux 92 | # Install dotnet-sdk-8.0 for your distribution 93 | git clone https://github.com/WOA-Project/UEFIReader.git 94 | cd UEFIReader/ 95 | dotnet build UEFIReader.sln 96 | # Now here you have a compiled version. Go to UEFIReader/bin/Debug/net8.0/ 97 | ``` 98 | Here is how you Use it: 99 | ``` 100 | # Windows 101 | UEFIReader.exe .img out 102 | # Linux 103 | ./UEFIReader .img out 104 | ``` 105 | Now Move all the output Files from UEFI Reader in `Mu-Silicium/Binaries//`.
106 | Then Execute `CleanUp.sh` in the Binaries Folder once. 107 | 108 | ## Creating the Config File (Step 2) 109 | 110 | Every Device has its own config file to define some device specific things like: SoC.
111 | Create a File called `.conf` in `Mu-Silicium/Resources/Configs/`.
112 | It should contain at least this: 113 | ``` 114 | # General Configs 115 | TARGET_DEVICE_VENDOR="" 116 | TARGET_MULTIPLE_MODELS=0 117 | TARGET_NUMBER_OF_MODELS=0 118 | 119 | # Arch Config 120 | TARGET_ARCH="AARCH64" 121 | 122 | # UEFI FD Configs 123 | TARGET_REQUIRES_BOOTSHIM=1 124 | TARGET_FD_BASE="" 125 | TARGET_FD_SIZE="" 126 | TARGET_FD_BLOCKS="" 127 | 128 | # FDT Configs 129 | TARGET_CREATE_POINTER=0 130 | TARGET_POINTER_ADDRESS=0x0 131 | ``` 132 | `` is the UEFI FD Value in the MemoryMap (uefiplat.cfg).
133 | `` is the Number of Blocks UEFI FD has, ` / 0x1000`.
134 | `TARGET_ARCH` modify according to your arch. 135 | 136 | ## Creating Files (Step 3) 137 | 138 | Struckture of the Device Files: 139 | ``` 140 | ./Platforms//Pkg/ 141 | ├── Include 142 | │   ├── ACPI.inc 143 | │   ├── APRIORI.inc 144 | │   ├── DXE.inc 145 | │   └── RAW.inc 146 | ├── Library 147 | │   ├── DeviceMemoryMapLib 148 | │   │ ├── DeviceMemoryMapLib.c 149 | │   │ └── DeviceMemoryMapLib.inf 150 | │ └── DeviceConfigurationMapLib 151 | │ ├── DeviceConfigurationMapLib.c 152 | │ └── DeviceConfigurationMapLib.inf 153 | ├──FdtBlob 154 | | └── --.dtb 155 | ├── PlatformBuild.py 156 | ├── .dec 157 | ├── .dsc 158 | └── .fdf 159 | ``` 160 | 161 | ## Creating .dsc & .dec & .fdf File (Step 3.1) 162 | 163 | ## Creating .dsc File (Step 3.1.1) 164 | 165 | Lets begin with the `.dsc` File
166 | Create a File called `.dsc` in `Mu-Silicium/Platforms//Pkg/`.
167 | Here is a template: 168 | ``` 169 | ## 170 | # 171 | # Copyright (c) 2011 - 2022, ARM Limited. All rights reserved. 172 | # Copyright (c) 2014, Linaro Limited. All rights reserved. 173 | # Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved. 174 | # Copyright (c) 2018, Bingxing Wang. All rights reserved. 175 | # Copyright (c) Microsoft Corporation. 176 | # 177 | # SPDX-License-Identifier: BSD-2-Clause-Patent 178 | # 179 | ## 180 | 181 | ################################################################################ 182 | # 183 | # Defines Section - statements that will be processed to create a Makefile. 184 | # 185 | ################################################################################ 186 | [Defines] 187 | PLATFORM_NAME = 188 | PLATFORM_GUID = 189 | PLATFORM_VERSION = 0.1 190 | DSC_SPECIFICATION = 0x00010005 191 | OUTPUT_DIRECTORY = Build/Pkg 192 | SUPPORTED_ARCHITECTURES = AARCH64 193 | BUILD_TARGETS = RELEASE|DEBUG 194 | SKUID_IDENTIFIER = DEFAULT 195 | FLASH_DEFINITION = Pkg/.fdf 196 | USE_CUSTOM_DISPLAY_DRIVER = 0 197 | HAS_BUILD_IN_KEYBOARD = 0 198 | 199 | # If your SoC has multimple variants define the Number here 200 | # If not don't add this Define 201 | SOC_TYPE = 2 202 | 203 | # If your SoC has multiple variants keep these Build Options 204 | # If not don't add "-DSOC_TYPE=$(SOC_TYPE)" to the Build Options. 205 | [BuildOptions] 206 | *_*_*_CC_FLAGS = -DSOC_TYPE=$(SOC_TYPE) -DHAS_BUILD_IN_KEYBOARD=$(HAS_BUILD_IN_KEYBOARD) 207 | 208 | [LibraryClasses] 209 | DeviceMemoryMapLib|Pkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.inf 210 | DeviceConfigurationMapLib|Pkg/Library/DeviceConfigurationMapLib/DeviceConfigurationMapLib.inf 211 | 212 | [PcdsFixedAtBuild] 213 | # DDR Start Address 214 | gArmTokenSpaceGuid.PcdSystemMemoryBase| 215 | 216 | # Device Maintainer 217 | gSiliciumPkgTokenSpaceGuid.PcdDeviceMaintainer|"" 218 | 219 | # CPU Vector Address 220 | gArmTokenSpaceGuid.PcdCpuVectorBaseAddress| 221 | 222 | # UEFI Stack Addresses 223 | gEmbeddedTokenSpaceGuid.PcdPrePiStackBase| 224 | gEmbeddedTokenSpaceGuid.PcdPrePiStackSize| 225 | 226 | # SmBios 227 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemManufacturer|"" 228 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemModel|"" 229 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemRetailModel|"" 230 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosSystemRetailSku|"_" 231 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosBoardModel|"" 232 | 233 | # Simple FrameBuffer 234 | gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferWidth| 235 | gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferHeight| 236 | gSiliciumPkgTokenSpaceGuid.PcdMipiFrameBufferColorDepth| 237 | 238 | # Dynamic RAM Start Address 239 | gQcomPkgTokenSpaceGuid.PcdRamPartitionBase| 240 | 241 | # SD Card Slot 242 | gQcomPkgTokenSpaceGuid.PcdInitCardSlot|TRUE # If your Phone has no SD Card Slot, Set it to FALSE. 243 | 244 | # USB Controller 245 | gQcomPkgTokenSpaceGuid.PcdStartUsbController|TRUE # This should be TRUE unless your UsbConfigDxe is Patched to be Dual Role. 246 | 247 | [PcdsDynamicDefault] 248 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution| 249 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution| 250 | gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution| 251 | gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution| 252 | gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn| 253 | gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow| 254 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn| 255 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow| 256 | 257 | !include Pkg/.dsc.inc 258 | ``` 259 | 260 | `` is a Value to identify your Device, Generate one [here](https://guidgenerator.com/), Make sure its Uppercase.
261 | `` is the Start Address of the MemoryMap (uefiplat.cfg).
262 | `` is the Base Address of `CPU Vectors` in the MemoryMap (uefiplat.cfg).
263 | `` is the Base/Size Address of `UEFI Stack` in the MemoryMap (uefiplat.cfg).
264 | `` is the Value of your Display Color Depth, It can be Found in the Specs of your Phone, For Example on [www.devicespecifications.com](https://www.devicespecifications.com/).
265 | `` is the End Address of that Last DDR Memory Region. ` + = `.
266 | ` / ` is the Value of ` / 8`.
267 | ` / ` is the Value of ` / 19`. 268 | 269 | ## Creating .dec File (Step 3.1.2) 270 | 271 | After we created the .dsc File we will now continue with the .dec File.
272 | Create a File called `.dec` in `Mu-Silicium/Platforms///`.
273 | This File should be left Empty. 274 | 275 | ## Creating .fdf File (Step 3.1.3) 276 | 277 | Once the .dec File is complete we can move on to the .fdf File.
278 | Create File called `.fdf` in `Mu-Silicium/Platforms///`.
279 | The .fdf File contains Specific Stuff about your Device, Here is a template how it should look: 280 | ``` 281 | ## @file 282 | # 283 | # Copyright (c) 2018, Linaro Limited. All rights reserved. 284 | # 285 | # SPDX-License-Identifier: BSD-2-Clause-Patent 286 | # 287 | ## 288 | 289 | ################################################################################ 290 | # 291 | # FD Section 292 | # The [FD] Section is made up of the definition statements and a 293 | # description of what goes into the Flash Device Image. Each FD section 294 | # defines one flash "device" image. A flash device image may be one of 295 | # the following: Removable media bootable image (like a boot floppy 296 | # image,) an Option ROM image (that would be "flashed" into an add-in 297 | # card,) a System "Flash" image (that would be burned into a system's 298 | # flash) or an Update ("Capsule") image that will be used to update and 299 | # existing system flash. 300 | # 301 | ################################################################################ 302 | 303 | [FD._UEFI] 304 | BaseAddress = $(FD_BASE)|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the FLASH Device. 305 | Size = $(FD_SIZE)|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device 306 | ErasePolarity = 1 307 | 308 | # This one is tricky, it must be: BlockSize * NumBlocks = Size 309 | BlockSize = 0x1000 310 | NumBlocks = $(FD_BLOCKS) 311 | 312 | ################################################################################ 313 | # 314 | # Following are lists of FD Region layout which correspond to the locations of different 315 | # images within the flash device. 316 | # 317 | # Regions must be defined in ascending order and may not overlap. 318 | # 319 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by 320 | # the pipe "|" character, followed by the size of the region, also in hex with the leading 321 | # "0x" characters. Like: 322 | # Offset|Size 323 | # PcdOffsetCName|PcdSizeCName 324 | # RegionType 325 | # 326 | ################################################################################ 327 | 328 | 0x00000000|$(FD_SIZE) 329 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize 330 | FV = FVMAIN_COMPACT 331 | 332 | ################################################################################ 333 | # 334 | # FV Section 335 | # 336 | # [FV] section is used to define what components or modules are placed within a flash 337 | # device file. This section also defines order the components and modules are positioned 338 | # within the image. The [FV] section consists of define statements, set statements and 339 | # module statements. 340 | # 341 | ################################################################################ 342 | 343 | [FV.FvMain] 344 | FvNameGuid = 631008B0-B2D1-410A-8B49-2C5C4D8ECC7E 345 | BlockSize = 0x1000 346 | NumBlocks = 0 # This FV gets compressed so make it just big enough 347 | FvAlignment = 8 # FV alignment and FV attributes setting. 348 | ERASE_POLARITY = 1 349 | MEMORY_MAPPED = TRUE 350 | STICKY_WRITE = TRUE 351 | LOCK_CAP = TRUE 352 | LOCK_STATUS = TRUE 353 | WRITE_DISABLED_CAP = TRUE 354 | WRITE_ENABLED_CAP = TRUE 355 | WRITE_STATUS = TRUE 356 | WRITE_LOCK_CAP = TRUE 357 | WRITE_LOCK_STATUS = TRUE 358 | READ_DISABLED_CAP = TRUE 359 | READ_ENABLED_CAP = TRUE 360 | READ_STATUS = TRUE 361 | READ_LOCK_CAP = TRUE 362 | READ_LOCK_STATUS = TRUE 363 | 364 | !include Include/APRIORI.inc 365 | !include Include/DXE.inc 366 | !include Include/RAW.inc 367 | 368 | # SmBios 369 | INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf 370 | INF QcomPkg/Drivers/SmBiosTableDxe/SmBiosTableDxe.inf 371 | 372 | # ACPI 373 | INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf 374 | INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf 375 | 376 | !include Include/ACPI.inc 377 | 378 | # Device Tree 379 | #INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf 380 | #FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 { 381 | # SECTION RAW = Pkg/FdtBlob/--.dtb 382 | # SECTION UI = "DeviceTreeBlob" 383 | #} 384 | 385 | !include QcomPkg/Extra.fdf.inc 386 | 387 | [FV.FVMAIN_COMPACT] 388 | FvAlignment = 8 389 | ERASE_POLARITY = 1 390 | MEMORY_MAPPED = TRUE 391 | STICKY_WRITE = TRUE 392 | LOCK_CAP = TRUE 393 | LOCK_STATUS = TRUE 394 | WRITE_DISABLED_CAP = TRUE 395 | WRITE_ENABLED_CAP = TRUE 396 | WRITE_STATUS = TRUE 397 | WRITE_LOCK_CAP = TRUE 398 | WRITE_LOCK_STATUS = TRUE 399 | READ_DISABLED_CAP = TRUE 400 | READ_ENABLED_CAP = TRUE 401 | READ_STATUS = TRUE 402 | READ_LOCK_CAP = TRUE 403 | READ_LOCK_STATUS = TRUE 404 | 405 | INF SiliciumPkg/PrePi/PrePi.inf 406 | 407 | FILE FREEFORM = dde58710-41cd-4306-dbfb-3fa90bb1d2dd { 408 | SECTION UI = "uefiplat.cfg" 409 | SECTION RAW = Binaries//RawFiles/uefiplat.cfg 410 | } 411 | 412 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { 413 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { 414 | SECTION FV_IMAGE = FVMAIN 415 | } 416 | } 417 | 418 | !include SiliciumPkg/Common.fdf.inc 419 | ``` 420 | 421 | ## Creating .fdf.inc Files (Step 3.2) 422 | 423 | Now we create some files for the `.fdf` File 424 | 425 | ## Creating ACPI.inc (Step 3.2.1) 426 | 427 | For Now, Leave it Empty, When your UEFI is working stable then you can Follow the ACPI Guide. 428 | 429 | ## Creating APRIORI.inc (Step 3.2.2) 430 | 431 | We continue with `APRIORI.inc`, Create `APRIORI.inc` in `Mu-Silicium/Platforms//Pkg/Include/`.
432 | Now we need the order of the Binaries in `APRIORI.inc`, Use UEFITool to get the Order: 433 | 434 | ![Preview](Pictures/APRIORI1.png) 435 | ![Preview](Pictures/APRIORI2.png) 436 | 437 | Next we place all the Binaries in `APRIORI.inc` like this: 438 | ``` 439 | INF 440 | ``` 441 | After you ordered and added all the Files you also need to add some extra stuff to `APRIORI.inc`: 442 | ``` 443 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 444 | INF ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf 445 | INF QcomPkg/Drivers/DynamicRAMDxe/DynamicRAMDxe.inf 446 | INF QcomPkg/Drivers/ClockSpeedUpDxe/ClockSpeedUpDxe.inf 447 | INF QcomPkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf 448 | ``` 449 | 450 | `Pcd` should be under `DxeMain`.
451 | `ArmPsciMpServicesDxe` should be under `TimerDxe`.
452 | `DynamicRAMDxe` should be under `SmemDxe`.
453 | `ClockSpeedUpDxe` should be under `ClockDxe`.
454 | `SimpleFbDxe` dosen't Replace `DisplayDxe` Make an If case for it, Check other Devices for the if case. 455 | 456 | Also make sure that you don't add `FvSimpleFileSystemDxe`. 457 | 458 | Check other Devices APRIORI.inc File to get an Idea, What to replace with the Mu Driver and what not. 459 | 460 | ## Creating DXE.inc File (Step 3.2.3) 461 | 462 | After that we can now move on to `DXE.inc`, Create `DXE.inc` in `Mu-Silicium/Platforms//Pkg/Include/`.
463 | Now again we need the Order, To get the order of `DXE.inc` Open `xbl` or `uefi` in UEFITool and Expand the FV(s), Then you see the Order.
464 | 465 | ![Preview](Pictures/DXE.png) 466 | 467 | Again we place all the Binaries like this: 468 | ``` 469 | INF 470 | ``` 471 | Also here again you need to add some extra Stuff: 472 | ``` 473 | INF ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf 474 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 475 | INF QcomPkg/Drivers/DynamicRAMDxe/DynamicRAMDxe.inf 476 | INF QcomPkg/Drivers/ClockSpeedUpDxe/ClockSpeedUpDxe.inf 477 | INF QcomPkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf 478 | INF MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointerDxe.inf 479 | ``` 480 | 481 | `ArmPsciMpServicesDxe` should be under `TimerDxe`.
482 | `Pcd` should be under `DxeMain`.
483 | `DynamicRAMDxe` should be under `SmemDxe`.
484 | `ClockSpeedUpDxe` should be under `ClockDxe`.
485 | `SimpleFbDxe` dosen't Replace `DisplayDxe` Make an If case for it, Check other Devices for the if case.
486 | `UsbMouseAbsolutePointerDxe` should be under `UsbKbDxe`.
487 | 488 | Remove any EFI Applications from XBL in `DXE.inc`.
489 | Also again, Make sure that you don't add `FvSimpleFileSystemDxe`. 490 | 491 | Check other Devices DXE.inc File to get an Idea, What to replace with the Mu Driver and what not. 492 | 493 | ## Creating RAW.inc (Step 3.2.4) 494 | 495 | You can take the RAW Files Order from DXE.inc that UEFIReader generated.
496 | Thats how they should look: 497 | ``` 498 | FILE FREEFORM = { 499 | SECTION RAW = Binaries//RawFiles/. 500 | SECTION UI = "" 501 | } 502 | ``` 503 | Just UEFIReader dosen't format the Lines correct, You need to Correct that.
504 | Also Remove any RAW Section that has a Picture. 505 | 506 | ## Creating DeviceConfigurationMap Library (Step 3.3) 507 | 508 | Now, We move on to creating a Configuration Map for your Device.
509 | We need uefiplat.cfg from XBL to create This Map.
510 | Here is a Template for the .c File: 511 | ```c 512 | #include 513 | 514 | STATIC 515 | CONFIGURATION_DESCRIPTOR_EX 516 | gDeviceConfigurationDescriptorEx[] = { 517 | // NOTE: All Conf are located before Terminator! 518 | 519 | // Terminator 520 | {"Terminator", 0xFFFFFFFF} 521 | }; 522 | 523 | CONFIGURATION_DESCRIPTOR_EX* 524 | GetDeviceConfigurationMap () 525 | { 526 | return gDeviceConfigurationDescriptorEx; 527 | } 528 | ``` 529 | Place all Configs from `[ConfigParameters]` (uefiplat.cfg) In the .c File.
530 | Here is an Example: 531 | ``` 532 | EnableShell = 0x1 533 | ``` 534 | Becomes this: 535 | ```c 536 | {"EnableShell", 0x1}, 537 | ``` 538 | Configs that have Strings instead of Decimal won't be added: 539 | ``` 540 | # This for Example 541 | OsTypeString = "LA" 542 | ``` 543 | And don't add `ConfigParameterCount` to the .c File either. 544 | 545 | The INF can be copied from any other Device. 546 | 547 | ## Creating DeviceMemoryMap Library (Step 3.4) 548 | 549 | Lets move on making Memory Map.
550 | We will use uefiplat.cfg to create the Memory Map.
551 | Create a Folder Named `DeviceMemoryMapLib` in `Mu-Silicium/Platforms//Pkg/Library/`.
552 | After that create two Files called `DeviceMemoryMapLib.c` and `DeviceMemoryMapLib.inf`.
553 | 554 | You can either make the Memory Map by yourself or use an automated [Script](https://gist.github.com/N1kroks/0b3942a951a2d4504efe82ab82bc7a50) if your SoC is older than Snapdragon 8 Gen 3 (SM8650).
555 | >NOTE: script also create Configuration Map, remove it from Memory Map 556 | 557 | If you want to make the Memory Map by yourself, here is a template for the .c File: 558 | ```c 559 | #include 560 | 561 | STATIC 562 | ARM_MEMORY_REGION_DESCRIPTOR_EX 563 | gDeviceMemoryDescriptorEx[] = { 564 | // Name, Address, Length, HobOption, ResourceAttribute, ArmAttributes, ResourceType, MemoryType 565 | 566 | // DDR Regions 567 | 568 | // Other memory regions 569 | 570 | // Register regions 571 | 572 | // Terminator for MMU 573 | {"Terminator", 0, 0, 0, 0, 0, 0, 0} 574 | }; 575 | 576 | ARM_MEMORY_REGION_DESCRIPTOR_EX* 577 | GetDeviceMemoryMap () 578 | { 579 | return gDeviceMemoryDescriptorEx; 580 | } 581 | ``` 582 | 583 | Place all `DDR` Memory Regions under `DDR Regions` in `DeviceMemoryMapLib.c`, Example: 584 | ``` 585 | 0xEA600000, 0x02400000, "Display Reserved", AddMem, MEM_RES, SYS_MEM_CAP, Reserv, WRITE_THROUGH_XN 586 | ``` 587 | would become in the Memory Map: 588 | ```c 589 | {"Display Reserved", 0xEA600000, 0x02400000, AddMem, MEM_RES, SYS_MEM_CAP, Reserv, WRITE_THROUGH_XN}, 590 | ``` 591 | Do that with every Memory Region but if there's an `#` is infront of an Memory Region do not add it.
592 | 593 | After that it should look something like [this](https://github.com/Robotix22/Mu-Silicium/blob/main/Platforms/Xiaomi/limePkg/Library/DeviceMemoryMapLib/DeviceMemoryMapLib.c). 594 | 595 | The INF can be copied from any other Device. 596 | 597 | ## Creating Android Boot Image Script (Step 3.5) 598 | 599 | You also need to create a Script that creates the Boot Image.
600 | You can Copy a Device with similear/Same Boot Image Creation Script from `Mu-Silicium/Resources/Scripts/.sh` and just replace the Code Name with yours.
601 | If there is no Device with similear Boot Image Creation Script, Extract the Original Android Boot Image with AIK (Android Image Kitchen).
602 | Then you just use the Info that the Tool Gives you and Put them into the Script. 603 | 604 | 605 | 606 | ## Building 607 | 608 | Now Build your Device with: 609 | ``` 610 | ./build_uefi.sh -d -r DEBUG 611 | ``` 612 | 613 | ## Troubleshooting 614 | 615 | There are too Many Cases for Errors in UEFI, So if you have any Please contact us on [Discord](https://discord.gg/Dx2QgMx7Sv). 616 | -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Search-1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Search-1.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Search-2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Search-2.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Timer-PCDs.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Silicium/Porting/Snapdragon/SoC/Pictures/GHex-Timer-PCDs.png -------------------------------------------------------------------------------- /Silicium/Porting/Snapdragon/SoC/README.md: -------------------------------------------------------------------------------- 1 | # Adding SoCs 2 | 3 | > [!WARNING] 4 | > This Guide is Outdated! A Remaster will come soon. 5 | 6 | ## Before you Begin 7 | 8 | Make sure that the SoC you are trying to add isn't already Supported.
9 | Otherwise Skip this entire Guide. 10 | 11 | ## Description 12 | 13 | This Guide will show you how to make an UEFI Port for an Snapdragon SoC. 14 | 15 | 16 | 17 |
Table of Contents
18 | 19 | - Adding SoCs 20 | - [Copying Files & Modify](#copying-files--modify-them-step-1) 21 | - [SoC Folder](#creating-soc-folder-step-11) 22 | - [.dsc.inc File](#modify-dsc.inc-file-step-12) 23 | - [Modify SMBios](#modify-smbios-step-13) 24 | - [Modify Librarys](#modify-librarys-step-14) 25 | 26 |
27 | 28 | ## Copying Files & Modify them (Step 1) 29 | 30 | Struckture of Files for SoCs: 31 | ``` 32 | Mu-Silicium/Silicon/Qualcomm/Pkg/ 33 | ├── AcpiTables 34 | │   └── 35 | ├── Drivers 36 | │   └── SmBiosTableDxe 37 | │ ├── DataDefinitions.h 38 | │   ├── SmBiosTableDxe.c 39 | │   └── SmBiosTableDxe.inf 40 | ├── Library 41 | │   └── 42 | └── .dsc.inc 43 | ``` 44 | 45 | ## Creating SoC Folder (Step 1.1) 46 | 47 | In `./Silicon/Qualcomm/` are all SoC Folders located.
48 | Copy any SoC Folder of your Chosse and Rename it to `Pkg`.
49 | NOTE: You might want to copy a SoC Folder that is similar to yours. 50 | 51 | ## Modify .dsc.inc File (Step 1.2) 52 | 53 | In this File we need to change a lot.
54 | Lets begin with renaming the old SoC Name to your SoC Name. 55 | 56 | After that we change the Timer & GIC Values to the right Values according to your SoC. 57 | 58 | First, Open TimerDxe.efi from a Device's XBL with the same SoC in GHex.
59 | After that, Search `AutoGen.c` in TimerDxe.efi: 60 | 61 | ![Preview](Pictures/GHex-Search-1.png) 62 | ![Preview](Pictures/GHex-Search-2.png) 63 | 64 | Once you Pressed `Find Next`, It will bring you to the Location where PCDs are Stored.
65 | The Timer Values are PCDs, So you will find then there, Here for wich is wich: 66 | 67 | ![Preview](Pictures/GHex-Timer-PCDs.png) 68 | 69 | Convert these 4 Timer Interrupt Hex Values in Decimal Values and Put them in the .dsc.inc File.
70 | It should look like this after that: 71 | ``` 72 | # NOTE: This is just an Example! 73 | gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29 # 0x1D 74 | gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30 # 0x1E 75 | gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27 # 0x1B 76 | gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26 # 0x1A 77 | ``` 78 | 79 | Now We will Update the GIC Values.
80 | `PcdGicDistributorBase` and `PcdGicRedistributorsBase` are the two Values of the `interrupt-controller` Node in the DTS.
81 | ``` 82 | # NOTE: This is just an Example! 83 | interrupt-controller@17a00000 { 84 | compatible = "arm,gic-v3"; 85 | #interrupt-cells = <0x03>; 86 | interrupt-controller; 87 | #redistributor-regions = <0x01>; 88 | redistributor-stride = <0x00 0x20000>; 89 | reg = <0x17a00000 0x10000 0x17a60000 0x100000>; 90 | | | 91 | 1st Value 2nd Value 92 | interrupts = <0x01 0x09 0x04>; 93 | phandle = <0x01>; 94 | }; 95 | ``` 96 | `PcdGicInterruptInterfaceBase` is same Value as `PcdGicRedistributorsBase`.
97 | 98 | Once the GIC Values are Correct, Update the ACPI PCD too.
99 | Set `PcdAcpiDefaultOemRevision` to your SoC Name Example: `SM8350 -> 0x00008350` 100 | 101 | Now Update `PcdCoreCount`, `PcdClusterCount` and `PcdHasLevel3Cache` to the Correct Values.
102 | These Values should be in the Internet SoC Specs. 103 | 104 | After that we need to change SmBios Values:
105 | from this: 106 | ``` 107 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosProcessorModel|"Snapdragon (TM) 888 @ 2.84 GHz" 108 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosProcessorRetailModel|"SM8350" 109 | ``` 110 | to this: 111 | ``` 112 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosProcessorModel|"Snapdragon (TM) @ GHz" 113 | gSiliciumPkgTokenSpaceGuid.PcdSmbiosProcessorRetailModel|"" 114 | ``` 115 | 116 | The SmBios Values should be correct now.
117 | Also set `PcdIsPowerOkImplemented` to the right Value.
118 | If you are not sure then set it to `FALSE`. 119 | 120 | Now the last thing you need to do is Update the `USE_PHYSICAL_TIMER` Define at the Top.
121 | Change it to 0 If your SoC Uses a Virtual Timer, Otherwise Set it to 1.
122 | Like every Older SoC like SM8150 and below have a Physical Timer.
123 | The Newer ones like SM8250 should have a Virtual Timer. 124 | 125 | ## Modify SmBios (Step 1.3) 126 | 127 | SmBios defines Device Infos from CPU and maybe also other Devices.
128 | Windows and Linux uses these Infos to display correct Values,
129 | Example: The CPU Name you see in Device Manager is defined in SmBios. 130 | 131 | There are multiple Things you need to change: `SMBIOS_TABLE_TYPE4`, `SMBIOS_TABLE_TYPE7` and `SMBIOS_TABLE_TYPE17`
132 | First, Open `DataDefinitions.h` in `Silicon/Qualcomm/Pkg/Drivers/SmBiosTableDxe/`.
133 | Now we can begin with `SMBIOS_TABLE_TYPE4`: 134 | 135 | It defines some CPU Values like Speed and Clusters.
136 | Here is a template Section: 137 | ```c 138 | SMBIOS_TABLE_TYPE4 mProcessorInfoType4_ = { 139 | {EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof(SMBIOS_TABLE_TYPE4), 0}, 140 | 1, // Socket String 141 | CentralProcessor, // ProcessorType 142 | ProcessorFamilyIndicatorFamily2, // ProcessorFamily 143 | 2, // ProcessorManufacture String 144 | { 145 | { 146 | 0, // ProcessorSteppingId 147 | 0, // ProcessorModel 148 | 0, // ProcessorFamily 149 | 0, // ProcessorType 150 | 0, // ProcessorReserved1 151 | 0, // ProcessorXModel 152 | 0, // ProcessorXFamily 153 | 0, // ProcessorReserved2 154 | }, 155 | { 156 | 0, // ProcessorFpu 157 | 0, // ProcessorVme 158 | 0, // ProcessorDe 159 | 0, // ProcessorPse 160 | 0, // ProcessorTsc 161 | 0, // ProcessorMsr 162 | 0, // ProcessorPae 163 | 0, // ProcessorMce 164 | 0, // ProcessorCx8 165 | 0, // ProcessorApic 166 | 0, // ProcessorReserved1 167 | 0, // ProcessorSep 168 | 0, // ProcessorMtrr 169 | 0, // ProcessorPge 170 | 0, // ProcessorMca 171 | 0, // ProcessorCmov 172 | 0, // ProcessorPat 173 | 0, // ProcessorPse36 174 | 0, // ProcessorPsn 175 | 0, // ProcessorClfsh 176 | 0, // ProcessorReserved2 177 | 0, // ProcessorDs 178 | 0, // ProcessorAcpi 179 | 0, // ProcessorMmx 180 | 0, // ProcessorFxsr 181 | 0, // ProcessorSse 182 | 0, // ProcessorSse2 183 | 0, // ProcessorSs 184 | 0, // ProcessorReserved3 185 | 0, // ProcessorTm 186 | 0, // ProcessorReserved4 187 | } 188 | }, 189 | 3, // ProcessorVersion String 190 | { 191 | 0, // ProcessorVoltageCapability5V 192 | 0, // ProcessorVoltageCapability3_3V 193 | 0, // ProcessorVoltageCapability2_9V 194 | 0, // ProcessorVoltageCapabilityReserved 195 | 0, // ProcessorVoltageReserved 196 | 0 // ProcessorVoltageIndicateLegacy 197 | }, 198 | 0, // ExternalClock 199 | , // MaxSpeed 200 | , // CurrentSpeed 201 | 0x41, // Status 202 | ProcessorUpgradeOther, // ProcessorUpgrade 203 | 0, // L1CacheHandle 204 | 0, // L2CacheHandle 205 | 0, // L3CacheHandle 206 | 0, // SerialNumber 207 | 0, // AssetTag 208 | 4, // PartNumber 209 | , // CoreCount 210 | , // EnabledCoreCount 211 | , // ThreadCount 212 | 0xAC, // ProcessorCharacteristics 213 | ProcessorFamilyARM, // ARM Processor Family 214 | }; 215 | ``` 216 | Depending, How much Clusters you have, You need to add these to SmBios.
217 | For Example, Your SoC has 2 Clusters, Then you add two of these.
218 | Change `CoreCount`, `EnabledCoreCount` and `ThreadCount` to the amount of Cores the Cluster has.
219 | Then You need to Change `MaxSpeed` and `CurrentSpeed` to the Max Speed, The Cluster can.
220 | These two Values need to be in MHz Size. 221 | 222 | After you modified these, we move on to `SMBIOS_TABLE_TYPE7`.
223 | Here is a template of Type 7: 224 | ```c 225 | SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1IC = { 226 | {EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof(SMBIOS_TABLE_TYPE7), 0}, 227 | 1, // SocketDesignation String 228 | 0x0280, // Cache Configuration 229 | , // Maximum Size 230 | , // Install Size 231 | { 232 | 0, // Other 233 | 0, // Unknown 234 | 0, // NonBurst 235 | 0, // Burst 236 | 0, // PiplelineBurst 237 | 0, // Synchronous 238 | 0, // Asynchronous 239 | 0 // Reserved 240 | }, 241 | { 242 | 0, // Other 243 | 0, // Unknown 244 | 0, // NonBurst 245 | 0, // Burst 246 | 0, // PiplelineBurst 247 | 0, // Synchronous 248 | 0, // Asynchronous 249 | 0 // Reserved 250 | }, 251 | 0, // Cache Speed unknown 252 | CacheErrorParity, // Error Correction Multi 253 | CacheTypeInstruction, // System Cache Type 254 | CacheAssociativity16Way // Associativity 255 | }; 256 | 257 | SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1DC = { 258 | {EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof(SMBIOS_TABLE_TYPE7), 0}, 259 | 1, // SocketDesignation String 260 | 0x0280, // Cache Configuration 261 | , // Maximum Size 262 | , // Install Size 263 | { 264 | 0, // Other 265 | 0, // Unknown 266 | 0, // NonBurst 267 | 0, // Burst 268 | 0, // PiplelineBurst 269 | 0, // Synchronous 270 | 0, // Asynchronous 271 | 0 // Reserved 272 | }, 273 | { 274 | 0, // Other 275 | 0, // Unknown 276 | 0, // NonBurst 277 | 0, // Burst 278 | 0, // PiplelineBurst 279 | 0, // Synchronous 280 | 0, // Asynchronous 281 | 0 // Reserved 282 | }, 283 | 0, // Cache Speed unknown 284 | CacheErrorParity, // Error Correction Multi 285 | CacheTypeData, // System Cache Type 286 | CacheAssociativity16Way // Associativity 287 | }; 288 | 289 | SMBIOS_TABLE_TYPE7 mCacheInfoType7_L2C = { 290 | {EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof(SMBIOS_TABLE_TYPE7), 0}, 291 | 1, // SocketDesignation String 292 | 0x0281, // Cache Configuration 293 | , // Maximum Size 294 | , // Install Size 295 | { 296 | 0, // Other 297 | 0, // Unknown 298 | 0, // NonBurst 299 | 0, // Burst 300 | 0, // PiplelineBurst 301 | 0, // Synchronous 302 | 0, // Asynchronous 303 | 0 // Reserved 304 | }, 305 | { 306 | 0, // Other 307 | 0, // Unknown 308 | 0, // NonBurst 309 | 0, // Burst 310 | 0, // PiplelineBurst 311 | 0, // Synchronous 312 | 0, // Asynchronous 313 | 0 // Reserved 314 | }, 315 | 0, // Cache Speed unknown 316 | CacheErrorParity, // Error Correction Multi 317 | CacheTypeUnified, // System Cache Type 318 | CacheAssociativity8Way // Associativity 319 | }; 320 | 321 | SMBIOS_TABLE_TYPE7 mCacheInfoType7_L3C = { 322 | {EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof(SMBIOS_TABLE_TYPE7), 0}, 323 | 1, // SocketDesignation String 324 | 0x0282, // Cache Configuration 325 | , // Maximum Size 326 | , // Install Size 327 | { 328 | 0, // Other 329 | 0, // Unknown 330 | 0, // NonBurst 331 | 0, // Burst 332 | 0, // PiplelineBurst 333 | 0, // Synchronous 334 | 0, // Asynchronous 335 | 0 // Reserved 336 | }, 337 | { 338 | 0, // Other 339 | 0, // Unknown 340 | 0, // NonBurst 341 | 0, // Burst 342 | 0, // PiplelineBurst 343 | 0, // Synchronous 344 | 0, // Asynchronous 345 | 0 // Reserved 346 | }, 347 | 0, // Cache Speed unknown 348 | CacheErrorParity, // Error Correction Multi 349 | CacheTypeUnified, // System Cache Type 350 | CacheAssociativity8Way // Associativity 351 | }; 352 | 353 | CHAR8 *mCacheInfoType7_L1ICStrings[] = { 354 | "L1 Instruction Cache", 355 | NULL 356 | }; 357 | 358 | CHAR8 *mCacheInfoType7_L1DCStrings[] = { 359 | "L1 Data Cache", 360 | NULL 361 | }; 362 | 363 | CHAR8 *mCacheInfoType7_L2CStrings[] = { 364 | "L2 Cache", 365 | NULL 366 | }; 367 | 368 | CHAR8 *mCacheInfoType7_L3CStrings[] = { 369 | "L3 Cache", 370 | NULL 371 | }; 372 | ``` 373 | You can get these Cache Sizes from a App in the Play Store called `CPU Info (open-source)`.
374 | If Your SoC dosen't have L3 for example then just remove it.
375 | 376 | After that We move to `SMBIOS_TABLE_TYPE17`.
377 | There you just need to change one Value: `Speed`, That should be in the Specs of your SoC.
378 | Then Moddify The Data Updates for `TYPE4`, `TYPE7` and `TYPE17` according to what you changed before in `SmBiosTableDxe.c`. 379 | 380 | ## Modify Librarys (Step 1.4) 381 | 382 | Now we need to modify the Librarys, these are placed under `./Silicon/Qualcomm/Pkg/Library/`.
383 | In every Librarys `.inf` File rename the SoC Name to yours it should be enough for now. 384 | -------------------------------------------------------------------------------- /Silicium/README.md: -------------------------------------------------------------------------------- 1 | # Silicium Guides 2 | 3 | > [!WARNING] 4 | > These Guides are Outdated! Remasters of these Guides will come soon. 5 | 6 | ## Porting a Exynos Device 7 | 8 | - Guide does not Exist yet. 9 | 10 | ## [Porting a Snapdragon Device](Porting/Snapdragon/Device/README.md) 11 | 12 | - This Guide shows you how you can Port your Snapdragon Device. 13 | 14 | ## Porting a Tegra Device 15 | 16 | - Guide does not Exist yet. 17 | 18 | --- 19 | 20 | ## Porting a Exynos SoC 21 | 22 | - Guide does not Exist yet. 23 | 24 | ## [Porting a Snapdragon SoC](Porting/Snapdragon/SoC/README.md) 25 | 26 | - This Guide shows you how you can Port a Snapdragon SoC for your Device. 27 | 28 | ## Porting a Tegra SoC 29 | 30 | - Guide does not Exist yet. 31 | 32 | --- 33 | 34 | ## Patching Snapdragon Device Binaries 35 | 36 | - Guide does not Exist yet. 37 | 38 | ## [Creating Minimal Snapdragon ACPI Tables](Porting/Snapdragon/ACPI/README.md) 39 | 40 | - This Guide shows you how you can make Minimal ACPI Tables for your SoC. 41 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-1.png -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-2.png -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-3.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-3.png -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-4.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-4.png -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-5.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/SoCs/Snapdragon/Fixing-UFS-LUNs/Pictures/Preview-5.png -------------------------------------------------------------------------------- /SoCs/Snapdragon/Fixing-UFS-LUNs/README.md: -------------------------------------------------------------------------------- 1 | # Fixing UFS LUNs 2 | 3 | > [!CAUTION] 4 | > This Guide is not Recommended for Basic Users! Only for Advanced Users! 5 | 6 | ## Video Guide 7 | 8 | > [!NOTE] 9 | > No Video Guide here yet. 10 | 11 | ## Text Guide [Recommended] 12 | 13 | 14 | 15 | 24 |
Guide Sections
16 | 17 | - Fixing UFS LUNs 18 | - [Requirements](#requirements) 19 | - [Preparing](#preparing) 20 | - [Repairing UFS LUNs](#repairing-ufs-luns) 21 | - [Verify Changes](#verify-changes) 22 | 23 |
25 | 26 | ## Requirements 27 | 28 | - A Windows PC 29 | - A Device with a Snapdragon SoC and UFS Chip 30 | - [UEFI Image](https://github.com/Project-Silicium/Mu-Silicium/releases) 31 | - [Windows gdisk](https://sourceforge.net/projects/gptfdisk/files/gptfdisk/1.0.3/gdisk-binaries/gdisk-windows-1.0.3.zip/download) 32 | 33 | ## Preparing 34 | 35 | Before you can Begin Fixing your UFS LUNs, You need some Files for that.
36 | Check the [UEFI Status Page](https://github.com/Project-Silicium/Mu-Silicium/blob/main/Status.md) for your Device if it Supports `Mass Storage`.
37 | If it does not Support it, Contact us on Discord for Help. 38 | 39 | ![Preview](Pictures/Preview-1.png) 40 | 41 | Once you Checked if your Device supports Mass Storage, Download the latest UEFI Image for your Device from [Requirements](#requirements).
42 | After that also Download the gdisk for Windows from [Requirements](#requirements).
43 | Now just Extract the .zip File and you're Ready. 44 | 45 | ## Repairing UFS LUNs 46 | 47 | > [!CAUTION] 48 | > This Section will Brick your Device if not Followed correctly! 49 | 50 | To Repair the UFS LUNs you will need our UEFI Mass Storage.
51 | Flash or Boot the UEFI Image you Downloaded in [Preparing](#preparing).
52 | Once you did that, Reboot your Device and Hold Volume Down once you see the Project Silicium Logo to enter Mass Storage.
53 | If you did that Correctly, You should see a Blue Phone on your Device now: 54 | 55 | ![Preview](Pictures/Preview-2.png) 56 | 57 | At the Bottom of your Screen is some Text, Press the Volume Buttons until you see: `Current LUN: 0`.
58 | Once it says that, Press the Power Button to Confirm, Connect your Device now to your PC.
59 | Your PC should see a Large Disk with way to many Partitions in Disk Manager: 60 | 61 | ![Preview](Pictures/Preview-3.png) 62 | 63 | If you get a new Disk with one Large Unformatted Partition instead, ***Don't* Reboot your Device!**.
64 | Get the Disk Number of the new Disk, In the Picture it's `2`.
65 | Now open a Command Prompt Window as Admin in the Directory where you Extracted the gdisk .zip File.
66 | After that, Just run gdisk on the new Disk: 67 | ```cmd 68 | : Example: ".\gdisk64.exe 2:" 69 | : Note: Use "32" if your PC is x86 70 | .\gdisk64.exe [Disk Number]: 71 | ``` 72 | 73 | You should now see Text like in this Pictures: 74 | 75 | ![Preview](Pictures/Preview-4.png) 76 | ![Preview](Pictures/Preview-5.png) 77 | 78 | If you see the GPT Corrupted Warning in your Command Prompt like in the second Picture, then you need to Repair the GPT Table.
79 | Otherwise you can Skip this Step to repair the GPT Table. 80 | 81 | To do that, Enter `r`, That will enter the Recovery Options.
82 | Once you did that, Enter `c` and confirm with `y`, That will repair the GPT Table.
83 | Now just Save the Changes by entering `w` and confirming with `y`.
84 | It will throw you out of gdisk, Reenter it by using the same Command as before, You should now not see the Warning anymore. 85 | 86 | After you Fixed your GPT Table if it was Broken to Begin with, Check for other Problems by entering `v`.
87 | Only these 2 Problems matter: 88 | ``` 89 | NOTE: These are no the Entire Messages. 90 | 91 | Problem 1: ---------------------------------------------------------------------- 92 | Using 'j' on the experts' menu can adjust this gap. 93 | --------------------------------------------------------------------------------- 94 | 95 | Problem 2: ---------------------------------------------------------------------- 96 | Using 'k' on the experts' menu can adjust this gap. 97 | --------------------------------------------------------------------------------- 98 | ``` 99 | 100 | If you don't see any of these 2 Problems, You can skip this LUN, Enter `q` to Exit and Press Volume Up on your Device and Select the next LUN.
101 | Then follow this Section for the next LUN, If you see atleast one of these 2 Problems, You need to Fix them.
102 | 103 | If you see the Problem in the First Box, Do these Things to Fix it.
104 | First, Enter the Expert Menu by entering `x`, Then enter `j`, It will ask you for a Value, Just Press Enter there.
105 | If you see the Problem in the second Box too, Run `k` in the Expert Menu, It will also ask you for a Value, Press Enter there again.
106 | Now all Problems are Fixed. 107 | 108 | Save the Changes by entering `w` and confirming with `y`. 109 | 110 | ## Verify Changes 111 | 112 | Now reopen gdisk again and Check if you see Corrupted GPT Warning: 113 | 114 | ![Preview](Pictures/Preview-5.png) 115 | 116 | If you do, Enter `r`, then enter `c` and confirm with `y`, That Fixes the GPT Table,
117 | Now save the Changes again using `w` and confirming with `y`. 118 | 119 | Reopen gdisk again to Check if the Corrupted GPT Warning is Gone and if the 2 Problems in `v` are Gone.
120 | If they are, Exit gdisk with `q` and Press Volume Up on your Device, Select the next LUN and Follow [Repairing UFS LUNs](#repairing-ufs-luns) Section + this Section again. 121 | 122 | Once you're unable to Select the next LUN on your Device, that means you Reached the End, Disconnect your Device and Select `Power Off`. 123 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/Mass-Storage/0x04E00000/MassStorage.sh: -------------------------------------------------------------------------------- 1 | #!/sbin/sh 2 | 3 | # Set SELinux Permisive 4 | setenforce 0 5 | 6 | # Set USB Attributes 7 | echo 0xEF > /config/usb_gadget/g1/bDeviceClass 8 | echo 0x02 > /config/usb_gadget/g1/bDeviceSubClass 9 | echo 0x01 > /config/usb_gadget/g1/bDeviceProtocol 10 | 11 | # Create Mass Storage Worksapce 12 | ln -s /config/usb_gadget/g1/functions/mass_storage.0/ /config/usb_gadget/g1/configs/b.1/ 13 | 14 | # Set Target Storage 15 | echo /dev/block/sda > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/file 16 | 17 | # Set Storage Attributes 18 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/cdrom 19 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/removable 20 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/ro 21 | 22 | # Start Mass Storage 23 | sh -c 'echo > /config/usb_gadget/g1/UDC; echo 4e00000.dwc3 > /config/usb_gadget/g1/UDC' & 24 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/Mass-Storage/0x0A600000/MassStorage.sh: -------------------------------------------------------------------------------- 1 | #!/sbin/sh 2 | 3 | # Set SELinux Permisive 4 | setenforce 0 5 | 6 | # Set USB Attributes 7 | echo 0xEF > /config/usb_gadget/g1/bDeviceClass 8 | echo 0x02 > /config/usb_gadget/g1/bDeviceSubClass 9 | echo 0x01 > /config/usb_gadget/g1/bDeviceProtocol 10 | 11 | # Create Mass Storage Worksapce 12 | ln -s /config/usb_gadget/g1/functions/mass_storage.0/ /config/usb_gadget/g1/configs/b.1/ 13 | 14 | # Set Target Storage 15 | echo /dev/block/sda > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/file 16 | 17 | # Set Storage Attributes 18 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/cdrom 19 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/removable 20 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/ro 21 | 22 | # Start Mass Storage 23 | sh -c 'echo > /config/usb_gadget/g1/UDC; echo a600000.dwc3 > /config/usb_gadget/g1/UDC' & 24 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/Mass-Storage/0x0A800000/MassStorage.sh: -------------------------------------------------------------------------------- 1 | #!/sbin/sh 2 | 3 | # Set SELinux Permisive 4 | setenforce 0 5 | 6 | # Set USB Attributes 7 | echo 0xEF > /config/usb_gadget/g1/bDeviceClass 8 | echo 0x02 > /config/usb_gadget/g1/bDeviceSubClass 9 | echo 0x01 > /config/usb_gadget/g1/bDeviceProtocol 10 | 11 | # Create Mass Storage Worksapce 12 | ln -s /config/usb_gadget/g1/functions/mass_storage.0/ /config/usb_gadget/g1/configs/b.1/ 13 | 14 | # Set Target Storage 15 | echo /dev/block/sda > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/file 16 | 17 | # Set Storage Attributes 18 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/cdrom 19 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/removable 20 | echo 0 > /config/usb_gadget/g1/configs/b.1/mass_storage.0/lun.0/ro 21 | 22 | # Start Mass Storage 23 | sh -c 'echo > /config/usb_gadget/g1/UDC; echo a800000.dwc3 > /config/usb_gadget/g1/UDC' & 24 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/Mass-Storage/README.md: -------------------------------------------------------------------------------- 1 | # Using TWRP Mass Storage 2 | 3 | ## Video Guide 4 | 5 | > [!NOTE] 6 | > No Video Guide here yet. 7 | 8 | ## Text Guide [Recommended] 9 | 10 | 11 | 12 | 21 |
Guide Sections
13 | 14 | - Using TWRP Mass Storage 15 | - [Requirements](#requirements) 16 | - [Mass Storage Scripts](#mass-storage-scripts) 17 | - [Preparing](#preparing) 18 | - [Running Mass Storage](#running-mass-storage) 19 | 20 |
22 | 23 | ## Requirements 24 | 25 | - A Windows PC (Linux and MacOS work too) 26 | - A Device 27 | - TWRP Recovery 28 | 29 | ## Mass Storage Scripts 30 | 31 | | SoC | Script | 32 | |:--------|:--------------------------------------------| 33 | | SM8635 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 34 | | SM8550 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 35 | | SM8450 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 36 | | SM8350 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 37 | | SM8250 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 38 | | SM8150 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 39 | | SDM845 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 40 | | MSM8998 | [MassStorage.sh](0x0A800000/MassStorage.sh) | 41 | | SM7325 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 42 | | SM7150 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 43 | | SM7125 | [MassStorage.sh](0x0A600000/MassStorage.sh) | 44 | | SM6225 | [MassStorage.sh](0x04E00000/MassStorage.sh) | 45 | | SM6125 | [MassStorage.sh](0x04E00000/MassStorage.sh) | 46 | | SM6115 | [MassStorage.sh](0x04E00000/MassStorage.sh) | 47 | | SDM660 | [MassStorage.sh](0x0A800000/MassStorage.sh) | 48 | 49 | ## Preparing 50 | 51 | Before you can use Mass Storage in TWRP, You must prepare some Things before using it.
52 | Make sure that all Partitions are Unmounted, If not Unmount all Partitions in the TWRP GUI. 53 | 54 | Now you need the Mass Storage Script for your Device, Download the right one from [Mass Storage Scripts](#mass-storage-scripts).
55 | Save it somewhere where you can find it again, The Download Folder would be good.
56 | After that you can now Connect your Device to your PC. 57 | 58 | ## Running Mass Storage 59 | 60 | Once you Downloaded the Script and Connected your Device, Psuh the Script to your Device: 61 | ```cmd 62 | adb push MassStorage.sh /cache/ 63 | ``` 64 | If you get a File Not Found Error make sure your cmd Shows this: 65 | ```cmd 66 | C:\Users\[User Name]\Downloads> 67 | ``` 68 | If not, Enter the Folder using this Command and try to push the Script again: 69 | ```cmd 70 | cd %USERPROFILE%\Downloads 71 | ``` 72 | 73 | After you Pushed the Script to your Device, You can now Start Mass Storage using these 2 Commands: 74 | ```cmd 75 | : Makes the Script Executable 76 | adb shell chmod 744 /cache/MassStorage.sh 77 | 78 | : Runs the Script 79 | adb shell ./cache/MassStorage.sh 80 | ``` 81 | Now you should see a New Disk with many Partitions on your PC. 82 | -------------------------------------------------------------------------------- /SoCs/Snapdragon/README.md: -------------------------------------------------------------------------------- 1 | ## Snapdragon Guides 2 | 3 | ## [Using TWRP Mass Storage](Mass-Storage/README.md) 4 | 5 | - This Guide shows you how you can use TWRP Mass Storage. 6 | 7 | --- 8 | 9 | ## [Fixing UFS LUNs](Fixing-UFS-LUNs/README.md) 10 | 11 | - This Guide shows you How you can Repair your UFS LUNs. 12 | -------------------------------------------------------------------------------- /Vendors/README.md: -------------------------------------------------------------------------------- 1 | ## Vendor Guides 2 | 3 | ## [Samsung Guides](Samsung/README.md) 4 | 5 | - This Section Contains Guides like Fixing UFS. 6 | -------------------------------------------------------------------------------- /Vendors/Samsung/Modding-UFS/Pictures/Preview-1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Vendors/Samsung/Modding-UFS/Pictures/Preview-1.png -------------------------------------------------------------------------------- /Vendors/Samsung/Modding-UFS/Pictures/Preview-2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Vendors/Samsung/Modding-UFS/Pictures/Preview-2.png -------------------------------------------------------------------------------- /Vendors/Samsung/Modding-UFS/Pictures/Preview-3.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Project-Silicium/Guides/4d5342dcef58ab56030eea023e22e42cde289def/Vendors/Samsung/Modding-UFS/Pictures/Preview-3.png -------------------------------------------------------------------------------- /Vendors/Samsung/Modding-UFS/README.md: -------------------------------------------------------------------------------- 1 | # Modifying your UFS 2 | 3 | > [!CAUTION] 4 | > This Guide is not Recommended for Basic Users! Only for Advanced Users! 5 | 6 | ## Video Guide 7 | 8 | > [!NOTE] 9 | > No Video Guide here yet. 10 | 11 | ## Text Guide [Recommended] 12 | 13 | 14 | 15 | 24 |
Guide Sections
16 | 17 | - Modifying your UFS 18 | - [Requirements](#requirements) 19 | - [Preparing](#preparing) 20 | - [Setting UFS Online](#setting-ufs-online) 21 | - [Repairing UFS LUNs](#repairing-ufs-luns) 22 | 23 |
25 | 26 | ## Requirements 27 | 28 | - A Windows PC 29 | - A Samsung Device with a Snapdragon SoC 30 | - TWRP Recovery 31 | - [Android SDK Tools](https://developer.android.com/tools/releases/platform-tools?hl=en) 32 | 33 | ## Preparing 34 | 35 | Before you can beginn modding your UFS, You need to prepare some Things first.
36 | You will need the TWRP Recovery for your Device and [Mass Storage](../../../SoCs/Snapdragon/Mass-Storage/README.md) for your Device.
37 | Follow the Mass Storage Guide and come back here once you got it Running. 38 | 39 | Once you have Mass Storage running on your Device, Download [gdisk](https://cdn.discordapp.com/attachments/1057409313381040261/1319684671486824478/gdisk?ex=67e765e0&is=67e61460&hm=a466cbcc47cbb5bd6b8971c8a8d1310341de355d15906d2fd01bf9c4471fa14b&) and save it somewhere where you will Find it again, Best would be the Download Folder.
40 | After you Downloaded the File, Push it to your Device using this Command: 41 | ```cmd 42 | adb push gdisk /cache/ 43 | ``` 44 | 45 | ## Setting UFS Online 46 | 47 | > [!CAUTION] 48 | > This Section will Brick your Device if not Followed correctly! 49 | 50 | Samsung sets their UFS on Snapdragon Devices Offline which breaks Windows / Linux Boot, So you need to set it Online.
51 | Open Disk Manager on your PC and Find the Disk with way to many Partitions.
52 | Right Click the Disk and Press `Online`. 53 | 54 | ![Preview](Pictures/Preview-1.png) 55 | ![Preview](Pictures/Preview-2.png) 56 | 57 | Now Windows set it to Online and it should now be one Large Unformated Partition.
58 | Whatever you do, ***Don't* Reboot your Device!**
59 | You need to Repair it now, Enter ADB Shell using this Command: 60 | ```cmd 61 | adb shell 62 | ``` 63 | 64 | After that Run `gdisk` on the UFS using these Commands: 65 | ```bash 66 | # Makes the File Executable 67 | chmod 744 /cache/gdisk 68 | 69 | # Runs "gdisk" 70 | ./cache/gdisk /dev/block/sda 71 | ``` 72 | Once you Executed the Commands you should see a GPT Corrupted Warning: 73 | 74 | ![Preview](Pictures/Preview-3.png) 75 | 76 | Run these Commands in gdisk to Repair your GPT, First Enter `r`, That will Enter the Recovery Options.
77 | Then Enter `c`, That will now Repair your GPT, Now just Enter `w` and Confirm with `y` to Write the Changes.
78 | After you ran all these Commands it should Exit, Once it did, Rerun the gdisk Command and check if everything is Fine now.
79 | If all Partitions are there after using `p`, Exit using `q` and Power Off your Device. 80 | 81 | ## Repairing UFS LUNs 82 | 83 | All you need to do now is follow the Snapdragon Generic [Fixing UFS LUNs](../../../SoCs/Snapdragon/Fixing-UFS-LUNs/README.md) Guide to Finish the UFS Modding. 84 | -------------------------------------------------------------------------------- /Vendors/Samsung/README.md: -------------------------------------------------------------------------------- 1 | ## Samsung Guides 2 | 3 | ## [Modifying your UFS](Modding-UFS/README.md) 4 | 5 | - This Guide Explains how you Mod your UFS to Allow Windows/Linux Boot. 6 | --------------------------------------------------------------------------------