├── README.md ├── 操作系统实验 ├── lab1 │ ├── makefile │ ├── p.c │ ├── spinlock.c │ ├── system_call.c │ └── t.c ├── lab2 │ ├── README.md │ ├── m.c │ ├── makefile │ ├── mem.h │ ├── pipe.c │ └── t.c └── lab3 │ ├── Makefile │ ├── README.md │ ├── globalvar.c │ ├── modify_new_syscall.c │ ├── modify_old_syscall.c │ ├── modify_syscall.c │ ├── read.c │ └── write.c ├── 计组实验 ├── README.md ├── cpu_report.pdf ├── mCPU │ ├── instructions.txt │ ├── project_4.cache │ │ ├── sim │ │ │ └── ssm.db │ │ └── wt │ │ │ ├── project.wpc │ │ │ ├── synthesis.wdf │ │ │ ├── webtalk_pa.xml │ │ │ └── xsim.wdf │ ├── project_4.hw │ │ └── project_4.lpr │ ├── project_4.ip_user_files │ │ └── README.txt │ ├── project_4.runs │ │ ├── .jobs │ │ │ └── vrs_config_1.xml │ │ └── synth_1 │ │ │ └── vivado.pb │ ├── project_4.sim │ │ └── sim_1 │ │ │ └── behav │ │ │ └── xsim │ │ │ ├── compile.bat │ │ │ ├── compile.log │ │ │ ├── elaborate.bat │ │ │ ├── elaborate.log │ │ │ ├── glbl.v │ │ │ ├── sim_CPU.tcl │ │ │ ├── sim_CPU_behav.wdb │ │ │ ├── sim_CPU_vlog.prj │ │ │ ├── simulate.bat │ │ │ ├── simulate.log │ │ │ ├── xelab.pb │ │ │ ├── xsim.dir │ │ │ ├── sim_CPU_behav │ │ │ │ ├── Compile_Options.txt │ │ │ │ ├── TempBreakPointFile.txt │ │ │ │ ├── obj │ │ │ │ │ ├── xsim_0.win64.obj │ │ │ │ │ ├── xsim_1.c │ │ │ │ │ └── xsim_1.win64.obj │ │ │ │ ├── xsim.dbg │ │ │ │ ├── xsim.mem │ │ │ │ ├── xsim.reloc │ │ │ │ ├── xsim.rlx │ │ │ │ ├── xsim.rtti │ │ │ │ ├── xsim.svtype │ │ │ │ ├── xsim.type │ │ │ │ ├── xsim.xdbg │ │ │ │ ├── xsimSettings.ini │ │ │ │ ├── xsimcrash.log │ │ │ │ ├── xsimk.exe │ │ │ │ └── xsimkernel.log │ │ │ └── xil_defaultlib │ │ │ │ ├── @a@d@d.sdb │ │ │ │ ├── @a@l@u.sdb │ │ │ │ ├── @a@l@u@dec.sdb │ │ │ │ ├── @c@p@u.sdb │ │ │ │ ├── @controller.sdb │ │ │ │ ├── @d_latch.sdb │ │ │ │ ├── @data@memory.sdb │ │ │ │ ├── @decoder38.sdb │ │ │ │ ├── @i@m.sdb │ │ │ │ ├── @m@u@x2.sdb │ │ │ │ ├── @main@dec.sdb │ │ │ │ ├── @s@u@b.sdb │ │ │ │ ├── @sig@ext.sdb │ │ │ │ ├── @state@machine.sdb │ │ │ │ ├── glbl.sdb │ │ │ │ ├── sim_@c@p@u.sdb │ │ │ │ └── xil_defaultlib.rlx │ │ │ ├── xsim.ini │ │ │ ├── xvlog.log │ │ │ └── xvlog.pb │ ├── project_4.srcs │ │ ├── sim_1 │ │ │ └── new │ │ │ │ └── sim_CPU.v │ │ └── sources_1 │ │ │ └── new │ │ │ ├── ADD.v │ │ │ ├── ALU.v │ │ │ ├── ALUdec.v │ │ │ ├── CPU.v │ │ │ ├── CU.v │ │ │ ├── DataMemory.v │ │ │ ├── IM.v │ │ │ ├── MUX2.v │ │ │ ├── MainDec.v │ │ │ ├── PC.v │ │ │ ├── SUB.v │ │ │ ├── SigExt.v │ │ │ ├── StateMachine.v │ │ │ └── decoder38.v │ ├── project_4.xpr │ ├── vivado.jou │ ├── vivado.log │ ├── vivado_11468.backup.jou │ ├── vivado_11468.backup.log │ ├── vivado_13268.backup.jou │ ├── vivado_13268.backup.log │ ├── vivado_1732.backup.jou │ ├── vivado_1732.backup.log │ ├── vivado_3320.backup.jou │ └── vivado_3320.backup.log └── 计组考试题 │ ├── 计算机组成原理 2013.pdf │ └── 计算机组成原理 期末考试试题.pdf └── 计网课内实验 ├── README.md ├── lab1 http ├── http.pcapng └── 分析协议HTTP分组嗅探器.pdf └── lab2 router ├── myTopology.bsn ├── riplogy.bsn └── 路由器基本配置大作业.pdf /README.md: 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