├── .gitignore ├── Hardware ├── LICENSE ├── PicoEVB-D.pdf └── board_design │ ├── M2_edge_b.sch │ ├── PicoEVB-cache.lib │ ├── PicoEVB.kicad_pcb │ ├── PicoEVB.pro │ ├── PicoEVB.sch │ ├── USB_IO_b.sch │ ├── archive │ ├── PicoEVB-D.zip │ ├── PicoEVB-all-pos.csv │ └── PicoEVB.csv │ ├── fp-info-cache │ ├── fp-lib-table │ ├── fpga_io_b.sch │ ├── fpga_pcie_b.sch │ ├── fpga_pwr_cfg_b.sch │ ├── kicad_lib │ ├── 93LC │ │ ├── 93LC46B-SOT23.dcm │ │ └── 93LC46B-SOT23.lib │ ├── FT2232 │ │ └── ft2232-fixed.lib │ ├── M2-Board.pretty │ │ ├── M.2-AE-22x30.kicad_mod │ │ ├── m2-board.dcm │ │ └── m2-board.lib │ ├── MAX1589A.pretty │ │ ├── MAX1589A.dcm │ │ ├── MAX1589A.lib │ │ └── MAX1589AETT100T.kicad_mod │ ├── MIC47050 │ │ ├── MIC47050-DFN-6-2MM.kicad_mod │ │ ├── MIC47050.dcm │ │ └── MIC47050.lib │ ├── SMT │ │ ├── U.FL-COAX.kicad_mod │ │ ├── c_0201_least.kicad_mod │ │ ├── c_0201_nom.kicad_mod │ │ ├── c_0402.kicad_mod │ │ ├── r_0201_least.kicad_mod │ │ └── r_0402.kicad_mod │ ├── TS3L110.pretty │ │ ├── RGY16_2P55X2P05.stp │ │ ├── TS3L110.dcm │ │ ├── TS3L110.lib │ │ └── TS3L110_RGY_16.kicad_mod │ ├── W25Q │ │ ├── W25Q.dcm │ │ └── W25Q.lib │ ├── XC7A50T-CSG325 │ │ ├── CSG-324.kicad_mod │ │ ├── xc7a50t-bga325.dcm │ │ └── xc7a50t-bga325.lib │ ├── conn │ │ └── pico-ezmate-6.kicad_mod │ ├── fp_archive.pretty │ │ ├── CSG-324.kicad_mod │ │ ├── C_0201.kicad_mod │ │ ├── C_0603.kicad_mod │ │ ├── C_0805.kicad_mod │ │ ├── Crystal_SMD_3225-4pin_3.2x2.5mm.kicad_mod │ │ ├── Fiducial_1mm_Dia_2.54mm_Outer_CopperBottom.kicad_mod │ │ ├── Fiducial_1mm_Dia_2.54mm_Outer_CopperTop.kicad_mod │ │ ├── LED_0402.kicad_mod │ │ ├── M.2-AE-22x42.kicad_mod │ │ ├── MAX1589AETT100T.kicad_mod │ │ ├── MIC47050-DFN-6-2MM.kicad_mod │ │ ├── QFN-64-1EP_9x9mm_Pitch0.5mm.kicad_mod │ │ ├── SC-70.kicad_mod │ │ ├── SOIC-8_3.9x4.9mm_Pitch1.27mm.kicad_mod │ │ ├── SOT-23-6.kicad_mod │ │ ├── TPS82084SILR.kicad_mod │ │ ├── c_0201_least.kicad_mod │ │ ├── c_0402.kicad_mod │ │ ├── pico-ezmate-6.kicad_mod │ │ ├── r_0201_least.kicad_mod │ │ └── r_0402.kicad_mod │ └── tps82084.pretty │ │ ├── TPS82084SILR.kicad_mod │ │ └── tps82084.lib │ └── power_b.sch ├── README.md ├── Sample-Projects ├── LICENSE └── Project-0 │ ├── FPGA │ ├── README.md │ ├── mcs │ │ ├── EVB4.mcs │ │ └── EVB5.mcs │ ├── picoevb.srcs │ │ └── sources_1 │ │ │ └── bd │ │ │ └── project_bd │ │ │ ├── hdl │ │ │ └── project_bd_wrapper.vhd │ │ │ ├── ip │ │ │ ├── project_bd_axi_bram_ctrl_0_0 │ │ │ │ ├── project_bd_axi_bram_ctrl_0_0.xci │ │ │ │ └── project_bd_axi_bram_ctrl_0_0.xml │ │ │ ├── project_bd_axi_bram_ctrl_0_bram_0 │ │ │ │ ├── project_bd_axi_bram_ctrl_0_bram_0.xci │ │ │ │ └── project_bd_axi_bram_ctrl_0_bram_0.xml │ │ │ ├── project_bd_axi_gpio_0_0 │ │ │ │ ├── project_bd_axi_gpio_0_0.xci │ │ │ │ └── project_bd_axi_gpio_0_0.xml │ │ │ ├── project_bd_axi_gpio_1_0 │ │ │ │ ├── project_bd_axi_gpio_1_0.xci │ │ │ │ └── project_bd_axi_gpio_1_0.xml │ │ │ ├── project_bd_axi_interconnect_0_0 │ │ │ │ ├── project_bd_axi_interconnect_0_0.xci │ │ │ │ └── project_bd_axi_interconnect_0_0.xml │ │ │ ├── project_bd_axi_quad_spi_0_0 │ │ │ │ ├── project_bd_axi_quad_spi_0_0.xci │ │ │ │ └── project_bd_axi_quad_spi_0_0.xml │ │ │ ├── project_bd_c_counter_binary_0_0 │ │ │ │ ├── project_bd_c_counter_binary_0_0.xci │ │ │ │ └── project_bd_c_counter_binary_0_0.xml │ │ │ ├── project_bd_clk_wiz_0_0 │ │ │ │ ├── project_bd_clk_wiz_0_0.xci │ │ │ │ └── project_bd_clk_wiz_0_0.xml │ │ │ ├── project_bd_clkreq_l_tieoff_0 │ │ │ │ ├── project_bd_clkreq_l_tieoff_0.xci │ │ │ │ └── project_bd_clkreq_l_tieoff_0.xml │ │ │ ├── project_bd_const_10ee_0 │ │ │ │ ├── project_bd_const_10ee_0.xci │ │ │ │ └── project_bd_const_10ee_0.xml │ │ │ ├── project_bd_const_7021_0 │ │ │ │ ├── project_bd_const_7021_0.xci │ │ │ │ └── project_bd_const_7021_0.xml │ │ │ ├── project_bd_const_7021_1 │ │ │ │ ├── project_bd_const_7021_1.xci │ │ │ │ └── project_bd_const_7021_1.xml │ │ │ ├── project_bd_deadbeef_constant_0 │ │ │ │ ├── project_bd_deadbeef_constant_0.xci │ │ │ │ └── project_bd_deadbeef_constant_0.xml │ │ │ ├── project_bd_util_ds_buf_0 │ │ │ │ ├── project_bd_util_ds_buf_0.xci │ │ │ │ └── project_bd_util_ds_buf_0.xml │ │ │ ├── project_bd_util_vector_logic_0_0 │ │ │ │ ├── project_bd_util_vector_logic_0_0.xci │ │ │ │ └── project_bd_util_vector_logic_0_0.xml │ │ │ ├── project_bd_util_vector_logic_0_1 │ │ │ │ ├── project_bd_util_vector_logic_0_1.xci │ │ │ │ └── project_bd_util_vector_logic_0_1.xml │ │ │ ├── project_bd_util_vector_logic_0_2 │ │ │ │ ├── project_bd_util_vector_logic_0_2.xci │ │ │ │ └── project_bd_util_vector_logic_0_2.xml │ │ │ ├── project_bd_util_vector_logic_1_0 │ │ │ │ ├── project_bd_util_vector_logic_1_0.xci │ │ │ │ └── project_bd_util_vector_logic_1_0.xml │ │ │ ├── project_bd_util_vector_logic_1_1 │ │ │ │ ├── project_bd_util_vector_logic_1_1.xci │ │ │ │ └── project_bd_util_vector_logic_1_1.xml │ │ │ ├── project_bd_util_vector_logic_2_0 │ │ │ │ ├── project_bd_util_vector_logic_2_0.xci │ │ │ │ └── project_bd_util_vector_logic_2_0.xml │ │ │ ├── project_bd_xadc_wiz_1_0 │ │ │ │ ├── project_bd_xadc_wiz_1_0.xci │ │ │ │ └── project_bd_xadc_wiz_1_0.xml │ │ │ ├── project_bd_xbar_0 │ │ │ │ ├── project_bd_xbar_0.xci │ │ │ │ └── project_bd_xbar_0.xml │ │ │ ├── project_bd_xdma_1_0 │ │ │ │ ├── ip_0 │ │ │ │ │ ├── project_bd_xdma_1_0_pcie2_ip.xci │ │ │ │ │ └── project_bd_xdma_1_0_pcie2_ip.xml │ │ │ │ ├── ip_1 │ │ │ │ │ ├── xdma_v4_1_12_blk_mem_64_reg_be.xci │ │ │ │ │ └── xdma_v4_1_12_blk_mem_64_reg_be.xml │ │ │ │ ├── ip_2 │ │ │ │ │ ├── xdma_v4_1_12_blk_mem_64_noreg_be.xci │ │ │ │ │ └── xdma_v4_1_12_blk_mem_64_noreg_be.xml │ │ │ │ ├── ip_3 │ │ │ │ │ ├── pcie2_fifo_generator_dma_cpl.xci │ │ │ │ │ └── pcie2_fifo_generator_dma_cpl.xml │ │ │ │ ├── ip_4 │ │ │ │ │ ├── pcie2_fifo_generator_tgt_brdg.xci │ │ │ │ │ └── pcie2_fifo_generator_tgt_brdg.xml │ │ │ │ ├── project_bd_xdma_1_0.xci │ │ │ │ └── project_bd_xdma_1_0.xml │ │ │ ├── project_bd_xlconcat_0_0 │ │ │ │ ├── project_bd_xlconcat_0_0.xci │ │ │ │ └── project_bd_xlconcat_0_0.xml │ │ │ ├── project_bd_xlconstant_0_0 │ │ │ │ ├── project_bd_xlconstant_0_0.xci │ │ │ │ └── project_bd_xlconstant_0_0.xml │ │ │ ├── project_bd_xlslice_0_0 │ │ │ │ ├── project_bd_xlslice_0_0.xci │ │ │ │ └── project_bd_xlslice_0_0.xml │ │ │ ├── project_bd_xlslice_0_1 │ │ │ │ ├── project_bd_xlslice_0_1.xci │ │ │ │ └── project_bd_xlslice_0_1.xml │ │ │ └── project_bd_xlslice_0_2 │ │ │ │ ├── project_bd_xlslice_0_2.xci │ │ │ │ └── project_bd_xlslice_0_2.xml │ │ │ ├── project_bd.bd │ │ │ ├── project_bd.bxml │ │ │ └── ui │ │ │ ├── bd_23d44e28.ui │ │ │ └── bd_4a6a964f.ui │ ├── picoevb.xpr │ ├── tcl │ │ ├── build.tcl │ │ └── prog-flash.tcl │ └── xilinx_xdma_pcie_x0y0.xdc │ ├── Host │ ├── blink-leds.py │ ├── dma-test.py │ ├── read-xadc.py │ ├── sayversion.py │ └── spi-loader │ │ ├── README.md │ │ ├── doc-images │ │ ├── axi-quad-cfg.png │ │ ├── block-diagram.png │ │ └── pcie-cfg.png │ │ └── linux │ │ ├── .gitignore │ │ └── sw │ │ ├── CMakeLists.txt │ │ ├── app-linux │ │ ├── Main.cpp │ │ └── spi-s25flk.hpp │ │ ├── lib │ │ ├── common │ │ │ ├── xil_assert.c │ │ │ ├── xil_assert.h │ │ │ ├── xil_io.c │ │ │ ├── xil_io.h │ │ │ ├── xil_printf.h │ │ │ ├── xil_types.h │ │ │ └── xstatus.h │ │ ├── readme.txt │ │ └── src │ │ │ ├── xspi.c │ │ │ ├── xspi.h │ │ │ ├── xspi_i.h │ │ │ ├── xspi_l.h │ │ │ ├── xspi_options.c │ │ │ └── xspi_stats.c │ │ └── slickedit │ │ ├── all-2.vpj │ │ ├── spi-loader.vpw │ │ └── spi-loader.vpwhist │ ├── README.md │ └── proj_bd.png ├── images ├── H3-600x660-ind.png ├── H3-600x660-leds.png ├── H3-600x660-mgt.png ├── pico-d-bottom.png ├── pico-d-diagram.png ├── pico-d-top.png ├── pico-d-with-quarter.png ├── pico-in-laptop-1_png_project-body-2.jpg ├── pico-in-laptop-1_png_project-body.jpg ├── vivado.png └── win_and_linux.png ├── other └── VivadoCommands.txt ├── spi-flash-program-openocd ├── README.md ├── bscan_spi_xc7a50t.bit ├── cpld │ ├── jtagspi.cfg │ └── xilinx-xc7.cfg ├── flash.cfg ├── go.sh ├── image.bin └── openocd └── spi-loader ├── README.md ├── doc-images ├── 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-------------------------------------------------------------------------------- 1 | Refs,Value,Footprint,Quantity,MFR,MPN,SPR,SPN 2 | C56;C64,22uf,Capacitors_SMD:C_0603,2,yageo,CC0603MRX5R6BB226,-,- 3 | C27;C28;C29;C30;C4,47uf,Capacitors_SMD:C_0603,5,murata,GRM188R60G476ME15D,-,- 4 | C53;C54;C55;C65;C66;C63;C62;C57;C3,100uf,Capacitors_SMD:C_0805,9,AVX,F950J107MPAAQ2,-,- 5 | U7,FT230XQ,Housings_DFN_QFN:QFN-16-1EP_4x4mm_Pitch0.65mm,1,FTDI,FT230XQ,-,- 6 | U2,S25Q,Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm,1,Cypress,S25FL132K0XNFIQ11,-,- 7 | D2,A,LEDs:LED_0402,1,Panasonic,LNJ247W82RA,-,- 8 | D3,B,LEDs:LED_0402,1,Panasonic,LNJ247W82RA,-,- 9 | D1,BUSY,LEDs:LED_0402,1,Panasonic,LNJ247W82RA,-,- 10 | D4,C,LEDs:LED_0402,1,Panasonic,LNJ247W82RA,-,- 11 | U4,MAX1589AETT100T,MAX1589A:MAX1589AETT100T,1,Maxim,MAX1589AETT100+T,-,- 12 | U5,MIC47050-1.2YML,MIC47050:MIC47050-DFN-6-2MM,1,Microchip,MIC47050-1.2YML-TR,-,- 13 | RN3;RN1,4.7K,Resistors_SMD:R_Array_Convex_4x0402,2,CTS,741X083472JP,-,- 14 | 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B 52 | X BDBUS5 44 1200 -400 150 L 50 50 1 1 B 53 | X BCBUS3 54 1200 -1100 150 L 50 50 1 1 B 54 | X VCORE 64 0 2200 150 D 50 50 1 1 W 55 | X GND 15 -100 -2200 150 U 50 50 1 1 W 56 | X GND 25 0 -2200 150 U 50 50 1 1 W 57 | X GND 35 100 -2200 150 U 50 50 1 1 W 58 | X BDBUS6 45 1200 -500 150 L 50 50 1 1 B 59 | X BCBUS4 55 1200 -1200 150 L 50 50 1 1 B 60 | X GND 65 400 -2200 150 U 50 50 1 1 W 61 | X ADBUS0 16 1200 1900 150 L 50 50 1 1 B 62 | X ACBUS0 26 1200 1000 150 L 50 50 1 1 B 63 | X ~SUSPEND 36 1200 -1800 150 L 50 50 1 1 O 64 | X BDBUS7 46 1200 -600 150 L 50 50 1 1 B 65 | X VCCIO 56 500 2200 150 D 50 50 1 1 W 66 | X ADBUS1 17 1200 1800 150 L 50 50 1 1 B 67 | X ACBUS1 27 1200 900 150 L 50 50 1 1 B 68 | X VCORE 37 -100 2200 150 D 50 50 1 1 W 69 | X GND 47 200 -2200 150 U 50 50 1 1 W 70 | X BCBUS5 57 1200 -1300 150 L 50 50 1 1 B 71 | X ADBUS2 18 1200 1700 150 L 50 50 1 1 B 72 | X ACBUS2 28 1200 800 150 L 50 50 1 1 B 73 | X BDBUS0 38 1200 100 150 L 50 50 1 1 B 74 | X BCBUS0 48 1200 -800 150 L 50 50 1 1 B 75 | X BCBUS6 58 1200 -1400 150 L 50 50 1 1 B 76 | X ADBUS3 19 1200 1600 150 L 50 50 1 1 B 77 | X ACBUS3 29 1200 700 150 L 50 50 1 1 B 78 | X BDBUS1 39 1200 0 150 L 50 50 1 1 B 79 | X VREGOUT 49 -1200 1700 150 R 50 50 1 1 w 80 | X BCBUS7 59 1200 -1500 150 L 50 50 1 1 B 81 | ENDDRAW 82 | ENDDEF 83 | # 84 | #End Library 85 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/M2-Board.pretty/m2-board.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/M2-Board.pretty/m2-board.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # M.2-AE 5 | # 6 | DEF M.2-AE PCB 0 40 Y Y 1 F N 7 | F0 "PCB" -400 1450 60 H V C CNN 8 | F1 "M.2-AE" 550 1450 60 H V C CNN 9 | F2 "" -450 100 60 H I C CNN 10 | F3 "" -450 100 60 H I C CNN 11 | DRAW 12 | S -500 1400 450 -700 0 1 0 N 13 | S 450 -700 450 -700 0 1 0 N 14 | X GND 1 650 450 200 L 50 50 1 1 W 15 | X 3p3v 2 -700 450 200 R 50 50 1 1 w 16 | X USB+ 3 650 950 200 L 50 50 1 1 B 17 | X 3p3v 4 -700 350 200 R 50 50 1 1 W 18 | X USB- 5 650 850 200 L 50 50 1 1 B 19 | X LED0 6 650 700 200 L 50 50 1 1 I 20 | X GND 7 650 350 200 L 50 50 1 1 W 21 | X PER0_p 41 -700 1050 200 R 50 50 1 1 I 22 | X GND 51 -700 -50 200 R 50 50 1 1 W 23 | X PERST# 52 650 1100 200 L 50 50 1 1 O 24 | X 3p3v 72 -700 250 200 R 50 50 1 1 W 25 | X GND 23 650 150 200 L 50 50 1 1 W 26 | X GND 33 650 -50 200 L 50 50 1 1 W 27 | X PER0_n 43 -700 950 200 R 50 50 1 1 I 28 | X CLKREQ# 53 650 1200 200 L 50 50 1 1 I 29 | X GND 63 -700 -250 200 R 50 50 1 1 W 30 | X W_DISABLE1# 54 650 -600 200 L 50 50 1 1 O 31 | X 3p3v 74 -700 150 200 R 50 50 1 1 W 32 | X PET0_p 35 -700 800 200 R 50 50 1 1 O 33 | X GND 45 -700 50 200 R 50 50 1 1 w 34 | X PEWAKE# 55 650 1300 200 L 50 50 1 1 B 35 | X GND 75 650 -250 200 L 50 50 1 1 W 36 | X LED1 16 650 600 200 L 50 50 1 1 I 37 | X W_DISABLE0# 56 650 -500 200 L 50 50 1 1 O 38 | X GND 17 650 250 200 L 50 50 1 1 W 39 | X PET0_n 37 -700 700 200 R 50 50 1 1 O 40 | X REFCLK_p 47 -700 1300 200 R 50 50 1 1 O 41 | X GND 57 -700 -150 200 R 50 50 1 1 W 42 | X GND 18 650 -350 200 L 50 50 1 1 W 43 | X GND 39 650 -150 200 L 50 50 1 1 W 44 | X REFCLK_n 49 -700 1200 200 R 50 50 1 1 O 45 | X GND 69 -700 -350 200 R 50 50 1 1 W 46 | ENDDRAW 47 | ENDDEF 48 | # 49 | #End Library 50 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MAX1589A.pretty/MAX1589A.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MAX1589A.pretty/MAX1589A.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # MAX1589AETTxxxT 5 | # 6 | DEF MAX1589AETTxxxT U 0 10 Y Y 1 F N 7 | F0 "U" 250 100 60 H V C CNN 8 | F1 "MAX1589AETTxxxT" 500 -400 49 H V C CNN 9 | F2 "21-0137I_T633-2" 450 -500 60 H I C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | DRAW 12 | X OUT 1 950 0 197 L 49 49 1 0 O 13 | X IC 2 950 -100 197 L 49 49 1 0 U 14 | X RESET# 3 950 -200 197 L 49 49 1 0 O 15 | X GND 4 0 -200 197 R 49 49 1 0 W 16 | X SHDN# 5 0 -100 197 R 49 49 1 0 I 17 | X IN 6 0 0 197 R 49 49 1 0 W 18 | X GND 7 0 -300 197 R 49 49 1 0 U 19 | S 200 50 750 -350 0 1 0 N 20 | ENDDRAW 21 | ENDDEF 22 | # 23 | #End Library 24 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MAX1589A.pretty/MAX1589AETT100T.kicad_mod: -------------------------------------------------------------------------------- 1 | (module MAX1589AETT100T (layer F.Cu) (tedit 588FF48B) 2 | (fp_text reference REF** (at 0.2 -3.1) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value 21-0137I_T633-2 (at 1.8 3.6) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User) 9 | (effects (font (size 0.127 0.127) (thickness 0.002))) 10 | ) 11 | (fp_line (start -1.5494 1.5494) (end 1.5494 1.5494) (layer F.SilkS) (width 0.1524)) 12 | (fp_line (start 1.5494 -1.5494) (end -1.9 -1.55) (layer F.SilkS) (width 0.1524)) 13 | (fp_line (start -1.5494 1.5494) (end 1.5494 1.5494) (layer Dwgs.User) (width 0.1524)) 14 | (fp_line (start 1.5494 1.5494) (end 1.5494 -1.5494) (layer Dwgs.User) (width 0.1524)) 15 | (fp_line (start 1.5494 -1.5494) (end -1.5494 -1.5494) (layer Dwgs.User) (width 0.1524)) 16 | (fp_line (start -1.5494 -1.5494) (end -1.5494 1.5494) (layer Dwgs.User) (width 0.1524)) 17 | (fp_arc (start 0 -1.5494) (end 0.3048 -1.5494) (angle 180) (layer Dwgs.User) (width 0.1524)) 18 | (pad 1 smd rect (at -1.5018 -0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 19 | (pad 2 smd rect (at -1.5018 0) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 20 | (pad 3 smd rect (at -1.5018 0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 21 | (pad 4 smd rect (at 1.5018 0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 22 | (pad 5 smd rect (at 1.5018 0) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 23 | (pad 6 smd rect (at 1.5018 -0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 24 | (pad 7 smd rect (at 0 0) (size 1.6002 2.3876) (layers F.Cu F.Paste F.Mask)) 25 | (pad 7 smd rect (at 0 0) (size 0.0254 0.0254) (layers F.Paste)) 26 | ) 27 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MIC47050/MIC47050-DFN-6-2MM.kicad_mod: -------------------------------------------------------------------------------- 1 | (module MIC47050-DFN-6-2MM (layer F.Cu) (tedit 59545670) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference DFN-6/2MM (at -3.9 0.4 90) (layer F.SilkS) 5 | (effects (font (size 0.64 0.64) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at 0.2 -1.8) (layer F.SilkS) 8 | (effects (font (size 0.5 0.5) (thickness 0.05))) 9 | ) 10 | (fp_line (start -1 -1.25) (end -1 1.25) (layer F.SilkS) (width 0.03)) 11 | (fp_line (start -1 1.25) (end 1 1.25) (layer F.SilkS) (width 0.03)) 12 | (fp_line (start 1 1.25) (end 1 -1.25) (layer F.SilkS) (width 0.03)) 13 | (fp_line (start 1 -1.25) (end -1 -1.25) (layer F.SilkS) (width 0.03)) 14 | (fp_circle (center -0.51 1.51) (end -0.451691 1.51) (layer F.SilkS) (width 0.03)) 15 | (pad 5 smd rect (at 0 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 16 | (pad 6 smd rect (at -0.5 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 17 | (pad 4 smd rect (at 0.51 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 18 | (pad 1 smd rect (at -0.5 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 19 | (pad 2 smd rect (at 0 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 20 | (pad 3 smd rect (at 0.5 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask)) 21 | (pad 7 smd rect (at 0 0 90) (size 0.61 1.42) (layers F.Cu F.Paste F.Mask)) 22 | ) 23 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MIC47050/MIC47050.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/MIC47050/MIC47050.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # MIC47050 5 | # 6 | DEF MIC47050 U 0 10 Y Y 1 F N 7 | F0 "U" 250 100 60 H V C CNN 8 | F1 "MIC47050" 500 -500 49 H V C CNN 9 | F2 "21-0137I_T633-2" 450 -600 60 H I C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | DRAW 12 | X BIAS 1 0 -200 197 R 49 49 1 0 W 13 | X GND 2 0 -300 197 R 49 49 1 0 W 14 | X IN 3 0 0 197 R 49 49 1 0 W 15 | X OUT 4 950 0 197 L 49 49 1 0 w 16 | X PGOOD 5 950 -150 197 L 49 49 1 0 O 17 | X EN 6 0 -100 197 R 49 49 1 0 I 18 | X GND 7 0 -300 197 R 49 49 1 0 W 19 | S 200 50 750 -350 0 1 0 N 20 | ENDDRAW 21 | ENDDEF 22 | # 23 | #End Library 24 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/U.FL-COAX.kicad_mod: -------------------------------------------------------------------------------- 1 | (module U.FL-COAX (layer F.Cu) (tedit 59ED286E) 2 | (attr smd) 3 | (fp_text reference U.FL-COAX (at 0 2.54) (layer F.SilkS) 4 | (effects (font (size 0.762 0.762) (thickness 0.1524))) 5 | ) 6 | (fp_text value VAL** (at 0 0) (layer F.SilkS) hide 7 | (effects (font (size 0.762 0.762) (thickness 0.1524))) 8 | ) 9 | (fp_line (start 1.1 0.3) (end 1.1 -0.3) (layer F.SilkS) (width 0.2032)) 10 | (fp_line (start 1.5 0.3) (end 1 0.3) (layer F.SilkS) (width 0.2032)) 11 | (fp_line (start 1.5 0.3) (end 1.5 -0.3) (layer F.SilkS) (width 0.2032)) 12 | (fp_line (start 1.5 -0.3) (end 1 -0.3) (layer F.SilkS) (width 0.2032)) 13 | (fp_circle (center 0 0) (end 0.2 0) (layer F.SilkS) (width 0.2032)) 14 | (fp_circle (center 0 0) (end 1 0) (layer F.SilkS) (width 0.2032)) 15 | (fp_line (start -1.3 -1.3) (end -1.3 1.3) (layer F.SilkS) (width 0.2032)) 16 | (fp_line (start -1.3 1.3) (end 1.3 1.3) (layer F.SilkS) (width 0.2032)) 17 | (fp_line (start 1.3 1.3) (end 1.3 -1.3) (layer F.SilkS) (width 0.2032)) 18 | (fp_line (start 1.3 -1.3) (end -1.3 -1.3) (layer F.SilkS) (width 0.2032)) 19 | (pad 1 smd rect (at -1.5 0) (size 1 1) (layers F.Cu F.Paste F.Mask)) 20 | (pad 2 smd rect (at 0 -1.5) (size 2.2 1) (layers F.Cu F.Paste F.Mask)) 21 | (pad 2 smd rect (at 0 1.5) (size 2.2 1) (layers F.Cu F.Paste F.Mask)) 22 | ) 23 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/c_0201_least.kicad_mod: -------------------------------------------------------------------------------- 1 | (module c_0201_least (layer F.Cu) (tedit 58881732) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference REF** (at -0.1 -0.5) (layer F.SilkS) 5 | (effects (font (size 0.25 0.25) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at -0.1 0.5) (layer F.Fab) 8 | (effects (font (size 0.25 0.25) (thickness 0.05))) 9 | ) 10 | (fp_line (start -0.6 0.3) (end -0.6 -0.3) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 0.6 0.3) (end -0.6 0.3) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 0.6 -0.3) (end 0.6 0.3) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -0.6 -0.3) (end 0.6 -0.3) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 16 | (model Capacitors_SMD.3dshapes/C_0201.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/c_0201_nom.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SMT:c_0201_nom (layer F.Cu) (tedit 58880D6C) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference 0201 (at -0.3 0.5) (layer F.SilkS) 5 | (effects (font (size 0.25 0.25) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at -0.2 -0.5) (layer F.SilkS) 8 | (effects (font (size 0.25 0.25) (thickness 0.05))) 9 | ) 10 | (fp_line (start -0.7 0.3) (end -0.7 -0.3) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 0.7 0.3) (end -0.7 0.3) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 0.7 -0.3) (end 0.7 0.3) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -0.7 -0.3) (end 0.7 -0.3) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.33 0) (size 0.46 0.42) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.33 0) (size 0.46 0.42) (layers F.Cu F.Paste F.Mask)) 16 | (model Capacitors_SMD.3dshapes/C_0201.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/c_0402.kicad_mod: -------------------------------------------------------------------------------- 1 | (module c_0402 (layer F.Cu) (tedit 58897D18) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference REF** (at -0.5 0.7) (layer F.SilkS) 5 | (effects (font (size 0.25 0.25) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at -0.5 -0.7) (layer F.Fab) hide 8 | (effects (font (size 0.25 0.25) (thickness 0.05))) 9 | ) 10 | (fp_line (start -1 0.5) (end -1 -0.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 1 0.5) (end -1 0.5) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 1 -0.5) (end 1 0.5) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -1 -0.5) (end 1 -0.5) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 16 | (model Capacitors_SMD.3dshapes/C_0402.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/r_0201_least.kicad_mod: -------------------------------------------------------------------------------- 1 | (module r_0201_least (layer F.Cu) (tedit 58881732) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference REF** (at -0.1 -0.5) (layer F.SilkS) 5 | (effects (font (size 0.25 0.25) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at -0.1 0.5) (layer F.Fab) 8 | (effects (font (size 0.25 0.25) (thickness 0.05))) 9 | ) 10 | (fp_line (start -0.6 0.3) (end -0.6 -0.3) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 0.6 0.3) (end -0.6 0.3) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 0.6 -0.3) (end 0.6 0.3) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -0.6 -0.3) (end 0.6 -0.3) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 16 | (model Resistors_SMD.3dshapes/R_0201.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/SMT/r_0402.kicad_mod: -------------------------------------------------------------------------------- 1 | (module r_0402 (layer F.Cu) (tedit 58897D18) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference REF** (at -0.5 0.7) (layer F.SilkS) 5 | (effects (font (size 0.25 0.25) (thickness 0.05))) 6 | ) 7 | (fp_text value VAL** (at -0.5 -0.7) (layer F.Fab) hide 8 | (effects (font (size 0.25 0.25) (thickness 0.05))) 9 | ) 10 | (fp_line (start -1 0.5) (end -1 -0.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 1 0.5) (end -1 0.5) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 1 -0.5) (end 1 0.5) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -1 -0.5) (end 1 -0.5) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 16 | (model Resistors_SMD.3dshapes/R_0402.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/TS3L110.pretty/TS3L110.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/TS3L110.pretty/TS3L110.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # TS3L110_RGY_16 5 | # 6 | DEF TS3L110_RGY_16 U 0 10 Y Y 1 F N 7 | F0 "U" 400 250 60 H V C CNN 8 | F1 "TS3L110_RGY_16" 650 -900 60 H V C CNN 9 | F2 "RGY16_2P55X2P05" 700 -1000 60 H I C CNN 10 | F3 "" 0 0 60 H V C CNN 11 | $FPLIST 12 | RGY16_2P55X2P05 13 | $ENDFPLIST 14 | DRAW 15 | X S 1 0 -300 300 R 50 50 1 0 U 16 | X IA0 2 1150 150 300 L 50 50 1 0 U 17 | X IA1 3 1150 -300 300 L 50 50 1 0 U 18 | X YA 4 0 150 300 R 50 50 1 0 U 19 | X IB0 5 1150 50 300 L 50 50 1 0 U 20 | X IB1 6 1150 -400 300 L 50 50 1 0 U 21 | X YB 7 0 50 300 R 50 50 1 0 U 22 | X GND 8 0 -750 300 R 50 50 1 0 U 23 | X YC 9 0 -50 300 R 50 50 1 0 U 24 | X IC1 10 1150 -500 300 L 50 50 1 0 U 25 | X IC0 11 1150 -50 300 L 50 50 1 0 U 26 | X YD 12 0 -150 300 R 50 50 1 0 U 27 | X ID1 13 1150 -600 300 L 50 50 1 0 U 28 | X ID0 14 1150 -150 300 L 50 50 1 0 U 29 | X *E 15 0 -400 300 R 50 50 1 0 U 30 | X VCC 16 0 -550 300 R 50 50 1 0 U 31 | X EPAD 17 0 -650 300 R 50 50 1 0 U 32 | S 300 200 850 -850 0 1 0 N 33 | ENDDRAW 34 | ENDDEF 35 | # 36 | #End Library 37 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/W25Q/W25Q.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/W25Q/W25Q.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 2 | #encoding utf-8 3 | # 4 | # N25Q032A11EF440 5 | # 6 | DEF N25Q032A11EF440 U 0 40 Y Y 1 F N 7 | F0 "U" -150 100 50 H V L CNN 8 | F1 "N25Q032A11EF440" -300 -400 50 H V L CNN 9 | F2 "" -350 -50 50 H V C CNN 10 | F3 "" -350 -50 50 H V C CNN 11 | DRAW 12 | S -200 50 250 -350 0 1 0 N 13 | X ~CS 1 -300 -100 100 R 50 50 1 1 I 14 | X DO/DQ1 2 350 -100 100 L 50 50 1 1 O 15 | X DQ2 3 350 -200 100 L 50 50 1 1 O 16 | X GND 4 -300 -300 100 R 50 50 1 1 W 17 | X DI/DQ0 5 350 0 100 L 50 50 1 1 O 18 | X SCK 6 -300 -200 100 R 50 50 1 1 I C 19 | X DQ3 7 350 -300 100 L 50 50 1 1 O 20 | X Vcc 8 -300 0 100 R 50 50 1 1 W 21 | ENDDRAW 22 | ENDDEF 23 | # 24 | # W25Q 25 | # 26 | DEF W25Q U 0 40 Y Y 1 F N 27 | F0 "U" -150 100 50 H V L CNN 28 | F1 "W25Q" -300 -400 50 H V L CNN 29 | F2 "" -350 -50 50 H V C CNN 30 | F3 "" -350 -50 50 H V C CNN 31 | DRAW 32 | S -200 50 400 -350 0 1 0 N 33 | X ~CS 1 -300 -100 100 R 50 50 1 1 I 34 | X DO/DQ1 2 500 -100 100 L 50 50 1 1 O 35 | X DQ2 3 500 -200 100 L 50 50 1 1 O 36 | X GND 4 -300 -300 100 R 50 50 1 1 W 37 | X DI/DQ0 5 500 0 100 L 50 50 1 1 O 38 | X SCK 6 -300 -200 100 R 50 50 1 1 I C 39 | X DQ3 7 500 -300 100 L 50 50 1 1 O 40 | X Vcc 8 -300 0 100 R 50 50 1 1 W 41 | X GND 9 100 -450 100 U 50 50 1 1 W 42 | ENDDRAW 43 | ENDDEF 44 | # 45 | #End Library 46 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/XC7A50T-CSG325/xc7a50t-bga325.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/conn/pico-ezmate-6.kicad_mod: -------------------------------------------------------------------------------- 1 | (module pico-ezmate-6 (layer F.Cu) (tedit 588E588E) 2 | (fp_text reference REF** (at 0.825 7.375) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value VAL** (at 1.075 4.2) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 4.5 2.5) (end -4.5 2.5) (layer F.SilkS) (width 0.05)) 9 | (fp_line (start 4.5 -2.5) (end 4.5 2.5) (layer F.SilkS) (width 0.05)) 10 | (fp_line (start -4.5 -2.5) (end 4.5 -2.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start -4.5 2.5) (end -4.5 -2.5) (layer F.SilkS) (width 0.05)) 12 | (pad 3 smd rect (at -0.6 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 13 | (pad 4 smd rect (at 0.6 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 14 | (pad 5 smd rect (at 1.8 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 15 | (pad 1 smd rect (at -3 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 16 | (pad 2 smd rect (at -1.8 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 17 | (pad 6 smd rect (at 3 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 18 | (pad P smd rect (at -4.15 1.8875) (size 0.7 0.8) (layers F.Cu F.Paste F.Mask)) 19 | (pad P smd rect (at 4.15 2) (size 0.7 0.8) (layers F.Cu F.Paste F.Mask)) 20 | ) 21 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/C_0201.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Capacitors_SMD:C_0201 (layer F.Cu) (tedit 5415D524) 2 | (descr "Capacitor SMD 0201, reflow soldering, AVX (see smccp.pdf)") 3 | (tags "capacitor 0201") 4 | (attr smd) 5 | (fp_text reference C25 (at 0.01 -0.8) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value 0.1uf (at 0 1.7) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -0.3 0.15) (end -0.3 -0.15) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 0.3 0.15) (end -0.3 0.15) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 0.3 -0.15) (end 0.3 0.15) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -0.3 -0.15) (end 0.3 -0.15) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -0.7 -0.55) (end 0.7 -0.55) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -0.7 0.55) (end 0.7 0.55) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -0.7 -0.55) (end -0.7 0.55) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start 0.7 -0.55) (end 0.7 0.55) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 0.25 0.4) (end -0.25 0.4) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -0.25 -0.4) (end 0.25 -0.4) (layer F.SilkS) (width 0.12)) 21 | (pad 1 smd rect (at -0.275 0) (size 0.3 0.35) (layers F.Cu F.Paste F.Mask)) 22 | (pad 2 smd rect (at 0.275 0) (size 0.3 0.35) (layers F.Cu F.Paste F.Mask)) 23 | (model Capacitors_SMD.3dshapes/C_0201.wrl 24 | (at (xyz 0 0 0)) 25 | (scale (xyz 1 1 1)) 26 | (rotate (xyz 0 0 0)) 27 | ) 28 | ) 29 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/C_0603.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5415D631) 2 | (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)") 3 | (tags "capacitor 0603") 4 | (attr smd) 5 | (fp_text reference C3 (at 1.39 0.34 90) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value 47uf (at 0 1.9) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) 21 | (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)) 22 | (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)) 23 | (model Capacitors_SMD.3dshapes/C_0603.wrl 24 | (at (xyz 0 0 0)) 25 | (scale (xyz 1 1 1)) 26 | (rotate (xyz 0 0 0)) 27 | ) 28 | ) 29 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/C_0805.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5415D6EA) 2 | (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)") 3 | (tags "capacitor 0805") 4 | (attr smd) 5 | (fp_text reference C91 (at -0.02 1.21) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value 100uf (at 0 2.1) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) 14 | (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.12)) 20 | (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.12)) 21 | (pad 1 smd rect (at -1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)) 22 | (pad 2 smd rect (at 1 0) (size 1 1.25) (layers F.Cu F.Paste F.Mask)) 23 | (model Capacitors_SMD.3dshapes/C_0805.wrl 24 | (at (xyz 0 0 0)) 25 | (scale (xyz 1 1 1)) 26 | (rotate (xyz 0 0 0)) 27 | ) 28 | ) 29 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/Crystal_SMD_3225-4pin_3.2x2.5mm.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Crystal_SMD_3225-4pin_3.2x2.5mm locked (layer F.Cu) (tedit 58EA700C) 2 | (descr "SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package") 3 | (tags "SMD SMT crystal") 4 | (attr smd) 5 | (fp_text reference Y1 (at 2.53 0.45 90) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value 12MHZ (at 0 2.45) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -1.6 -1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) 12 | (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 1.6 -1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1)) 16 | (fp_line (start -2 -1.65) (end -2 1.65) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -2 1.65) (end 2 1.65) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -2.1 1.7) (end 2.1 1.7) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start 2.1 -1.7) (end -2.1 -1.7) (layer F.CrtYd) (width 0.05)) 22 | (pad 1 smd rect (at -1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) 23 | (pad 2 smd rect (at 1.1 0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) 24 | (pad 3 smd rect (at 1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) 25 | (pad 4 smd rect (at -1.1 -0.85) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)) 26 | (model Crystals.3dshapes/Crystal_SMD_3225-4pin_3.2x2.5mm.wrl 27 | (at (xyz 0 0 0)) 28 | (scale (xyz 1 1 1)) 29 | (rotate (xyz 0 0 0)) 30 | ) 31 | ) 32 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/Fiducial_1mm_Dia_2.54mm_Outer_CopperBottom.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Fiducials:Fiducial_1mm_Dia_2.54mm_Outer_CopperBottom (layer F.Cu) (tedit 588EBA9C) 2 | (descr "Circular Fiducial, 1mm bare copper bottom; 2.54mm keepout") 3 | (tags marker) 4 | (attr virtual) 5 | (fp_text reference REF** (at 0.17 -2.31) (layer F.SilkS) hide 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value Fiducial_1mm_Dia_2.54mm_Outer_CopperBottom (at 0 -1.8) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_circle (center 0 0) (end 1.55 0) (layer B.CrtYd) (width 0.05)) 12 | (pad ~ smd circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) 13 | (solder_mask_margin 0.77) (clearance 0.77)) 14 | ) 15 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/Fiducial_1mm_Dia_2.54mm_Outer_CopperTop.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Fiducials:Fiducial_1mm_Dia_2.54mm_Outer_CopperTop (layer F.Cu) (tedit 588EBAC9) 2 | (descr "Circular Fiducial, 1mm bare copper top; 2.54mm keepout") 3 | (tags marker) 4 | (attr virtual) 5 | (fp_text reference REF** (at 3.4 0.7) (layer F.SilkS) hide 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value Fiducial_1mm_Dia_2.54mm_Outer_CopperTop (at 0 -1.8) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_circle (center 0 0) (end 1.55 0) (layer F.CrtYd) (width 0.05)) 12 | (pad ~ smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) 13 | (solder_mask_margin 0.77) (clearance 0.77)) 14 | ) 15 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/LED_0402.kicad_mod: -------------------------------------------------------------------------------- 1 | (module LEDs:LED_0402 (layer F.Cu) (tedit 588ABBEA) 2 | (descr "LED 0402 smd package") 3 | (tags "LED led 0402 SMD smd SMT smt smdled SMDLED smtled SMTLED") 4 | (attr smd) 5 | (fp_text reference D1 (at -1.33 -0.34) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value BUSY (at -2.3 -0.345) (layer F.SilkS) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -0.95 -0.45) (end -0.95 0.45) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start -0.15 -0.2) (end -0.15 0.2) (layer F.Fab) (width 0.1)) 13 | (fp_line (start -0.15 0) (end 0.15 -0.2) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 0.15 0.2) (end -0.15 0) (layer F.Fab) (width 0.1)) 15 | (fp_line (start 0.15 -0.2) (end 0.15 0.2) (layer F.Fab) (width 0.1)) 16 | (fp_line (start 0.5 0.25) (end -0.5 0.25) (layer F.Fab) (width 0.1)) 17 | (fp_line (start 0.5 -0.25) (end 0.5 0.25) (layer F.Fab) (width 0.1)) 18 | (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -0.95 0.45) (end 0.5 0.45) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start -0.95 -0.45) (end 0.5 -0.45) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start 1 -0.5) (end 1 0.5) (layer F.CrtYd) (width 0.05)) 23 | (fp_line (start 1 0.5) (end -1 0.5) (layer F.CrtYd) (width 0.05)) 24 | (fp_line (start -1 0.5) (end -1 -0.5) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start -1 -0.5) (end 1 -0.5) (layer F.CrtYd) (width 0.05)) 26 | (pad 2 smd rect (at 0.55 0 180) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 27 | (pad 1 smd rect (at -0.55 0 180) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 28 | (model LEDs.3dshapes/LED_0402.wrl 29 | (at (xyz 0 0 0)) 30 | (scale (xyz 1 1 1)) 31 | (rotate (xyz 0 0 180)) 32 | ) 33 | ) 34 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/MAX1589AETT100T.kicad_mod: -------------------------------------------------------------------------------- 1 | (module MAX1589A:MAX1589AETT100T (layer F.Cu) (tedit 588FF899) 2 | (fp_text reference U4 (at -0.67 1.83) (layer F.SilkS) 3 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 4 | ) 5 | (fp_text value MAX1589AETT250T (at 1.8 3.6) (layer F.SilkS) hide 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 8.43 3.23) (layer Cmts.User) hide 9 | (effects (font (size 0.3 0.3) (thickness 0.075))) 10 | ) 11 | (fp_line (start -1.5494 1.5494) (end 1.5494 1.5494) (layer F.SilkS) (width 0.1524)) 12 | (fp_line (start 1.5494 -1.5494) (end -1.5494 -1.5494) (layer F.SilkS) (width 0.1524)) 13 | (fp_line (start -1.5494 1.5494) (end 1.5494 1.5494) (layer Dwgs.User) (width 0.1524)) 14 | (fp_line (start 1.5494 1.5494) (end 1.5494 -1.5494) (layer Dwgs.User) (width 0.1524)) 15 | (fp_line (start 1.5494 -1.5494) (end -1.5494 -1.5494) (layer Dwgs.User) (width 0.1524)) 16 | (fp_line (start -1.5494 -1.5494) (end -1.5494 1.5494) (layer Dwgs.User) (width 0.1524)) 17 | (fp_arc (start 0 -1.5494) (end 0.3048 -1.5494) (angle 180) (layer Dwgs.User) (width 0.1524)) 18 | (pad 1 smd rect (at -1.5018 -0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 19 | (pad 2 smd rect (at -1.5018 0) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 20 | (pad 3 smd rect (at -1.5018 0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 21 | (pad 4 smd rect (at 1.5018 0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 22 | (pad 5 smd rect (at 1.5018 0) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 23 | (pad 6 smd rect (at 1.5018 -0.9398) (size 0.7048 0.4572) (layers F.Cu F.Paste F.Mask)) 24 | (pad 7 smd rect (at 0 0) (size 1.6002 2.3876) (layers F.Cu F.Paste F.Mask)) 25 | (pad 7 smd rect (at 0 0) (size 0.0254 0.0254) (layers F.Paste)) 26 | ) 27 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/MIC47050-DFN-6-2MM.kicad_mod: -------------------------------------------------------------------------------- 1 | (module MIC47050:MIC47050-DFN-6-2MM (layer F.Cu) (tedit 5886C859) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference U5 (at -0.3 -1.85 270) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value MIC47050 (at 0.2 -1.8) (layer F.SilkS) hide 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start -1 -1.25) (end -1 1.25) (layer F.SilkS) (width 0.03)) 11 | (fp_line (start -1 1.25) (end 1 1.25) (layer F.SilkS) (width 0.03)) 12 | (fp_line (start 1 1.25) (end 1 -1.25) (layer F.SilkS) (width 0.03)) 13 | (fp_line (start 1 -1.25) (end -1 -1.25) (layer F.SilkS) (width 0.03)) 14 | (fp_circle (center -0.51 1.51) (end -0.451691 1.51) (layer F.SilkS) (width 0.03)) 15 | (pad 5 smd rect (at 0 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 16 | (solder_mask_margin 0.2)) 17 | (pad 6 smd rect (at -0.5 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 18 | (solder_mask_margin 0.2)) 19 | (pad 4 smd rect (at 0.51 -0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 20 | (solder_mask_margin 0.2)) 21 | (pad 1 smd rect (at -0.5 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 22 | (solder_mask_margin 0.2)) 23 | (pad 2 smd rect (at 0 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 24 | (solder_mask_margin 0.2)) 25 | (pad 3 smd rect (at 0.5 0.91 90) (size 0.675 0.25) (layers F.Cu F.Paste F.Mask) 26 | (solder_mask_margin 0.2)) 27 | (pad 7 smd rect (at 0 0 90) (size 0.61 1.42) (layers F.Cu F.Paste F.Mask) 28 | (solder_mask_margin 0.2)) 29 | ) 30 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/SC-70.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TO_SOT_Packages_SMD:SC-70 (layer F.Cu) (tedit 56EA2234) 2 | (descr "SC70 SOT323") 3 | (attr smd) 4 | (fp_text reference D11 (at 0.77 -0.84) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value SP0502BAJT (at 0 2.4) (layer F.Fab) 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start 1.3 -1.7) (end 1.3 1.7) (layer F.CrtYd) (width 0.05)) 11 | (fp_line (start -1.3 -1.7) (end 1.3 -1.7) (layer F.CrtYd) (width 0.05)) 12 | (fp_line (start -1.3 1.7) (end -1.3 -1.7) (layer F.CrtYd) (width 0.05)) 13 | (fp_line (start 1.3 1.7) (end -1.3 1.7) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start -1.1 -0.55) (end -1.1 0.55) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start -1.1 0.55) (end 1.1 0.55) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start 1.1 0.55) (end 1.1 -0.55) (layer F.SilkS) (width 0.15)) 17 | (fp_line (start 1.1 -0.55) (end -1.05 -0.55) (layer F.SilkS) (width 0.15)) 18 | (fp_line (start -1.05 -0.55) (end -1.1 -0.55) (layer F.SilkS) (width 0.15)) 19 | (pad 1 smd rect (at -0.6604 1.016) (size 0.4572 0.7112) (layers F.Cu F.Paste F.Mask)) 20 | (pad 2 smd rect (at 0.6604 1.016) (size 0.4572 0.7112) (layers F.Cu F.Paste F.Mask)) 21 | (pad 3 smd rect (at 0 -1.016) (size 0.4572 0.7112) (layers F.Cu F.Paste F.Mask)) 22 | (model TO_SOT_Packages_SMD.3dshapes/SC-70.wrl 23 | (at (xyz 0 0 0)) 24 | (scale (xyz 1 1 1)) 25 | (rotate (xyz 0 0 0)) 26 | ) 27 | ) 28 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/SOIC-8_3.9x4.9mm_Pitch1.27mm.kicad_mod: -------------------------------------------------------------------------------- 1 | (module Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm locked (layer F.Cu) (tedit 54130A77) 2 | (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)") 3 | (tags "SOIC 1.27") 4 | (attr smd) 5 | (fp_text reference U2 (at 1.46 -2.9) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value W25Q32JVSSIQ (at 0 3.5) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -0.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.15)) 12 | (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.15)) 13 | (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.15)) 14 | (fp_line (start -1.95 2.45) (end -1.95 -1.45) (layer F.Fab) (width 0.15)) 15 | (fp_line (start -1.95 -1.45) (end -0.95 -2.45) (layer F.Fab) (width 0.15)) 16 | (fp_line (start -3.75 -2.75) (end -3.75 2.75) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 3.75 -2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -3.75 -2.75) (end 3.75 -2.75) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start -3.75 2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start -2.075 -2.575) (end -2.075 -2.525) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start 2.075 2.575) (end 2.075 2.43) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start -2.075 2.575) (end -2.075 2.43) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start -2.075 2.575) (end 2.075 2.575) (layer F.SilkS) (width 0.15)) 26 | (fp_line (start -2.075 -2.525) (end -3.475 -2.525) (layer F.SilkS) (width 0.15)) 27 | (pad 1 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 28 | (pad 2 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 29 | (pad 3 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 30 | (pad 4 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 31 | (pad 5 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 32 | (pad 6 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 33 | (pad 7 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 34 | (pad 8 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)) 35 | (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl 36 | (at (xyz 0 0 0)) 37 | (scale (xyz 1 1 1)) 38 | (rotate (xyz 0 0 0)) 39 | ) 40 | ) 41 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/SOT-23-6.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TO_SOT_Packages_SMD:SOT-23-6 locked (layer F.Cu) (tedit 5882E204) 2 | (descr "6-pin SOT-23 package") 3 | (tags SOT-23-6) 4 | (attr smd) 5 | (fp_text reference U7 (at -1.39 -2.01 90) (layer F.SilkS) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text value 93LC46B-SOT23 (at 0 2.9) (layer F.Fab) 9 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 10 | ) 11 | (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) 12 | (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) 13 | (fp_line (start 1.9 -1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start 1.9 1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start -1.9 1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -1.9 -1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 0.9 -1.55) (end -0.9 -1.55) (layer F.Fab) (width 0.15)) 18 | (fp_line (start -0.9 -1.55) (end -0.9 1.55) (layer F.Fab) (width 0.15)) 19 | (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.15)) 20 | (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.15)) 21 | (pad 1 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 22 | (pad 2 smd rect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 23 | (pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 24 | (pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 25 | (pad 6 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 26 | (pad 5 smd rect (at 1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) 27 | (model TO_SOT_Packages_SMD.3dshapes/SOT-23-6.wrl 28 | (at (xyz 0 0 0)) 29 | (scale (xyz 1 1 1)) 30 | (rotate (xyz 0 0 0)) 31 | ) 32 | ) 33 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/TPS82084SILR.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TPS82084SILR (layer F.Cu) (tedit 58EA71E5) 2 | (fp_text reference U6 (at 0.98 1.85) (layer F.SilkS) 3 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 4 | ) 5 | (fp_text value TPS82084SIL (at 0.2 -2.4) (layer F.SilkS) hide 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User) hide 9 | (effects (font (size 0.3 0.3) (thickness 0.075))) 10 | ) 11 | (fp_line (start -1.549999 -1.45) (end -1.549999 -1.649999) (layer F.SilkS) (width 0.1524)) 12 | (fp_line (start -1.549999 -1.649999) (end -1.000001 -1.649999) (layer F.SilkS) (width 0.1524)) 13 | (fp_line (start 1.549999 -1.45) (end 1.549999 -1.649999) (layer F.SilkS) (width 0.1524)) 14 | (fp_line (start 1.35 -1.649999) (end 1.549999 -1.649999) (layer F.SilkS) (width 0.1524)) 15 | (fp_line (start 1.35 1.649999) (end 1.549999 1.649999) (layer F.SilkS) (width 0.1524)) 16 | (fp_line (start 1.549999 1.649999) (end 1.549999 1.45) (layer F.SilkS) (width 0.1524)) 17 | (fp_line (start -1.549999 1.649999) (end -1.35 1.649999) (layer F.SilkS) (width 0.1524)) 18 | (fp_line (start -1.549999 1.649999) (end -1.549999 1.45) (layer F.SilkS) (width 0.1524)) 19 | (fp_line (start -1.45 1.549999) (end 1.45 1.549999) (layer Dwgs.User) (width 0.1524)) 20 | (fp_line (start -1.45 -1.549999) (end 1.45 -1.549999) (layer Dwgs.User) (width 0.1524)) 21 | (fp_line (start 1.45 1.549999) (end 1.45 -1.549999) (layer Dwgs.User) (width 0.1524)) 22 | (fp_line (start -1.45 1.549999) (end -1.45 -1.549999) (layer Dwgs.User) (width 0.1524)) 23 | (fp_circle (center -0.950001 0.974999) (end -0.748444 0.974999) (layer Dwgs.User) (width 0.1524)) 24 | (pad 1 smd rect (at -1.1 -0.974999) (size 0.599999 0.499999) (layers F.Cu)) 25 | (pad 1 smd rect (at -1.1 -0.974999) (size 0.499999 0.399999) (layers F.Mask)) 26 | (pad 1 smd rect (at -1.1 -0.974999) (size 0.499999 0.399999) (layers F.Paste)) 27 | (pad 2 smd rect (at -1.1 -0.325001) (size 0.599999 0.499999) (layers F.Cu)) 28 | (pad 2 smd rect (at -1.1 -0.325001) (size 0.499999 0.399999) (layers F.Mask)) 29 | (pad 2 smd rect (at -1.1 -0.325001) (size 0.499999 0.399999) (layers F.Paste)) 30 | (pad 3 smd rect (at -1.1 0.325001) (size 0.599999 0.499999) (layers F.Cu)) 31 | (pad 3 smd rect (at -1.1 0.325001) (size 0.499999 0.399999) (layers F.Mask)) 32 | (pad 3 smd rect (at -1.1 0.325001) (size 0.499999 0.399999) (layers F.Paste)) 33 | (pad 4 smd rect (at -1.1 0.974999) (size 0.599999 0.499999) (layers F.Cu)) 34 | (pad 4 smd rect (at -1.1 0.974999) (size 0.499999 0.399999) (layers F.Mask)) 35 | (pad 4 smd rect (at -1.1 0.974999) (size 0.499999 0.399999) (layers F.Paste)) 36 | (pad 5 smd rect (at 1.1 0.974999) (size 0.599999 0.499999) (layers F.Cu)) 37 | (pad 5 smd rect (at 1.1 0.974999) (size 0.499999 0.399999) (layers F.Mask)) 38 | (pad 5 smd rect (at 1.1 0.974999) (size 0.499999 0.399999) (layers F.Paste)) 39 | (pad 6 smd rect (at 1.1 0.325001) (size 0.599999 0.499999) (layers F.Cu)) 40 | (pad 6 smd rect (at 1.1 0.325001) (size 0.499999 0.399999) (layers F.Mask)) 41 | (pad 6 smd rect (at 1.1 0.325001) (size 0.499999 0.399999) (layers F.Paste)) 42 | (pad 7 smd rect (at 1.1 -0.325001) (size 0.599999 0.499999) (layers F.Cu)) 43 | (pad 7 smd rect (at 1.1 -0.325001) (size 0.499999 0.399999) (layers F.Mask)) 44 | (pad 7 smd rect (at 1.1 -0.325001) (size 0.499999 0.399999) (layers F.Paste)) 45 | (pad 8 smd rect (at 1.1 -0.974999) (size 0.599999 0.499999) (layers F.Cu)) 46 | (pad 8 smd rect (at 1.1 -0.974999) (size 0.499999 0.399999) (layers F.Mask)) 47 | (pad 8 smd rect (at 1.1 -0.974999) (size 0.499999 0.399999) (layers F.Paste)) 48 | (pad 9 smd rect (at 0 0) (size 1.2 2.000001) (layers F.Cu)) 49 | (pad 9 smd rect (at 0 0) (size 1.1 1.900001) (layers F.Paste F.Mask)) 50 | (pad 9 smd rect (at 0 0) (size 0.000003 0.800003) (layers F.Paste)) 51 | ) 52 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/c_0201_least.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SMT:c_0201_least (layer F.Cu) (tedit 58881732) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference C93 (at 0.26 -0.56) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value 0.47uf (at -0.1 0.5) (layer F.Fab) 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start -0.6 0.3) (end -0.6 -0.3) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 0.6 0.3) (end -0.6 0.3) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 0.6 -0.3) (end 0.6 0.3) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -0.6 -0.3) (end 0.6 -0.3) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 16 | (model Capacitors_SMD.3dshapes/C_0201.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/c_0402.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SMT:c_0402 (layer F.Cu) (tedit 58897D18) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference C1 (at -0.69 -0.73) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value 4.7uf (at -0.5 -0.7) (layer F.Fab) hide 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start -1 0.5) (end -1 -0.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 1 0.5) (end -1 0.5) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 1 -0.5) (end 1 0.5) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -1 -0.5) (end 1 -0.5) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 16 | (model Capacitors_SMD.3dshapes/C_0402.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/pico-ezmate-6.kicad_mod: -------------------------------------------------------------------------------- 1 | (module conn:pico-ezmate-6 (layer F.Cu) (tedit 588E588E) 2 | (fp_text reference P1 (at 4.83 -2.3275) (layer F.SilkS) 3 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 4 | ) 5 | (fp_text value CONN_01X06 (at 1.075 4.2) (layer F.Fab) 6 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 7 | ) 8 | (fp_line (start 4.5 2.5) (end -4.5 2.5) (layer F.SilkS) (width 0.05)) 9 | (fp_line (start 4.5 -2.5) (end 4.5 2.5) (layer F.SilkS) (width 0.05)) 10 | (fp_line (start -4.5 -2.5) (end 4.5 -2.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start -4.5 2.5) (end -4.5 -2.5) (layer F.SilkS) (width 0.05)) 12 | (pad 3 smd rect (at -0.6 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 13 | (pad 4 smd rect (at 0.6 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 14 | (pad 5 smd rect (at 1.8 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 15 | (pad 1 smd rect (at -3 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 16 | (pad 2 smd rect (at -1.8 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 17 | (pad 6 smd rect (at 3 -1.8875) (size 0.6 0.85) (layers F.Cu F.Paste F.Mask)) 18 | (pad P smd rect (at -4.15 1.8875) (size 0.7 0.8) (layers F.Cu F.Paste F.Mask)) 19 | (pad P smd rect (at 4.15 2) (size 0.7 0.8) (layers F.Cu F.Paste F.Mask)) 20 | ) 21 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/r_0201_least.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SMT:r_0201_least (layer F.Cu) (tedit 58881732) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference R14 (at -0.28 -0.49) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value DNI (at -0.1 0.5) (layer F.Fab) 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start -0.6 0.3) (end -0.6 -0.3) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 0.6 0.3) (end -0.6 0.3) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 0.6 -0.3) (end 0.6 0.3) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -0.6 -0.3) (end 0.6 -0.3) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.28 0) (size 0.36 0.32) (layers F.Cu F.Paste F.Mask)) 16 | (model Resistors_SMD.3dshapes/R_0201.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/fp_archive.pretty/r_0402.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SMT:r_0402 (layer F.Cu) (tedit 58897D18) 2 | (solder_mask_margin 0.1) 3 | (attr smd) 4 | (fp_text reference R1 (at -1.3 0.325) (layer F.SilkS) 5 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 6 | ) 7 | (fp_text value 4.7K (at -0.5 -0.7) (layer F.Fab) hide 8 | (effects (font (size 0.381 0.381) (thickness 0.0762))) 9 | ) 10 | (fp_line (start -1 0.5) (end -1 -0.5) (layer F.SilkS) (width 0.05)) 11 | (fp_line (start 1 0.5) (end -1 0.5) (layer F.SilkS) (width 0.05)) 12 | (fp_line (start 1 -0.5) (end 1 0.5) (layer F.SilkS) (width 0.05)) 13 | (fp_line (start -1 -0.5) (end 1 -0.5) (layer F.SilkS) (width 0.05)) 14 | (pad 1 smd rect (at -0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 15 | (pad 2 smd rect (at 0.5 0) (size 0.6 0.7) (layers F.Cu F.Paste F.Mask)) 16 | (model Resistors_SMD.3dshapes/R_0402.wrl 17 | (at (xyz 0 0 0)) 18 | (scale (xyz 1 1 1)) 19 | (rotate (xyz 0 0 0)) 20 | ) 21 | ) 22 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/tps82084.pretty/TPS82084SILR.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TPS82084SILR (layer F.Cu) 2 | (fp_text reference REF** (at 0 0) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness .15))) 4 | ) 5 | (fp_text value SIL0008C_SMD (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness .15))) 7 | ) 8 | (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User) 9 | (effects (font (size .127 .127) (thickness .002))) 10 | ) 11 | (fp_line (start -1.549999 -1.45) (end -1.549999 -1.649999) (layer F.SilkS) (width .1524)) 12 | (fp_line (start -1.549999 -1.649999) (end -1.000001 -1.649999) (layer F.SilkS) (width .1524)) 13 | (fp_line (start 1.549999 -1.45) (end 1.549999 -1.649999) (layer F.SilkS) (width .1524)) 14 | (fp_line (start 1.35 -1.649999) (end 1.549999 -1.649999) (layer F.SilkS) (width .1524)) 15 | (fp_line (start 1.35 1.649999) (end 1.549999 1.649999) (layer F.SilkS) (width .1524)) 16 | (fp_line (start 1.549999 1.649999) (end 1.549999 1.45) (layer F.SilkS) (width .1524)) 17 | (fp_line (start -1.549999 1.649999) (end -1.35 1.649999) (layer F.SilkS) (width .1524)) 18 | (fp_line (start -1.549999 1.649999) (end -1.549999 1.45) (layer F.SilkS) (width .1524)) 19 | (fp_line (start -1.45 1.549999) (end 1.45 1.549999) (layer Dwgs.User) (width .1524)) 20 | (fp_line (start -1.45 -1.549999) (end 1.45 -1.549999) (layer Dwgs.User) (width .1524)) 21 | (fp_line (start 1.45 1.549999) (end 1.45 -1.549999) (layer Dwgs.User) (width .1524)) 22 | (fp_line (start -1.45 1.549999) (end -1.45 -1.549999) (layer Dwgs.User) (width .1524)) 23 | (fp_circle (center -.950001 .974999) (end -.748444 .974999) (layer Dwgs.User) (width .1524)) 24 | (pad 1 smd rect (at -1.1 -.974999) (size .599999 .499999) (layers F.Cu)) 25 | (pad 1 smd rect (at -1.1 -.974999) (size .499999 .399999) (layers F.Mask)) 26 | (pad 1 smd rect (at -1.1 -.974999) (size .499999 .399999) (layers F.Paste)) 27 | (pad 2 smd rect (at -1.1 -.325001) (size .599999 .499999) (layers F.Cu)) 28 | (pad 2 smd rect (at -1.1 -.325001) (size .499999 .399999) (layers F.Mask)) 29 | (pad 2 smd rect (at -1.1 -.325001) (size .499999 .399999) (layers F.Paste)) 30 | (pad 3 smd rect (at -1.1 .325001) (size .599999 .499999) (layers F.Cu)) 31 | (pad 3 smd rect (at -1.1 .325001) (size .499999 .399999) (layers F.Mask)) 32 | (pad 3 smd rect (at -1.1 .325001) (size .499999 .399999) (layers F.Paste)) 33 | (pad 4 smd rect (at -1.1 .974999) (size .599999 .499999) (layers F.Cu)) 34 | (pad 4 smd rect (at -1.1 .974999) (size .499999 .399999) (layers F.Mask)) 35 | (pad 4 smd rect (at -1.1 .974999) (size .499999 .399999) (layers F.Paste)) 36 | (pad 5 smd rect (at 1.1 .974999) (size .599999 .499999) (layers F.Cu)) 37 | (pad 5 smd rect (at 1.1 .974999) (size .499999 .399999) (layers F.Mask)) 38 | (pad 5 smd rect (at 1.1 .974999) (size .499999 .399999) (layers F.Paste)) 39 | (pad 6 smd rect (at 1.1 .325001) (size .599999 .499999) (layers F.Cu)) 40 | (pad 6 smd rect (at 1.1 .325001) (size .499999 .399999) (layers F.Mask)) 41 | (pad 6 smd rect (at 1.1 .325001) (size .499999 .399999) (layers F.Paste)) 42 | (pad 7 smd rect (at 1.1 -.325001) (size .599999 .499999) (layers F.Cu)) 43 | (pad 7 smd rect (at 1.1 -.325001) (size .499999 .399999) (layers F.Mask)) 44 | (pad 7 smd rect (at 1.1 -.325001) (size .499999 .399999) (layers F.Paste)) 45 | (pad 8 smd rect (at 1.1 -.974999) (size .599999 .499999) (layers F.Cu)) 46 | (pad 8 smd rect (at 1.1 -.974999) (size .499999 .399999) (layers F.Mask)) 47 | (pad 8 smd rect (at 1.1 -.974999) (size .499999 .399999) (layers F.Paste)) 48 | (pad 9 smd rect (at 0 0) (size 1.2 2.000001) (layers F.Cu)) 49 | (pad 9 smd rect (at 0 0) (size 1.1 1.900001) (layers F.Mask)) 50 | (pad 9 smd rect (at 0 0) (size .000003 .800003) (layers F.Paste)) 51 | (pad V thru_hole circle (at 0 -.750001) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 52 | (pad V thru_hole circle (at 0 -.750001) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 53 | (pad V thru_hole circle (at 0 -.750001) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 54 | (pad V thru_hole circle (at 0 -.750001) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 55 | (pad V thru_hole circle (at 0 .750001) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 56 | (pad V thru_hole circle (at 0 .750001) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 57 | (pad V thru_hole circle (at 0 .750001) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 58 | (pad V thru_hole circle (at 0 .750001) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 59 | (pad V thru_hole circle (at 0 0) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 60 | (pad V thru_hole circle (at 0 0) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 61 | (pad V thru_hole circle (at 0 0) (size .499999 .499999) (drill .2032) (layers *.Cu F.SilkS)) 62 | (pad V thru_hole circle (at 0 0) (size .499999 .499999) (drill .2032) (layers *.Mask F.SilkS)) 63 | ) 64 | -------------------------------------------------------------------------------- /Hardware/board_design/kicad_lib/tps82084.pretty/tps82084.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.3 Date: 21-02-2013 11:13:20 2 | #encoding utf-8 3 | # 4 | # TPS82084SIL 5 | # 6 | DEF TPS82084SIL U 0 10 Y Y 1 F N 7 | F0 "U" 0 100 60 H V C CNN 8 | F1 "TPS82084SIL" 0 0 60 H V C CNN 9 | F2 "SIL0008C_SMD" 0 -60 60 H I C CNN 10 | F3 "~" 0 0 60 H V C CNN 11 | $FPLIST 12 | SIL0008C_SMD 13 | SIL0008C_SMD_NV 14 | $ENDFPLIST 15 | DRAW 16 | X EN 1 -700 0 200 R 100 100 1 0 U 17 | X PG 2 700 -400 200 L 100 100 1 0 U 18 | X VIN 3 -700 400 200 R 100 100 1 0 U 19 | X VIN 4 -700 300 200 R 100 100 1 0 U 20 | X GND 5 -700 -200 200 R 100 100 1 0 U 21 | X GND 6 -700 -300 200 R 100 100 1 0 U 22 | X FB 7 700 0 200 L 100 100 1 0 U 23 | X VOUT 8 700 400 200 L 100 100 1 0 U 24 | X PAD 9 -700 -400 200 R 100 100 1 0 U 25 | P 2 0 0 8 -500 -600 500 -600 N 26 | P 2 0 0 8 500 -600 500 600 N 27 | P 2 0 0 8 500 600 -500 600 N 28 | P 2 0 0 8 -500 600 -500 -600 N 29 | ENDDRAW 30 | ENDDEF 31 | # 32 | #End Library 33 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # PicoEVB: M.2/NGFF based Xilinx Artix-7 development board 2 | 3 | PicoEVB is an affordable development board which can be used to evaluate and prototype 4 | PCI express designs using Xilinx Artix 7 FPGA on Windows or Linux hosts. 5 | The board is designed around the Artix 7 (XC7A50T). 6 | 7 | PicoEVB is a complete development system in a M.2 (NGFF) 2230 footprint. The JTAG cable 8 | and all necessary power supplies are built in. It will work in the following slots: 9 | 10 | - M.2 2230 Key A 11 | - M.2 2230 Key E 12 | - M.2 2280 Key M via an adapter [like this one](https://www.amazon.com/gp/product/B079NB8J3B) 13 | - Full length mini PCIe via an adapter [like this one](https://www.amazon.com/dp/B01MR76H5F) 14 | - PCIe x1, x4, x8, or x16 slot via an adapter [like this one](https://www.amazon.com/dp/B013U4401W) 15 | 16 | ## Features 17 | - PCI Express connection to the host via M.2 edge slot 18 | - Built-in JTAG cable works with Vivado and Labtools 19 | - Analog and digital IO 20 | 21 | ## Specifications 22 | 23 | | Feature | Specification | 24 | | --- | --- | 25 | | FPGA | Xilinx Artix XC7A50T-2CSG325C | 26 | | Form Factor | M.2 (NGFF), keyed for A and E slots | 27 | | Dimensions | 22x30x3.8 mm | 28 | | Host Interface | PCIe x1 gen 2 (5 Gb/s) | 29 | | Host Tools | Vivado 2017.3 preferred | 30 | | MGT Loopback | Yes | 31 | | Built-in JTAG | Yes | 32 | | External I/O configurations
via I/O connector | (digital+ differential analog)
4+0
2+1
0+2 | 33 | | External I/O via PCIe connector | 4x 3.3V digital I/O (configurable) | 34 | | External MGT connection | 1x MGT via U.FL connectors | 35 | | External clock ref | 1x clkin via U.FL connectors | 36 | | User-controllable LEDs | 3 | 37 | 38 | 39 | ## Block Diagram 40 | 41 | ![Block Diagram](./images/pico-d-diagram.png) 42 | 43 | ## How to get one 44 | 45 | - [Product Website](https://www.picoevb.com) 46 | - [Amazon](https://www.amazon.com/dp/B0779PC8S4) 47 | - [Crowd Supply](https://www.crowdsupply.com/rhs-research/nanoevb) 48 | - [EBay](https://www.ebay.com/itm/232775706324) 49 | 50 | ## More information 51 | 52 | - [Check out the wiki](https://github.com/RHSResearchLLC/NanoEVB-X1/wiki) 53 | - [Product Website](https://www.picoevb.com) 54 | 55 | or contact info@nanoevb.com 56 | 57 | ![Image of PicoEVB](./images/H3-600x660-ind.png) 58 | 59 | ** Note: This page applies to PicoEVB Rev D. For previous revs, select the rev from tags ** 60 | 61 | -------------------------------------------------------------------------------- /Sample-Projects/LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (C) 2017 RHS Research LLC 2 | 3 | This work is free. You can redistribute it and/or modify it under the 4 | terms of the Do What The Fuck You Want To But It's Not My Fault Public 5 | License, Version 1, as published by Ben McGinnes: 6 | 7 | DO WHAT THE FUCK YOU WANT TO BUT IT'S NOT MY FAULT PUBLIC LICENSE 8 | Version 1, October 2013 9 | 10 | Copyright (C) 2013 Ben McGinnes 11 | 12 | Everyone is permitted to copy and distribute verbatim or modified 13 | copies of this license document, and changing it is allowed as long 14 | as the name is changed. 15 | 16 | DO WHAT THE FUCK YOU WANT TO BUT IT'S NOT MY FAULT PUBLIC LICENSE 17 | TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 18 | 19 | 0. You just DO WHAT THE FUCK YOU WANT TO. 20 | 21 | 1. Do not hold the author(s), creator(s), developer(s) or 22 | distributor(s) liable for anything that happens or goes wrong 23 | with your use of the work. 24 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/README.md: -------------------------------------------------------------------------------- 1 | # Vivado Project 2 | 3 | ### PROM file for onboard flash 4 | Once the bitstream is generated, in the Vivado TCL command prompt, from the Vivado/nanoevb project directory run the following command: 5 | 6 | **Note: Make sure Vivado working directory is set to same dir as .xpr file: `cd `** 7 | 8 | write_cfgmem -force -format mcs -size 4 -interface SPIx4 \ 9 | -loadbit {up 0x00000000 "./picoevb.runs/impl_1/project_bd_wrapper.bit" } \ 10 | -file "../mcs/proj0.mcs" 11 | 12 | 13 | ### Programming onboard flash 14 | 15 | First, make sure xvcd cable driver is running. Build the xvcd project, then run 16 | `sudo ./xvcd -p 2542 -s i:0x0403:0x6015:0` 17 | 18 | Then from vivado, run the following commands to connect to the xvcd driver: 19 | `open_hw; connect_hw_server; open_hw_target -xvc_url localhost:2542` 20 | 21 | At this point you should see the FPGA, and can use the dashboard to add monitors, if you like. 22 | If you'd like to program the flash with the bitstream, you can run the following in Vivado 23 | `source ./tcl/prog-flash.tcl` 24 | 25 | **Note: Make sure Vivado working directory is set to same dir as .xpr file: `cd `** 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_clkreq_l_tieoff_0/project_bd_clkreq_l_tieoff_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_clkreq_l_tieoff_0 10 | 11 | 12 | 0x0 13 | 1 14 | 0 15 | 1 16 | project_bd_clkreq_l_tieoff_0 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | 35 | ../../ipshared 36 | 2021.1 37 | OUT_OF_CONTEXT 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_clkreq_l_tieoff_0/project_bd_clkreq_l_tieoff_0.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_clkreq_l_tieoff_0 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 0 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 1 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x0 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_clkreq_l_tieoff_0 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 1 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 0 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 2020.1 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_10ee_0/project_bd_const_10ee_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_const_10ee_0 10 | 11 | 12 | 0x7021 13 | 16 14 | 0x7021 15 | 16 16 | project_bd_const_10ee_0 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | rtl 35 | ../../ipshared 36 | 2021.1 37 | GLOBAL 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_10ee_0/project_bd_const_10ee_0.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_const_10ee_0 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 15 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 16 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x7021 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_const_10ee_0 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 16 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 0x7021 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 66 | 2020.1 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_7021_0/project_bd_const_7021_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_const_7021_0 10 | 11 | 12 | 0x05 13 | 8 14 | 5 15 | 8 16 | project_bd_const_7021_0 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | rtl 35 | ../../ipshared 36 | 2021.1 37 | GLOBAL 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_7021_0/project_bd_const_7021_0.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_const_7021_0 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 7 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 8 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x05 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_const_7021_0 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 8 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 5 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 66 | 2020.1 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_7021_1/project_bd_const_7021_1.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_const_7021_1 10 | 11 | 12 | 0x7021 13 | 16 14 | 0x7021 15 | 16 16 | project_bd_const_7021_1 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | rtl 35 | ../../ipshared 36 | 2021.1 37 | GLOBAL 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_const_7021_1/project_bd_const_7021_1.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_const_7021_1 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 15 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 16 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x7021 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_const_7021_1 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 16 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 0x7021 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 66 | 2020.1 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_deadbeef_constant_0/project_bd_deadbeef_constant_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_deadbeef_constant_0 10 | 11 | 12 | 0x45564234 13 | 32 14 | 0x45564234 15 | 32 16 | project_bd_deadbeef_constant_0 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | 35 | ../../ipshared 36 | 2021.1 37 | OUT_OF_CONTEXT 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_deadbeef_constant_0/project_bd_deadbeef_constant_0.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_deadbeef_constant_0 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 31 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 32 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x45564234 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_deadbeef_constant_0 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 32 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 0x45564234 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 66 | 2020.1 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_util_vector_logic_0_0/project_bd_util_vector_logic_0_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_util_vector_logic_0_0 10 | 11 | 12 | not 13 | 1 14 | not 15 | 1 16 | project_bd_util_vector_logic_0_0 17 | data/sym_notgate.png 18 | artix7 19 | 20 | 21 | xc7a50t 22 | csg325 23 | VHDL 24 | 25 | MIXED 26 | -2 27 | 28 | 29 | TRUE 30 | TRUE 31 | IP_Integrator 32 | 1 33 | TRUE 34 | . 35 | 36 | ../../ipshared 37 | 2021.1 38 | OUT_OF_CONTEXT 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_util_vector_logic_0_1/project_bd_util_vector_logic_0_1.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_util_vector_logic_0_1 10 | 11 | 12 | and 13 | 1 14 | and 15 | 1 16 | project_bd_util_vector_logic_0_1 17 | data/sym_andgate.png 18 | artix7 19 | 20 | 21 | xc7a50t 22 | csg325 23 | VHDL 24 | 25 | MIXED 26 | -2 27 | 28 | 29 | TRUE 30 | TRUE 31 | IP_Integrator 32 | 1 33 | TRUE 34 | . 35 | 36 | ../../ipshared 37 | 2021.1 38 | OUT_OF_CONTEXT 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_util_vector_logic_0_2/project_bd_util_vector_logic_0_2.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_util_vector_logic_0_2 10 | 11 | 12 | not 13 | 1 14 | not 15 | 1 16 | project_bd_util_vector_logic_0_2 17 | data/sym_notgate.png 18 | artix7 19 | 20 | 21 | xc7a50t 22 | csg325 23 | VHDL 24 | 25 | MIXED 26 | -2 27 | 28 | 29 | TRUE 30 | TRUE 31 | IP_Integrator 32 | 1 33 | TRUE 34 | . 35 | rtl 36 | ../../ipshared 37 | 2021.1 38 | OUT_OF_CONTEXT 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_util_vector_logic_1_1/project_bd_util_vector_logic_1_1.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_util_vector_logic_1_1 10 | 11 | 12 | not 13 | 1 14 | not 15 | 1 16 | project_bd_util_vector_logic_1_1 17 | data/sym_notgate.png 18 | artix7 19 | 20 | 21 | xc7a50t 22 | csg325 23 | VHDL 24 | 25 | MIXED 26 | -2 27 | 28 | 29 | TRUE 30 | TRUE 31 | IP_Integrator 32 | 1 33 | TRUE 34 | . 35 | rtl 36 | ../../ipshared 37 | 2021.1 38 | OUT_OF_CONTEXT 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_util_vector_logic_2_0/project_bd_util_vector_logic_2_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_util_vector_logic_2_0 10 | 11 | 12 | and 13 | 1 14 | and 15 | 1 16 | project_bd_util_vector_logic_2_0 17 | data/sym_andgate.png 18 | artix7 19 | 20 | 21 | xc7a50t 22 | csg325 23 | VHDL 24 | 25 | MIXED 26 | -2 27 | 28 | 29 | TRUE 30 | TRUE 31 | IP_Integrator 32 | 1 33 | TRUE 34 | . 35 | 36 | ../../ipshared 37 | 2021.1 38 | OUT_OF_CONTEXT 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_xlconstant_0_0/project_bd_xlconstant_0_0.xci: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | xci 5 | unknown 6 | 1.0 7 | 8 | 9 | project_bd_xlconstant_0_0 10 | 11 | 12 | 0x10EE 13 | 16 14 | 0x10EE 15 | 16 16 | project_bd_xlconstant_0_0 17 | artix7 18 | 19 | 20 | xc7a50t 21 | csg325 22 | VHDL 23 | 24 | MIXED 25 | -2 26 | 27 | 28 | TRUE 29 | TRUE 30 | IP_Integrator 31 | 7 32 | TRUE 33 | . 34 | 35 | ../../ipshared 36 | 2021.1 37 | GLOBAL 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ip/project_bd_xlconstant_0_0/project_bd_xlconstant_0_0.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | xilinx.com 4 | customized_ip 5 | project_bd_xlconstant_0_0 6 | 1.0 7 | 8 | 9 | 10 | dout 11 | 12 | out 13 | 14 | 15 15 | 0 16 | 17 | 18 | 19 | std_logic_vector 20 | dummy_view 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | CONST_WIDTH 29 | Const Width 30 | 16 31 | 32 | 33 | CONST_VAL 34 | Const Val 35 | 0x10EE 36 | 37 | 38 | 39 | Gives a constant signed value. 40 | 41 | 42 | Component_Name 43 | project_bd_xlconstant_0_0 44 | 45 | 46 | CONST_WIDTH 47 | Const Width 48 | 16 49 | 50 | 51 | CONST_VAL 52 | Const Val 53 | 0x10EE 54 | 55 | 56 | 57 | 58 | Constant 59 | 7 60 | 61 | 62 | 63 | 64 | 65 | 66 | 2020.1 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ui/bd_23d44e28.ui: -------------------------------------------------------------------------------- 1 | { 2 | "ActiveEmotionalView":"Default View", 3 | "Default View_ScaleFactor":"0.823746", 4 | "Default View_TopLeft":"-335,348", 5 | "ExpandedHierarchyInLayout":"", 6 | "comment_0":"PCIe status LED logic 7 | LED output is active low 8 | 9 | - Flashing if link is up 10 | - Solid if link is in reset 11 | - no light if not in reset and link down 12 | 13 | reset_n && (clk || (!link_up)) 14 | 15 | reset_n | link_up | clk | out 16 | 0 x x 0 17 | 1 0 x 1 18 | 1 1 clk", 19 | "commentid":"comment_0|", 20 | "font_comment_0":"14", 21 | "guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS 22 | # -string -flagsOSRD 23 | preplace port auxio -pg 1 -lvl 8 -x 2600 -y 200 -defaultsOSRD 24 | preplace port pcie_mgt -pg 1 -lvl 8 -x 2600 -y 1130 -defaultsOSRD 25 | preplace port sys -pg 1 -lvl 0 -x -110 -y 1190 -defaultsOSRD 26 | preplace port SPI_0 -pg 1 -lvl 8 -x 2600 -y 490 -defaultsOSRD 27 | preplace port port-id_sys_rst_n -pg 1 -lvl 0 -x -110 -y 1170 -defaultsOSRD 28 | preplace portBus di_edge -pg 1 -lvl 0 -x -110 -y 260 -defaultsOSRD 29 | preplace portBus status_leds -pg 1 -lvl 8 -x 2600 -y 860 -defaultsOSRD 30 | preplace portBus clkreq_l -pg 1 -lvl 8 -x 2600 -y 260 -defaultsOSRD 31 | preplace portBus do_edge -pg 1 -lvl 8 -x 2600 -y 370 -defaultsOSRD 32 | preplace inst StatusLEDControl -pg 1 -lvl 6 -x 2220 -y 1050 -defaultsOSRD 33 | preplace inst axi_bram_ctrl_0_bram -pg 1 -lvl 4 -x 1540 -y 620 -defaultsOSRD 34 | preplace inst xlslice_0 -pg 1 -lvl 7 -x 2480 -y 370 -defaultsOSRD 35 | preplace inst xlslice_1 -pg 1 -lvl 5 -x 1890 -y 780 -defaultsOSRD 36 | preplace inst clkreq_l_tieoff -pg 1 -lvl 7 -x 2480 -y 260 -defaultsOSRD 37 | preplace inst const_7021 -pg 1 -lvl 1 -x 360 -y 1320 -defaultsOSRD 38 | preplace inst const_rev -pg 1 -lvl 1 -x 360 -y 980 -defaultsOSRD 39 | preplace inst const_0007 -pg 1 -lvl 1 -x 360 -y 1080 -defaultsOSRD 40 | preplace inst version_constant -pg 1 -lvl 4 -x 1540 -y 40 -defaultsOSRD 41 | preplace inst const_10ee -pg 1 -lvl 1 -x 360 -y 880 -defaultsOSRD 42 | preplace inst axi_bram_ctrl_0 -pg 1 -lvl 3 -x 1180 -y 730 -defaultsOSRD 43 | preplace inst axi_gpio_0 -pg 1 -lvl 4 -x 1540 -y 160 -defaultsOSRD 44 | preplace inst axi_gpio_1 -pg 1 -lvl 4 -x 1540 -y 330 -defaultsOSRD 45 | preplace inst axi_interconnect_0 -pg 1 -lvl 3 -x 1180 -y 490 -defaultsOSRD 46 | preplace inst axi_quad_spi_0 -pg 1 -lvl 4 -x 1540 -y 490 -defaultsOSRD 47 | preplace inst clk_wiz_0 -pg 1 -lvl 3 -x 1180 -y 970 -defaultsOSRD 48 | preplace inst util_ds_buf -pg 1 -lvl 1 -x 360 -y 1190 -defaultsOSRD 49 | preplace inst util_vector_logic_0 -pg 1 -lvl 4 -x 1540 -y 1050 -defaultsOSRD 50 | preplace inst util_vector_logic_1 -pg 1 -lvl 6 -x 2220 -y 880 -defaultsOSRD 51 | preplace inst util_vector_logic_2 -pg 1 -lvl 6 -x 2220 -y 760 -defaultsOSRD 52 | preplace inst xlconcat_0 -pg 1 -lvl 7 -x 2480 -y 860 -defaultsOSRD 53 | preplace inst xadc_wiz_1 -pg 1 -lvl 4 -x 1540 -y 820 -defaultsOSRD 54 | preplace inst xdma -pg 1 -lvl 2 -x 770 -y 700 -defaultsOSRD 55 | preplace netloc ACLK_1 1 2 4 980 300 1370 980 NJ 980 1990 56 | preplace netloc ARESETN_1 1 2 2 1010 310 1340 57 | preplace netloc StatusLEDControl_PCIe_LED 1 6 1 2380 840n 58 | preplace netloc axi_gpio_1_gpio2_io_o 1 4 3 1690 370 N 370 NJ 59 | preplace netloc clk_wiz_0_clk_out1 1 3 1 1380 480n 60 | preplace netloc clk_wiz_0_locked 1 3 1 1330 980n 61 | preplace netloc const_0007_dout 1 1 1 530J 730n 62 | preplace netloc const_10ee1_dout 1 1 1 540J 690n 63 | preplace netloc const_10ee_dout 1 1 1 510 630n 64 | preplace netloc const_7022_dout 1 1 1 520J 710n 65 | preplace netloc di_edge_1 1 0 5 NJ 260 NJ 260 NJ 260 1350J 240 1690 66 | preplace netloc reset_rtl_1 1 0 6 -90J 1260 560 1120 NJ 1120 NJ 1120 NJ 1120 1990 67 | preplace netloc util_ds_buf_IBUF_OUT 1 1 1 550 750n 68 | preplace netloc util_vector_logic_0_Res 1 4 2 N 1050 N 69 | preplace netloc util_vector_logic_1_Res 1 6 1 NJ 880 70 | preplace netloc util_vector_logic_2_Res 1 6 1 2370 760n 71 | preplace netloc xadc_wiz_1_alarm_out 1 4 2 NJ 880 N 72 | preplace netloc xdma_1_user_lnk_up 1 2 2 970J 810 1350 73 | preplace netloc xlconcat_0_dout 1 7 1 NJ 860 74 | preplace netloc xlconstant_0_dout 1 4 1 1690 40n 75 | preplace netloc xlconstant_0_dout1 1 7 1 NJ 260 76 | preplace netloc xlslice_0_Dout 1 7 1 NJ 370 77 | preplace netloc xlslice_1_Dout 1 5 1 1990 760n 78 | preplace netloc S00_AXI_1 1 2 1 990 370n 79 | preplace netloc axi_bram_ctrl_0_BRAM_PORTA 1 3 1 1390 620n 80 | preplace netloc axi_gpio_0_GPIO2 1 4 4 NJ 180 1990 200 NJ 200 NJ 81 | preplace netloc axi_interconnect_0_M00_AXI 1 3 1 1330 140n 82 | preplace netloc axi_interconnect_0_M01_AXI 1 3 1 1360 460n 83 | preplace netloc axi_interconnect_0_M02_AXI 1 3 1 1360 500n 84 | preplace netloc axi_interconnect_0_M03_AXI 1 3 1 1350 310n 85 | preplace netloc axi_quad_spi_0_SPI_0 1 4 4 NJ 470 1990 490 NJ 490 NJ 86 | preplace netloc diff_clock_rtl_1 1 0 1 NJ 1190 87 | preplace netloc xdma_1_M_AXI 1 2 1 1000 620n 88 | preplace netloc xdma_1_pcie_mgt 1 2 6 960 1130 NJ 1130 NJ 1130 NJ 1130 NJ 1130 NJ 89 | preplace cgraphic comment_0 place left -299 18 textcolor 4 linecolor 3 90 | levelinfo -pg 1 -110 360 770 1180 1540 1890 2220 2480 2600 91 | pagesize -pg 1 -db -bbox -sgen -240 -130 2750 1420 92 | ", 93 | "linktoobj_comment_0":"", 94 | "linktotype_comment_0":"bd_design" 95 | } 96 | 0 97 | { 98 | "/comment_0":"comment_0" 99 | } -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/picoevb.srcs/sources_1/bd/project_bd/ui/bd_4a6a964f.ui: -------------------------------------------------------------------------------- 1 | { 2 | "ExpandedHierarchyInLayout":"", 3 | "guistr":"# # String gsaved with Nlview 7.0.19 2019-03-26 bk=1.5019 VDI=41 GEI=35 GUI=JA:9.0 non-TLS 4 | # -string -flagsOSRD 5 | preplace port S00_AXI -pg 1 -lvl 0 -x -10 -y 80 -defaultsOSRD 6 | preplace port auxio -pg 1 -lvl 3 -x 650 -y 190 -defaultsOSRD 7 | preplace port s_axi_aclk -pg 1 -lvl 0 -x -10 -y 100 -defaultsOSRD 8 | preplace port s_axi_aresetn -pg 1 -lvl 0 -x -10 -y 120 -defaultsOSRD 9 | preplace portBus di_edge -pg 1 -lvl 0 -x -10 -y 300 -defaultsOSRD 10 | preplace portBus gpio2_io_o -pg 1 -lvl 3 -x 650 -y 420 -defaultsOSRD 11 | preplace inst axi_gpio_0 -pg 1 -lvl 2 -x 480 -y 170 -defaultsOSRD 12 | preplace inst axi_gpio_1 -pg 1 -lvl 2 -x 480 -y 390 -defaultsOSRD 13 | preplace inst axi_interconnect_0 -pg 1 -lvl 1 -x 170 -y 160 -defaultsOSRD 14 | preplace inst version_constant -pg 1 -lvl 2 -x 480 -y 50 -defaultsOSRD 15 | preplace netloc ARESETN_1 1 0 2 10 10 340 16 | preplace netloc axi_gpio_1_gpio2_io_o 1 2 1 NJ 420 17 | preplace netloc di_edge_1 1 0 3 NJ 300 NJ 300 620 18 | preplace netloc xdma_0_axi_aclk 1 0 2 20 20 330 19 | preplace netloc xlconstant_0_dout 1 2 1 620 50n 20 | preplace netloc axi_interconnect_0_M00_AXI 1 1 1 N 150 21 | preplace netloc axi_interconnect_0_M01_AXI 1 1 1 320 170n 22 | preplace netloc S00_AXI_1 1 0 1 NJ 80 23 | preplace netloc axi_gpio_0_GPIO2 1 2 1 NJ 190 24 | levelinfo -pg 1 -10 170 480 650 25 | pagesize -pg 1 -db -bbox -sgen -150 -10 800 480 26 | " 27 | } 28 | 0 29 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/tcl/build.tcl: -------------------------------------------------------------------------------- 1 | # Use these to run synth/implementation 2 | reset_run synth_1 3 | launch_runs synth_1 -jobs 6 4 | wait_on_run synth_1 5 | launch_runs impl_1 -jobs 6 -to_step write_bitstream 6 | wait_on_run impl_1 7 | puts "Implementation done!" 8 | 9 | write_cfgmem -format mcs -size 4 -interface SPIx4 -force -loadbit "up 0x00000000 ./picoevb.runs/impl_1/project_bd_wrapper.bit" -file "./mcs/out.mcs" 10 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/FPGA/tcl/prog-flash.tcl: -------------------------------------------------------------------------------- 1 | # Add flash part, s25fl132k; default to erase and program (no verify) 2 | create_hw_cfgmem -hw_device [lindex [get_hw_devices xc7a50t_0] 0] [lindex [get_cfgmem_parts {s25fl132k-spi-x1_x2_x4}] 0] 3 | set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 4 | set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 5 | set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 6 | set_property PROGRAM.VERIFY 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 7 | set_property PROGRAM.CHECKSUM 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 8 | refresh_hw_device [lindex [get_hw_devices xc7a50t_0] 0] 9 | set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 10 | set_property PROGRAM.FILES [list "./mcs/EVB4.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 11 | set_property PROGRAM.PRM_FILE {} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 12 | set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 13 | 14 | # Program the fabric with the flash loader 15 | startgroup 16 | if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices xc7a50t_0] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices xc7a50t_0] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices xc7a50t_0] 0]]; program_hw_devices [lindex [get_hw_devices xc7a50t_0] 0]; }; 17 | 18 | # Finally, program the flash 19 | program_hw_cfgmem -hw_cfgmem [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 20 | 21 | 22 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/blink-leds.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | import os 3 | import struct 4 | import time 5 | 6 | ############################################## 7 | def main(): 8 | 9 | 10 | # Helper constants 11 | all_1s = struct.pack(" pair 27 | target_include_directories(spi-loader PUBLIC app-linux/config lib/common lib/src) 28 | 29 | # spi-loader needs C++17. 30 | # Needed for static constexpr in header only 31 | set_target_properties(spi-loader PROPERTIES 32 | CXX_STANDARD 11 33 | CMAKE_CXX_STANDARD_REQUIRED ON 34 | CXX_EXTENSIONS OFF 35 | ) 36 | 37 | ############################################################################### 38 | ## dependencies ############################################################### 39 | ############################################################################### 40 | 41 | target_link_libraries(spi-loader PUBLIC 42 | # here you can add any library dependencies 43 | ) 44 | 45 | 46 | ############################################################################### 47 | ## packaging ################################################################## 48 | ############################################################################### 49 | 50 | # all install commands get the same destination. this allows us to use paths 51 | # relative to the executable. 52 | install(TARGETS spi-loader DESTINATION spi-loader_destination) 53 | 54 | # this is basically a repeat of the file copy instruction that copies the 55 | # resources in the build directory, but here we tell cmake that we want it 56 | # in the package 57 | install(DIRECTORY resources DESTINATION spi-loader_destination) 58 | 59 | # now comes everything we need, to create a package 60 | # there are a lot more variables you can set, and some 61 | # you need to set for some package types, but we want to 62 | # be minimal here 63 | set(CPACK_PACKAGE_NAME "Myspi-loader") 64 | set(CPACK_PACKAGE_VERSION "1.0.0") 65 | 66 | # we don't want to split our program up into several things 67 | set(CPACK_MONOLITHIC_INSTALL 1) 68 | 69 | # This must be last 70 | include(CPack) 71 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/lib/common/xil_io.c: -------------------------------------------------------------------------------- 1 | #include "xil_io.h" 2 | 3 | #include // pread/pwrite 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | 10 | // Defined somewhere else 11 | extern const char* gAXI_FNAME; 12 | 13 | // Static data 14 | static int sfAXI = -1; 15 | static int sComplained = 0; 16 | 17 | // Static functions 18 | static int CheckAndOpen(void) 19 | { 20 | if (sfAXI < 0) 21 | { 22 | sfAXI = open(gAXI_FNAME, O_RDWR); 23 | } 24 | 25 | if ((sfAXI < 0) && !sComplained) 26 | { 27 | printf("Error opening device %s:%s", gAXI_FNAME, strerror(errno)); 28 | sComplained = 1; 29 | } 30 | 31 | return (sfAXI >= 0); 32 | } 33 | 34 | //------------------------------------------------------------------------------------------------- 35 | // Xil_In32 36 | //------------------------------------------------------------------------------------------------- 37 | u32 Xil_In32(UINTPTR Addr) 38 | { 39 | u32 rez; 40 | if(CheckAndOpen()) 41 | { 42 | ssize_t nread = pread(sfAXI, &rez, sizeof(rez), (off_t) Addr); 43 | if (nread != sizeof(rez)) 44 | { 45 | printf("Error writing to device:%s", strerror(errno)); 46 | } 47 | } 48 | return rez; 49 | } 50 | 51 | //------------------------------------------------------------------------------------------------- 52 | // Xil_In32 53 | //------------------------------------------------------------------------------------------------- 54 | void Xil_Out32(UINTPTR Addr, u32 Value) 55 | { 56 | if(CheckAndOpen()) 57 | { 58 | ssize_t nsent = pwrite(sfAXI, &Value, sizeof(Value), (off_t) Addr); 59 | if (nsent != sizeof(Value)) 60 | { 61 | printf("Error writing to device:%s", strerror(errno)); 62 | } 63 | } 64 | } 65 | 66 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/lib/common/xil_io.h: -------------------------------------------------------------------------------- 1 | // IO interface using PCIe-AXI bridge 2 | 3 | #ifndef XIL_IO_H /* prevent circular inclusions */ 4 | #define XIL_IO_H /* by using protection macros */ 5 | 6 | #ifdef __cplusplus 7 | extern "C" { 8 | #endif 9 | 10 | /***************************** Include Files *********************************/ 11 | 12 | #include "xil_types.h" 13 | 14 | /*****************************************************************************/ 15 | /** 16 | * 17 | * @brief Performs an input operation for a memory location by 18 | * reading from the specified address and returning the 32 bit Value 19 | * read from that address. 20 | * 21 | * @param Addr: contains the address to perform the input operation 22 | * 23 | * @return The 32 bit Value read from the specified input address. 24 | * 25 | ******************************************************************************/ 26 | u32 Xil_In32(UINTPTR Addr); 27 | 28 | /*****************************************************************************/ 29 | /** 30 | * 31 | * @brief Performs an output operation for a memory location by writing the 32 | * 32 bit Value to the the specified address. 33 | * 34 | * @param Addr contains the address to perform the output operation 35 | * @param Value contains the 32 bit Value to be written at the specified 36 | * address. 37 | * 38 | * @return None. 39 | * 40 | ******************************************************************************/ 41 | void Xil_Out32(UINTPTR Addr, u32 Value); 42 | 43 | #ifdef __cplusplus 44 | } 45 | #endif 46 | 47 | #endif /* end of protection macro */ 48 | /** 49 | * @} End of "addtogroup common_io_interfacing_apis". 50 | */ 51 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/lib/common/xil_printf.h: -------------------------------------------------------------------------------- 1 | #ifndef XIL_PRINTF_H 2 | #define XIL_PRINTF_H 3 | 4 | #include 5 | 6 | #define xil_printf printf 7 | 8 | 9 | #endif /* end of protection macro */ 10 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/lib/readme.txt: -------------------------------------------------------------------------------- 1 | This folder holds files reused from Xilinx SDK at https://github.com/Xilinx/embeddedsw. Some files were modified some weren't. -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/lib/src/xspi_i.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * 3 | * Copyright (C) 2001 - 2014 Xilinx, Inc. All rights reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy 6 | * of this software and associated documentation files (the "Software"), to deal 7 | * in the Software without restriction, including without limitation the rights 8 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | * copies of the Software, and to permit persons to whom the Software is 10 | * furnished to do so, subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in 13 | * all copies or substantial portions of the Software. 14 | * 15 | * Use of the Software is limited solely to applications: 16 | * (a) running on a Xilinx device, or 17 | * (b) that interact with a Xilinx device through a bus or interconnect. 18 | * 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 | * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 23 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 24 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 25 | * SOFTWARE. 26 | * 27 | * Except as contained in this notice, the name of the Xilinx shall not be used 28 | * in advertising or otherwise to promote the sale, use or other dealings in 29 | * this Software without prior written authorization from Xilinx. 30 | * 31 | ******************************************************************************/ 32 | /*****************************************************************************/ 33 | /** 34 | * 35 | * @file xspi_i.h 36 | * @addtogroup spi_v4_4 37 | * @{ 38 | * 39 | * This header file contains internal identifiers. It is intended for internal 40 | * use only. 41 | * 42 | *
43 | * MODIFICATION HISTORY:
44 | *
45 | * Ver   Who  Date     Changes
46 | * ----- ---- -------- -----------------------------------------------
47 | * 1.00a rpm  10/11/01 First release
48 | * 1.00b jhl  03/14/02 Repartitioned driver for smaller files.
49 | * 1.00b rpm  04/24/02 Moved register definitions to xspi_l.h
50 | * 1.11a wgr  03/22/07 Converted to new coding style.
51 | * 1.12a sv   03/28/08 Removed the Macro for statistics, moved the interrupt
52 | *                     register definitions and bit definitions to _l.h.
53 | * 2.00a sv   07/30/08 Removed the Macro for statistics, moved the interrupt
54 | *                     register definitions and bit definitions to _l.h.
55 | * 
56 | * 57 | ******************************************************************************/ 58 | 59 | #ifndef XSPI_I_H /* prevent circular inclusions */ 60 | #define XSPI_I_H /* by using protection macros */ 61 | 62 | #ifdef __cplusplus 63 | extern "C" { 64 | #endif 65 | 66 | /***************************** Include Files *********************************/ 67 | 68 | #include "xil_types.h" 69 | #include "xil_assert.h" 70 | #include "xspi_l.h" 71 | 72 | /************************** Constant Definitions *****************************/ 73 | 74 | /**************************** Type Definitions *******************************/ 75 | 76 | /***************** Macros (Inline Functions) Definitions *********************/ 77 | 78 | /************************** Function Prototypes ******************************/ 79 | 80 | void XSpi_Abort(XSpi *InstancePtr); 81 | 82 | /************************** Variable Definitions *****************************/ 83 | 84 | extern XSpi_Config XSpi_ConfigTable[]; 85 | 86 | #ifdef __cplusplus 87 | } 88 | #endif 89 | 90 | #endif /* end of protection macro */ 91 | /** @} */ 92 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/slickedit/all-2.vpj: -------------------------------------------------------------------------------- 1 | 2 | 7 | 13 | 14 | 21 | 22 | 23 | 26 | 27 | 28 | 35 | 36 | 37 | 44 | 45 | 46 | 53 | 54 | 55 | 62 | 63 | 64 | 65 | 66 | 72 | 73 | 80 | 81 | 82 | 85 | 86 | 87 | 94 | 95 | 96 | 103 | 104 | 105 | 112 | 113 | 114 | 121 | 122 | 123 | 124 | 125 | 126 | 130 | 131 | 132 | 133 | 134 | 138 | 142 | 146 | 150 | 154 | 158 | 162 | 163 | 164 | 165 | 166 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/Host/spi-loader/linux/sw/slickedit/spi-loader.vpw: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | -------------------------------------------------------------------------------- /Sample-Projects/Project-0/README.md: -------------------------------------------------------------------------------- 1 | 2 | ## This sample project demonstrates: 3 | - DMA transfer between block ram on FPGA and host PC, using PCIe x1, gen 2 (500MB/s) 4 | - Control LEDs on PicoEVB 5 | - Read/Control digital I/O on PicoEVB aux I/O connector 6 | - Read/Control digital I/O on PicoEVB PCIe edge connector 7 | 8 | ## Prerequisites: 9 | - This project uses Xilinx host-side DMA driver, so the driver must be installed and loaded. See https://github.com/Xilinx/dma_ip_drivers/tree/master/XDMA 10 | - There is also a Windows driver: https://www.xilinx.com/support/answers/65444.html 11 | 12 | ## Project details 13 | 14 | Here is the Vivado block diagram that implements the project. The heavy lifting is done by Xilinx DMA/Bridge subsystem: 15 | 16 | ![alt text](proj_bd.png "Block Diagram") 17 | 18 | 19 | The 'B' LED indicates PCIe status: 20 | 21 | | 'B' LED state | Meaning | 22 | | --- | --- | 23 | | Blinking | PCIe link up | 24 | | Solid | PCIe link in reset | 25 | | Off | PCIe link failure | 26 | 27 | The 'C' LED is under user control 28 | 29 | The 'A' LED lights up if FPGA is overtemperature or one of the FPGA voltage rails are out of spec 30 | 31 | 32 | ### I/O map 33 | When using the Xilinx XDMA driver, all communication between the FPGA and host SW happens via file read/writes. 34 | To access the resources below, read/write to a device file (/dev/xdma0_user) at the given address: 35 | 36 | 37 | | Address | Byte Length | Type | Description | 38 | | --- | --- | --- | --- | 39 | | 0x1000 | 4 | R | Version number | 40 | | 0x1008 | 4 | RW | `aux IO pin` data | 41 | | 0x100C | 4 | RW | `aux IO pin` direction
0=output, 1=input | 42 | | 0x2000 | 4 | RW | `PCIe digital input` data | 43 | | 0x2004 | 4 | RW | `PCIe digital input` direction
0=output, 1=input
**SHOULD BE INPUTS PER M.2 SPEC** | 44 | | 0x2008 | 4 | RW | `LEDs` | 45 | | 0x200C | 4 | RW | direction register for above
0=output, 1=input
Must be set to 0 to control LEDs | 46 | | 0x3000 | | RW | XADC. See PC091. Temperature is at this address + 0x200 47 | | 0x10000 | | RW | AXI-SPI block for writing to onboard flash. See spi-loader utility 48 | 49 | 50 | ### Register details 51 | 52 | 53 | `aux IO pin` data & direction registers: 54 | 55 | 56 | | D31-D4 | D3 | D2 | D1 | D0 | 57 | | --- | --- | --- | --- | --- | 58 | | unused | Pin 5 | Pin 4 | Pin 2 | Pin 1 | 59 | 60 | 61 | 62 | `PCIe digital input` register (see the schematic for pinout of W_DISABLE_1, W_DISABLE_2): 63 | 64 | 65 | | D31-D2 | D1 | D0 | 66 | | --- | --- | --- | 67 | | unused | W_DISABLE_2 | W_DISABLE_1 | 68 | 69 | 70 | `LEDs` register (see the schematic for pinout of M2_LED_1, M2_LED_2): 71 | 72 | 73 | | D31-D3 | D2 | D1 | D0 | 74 | | --- | --- | --- | --- | 75 | | unused | LED C | M2_LED_1 | M2_LED_2 | 76 | 77 | ### Running the programs 78 | 79 | - A sample program to blink all LEDs: Host/blink-leds.py 80 | - A sample program that transfers some data to/from the block ram on the FPGA: Host/dma-test.py 81 | - A sample program to report the FPGA bitstream version (as read from register @ 0x1000) 82 | - With the Xilinx xdma driver loaded, simply run the python script 83 | 84 | These are python3 programs- they won't work properly with Python2 85 | 86 | 87 | ### Modifying the FPGA 88 | See the readme in the FPGA folder for more information 89 | 90 | ### Notes for Windows users 91 | For Windows users, there aren't any Python scripts that implement these examples. 92 | Instead, the Xilinx-provided tools provide easy acccess to the resources. 93 | 94 | `xdma_test.exe`: This will test the DMA between FPGA block ram and host PC 95 | 96 | #### An example for controlling LEDs 97 | 98 | Set the LED port pins to putput: 99 | `xdma_rw.exe user write 0x100c 0 0 0 0` 100 | 101 | Write all 1's to the LED port, to turn off the LEDs (LEDs are active low) 102 | `xdma_rw.exe user write 0x1008 255 255 255 255` -------------------------------------------------------------------------------- /Sample-Projects/Project-0/proj_bd.png: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- 1 | write_cfgmem -format mcs -size 4 -interface SPIx4 -loadbit {up 0x00000000 "/home/dr/git/PicoEVB/Vivado/nanoevb/nanoevb/nanoevb.runs/impl_1/project_bd_wrapper.bit" } -checksum -force -file "/home/dr/git/PicoEVB/FPGA-bitfiles/Gen2/V3.mcs" 2 | 3 | ####################################################################################### 4 | sudo ./xvcd -p 2542 -s i:0x0403:0x6015:0 5 | 6 | open_hw; connect_hw_server; open_hw_target -xvc_url localhost:2542 7 | 8 | # Add flash part; default to erase and program (no verify) 9 | create_hw_cfgmem -hw_device [lindex [get_hw_devices xc7a50t_0] 0] [lindex [get_cfgmem_parts {s25fl132k-spi-x1_x2_x4}] 0] 10 | set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 11 | set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 12 | set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 13 | set_property PROGRAM.VERIFY 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 14 | set_property PROGRAM.CHECKSUM 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 15 | refresh_hw_device [lindex [get_hw_devices xc7a50t_0] 0] 16 | set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 17 | set_property PROGRAM.FILES [list "/home/dr/git/PicoEVB/FPGA-bitfiles/Gen2/EVB0-S25FL132.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 18 | set_property PROGRAM.PRM_FILE {} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 19 | set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 20 | 21 | # Program the fabric with the flash loader 22 | startgroup 23 | if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices xc7a50t_0] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices xc7a50t_0] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices xc7a50t_0] 0]]; program_hw_devices [lindex [get_hw_devices xc7a50t_0] 0]; }; 24 | 25 | # Finally, program the flash 26 | program_hw_cfgmem -hw_cfgmem [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a50t_0] 0]] 27 | 28 | # done 29 | 30 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/README.md: -------------------------------------------------------------------------------- 1 | This directory contains the files necessary to program PicoEVB's flash using OpenOCD. 2 | 3 | This directory contains a modified version of OpenOCD, which will set the flash's "quad enable" bit. 4 | However, this bit is set at the factory so this version of OpenOCD isn't necessary- you can use any recent stock version 5 | and it should work on Windows or Linux. 6 | 7 | If you already have OpenOCD installed: 8 | 9 | Linux: 10 | - Make sure PicoEVB is installed and powered up 11 | - Run go.sh 12 | 13 | 14 | Windows 15 | - Make sure PicoEVB is installed and powered up 16 | - Use the SysProgs USB Driver Tool on Windows to load the WinUSB Driver for the FT230X 17 | - Run openocd.exe -f flash.cfg 18 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/bscan_spi_xc7a50t.bit: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-flash-program-openocd/bscan_spi_xc7a50t.bit -------------------------------------------------------------------------------- /spi-flash-program-openocd/cpld/jtagspi.cfg: -------------------------------------------------------------------------------- 1 | set _USER1 0x02 2 | 3 | if { [info exists JTAGSPI_IR] } { 4 | set _JTAGSPI_IR $JTAGSPI_IR 5 | } else { 6 | set _JTAGSPI_IR $_USER1 7 | } 8 | 9 | if { [info exists TARGETNAME] } { 10 | set _TARGETNAME $TARGETNAME 11 | } else { 12 | set _TARGETNAME $_CHIPNAME.proxy 13 | } 14 | 15 | if { [info exists FLASHNAME] } { 16 | set _FLASHNAME $FLASHNAME 17 | } else { 18 | set _FLASHNAME $_CHIPNAME.spi 19 | } 20 | 21 | target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap 22 | flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR 23 | 24 | proc jtagspi_init {chain_id proxy_bit} { 25 | # load proxy bitstream $proxy_bit and probe spi flash 26 | global _FLASHNAME 27 | pld load $chain_id $proxy_bit 28 | reset halt 29 | flash probe $_FLASHNAME 30 | } 31 | 32 | proc jtagspi_program {bin addr} { 33 | # write and verify binary file $bin at offset $addr 34 | global _FLASHNAME 35 | flash write_image erase $bin $addr 36 | flash verify_bank $_FLASHNAME $bin $addr 37 | } 38 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/cpld/xilinx-xc7.cfg: -------------------------------------------------------------------------------- 1 | # xilinx series 7 (artix, kintex, virtex) 2 | # http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME xc7 8 | } 9 | 10 | # the 4 top bits (28:31) are the die stepping/revisions. ignore it. 11 | jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \ 12 | -expected-id 0x03622093 \ 13 | -expected-id 0x03620093 \ 14 | -expected-id 0x037C4093 \ 15 | -expected-id 0x0362F093 \ 16 | -expected-id 0x037C8093 \ 17 | -expected-id 0x037C7093 \ 18 | -expected-id 0x037C3093 \ 19 | -expected-id 0x0362E093 \ 20 | -expected-id 0x037C2093 \ 21 | -expected-id 0x0362D093 \ 22 | -expected-id 0x0362C093 \ 23 | -expected-id 0x03632093 \ 24 | -expected-id 0x03631093 \ 25 | -expected-id 0x03636093 \ 26 | -expected-id 0x03647093 \ 27 | -expected-id 0x0364C093 \ 28 | -expected-id 0x03651093 \ 29 | -expected-id 0x03747093 \ 30 | -expected-id 0x03656093 \ 31 | -expected-id 0x03752093 \ 32 | -expected-id 0x03751093 \ 33 | -expected-id 0x03671093 \ 34 | -expected-id 0x036B3093 \ 35 | -expected-id 0x036B7093 \ 36 | -expected-id 0x036BB093 \ 37 | -expected-id 0x036BF093 \ 38 | -expected-id 0x03667093 \ 39 | -expected-id 0x03682093 \ 40 | -expected-id 0x03687093 \ 41 | -expected-id 0x03692093 \ 42 | -expected-id 0x03691093 \ 43 | -expected-id 0x03696093 \ 44 | -expected-id 0x036D5093 \ 45 | -expected-id 0x036D9093 \ 46 | -expected-id 0x036DB093 47 | 48 | pld device virtex2 $_CHIPNAME.tap 1 49 | 50 | set XC7_JSHUTDOWN 0x0d 51 | set XC7_JPROGRAM 0x0b 52 | set XC7_JSTART 0x0c 53 | set XC7_BYPASS 0x3f 54 | 55 | proc xc7_program {tap} { 56 | global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS 57 | irscan $tap $XC7_JSHUTDOWN 58 | irscan $tap $XC7_JPROGRAM 59 | runtest 60000 60 | #JSTART prevents this from working... 61 | #irscan $tap $XC7_JSTART 62 | runtest 2000 63 | irscan $tap $XC7_BYPASS 64 | runtest 2000 65 | } 66 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/flash.cfg: -------------------------------------------------------------------------------- 1 | adapter driver ft232r 2 | transport select jtag 3 | ft232r_vid_pid 0x0403 0x6015 4 | ft232r_jtag_nums 0 3 1 2 5 | reset_config none 6 | 7 | source [find cpld/xilinx-xc7.cfg] 8 | source [find cpld/jtagspi.cfg] 9 | 10 | adapter speed 10000 11 | 12 | proc fpga_program {} { 13 | global _CHIPNAME 14 | xc7_program $_CHIPNAME.tap 15 | } 16 | 17 | init 18 | jtagspi_init 0 bscan_spi_xc7a50t.bit 19 | jtagspi_program image.bin 0x0 20 | fpga_program 21 | shutdown 22 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/go.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | date 4 | 5 | # Unload problematic drivers 6 | sudo rmmod ftdi_sio > /dev/null 7 | sudo rmmod usbserial > /dev/null 8 | 9 | # Program flash 10 | sudo ./openocd -f flash.cfg 11 | 12 | #Done 13 | date 14 | 15 | 16 | 17 | 18 | 19 | 20 | -------------------------------------------------------------------------------- /spi-flash-program-openocd/image.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-flash-program-openocd/image.bin -------------------------------------------------------------------------------- /spi-flash-program-openocd/openocd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-flash-program-openocd/openocd -------------------------------------------------------------------------------- /spi-loader/README.md: -------------------------------------------------------------------------------- 1 | # spi-loader 2 | 3 | Flash programming over PCIe using AXI SPI block 4 | 5 | ## Limitations 6 | - Linux-only standalone executable 7 | - Only works with S25FL-K parts 8 | - Partial sector programming is not supported. Entire sectors are erased, enough to fit the amount of data being programmed, 9 | then the data is programmed. If the data doesn't exactly fill a sector on either end, the erased data will not be restored. 10 | - Sector protection/unprotection unsupported 11 | - Tested on Ubuntu 18.04 only 12 | 13 | 14 | ## Performance 15 | 16 | Expect about 100MB/s total programming speed (this includes the erase). The SPI flash is clocked at 50MHz. 17 | 18 | ## Usage 19 | ``` 20 | spi-loader V1.2 copyright 2019 RHS Research LLC 21 | Usage: spi-loader [-a flashaddr] [-b fileoffset] [-l len] [-d device] [-r deviceoffset] [-f binary file] [-m mcs file] 22 | Loads len bytes from file at fileoffset into flash at address flashaddr 23 | 24 | Programming specification options 25 | -a: Address of first byte in flash to overwrite 26 | -b: Byte index into file to start reading (default to 0) 27 | -l: Number of bytes to write (default of 0 means write all bytes in file) 28 | -f: Data file to load (raw binary) 29 | -m: Data file to load (MCS) 30 | AXI-SPI core access configuration options 31 | -d: Device filename where SPI core can be accessed 32 | -r: Address (offset) of AXI-SPI core in device file 33 | Other options 34 | -v: Verify after programming 35 | Note: Numeric values default to decimal, unless prefixed with 0x 36 | ``` 37 | 38 | ## Supporting FPGA project block diagram 39 | ![block diagram](./doc-images/block-diagram.png) 40 | 41 | Constraints: 42 | ``` 43 | ############################################################################### 44 | # SPI 45 | ############################################################################### 46 | set_property PACKAGE_PIN P22 [get_ports {SPI_0_io0_io}] 47 | set_property PACKAGE_PIN R22 [get_ports {SPI_0_io1_io}] 48 | set_property PACKAGE_PIN P21 [get_ports {SPI_0_io2_io}] 49 | set_property PACKAGE_PIN R21 [get_ports {SPI_0_io3_io}] 50 | 51 | set_property IOSTANDARD LVCMOS33 [get_ports {SPI_0_io0_io}] 52 | set_property IOSTANDARD LVCMOS33 [get_ports {SPI_0_io1_io}] 53 | set_property IOSTANDARD LVCMOS33 [get_ports {SPI_0_io2_io}] 54 | set_property IOSTANDARD LVCMOS33 [get_ports {SPI_0_io3_io}] 55 | 56 | set_property PACKAGE_PIN T19 [get_ports {real_spi_ss}] 57 | set_property IOSTANDARD LVCMOS33 [get_ports {real_spi_ss}] 58 | 59 | set_property PACKAGE_PIN U21 [get_ports {SPI_0_ss_t}] 60 | set_property IOSTANDARD LVCMOS33 [get_ports {SPI_0_ss_t}] 61 | ``` 62 | 63 | ## Required SPI block configuration 64 | ![spi block config](./doc-images/axi-quad-cfg.png) 65 | 66 | To get AXI-Lite interface from PCIe block: 67 | ![pcie block config](./doc-images/pcie-cfg.png) 68 | 69 | 70 | ## Dependencies 71 | 72 | C++11 compiler and cmake. 73 | 74 | -------------------------------------------------------------------------------- /spi-loader/doc-images/axi-quad-cfg.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-loader/doc-images/axi-quad-cfg.png -------------------------------------------------------------------------------- /spi-loader/doc-images/block-diagram.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-loader/doc-images/block-diagram.png -------------------------------------------------------------------------------- /spi-loader/doc-images/pcie-cfg.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RHSResearchLLC/PicoEVB/cf060725d5b2a1a14fee4dcd1bcf7778aca0898e/spi-loader/doc-images/pcie-cfg.png -------------------------------------------------------------------------------- /spi-loader/linux/.gitignore: -------------------------------------------------------------------------------- 1 | # Slickedit 2 | *.vtg 3 | *.vpwhistu 4 | 5 | # Outputs 6 | sw/build/* 7 | 8 | #------------- 9 | 10 | # Prerequisites 11 | *.d 12 | 13 | # Object files 14 | *.o 15 | *.ko 16 | *.obj 17 | *.elf 18 | 19 | # Linker output 20 | *.ilk 21 | *.map 22 | *.exp 23 | 24 | # Precompiled Headers 25 | *.gch 26 | *.pch 27 | 28 | # Libraries 29 | *.lib 30 | *.a 31 | *.la 32 | *.lo 33 | 34 | # Shared objects (inc. Windows DLLs) 35 | *.dll 36 | *.so 37 | *.so.* 38 | *.dylib 39 | 40 | # Executables 41 | *.exe 42 | *.out 43 | *.app 44 | *.i*86 45 | *.x86_64 46 | *.hex 47 | 48 | # Debug files 49 | *.dSYM/ 50 | *.su 51 | *.idb 52 | *.pdb 53 | 54 | # Kernel Module Compile Results 55 | *.mod* 56 | *.cmd 57 | .tmp_versions/ 58 | modules.order 59 | Module.symvers 60 | Mkfile.old 61 | dkms.conf 62 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.0) 2 | project(spi-loader_project) 3 | 4 | 5 | ############################################################################### 6 | ## CMAKE config ############################################################### 7 | ############################################################################### 8 | 9 | 10 | ############################################################################### 11 | ## Project sources ############################################################ 12 | ############################################################################### 13 | 14 | file(GLOB_RECURSE sources lib/src/*.c lib/common/*.c app-linux/*.c) 15 | 16 | ############################################################################### 17 | ## target definitions ######################################################### 18 | ############################################################################### 19 | 20 | # add the data to the target, so it becomes visible in some IDE 21 | add_executable(spi-loader ${sources} app-linux/Main.cpp) 22 | 23 | # just for spi-loader add some compiler flags 24 | target_compile_options(spi-loader PUBLIC -Wall -Wextra -Wno-unused-function -g) 25 | 26 | # this lets me include files relative to the root src dir with a <> pair 27 | target_include_directories(spi-loader PUBLIC app-linux/config lib/common lib/src) 28 | 29 | # spi-loader needs C++17. 30 | # Needed for static constexpr in header only 31 | set_target_properties(spi-loader PROPERTIES 32 | CXX_STANDARD 11 33 | CMAKE_CXX_STANDARD_REQUIRED ON 34 | CXX_EXTENSIONS OFF 35 | ) 36 | 37 | ############################################################################### 38 | ## dependencies ############################################################### 39 | ############################################################################### 40 | 41 | target_link_libraries(spi-loader PUBLIC 42 | # here you can add any library dependencies 43 | ) 44 | 45 | 46 | ############################################################################### 47 | ## packaging ################################################################## 48 | ############################################################################### 49 | 50 | # all install commands get the same destination. this allows us to use paths 51 | # relative to the executable. 52 | install(TARGETS spi-loader DESTINATION spi-loader_destination) 53 | 54 | # this is basically a repeat of the file copy instruction that copies the 55 | # resources in the build directory, but here we tell cmake that we want it 56 | # in the package 57 | install(DIRECTORY resources DESTINATION spi-loader_destination) 58 | 59 | # now comes everything we need, to create a package 60 | # there are a lot more variables you can set, and some 61 | # you need to set for some package types, but we want to 62 | # be minimal here 63 | set(CPACK_PACKAGE_NAME "Myspi-loader") 64 | set(CPACK_PACKAGE_VERSION "1.0.0") 65 | 66 | # we don't want to split our program up into several things 67 | set(CPACK_MONOLITHIC_INSTALL 1) 68 | 69 | # This must be last 70 | include(CPack) 71 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/common/xil_io.c: -------------------------------------------------------------------------------- 1 | #include "xil_io.h" 2 | 3 | #include // pread/pwrite 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | 10 | // Defined somewhere else 11 | extern const char* gAXI_FNAME; 12 | 13 | // Static data 14 | static int sfAXI = -1; 15 | static int sComplained = 0; 16 | 17 | // Static functions 18 | static int CheckAndOpen(void) 19 | { 20 | if (sfAXI < 0) 21 | { 22 | sfAXI = open(gAXI_FNAME, O_RDWR); 23 | } 24 | 25 | if ((sfAXI < 0) && !sComplained) 26 | { 27 | printf("Error opening device %s:%s", gAXI_FNAME, strerror(errno)); 28 | sComplained = 1; 29 | } 30 | 31 | return (sfAXI >= 0); 32 | } 33 | 34 | //------------------------------------------------------------------------------------------------- 35 | // Xil_In32 36 | //------------------------------------------------------------------------------------------------- 37 | u32 Xil_In32(UINTPTR Addr) 38 | { 39 | u32 rez; 40 | if(CheckAndOpen()) 41 | { 42 | ssize_t nread = pread(sfAXI, &rez, sizeof(rez), (off_t) Addr); 43 | if (nread != sizeof(rez)) 44 | { 45 | printf("Error writing to device:%s", strerror(errno)); 46 | } 47 | } 48 | return rez; 49 | } 50 | 51 | //------------------------------------------------------------------------------------------------- 52 | // Xil_In32 53 | //------------------------------------------------------------------------------------------------- 54 | void Xil_Out32(UINTPTR Addr, u32 Value) 55 | { 56 | if(CheckAndOpen()) 57 | { 58 | ssize_t nsent = pwrite(sfAXI, &Value, sizeof(Value), (off_t) Addr); 59 | if (nsent != sizeof(Value)) 60 | { 61 | printf("Error writing to device:%s", strerror(errno)); 62 | } 63 | } 64 | } 65 | 66 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/common/xil_io.h: -------------------------------------------------------------------------------- 1 | // IO interface using PCIe-AXI bridge 2 | 3 | #ifndef XIL_IO_H /* prevent circular inclusions */ 4 | #define XIL_IO_H /* by using protection macros */ 5 | 6 | #ifdef __cplusplus 7 | extern "C" { 8 | #endif 9 | 10 | /***************************** Include Files *********************************/ 11 | 12 | #include "xil_types.h" 13 | 14 | /*****************************************************************************/ 15 | /** 16 | * 17 | * @brief Performs an input operation for a memory location by 18 | * reading from the specified address and returning the 32 bit Value 19 | * read from that address. 20 | * 21 | * @param Addr: contains the address to perform the input operation 22 | * 23 | * @return The 32 bit Value read from the specified input address. 24 | * 25 | ******************************************************************************/ 26 | u32 Xil_In32(UINTPTR Addr); 27 | 28 | /*****************************************************************************/ 29 | /** 30 | * 31 | * @brief Performs an output operation for a memory location by writing the 32 | * 32 bit Value to the the specified address. 33 | * 34 | * @param Addr contains the address to perform the output operation 35 | * @param Value contains the 32 bit Value to be written at the specified 36 | * address. 37 | * 38 | * @return None. 39 | * 40 | ******************************************************************************/ 41 | void Xil_Out32(UINTPTR Addr, u32 Value); 42 | 43 | #ifdef __cplusplus 44 | } 45 | #endif 46 | 47 | #endif /* end of protection macro */ 48 | /** 49 | * @} End of "addtogroup common_io_interfacing_apis". 50 | */ 51 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/common/xil_printf.h: -------------------------------------------------------------------------------- 1 | #ifndef XIL_PRINTF_H 2 | #define XIL_PRINTF_H 3 | 4 | #include 5 | 6 | #define xil_printf printf 7 | 8 | 9 | #endif /* end of protection macro */ 10 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/readme.txt: -------------------------------------------------------------------------------- 1 | This folder holds files reused from Xilinx SDK at https://github.com/Xilinx/embeddedsw. Some files were modified some weren't. -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/src/xspi_i.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * 3 | * Copyright (C) 2001 - 2014 Xilinx, Inc. All rights reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy 6 | * of this software and associated documentation files (the "Software"), to deal 7 | * in the Software without restriction, including without limitation the rights 8 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | * copies of the Software, and to permit persons to whom the Software is 10 | * furnished to do so, subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in 13 | * all copies or substantial portions of the Software. 14 | * 15 | * Use of the Software is limited solely to applications: 16 | * (a) running on a Xilinx device, or 17 | * (b) that interact with a Xilinx device through a bus or interconnect. 18 | * 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 | * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 23 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 24 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 25 | * SOFTWARE. 26 | * 27 | * Except as contained in this notice, the name of the Xilinx shall not be used 28 | * in advertising or otherwise to promote the sale, use or other dealings in 29 | * this Software without prior written authorization from Xilinx. 30 | * 31 | ******************************************************************************/ 32 | /*****************************************************************************/ 33 | /** 34 | * 35 | * @file xspi_i.h 36 | * @addtogroup spi_v4_4 37 | * @{ 38 | * 39 | * This header file contains internal identifiers. It is intended for internal 40 | * use only. 41 | * 42 | *
43 | * MODIFICATION HISTORY:
44 | *
45 | * Ver   Who  Date     Changes
46 | * ----- ---- -------- -----------------------------------------------
47 | * 1.00a rpm  10/11/01 First release
48 | * 1.00b jhl  03/14/02 Repartitioned driver for smaller files.
49 | * 1.00b rpm  04/24/02 Moved register definitions to xspi_l.h
50 | * 1.11a wgr  03/22/07 Converted to new coding style.
51 | * 1.12a sv   03/28/08 Removed the Macro for statistics, moved the interrupt
52 | *                     register definitions and bit definitions to _l.h.
53 | * 2.00a sv   07/30/08 Removed the Macro for statistics, moved the interrupt
54 | *                     register definitions and bit definitions to _l.h.
55 | * 
56 | * 57 | ******************************************************************************/ 58 | 59 | #ifndef XSPI_I_H /* prevent circular inclusions */ 60 | #define XSPI_I_H /* by using protection macros */ 61 | 62 | #ifdef __cplusplus 63 | extern "C" { 64 | #endif 65 | 66 | /***************************** Include Files *********************************/ 67 | 68 | #include "xil_types.h" 69 | #include "xil_assert.h" 70 | #include "xspi_l.h" 71 | 72 | /************************** Constant Definitions *****************************/ 73 | 74 | /**************************** Type Definitions *******************************/ 75 | 76 | /***************** Macros (Inline Functions) Definitions *********************/ 77 | 78 | /************************** Function Prototypes ******************************/ 79 | 80 | void XSpi_Abort(XSpi *InstancePtr); 81 | 82 | /************************** Variable Definitions *****************************/ 83 | 84 | extern XSpi_Config XSpi_ConfigTable[]; 85 | 86 | #ifdef __cplusplus 87 | } 88 | #endif 89 | 90 | #endif /* end of protection macro */ 91 | /** @} */ 92 | -------------------------------------------------------------------------------- /spi-loader/linux/sw/lib/src/xspi_stats.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * 3 | * Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved. 4 | * 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy 6 | * of this software and associated documentation files (the "Software"), to deal 7 | * in the Software without restriction, including without limitation the rights 8 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | * copies of the Software, and to permit persons to whom the Software is 10 | * furnished to do so, subject to the following conditions: 11 | * 12 | * The above copyright notice and this permission notice shall be included in 13 | * all copies or substantial portions of the Software. 14 | * 15 | * Use of the Software is limited solely to applications: 16 | * (a) running on a Xilinx device, or 17 | * (b) that interact with a Xilinx device through a bus or interconnect. 18 | * 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 | * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 23 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 24 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 25 | * SOFTWARE. 26 | * 27 | * Except as contained in this notice, the name of the Xilinx shall not be used 28 | * in advertising or otherwise to promote the sale, use or other dealings in 29 | * this Software without prior written authorization from Xilinx. 30 | * 31 | ******************************************************************************/ 32 | /*****************************************************************************/ 33 | /** 34 | * 35 | * @file xspi_stats.c 36 | * @addtogroup spi_v4_4 37 | * @{ 38 | * 39 | * This component contains the implementation of statistics functions for the 40 | * XSpi driver component. 41 | * 42 | *
 43 | * MODIFICATION HISTORY:
 44 | *
 45 | * Ver   Who  Date     Changes
 46 | * ----- ---- -------- -----------------------------------------------
 47 | * 1.00b jhl  03/14/02 First release
 48 | * 1.00b rpm  04/25/02 Changed macro naming convention
 49 | * 1.11a wgr  03/22/07 Converted to new coding style.
 50 | * 1.12a sv   03/28/08 Removed the call to the Macro for clearing statistics.
 51 | * 2.00a sv   07/30/08 Removed the call to the Macro for clearing statistics.
 52 | * 3.00a ktn  10/28/09 Updated all the register accesses as 32 bit access.
 53 | *		      Updated driver to use the HAL APIs/macros.
 54 | * 
55 | * 56 | ******************************************************************************/ 57 | 58 | /***************************** Include Files *********************************/ 59 | 60 | #include "xspi.h" 61 | #include "xspi_i.h" 62 | 63 | /************************** Constant Definitions *****************************/ 64 | 65 | 66 | /**************************** Type Definitions *******************************/ 67 | 68 | 69 | /***************** Macros (Inline Functions) Definitions *********************/ 70 | 71 | 72 | /************************** Function Prototypes ******************************/ 73 | 74 | 75 | /************************** Variable Definitions *****************************/ 76 | 77 | 78 | /*****************************************************************************/ 79 | /** 80 | * 81 | * Gets a copy of the statistics for an SPI device. 82 | * 83 | * @param InstancePtr is a pointer to the XSpi instance to be worked on. 84 | * @param StatsPtr is a pointer to a XSpi_Stats structure which will get a 85 | * copy of current statistics. 86 | * 87 | * @return None. 88 | * 89 | * @note Statistics are not updated in polled mode of operation. 90 | * 91 | ******************************************************************************/ 92 | void XSpi_GetStats(XSpi *InstancePtr, XSpi_Stats *StatsPtr) 93 | { 94 | Xil_AssertVoid(InstancePtr != NULL); 95 | Xil_AssertVoid(StatsPtr != NULL); 96 | Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); 97 | 98 | StatsPtr->ModeFaults = InstancePtr->Stats.ModeFaults; 99 | StatsPtr->XmitUnderruns = InstancePtr->Stats.XmitUnderruns; 100 | StatsPtr->RecvOverruns = InstancePtr->Stats.RecvOverruns; 101 | StatsPtr->SlaveModeFaults = InstancePtr->Stats.SlaveModeFaults; 102 | StatsPtr->BytesTransferred = InstancePtr->Stats.BytesTransferred; 103 | StatsPtr->NumInterrupts = InstancePtr->Stats.NumInterrupts; 104 | } 105 | 106 | /*****************************************************************************/ 107 | /** 108 | * 109 | * Clears the statistics for the SPI device. 110 | * 111 | * @param InstancePtr is a pointer to the XSpi instance to be worked on. 112 | * 113 | * @return None. 114 | * 115 | * @note Statistics are not updated in polled mode of operation. 116 | * 117 | ******************************************************************************/ 118 | void XSpi_ClearStats(XSpi *InstancePtr) 119 | { 120 | Xil_AssertVoid(InstancePtr != NULL); 121 | Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); 122 | 123 | InstancePtr->Stats.ModeFaults = 0; 124 | InstancePtr->Stats.XmitUnderruns = 0; 125 | InstancePtr->Stats.RecvOverruns = 0; 126 | InstancePtr->Stats.SlaveModeFaults = 0; 127 | InstancePtr->Stats.BytesTransferred = 0; 128 | InstancePtr->Stats.NumInterrupts = 0; 129 | 130 | } 131 | /** @} */ 132 | --------------------------------------------------------------------------------