├── LICENSE ├── README.md ├── bin └── README.md ├── dev └── README.md ├── ipdesignguide ├── README.md ├── miniSRAM │ ├── README.md │ └── prj23-2x2sram28项目方案.pdf └── tutorial │ ├── inverter │ ├── REAME.md │ ├── design.ngspice │ ├── digital-inverter-openlane-gf180mcu.ipynb │ ├── images │ │ └── sim_inverter.png │ ├── inv_simulated.csv │ ├── inverter.sch │ ├── inverter.spice │ ├── inverter.sym │ ├── inverter2.spice │ ├── inverter_tb.sch │ ├── sm141064.ngspice │ └── xschemrc │ └── reference │ ├── CMOS电路模拟与设计-基于Hspice.pdf │ ├── Dual_Stage_CMOS_Operational_Amplifier_Design_in_Sky-Water_130nm_Technology.pdf │ ├── LTspiceGettingStartedGuide.pdf │ └── README.md ├── libraries └── README.md ├── openlane └── README.md ├── prj23_sky130sramip0 ├── P00_projectreport │ ├── .keep │ ├── 20230115-report-sram compiler plan-v0.1.pdf │ └── 20230129-report-sram compiler plan-v0.2.pdf ├── P01_projectinitial │ ├── design requirement-202301.md │ ├── sram ip spec-v0.1-20230117.md │ └── trendsoffullcustomdesign.md └── P02_refdesign │ ├── README.md │ └── sim │ └── README.md ├── ref └── README.md ├── scripts └── README.md └── xscheme ├── 6t.sch ├── 6t.spice ├── INV.sch ├── INV.spice ├── README.md ├── env.sh ├── untitled-1.sch ├── untitled.sch ├── xschem_sky130 ├── README.md ├── decred_hash_macro │ ├── LICENSE │ ├── README.md │ ├── decred_controller.sch │ ├── decred_controller.spice │ ├── decred_controller.sym │ ├── decred_controller.v │ ├── decred_hash_macro.png │ ├── decred_hash_macro.sch │ ├── decred_hash_macro.spice │ ├── decred_hash_macro.sym │ ├── decred_hash_macro.v │ ├── decred_hash_macro_2.png │ ├── make_sch_from_spice.awk │ ├── test1.spice │ ├── test2.spice │ ├── user_project_wrapper.sch │ ├── user_project_wrapper.spice │ ├── user_project_wrapper.sym │ └── user_project_wrapper.v ├── mips_cpu │ ├── README.md │ ├── alu.sch │ ├── alu.sym │ ├── aludec.sch │ ├── aludec.sym │ ├── controller.sch │ ├── controller.sym │ ├── datapath.sch │ ├── datapath.sym │ ├── dmem.sch │ ├── dmem.sym │ ├── imem.sch │ ├── imem.sym │ ├── maindec.sch │ ├── maindec.sym │ ├── mips.sch │ ├── mips.sym │ ├── regfile.sch │ ├── regfile.sym │ ├── sign_extend.sch │ ├── sign_extend.sym │ ├── tb.sch │ ├── tb.sym │ ├── top.sch │ └── top.sym ├── scripts │ ├── add_highlight_attr.awk │ ├── add_propagate_to.awk │ ├── add_version.awk │ ├── create_images.tcl │ ├── create_png │ ├── remove_empty_lines.awk │ └── sky130_models.tcl ├── sky130_fd_pr.patch ├── sky130_fd_pr │ ├── README.md │ ├── cap_mim_m3_1.sym │ ├── cap_mim_m3_2.sym │ ├── cap_var_hvt.sym │ ├── cap_var_lvt.sym │ ├── corner.sym │ ├── diode.sym │ ├── doc │ │ ├── cap_mim_m3_1.svg │ │ ├── cap_mim_m3_2.svg │ │ ├── cap_var_hvt.svg │ │ ├── cap_var_lvt.svg │ │ ├── devices.png │ │ ├── devices.svg │ │ ├── diode.svg │ │ ├── lvsdiode.svg │ │ ├── nfet3_01v8.svg │ │ ├── nfet3_01v8_lvt.svg │ │ ├── nfet3_03v3_nvt.svg │ │ ├── nfet3_05v0_nvt.svg │ │ ├── nfet3_20v0.svg │ │ ├── nfet3_g5v0d10v5.svg │ │ ├── nfet3_g5v0d16v0.svg │ │ ├── nfet_01v8.svg │ │ ├── nfet_01v8_esd.svg │ │ ├── nfet_01v8_lvt.svg │ │ ├── nfet_03v3_nvt.svg │ │ ├── nfet_05v0_nvt.svg │ │ ├── nfet_20v0.svg │ │ ├── nfet_20v0_iso.svg │ │ ├── nfet_20v0_nvt.svg │ │ ├── nfet_20v0_zvt.svg │ │ ├── nfet_g5v0d10v5.svg │ │ ├── nfet_g5v0d10v5_esd.svg │ │ ├── nfet_g5v0d10v5_nvt_esd.svg │ │ ├── nfet_g5v0d16v0.svg │ │ ├── npn_05v5.svg │ │ ├── pfet3_01v8.svg │ │ ├── pfet3_01v8_hvt.svg │ │ ├── pfet3_01v8_lvt.svg │ │ ├── pfet3_20v0.svg │ │ ├── pfet3_g5v0d10v5.svg │ │ ├── pfet3_g5v0d16v0.svg │ │ ├── pfet_01v8.svg │ │ ├── pfet_01v8_hvt.svg │ │ ├── pfet_01v8_lvt.svg │ │ ├── pfet_20v0.svg │ │ ├── pfet_g5v0d10v5.svg │ │ ├── pfet_g5v0d16v0.svg │ │ ├── pnp_05v5.svg │ │ ├── res_generic_nd.svg │ │ ├── res_generic_pd.svg │ │ ├── res_generic_po.svg │ │ ├── res_high_po.svg │ │ ├── res_high_po_0p35.svg │ │ ├── res_high_po_0p69.svg │ │ ├── res_high_po_1p41.svg │ │ ├── res_iso_pw.svg │ │ ├── res_xhigh_po.svg │ │ ├── res_xhigh_po_0p35.svg │ │ ├── res_xhigh_po_0p69.svg │ │ ├── res_xhigh_po_1p41.svg │ │ └── vpp_cap.svg │ ├── lvsdiode.sym │ ├── nfet3_01v8.sym │ ├── nfet3_01v8_lvt.sym │ ├── nfet3_03v3_nvt.sym │ ├── nfet3_05v0_nvt.sym │ ├── nfet3_20v0.sym │ ├── nfet3_g5v0d10v5.sym │ ├── nfet3_g5v0d16v0.sym │ ├── nfet_01v8.sym │ ├── nfet_01v8_esd.sym │ ├── nfet_01v8_lvt.sym │ ├── nfet_01v8_lvt_nf.sym │ ├── nfet_01v8_nf.sym │ ├── nfet_03v3_nvt.sym │ ├── nfet_03v3_nvt_nf.sym │ ├── nfet_05v0_nvt.sym │ ├── nfet_05v0_nvt_nf.sym │ ├── nfet_20v0.sym │ ├── nfet_20v0_iso.sym │ ├── nfet_20v0_nvt.sym │ ├── nfet_20v0_zvt.sym │ ├── nfet_g5v0d10v5.sym │ ├── nfet_g5v0d10v5_esd.sym │ ├── nfet_g5v0d10v5_nf.sym │ ├── nfet_g5v0d10v5_nvt_esd.sym │ ├── nfet_g5v0d16v0.sym │ ├── nfet_g5v0d16v0_nf.sym │ ├── npn_05v5.sym │ ├── pfet3_01v8.sym │ ├── pfet3_01v8_hvt.sym │ ├── pfet3_01v8_lvt.sym │ ├── pfet3_20v0.sym │ ├── pfet3_g5v0d10v5.sym │ ├── pfet3_g5v0d16v0.sym │ ├── pfet_01v8.sym │ ├── pfet_01v8_hvt.sym │ ├── pfet_01v8_hvt_nf.sym │ ├── pfet_01v8_lvt.sym │ ├── pfet_01v8_lvt_nf.sym │ ├── pfet_01v8_nf.sym │ ├── pfet_20v0.sym │ ├── pfet_g5v0d10v5.sym │ ├── pfet_g5v0d10v5_nf.sym │ ├── pfet_g5v0d16v0.sym │ ├── pfet_g5v0d16v0_nf.sym │ ├── pnp_05v5.sym │ ├── reram.sym │ ├── res_generic_l1.sym │ ├── res_generic_m1.sym │ ├── res_generic_m2.sym │ ├── res_generic_m3.sym │ ├── res_generic_m4.sym │ ├── res_generic_m5.sym │ ├── res_generic_nd.sym │ ├── res_generic_pd.sym │ ├── res_generic_po.sym │ ├── res_high_po.sym │ ├── res_high_po_0p35.sym │ ├── res_high_po_0p69.sym │ ├── res_high_po_1p41.sym │ ├── res_high_po_2p85.sym │ ├── res_high_po_5p73.sym │ ├── res_iso_pw.sym │ ├── res_xhigh_po.sym │ ├── res_xhigh_po_0p35.sym │ ├── res_xhigh_po_0p69.sym │ ├── res_xhigh_po_1p41.sym │ ├── res_xhigh_po_2p85.sym │ ├── res_xhigh_po_5p73.sym │ └── vpp_cap.sym ├── sky130_stdcells │ ├── README.md │ ├── a2111o_1.sym │ ├── a2111o_2.sym │ ├── a2111o_4.sym │ ├── a2111oi_0.sym │ ├── a2111oi_1.sym │ ├── a2111oi_2.sym │ ├── a2111oi_4.sym │ ├── a211o_1.sym │ ├── a211o_2.sym │ ├── a211o_4.sym │ ├── a211oi_1.sym │ ├── a211oi_2.sym │ ├── a211oi_4.sym │ ├── a21bo_1.sym │ ├── a21bo_2.sym │ ├── a21bo_4.sym │ ├── a21boi_0.sym │ ├── a21boi_1.sym │ ├── a21boi_2.sym │ ├── a21boi_4.sym │ ├── a21o_1.sym │ ├── a21o_2.sym │ ├── a21o_4.sym │ ├── a21oi_1.sym │ ├── a21oi_2.sym │ ├── a21oi_4.sym │ ├── a221o_1.sym │ ├── a221o_2.sym │ ├── a221o_4.sym │ ├── a221oi_1.sym │ ├── a221oi_2.sym │ ├── a221oi_4.sym │ ├── a222oi_1.sym │ ├── a22o_1.sym │ ├── a22o_2.sym │ ├── a22o_4.sym │ ├── a22oi_1.sym │ ├── a22oi_2.sym │ ├── a22oi_4.sym │ ├── a2bb2o_1.sym │ ├── a2bb2o_2.sym │ ├── a2bb2o_4.sym │ ├── a2bb2oi_1.sym │ ├── a2bb2oi_2.sym │ ├── a2bb2oi_4.sym │ ├── a311o_1.sym │ ├── a311o_2.sym │ ├── a311o_4.sym │ ├── a311oi_1.sym │ ├── a311oi_2.sym │ ├── a311oi_4.sym │ ├── a31o_1.sym │ ├── a31o_2.sym │ ├── a31o_4.sym │ ├── a31oi_1.sym │ ├── a31oi_2.sym │ ├── a31oi_4.sym │ ├── a32o_1.sym │ ├── a32o_2.sym │ ├── a32o_4.sym │ ├── a32oi_1.sym │ ├── a32oi_2.sym │ ├── a32oi_4.sym │ ├── a41o_1.sym │ ├── a41o_2.sym │ ├── a41o_4.sym │ ├── a41oi_1.sym │ ├── a41oi_2.sym │ ├── a41oi_4.sym │ ├── and2_0.sym │ ├── and2_1.sym │ ├── and2_2.sym │ ├── and2_4.sym │ ├── and2b_1.sym │ ├── and2b_2.sym │ ├── and2b_4.sym │ ├── and3_1.sym │ ├── and3_2.sym │ ├── and3_4.sym │ ├── and3b_1.sym │ ├── and3b_2.sym │ ├── and3b_4.sym │ ├── and4_1.sym │ ├── and4_2.sym │ ├── and4_4.sym │ ├── and4b_1.sym │ ├── and4b_2.sym │ ├── and4b_4.sym │ ├── and4bb_1.sym │ ├── and4bb_2.sym │ ├── and4bb_4.sym │ ├── buf_1.sym │ ├── buf_12.sym │ ├── buf_16.sym │ ├── buf_2.sym │ ├── buf_4.sym │ ├── buf_6.sym │ ├── buf_8.sym │ ├── bufbuf_16.sym │ ├── bufbuf_8.sym │ ├── bufinv_16.sym │ ├── bufinv_8.sym │ ├── clkbuf_1.sym │ ├── clkbuf_16.sym │ ├── clkbuf_2.sym │ ├── clkbuf_4.sym │ ├── clkbuf_8.sym │ ├── clkdlybuf4s15_1.sym │ ├── clkdlybuf4s15_2.sym │ ├── clkdlybuf4s18_1.sym │ ├── clkdlybuf4s18_2.sym │ ├── clkdlybuf4s25_1.sym │ ├── clkdlybuf4s25_2.sym │ ├── clkdlybuf4s50_1.sym │ ├── clkdlybuf4s50_2.sym │ ├── clkinv_1.sym │ ├── clkinv_16.sym │ ├── clkinv_2.sym │ ├── clkinv_4.sym │ ├── clkinv_8.sym │ ├── clkinvlp_2.sym │ ├── clkinvlp_4.sym │ ├── conb_1.sym │ ├── decap_12.sym │ ├── decap_3.sym │ ├── decap_4.sym │ ├── decap_6.sym │ ├── decap_8.sym │ ├── dfbbn_1.sym │ ├── dfbbn_2.sym │ ├── dfbbp_1.sym │ ├── dfrbp_1.sym │ ├── dfrbp_2.sym │ ├── dfrtn_1.sym │ ├── dfrtp_1.sym │ ├── dfrtp_2.sym │ ├── dfrtp_4.sym │ ├── dfsbp_1.sym │ ├── dfsbp_2.sym │ ├── dfstp_1.sym │ ├── dfstp_2.sym │ ├── dfstp_4.sym │ ├── dfxbp_1.sym │ ├── dfxbp_2.sym │ ├── dfxtp_1.sym │ ├── dfxtp_2.sym │ ├── dfxtp_4.sym │ ├── diode_2.sym │ ├── dlclkp_1.sym │ ├── dlclkp_2.sym │ ├── dlclkp_4.sym │ ├── dlrbn_1.sym │ ├── dlrbn_2.sym │ ├── dlrbp_1.sym │ ├── dlrbp_2.sym │ ├── dlrtn_1.sym │ ├── dlrtn_2.sym │ ├── dlrtn_4.sym │ ├── dlrtp_1.sym │ ├── dlrtp_2.sym │ ├── dlrtp_4.sym │ ├── dlxbn_1.sym │ ├── dlxbn_2.sym │ ├── dlxbp_1.sym │ ├── dlxtn_1.sym │ ├── dlxtn_2.sym │ ├── dlxtn_4.sym │ ├── dlxtp_1.sym │ ├── dlygate4sd1_1.sym │ ├── dlygate4sd2_1.sym │ ├── dlygate4sd3_1.sym │ ├── dlymetal6s2s_1.sym │ ├── dlymetal6s4s_1.sym │ ├── dlymetal6s6s_1.sym │ ├── doc │ │ ├── gates.svg │ │ └── test_sim.png │ ├── ebufn_1.sym │ ├── ebufn_2.sym │ ├── ebufn_4.sym │ ├── ebufn_8.sym │ ├── edfxbp_1.sym │ ├── edfxtp_1.sym │ ├── einvn_0.sym │ ├── einvn_1.sym │ ├── einvn_2.sym │ ├── einvn_4.sym │ ├── einvn_8.sym │ ├── einvp_1.sym │ ├── einvp_2.sym │ ├── einvp_4.sym │ ├── einvp_8.sym │ ├── fa_1.sym │ ├── fa_2.sym │ ├── fa_4.sym │ ├── fah_1.sym │ ├── fahcin_1.sym │ ├── fahcon_1.sym │ ├── fill_1.sym │ ├── fill_2.sym │ ├── fill_4.sym │ ├── fill_8.sym │ ├── ha_1.sym │ ├── ha_2.sym │ ├── ha_4.sym │ ├── inv_1.sym │ ├── inv_12.sym │ ├── inv_16.sym │ ├── inv_2.sym │ ├── inv_4.sym │ ├── inv_6.sym │ ├── inv_8.sym │ ├── lpflow_bleeder_1.sym │ ├── lpflow_clkbufkapwr_1.sym │ ├── lpflow_clkbufkapwr_16.sym │ ├── lpflow_clkbufkapwr_2.sym │ ├── lpflow_clkbufkapwr_4.sym │ ├── lpflow_clkbufkapwr_8.sym │ ├── lpflow_clkinvkapwr_1.sym │ ├── lpflow_clkinvkapwr_16.sym │ ├── lpflow_clkinvkapwr_2.sym │ ├── lpflow_clkinvkapwr_4.sym │ ├── lpflow_clkinvkapwr_8.sym │ ├── lpflow_decapkapwr_12.sym │ ├── lpflow_decapkapwr_3.sym │ ├── lpflow_decapkapwr_4.sym │ ├── lpflow_decapkapwr_6.sym │ ├── lpflow_decapkapwr_8.sym │ ├── lpflow_inputiso0n_1.sym │ ├── lpflow_inputiso0p_1.sym │ ├── lpflow_inputiso1n_1.sym │ ├── lpflow_inputiso1p_1.sym │ ├── lpflow_inputisolatch_1.sym │ ├── lpflow_isobufsrc_1.sym │ ├── lpflow_isobufsrc_16.sym │ ├── lpflow_isobufsrc_2.sym │ ├── lpflow_isobufsrc_4.sym │ ├── lpflow_isobufsrc_8.sym │ ├── lpflow_isobufsrckapwr_16.sym │ ├── lpflow_lsbuf_lh_hl_isowell_tap_1.sym │ ├── lpflow_lsbuf_lh_hl_isowell_tap_2.sym │ ├── lpflow_lsbuf_lh_hl_isowell_tap_4.sym │ ├── lpflow_lsbuf_lh_isowell_4.sym │ ├── lpflow_lsbuf_lh_isowell_tap_1.sym │ ├── lpflow_lsbuf_lh_isowell_tap_2.sym │ ├── lpflow_lsbuf_lh_isowell_tap_4.sym │ ├── macro_sparecell.sym │ ├── maj3_1.sym │ ├── maj3_2.sym │ ├── maj3_4.sym │ ├── mux2_1.sym │ ├── mux2_2.sym │ ├── mux2_4.sym │ ├── mux2_8.sym │ ├── mux2i_1.sym │ ├── mux2i_2.sym │ ├── mux2i_4.sym │ ├── mux4_1.sym │ ├── mux4_2.sym │ ├── mux4_4.sym │ ├── nand2_1.sym │ ├── nand2_2.sym │ ├── nand2_4.sym │ ├── nand2_8.sym │ ├── nand2b_1.sym │ ├── nand2b_2.sym │ ├── nand2b_4.sym │ ├── nand3_1.sym │ ├── nand3_2.sym │ ├── nand3_4.sym │ ├── nand3b_1.sym │ ├── nand3b_2.sym │ ├── nand3b_4.sym │ ├── nand4_1.sym │ ├── nand4_2.sym │ ├── nand4_4.sym │ ├── nand4b_1.sym │ ├── nand4b_2.sym │ ├── nand4b_4.sym │ ├── nand4bb_1.sym │ ├── nand4bb_2.sym │ ├── nand4bb_4.sym │ ├── nor2_1.sym │ ├── nor2_2.sym │ ├── nor2_4.sym │ ├── nor2_8.sym │ ├── nor2b_1.sym │ ├── nor2b_2.sym │ ├── nor2b_4.sym │ ├── nor3_1.sym │ ├── nor3_2.sym │ ├── nor3_4.sym │ ├── nor3b_1.sym │ ├── nor3b_2.sym │ ├── nor3b_4.sym │ ├── nor4_1.sym │ ├── nor4_2.sym │ ├── nor4_4.sym │ ├── nor4b_1.sym │ ├── nor4b_2.sym │ ├── nor4b_4.sym │ ├── nor4bb_1.sym │ ├── nor4bb_2.sym │ ├── nor4bb_4.sym │ ├── o2111a_1.sym │ ├── o2111a_2.sym │ ├── o2111a_4.sym │ ├── o2111ai_1.sym │ ├── o2111ai_2.sym │ ├── o2111ai_4.sym │ ├── o211a_1.sym │ ├── o211a_2.sym │ ├── o211a_4.sym │ ├── o211ai_1.sym │ ├── o211ai_2.sym │ ├── o211ai_4.sym │ ├── o21a_1.sym │ ├── o21a_2.sym │ ├── o21a_4.sym │ ├── o21ai_0.sym │ ├── o21ai_1.sym │ ├── o21ai_2.sym │ ├── o21ai_4.sym │ ├── o21ba_1.sym │ ├── o21ba_2.sym │ ├── o21ba_4.sym │ ├── o21bai_1.sym │ ├── o21bai_2.sym │ ├── o21bai_4.sym │ ├── o221a_1.sym │ ├── o221a_2.sym │ ├── o221a_4.sym │ ├── o221ai_1.sym │ ├── o221ai_2.sym │ ├── o221ai_4.sym │ ├── o22a_1.sym │ ├── o22a_2.sym │ ├── o22a_4.sym │ ├── o22ai_1.sym │ ├── o22ai_2.sym │ ├── o22ai_4.sym │ ├── o2bb2a_1.sym │ ├── o2bb2a_2.sym │ ├── o2bb2a_4.sym │ ├── o2bb2ai_1.sym │ ├── o2bb2ai_2.sym │ ├── o2bb2ai_4.sym │ ├── o311a_1.sym │ ├── o311a_2.sym │ ├── o311a_4.sym │ ├── o311ai_0.sym │ ├── o311ai_1.sym │ ├── o311ai_2.sym │ ├── o311ai_4.sym │ ├── o31a_1.sym │ ├── o31a_2.sym │ ├── o31a_4.sym │ ├── o31ai_1.sym │ ├── o31ai_2.sym │ ├── o31ai_4.sym │ ├── o32a_1.sym │ ├── o32a_2.sym │ ├── o32a_4.sym │ ├── o32ai_1.sym │ ├── o32ai_2.sym │ ├── o32ai_4.sym │ ├── o41a_1.sym │ ├── o41a_2.sym │ ├── o41a_4.sym │ ├── o41ai_1.sym │ ├── o41ai_2.sym │ ├── o41ai_4.sym │ ├── or2_0.sym │ ├── or2_1.sym │ ├── or2_2.sym │ ├── or2_4.sym │ ├── or2b_1.sym │ ├── or2b_2.sym │ ├── or2b_4.sym │ ├── or3_1.sym │ ├── or3_2.sym │ ├── or3_4.sym │ ├── or3b_1.sym │ ├── or3b_2.sym │ ├── or3b_4.sym │ ├── or4_1.sym │ ├── or4_2.sym │ ├── or4_4.sym │ ├── or4b_1.sym │ ├── or4b_2.sym │ ├── or4b_4.sym │ ├── or4bb_1.sym │ ├── or4bb_2.sym │ ├── or4bb_4.sym │ ├── probe_p_8.sym │ ├── probec_p_8.sym │ ├── scripts │ │ ├── create_variants.awk │ │ ├── place_all_gates.awk │ │ └── resize.awk │ ├── sdfbbn_1.sym │ ├── sdfbbn_2.sym │ ├── sdfbbp_1.sym │ ├── sdfrbp_1.sym │ ├── sdfrbp_2.sym │ ├── sdfrtn_1.sym │ ├── sdfrtp_1.sym │ ├── sdfrtp_2.sym │ ├── sdfrtp_4.sym │ ├── sdfsbp_1.sym │ ├── sdfsbp_2.sym │ ├── sdfstp_1.sym │ ├── sdfstp_2.sym │ ├── sdfstp_4.sym │ ├── sdfxbp_1.sym │ ├── sdfxbp_2.sym │ ├── sdfxtp_1.sym │ ├── sdfxtp_2.sym │ ├── sdfxtp_4.sym │ ├── sdlclkp_1.sym │ ├── sdlclkp_2.sym │ ├── sdlclkp_4.sym │ ├── sedfxbp_1.sym │ ├── sedfxbp_2.sym │ ├── sedfxtp_1.sym │ ├── sedfxtp_2.sym │ ├── sedfxtp_4.sym │ ├── tap_1.sym │ ├── tap_2.sym │ ├── tapvgnd2_1.sym │ ├── tapvgnd_1.sym │ ├── tapvpwrvgnd_1.sym │ ├── xnor2_1.sym │ ├── xnor2_2.sym │ ├── xnor2_4.sym │ ├── xnor3_1.sym │ ├── xnor3_2.sym │ ├── xnor3_4.sym │ ├── xor2_1.sym │ ├── xor2_2.sym │ ├── xor2_4.sym │ ├── xor3_1.sym │ ├── xor3_2.sym │ └── xor3_4.sym ├── sky130_tests │ ├── LACG.sch │ ├── LACG.sym │ ├── README.md │ ├── adder_16bit.sch │ ├── adder_16bit.sym │ ├── adder_1bit.sch │ ├── adder_1bit.sym │ ├── adder_256bit.sch │ ├── adder_256bit.sym │ ├── adder_32bit.sch │ ├── adder_32bit.sym │ ├── adder_4bit.sch │ ├── adder_4bit.sym │ ├── adder_64bit.sch │ ├── adder_64bit.sym │ ├── all_sky130_gates.sch │ ├── all_sky130_gates.sym │ ├── bandgap.sch │ ├── bandgap.sym │ ├── bandgap_opamp.sch │ ├── bandgap_opamp.sym │ ├── cla_2bits.sch │ ├── cla_2bits.sym │ ├── cla_4bits.sch │ ├── cla_4bits.sym │ ├── gain_stage.sch │ ├── gain_stage.sym │ ├── gates.sch │ ├── gates.sym │ ├── gates_sky130.sch │ ├── gates_sky130.sym │ ├── giant_label.sym │ ├── giant_label2.sym │ ├── logic_ngspice.sch │ ├── logic_ngspice.sym │ ├── lvnand.sch │ ├── lvnand.sym │ ├── lvtnot.sch │ ├── lvtnot.sym │ ├── n_diffamp.sch │ ├── n_diffamp.sym │ ├── nand2_noschematic.sym │ ├── ngspice_flop.sch │ ├── ngspice_flop.sym │ ├── not.sch │ ├── not.sym │ ├── passgate.sch │ ├── passgate.sym │ ├── passgate_nlvt.sch │ ├── passgate_nlvt.sym │ ├── segment.sym │ ├── simulate_ff.sch │ ├── simulate_ff.sym │ ├── srlatch.sch │ ├── srlatch.sym │ ├── stdcells.sch │ ├── stdcells.sym │ ├── stdcells_xspice.sch │ ├── stdcells_xspice.sym │ ├── stimuli.bandgap_opamp │ ├── stimuli.tb_bandgap_opamp │ ├── stimuli.test_carry_lookahead │ ├── stimuli.test_comparator │ ├── tb_bandgap.sch │ ├── tb_bandgap.sym │ ├── tb_bandgap_opamp.sch │ ├── tb_bandgap_opamp.sym │ ├── tb_ft_test.sch │ ├── tb_ft_test.sym │ ├── tb_ft_test_2.sch │ ├── tb_ft_test_2.sym │ ├── tb_reram.sch │ ├── tb_reram.sym │ ├── test_ac.sch │ ├── test_ac.sym │ ├── test_analog.sch │ ├── test_analog.sym │ ├── test_bipolar.sch │ ├── test_bipolar.sym │ ├── test_carry_lookahead.sch │ ├── test_carry_lookahead.sym │ ├── test_comparator.sch │ ├── test_comparator.sym │ ├── test_diode.sch │ ├── test_diode.sym │ ├── test_ff.sch │ ├── test_ff.sym │ ├── test_format_override.sch │ ├── test_format_override.sym │ ├── test_inv.sch │ ├── test_inv.sym │ ├── test_mim_cap.sch │ ├── test_mim_cap.sym │ ├── test_mos_binning.sch │ ├── test_mos_binning.sym │ ├── test_multisim.sch │ ├── test_multisim.sym │ ├── test_nand2_noschematic.sch │ ├── test_nand2_noschematic.sym │ ├── test_ngspice_flop.sch │ ├── test_nmos.sch │ ├── test_nmos.sym │ ├── test_nmos_sizes.sch │ ├── test_nmos_sizes.sym │ ├── test_pmos.sch │ ├── test_pmos.sym │ ├── test_res.sch │ ├── test_res.sym │ ├── test_s_xfer.sch │ ├── test_s_xfer.sym │ ├── test_stdcells.sch │ ├── test_stdcells.sym │ ├── test_sweep_mos_w.sch │ ├── test_sweep_mos_w.sym │ ├── test_varactor.sch │ ├── test_varactor.sym │ ├── test_vpp_cap.sch │ ├── test_vpp_cap.sym │ ├── top.sch │ ├── zero_opamp.sch │ └── zero_opamp.sym ├── stdcells │ ├── AND2.sym │ ├── AND2I.sym │ ├── AND3.sym │ ├── AND4.sym │ ├── AND5.sym │ ├── AND8.sym │ ├── AO21.sym │ ├── AO22.sym │ ├── AOI21.sym │ ├── AOI22.sym │ ├── BUF.sym │ ├── DFF.sym │ ├── DFFI.sym │ ├── DFFIQ.sym │ ├── DFFIR.sym │ ├── DFFIRQ.sym │ ├── DFFIS.sym │ ├── DFFISQ.sym │ ├── DFFISR.sym │ ├── DFFISRQ.sym │ ├── DFFQ.sym │ ├── DFFR.sym │ ├── DFFRQ.sym │ ├── DFFS.sym │ ├── DFFSQ.sym │ ├── DFFSR.sym │ ├── DFFSRQ.sym │ ├── EDFF.sym │ ├── EDFFQ.sym │ ├── FA.sym │ ├── HA.sym │ ├── INV.sym │ ├── LATCH.sym │ ├── LATCHI.sym │ ├── LATCHIQ.sym │ ├── LATCHIR.sym │ ├── LATCHIRQ.sym │ ├── LATCHIS.sym │ ├── LATCHISQ.sym │ ├── LATCHQ.sym │ ├── LATCHR.sym │ ├── LATCHRQ.sym │ ├── LATCHS.sym │ ├── LATCHSQ.sym │ ├── MUX2.sym │ ├── MUX2I.sym │ ├── MUX4.sym │ ├── MUX4I.sym │ ├── NAND2.sym │ ├── NAND2I.sym │ ├── NAND3.sym │ ├── NAND4.sym │ ├── NAND5.sym │ ├── NAND8.sym │ ├── NOR2.sym │ ├── NOR2I.sym │ ├── NOR3.sym │ ├── NOR4.sym │ ├── NOR5.sym │ ├── NOR8.sym │ ├── OA21.sym │ ├── OA22.sym │ ├── OAI21.sym │ ├── OAI22.sym │ ├── OR2.sym │ ├── OR2I.sym │ ├── OR3.sym │ ├── OR4.sym │ ├── OR5.sym │ ├── OR8.sym │ ├── README.md │ ├── SDFF.sym │ ├── SDFFQ.sym │ ├── TBUF.sym │ ├── TBUFI.sym │ ├── XNOR2.sym │ ├── XOR2.sym │ └── doc │ │ ├── AND2.png │ │ ├── AND2I.png │ │ ├── AND3.png │ │ ├── AND4.png │ │ ├── AND5.png │ │ ├── AND8.png │ │ ├── AO21.png │ │ ├── AO22.png │ │ ├── AOI21.png │ │ ├── AOI22.png │ │ ├── BUF.png │ │ ├── DFF.png │ │ ├── DFFI.png │ │ ├── DFFIQ.png │ │ ├── DFFIR.png │ │ ├── DFFIRQ.png │ │ ├── DFFIS.png │ │ ├── DFFISQ.png │ │ ├── DFFISR.png │ │ ├── DFFISRQ.png │ │ ├── DFFQ.png │ │ ├── DFFR.png │ │ ├── DFFRQ.png │ │ ├── DFFS.png │ │ ├── DFFSQ.png │ │ ├── DFFSR.png │ │ ├── DFFSRQ.png │ │ ├── EDFF.png │ │ ├── EDFFQ.png │ │ ├── FA.png │ │ ├── HA.png │ │ ├── INV.png │ │ ├── LATCH.png │ │ ├── LATCHI.png │ │ ├── LATCHIQ.png │ │ ├── LATCHIR.png │ │ ├── LATCHIRQ.png │ │ ├── LATCHIS.png │ │ ├── LATCHISQ.png │ │ ├── LATCHQ.png │ │ ├── LATCHR.png │ │ ├── LATCHRQ.png │ │ ├── LATCHS.png │ │ ├── LATCHSQ.png │ │ ├── MUX2.png │ │ ├── MUX2I.png │ │ ├── MUX4.png │ │ ├── MUX4I.png │ │ ├── NAND2.png │ │ ├── NAND2I.png │ │ ├── NAND3.png │ │ ├── NAND4.png │ │ ├── NAND5.png │ │ ├── NAND8.png │ │ ├── NOR2.png │ │ ├── NOR2I.png │ │ ├── NOR3.png │ │ ├── NOR4.png │ │ ├── NOR5.png │ │ ├── NOR8.png │ │ ├── OA21.png │ │ ├── OA22.png │ │ ├── OAI21.png │ │ ├── OAI22.png │ │ ├── OR2.png │ │ ├── OR2I.png │ │ ├── OR3.png │ │ ├── OR4.png │ │ ├── OR5.png │ │ ├── OR8.png │ │ ├── SDFF.png │ │ ├── SDFFQ.png │ │ ├── TBUF.png │ │ ├── TBUFI.png │ │ ├── XNOR2.png │ │ ├── XOR2.png │ │ ├── gate_attributes.png │ │ └── gates.png ├── xschem_verilog_import │ ├── README.md │ ├── audiodac.sch │ ├── audiodac.spice │ ├── audiodac.sym │ ├── audiodac.v │ ├── audiodac_clean.sch │ ├── count_nets.awk │ ├── counter.sch │ ├── counter.sym │ ├── counter.v │ ├── counter_clean.sch │ ├── gmon.out │ ├── make_sky130_sch_from_spice.awk │ ├── make_sky130_sch_from_verilog.awk │ ├── sky130_fd_sc_hvl__lsbuflv2hv_1.sch │ ├── sky130_fd_sc_hvl__lsbuflv2hv_1.spice │ ├── sky130_fd_sc_hvl__lsbuflv2hv_1.sym │ ├── sky130_fd_sc_hvl__lsbuflv2hv_1_redraw.sch │ ├── sky130_fd_sc_hvl__lsbuflv2hv_1_redraw_fix.sch │ ├── spm.sch │ ├── spm.spice │ ├── spm.sym │ ├── spm.v │ └── xschemrc └── xschemrc └── xschemrc /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RIOSLaboratory/OpenXRAM/HEAD/LICENSE -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RIOSLaboratory/OpenXRAM/HEAD/README.md -------------------------------------------------------------------------------- /bin/README.md: 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