├── .gitmodules ├── CMSIS-DAP.jpg ├── LICENSE ├── README.md ├── STLINK-V3MINI ├── Adaptor │ ├── Adaptor-1.jpg │ ├── Adaptor-2.jpg │ ├── Adaptor-3.jpg │ ├── STLINK-V3MINI_GPIOs_v4.JPG │ └── yingchao-chen-STLinkV3_Adapter- This adapter board was designed to retain the STDC14 connector from stlinkv3-mini-.url ├── Docs │ ├── STLINK-V3MINI_DataBrief.pdf │ └── UM2502 - STLINK-V3MODS and STLINK-V3MINI User Manual_en.DM00555046.pdf ├── Pics │ ├── STLINK-V3MINI_p1.jpg │ ├── STLINK-V3MINI_p2.jpg │ └── STLINK-V3MINI_p3.jpg ├── STLINK-V3MINI_Recovery │ └── Unprotected-3-Bootloader.bin └── Sch │ ├── STLINK-V3E_Sch_from_G431sch.jpg │ └── STLINK-V3MINI_Pin_Assignments_v4.xlsx ├── STLINKv3DAP_v1+v2 ├── CMSIS-DAP │ ├── DAP.c │ ├── DAP.h │ ├── DAP_config.h │ ├── JTAG_DP.c │ ├── SWO.c │ └── SW_DP.c ├── DebugConfig │ └── STLINKv3DAP_v1_v2_STM32F723IEKx_2.0.0.dbgconf ├── Objects │ └── STLINKv3DAP_v1+v2.hex ├── RTE │ ├── CMSIS │ │ ├── RTX_Config.c │ │ └── RTX_Config.h │ ├── Device │ │ ├── STM32F723IEKx │ │ │ ├── RTE_Device.h │ │ │ ├── startup_stm32f723xx.s │ │ │ ├── stm32f7xx_hal_conf.h │ │ │ └── system_stm32f7xx.c │ │ └── project.script │ ├── USB │ │ ├── USBD_Config_0.c │ │ ├── USBD_Config_CDC_0.h │ │ ├── USBD_Config_CustomClass_0.h │ │ └── USBD_Config_HID_0.h │ └── _STLINKv3DAP_v1_v2 │ │ └── RTE_Components.h ├── STLINKv3DAP_v1+v2.uvprojx └── USER │ ├── STLINK_V3MINI_BSP.c │ ├── STLINK_V3MINI_BSP.h │ ├── USBD_User_CDC_ACM_UART_0.c │ ├── USBD_User_CustomClass_0.c │ ├── USBD_User_HID_0.c │ ├── main.c │ └── osObjects.h ├── STLINKv3DAPv1_HID+VCP ├── CMSIS-DAP │ ├── DAP.c │ ├── DAP.h │ ├── DAP_config.h │ ├── JTAG_DP.c │ ├── SWO.c │ └── SW_DP.c ├── DebugConfig │ └── STLINKv3DAPv1_HID_VCP_STM32F723IEKx_2.0.0.dbgconf ├── Objects │ └── STLINKv3DAPv1_HID+VCP.hex ├── RTE │ ├── CMSIS │ │ ├── RTX_Config.c │ │ └── RTX_Config.h │ ├── Device │ │ ├── STM32F723IEKx │ │ │ ├── RTE_Device.h │ │ │ ├── startup_stm32f723xx.s │ │ │ ├── stm32f7xx_hal_conf.h │ │ │ └── system_stm32f7xx.c │ │ └── project.script │ ├── USB │ │ ├── USBD_Config_0.c │ │ ├── USBD_Config_CDC_0.h │ │ └── USBD_Config_HID_0.h │ └── _STLINKv3DAPv1_HID_VCP │ │ └── RTE_Components.h ├── STLINKv3DAPv1_HID+VCP.uvprojx ├── USER │ ├── STLINK_V3MINI_BSP.c │ ├── STLINK_V3MINI_BSP.h │ ├── USBD_User_CDC_ACM_UART_0.c │ ├── USBD_User_HID_0.c │ ├── main.c │ └── osObjects.h └── Win7-VCP-Driver │ └── Win7_VCP_Driver.inf ├── STLINKv3DAPv2_WinUSB+VCP ├── CMSIS-DAP │ ├── DAP.c │ ├── DAP.h │ ├── DAP_config.h │ ├── JTAG_DP.c │ ├── SWO.c │ └── SW_DP.c ├── DebugConfig │ └── STLINKv3DAPv2_WinUSB_VCP_STM32F723IEKx_2.0.0.dbgconf ├── Objects │ └── STLINKv3DAPv2_WinUSB+VCP.hex ├── RTE │ ├── CMSIS │ │ ├── RTX_Config.c │ │ └── RTX_Config.h │ ├── Device │ │ ├── STM32F723IEKx │ │ │ ├── RTE_Device.h │ │ │ ├── startup_stm32f723xx.s │ │ │ ├── stm32f7xx_hal_conf.h │ │ │ └── system_stm32f7xx.c │ │ └── project.script │ ├── USB │ │ ├── USBD_Config_0.c │ │ ├── USBD_Config_CDC_0.h │ │ ├── USBD_Config_CustomClass_0.h │ │ └── USBD_Config_HID_0.h │ └── _STLINKv3DAPv2_WinUSB_VCP │ │ └── RTE_Components.h ├── STLINKv3DAPv2_WinUSB+VCP.uvprojx ├── USER │ ├── STLINK_V3MINI_BSP.c │ ├── STLINK_V3MINI_BSP.h │ ├── USBD_User_CDC_ACM_UART_0.c │ ├── USBD_User_CustomClass_0.c │ ├── USBD_User_HID_0.c │ ├── main.c │ └── osObjects.h └── Win7-VCP-Driver │ └── Win7_VCP_Driver.inf ├── STLINKv3DAPv2_WinUSB ├── CMSIS-DAP │ ├── DAP.c │ ├── DAP.h │ ├── DAP_config.h │ ├── JTAG_DP.c │ ├── SWO.c │ └── SW_DP.c ├── DebugConfig │ └── STLINKv3DAPv2_WinUSB_STM32F723IEKx_2.0.0.dbgconf ├── Objects │ └── STLINKv3DAPv2_WinUSB.hex ├── RTE │ ├── CMSIS │ │ ├── RTX_Config.c │ │ └── RTX_Config.h │ ├── Device │ │ ├── STM32F723IEKx │ │ │ ├── RTE_Device.h │ │ │ ├── startup_stm32f723xx.s │ │ │ ├── stm32f7xx_hal_conf.h │ │ │ └── system_stm32f7xx.c │ │ └── project.script │ ├── USB │ │ ├── USBD_Config_0.c │ │ ├── USBD_Config_CDC_0.h │ │ └── USBD_Config_CustomClass_0.h │ └── _STLINKv3DAPv2_WinUSB │ │ └── RTE_Components.h ├── STLINKv3DAPv2_WinUSB.uvprojx └── USER │ ├── STLINK_V3MINI_BSP.c │ ├── STLINK_V3MINI_BSP.h │ ├── USBD_User_CDC_ACM_UART_0.c │ ├── USBD_User_CustomClass_0.c │ ├── main.c │ └── osObjects.h └── STM32F723IEK6 ├── ES0360 - STM32F72xxx and STM32F73xxx device limitations_en.DM00305994.pdf ├── PM0253 - STM32F7 Series and STM32H7 Series Cortex-M7 processor programming manual_en.DM00237416.pdf ├── RM0431 - STM32F72xxx and STM32F73xxx_en.DM00305990.pdf └── STM32F723 - DataSheet.pdf /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "Yet_Another_Bootloader"] 2 | path = Yet_Another_Bootloader 3 | url = https://github.com/RadioOperator/Yet_Another_Bootloader 4 | -------------------------------------------------------------------------------- /CMSIS-DAP.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/CMSIS-DAP.jpg -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # High-Speed CMSIS-DAP for STLINK-V3MINI ARM Debugger 2 | 3 | Keywords: USB2.0 High-Speed CMSIS-DAP STLINK-V3 STM32F723IEK6 SWO VCP CDC DAPLink ST-LINK ARM-Debugger 4 | 5 | ST company created a great mini-size ARM debugger STLINK-V3MINI for STM32 MCU, cost you ~US$10 only. Re-Use the high-performance PCBA hardware, you can do more interesting projects or hobbies. 6 | 7 | ## Important Notice: 8 | This repo is an old project for CMSIS-DAP!!! If you are a new comer here, please visit my Yet_Another_Bootloader (YAB) repo first on 9 | https://github.com/RadioOperator/Yet_Another_Bootloader. 10 | Please try to install the YAB first. YAB (STLINKv3_YAB project) could co-exist with STLINK-V3 Factory Bootloader, and install one or two of pre-built CMSIS-DAP code to test the DAP function, no need to destroy the factory bootloader. 11 | 12 | Beacuse the factory bootloader still in the device, it's very easy to recover STLINK-V3 functions using STSW-LINK007 update tools. 13 | (please DONOT use the new verion STSW-LINK007 v2.36.26 or later, the new version will locked the STM32F723 IC's SWD port). 14 | 15 | 16 | ![alt text](https://github.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/blob/master/STLINK-V3MINI/Pics/STLINK-V3MINI_p3.jpg) 17 | 18 | A new very good/low-cost Starter Kit ...... what we got: 19 | 20 | - MCU: STM32F723IEK6, Arm® Cortex®-M7 32b MCU+FPU, 462DMIPS. 21 | - Core speed: 216MHz 22 | - ROM: 512KB 23 | - RAM: 256+16+4KB, new features. 24 | - USB 2.0 High-Speed internal PHY. 25 | - GPIO, up to 30s connected out in STLINK-V3MINI PCBA. 26 | - UART, SPI, I2C, CAN, ADC, more... 27 | - some GPIO with ESD protection. 28 | - On-board LEDs. 29 | 30 | 31 | ## My code: 32 | - /STLINKv3DAPv1_HID+VCP ------- native HID+VCP mode, CMSIS-DAP v1, VCP(CDC) added. 33 | - /STLINKv3DAPv2_WinUSB --------- native WinUSB mode, CMSIS-DAP v2, SWO_STREAM mode enabled. 34 | - /STLINKv3DAPv2_WinUSB+VCP --- WinUSB+VCP, SWO_STREAM mode cannot enable. 35 | - /STLINKv3DAP_v1+v2 -------------- v1+v2, no VCP, SWO_STREAM mode cannot enable. 36 | 37 | All support SWD and JTAG mode. SWO_STREAM mode is important or not? please tell me. 38 | 39 | v1+v2, HID and WinUSB mode coexisted, suggest disable one in Device Manager force to another. 40 | 41 | The STDC14 connector pin definations: 42 | 43 | - Pin-1, NC. 44 | - Pin-2, NC. 45 | - *Pin-3, 3.3V out, re-wire to STLINK 3.3V LDO output, limited less than 50mA. 46 | - Pin-4, JTMS / SWDIO. 47 | - Pin-5, GND. 48 | - Pin-6, JTCK / SWCLK (same as Pin-9) . 49 | - Pin-7, GND. 50 | - Pin-8, JTDO / SWO. 51 | - Pin-9, JTCK / SWCLK (same as Pin-6) . 52 | - Pin-10, JTDI. 53 | - *Pin-11, NC (GND Detect on STLINK, to target GND for ST-LINK). 54 | - *Pin-12, nRESET (T-NRST on STLINK), to JTAG/SWD nRESET pin, or board /RESET. 55 | - Pin-13, VCP Tx. 56 | - Pin-14, VCP Rx. 57 | 58 | *---Not same as STLINK-V3MINI original. 59 | 60 | ## Compile Environment: 61 | - Keil: v5.28a. 62 | - STM32F7xx_DFP 2.12.0. 63 | - Keil: ARM CMSIS 5.6.0. 64 | - Keil: MDK-Middleware 7.10.0. 65 | - Keil: ARM Compiler 6 (AC6 + MicroLIB, Optimization[-Ofast]). 66 | 67 | 68 | Include Path: 69 | - C:\Keil\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Include - maybe not same as yours. 70 | - C:\Keil\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Driver\Include - maybe not same as yours. 71 | - .\CMSIS-DAP 72 | - .\RTE\USB 73 | - .\USER 74 | 75 | 76 | ## Some issues: 77 | 1. not well-tested, need your report. 78 | 2. Stack uasge check and optimize, not performed. 79 | 3. ...... 80 | 81 | 82 | ## Further improvements: 83 | 1. General USB-DFU bootloader, support drag&drop easy update any user App. 84 | >> 2020-07-24 update: MSC Bootloader function is Done! 85 | >> visit: https://github.com/RadioOperator/Yet_Another_Bootloader 86 | 87 | 2. Try using other USB library to see what happened. 88 | 3. Develop SPI/I2C/CAN bus, Logic analyzer/emulator functions, we have a large flash room. 89 | 4. ...... 90 | 91 | 92 | ## New Release Notes: 93 | - 2019-12-22, improved SWD clock, max 18MHz (Keil - 10MHz). USB VID changed to ST VID=0x0483 for all. 94 | The USB PID as following: 95 | - STLINKv3DAPv1_HID+VCP -------- PID 0x572C 96 | - STLINKv3DAPv2_WinUSB+VCP --- PID 0x572D 97 | - STLINKv3DAPv2_WinUSB ---------- PID 0x572E 98 | - STLINKv3DAP_v1+v2 -------------- PID 0x572F 99 | - My STM32F103C8T6 project ------ PID 0x572A ([STM32F103C8T6_CMSIS-DAP_SWO]) 100 | 101 | [STM32F103C8T6_CMSIS-DAP_SWO]: https://github.com/RadioOperator/STM32F103C8T6_CMSIS-DAP_SWO 102 | 103 | 104 | ### Declarations: 105 | 106 | > The project is for experiments only. Use any parts and info on your own risks. 107 | 108 | -------------------------------------------------------------------------------- /STLINK-V3MINI/Adaptor/Adaptor-1.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STLINK-V3MINI/Adaptor/Adaptor-1.jpg -------------------------------------------------------------------------------- /STLINK-V3MINI/Adaptor/Adaptor-2.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STLINK-V3MINI/Adaptor/Adaptor-2.jpg -------------------------------------------------------------------------------- /STLINK-V3MINI/Adaptor/Adaptor-3.jpg: -------------------------------------------------------------------------------- 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// Reserved bits must be kept at reset value 17 | // DBG_CAN1_STOP Debug CAN1 stopped when core is halted 18 | // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 20 | // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 21 | // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted 22 | // DBG_WWDG_STOP Debug window watchdog stopped when core is halted 23 | // DBG_RTC_STOP RTC stopped when core is halted 24 | // DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted 25 | // DBG_TIM14_STOP TIM14 counter stopped when core is halted 26 | // DBG_TIM13_STOP TIM13 counter stopped when core is halted 27 | // DBG_TIM12_STOP TIM12 counter stopped when core is halted 28 | // DBG_TIM7_STOP TIM7 counter stopped when core is halted 29 | // DBG_TIM6_STOP TIM6 counter stopped when core is halted 30 | // DBG_TIM5_STOP TIM5 counter stopped when core is halted 31 | // DBG_TIM4_STOP TIM4 counter stopped when core is halted 32 | // DBG_TIM3_STOP TIM3 counter stopped when core is halted 33 | // DBG_TIM2_STOP TIM2 counter stopped when core is halted 34 | // 35 | DbgMCU_APB1_Fz = 0x00000000; 36 | 37 | // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) 38 | // Reserved bits must be kept at reset value 39 | // DBG_TIM11_STOP TIM11 counter stopped when core is halted 40 | // DBG_TIM10_STOP TIM10 counter stopped when core is halted 41 | // DBG_TIM9_STOP TIM9 counter stopped when core is halted 42 | // DBG_TIM8_STOP TIM8 counter stopped when core is halted 43 | // DBG_TIM1_STOP TIM1 counter stopped when core is halted 44 | // 45 | DbgMCU_APB2_Fz = 0x00000000; 46 | 47 | // TPIU Pin Routing (TRACECLK fixed on Pin PE2) 48 | // TRACECLK: Pin PE2 49 | // TRACED0 50 | // ETM Trace Data 0 51 | // <0x00040003=> Pin PE3 52 | // <0x00020001=> Pin PC1 53 | // <0x0006000D=> Pin PG13 54 | // TRACED1 55 | // ETM Trace Data 1 56 | // <0x00040004=> Pin PE4 57 | // <0x00020008=> Pin PC8 58 | // <0x0006000E=> Pin PG14 59 | // TRACED2 60 | // ETM Trace Data 2 61 | // <0x00040005=> Pin PE5 62 | // <0x00030002=> Pin PD2 63 | // TRACED3 64 | // ETM Trace Data 3 65 | // <0x00040006=> Pin PE6 66 | // <0x0002000C=> Pin PC12 67 | // 68 | TraceClk_Pin = 0x00040002; 69 | TraceD0_Pin = 0x00040003; 70 | TraceD1_Pin = 0x00040004; 71 | TraceD2_Pin = 0x00040005; 72 | TraceD3_Pin = 0x00040006; 73 | 74 | // <<< end of configuration section >>> 75 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/CMSIS/RTX_Config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ----------------------------------------------------------------------------- 19 | * 20 | * $Revision: V5.1.0 21 | * 22 | * Project: CMSIS-RTOS RTX 23 | * Title: RTX Configuration 24 | * 25 | * ----------------------------------------------------------------------------- 26 | */ 27 | 28 | #include "cmsis_compiler.h" 29 | #include "rtx_os.h" 30 | 31 | // OS Idle Thread 32 | __WEAK __NO_RETURN void osRtxIdleThread (void *argument) { 33 | (void)argument; 34 | 35 | for (;;) {} 36 | } 37 | 38 | // OS Error Callback function 39 | __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { 40 | (void)object_id; 41 | 42 | switch (code) { 43 | case osRtxErrorStackUnderflow: 44 | // Stack overflow detected for thread (thread_id=object_id) 45 | break; 46 | case osRtxErrorISRQueueOverflow: 47 | // ISR Queue overflow detected when inserting object (object_id) 48 | break; 49 | case osRtxErrorTimerQueueOverflow: 50 | // User Timer Callback Queue overflow detected for timer (timer_id=object_id) 51 | break; 52 | case osRtxErrorClibSpace: 53 | // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM 54 | break; 55 | case osRtxErrorClibMutex: 56 | // Standard C/C++ library mutex initialization failed 57 | break; 58 | default: 59 | // Reserved 60 | break; 61 | } 62 | for (;;) {} 63 | //return 0U; 64 | } 65 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/Device/STM32F723IEKx/system_stm32f7xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f7xx.c 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. 6 | * 7 | * This file provides two functions and one global variable to be called from 8 | * user application: 9 | * - SystemInit(): This function is called at startup just after reset and 10 | * before branch to main program. This call is made inside 11 | * the "startup_stm32f7xx.s" file. 12 | * 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used 14 | * by the user application to setup the SysTick 15 | * timer or configure other parameters. 16 | * 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must 18 | * be called whenever the core clock is changed 19 | * during program execution. 20 | * 21 | * 22 | ****************************************************************************** 23 | * @attention 24 | * 25 | *

© COPYRIGHT 2016 STMicroelectronics

26 | * 27 | * Redistribution and use in source and binary forms, with or without modification, 28 | * are permitted provided that the following conditions are met: 29 | * 1. Redistributions of source code must retain the above copyright notice, 30 | * this list of conditions and the following disclaimer. 31 | * 2. Redistributions in binary form must reproduce the above copyright notice, 32 | * this list of conditions and the following disclaimer in the documentation 33 | * and/or other materials provided with the distribution. 34 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | * may be used to endorse or promote products derived from this software 36 | * without specific prior written permission. 37 | * 38 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | * 49 | ****************************************************************************** 50 | */ 51 | 52 | /** @addtogroup CMSIS 53 | * @{ 54 | */ 55 | 56 | /** @addtogroup stm32f7xx_system 57 | * @{ 58 | */ 59 | 60 | /** @addtogroup STM32F7xx_System_Private_Includes 61 | * @{ 62 | */ 63 | 64 | #include "stm32f7xx.h" 65 | 66 | #if !defined (HSE_VALUE) 67 | #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ 68 | #endif /* HSE_VALUE */ 69 | 70 | #if !defined (HSI_VALUE) 71 | #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ 72 | #endif /* HSI_VALUE */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @addtogroup STM32F7xx_System_Private_TypesDefinitions 79 | * @{ 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @addtogroup STM32F7xx_System_Private_Defines 87 | * @{ 88 | */ 89 | 90 | /************************* Miscellaneous Configuration ************************/ 91 | 92 | /*!< Uncomment the following line if you need to relocate your vector Table in 93 | Internal SRAM. */ 94 | /* #define VECT_TAB_SRAM */ 95 | #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. 96 | This value must be a multiple of 0x200. */ 97 | /******************************************************************************/ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @addtogroup STM32F7xx_System_Private_Macros 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @addtogroup STM32F7xx_System_Private_Variables 112 | * @{ 113 | */ 114 | 115 | /* This variable is updated in three ways: 116 | 1) by calling CMSIS function SystemCoreClockUpdate() 117 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 118 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 119 | Note: If you use this function to configure the system clock; then there 120 | is no need to call the 2 first functions listed above, since SystemCoreClock 121 | variable is updated automatically. 122 | */ 123 | uint32_t SystemCoreClock = 16000000; 124 | const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; 125 | const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes 132 | * @{ 133 | */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @addtogroup STM32F7xx_System_Private_Functions 140 | * @{ 141 | */ 142 | 143 | /** 144 | * @brief Setup the microcontroller system 145 | * Initialize the Embedded Flash Interface, the PLL and update the 146 | * SystemFrequency variable. 147 | * @param None 148 | * @retval None 149 | */ 150 | void SystemInit(void) 151 | { 152 | /* FPU settings ------------------------------------------------------------*/ 153 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 154 | SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 155 | #endif 156 | /* Reset the RCC clock configuration to the default reset state ------------*/ 157 | /* Set HSION bit */ 158 | RCC->CR |= (uint32_t)0x00000001; 159 | 160 | /* Reset CFGR register */ 161 | RCC->CFGR = 0x00000000; 162 | 163 | /* Reset HSEON, CSSON and PLLON bits */ 164 | RCC->CR &= (uint32_t)0xFEF6FFFF; 165 | 166 | /* Reset PLLCFGR register */ 167 | RCC->PLLCFGR = 0x24003010; 168 | 169 | /* Reset HSEBYP bit */ 170 | RCC->CR &= (uint32_t)0xFFFBFFFF; 171 | 172 | /* Disable all interrupts */ 173 | RCC->CIR = 0x00000000; 174 | 175 | /* Configure the Vector Table location add offset address ------------------*/ 176 | #ifdef VECT_TAB_SRAM 177 | SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ 178 | #else 179 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ 180 | #endif 181 | } 182 | 183 | /** 184 | * @brief Update SystemCoreClock variable according to Clock Register Values. 185 | * The SystemCoreClock variable contains the core clock (HCLK), it can 186 | * be used by the user application to setup the SysTick timer or configure 187 | * other parameters. 188 | * 189 | * @note Each time the core clock (HCLK) changes, this function must be called 190 | * to update SystemCoreClock variable value. Otherwise, any configuration 191 | * based on this variable will be incorrect. 192 | * 193 | * @note - The system frequency computed by this function is not the real 194 | * frequency in the chip. It is calculated based on the predefined 195 | * constant and the selected clock source: 196 | * 197 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) 198 | * 199 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) 200 | * 201 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 202 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. 203 | * 204 | * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 205 | * 16 MHz) but the real value may vary depending on the variations 206 | * in voltage and temperature. 207 | * 208 | * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 209 | * 25 MHz), user has to ensure that HSE_VALUE is same as the real 210 | * frequency of the crystal used. Otherwise, this function may 211 | * have wrong result. 212 | * 213 | * - The result of this function could be not correct when using fractional 214 | * value for HSE crystal. 215 | * 216 | * @param None 217 | * @retval None 218 | */ 219 | void SystemCoreClockUpdate(void) 220 | { 221 | uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; 222 | 223 | /* Get SYSCLK source -------------------------------------------------------*/ 224 | tmp = RCC->CFGR & RCC_CFGR_SWS; 225 | 226 | switch (tmp) 227 | { 228 | case 0x00: /* HSI used as system clock source */ 229 | SystemCoreClock = HSI_VALUE; 230 | break; 231 | case 0x04: /* HSE used as system clock source */ 232 | SystemCoreClock = HSE_VALUE; 233 | break; 234 | case 0x08: /* PLL used as system clock source */ 235 | 236 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N 237 | SYSCLK = PLL_VCO / PLL_P 238 | */ 239 | pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; 240 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 241 | 242 | if (pllsource != 0) 243 | { 244 | /* HSE used as PLL clock source */ 245 | pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 246 | } 247 | else 248 | { 249 | /* HSI used as PLL clock source */ 250 | pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 251 | } 252 | 253 | pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; 254 | SystemCoreClock = pllvco/pllp; 255 | break; 256 | default: 257 | SystemCoreClock = HSI_VALUE; 258 | break; 259 | } 260 | /* Compute HCLK frequency --------------------------------------------------*/ 261 | /* Get HCLK prescaler */ 262 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; 263 | /* HCLK frequency */ 264 | SystemCoreClock >>= tmp; 265 | } 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** 272 | * @} 273 | */ 274 | 275 | /** 276 | * @} 277 | */ 278 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 279 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/Device/project.script: -------------------------------------------------------------------------------- 1 | load STM32F723IEKx 2 | project name STCubeGenerated 3 | project toolchain "MDK-ARM V5" 4 | project path "C:\STM32F723\STM32F723IEK6DAP\RTE\Device\STM32F723IEKx\" 5 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/USB/USBD_Config_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_0.c 6 | * Purpose: USB Device Configuration 7 | * Rev.: V5.2.0 8 | *------------------------------------------------------------------------------ 9 | * Use the following configuration settings in the Device Class configuration 10 | * files to assign a Device Class to this USB Device 0. 11 | * 12 | * Configuration Setting Value 13 | * --------------------- ----- 14 | * Assign Device Class to USB Device # = 0 15 | *----------------------------------------------------------------------------*/ 16 | 17 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 18 | 19 | // USB Device 0 20 | // Connect to hardware via Driver_USBD# <0-255> 21 | // Select driver control block for hardware interface. 22 | #define USBD0_PORT 1 23 | 24 | // High-speed 25 | // Enable High-speed functionality (if device supports it). 26 | #define USBD0_HS 1 27 | 28 | // Device Settings 29 | // These settings are used to create the Device Descriptor 30 | // Max Endpoint 0 Packet Size 31 | // Maximum packet size for Endpoint 0 (bMaxPacketSize0). 32 | // <8=>8 Bytes <16=>16 Bytes <32=>32 Bytes <64=>64 Bytes 33 | #define USBD0_MAX_PACKET0 64 34 | 35 | // Vendor ID <0x0000-0xFFFF> 36 | // Vendor ID assigned by USB-IF (idVendor). 37 | #define USBD0_DEV_DESC_IDVENDOR 0x0483 38 | 39 | // Product ID <0x0000-0xFFFF> 40 | // Product ID assigned by manufacturer (idProduct). 41 | #define USBD0_DEV_DESC_IDPRODUCT 0x572F 42 | 43 | // Device Release Number <0x0000-0xFFFF> 44 | // Device Release Number in binary-coded decimal (bcdDevice) 45 | #define USBD0_DEV_DESC_BCDDEVICE 0x0100 46 | 47 | // 48 | 49 | // Configuration Settings 50 | // These settings are used to create the Configuration Descriptor. 51 | // Power 52 | // Default Power Setting (D6: of bmAttributes). 53 | // <0=>Bus-powered 54 | // <1=>Self-powered 55 | // Remote Wakeup 56 | // Configuration support for Remote Wakeup (D5: of bmAttributes). 57 | #define USBD0_CFG_DESC_BMATTRIBUTES 0x80 58 | 59 | // Maximum Power Consumption (in mA) <0-510><#/2> 60 | // Maximum Power Consumption of USB Device from bus in this 61 | // specific configuration when device is fully operational (bMaxPower). 62 | #define USBD0_CFG_DESC_BMAXPOWER 250 63 | 64 | // 65 | 66 | // String Settings 67 | // These settings are used to create the String Descriptor. 68 | // Language ID <0x0000-0xFCFF> 69 | // English (United States) = 0x0409. 70 | #define USBD0_STR_DESC_LANGID 0x0409 71 | 72 | // Manufacturer String 73 | // String Descriptor describing Manufacturer. 74 | #define USBD0_STR_DESC_MAN L"RadioOperator" 75 | 76 | // Product String 77 | // String Descriptor describing Product. 78 | #define USBD0_STR_DESC_PROD L"CMSIS-DAP HighSpeed" 79 | 80 | // Serial Number String 81 | // Enable Serial Number String. 82 | // If disabled Serial Number String will not be assigned to USB Device. 83 | #define USBD0_STR_DESC_SER_EN 1 84 | 85 | // Default value 86 | // Default device's Serial Number String. 87 | #define USBD0_STR_DESC_SER L"0001A0000000" 88 | 89 | // Maximum Length (in characters) <0-126> 90 | // Specifies the maximum number of Serial Number String characters that can be set at run-time. 91 | // Maximum value is 126. Use value 0 to disable RAM allocation for string. 92 | #define USBD0_STR_DESC_SER_MAX_LEN 16 93 | 94 | // 95 | // 96 | 97 | // Microsoft OS Descriptors Settings 98 | // These settings are used to create the Microsoft OS Descriptors. 99 | // OS String 100 | // Enable creation of Microsoft OS String and Extended Compat ID OS Feature Descriptors. 101 | #define USBD0_OS_DESC_EN 1 102 | 103 | // Vendor Code <0x01-0xFF> 104 | // Specifies Vendor Code used to retrieve OS Feature Descriptors. 105 | #define USBD0_OS_DESC_VENDOR_CODE 0x01 106 | 107 | // 108 | // 109 | 110 | // Control Transfer Buffer Size <64-65536:64> 111 | // Specifies size of buffer used for Control Transfers. 112 | // It should be at least as big as maximum packet size for Endpoint 0. 113 | #define USBD0_EP0_BUF_SIZE 512 114 | 115 | // OS Resources Settings 116 | // These settings are used to optimize usage of OS resources. 117 | // Core Thread Stack Size <64-65536> 118 | #define USBD0_CORE_THREAD_STACK_SIZE 512 119 | 120 | // Core Thread Priority 121 | #define USBD0_CORE_THREAD_PRIORITY osPriorityAboveNormal 122 | 123 | // 124 | // 125 | 126 | 127 | #include "RTE_Components.h" 128 | 129 | #ifdef RTE_USB_Device_CustomClass_0 130 | #include "USBD_Config_CustomClass_0.h" 131 | #endif 132 | #ifdef RTE_USB_Device_CustomClass_1 133 | #include "USBD_Config_CustomClass_1.h" 134 | #endif 135 | #ifdef RTE_USB_Device_CustomClass_2 136 | #include "USBD_Config_CustomClass_2.h" 137 | #endif 138 | #ifdef RTE_USB_Device_CustomClass_3 139 | #include "USBD_Config_CustomClass_3.h" 140 | #endif 141 | 142 | #ifdef RTE_USB_Device_HID_0 143 | #include "USBD_Config_HID_0.h" 144 | #endif 145 | #ifdef RTE_USB_Device_HID_1 146 | #include "USBD_Config_HID_1.h" 147 | #endif 148 | #ifdef RTE_USB_Device_HID_2 149 | #include "USBD_Config_HID_2.h" 150 | #endif 151 | #ifdef RTE_USB_Device_HID_3 152 | #include "USBD_Config_HID_3.h" 153 | #endif 154 | 155 | #ifdef RTE_USB_Device_MSC_0 156 | #include "USBD_Config_MSC_0.h" 157 | #endif 158 | #ifdef RTE_USB_Device_MSC_1 159 | #include "USBD_Config_MSC_1.h" 160 | #endif 161 | #ifdef RTE_USB_Device_MSC_2 162 | #include "USBD_Config_MSC_2.h" 163 | #endif 164 | #ifdef RTE_USB_Device_MSC_3 165 | #include "USBD_Config_MSC_3.h" 166 | #endif 167 | 168 | #ifdef RTE_USB_Device_CDC_0 169 | #include "USBD_Config_CDC_0.h" 170 | #endif 171 | #ifdef RTE_USB_Device_CDC_1 172 | #include "USBD_Config_CDC_1.h" 173 | #endif 174 | #ifdef RTE_USB_Device_CDC_2 175 | #include "USBD_Config_CDC_2.h" 176 | #endif 177 | #ifdef RTE_USB_Device_CDC_3 178 | #include "USBD_Config_CDC_3.h" 179 | #endif 180 | #ifdef RTE_USB_Device_CDC_4 181 | #include "USBD_Config_CDC_4.h" 182 | #endif 183 | #ifdef RTE_USB_Device_CDC_5 184 | #include "USBD_Config_CDC_5.h" 185 | #endif 186 | #ifdef RTE_USB_Device_CDC_6 187 | #include "USBD_Config_CDC_6.h" 188 | #endif 189 | #ifdef RTE_USB_Device_CDC_7 190 | #include "USBD_Config_CDC_7.h" 191 | #endif 192 | 193 | #ifdef RTE_USB_Device_ADC_0 194 | #include "USBD_Config_ADC_0.h" 195 | #endif 196 | #ifdef RTE_USB_Device_ADC_1 197 | #include "USBD_Config_ADC_1.h" 198 | #endif 199 | #ifdef RTE_USB_Device_ADC_2 200 | #include "USBD_Config_ADC_2.h" 201 | #endif 202 | #ifdef RTE_USB_Device_ADC_3 203 | #include "USBD_Config_ADC_3.h" 204 | #endif 205 | 206 | #include "usbd_config.h" 207 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/USB/USBD_Config_HID_0.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_HID_0.h 6 | * Purpose: USB Device Human Interface Device class (HID) Configuration 7 | * Rev.: V5.0.1 8 | *----------------------------------------------------------------------------*/ 9 | 10 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 11 | 12 | // USB Device: Human Interface Device class (HID) 0 13 | // Assign Device Class to USB Device # <0-3> 14 | // Select USB Device that is used for this Device Class instance 15 | #define USBD_HID0_DEV 0 16 | 17 | // Interrupt Endpoint Settings 18 | // By default, the settings match the first USB Class instance in a USB Device. 19 | // Endpoint conflicts are flagged by compile-time error messages. 20 | // 21 | // Interrupt IN Endpoint Settings 22 | // Interrupt IN Endpoint Number 23 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 24 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 25 | #define USBD_HID0_EP_INT_IN 3 26 | 27 | // Endpoint Settings 28 | // Parameters are used to create Endpoint Descriptors 29 | // and for memory allocation in the USB component. 30 | // 31 | // Full/Low-speed (High-speed disabled) 32 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 33 | // Maximum Endpoint Packet Size (in bytes) <0-64> 34 | // Specifies the physical packet size used for information exchange. 35 | // Maximum value is 64. 36 | #define USBD_HID0_EP_INT_IN_WMAXPACKETSIZE 64 37 | 38 | // Endpoint polling Interval (in ms) <1-255> 39 | // Specifies the frequency of requests initiated by USB Host for 40 | // function USBD_HIDn_GetReport. 41 | #define USBD_HID0_EP_INT_IN_BINTERVAL 1 42 | 43 | // 44 | 45 | // High-speed 46 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 47 | // 48 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 49 | // Specifies the physical packet size used for information exchange. 50 | // Maximum value is 1024. 51 | // Additional transactions per microframe 52 | // Additional transactions improve communication performance. 53 | // <0=>None <1=>1 additional <2=>2 additional 54 | #define USBD_HID0_EP_INT_IN_HS_WMAXPACKETSIZE 512 55 | 56 | // Endpoint polling Interval (in 125 us intervals) 57 | // Specifies the frequency of requests initiated by USB Host for 58 | // function USBD_HIDn_GetReport. 59 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 60 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 61 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 62 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 63 | #define USBD_HID0_EP_INT_IN_HS_BINTERVAL 1 64 | 65 | // 66 | // 67 | // 68 | 69 | // Interrupt OUT Endpoint Settings 70 | // Interrupt OUT Endpoint Number 71 | // When OUT Endpoint is set to "Not used" the USB Host uses 72 | // the Control Endpoint 0 for Out Reports. 73 | // <0=>Not used 74 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 75 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 76 | #define USBD_HID0_EP_INT_OUT 3 77 | 78 | // Endpoint Settings 79 | // Parameters are used to create USB Descriptors, HID Device Descriptor 80 | // and for memory allocation in the USB component. 81 | // 82 | // Full/Low-speed (High-speed disabled) 83 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 84 | // Maximum Endpoint Packet Size (in bytes) <0-64> 85 | // Specifies the physical packet size used for information exchange. 86 | // Maximum value is 64. 87 | #define USBD_HID0_EP_INT_OUT_WMAXPACKETSIZE 64 88 | 89 | // Endpoint polling Interval (in ms) <1-255> 90 | // Specifies the frequency of requests initiated by USB Host for 91 | // function USBD_HIDn_GetReport. 92 | #define USBD_HID0_EP_INT_OUT_BINTERVAL 1 93 | 94 | // 95 | 96 | // High-speed 97 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 98 | // 99 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 100 | // Specifies the physical packet size used for information exchange. 101 | // Maximum value is 1024. 102 | // Additional transactions per microframe 103 | // Additional transactions improve communication performance. 104 | // <0=>None <1=>1 additional <2=>2 additional 105 | #define USBD_HID0_EP_INT_OUT_HS_WMAXPACKETSIZE 512 106 | 107 | // Endpoint polling Interval (in 125 us intervals) 108 | // Specifies the frequency of requests initiated by USB Host for 109 | // function USBD_HIDn_GetReport. 110 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 111 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 112 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 113 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 114 | #define USBD_HID0_EP_INT_OUT_HS_BINTERVAL 1 115 | 116 | // 117 | // 118 | // 119 | // 120 | 121 | // Human Interface Device Class Settings 122 | // Parameters are used to create USB Descriptors, USB HID Report Descriptor 123 | // and for memory allocation in the USB component. 124 | // 125 | // HID Interface String 126 | #define USBD_HID0_STR_DESC L"CMSIS-DAP v1 HS-HID" 127 | 128 | // Number of Input Reports <1-32> 129 | // Configures max 'rid' value for USBD_HID0_GetReport and USBD_HID_GetReportTrigger 130 | #define USBD_HID0_IN_REPORT_NUM 1 131 | 132 | // Number of Output Reports <1-32> 133 | // Configures max 'rid' value for USBD_HID0_SetReport 134 | #define USBD_HID0_OUT_REPORT_NUM 1 135 | 136 | // Maximum Input Report Size (in bytes) <1-65535> 137 | // Allocates memory and configures 'len' value for USBD_HID0_GetReport 138 | // and USBD_HID_GetReportTrigger 139 | #define USBD_HID0_IN_REPORT_MAX_SZ 512 140 | 141 | // Maximum Output Report Size (in bytes) <1-65535> 142 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 143 | // when rtype=HID_REPORT_OUTPUT. 144 | #define USBD_HID0_OUT_REPORT_MAX_SZ 512 145 | 146 | // Maximum Feature Report Size (in bytes) <1-65535> 147 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 148 | // when rtype=HID_REPORT_FEATURE 149 | #define USBD_HID0_FEAT_REPORT_MAX_SZ 1 150 | 151 | // Use User Provided HID Report Descriptor 152 | // User needs to provide HID Report Descriptor in array 153 | // const uint8_t usbd_hid0_report_descriptor[] 154 | #define USBD_HID0_USER_REPORT_DESCRIPTOR 0 155 | 156 | // User Provided HID Report Descriptor Size (in bytes) <1-65535> 157 | #define USBD_HID0_USER_REPORT_DESCRIPTOR_SIZE 33 158 | 159 | // 160 | // 161 | 162 | // OS Resources Settings 163 | // These settings are used to optimize usage of OS resources. 164 | // Human Interface Device Class Thread Stack Size <64-65536> 165 | #define USBD_HID0_THREAD_STACK_SIZE 1024 166 | 167 | // Human Interface Device Class Thread Priority 168 | #define USBD_HID0_THREAD_PRIORITY osPriorityAboveNormal 169 | 170 | // 171 | // 172 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/RTE/_STLINKv3DAP_v1_v2/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'STLINKv3DAP_v1+v2' 7 | * Target: 'STLINKv3DAP_v1+v2' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f7xx.h" 18 | 19 | /* ARM::CMSIS:RTOS2:Keil RTX5:Library:5.5.1 */ 20 | #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ 21 | #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */ 22 | /* Keil.MDK-Plus::USB:CORE:Release:6.13.6 */ 23 | #define RTE_USB_Core /* USB Core */ 24 | #define RTE_USB_Core_Release /* USB Core Release Version */ 25 | /* Keil.MDK-Plus::USB:Device:6.13.6 */ 26 | #define RTE_USB_Device_0 /* USB Device 0 */ 27 | 28 | /* Keil.MDK-Plus::USB:Device:Custom Class:6.13.6 */ 29 | #define RTE_USB_Device_CustomClass_0 /* USB Device Custom Class instance 0 */ 30 | 31 | /* Keil.MDK-Plus::USB:Device:HID:6.13.6 */ 32 | #define RTE_USB_Device_HID_0 /* USB Device HID instance 0 */ 33 | 34 | /* Keil::CMSIS Driver:USART:1.13.0 */ 35 | #define RTE_Drivers_USART1 /* Driver USART1 */ 36 | #define RTE_Drivers_USART2 /* Driver USART2 */ 37 | #define RTE_Drivers_USART3 /* Driver USART3 */ 38 | #define RTE_Drivers_USART4 /* Driver USART4 */ 39 | #define RTE_Drivers_USART5 /* Driver USART5 */ 40 | #define RTE_Drivers_USART6 /* Driver USART6 */ 41 | #define RTE_Drivers_USART7 /* Driver USART7 */ 42 | #define RTE_Drivers_USART8 /* Driver USART8 */ 43 | /* Keil::CMSIS Driver:USB Device:High-speed:1.14.0 */ 44 | #define RTE_Drivers_USBD1 /* Driver USBD1 */ 45 | /* Keil::Device:STM32Cube Framework:Classic:1.2.7 */ 46 | #define RTE_DEVICE_FRAMEWORK_CLASSIC 47 | /* Keil::Device:STM32Cube HAL:Common:1.2.7 */ 48 | #define RTE_DEVICE_HAL_COMMON 49 | /* Keil::Device:STM32Cube HAL:Cortex:1.2.7 */ 50 | #define RTE_DEVICE_HAL_CORTEX 51 | /* Keil::Device:STM32Cube HAL:DMA:1.2.7 */ 52 | #define RTE_DEVICE_HAL_DMA 53 | /* Keil::Device:STM32Cube HAL:GPIO:1.2.7 */ 54 | #define RTE_DEVICE_HAL_GPIO 55 | /* Keil::Device:STM32Cube HAL:PWR:1.2.7 */ 56 | #define RTE_DEVICE_HAL_PWR 57 | /* Keil::Device:STM32Cube HAL:RCC:1.2.7 */ 58 | #define RTE_DEVICE_HAL_RCC 59 | /* Keil::Device:STM32Cube HAL:USART:1.2.7 */ 60 | #define RTE_DEVICE_HAL_USART 61 | /* Keil::Device:Startup:1.2.4 */ 62 | #define RTE_DEVICE_STARTUP_STM32F7XX /* Device Startup for STM32F7 */ 63 | 64 | 65 | #endif /* RTE_COMPONENTS_H */ 66 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/USER/STLINK_V3MINI_BSP.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file STLINK-V3MINI_BSP.h 4 | * @author RadioOperator 5 | * @brief STLINK-V3MINI Board Support Package 6 | * LED GPIO initialize 7 | * DAP GPIO initialize 8 | * @version V1.1 9 | * @date 2019-11-09 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Define to prevent recursive inclusion -------------------------------------*/ 14 | #ifndef STLINK_V3MINI_BSP_H 15 | #define STLINK_V3MINI_BSP_H 16 | 17 | /* Includes ------------------------------------------------------------------*/ 18 | #include "stm32f7xx_hal.h" 19 | 20 | 21 | // Debug Port I/O Pins for STM32F723, matched with STLINK-V3MINI board 22 | 23 | //SWCLK/TCK input pin PB2 input 24 | #define PIN_SWCLK_TCK_I_PORT GPIOB 25 | #define PIN_SWCLK_TCK_I_BIT GPIO_PIN_2 26 | 27 | // SWCLK/TCK Pin PH6 output 28 | #define PIN_SWCLK_TCK_O_PORT GPIOH 29 | #define PIN_SWCLK_TCK_O_BIT GPIO_PIN_6 30 | 31 | // SWDIO/TMS Pin input PH7 input 32 | #define PIN_SWDIO_TMS_I_PORT GPIOH 33 | #define PIN_SWDIO_TMS_I_BIT GPIO_PIN_7 34 | 35 | // SWDIO Output Enable Pin PF9 output 36 | #define PIN_SWDIO_TMS_O_PORT GPIOF 37 | #define PIN_SWDIO_TMS_O_BIT GPIO_PIN_9 38 | 39 | // TDI Pin PA1 input 40 | #define PIN_TDI_I_PORT GPIOA 41 | #define PIN_TDI_I_BIT GPIO_PIN_1 42 | 43 | // TDI Pin PF8 output 44 | #define PIN_TDI_O_PORT GPIOF 45 | #define PIN_TDI_O_BIT GPIO_PIN_8 46 | 47 | // TDO Pin PD2, input, UART5_RX 48 | #define PIN_TDO_PORT GPIOD 49 | #define PIN_TDO_BIT GPIO_PIN_2 50 | 51 | // nTRST Pin Not available 52 | #define PIN_nTRST_PORT 53 | #define PIN_nTRST_BIT 54 | 55 | // nRESET Pin PA6 output 56 | #define PIN_nRESET_PORT GPIOA 57 | #define PIN_nRESET_BIT GPIO_PIN_6 58 | 59 | // nRESET Output Enable Pin Not available 60 | #define PIN_nRESET_OE_PORT 61 | #define PIN_nRESET_OE_BIT 62 | 63 | 64 | // Debug Unit LEDs 65 | 66 | // Connected LED PA10 - High, RED 67 | #define LED_CONNECTED_PORT GPIOA 68 | #define LED_CONNECTED_BIT GPIO_PIN_10 69 | 70 | // Target Running LED PA10 - Low, GREEN 71 | #define LED_RUNNING_PORT GPIOA 72 | #define LED_RUNNING_BIT GPIO_PIN_10 73 | 74 | 75 | void BSP_GPIO_Init(void); 76 | 77 | typedef enum 78 | { 79 | LED_STANDBY, //GRN:RED = 15:1, Standby mode, 1=125ms 80 | LED_DEBUG_PAUSE, //GRN:RED = RED, Target board Pause mode, RED only. 81 | LED_DEBUG_RUN, //GRN:RED = 4:4, Target board running mode, slow blink. 82 | LED_VCP_RUN, //GRN:RED = 1:1, VCP data transfering, fast blink, active at Standby mode only. 83 | 84 | } LED_Mode_t; 85 | 86 | extern LED_Mode_t LED_Mode; 87 | 88 | int Init_LED_Timer (void); 89 | 90 | void vResetTarget(uint32_t bit); 91 | 92 | 93 | #endif //#ifndef STLINK_V3MINI_BSP_H 94 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/USER/USBD_User_HID_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_User_HID_0.c 6 | * Purpose: USB Device Human Interface Device class (HID) User module 7 | * Rev.: V6.2.3 8 | *----------------------------------------------------------------------------*/ 9 | /** 10 | * \addtogroup usbd_hidFunctions 11 | * 12 | * USBD_User_HID_0.c implements the application specific functionality of the 13 | * HID class and is used to receive and send data reports to the USB Host. 14 | * 15 | * The implementation must match the configuration file USBD_Config_HID_0.h. 16 | * The following values in USBD_Config_HID_0.h affect the user code: 17 | * 18 | * - 'Endpoint polling Interval' specifies the frequency of requests 19 | * initiated by USB Host for \ref USBD_HIDn_GetReport. 20 | * 21 | * - 'Number of Output Reports' configures the values for \em rid of 22 | * \ref USBD_HIDn_SetReport. 23 | * 24 | * - 'Number of Input Reports' configures the values for \em rid of 25 | * \ref USBD_HIDn_GetReport and \ref USBD_HID_GetReportTrigger. 26 | * 27 | * - 'Maximum Input Report Size' specifies the maximum value for: 28 | * - return of \ref USBD_HIDn_GetReport 29 | * - len of \ref USBD_HID_GetReportTrigger. 30 | * 31 | * - 'Maximum Output Report Size' specifies the maximum value for \em len 32 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_OUTPUT 33 | * 34 | * - 'Maximum Feature Report Size' specifies the maximum value for \em len 35 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_FEATURE 36 | * 37 | */ 38 | 39 | 40 | //! [code_USBD_User_HID] 41 | 42 | #include 43 | #include 44 | #include "cmsis_os2.h" 45 | #define osObjectsExternal 46 | #include "osObjects.h" 47 | #include "rl_usb.h" 48 | #include "USBD_Config_HID_0.h" 49 | #include "DAP_config.h" 50 | #include "DAP.h" 51 | 52 | 53 | #if (USBD_HID0_OUT_REPORT_MAX_SZ != DAP_PACKET_SIZE) 54 | #error "USB HID0 Output Report Size must match DAP Packet Size" 55 | #endif 56 | #if (USBD_HID0_IN_REPORT_MAX_SZ != DAP_PACKET_SIZE) 57 | #error "USB HID Input Report Size must match DAP Packet Size" 58 | #endif 59 | 60 | static volatile uint16_t USB_RequestIndexI; // Request Index In 61 | static volatile uint16_t USB_RequestIndexO; // Request Index Out 62 | static volatile uint16_t USB_RequestCountI; // Request Count In 63 | static volatile uint16_t USB_RequestCountO; // Request Count Out 64 | 65 | static volatile uint16_t USB_ResponseIndexI; // Response Index In 66 | static volatile uint16_t USB_ResponseIndexO; // Response Index Out 67 | static volatile uint16_t USB_ResponseCountI; // Response Count In 68 | static volatile uint16_t USB_ResponseCountO; // Response Count Out 69 | static volatile uint8_t USB_ResponseIdle; // Response Idle Flag 70 | 71 | static uint8_t USB_Request [DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Request Buffer 72 | static uint8_t USB_Response[DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Response Buffer 73 | 74 | 75 | // Called during USBD_Initialize to initialize the USB HID class instance. 76 | void USBD_HID0_Initialize (void) { 77 | // Initialize variables 78 | USB_RequestIndexI = 0U; 79 | USB_RequestIndexO = 0U; 80 | USB_RequestCountI = 0U; 81 | USB_RequestCountO = 0U; 82 | USB_ResponseIndexI = 0U; 83 | USB_ResponseIndexO = 0U; 84 | USB_ResponseCountI = 0U; 85 | USB_ResponseCountO = 0U; 86 | USB_ResponseIdle = 1U; 87 | } 88 | 89 | 90 | // Called during USBD_Uninitialize to de-initialize the USB HID class instance. 91 | void USBD_HID0_Uninitialize (void) { 92 | } 93 | 94 | 95 | // \brief Prepare HID Report data to send. 96 | // \param[in] rtype report type: 97 | // - HID_REPORT_INPUT = input report requested 98 | // - HID_REPORT_FEATURE = feature report requested 99 | // \param[in] req request type: 100 | // - USBD_HID_REQ_EP_CTRL = control endpoint request 101 | // - USBD_HID_REQ_PERIOD_UPDATE = idle period expiration request 102 | // - USBD_HID_REQ_EP_INT = previously sent report on interrupt endpoint request 103 | // \param[in] rid report ID (0 if only one report exists). 104 | // \param[out] buf buffer containing report data to send. 105 | // \return number of report data bytes prepared to send or invalid report requested. 106 | // - value >= 0: number of report data bytes prepared to send 107 | // - value = -1: invalid report requested 108 | int32_t USBD_HID0_GetReport (uint8_t rtype, uint8_t req, uint8_t rid, uint8_t *buf) { 109 | (void)rid; 110 | 111 | switch (rtype) { 112 | case HID_REPORT_INPUT: 113 | switch (req) { 114 | case USBD_HID_REQ_EP_CTRL: // Explicit USB Host request via Control OUT Endpoint 115 | case USBD_HID_REQ_PERIOD_UPDATE: // Periodic USB Host request via Interrupt OUT Endpoint 116 | break; 117 | case USBD_HID_REQ_EP_INT: // Called after USBD_HID_GetReportTrigger to signal data obtained. 118 | if (USB_ResponseCountI != USB_ResponseCountO) { 119 | // Load data from response buffer to be sent back 120 | memcpy(buf, USB_Response[USB_ResponseIndexO], DAP_PACKET_SIZE); 121 | USB_ResponseIndexO++; 122 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 123 | USB_ResponseIndexO = 0U; 124 | } 125 | USB_ResponseCountO++; 126 | return ((int32_t)DAP_PACKET_SIZE); 127 | } else { 128 | USB_ResponseIdle = 1U; 129 | } 130 | break; 131 | } 132 | break; 133 | case HID_REPORT_FEATURE: 134 | break; 135 | } 136 | return (0); 137 | } 138 | 139 | 140 | // \brief Process received HID Report data. 141 | // \param[in] rtype report type: 142 | // - HID_REPORT_OUTPUT = output report received 143 | // - HID_REPORT_FEATURE = feature report received 144 | // \param[in] req request type: 145 | // - USBD_HID_REQ_EP_CTRL = report received on control endpoint 146 | // - USBD_HID_REQ_EP_INT = report received on interrupt endpoint 147 | // \param[in] rid report ID (0 if only one report exists). 148 | // \param[in] buf buffer that receives report data. 149 | // \param[in] len length of received report data. 150 | // \return true received report data processed. 151 | // \return false received report data not processed or request not supported. 152 | bool USBD_HID0_SetReport (uint8_t rtype, uint8_t req, uint8_t rid, const uint8_t *buf, int32_t len) { 153 | (void)req; 154 | (void)rid; 155 | 156 | switch (rtype) { 157 | case HID_REPORT_OUTPUT: 158 | if (len == 0) { 159 | break; 160 | } 161 | if (buf[0] == ID_DAP_TransferAbort) { 162 | DAP_TransferAbort = 1U; 163 | break; 164 | } 165 | if ((uint16_t)(USB_RequestCountI - USB_RequestCountO) == DAP_PACKET_COUNT) { 166 | osThreadFlagsSet(DAP_v1_ThreadId, 0x80U); 167 | break; // Discard packet when buffer is full 168 | } 169 | // Store received data into request buffer 170 | memcpy(USB_Request[USB_RequestIndexI], buf, (uint32_t)len); 171 | USB_RequestIndexI++; 172 | if (USB_RequestIndexI == DAP_PACKET_COUNT) { 173 | USB_RequestIndexI = 0U; 174 | } 175 | USB_RequestCountI++; 176 | osThreadFlagsSet(DAP_v1_ThreadId, 0x01U); 177 | break; 178 | case HID_REPORT_FEATURE: 179 | break; 180 | } 181 | return true; 182 | } 183 | 184 | 185 | // DAP Thread. 186 | __NO_RETURN void DAP_v1_Thread (void *argument) { 187 | uint32_t flags; 188 | uint32_t n; 189 | (void) argument; 190 | 191 | for (;;) { 192 | osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 193 | 194 | // Process pending requests 195 | while (USB_RequestCountI != USB_RequestCountO) { 196 | 197 | // Handle Queue Commands 198 | n = USB_RequestIndexO; 199 | while (USB_Request[n][0] == ID_DAP_QueueCommands) { 200 | USB_Request[n][0] = ID_DAP_ExecuteCommands; 201 | n++; 202 | if (n == DAP_PACKET_COUNT) { 203 | n = 0U; 204 | } 205 | if (n == USB_RequestIndexI) { 206 | flags = osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 207 | if (flags & 0x80U) { 208 | break; 209 | } 210 | } 211 | } 212 | 213 | // Execute DAP Command (process request and prepare response) 214 | DAP_ExecuteCommand(USB_Request[USB_RequestIndexO], USB_Response[USB_ResponseIndexI]); 215 | 216 | // Update Request Index and Count 217 | USB_RequestIndexO++; 218 | if (USB_RequestIndexO == DAP_PACKET_COUNT) { 219 | USB_RequestIndexO = 0U; 220 | } 221 | USB_RequestCountO++; 222 | 223 | // Update Response Index and Count 224 | USB_ResponseIndexI++; 225 | if (USB_ResponseIndexI == DAP_PACKET_COUNT) { 226 | USB_ResponseIndexI = 0U; 227 | } 228 | USB_ResponseCountI++; 229 | 230 | if (USB_ResponseIdle) { 231 | if (USB_ResponseCountI != USB_ResponseCountO) { 232 | // Load data from response buffer to be sent back 233 | n = USB_ResponseIndexO++; 234 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 235 | USB_ResponseIndexO = 0U; 236 | } 237 | USB_ResponseCountO++; 238 | USB_ResponseIdle = 0U; 239 | USBD_HID_GetReportTrigger(0U, 0U, USB_Response[n], DAP_PACKET_SIZE); 240 | } 241 | } 242 | } 243 | } 244 | } 245 | 246 | //! [code_USBD_User_HID] 247 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/USER/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file main.c 4 | * @author ARM CMSIS-DAP scource code, modified by RadioOperator 5 | * 6 | * @brief CMSIS-DAP v1 for STLINK-V3MINI 7 | * 8 | * @version V2.0 9 | * @date 2019-12-22 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Includes ------------------------------------------------------------------*/ 14 | 15 | #ifdef _RTE_ 16 | #include "RTE_Components.h" // Component selection 17 | #endif 18 | #ifdef RTE_CMSIS_RTOS2 // when RTE component CMSIS RTOS2 is used 19 | #include "cmsis_os2.h" // ::CMSIS:RTOS2 20 | #endif 21 | #include "stm32f7xx_hal.h" 22 | #include "osObjects.h" 23 | #include "rl_usb.h" 24 | #include "DAP_config.h" 25 | #include "DAP.h" 26 | #include "STLINK_V3MINI_BSP.h" 27 | 28 | 29 | #ifdef RTE_CMSIS_RTOS2_RTX5 30 | /** 31 | * Override default HAL_GetTick function 32 | */ 33 | uint32_t HAL_GetTick (void) { 34 | static uint32_t ticks = 0U; 35 | uint32_t i; 36 | 37 | if (osKernelGetState () == osKernelRunning) { 38 | return ((uint32_t)osKernelGetTickCount ()); 39 | } 40 | 41 | /* If Kernel is not running wait approximately 1 ms then increment 42 | and return auxiliary tick counter value */ 43 | Delayms(1); 44 | 45 | return ++ticks; 46 | } 47 | #endif 48 | 49 | /* Private function prototypes -----------------------------------------------*/ 50 | static void SystemClock_Config(void); 51 | static void Error_Handler(void); 52 | static void MPU_Config(void); 53 | static void CPU_CACHE_Enable(void); 54 | 55 | 56 | /* Private functions ---------------------------------------------------------*/ 57 | // Application Main program 58 | __NO_RETURN void app_main (void *argument) { 59 | (void)argument; 60 | 61 | DAP_Setup(); // DAP Setup 62 | 63 | USBD_Initialize(0U); // USB Device Initialization 64 | USBD_Connect(0U); // USB Device Connect 65 | while (!USBD_Configured(0U)); // Wait for USB Device to configure 66 | 67 | // Create CMSIS-DAP v1 HID Thread 68 | DAP_v1_ThreadId = osThreadNew(DAP_v1_Thread, NULL, &DAP_ThreadAttr); 69 | // Create CMSIS-DAP v2 WinUSB Thread 70 | DAP_v2_ThreadId = osThreadNew(DAP_v2_Thread, NULL, &DAP_ThreadAttr); 71 | 72 | // Create SWO Thread for CMSIS-DAP v2, cannot use SWO_STREAM mode in v1+v2 73 | // SWO_ThreadId = osThreadNew(SWO_Thread, NULL, &SWO_ThreadAttr); 74 | 75 | // create LED Timer Thread, radiooperator 76 | Init_LED_Timer(); 77 | 78 | osDelay(osWaitForever); 79 | for (;;) {}; 80 | } 81 | /** 82 | * @brief Main program 83 | * @param None 84 | * @retval None 85 | */ 86 | int main(void) 87 | { 88 | /* This project template calls firstly two functions in order to configure MPU feature 89 | and to enable the CPU Cache, respectively MPU_Config() and CPU_CACHE_Enable(). 90 | These functions are provided as template implementation that User may integrate 91 | in his application, to enhance the performance in case of use of AXI interface 92 | with several masters. */ 93 | 94 | /* Configure the MPU attributes as Write Through */ 95 | MPU_Config(); 96 | 97 | /* Enable the CPU Cache */ 98 | CPU_CACHE_Enable(); 99 | 100 | /* STM32F7xx HAL library initialization: 101 | - Configure the Flash ART accelerator on ITCM interface 102 | - Configure the Systick to generate an interrupt each 1 msec 103 | - Set NVIC Group Priority to 4 104 | - Low Level Initialization 105 | */ 106 | HAL_Init(); 107 | 108 | /* Configure the System clock to have a frequency of 216 MHz */ 109 | SystemClock_Config(); 110 | SystemCoreClockUpdate(); 111 | 112 | /* Add your application code here 113 | */ 114 | BSP_GPIO_Init(); 115 | 116 | #ifdef RTE_CMSIS_RTOS2 117 | /* Initialize CMSIS-RTOS2 */ 118 | osKernelInitialize (); 119 | 120 | /* Create thread functions that start executing, 121 | Example: osThreadNew(app_main, NULL, NULL); */ 122 | osThreadNew(app_main, NULL, NULL); // Create application main thread 123 | if (osKernelGetState() == osKernelReady) { 124 | osKernelStart(); // Start thread execution 125 | } 126 | /* Start thread execution */ 127 | // osKernelStart(); 128 | #endif 129 | 130 | /* Infinite loop */ 131 | while (1) 132 | { 133 | } 134 | } 135 | 136 | /** 137 | * @brief System Clock Configuration 138 | * The system Clock is configured as follow : 139 | * System Clock source = PLL (HSE) 140 | * SYSCLK(Hz) = 216000000 141 | * HCLK(Hz) = 216000000 142 | * AHB Prescaler = 1 143 | * APB1 Prescaler = 4 144 | * APB2 Prescaler = 2 145 | * HSE Frequency(Hz) = 25000000 146 | * PLL_M = 25 147 | * PLL_N = 432 148 | * PLL_P = 2 149 | * PLL_Q = 9 150 | * VDD(V) = 3.3 151 | * Main regulator output voltage = Scale1 mode 152 | * Flash Latency(WS) = 7 153 | * @param None 154 | * @retval None 155 | */ 156 | static void SystemClock_Config(void) 157 | { 158 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 159 | RCC_OscInitTypeDef RCC_OscInitStruct; 160 | 161 | /* Enable HSE Oscillator and activate PLL with HSE as source */ 162 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 163 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 164 | RCC_OscInitStruct.HSIState = RCC_HSI_OFF; 165 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 166 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 167 | RCC_OscInitStruct.PLL.PLLM = 25; 168 | RCC_OscInitStruct.PLL.PLLN = 432; 169 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 170 | RCC_OscInitStruct.PLL.PLLQ = 9; 171 | if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 172 | { 173 | Error_Handler(); 174 | } 175 | 176 | /* activate the OverDrive to reach the 216 Mhz Frequency */ 177 | if(HAL_PWREx_EnableOverDrive() != HAL_OK) 178 | { 179 | Error_Handler(); 180 | } 181 | 182 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 183 | clocks dividers */ 184 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); 185 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 186 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 187 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 188 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 189 | if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) 190 | { 191 | Error_Handler(); 192 | } 193 | } 194 | 195 | /** 196 | * @brief This function is executed in case of error occurrence. 197 | * @param None 198 | * @retval None 199 | */ 200 | static void Error_Handler(void) 201 | { 202 | /* User may add here some code to deal with this error */ 203 | while(1) 204 | { 205 | } 206 | } 207 | 208 | /** 209 | * @brief Configure the MPU attributes as Write Through Internal SRAM1/SRAM2. 210 | * @note The Base Address is 0x20000000 and Region Size 512KB. 211 | * @param None 212 | * @retval None 213 | */ 214 | static void MPU_Config(void) 215 | { 216 | MPU_Region_InitTypeDef MPU_InitStruct; 217 | 218 | /* Disable the MPU */ 219 | HAL_MPU_Disable(); 220 | 221 | /* Configure the MPU attributes as WT for SRAM */ 222 | MPU_InitStruct.Enable = MPU_REGION_ENABLE; 223 | MPU_InitStruct.BaseAddress = 0x20000000; 224 | MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; 225 | MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; 226 | MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; 227 | MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; 228 | MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; 229 | MPU_InitStruct.Number = MPU_REGION_NUMBER0; 230 | MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; 231 | MPU_InitStruct.SubRegionDisable = 0x00; 232 | MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; 233 | 234 | HAL_MPU_ConfigRegion(&MPU_InitStruct); 235 | 236 | /* Enable the MPU */ 237 | HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); 238 | } 239 | 240 | /** 241 | * @brief CPU L1-Cache enable. 242 | * @param None 243 | * @retval None 244 | */ 245 | static void CPU_CACHE_Enable(void) 246 | { 247 | /* Enable I-Cache */ 248 | SCB_EnableICache(); 249 | 250 | /* Enable D-Cache */ 251 | SCB_EnableDCache(); 252 | } 253 | 254 | #ifdef USE_FULL_ASSERT 255 | 256 | /** 257 | * @brief Reports the name of the source file and the source line number 258 | * where the assert_param error has occurred. 259 | * @param file: pointer to the source file name 260 | * @param line: assert_param error line source number 261 | * @retval None 262 | */ 263 | void assert_failed(uint8_t* file, uint32_t line) 264 | { 265 | /* User can add his own implementation to report the file name and line number, 266 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 267 | 268 | /* Infinite loop */ 269 | while (1) 270 | { 271 | } 272 | } 273 | #endif 274 | -------------------------------------------------------------------------------- /STLINKv3DAP_v1+v2/USER/osObjects.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ---------------------------------------------------------------------- 19 | * 20 | * $Date: 1. December 2017 21 | * $Revision: V2.0.0 22 | * 23 | * Project: CMSIS-DAP Examples LPC-Link-II 24 | * Title: osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II 25 | * 26 | *---------------------------------------------------------------------------*/ 27 | 28 | #ifndef __osObjects_h__ 29 | #define __osObjects_h__ 30 | 31 | #include "cmsis_os2.h" 32 | 33 | #ifdef osObjectsExternal 34 | extern osThreadId_t DAP_v1_ThreadId; 35 | extern osThreadId_t DAP_v2_ThreadId; 36 | extern osThreadId_t SWO_ThreadId; 37 | #else 38 | const osThreadAttr_t DAP_ThreadAttr = { 39 | .priority = osPriorityNormal 40 | }; 41 | const osThreadAttr_t SWO_ThreadAttr = { 42 | .priority = osPriorityAboveNormal 43 | }; 44 | extern osThreadId_t DAP_v1_ThreadId; 45 | osThreadId_t DAP_v1_ThreadId; 46 | extern osThreadId_t DAP_v2_ThreadId; 47 | osThreadId_t DAP_v2_ThreadId; 48 | extern osThreadId_t SWO_ThreadId; 49 | osThreadId_t SWO_ThreadId; 50 | #endif 51 | 52 | extern void DAP_v1_Thread (void *argument); 53 | extern void DAP_v2_Thread (void *argument); 54 | extern void SWO_Thread (void *argument); 55 | 56 | extern void app_main (void *argument); 57 | 58 | #endif /* __osObjects_h__ */ 59 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/DebugConfig/STLINKv3DAPv1_HID_VCP_STM32F723IEKx_2.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // File: STM32F72x_73x.dbgconf 2 | // Version: 1.0.0 3 | // Note: refer to STM32F72xxx STM32F73xxx reference manual (RM0431) 4 | // refer to STM32F72xxx STM32F73xxx datasheets 5 | 6 | // <<< Use Configuration Wizard in Context Menu >>> 7 | 8 | // Debug MCU configuration register (DBGMCU_CR) 9 | // DBG_STANDBY Debug standby mode 10 | // DBG_STOP Debug stop mode 11 | // DBG_SLEEP Debug sleep mode 12 | // 13 | DbgMCU_CR = 0x00000007; 14 | 15 | // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) 16 | // Reserved bits must be kept at reset value 17 | // DBG_CAN1_STOP Debug CAN1 stopped when core is halted 18 | // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 20 | // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 21 | // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted 22 | // DBG_WWDG_STOP Debug window watchdog stopped when core is halted 23 | // DBG_RTC_STOP RTC stopped when core is halted 24 | // DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted 25 | // DBG_TIM14_STOP TIM14 counter stopped when core is halted 26 | // DBG_TIM13_STOP TIM13 counter stopped when core is halted 27 | // DBG_TIM12_STOP TIM12 counter stopped when core is halted 28 | // DBG_TIM7_STOP TIM7 counter stopped when core is halted 29 | // DBG_TIM6_STOP TIM6 counter stopped when core is halted 30 | // DBG_TIM5_STOP TIM5 counter stopped when core is halted 31 | // DBG_TIM4_STOP TIM4 counter stopped when core is halted 32 | // DBG_TIM3_STOP TIM3 counter stopped when core is halted 33 | // DBG_TIM2_STOP TIM2 counter stopped when core is halted 34 | // 35 | DbgMCU_APB1_Fz = 0x00000000; 36 | 37 | // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) 38 | // Reserved bits must be kept at reset value 39 | // DBG_TIM11_STOP TIM11 counter stopped when core is halted 40 | // DBG_TIM10_STOP TIM10 counter stopped when core is halted 41 | // DBG_TIM9_STOP TIM9 counter stopped when core is halted 42 | // DBG_TIM8_STOP TIM8 counter stopped when core is halted 43 | // DBG_TIM1_STOP TIM1 counter stopped when core is halted 44 | // 45 | DbgMCU_APB2_Fz = 0x00000000; 46 | 47 | // TPIU Pin Routing (TRACECLK fixed on Pin PE2) 48 | // TRACECLK: Pin PE2 49 | // TRACED0 50 | // ETM Trace Data 0 51 | // <0x00040003=> Pin PE3 52 | // <0x00020001=> Pin PC1 53 | // <0x0006000D=> Pin PG13 54 | // TRACED1 55 | // ETM Trace Data 1 56 | // <0x00040004=> Pin PE4 57 | // <0x00020008=> Pin PC8 58 | // <0x0006000E=> Pin PG14 59 | // TRACED2 60 | // ETM Trace Data 2 61 | // <0x00040005=> Pin PE5 62 | // <0x00030002=> Pin PD2 63 | // TRACED3 64 | // ETM Trace Data 3 65 | // <0x00040006=> Pin PE6 66 | // <0x0002000C=> Pin PC12 67 | // 68 | TraceClk_Pin = 0x00040002; 69 | TraceD0_Pin = 0x00040003; 70 | TraceD1_Pin = 0x00040004; 71 | TraceD2_Pin = 0x00040005; 72 | TraceD3_Pin = 0x00040006; 73 | 74 | // <<< end of configuration section >>> 75 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/CMSIS/RTX_Config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ----------------------------------------------------------------------------- 19 | * 20 | * $Revision: V5.1.0 21 | * 22 | * Project: CMSIS-RTOS RTX 23 | * Title: RTX Configuration 24 | * 25 | * ----------------------------------------------------------------------------- 26 | */ 27 | 28 | #include "cmsis_compiler.h" 29 | #include "rtx_os.h" 30 | 31 | // OS Idle Thread 32 | __WEAK __NO_RETURN void osRtxIdleThread (void *argument) { 33 | (void)argument; 34 | 35 | for (;;) {} 36 | } 37 | 38 | // OS Error Callback function 39 | __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { 40 | (void)object_id; 41 | 42 | switch (code) { 43 | case osRtxErrorStackUnderflow: 44 | // Stack overflow detected for thread (thread_id=object_id) 45 | break; 46 | case osRtxErrorISRQueueOverflow: 47 | // ISR Queue overflow detected when inserting object (object_id) 48 | break; 49 | case osRtxErrorTimerQueueOverflow: 50 | // User Timer Callback Queue overflow detected for timer (timer_id=object_id) 51 | break; 52 | case osRtxErrorClibSpace: 53 | // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM 54 | break; 55 | case osRtxErrorClibMutex: 56 | // Standard C/C++ library mutex initialization failed 57 | break; 58 | default: 59 | // Reserved 60 | break; 61 | } 62 | for (;;) {} 63 | //return 0U; 64 | } 65 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/Device/STM32F723IEKx/system_stm32f7xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f7xx.c 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. 6 | * 7 | * This file provides two functions and one global variable to be called from 8 | * user application: 9 | * - SystemInit(): This function is called at startup just after reset and 10 | * before branch to main program. This call is made inside 11 | * the "startup_stm32f7xx.s" file. 12 | * 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used 14 | * by the user application to setup the SysTick 15 | * timer or configure other parameters. 16 | * 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must 18 | * be called whenever the core clock is changed 19 | * during program execution. 20 | * 21 | * 22 | ****************************************************************************** 23 | * @attention 24 | * 25 | *

© COPYRIGHT 2016 STMicroelectronics

26 | * 27 | * Redistribution and use in source and binary forms, with or without modification, 28 | * are permitted provided that the following conditions are met: 29 | * 1. Redistributions of source code must retain the above copyright notice, 30 | * this list of conditions and the following disclaimer. 31 | * 2. Redistributions in binary form must reproduce the above copyright notice, 32 | * this list of conditions and the following disclaimer in the documentation 33 | * and/or other materials provided with the distribution. 34 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | * may be used to endorse or promote products derived from this software 36 | * without specific prior written permission. 37 | * 38 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | * 49 | ****************************************************************************** 50 | */ 51 | 52 | /** @addtogroup CMSIS 53 | * @{ 54 | */ 55 | 56 | /** @addtogroup stm32f7xx_system 57 | * @{ 58 | */ 59 | 60 | /** @addtogroup STM32F7xx_System_Private_Includes 61 | * @{ 62 | */ 63 | 64 | #include "stm32f7xx.h" 65 | 66 | #if !defined (HSE_VALUE) 67 | #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ 68 | #endif /* HSE_VALUE */ 69 | 70 | #if !defined (HSI_VALUE) 71 | #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ 72 | #endif /* HSI_VALUE */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @addtogroup STM32F7xx_System_Private_TypesDefinitions 79 | * @{ 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @addtogroup STM32F7xx_System_Private_Defines 87 | * @{ 88 | */ 89 | 90 | /************************* Miscellaneous Configuration ************************/ 91 | 92 | /*!< Uncomment the following line if you need to relocate your vector Table in 93 | Internal SRAM. */ 94 | /* #define VECT_TAB_SRAM */ 95 | #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. 96 | This value must be a multiple of 0x200. */ 97 | /******************************************************************************/ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @addtogroup STM32F7xx_System_Private_Macros 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @addtogroup STM32F7xx_System_Private_Variables 112 | * @{ 113 | */ 114 | 115 | /* This variable is updated in three ways: 116 | 1) by calling CMSIS function SystemCoreClockUpdate() 117 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 118 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 119 | Note: If you use this function to configure the system clock; then there 120 | is no need to call the 2 first functions listed above, since SystemCoreClock 121 | variable is updated automatically. 122 | */ 123 | uint32_t SystemCoreClock = 16000000; 124 | const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; 125 | const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes 132 | * @{ 133 | */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @addtogroup STM32F7xx_System_Private_Functions 140 | * @{ 141 | */ 142 | 143 | /** 144 | * @brief Setup the microcontroller system 145 | * Initialize the Embedded Flash Interface, the PLL and update the 146 | * SystemFrequency variable. 147 | * @param None 148 | * @retval None 149 | */ 150 | void SystemInit(void) 151 | { 152 | /* FPU settings ------------------------------------------------------------*/ 153 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 154 | SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 155 | #endif 156 | /* Reset the RCC clock configuration to the default reset state ------------*/ 157 | /* Set HSION bit */ 158 | RCC->CR |= (uint32_t)0x00000001; 159 | 160 | /* Reset CFGR register */ 161 | RCC->CFGR = 0x00000000; 162 | 163 | /* Reset HSEON, CSSON and PLLON bits */ 164 | RCC->CR &= (uint32_t)0xFEF6FFFF; 165 | 166 | /* Reset PLLCFGR register */ 167 | RCC->PLLCFGR = 0x24003010; 168 | 169 | /* Reset HSEBYP bit */ 170 | RCC->CR &= (uint32_t)0xFFFBFFFF; 171 | 172 | /* Disable all interrupts */ 173 | RCC->CIR = 0x00000000; 174 | 175 | /* Configure the Vector Table location add offset address ------------------*/ 176 | #ifdef VECT_TAB_SRAM 177 | SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ 178 | #else 179 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ 180 | #endif 181 | } 182 | 183 | /** 184 | * @brief Update SystemCoreClock variable according to Clock Register Values. 185 | * The SystemCoreClock variable contains the core clock (HCLK), it can 186 | * be used by the user application to setup the SysTick timer or configure 187 | * other parameters. 188 | * 189 | * @note Each time the core clock (HCLK) changes, this function must be called 190 | * to update SystemCoreClock variable value. Otherwise, any configuration 191 | * based on this variable will be incorrect. 192 | * 193 | * @note - The system frequency computed by this function is not the real 194 | * frequency in the chip. It is calculated based on the predefined 195 | * constant and the selected clock source: 196 | * 197 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) 198 | * 199 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) 200 | * 201 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 202 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. 203 | * 204 | * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 205 | * 16 MHz) but the real value may vary depending on the variations 206 | * in voltage and temperature. 207 | * 208 | * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 209 | * 25 MHz), user has to ensure that HSE_VALUE is same as the real 210 | * frequency of the crystal used. Otherwise, this function may 211 | * have wrong result. 212 | * 213 | * - The result of this function could be not correct when using fractional 214 | * value for HSE crystal. 215 | * 216 | * @param None 217 | * @retval None 218 | */ 219 | void SystemCoreClockUpdate(void) 220 | { 221 | uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; 222 | 223 | /* Get SYSCLK source -------------------------------------------------------*/ 224 | tmp = RCC->CFGR & RCC_CFGR_SWS; 225 | 226 | switch (tmp) 227 | { 228 | case 0x00: /* HSI used as system clock source */ 229 | SystemCoreClock = HSI_VALUE; 230 | break; 231 | case 0x04: /* HSE used as system clock source */ 232 | SystemCoreClock = HSE_VALUE; 233 | break; 234 | case 0x08: /* PLL used as system clock source */ 235 | 236 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N 237 | SYSCLK = PLL_VCO / PLL_P 238 | */ 239 | pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; 240 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 241 | 242 | if (pllsource != 0) 243 | { 244 | /* HSE used as PLL clock source */ 245 | pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 246 | } 247 | else 248 | { 249 | /* HSI used as PLL clock source */ 250 | pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 251 | } 252 | 253 | pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; 254 | SystemCoreClock = pllvco/pllp; 255 | break; 256 | default: 257 | SystemCoreClock = HSI_VALUE; 258 | break; 259 | } 260 | /* Compute HCLK frequency --------------------------------------------------*/ 261 | /* Get HCLK prescaler */ 262 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; 263 | /* HCLK frequency */ 264 | SystemCoreClock >>= tmp; 265 | } 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** 272 | * @} 273 | */ 274 | 275 | /** 276 | * @} 277 | */ 278 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 279 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/Device/project.script: -------------------------------------------------------------------------------- 1 | load STM32F723IEKx 2 | project name STCubeGenerated 3 | project toolchain "MDK-ARM V5" 4 | project path "C:\STM32F723\STM32F723IEK6DAP\RTE\Device\STM32F723IEKx\" 5 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/USB/USBD_Config_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_0.c 6 | * Purpose: USB Device Configuration 7 | * Rev.: V5.2.0 8 | *------------------------------------------------------------------------------ 9 | * Use the following configuration settings in the Device Class configuration 10 | * files to assign a Device Class to this USB Device 0. 11 | * 12 | * Configuration Setting Value 13 | * --------------------- ----- 14 | * Assign Device Class to USB Device # = 0 15 | *----------------------------------------------------------------------------*/ 16 | 17 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 18 | 19 | // USB Device 0 20 | // Connect to hardware via Driver_USBD# <0-255> 21 | // Select driver control block for hardware interface. 22 | #define USBD0_PORT 1 23 | 24 | // High-speed 25 | // Enable High-speed functionality (if device supports it). 26 | #define USBD0_HS 1 27 | 28 | // Device Settings 29 | // These settings are used to create the Device Descriptor 30 | // Max Endpoint 0 Packet Size 31 | // Maximum packet size for Endpoint 0 (bMaxPacketSize0). 32 | // <8=>8 Bytes <16=>16 Bytes <32=>32 Bytes <64=>64 Bytes 33 | #define USBD0_MAX_PACKET0 64 34 | 35 | // Vendor ID <0x0000-0xFFFF> 36 | // Vendor ID assigned by USB-IF (idVendor). 37 | #define USBD0_DEV_DESC_IDVENDOR 0x0483 38 | 39 | // Product ID <0x0000-0xFFFF> 40 | // Product ID assigned by manufacturer (idProduct). 41 | #define USBD0_DEV_DESC_IDPRODUCT 0x572C 42 | 43 | // Device Release Number <0x0000-0xFFFF> 44 | // Device Release Number in binary-coded decimal (bcdDevice) 45 | #define USBD0_DEV_DESC_BCDDEVICE 0x0100 46 | 47 | // 48 | 49 | // Configuration Settings 50 | // These settings are used to create the Configuration Descriptor. 51 | // Power 52 | // Default Power Setting (D6: of bmAttributes). 53 | // <0=>Bus-powered 54 | // <1=>Self-powered 55 | // Remote Wakeup 56 | // Configuration support for Remote Wakeup (D5: of bmAttributes). 57 | #define USBD0_CFG_DESC_BMATTRIBUTES 0x80 58 | 59 | // Maximum Power Consumption (in mA) <0-510><#/2> 60 | // Maximum Power Consumption of USB Device from bus in this 61 | // specific configuration when device is fully operational (bMaxPower). 62 | #define USBD0_CFG_DESC_BMAXPOWER 250 63 | 64 | // 65 | 66 | // String Settings 67 | // These settings are used to create the String Descriptor. 68 | // Language ID <0x0000-0xFCFF> 69 | // English (United States) = 0x0409. 70 | #define USBD0_STR_DESC_LANGID 0x0409 71 | 72 | // Manufacturer String 73 | // String Descriptor describing Manufacturer. 74 | #define USBD0_STR_DESC_MAN L"RadioOperator" 75 | 76 | // Product String 77 | // String Descriptor describing Product. 78 | #define USBD0_STR_DESC_PROD L"HighSpeed-HID CMSIS-DAP" 79 | 80 | // Serial Number String 81 | // Enable Serial Number String. 82 | // If disabled Serial Number String will not be assigned to USB Device. 83 | #define USBD0_STR_DESC_SER_EN 1 84 | 85 | // Default value 86 | // Default device's Serial Number String. 87 | #define USBD0_STR_DESC_SER L"0001A0000000" 88 | 89 | // Maximum Length (in characters) <0-126> 90 | // Specifies the maximum number of Serial Number String characters that can be set at run-time. 91 | // Maximum value is 126. Use value 0 to disable RAM allocation for string. 92 | #define USBD0_STR_DESC_SER_MAX_LEN 16 93 | 94 | // 95 | // 96 | 97 | // Microsoft OS Descriptors Settings 98 | // These settings are used to create the Microsoft OS Descriptors. 99 | // OS String 100 | // Enable creation of Microsoft OS String and Extended Compat ID OS Feature Descriptors. 101 | #define USBD0_OS_DESC_EN 0 102 | 103 | // Vendor Code <0x01-0xFF> 104 | // Specifies Vendor Code used to retrieve OS Feature Descriptors. 105 | #define USBD0_OS_DESC_VENDOR_CODE 0x01 106 | 107 | // 108 | // 109 | 110 | // Control Transfer Buffer Size <64-65536:64> 111 | // Specifies size of buffer used for Control Transfers. 112 | // It should be at least as big as maximum packet size for Endpoint 0. 113 | #define USBD0_EP0_BUF_SIZE 512 114 | 115 | // OS Resources Settings 116 | // These settings are used to optimize usage of OS resources. 117 | // Core Thread Stack Size <64-65536> 118 | #define USBD0_CORE_THREAD_STACK_SIZE 512 119 | 120 | // Core Thread Priority 121 | #define USBD0_CORE_THREAD_PRIORITY osPriorityAboveNormal 122 | 123 | // 124 | // 125 | 126 | 127 | #include "RTE_Components.h" 128 | 129 | #ifdef RTE_USB_Device_CustomClass_0 130 | #include "USBD_Config_CustomClass_0.h" 131 | #endif 132 | #ifdef RTE_USB_Device_CustomClass_1 133 | #include "USBD_Config_CustomClass_1.h" 134 | #endif 135 | #ifdef RTE_USB_Device_CustomClass_2 136 | #include "USBD_Config_CustomClass_2.h" 137 | #endif 138 | #ifdef RTE_USB_Device_CustomClass_3 139 | #include "USBD_Config_CustomClass_3.h" 140 | #endif 141 | 142 | #ifdef RTE_USB_Device_HID_0 143 | #include "USBD_Config_HID_0.h" 144 | #endif 145 | #ifdef RTE_USB_Device_HID_1 146 | #include "USBD_Config_HID_1.h" 147 | #endif 148 | #ifdef RTE_USB_Device_HID_2 149 | #include "USBD_Config_HID_2.h" 150 | #endif 151 | #ifdef RTE_USB_Device_HID_3 152 | #include "USBD_Config_HID_3.h" 153 | #endif 154 | 155 | #ifdef RTE_USB_Device_MSC_0 156 | #include "USBD_Config_MSC_0.h" 157 | #endif 158 | #ifdef RTE_USB_Device_MSC_1 159 | #include "USBD_Config_MSC_1.h" 160 | #endif 161 | #ifdef RTE_USB_Device_MSC_2 162 | #include "USBD_Config_MSC_2.h" 163 | #endif 164 | #ifdef RTE_USB_Device_MSC_3 165 | #include "USBD_Config_MSC_3.h" 166 | #endif 167 | 168 | #ifdef RTE_USB_Device_CDC_0 169 | #include "USBD_Config_CDC_0.h" 170 | #endif 171 | #ifdef RTE_USB_Device_CDC_1 172 | #include "USBD_Config_CDC_1.h" 173 | #endif 174 | #ifdef RTE_USB_Device_CDC_2 175 | #include "USBD_Config_CDC_2.h" 176 | #endif 177 | #ifdef RTE_USB_Device_CDC_3 178 | #include "USBD_Config_CDC_3.h" 179 | #endif 180 | #ifdef RTE_USB_Device_CDC_4 181 | #include "USBD_Config_CDC_4.h" 182 | #endif 183 | #ifdef RTE_USB_Device_CDC_5 184 | #include "USBD_Config_CDC_5.h" 185 | #endif 186 | #ifdef RTE_USB_Device_CDC_6 187 | #include "USBD_Config_CDC_6.h" 188 | #endif 189 | #ifdef RTE_USB_Device_CDC_7 190 | #include "USBD_Config_CDC_7.h" 191 | #endif 192 | 193 | #ifdef RTE_USB_Device_ADC_0 194 | #include "USBD_Config_ADC_0.h" 195 | #endif 196 | #ifdef RTE_USB_Device_ADC_1 197 | #include "USBD_Config_ADC_1.h" 198 | #endif 199 | #ifdef RTE_USB_Device_ADC_2 200 | #include "USBD_Config_ADC_2.h" 201 | #endif 202 | #ifdef RTE_USB_Device_ADC_3 203 | #include "USBD_Config_ADC_3.h" 204 | #endif 205 | 206 | #include "usbd_config.h" 207 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/USB/USBD_Config_HID_0.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_HID_0.h 6 | * Purpose: USB Device Human Interface Device class (HID) Configuration 7 | * Rev.: V5.0.1 8 | *----------------------------------------------------------------------------*/ 9 | 10 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 11 | 12 | // USB Device: Human Interface Device class (HID) 0 13 | // Assign Device Class to USB Device # <0-3> 14 | // Select USB Device that is used for this Device Class instance 15 | #define USBD_HID0_DEV 0 16 | 17 | // Interrupt Endpoint Settings 18 | // By default, the settings match the first USB Class instance in a USB Device. 19 | // Endpoint conflicts are flagged by compile-time error messages. 20 | // 21 | // Interrupt IN Endpoint Settings 22 | // Interrupt IN Endpoint Number 23 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 24 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 25 | #define USBD_HID0_EP_INT_IN 1 26 | 27 | // Endpoint Settings 28 | // Parameters are used to create Endpoint Descriptors 29 | // and for memory allocation in the USB component. 30 | // 31 | // Full/Low-speed (High-speed disabled) 32 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 33 | // Maximum Endpoint Packet Size (in bytes) <0-64> 34 | // Specifies the physical packet size used for information exchange. 35 | // Maximum value is 64. 36 | #define USBD_HID0_EP_INT_IN_WMAXPACKETSIZE 64 37 | 38 | // Endpoint polling Interval (in ms) <1-255> 39 | // Specifies the frequency of requests initiated by USB Host for 40 | // function USBD_HIDn_GetReport. 41 | #define USBD_HID0_EP_INT_IN_BINTERVAL 1 42 | 43 | // 44 | 45 | // High-speed 46 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 47 | // 48 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 49 | // Specifies the physical packet size used for information exchange. 50 | // Maximum value is 1024. 51 | // Additional transactions per microframe 52 | // Additional transactions improve communication performance. 53 | // <0=>None <1=>1 additional <2=>2 additional 54 | #define USBD_HID0_EP_INT_IN_HS_WMAXPACKETSIZE 512 55 | 56 | // Endpoint polling Interval (in 125 us intervals) 57 | // Specifies the frequency of requests initiated by USB Host for 58 | // function USBD_HIDn_GetReport. 59 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 60 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 61 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 62 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 63 | #define USBD_HID0_EP_INT_IN_HS_BINTERVAL 1 64 | 65 | // 66 | // 67 | // 68 | 69 | // Interrupt OUT Endpoint Settings 70 | // Interrupt OUT Endpoint Number 71 | // When OUT Endpoint is set to "Not used" the USB Host uses 72 | // the Control Endpoint 0 for Out Reports. 73 | // <0=>Not used 74 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 75 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 76 | #define USBD_HID0_EP_INT_OUT 1 77 | 78 | // Endpoint Settings 79 | // Parameters are used to create USB Descriptors, HID Device Descriptor 80 | // and for memory allocation in the USB component. 81 | // 82 | // Full/Low-speed (High-speed disabled) 83 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 84 | // Maximum Endpoint Packet Size (in bytes) <0-64> 85 | // Specifies the physical packet size used for information exchange. 86 | // Maximum value is 64. 87 | #define USBD_HID0_EP_INT_OUT_WMAXPACKETSIZE 64 88 | 89 | // Endpoint polling Interval (in ms) <1-255> 90 | // Specifies the frequency of requests initiated by USB Host for 91 | // function USBD_HIDn_GetReport. 92 | #define USBD_HID0_EP_INT_OUT_BINTERVAL 1 93 | 94 | // 95 | 96 | // High-speed 97 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 98 | // 99 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 100 | // Specifies the physical packet size used for information exchange. 101 | // Maximum value is 1024. 102 | // Additional transactions per microframe 103 | // Additional transactions improve communication performance. 104 | // <0=>None <1=>1 additional <2=>2 additional 105 | #define USBD_HID0_EP_INT_OUT_HS_WMAXPACKETSIZE 512 106 | 107 | // Endpoint polling Interval (in 125 us intervals) 108 | // Specifies the frequency of requests initiated by USB Host for 109 | // function USBD_HIDn_GetReport. 110 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 111 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 112 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 113 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 114 | #define USBD_HID0_EP_INT_OUT_HS_BINTERVAL 1 115 | 116 | // 117 | // 118 | // 119 | // 120 | 121 | // Human Interface Device Class Settings 122 | // Parameters are used to create USB Descriptors, USB HID Report Descriptor 123 | // and for memory allocation in the USB component. 124 | // 125 | // HID Interface String 126 | #define USBD_HID0_STR_DESC L"CMSIS-DAP v1 HS-HID" 127 | 128 | // Number of Input Reports <1-32> 129 | // Configures max 'rid' value for USBD_HID0_GetReport and USBD_HID_GetReportTrigger 130 | #define USBD_HID0_IN_REPORT_NUM 1 131 | 132 | // Number of Output Reports <1-32> 133 | // Configures max 'rid' value for USBD_HID0_SetReport 134 | #define USBD_HID0_OUT_REPORT_NUM 1 135 | 136 | // Maximum Input Report Size (in bytes) <1-65535> 137 | // Allocates memory and configures 'len' value for USBD_HID0_GetReport 138 | // and USBD_HID_GetReportTrigger 139 | #define USBD_HID0_IN_REPORT_MAX_SZ 1024 140 | 141 | // Maximum Output Report Size (in bytes) <1-65535> 142 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 143 | // when rtype=HID_REPORT_OUTPUT. 144 | #define USBD_HID0_OUT_REPORT_MAX_SZ 1024 145 | 146 | // Maximum Feature Report Size (in bytes) <1-65535> 147 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 148 | // when rtype=HID_REPORT_FEATURE 149 | #define USBD_HID0_FEAT_REPORT_MAX_SZ 1 150 | 151 | // Use User Provided HID Report Descriptor 152 | // User needs to provide HID Report Descriptor in array 153 | // const uint8_t usbd_hid0_report_descriptor[] 154 | #define USBD_HID0_USER_REPORT_DESCRIPTOR 0 155 | 156 | // User Provided HID Report Descriptor Size (in bytes) <1-65535> 157 | #define USBD_HID0_USER_REPORT_DESCRIPTOR_SIZE 33 158 | 159 | // 160 | // 161 | 162 | // OS Resources Settings 163 | // These settings are used to optimize usage of OS resources. 164 | // Human Interface Device Class Thread Stack Size <64-65536> 165 | #define USBD_HID0_THREAD_STACK_SIZE 1024 166 | 167 | // Human Interface Device Class Thread Priority 168 | #define USBD_HID0_THREAD_PRIORITY osPriorityAboveNormal 169 | 170 | // 171 | // 172 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/RTE/_STLINKv3DAPv1_HID_VCP/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'STLINKv3DAPv1_HID+VCP' 7 | * Target: 'STLINKv3DAPv1_HID+VCP' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f7xx.h" 18 | 19 | /* ARM::CMSIS:RTOS2:Keil RTX5:Library:5.5.1 */ 20 | #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ 21 | #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */ 22 | /* Keil.MDK-Plus::USB:CORE:Release:6.13.6 */ 23 | #define RTE_USB_Core /* USB Core */ 24 | #define RTE_USB_Core_Release /* USB Core Release Version */ 25 | /* Keil.MDK-Plus::USB:Device:6.13.6 */ 26 | #define RTE_USB_Device_0 /* USB Device 0 */ 27 | 28 | /* Keil.MDK-Plus::USB:Device:CDC:6.13.6 */ 29 | #define RTE_USB_Device_CDC_0 /* USB Device CDC instance 0 */ 30 | 31 | /* Keil.MDK-Plus::USB:Device:HID:6.13.6 */ 32 | #define RTE_USB_Device_HID_0 /* USB Device HID instance 0 */ 33 | 34 | /* Keil::CMSIS Driver:USART:1.13.0 */ 35 | #define RTE_Drivers_USART1 /* Driver USART1 */ 36 | #define RTE_Drivers_USART2 /* Driver USART2 */ 37 | #define RTE_Drivers_USART3 /* Driver USART3 */ 38 | #define RTE_Drivers_USART4 /* Driver USART4 */ 39 | #define RTE_Drivers_USART5 /* Driver USART5 */ 40 | #define RTE_Drivers_USART6 /* Driver USART6 */ 41 | #define RTE_Drivers_USART7 /* Driver USART7 */ 42 | #define RTE_Drivers_USART8 /* Driver USART8 */ 43 | /* Keil::CMSIS Driver:USB Device:High-speed:1.14.0 */ 44 | #define RTE_Drivers_USBD1 /* Driver USBD1 */ 45 | /* Keil::Device:STM32Cube Framework:Classic:1.2.7 */ 46 | #define RTE_DEVICE_FRAMEWORK_CLASSIC 47 | /* Keil::Device:STM32Cube HAL:Common:1.2.7 */ 48 | #define RTE_DEVICE_HAL_COMMON 49 | /* Keil::Device:STM32Cube HAL:Cortex:1.2.7 */ 50 | #define RTE_DEVICE_HAL_CORTEX 51 | /* Keil::Device:STM32Cube HAL:DMA:1.2.7 */ 52 | #define RTE_DEVICE_HAL_DMA 53 | /* Keil::Device:STM32Cube HAL:GPIO:1.2.7 */ 54 | #define RTE_DEVICE_HAL_GPIO 55 | /* Keil::Device:STM32Cube HAL:PWR:1.2.7 */ 56 | #define RTE_DEVICE_HAL_PWR 57 | /* Keil::Device:STM32Cube HAL:RCC:1.2.7 */ 58 | #define RTE_DEVICE_HAL_RCC 59 | /* Keil::Device:STM32Cube HAL:USART:1.2.7 */ 60 | #define RTE_DEVICE_HAL_USART 61 | /* Keil::Device:Startup:1.2.4 */ 62 | #define RTE_DEVICE_STARTUP_STM32F7XX /* Device Startup for STM32F7 */ 63 | 64 | 65 | #endif /* RTE_COMPONENTS_H */ 66 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/USER/STLINK_V3MINI_BSP.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file STLINK-V3MINI_BSP.h 4 | * @author RadioOperator 5 | * @brief STLINK-V3MINI Board Support Package 6 | * LED GPIO initialize 7 | * DAP GPIO initialize 8 | * @version V1.1 9 | * @date 2019-11-09 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Define to prevent recursive inclusion -------------------------------------*/ 14 | #ifndef STLINK_V3MINI_BSP_H 15 | #define STLINK_V3MINI_BSP_H 16 | 17 | /* Includes ------------------------------------------------------------------*/ 18 | #include "stm32f7xx_hal.h" 19 | 20 | 21 | // Debug Port I/O Pins for STM32F723, matched with STLINK-V3MINI board 22 | 23 | //SWCLK/TCK input pin PB2 input 24 | #define PIN_SWCLK_TCK_I_PORT GPIOB 25 | #define PIN_SWCLK_TCK_I_BIT GPIO_PIN_2 26 | 27 | // SWCLK/TCK Pin PH6 output 28 | #define PIN_SWCLK_TCK_O_PORT GPIOH 29 | #define PIN_SWCLK_TCK_O_BIT GPIO_PIN_6 30 | 31 | // SWDIO/TMS Pin input PH7 input 32 | #define PIN_SWDIO_TMS_I_PORT GPIOH 33 | #define PIN_SWDIO_TMS_I_BIT GPIO_PIN_7 34 | 35 | // SWDIO Output Enable Pin PF9 output 36 | #define PIN_SWDIO_TMS_O_PORT GPIOF 37 | #define PIN_SWDIO_TMS_O_BIT GPIO_PIN_9 38 | 39 | // TDI Pin PA1 input 40 | #define PIN_TDI_I_PORT GPIOA 41 | #define PIN_TDI_I_BIT GPIO_PIN_1 42 | 43 | // TDI Pin PF8 output 44 | #define PIN_TDI_O_PORT GPIOF 45 | #define PIN_TDI_O_BIT GPIO_PIN_8 46 | 47 | // TDO Pin PD2, input, UART5_RX 48 | #define PIN_TDO_PORT GPIOD 49 | #define PIN_TDO_BIT GPIO_PIN_2 50 | 51 | // nTRST Pin Not available 52 | #define PIN_nTRST_PORT 53 | #define PIN_nTRST_BIT 54 | 55 | // nRESET Pin PA6 output 56 | #define PIN_nRESET_PORT GPIOA 57 | #define PIN_nRESET_BIT GPIO_PIN_6 58 | 59 | // nRESET Output Enable Pin Not available 60 | #define PIN_nRESET_OE_PORT 61 | #define PIN_nRESET_OE_BIT 62 | 63 | 64 | // Debug Unit LEDs 65 | 66 | // Connected LED PA10 - High, RED 67 | #define LED_CONNECTED_PORT GPIOA 68 | #define LED_CONNECTED_BIT GPIO_PIN_10 69 | 70 | // Target Running LED PA10 - Low, GREEN 71 | #define LED_RUNNING_PORT GPIOA 72 | #define LED_RUNNING_BIT GPIO_PIN_10 73 | 74 | 75 | void BSP_GPIO_Init(void); 76 | 77 | typedef enum 78 | { 79 | LED_STANDBY, //GRN:RED = 15:1, Standby mode, 1=125ms 80 | LED_DEBUG_PAUSE, //GRN:RED = RED, Target board Pause mode, RED only. 81 | LED_DEBUG_RUN, //GRN:RED = 4:4, Target board running mode, slow blink. 82 | LED_VCP_RUN, //GRN:RED = 1:1, VCP data transfering, fast blink, active at Standby mode only. 83 | 84 | } LED_Mode_t; 85 | 86 | extern LED_Mode_t LED_Mode; 87 | 88 | int Init_LED_Timer (void); 89 | 90 | void vResetTarget(uint32_t bit); 91 | 92 | 93 | #endif //#ifndef STLINK_V3MINI_BSP_H 94 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/USER/USBD_User_HID_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_User_HID_0.c 6 | * Purpose: USB Device Human Interface Device class (HID) User module 7 | * Rev.: V6.2.3 8 | *----------------------------------------------------------------------------*/ 9 | /** 10 | * \addtogroup usbd_hidFunctions 11 | * 12 | * USBD_User_HID_0.c implements the application specific functionality of the 13 | * HID class and is used to receive and send data reports to the USB Host. 14 | * 15 | * The implementation must match the configuration file USBD_Config_HID_0.h. 16 | * The following values in USBD_Config_HID_0.h affect the user code: 17 | * 18 | * - 'Endpoint polling Interval' specifies the frequency of requests 19 | * initiated by USB Host for \ref USBD_HIDn_GetReport. 20 | * 21 | * - 'Number of Output Reports' configures the values for \em rid of 22 | * \ref USBD_HIDn_SetReport. 23 | * 24 | * - 'Number of Input Reports' configures the values for \em rid of 25 | * \ref USBD_HIDn_GetReport and \ref USBD_HID_GetReportTrigger. 26 | * 27 | * - 'Maximum Input Report Size' specifies the maximum value for: 28 | * - return of \ref USBD_HIDn_GetReport 29 | * - len of \ref USBD_HID_GetReportTrigger. 30 | * 31 | * - 'Maximum Output Report Size' specifies the maximum value for \em len 32 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_OUTPUT 33 | * 34 | * - 'Maximum Feature Report Size' specifies the maximum value for \em len 35 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_FEATURE 36 | * 37 | */ 38 | 39 | 40 | //! [code_USBD_User_HID] 41 | 42 | #include 43 | #include 44 | #include "cmsis_os2.h" 45 | #define osObjectsExternal 46 | #include "osObjects.h" 47 | #include "rl_usb.h" 48 | #include "USBD_Config_HID_0.h" 49 | #include "DAP_config.h" 50 | #include "DAP.h" 51 | 52 | 53 | #if (USBD_HID0_OUT_REPORT_MAX_SZ != DAP_PACKET_SIZE) 54 | #error "USB HID0 Output Report Size must match DAP Packet Size" 55 | #endif 56 | #if (USBD_HID0_IN_REPORT_MAX_SZ != DAP_PACKET_SIZE) 57 | #error "USB HID Input Report Size must match DAP Packet Size" 58 | #endif 59 | 60 | static volatile uint16_t USB_RequestIndexI; // Request Index In 61 | static volatile uint16_t USB_RequestIndexO; // Request Index Out 62 | static volatile uint16_t USB_RequestCountI; // Request Count In 63 | static volatile uint16_t USB_RequestCountO; // Request Count Out 64 | 65 | static volatile uint16_t USB_ResponseIndexI; // Response Index In 66 | static volatile uint16_t USB_ResponseIndexO; // Response Index Out 67 | static volatile uint16_t USB_ResponseCountI; // Response Count In 68 | static volatile uint16_t USB_ResponseCountO; // Response Count Out 69 | static volatile uint8_t USB_ResponseIdle; // Response Idle Flag 70 | 71 | static uint8_t USB_Request [DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Request Buffer 72 | static uint8_t USB_Response[DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Response Buffer 73 | 74 | 75 | // Called during USBD_Initialize to initialize the USB HID class instance. 76 | void USBD_HID0_Initialize (void) { 77 | // Initialize variables 78 | USB_RequestIndexI = 0U; 79 | USB_RequestIndexO = 0U; 80 | USB_RequestCountI = 0U; 81 | USB_RequestCountO = 0U; 82 | USB_ResponseIndexI = 0U; 83 | USB_ResponseIndexO = 0U; 84 | USB_ResponseCountI = 0U; 85 | USB_ResponseCountO = 0U; 86 | USB_ResponseIdle = 1U; 87 | } 88 | 89 | 90 | // Called during USBD_Uninitialize to de-initialize the USB HID class instance. 91 | void USBD_HID0_Uninitialize (void) { 92 | } 93 | 94 | 95 | // \brief Prepare HID Report data to send. 96 | // \param[in] rtype report type: 97 | // - HID_REPORT_INPUT = input report requested 98 | // - HID_REPORT_FEATURE = feature report requested 99 | // \param[in] req request type: 100 | // - USBD_HID_REQ_EP_CTRL = control endpoint request 101 | // - USBD_HID_REQ_PERIOD_UPDATE = idle period expiration request 102 | // - USBD_HID_REQ_EP_INT = previously sent report on interrupt endpoint request 103 | // \param[in] rid report ID (0 if only one report exists). 104 | // \param[out] buf buffer containing report data to send. 105 | // \return number of report data bytes prepared to send or invalid report requested. 106 | // - value >= 0: number of report data bytes prepared to send 107 | // - value = -1: invalid report requested 108 | int32_t USBD_HID0_GetReport (uint8_t rtype, uint8_t req, uint8_t rid, uint8_t *buf) { 109 | (void)rid; 110 | 111 | switch (rtype) { 112 | case HID_REPORT_INPUT: 113 | switch (req) { 114 | case USBD_HID_REQ_EP_CTRL: // Explicit USB Host request via Control OUT Endpoint 115 | case USBD_HID_REQ_PERIOD_UPDATE: // Periodic USB Host request via Interrupt OUT Endpoint 116 | break; 117 | case USBD_HID_REQ_EP_INT: // Called after USBD_HID_GetReportTrigger to signal data obtained. 118 | if (USB_ResponseCountI != USB_ResponseCountO) { 119 | // Load data from response buffer to be sent back 120 | memcpy(buf, USB_Response[USB_ResponseIndexO], DAP_PACKET_SIZE); 121 | USB_ResponseIndexO++; 122 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 123 | USB_ResponseIndexO = 0U; 124 | } 125 | USB_ResponseCountO++; 126 | return ((int32_t)DAP_PACKET_SIZE); 127 | } else { 128 | USB_ResponseIdle = 1U; 129 | } 130 | break; 131 | } 132 | break; 133 | case HID_REPORT_FEATURE: 134 | break; 135 | } 136 | return (0); 137 | } 138 | 139 | 140 | // \brief Process received HID Report data. 141 | // \param[in] rtype report type: 142 | // - HID_REPORT_OUTPUT = output report received 143 | // - HID_REPORT_FEATURE = feature report received 144 | // \param[in] req request type: 145 | // - USBD_HID_REQ_EP_CTRL = report received on control endpoint 146 | // - USBD_HID_REQ_EP_INT = report received on interrupt endpoint 147 | // \param[in] rid report ID (0 if only one report exists). 148 | // \param[in] buf buffer that receives report data. 149 | // \param[in] len length of received report data. 150 | // \return true received report data processed. 151 | // \return false received report data not processed or request not supported. 152 | bool USBD_HID0_SetReport (uint8_t rtype, uint8_t req, uint8_t rid, const uint8_t *buf, int32_t len) { 153 | (void)req; 154 | (void)rid; 155 | 156 | switch (rtype) { 157 | case HID_REPORT_OUTPUT: 158 | if (len == 0) { 159 | break; 160 | } 161 | if (buf[0] == ID_DAP_TransferAbort) { 162 | DAP_TransferAbort = 1U; 163 | break; 164 | } 165 | if ((uint16_t)(USB_RequestCountI - USB_RequestCountO) == DAP_PACKET_COUNT) { 166 | osThreadFlagsSet(DAP_ThreadId, 0x80U); 167 | break; // Discard packet when buffer is full 168 | } 169 | // Store received data into request buffer 170 | memcpy(USB_Request[USB_RequestIndexI], buf, (uint32_t)len); 171 | USB_RequestIndexI++; 172 | if (USB_RequestIndexI == DAP_PACKET_COUNT) { 173 | USB_RequestIndexI = 0U; 174 | } 175 | USB_RequestCountI++; 176 | osThreadFlagsSet(DAP_ThreadId, 0x01U); 177 | break; 178 | case HID_REPORT_FEATURE: 179 | break; 180 | } 181 | return true; 182 | } 183 | 184 | 185 | // DAP Thread. 186 | __NO_RETURN void DAP_Thread (void *argument) { 187 | uint32_t flags; 188 | uint32_t n; 189 | (void) argument; 190 | 191 | for (;;) { 192 | osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 193 | 194 | // Process pending requests 195 | while (USB_RequestCountI != USB_RequestCountO) { 196 | 197 | // Handle Queue Commands 198 | n = USB_RequestIndexO; 199 | while (USB_Request[n][0] == ID_DAP_QueueCommands) { 200 | USB_Request[n][0] = ID_DAP_ExecuteCommands; 201 | n++; 202 | if (n == DAP_PACKET_COUNT) { 203 | n = 0U; 204 | } 205 | if (n == USB_RequestIndexI) { 206 | flags = osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 207 | if (flags & 0x80U) { 208 | break; 209 | } 210 | } 211 | } 212 | 213 | // Execute DAP Command (process request and prepare response) 214 | DAP_ExecuteCommand(USB_Request[USB_RequestIndexO], USB_Response[USB_ResponseIndexI]); 215 | 216 | // Update Request Index and Count 217 | USB_RequestIndexO++; 218 | if (USB_RequestIndexO == DAP_PACKET_COUNT) { 219 | USB_RequestIndexO = 0U; 220 | } 221 | USB_RequestCountO++; 222 | 223 | // Update Response Index and Count 224 | USB_ResponseIndexI++; 225 | if (USB_ResponseIndexI == DAP_PACKET_COUNT) { 226 | USB_ResponseIndexI = 0U; 227 | } 228 | USB_ResponseCountI++; 229 | 230 | if (USB_ResponseIdle) { 231 | if (USB_ResponseCountI != USB_ResponseCountO) { 232 | // Load data from response buffer to be sent back 233 | n = USB_ResponseIndexO++; 234 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 235 | USB_ResponseIndexO = 0U; 236 | } 237 | USB_ResponseCountO++; 238 | USB_ResponseIdle = 0U; 239 | USBD_HID_GetReportTrigger(0U, 0U, USB_Response[n], DAP_PACKET_SIZE); 240 | } 241 | } 242 | } 243 | } 244 | } 245 | 246 | //! [code_USBD_User_HID] 247 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/USER/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file main.c 4 | * @author ARM CMSIS-DAP scource code, modified by RadioOperator 5 | * 6 | * @brief CMSIS-DAP v1 for STLINK-V3MINI 7 | * 8 | * @version V2.0 9 | * @date 2019-12-22 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Includes ------------------------------------------------------------------*/ 14 | 15 | #ifdef _RTE_ 16 | #include "RTE_Components.h" // Component selection 17 | #endif 18 | #ifdef RTE_CMSIS_RTOS2 // when RTE component CMSIS RTOS2 is used 19 | #include "cmsis_os2.h" // ::CMSIS:RTOS2 20 | #endif 21 | #include "stm32f7xx_hal.h" 22 | #include "osObjects.h" 23 | #include "rl_usb.h" 24 | #include "DAP_config.h" 25 | #include "DAP.h" 26 | #include "STLINK_V3MINI_BSP.h" 27 | 28 | 29 | #ifdef RTE_CMSIS_RTOS2_RTX5 30 | /** 31 | * Override default HAL_GetTick function 32 | */ 33 | uint32_t HAL_GetTick (void) { 34 | static uint32_t ticks = 0U; 35 | uint32_t i; 36 | 37 | if (osKernelGetState () == osKernelRunning) { 38 | return ((uint32_t)osKernelGetTickCount ()); 39 | } 40 | 41 | /* If Kernel is not running wait approximately 1 ms then increment 42 | and return auxiliary tick counter value */ 43 | Delayms(1); 44 | 45 | return ++ticks; 46 | } 47 | #endif 48 | 49 | /* Private function prototypes -----------------------------------------------*/ 50 | static void SystemClock_Config(void); 51 | static void Error_Handler(void); 52 | static void MPU_Config(void); 53 | static void CPU_CACHE_Enable(void); 54 | 55 | /* Private functions ---------------------------------------------------------*/ 56 | // Application Main program 57 | __NO_RETURN void app_main (void *argument) { 58 | (void)argument; 59 | 60 | DAP_Setup(); // DAP Setup 61 | 62 | USBD_Initialize(0U); // USB Device Initialization 63 | USBD_Connect(0U); // USB Device Connect 64 | while (!USBD_Configured(0U)); // Wait for USB Device to configure 65 | 66 | // Create DAP Thread 67 | DAP_ThreadId = osThreadNew(DAP_Thread, NULL, &DAP_ThreadAttr); 68 | 69 | // Create SWO Thread 70 | // SWO_ThreadId = osThreadNew(SWO_Thread, NULL, &SWO_ThreadAttr); 71 | 72 | // create LED Timer Thread, radiooperator 73 | Init_LED_Timer(); 74 | 75 | osDelay(osWaitForever); 76 | for (;;) {}; 77 | } 78 | 79 | /** 80 | * @brief Main program 81 | * @param None 82 | * @retval None 83 | */ 84 | int main(void) 85 | { 86 | /* This project template calls firstly two functions in order to configure MPU feature 87 | and to enable the CPU Cache, respectively MPU_Config() and CPU_CACHE_Enable(). 88 | These functions are provided as template implementation that User may integrate 89 | in his application, to enhance the performance in case of use of AXI interface 90 | with several masters. */ 91 | 92 | /* Configure the MPU attributes as Write Through */ 93 | MPU_Config(); 94 | 95 | /* Enable the CPU Cache */ 96 | CPU_CACHE_Enable(); 97 | 98 | /* STM32F7xx HAL library initialization: 99 | - Configure the Flash ART accelerator on ITCM interface 100 | - Configure the Systick to generate an interrupt each 1 msec 101 | - Set NVIC Group Priority to 4 102 | - Low Level Initialization 103 | */ 104 | HAL_Init(); 105 | 106 | /* Configure the System clock to have a frequency of 216 MHz */ 107 | SystemClock_Config(); 108 | SystemCoreClockUpdate(); 109 | 110 | /* Add your application code here 111 | */ 112 | BSP_GPIO_Init(); 113 | 114 | #ifdef RTE_CMSIS_RTOS2 115 | /* Initialize CMSIS-RTOS2 */ 116 | osKernelInitialize (); 117 | 118 | /* Create thread functions that start executing, 119 | Example: osThreadNew(app_main, NULL, NULL); */ 120 | osThreadNew(app_main, NULL, NULL); // Create application main thread 121 | if (osKernelGetState() == osKernelReady) { 122 | osKernelStart(); // Start thread execution 123 | } 124 | /* Start thread execution */ 125 | // osKernelStart(); 126 | #endif 127 | 128 | /* Infinite loop */ 129 | while (1) 130 | { 131 | } 132 | } 133 | 134 | /** 135 | * @brief System Clock Configuration 136 | * The system Clock is configured as follow : 137 | * System Clock source = PLL (HSE) 138 | * SYSCLK(Hz) = 216000000 139 | * HCLK(Hz) = 216000000 140 | * AHB Prescaler = 1 141 | * APB1 Prescaler = 4 142 | * APB2 Prescaler = 2 143 | * HSE Frequency(Hz) = 25000000 144 | * PLL_M = 25 145 | * PLL_N = 432 146 | * PLL_P = 2 147 | * PLL_Q = 9 148 | * VDD(V) = 3.3 149 | * Main regulator output voltage = Scale1 mode 150 | * Flash Latency(WS) = 7 151 | * @param None 152 | * @retval None 153 | */ 154 | static void SystemClock_Config(void) 155 | { 156 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 157 | RCC_OscInitTypeDef RCC_OscInitStruct; 158 | 159 | /* Enable HSE Oscillator and activate PLL with HSE as source */ 160 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 161 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 162 | RCC_OscInitStruct.HSIState = RCC_HSI_OFF; 163 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 164 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 165 | RCC_OscInitStruct.PLL.PLLM = 25; 166 | RCC_OscInitStruct.PLL.PLLN = 432; 167 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 168 | RCC_OscInitStruct.PLL.PLLQ = 9; 169 | if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 170 | { 171 | Error_Handler(); 172 | } 173 | 174 | /* activate the OverDrive to reach the 216 Mhz Frequency */ 175 | if(HAL_PWREx_EnableOverDrive() != HAL_OK) 176 | { 177 | Error_Handler(); 178 | } 179 | 180 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 181 | clocks dividers */ 182 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); 183 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 184 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 185 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 186 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 187 | if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) 188 | { 189 | Error_Handler(); 190 | } 191 | } 192 | 193 | /** 194 | * @brief This function is executed in case of error occurrence. 195 | * @param None 196 | * @retval None 197 | */ 198 | static void Error_Handler(void) 199 | { 200 | /* User may add here some code to deal with this error */ 201 | while(1) 202 | { 203 | } 204 | } 205 | 206 | /** 207 | * @brief Configure the MPU attributes as Write Through Internal SRAM1/SRAM2. 208 | * @note The Base Address is 0x20000000 and Region Size 512KB. 209 | * @param None 210 | * @retval None 211 | */ 212 | static void MPU_Config(void) 213 | { 214 | MPU_Region_InitTypeDef MPU_InitStruct; 215 | 216 | /* Disable the MPU */ 217 | HAL_MPU_Disable(); 218 | 219 | /* Configure the MPU attributes as WT for SRAM */ 220 | MPU_InitStruct.Enable = MPU_REGION_ENABLE; 221 | MPU_InitStruct.BaseAddress = 0x20000000; 222 | MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; 223 | MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; 224 | MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; 225 | MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; 226 | MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; 227 | MPU_InitStruct.Number = MPU_REGION_NUMBER0; 228 | MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; 229 | MPU_InitStruct.SubRegionDisable = 0x00; 230 | MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; 231 | 232 | HAL_MPU_ConfigRegion(&MPU_InitStruct); 233 | 234 | /* Enable the MPU */ 235 | HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); 236 | } 237 | 238 | /** 239 | * @brief CPU L1-Cache enable. 240 | * @param None 241 | * @retval None 242 | */ 243 | static void CPU_CACHE_Enable(void) 244 | { 245 | /* Enable I-Cache */ 246 | SCB_EnableICache(); 247 | 248 | /* Enable D-Cache */ 249 | SCB_EnableDCache(); 250 | } 251 | 252 | #ifdef USE_FULL_ASSERT 253 | /** 254 | * @brief Reports the name of the source file and the source line number 255 | * where the assert_param error has occurred. 256 | * @param file: pointer to the source file name 257 | * @param line: assert_param error line source number 258 | * @retval None 259 | */ 260 | void assert_failed(uint8_t* file, uint32_t line) 261 | { 262 | /* User can add his own implementation to report the file name and line number, 263 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 264 | 265 | /* Infinite loop */ 266 | while (1) 267 | { 268 | } 269 | } 270 | #endif 271 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/USER/osObjects.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ---------------------------------------------------------------------- 19 | * 20 | * $Date: 1. December 2017 21 | * $Revision: V2.0.0 22 | * 23 | * Project: CMSIS-DAP Examples LPC-Link-II 24 | * Title: osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II 25 | * 26 | *---------------------------------------------------------------------------*/ 27 | 28 | #ifndef __osObjects_h__ 29 | #define __osObjects_h__ 30 | 31 | #include "cmsis_os2.h" 32 | 33 | #ifdef osObjectsExternal 34 | extern osThreadId_t DAP_ThreadId; 35 | extern osThreadId_t SWO_ThreadId; 36 | #else 37 | const osThreadAttr_t DAP_ThreadAttr = { 38 | .priority = osPriorityNormal 39 | }; 40 | const osThreadAttr_t SWO_ThreadAttr = { 41 | .priority = osPriorityAboveNormal 42 | }; 43 | extern osThreadId_t DAP_ThreadId; 44 | osThreadId_t DAP_ThreadId; 45 | extern osThreadId_t SWO_ThreadId; 46 | osThreadId_t SWO_ThreadId; 47 | #endif 48 | 49 | extern void DAP_Thread (void *argument); 50 | extern void SWO_Thread (void *argument); 51 | 52 | extern void app_main (void *argument); 53 | 54 | #endif /* __osObjects_h__ */ 55 | -------------------------------------------------------------------------------- /STLINKv3DAPv1_HID+VCP/Win7-VCP-Driver/Win7_VCP_Driver.inf: -------------------------------------------------------------------------------- 1 | [Version] 2 | Signature = "$Windows NT$" 3 | Class = Ports 4 | ClassGUID = {4D36E978-E325-11CE-BFC1-08002BE10318} 5 | Provider = %ManufacturerName% 6 | DriverVer=05/07/2020,1.00 7 | 8 | ; ========== Manufacturer/Models sections =========== 9 | 10 | [Manufacturer] 11 | %ManufacturerName% = Standard,NTx86,NTamd64 12 | 13 | ; List of devices supporting the Virtual COM port (with the corresponding interface ID) 14 | 15 | [Standard.NTx86] 16 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A 17 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C 18 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D 19 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_00 20 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_00 21 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_00 22 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_01 23 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_01 24 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_01 25 | 26 | 27 | [Standard.NTamd64] 28 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A 29 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C 30 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D 31 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_00 32 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_00 33 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_00 34 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_01 35 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_01 36 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_01 37 | 38 | ; =================== Installation =================== 39 | 40 | [USB_InstallVCP] 41 | Include = mdmcpq.inf 42 | CopyFiles = FakeModemCopyFileSection 43 | AddReg = USB_InstallVCP.AddReg 44 | 45 | [USB_InstallVCP.AddReg] 46 | HKR,,DevLoader,,*ntkern 47 | HKR,,NTMPDriver,,usbser.sys 48 | HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" 49 | 50 | [USB_InstallVCP.Services] 51 | AddService=usbser, 0x00000002, DriverService 52 | 53 | [DriverService] 54 | DisplayName=%DeviceNameVCP% 55 | ServiceType=1 56 | StartType=3 57 | ErrorControl=1 58 | ServiceBinary=%12%\usbser.sys 59 | 60 | ; [DestinationDirs] 61 | ; If your INF needs to copy files, you must not use the DefaultDestDir directive here. 62 | ; You must explicitly reference all file-list-section names in this section. 63 | 64 | ; =================== Strings =================== 65 | 66 | [Strings] 67 | ManufacturerName="STM" 68 | ;ClassName="Universal Serial Bus devices" 69 | DeviceNameVCP="CMSIS-DAP VCP" 70 | REG_MULTI_SZ = 0x00010000 71 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/DebugConfig/STLINKv3DAPv2_WinUSB_VCP_STM32F723IEKx_2.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // File: STM32F72x_73x.dbgconf 2 | // Version: 1.0.0 3 | // Note: refer to STM32F72xxx STM32F73xxx reference manual (RM0431) 4 | // refer to STM32F72xxx STM32F73xxx datasheets 5 | 6 | // <<< Use Configuration Wizard in Context Menu >>> 7 | 8 | // Debug MCU configuration register (DBGMCU_CR) 9 | // DBG_STANDBY Debug standby mode 10 | // DBG_STOP Debug stop mode 11 | // DBG_SLEEP Debug sleep mode 12 | // 13 | DbgMCU_CR = 0x00000007; 14 | 15 | // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) 16 | // Reserved bits must be kept at reset value 17 | // DBG_CAN1_STOP Debug CAN1 stopped when core is halted 18 | // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 20 | // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 21 | // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted 22 | // DBG_WWDG_STOP Debug window watchdog stopped when core is halted 23 | // DBG_RTC_STOP RTC stopped when core is halted 24 | // DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted 25 | // DBG_TIM14_STOP TIM14 counter stopped when core is halted 26 | // DBG_TIM13_STOP TIM13 counter stopped when core is halted 27 | // DBG_TIM12_STOP TIM12 counter stopped when core is halted 28 | // DBG_TIM7_STOP TIM7 counter stopped when core is halted 29 | // DBG_TIM6_STOP TIM6 counter stopped when core is halted 30 | // DBG_TIM5_STOP TIM5 counter stopped when core is halted 31 | // DBG_TIM4_STOP TIM4 counter stopped when core is halted 32 | // DBG_TIM3_STOP TIM3 counter stopped when core is halted 33 | // DBG_TIM2_STOP TIM2 counter stopped when core is halted 34 | // 35 | DbgMCU_APB1_Fz = 0x00000000; 36 | 37 | // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) 38 | // Reserved bits must be kept at reset value 39 | // DBG_TIM11_STOP TIM11 counter stopped when core is halted 40 | // DBG_TIM10_STOP TIM10 counter stopped when core is halted 41 | // DBG_TIM9_STOP TIM9 counter stopped when core is halted 42 | // DBG_TIM8_STOP TIM8 counter stopped when core is halted 43 | // DBG_TIM1_STOP TIM1 counter stopped when core is halted 44 | // 45 | DbgMCU_APB2_Fz = 0x00000000; 46 | 47 | // TPIU Pin Routing (TRACECLK fixed on Pin PE2) 48 | // TRACECLK: Pin PE2 49 | // TRACED0 50 | // ETM Trace Data 0 51 | // <0x00040003=> Pin PE3 52 | // <0x00020001=> Pin PC1 53 | // <0x0006000D=> Pin PG13 54 | // TRACED1 55 | // ETM Trace Data 1 56 | // <0x00040004=> Pin PE4 57 | // <0x00020008=> Pin PC8 58 | // <0x0006000E=> Pin PG14 59 | // TRACED2 60 | // ETM Trace Data 2 61 | // <0x00040005=> Pin PE5 62 | // <0x00030002=> Pin PD2 63 | // TRACED3 64 | // ETM Trace Data 3 65 | // <0x00040006=> Pin PE6 66 | // <0x0002000C=> Pin PC12 67 | // 68 | TraceClk_Pin = 0x00040002; 69 | TraceD0_Pin = 0x00040003; 70 | TraceD1_Pin = 0x00040004; 71 | TraceD2_Pin = 0x00040005; 72 | TraceD3_Pin = 0x00040006; 73 | 74 | // <<< end of configuration section >>> 75 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/CMSIS/RTX_Config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ----------------------------------------------------------------------------- 19 | * 20 | * $Revision: V5.1.0 21 | * 22 | * Project: CMSIS-RTOS RTX 23 | * Title: RTX Configuration 24 | * 25 | * ----------------------------------------------------------------------------- 26 | */ 27 | 28 | #include "cmsis_compiler.h" 29 | #include "rtx_os.h" 30 | 31 | // OS Idle Thread 32 | __WEAK __NO_RETURN void osRtxIdleThread (void *argument) { 33 | (void)argument; 34 | 35 | for (;;) {} 36 | } 37 | 38 | // OS Error Callback function 39 | __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { 40 | (void)object_id; 41 | 42 | switch (code) { 43 | case osRtxErrorStackUnderflow: 44 | // Stack overflow detected for thread (thread_id=object_id) 45 | break; 46 | case osRtxErrorISRQueueOverflow: 47 | // ISR Queue overflow detected when inserting object (object_id) 48 | break; 49 | case osRtxErrorTimerQueueOverflow: 50 | // User Timer Callback Queue overflow detected for timer (timer_id=object_id) 51 | break; 52 | case osRtxErrorClibSpace: 53 | // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM 54 | break; 55 | case osRtxErrorClibMutex: 56 | // Standard C/C++ library mutex initialization failed 57 | break; 58 | default: 59 | // Reserved 60 | break; 61 | } 62 | for (;;) {} 63 | //return 0U; 64 | } 65 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/Device/STM32F723IEKx/system_stm32f7xx.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f7xx.c 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. 6 | * 7 | * This file provides two functions and one global variable to be called from 8 | * user application: 9 | * - SystemInit(): This function is called at startup just after reset and 10 | * before branch to main program. This call is made inside 11 | * the "startup_stm32f7xx.s" file. 12 | * 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used 14 | * by the user application to setup the SysTick 15 | * timer or configure other parameters. 16 | * 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must 18 | * be called whenever the core clock is changed 19 | * during program execution. 20 | * 21 | * 22 | ****************************************************************************** 23 | * @attention 24 | * 25 | *

© COPYRIGHT 2016 STMicroelectronics

26 | * 27 | * Redistribution and use in source and binary forms, with or without modification, 28 | * are permitted provided that the following conditions are met: 29 | * 1. Redistributions of source code must retain the above copyright notice, 30 | * this list of conditions and the following disclaimer. 31 | * 2. Redistributions in binary form must reproduce the above copyright notice, 32 | * this list of conditions and the following disclaimer in the documentation 33 | * and/or other materials provided with the distribution. 34 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | * may be used to endorse or promote products derived from this software 36 | * without specific prior written permission. 37 | * 38 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | * 49 | ****************************************************************************** 50 | */ 51 | 52 | /** @addtogroup CMSIS 53 | * @{ 54 | */ 55 | 56 | /** @addtogroup stm32f7xx_system 57 | * @{ 58 | */ 59 | 60 | /** @addtogroup STM32F7xx_System_Private_Includes 61 | * @{ 62 | */ 63 | 64 | #include "stm32f7xx.h" 65 | 66 | #if !defined (HSE_VALUE) 67 | #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ 68 | #endif /* HSE_VALUE */ 69 | 70 | #if !defined (HSI_VALUE) 71 | #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ 72 | #endif /* HSI_VALUE */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @addtogroup STM32F7xx_System_Private_TypesDefinitions 79 | * @{ 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @addtogroup STM32F7xx_System_Private_Defines 87 | * @{ 88 | */ 89 | 90 | /************************* Miscellaneous Configuration ************************/ 91 | 92 | /*!< Uncomment the following line if you need to relocate your vector Table in 93 | Internal SRAM. */ 94 | /* #define VECT_TAB_SRAM */ 95 | #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. 96 | This value must be a multiple of 0x200. */ 97 | /******************************************************************************/ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @addtogroup STM32F7xx_System_Private_Macros 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @addtogroup STM32F7xx_System_Private_Variables 112 | * @{ 113 | */ 114 | 115 | /* This variable is updated in three ways: 116 | 1) by calling CMSIS function SystemCoreClockUpdate() 117 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 118 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 119 | Note: If you use this function to configure the system clock; then there 120 | is no need to call the 2 first functions listed above, since SystemCoreClock 121 | variable is updated automatically. 122 | */ 123 | uint32_t SystemCoreClock = 16000000; 124 | const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; 125 | const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** @addtogroup STM32F7xx_System_Private_FunctionPrototypes 132 | * @{ 133 | */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @addtogroup STM32F7xx_System_Private_Functions 140 | * @{ 141 | */ 142 | 143 | /** 144 | * @brief Setup the microcontroller system 145 | * Initialize the Embedded Flash Interface, the PLL and update the 146 | * SystemFrequency variable. 147 | * @param None 148 | * @retval None 149 | */ 150 | void SystemInit(void) 151 | { 152 | /* FPU settings ------------------------------------------------------------*/ 153 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) 154 | SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 155 | #endif 156 | /* Reset the RCC clock configuration to the default reset state ------------*/ 157 | /* Set HSION bit */ 158 | RCC->CR |= (uint32_t)0x00000001; 159 | 160 | /* Reset CFGR register */ 161 | RCC->CFGR = 0x00000000; 162 | 163 | /* Reset HSEON, CSSON and PLLON bits */ 164 | RCC->CR &= (uint32_t)0xFEF6FFFF; 165 | 166 | /* Reset PLLCFGR register */ 167 | RCC->PLLCFGR = 0x24003010; 168 | 169 | /* Reset HSEBYP bit */ 170 | RCC->CR &= (uint32_t)0xFFFBFFFF; 171 | 172 | /* Disable all interrupts */ 173 | RCC->CIR = 0x00000000; 174 | 175 | /* Configure the Vector Table location add offset address ------------------*/ 176 | #ifdef VECT_TAB_SRAM 177 | SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ 178 | #else 179 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ 180 | #endif 181 | } 182 | 183 | /** 184 | * @brief Update SystemCoreClock variable according to Clock Register Values. 185 | * The SystemCoreClock variable contains the core clock (HCLK), it can 186 | * be used by the user application to setup the SysTick timer or configure 187 | * other parameters. 188 | * 189 | * @note Each time the core clock (HCLK) changes, this function must be called 190 | * to update SystemCoreClock variable value. Otherwise, any configuration 191 | * based on this variable will be incorrect. 192 | * 193 | * @note - The system frequency computed by this function is not the real 194 | * frequency in the chip. It is calculated based on the predefined 195 | * constant and the selected clock source: 196 | * 197 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) 198 | * 199 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) 200 | * 201 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 202 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. 203 | * 204 | * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 205 | * 16 MHz) but the real value may vary depending on the variations 206 | * in voltage and temperature. 207 | * 208 | * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value 209 | * 25 MHz), user has to ensure that HSE_VALUE is same as the real 210 | * frequency of the crystal used. Otherwise, this function may 211 | * have wrong result. 212 | * 213 | * - The result of this function could be not correct when using fractional 214 | * value for HSE crystal. 215 | * 216 | * @param None 217 | * @retval None 218 | */ 219 | void SystemCoreClockUpdate(void) 220 | { 221 | uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; 222 | 223 | /* Get SYSCLK source -------------------------------------------------------*/ 224 | tmp = RCC->CFGR & RCC_CFGR_SWS; 225 | 226 | switch (tmp) 227 | { 228 | case 0x00: /* HSI used as system clock source */ 229 | SystemCoreClock = HSI_VALUE; 230 | break; 231 | case 0x04: /* HSE used as system clock source */ 232 | SystemCoreClock = HSE_VALUE; 233 | break; 234 | case 0x08: /* PLL used as system clock source */ 235 | 236 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N 237 | SYSCLK = PLL_VCO / PLL_P 238 | */ 239 | pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; 240 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 241 | 242 | if (pllsource != 0) 243 | { 244 | /* HSE used as PLL clock source */ 245 | pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 246 | } 247 | else 248 | { 249 | /* HSI used as PLL clock source */ 250 | pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); 251 | } 252 | 253 | pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; 254 | SystemCoreClock = pllvco/pllp; 255 | break; 256 | default: 257 | SystemCoreClock = HSI_VALUE; 258 | break; 259 | } 260 | /* Compute HCLK frequency --------------------------------------------------*/ 261 | /* Get HCLK prescaler */ 262 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; 263 | /* HCLK frequency */ 264 | SystemCoreClock >>= tmp; 265 | } 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** 272 | * @} 273 | */ 274 | 275 | /** 276 | * @} 277 | */ 278 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 279 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/Device/project.script: -------------------------------------------------------------------------------- 1 | load STM32F723IEKx 2 | project name STCubeGenerated 3 | project toolchain "MDK-ARM V5" 4 | project path "C:\STM32F723\STM32F723IEK6DAP\RTE\Device\STM32F723IEKx\" 5 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/USB/USBD_Config_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_0.c 6 | * Purpose: USB Device Configuration 7 | * Rev.: V5.2.0 8 | *------------------------------------------------------------------------------ 9 | * Use the following configuration settings in the Device Class configuration 10 | * files to assign a Device Class to this USB Device 0. 11 | * 12 | * Configuration Setting Value 13 | * --------------------- ----- 14 | * Assign Device Class to USB Device # = 0 15 | *----------------------------------------------------------------------------*/ 16 | 17 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 18 | 19 | // USB Device 0 20 | // Connect to hardware via Driver_USBD# <0-255> 21 | // Select driver control block for hardware interface. 22 | #define USBD0_PORT 1 23 | 24 | // High-speed 25 | // Enable High-speed functionality (if device supports it). 26 | #define USBD0_HS 1 27 | 28 | // Device Settings 29 | // These settings are used to create the Device Descriptor 30 | // Max Endpoint 0 Packet Size 31 | // Maximum packet size for Endpoint 0 (bMaxPacketSize0). 32 | // <8=>8 Bytes <16=>16 Bytes <32=>32 Bytes <64=>64 Bytes 33 | #define USBD0_MAX_PACKET0 64 34 | 35 | // Vendor ID <0x0000-0xFFFF> 36 | // Vendor ID assigned by USB-IF (idVendor). 37 | #define USBD0_DEV_DESC_IDVENDOR 0x0483 38 | 39 | // Product ID <0x0000-0xFFFF> 40 | // Product ID assigned by manufacturer (idProduct). 41 | #define USBD0_DEV_DESC_IDPRODUCT 0x572D 42 | 43 | // Device Release Number <0x0000-0xFFFF> 44 | // Device Release Number in binary-coded decimal (bcdDevice) 45 | #define USBD0_DEV_DESC_BCDDEVICE 0x0100 46 | 47 | // 48 | 49 | // Configuration Settings 50 | // These settings are used to create the Configuration Descriptor. 51 | // Power 52 | // Default Power Setting (D6: of bmAttributes). 53 | // <0=>Bus-powered 54 | // <1=>Self-powered 55 | // Remote Wakeup 56 | // Configuration support for Remote Wakeup (D5: of bmAttributes). 57 | #define USBD0_CFG_DESC_BMATTRIBUTES 0x80 58 | 59 | // Maximum Power Consumption (in mA) <0-510><#/2> 60 | // Maximum Power Consumption of USB Device from bus in this 61 | // specific configuration when device is fully operational (bMaxPower). 62 | #define USBD0_CFG_DESC_BMAXPOWER 250 63 | 64 | // 65 | 66 | // String Settings 67 | // These settings are used to create the String Descriptor. 68 | // Language ID <0x0000-0xFCFF> 69 | // English (United States) = 0x0409. 70 | #define USBD0_STR_DESC_LANGID 0x0409 71 | 72 | // Manufacturer String 73 | // String Descriptor describing Manufacturer. 74 | #define USBD0_STR_DESC_MAN L"RadioOperator" 75 | 76 | // Product String 77 | // String Descriptor describing Product. 78 | #define USBD0_STR_DESC_PROD L"CMSIS-DAP HighSpeed" 79 | 80 | // Serial Number String 81 | // Enable Serial Number String. 82 | // If disabled Serial Number String will not be assigned to USB Device. 83 | #define USBD0_STR_DESC_SER_EN 1 84 | 85 | // Default value 86 | // Default device's Serial Number String. 87 | #define USBD0_STR_DESC_SER L"0001A0000000" 88 | 89 | // Maximum Length (in characters) <0-126> 90 | // Specifies the maximum number of Serial Number String characters that can be set at run-time. 91 | // Maximum value is 126. Use value 0 to disable RAM allocation for string. 92 | #define USBD0_STR_DESC_SER_MAX_LEN 16 93 | 94 | // 95 | // 96 | 97 | // Microsoft OS Descriptors Settings 98 | // These settings are used to create the Microsoft OS Descriptors. 99 | // OS String 100 | // Enable creation of Microsoft OS String and Extended Compat ID OS Feature Descriptors. 101 | #define USBD0_OS_DESC_EN 1 102 | 103 | // Vendor Code <0x01-0xFF> 104 | // Specifies Vendor Code used to retrieve OS Feature Descriptors. 105 | #define USBD0_OS_DESC_VENDOR_CODE 0x01 106 | 107 | // 108 | // 109 | 110 | // Control Transfer Buffer Size <64-65536:64> 111 | // Specifies size of buffer used for Control Transfers. 112 | // It should be at least as big as maximum packet size for Endpoint 0. 113 | #define USBD0_EP0_BUF_SIZE 512 114 | 115 | // OS Resources Settings 116 | // These settings are used to optimize usage of OS resources. 117 | // Core Thread Stack Size <64-65536> 118 | #define USBD0_CORE_THREAD_STACK_SIZE 512 119 | 120 | // Core Thread Priority 121 | #define USBD0_CORE_THREAD_PRIORITY osPriorityAboveNormal 122 | 123 | // 124 | // 125 | 126 | 127 | #include "RTE_Components.h" 128 | 129 | #ifdef RTE_USB_Device_CustomClass_0 130 | #include "USBD_Config_CustomClass_0.h" 131 | #endif 132 | #ifdef RTE_USB_Device_CustomClass_1 133 | #include "USBD_Config_CustomClass_1.h" 134 | #endif 135 | #ifdef RTE_USB_Device_CustomClass_2 136 | #include "USBD_Config_CustomClass_2.h" 137 | #endif 138 | #ifdef RTE_USB_Device_CustomClass_3 139 | #include "USBD_Config_CustomClass_3.h" 140 | #endif 141 | 142 | #ifdef RTE_USB_Device_HID_0 143 | #include "USBD_Config_HID_0.h" 144 | #endif 145 | #ifdef RTE_USB_Device_HID_1 146 | #include "USBD_Config_HID_1.h" 147 | #endif 148 | #ifdef RTE_USB_Device_HID_2 149 | #include "USBD_Config_HID_2.h" 150 | #endif 151 | #ifdef RTE_USB_Device_HID_3 152 | #include "USBD_Config_HID_3.h" 153 | #endif 154 | 155 | #ifdef RTE_USB_Device_MSC_0 156 | #include "USBD_Config_MSC_0.h" 157 | #endif 158 | #ifdef RTE_USB_Device_MSC_1 159 | #include "USBD_Config_MSC_1.h" 160 | #endif 161 | #ifdef RTE_USB_Device_MSC_2 162 | #include "USBD_Config_MSC_2.h" 163 | #endif 164 | #ifdef RTE_USB_Device_MSC_3 165 | #include "USBD_Config_MSC_3.h" 166 | #endif 167 | 168 | #ifdef RTE_USB_Device_CDC_0 169 | #include "USBD_Config_CDC_0.h" 170 | #endif 171 | #ifdef RTE_USB_Device_CDC_1 172 | #include "USBD_Config_CDC_1.h" 173 | #endif 174 | #ifdef RTE_USB_Device_CDC_2 175 | #include "USBD_Config_CDC_2.h" 176 | #endif 177 | #ifdef RTE_USB_Device_CDC_3 178 | #include "USBD_Config_CDC_3.h" 179 | #endif 180 | #ifdef RTE_USB_Device_CDC_4 181 | #include "USBD_Config_CDC_4.h" 182 | #endif 183 | #ifdef RTE_USB_Device_CDC_5 184 | #include "USBD_Config_CDC_5.h" 185 | #endif 186 | #ifdef RTE_USB_Device_CDC_6 187 | #include "USBD_Config_CDC_6.h" 188 | #endif 189 | #ifdef RTE_USB_Device_CDC_7 190 | #include "USBD_Config_CDC_7.h" 191 | #endif 192 | 193 | #ifdef RTE_USB_Device_ADC_0 194 | #include "USBD_Config_ADC_0.h" 195 | #endif 196 | #ifdef RTE_USB_Device_ADC_1 197 | #include "USBD_Config_ADC_1.h" 198 | #endif 199 | #ifdef RTE_USB_Device_ADC_2 200 | #include "USBD_Config_ADC_2.h" 201 | #endif 202 | #ifdef RTE_USB_Device_ADC_3 203 | #include "USBD_Config_ADC_3.h" 204 | #endif 205 | 206 | #include "usbd_config.h" 207 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/USB/USBD_Config_HID_0.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_HID_0.h 6 | * Purpose: USB Device Human Interface Device class (HID) Configuration 7 | * Rev.: V5.0.1 8 | *----------------------------------------------------------------------------*/ 9 | 10 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 11 | 12 | // USB Device: Human Interface Device class (HID) 0 13 | // Assign Device Class to USB Device # <0-3> 14 | // Select USB Device that is used for this Device Class instance 15 | #define USBD_HID0_DEV 0 16 | 17 | // Interrupt Endpoint Settings 18 | // By default, the settings match the first USB Class instance in a USB Device. 19 | // Endpoint conflicts are flagged by compile-time error messages. 20 | // 21 | // Interrupt IN Endpoint Settings 22 | // Interrupt IN Endpoint Number 23 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 24 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 25 | #define USBD_HID0_EP_INT_IN 4 26 | 27 | // Endpoint Settings 28 | // Parameters are used to create Endpoint Descriptors 29 | // and for memory allocation in the USB component. 30 | // 31 | // Full/Low-speed (High-speed disabled) 32 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 33 | // Maximum Endpoint Packet Size (in bytes) <0-64> 34 | // Specifies the physical packet size used for information exchange. 35 | // Maximum value is 64. 36 | #define USBD_HID0_EP_INT_IN_WMAXPACKETSIZE 64 37 | 38 | // Endpoint polling Interval (in ms) <1-255> 39 | // Specifies the frequency of requests initiated by USB Host for 40 | // function USBD_HIDn_GetReport. 41 | #define USBD_HID0_EP_INT_IN_BINTERVAL 1 42 | 43 | // 44 | 45 | // High-speed 46 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 47 | // 48 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 49 | // Specifies the physical packet size used for information exchange. 50 | // Maximum value is 1024. 51 | // Additional transactions per microframe 52 | // Additional transactions improve communication performance. 53 | // <0=>None <1=>1 additional <2=>2 additional 54 | #define USBD_HID0_EP_INT_IN_HS_WMAXPACKETSIZE 512 55 | 56 | // Endpoint polling Interval (in 125 us intervals) 57 | // Specifies the frequency of requests initiated by USB Host for 58 | // function USBD_HIDn_GetReport. 59 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 60 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 61 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 62 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 63 | #define USBD_HID0_EP_INT_IN_HS_BINTERVAL 1 64 | 65 | // 66 | // 67 | // 68 | 69 | // Interrupt OUT Endpoint Settings 70 | // Interrupt OUT Endpoint Number 71 | // When OUT Endpoint is set to "Not used" the USB Host uses 72 | // the Control Endpoint 0 for Out Reports. 73 | // <0=>Not used 74 | // <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 75 | // <8=>8 <9=>9 <10=>10 <11=>11 <12=>12 <13=>13 <14=>14 <15=>15 76 | #define USBD_HID0_EP_INT_OUT 4 77 | 78 | // Endpoint Settings 79 | // Parameters are used to create USB Descriptors, HID Device Descriptor 80 | // and for memory allocation in the USB component. 81 | // 82 | // Full/Low-speed (High-speed disabled) 83 | // Parameters apply when High-speed is disabled in USBD_Config_n.c 84 | // Maximum Endpoint Packet Size (in bytes) <0-64> 85 | // Specifies the physical packet size used for information exchange. 86 | // Maximum value is 64. 87 | #define USBD_HID0_EP_INT_OUT_WMAXPACKETSIZE 64 88 | 89 | // Endpoint polling Interval (in ms) <1-255> 90 | // Specifies the frequency of requests initiated by USB Host for 91 | // function USBD_HIDn_GetReport. 92 | #define USBD_HID0_EP_INT_OUT_BINTERVAL 1 93 | 94 | // 95 | 96 | // High-speed 97 | // Parameters apply when High-speed is enabled in USBD_Config_n.c 98 | // 99 | // Maximum Endpoint Packet Size (in bytes) <0-1024> 100 | // Specifies the physical packet size used for information exchange. 101 | // Maximum value is 1024. 102 | // Additional transactions per microframe 103 | // Additional transactions improve communication performance. 104 | // <0=>None <1=>1 additional <2=>2 additional 105 | #define USBD_HID0_EP_INT_OUT_HS_WMAXPACKETSIZE 512 106 | 107 | // Endpoint polling Interval (in 125 us intervals) 108 | // Specifies the frequency of requests initiated by USB Host for 109 | // function USBD_HIDn_GetReport. 110 | // <1=> 1 <2=> 2 <3=> 4 <4=> 8 111 | // <5=> 16 <6=> 32 <7=> 64 <8=> 128 112 | // <9=> 256 <10=> 512 <11=> 1024 <12=> 2048 113 | // <13=>4096 <14=>8192 <15=>16384 <16=>32768 114 | #define USBD_HID0_EP_INT_OUT_HS_BINTERVAL 1 115 | 116 | // 117 | // 118 | // 119 | // 120 | 121 | // Human Interface Device Class Settings 122 | // Parameters are used to create USB Descriptors, USB HID Report Descriptor 123 | // and for memory allocation in the USB component. 124 | // 125 | // HID Interface String 126 | #define USBD_HID0_STR_DESC L"CMSIS-DAP v1 HS-HID" 127 | 128 | // Number of Input Reports <1-32> 129 | // Configures max 'rid' value for USBD_HID0_GetReport and USBD_HID_GetReportTrigger 130 | #define USBD_HID0_IN_REPORT_NUM 1 131 | 132 | // Number of Output Reports <1-32> 133 | // Configures max 'rid' value for USBD_HID0_SetReport 134 | #define USBD_HID0_OUT_REPORT_NUM 1 135 | 136 | // Maximum Input Report Size (in bytes) <1-65535> 137 | // Allocates memory and configures 'len' value for USBD_HID0_GetReport 138 | // and USBD_HID_GetReportTrigger 139 | #define USBD_HID0_IN_REPORT_MAX_SZ 512 140 | 141 | // Maximum Output Report Size (in bytes) <1-65535> 142 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 143 | // when rtype=HID_REPORT_OUTPUT. 144 | #define USBD_HID0_OUT_REPORT_MAX_SZ 512 145 | 146 | // Maximum Feature Report Size (in bytes) <1-65535> 147 | // Allocates memory and configures 'len' value for USBD_HID0_SetReport 148 | // when rtype=HID_REPORT_FEATURE 149 | #define USBD_HID0_FEAT_REPORT_MAX_SZ 1 150 | 151 | // Use User Provided HID Report Descriptor 152 | // User needs to provide HID Report Descriptor in array 153 | // const uint8_t usbd_hid0_report_descriptor[] 154 | #define USBD_HID0_USER_REPORT_DESCRIPTOR 0 155 | 156 | // User Provided HID Report Descriptor Size (in bytes) <1-65535> 157 | #define USBD_HID0_USER_REPORT_DESCRIPTOR_SIZE 33 158 | 159 | // 160 | // 161 | 162 | // OS Resources Settings 163 | // These settings are used to optimize usage of OS resources. 164 | // Human Interface Device Class Thread Stack Size <64-65536> 165 | #define USBD_HID0_THREAD_STACK_SIZE 1024 166 | 167 | // Human Interface Device Class Thread Priority 168 | #define USBD_HID0_THREAD_PRIORITY osPriorityAboveNormal 169 | 170 | // 171 | // 172 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/RTE/_STLINKv3DAPv2_WinUSB_VCP/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'STLINKv3DAPv2_WinUSB+VCP' 7 | * Target: 'STLINKv3DAPv2_WinUSB+VCP' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f7xx.h" 18 | 19 | /* ARM::CMSIS:RTOS2:Keil RTX5:Library:5.5.1 */ 20 | #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ 21 | #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */ 22 | /* Keil.MDK-Plus::USB:CORE:Release:6.13.6 */ 23 | #define RTE_USB_Core /* USB Core */ 24 | #define RTE_USB_Core_Release /* USB Core Release Version */ 25 | /* Keil.MDK-Plus::USB:Device:6.13.6 */ 26 | #define RTE_USB_Device_0 /* USB Device 0 */ 27 | 28 | /* Keil.MDK-Plus::USB:Device:CDC:6.13.6 */ 29 | #define RTE_USB_Device_CDC_0 /* USB Device CDC instance 0 */ 30 | 31 | /* Keil.MDK-Plus::USB:Device:Custom Class:6.13.6 */ 32 | #define RTE_USB_Device_CustomClass_0 /* USB Device Custom Class instance 0 */ 33 | 34 | /* Keil::CMSIS Driver:USART:1.13.0 */ 35 | #define RTE_Drivers_USART1 /* Driver USART1 */ 36 | #define RTE_Drivers_USART2 /* Driver USART2 */ 37 | #define RTE_Drivers_USART3 /* Driver USART3 */ 38 | #define RTE_Drivers_USART4 /* Driver USART4 */ 39 | #define RTE_Drivers_USART5 /* Driver USART5 */ 40 | #define RTE_Drivers_USART6 /* Driver USART6 */ 41 | #define RTE_Drivers_USART7 /* Driver USART7 */ 42 | #define RTE_Drivers_USART8 /* Driver USART8 */ 43 | /* Keil::CMSIS Driver:USB Device:High-speed:1.14.0 */ 44 | #define RTE_Drivers_USBD1 /* Driver USBD1 */ 45 | /* Keil::Device:STM32Cube Framework:Classic:1.2.7 */ 46 | #define RTE_DEVICE_FRAMEWORK_CLASSIC 47 | /* Keil::Device:STM32Cube HAL:Common:1.2.7 */ 48 | #define RTE_DEVICE_HAL_COMMON 49 | /* Keil::Device:STM32Cube HAL:Cortex:1.2.7 */ 50 | #define RTE_DEVICE_HAL_CORTEX 51 | /* Keil::Device:STM32Cube HAL:DMA:1.2.7 */ 52 | #define RTE_DEVICE_HAL_DMA 53 | /* Keil::Device:STM32Cube HAL:GPIO:1.2.7 */ 54 | #define RTE_DEVICE_HAL_GPIO 55 | /* Keil::Device:STM32Cube HAL:PWR:1.2.7 */ 56 | #define RTE_DEVICE_HAL_PWR 57 | /* Keil::Device:STM32Cube HAL:RCC:1.2.7 */ 58 | #define RTE_DEVICE_HAL_RCC 59 | /* Keil::Device:STM32Cube HAL:USART:1.2.7 */ 60 | #define RTE_DEVICE_HAL_USART 61 | /* Keil::Device:Startup:1.2.4 */ 62 | #define RTE_DEVICE_STARTUP_STM32F7XX /* Device Startup for STM32F7 */ 63 | 64 | 65 | #endif /* RTE_COMPONENTS_H */ 66 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/USER/STLINK_V3MINI_BSP.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file STLINK-V3MINI_BSP.h 4 | * @author RadioOperator 5 | * @brief STLINK-V3MINI Board Support Package 6 | * LED GPIO initialize 7 | * DAP GPIO initialize 8 | * @version V1.1 9 | * @date 2019-11-09 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Define to prevent recursive inclusion -------------------------------------*/ 14 | #ifndef STLINK_V3MINI_BSP_H 15 | #define STLINK_V3MINI_BSP_H 16 | 17 | /* Includes ------------------------------------------------------------------*/ 18 | #include "stm32f7xx_hal.h" 19 | 20 | 21 | // Debug Port I/O Pins for STM32F723, matched with STLINK-V3MINI board 22 | 23 | //SWCLK/TCK input pin PB2 input 24 | #define PIN_SWCLK_TCK_I_PORT GPIOB 25 | #define PIN_SWCLK_TCK_I_BIT GPIO_PIN_2 26 | 27 | // SWCLK/TCK Pin PH6 output 28 | #define PIN_SWCLK_TCK_O_PORT GPIOH 29 | #define PIN_SWCLK_TCK_O_BIT GPIO_PIN_6 30 | 31 | // SWDIO/TMS Pin input PH7 input 32 | #define PIN_SWDIO_TMS_I_PORT GPIOH 33 | #define PIN_SWDIO_TMS_I_BIT GPIO_PIN_7 34 | 35 | // SWDIO Output Enable Pin PF9 output 36 | #define PIN_SWDIO_TMS_O_PORT GPIOF 37 | #define PIN_SWDIO_TMS_O_BIT GPIO_PIN_9 38 | 39 | // TDI Pin PA1 input 40 | #define PIN_TDI_I_PORT GPIOA 41 | #define PIN_TDI_I_BIT GPIO_PIN_1 42 | 43 | // TDI Pin PF8 output 44 | #define PIN_TDI_O_PORT GPIOF 45 | #define PIN_TDI_O_BIT GPIO_PIN_8 46 | 47 | // TDO Pin PD2, input, UART5_RX 48 | #define PIN_TDO_PORT GPIOD 49 | #define PIN_TDO_BIT GPIO_PIN_2 50 | 51 | // nTRST Pin Not available 52 | #define PIN_nTRST_PORT 53 | #define PIN_nTRST_BIT 54 | 55 | // nRESET Pin PA6 output 56 | #define PIN_nRESET_PORT GPIOA 57 | #define PIN_nRESET_BIT GPIO_PIN_6 58 | 59 | // nRESET Output Enable Pin Not available 60 | #define PIN_nRESET_OE_PORT 61 | #define PIN_nRESET_OE_BIT 62 | 63 | 64 | // Debug Unit LEDs 65 | 66 | // Connected LED PA10 - High, RED 67 | #define LED_CONNECTED_PORT GPIOA 68 | #define LED_CONNECTED_BIT GPIO_PIN_10 69 | 70 | // Target Running LED PA10 - Low, GREEN 71 | #define LED_RUNNING_PORT GPIOA 72 | #define LED_RUNNING_BIT GPIO_PIN_10 73 | 74 | 75 | void BSP_GPIO_Init(void); 76 | 77 | typedef enum 78 | { 79 | LED_STANDBY, //GRN:RED = 15:1, Standby mode, 1=125ms 80 | LED_DEBUG_PAUSE, //GRN:RED = RED, Target board Pause mode, RED only. 81 | LED_DEBUG_RUN, //GRN:RED = 4:4, Target board running mode, slow blink. 82 | LED_VCP_RUN, //GRN:RED = 1:1, VCP data transfering, fast blink, active at Standby mode only. 83 | 84 | } LED_Mode_t; 85 | 86 | extern LED_Mode_t LED_Mode; 87 | 88 | int Init_LED_Timer (void); 89 | 90 | void vResetTarget(uint32_t bit); 91 | 92 | 93 | #endif //#ifndef STLINK_V3MINI_BSP_H 94 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/USER/USBD_User_HID_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2017 ARM Germany GmbH. All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_User_HID_0.c 6 | * Purpose: USB Device Human Interface Device class (HID) User module 7 | * Rev.: V6.2.3 8 | *----------------------------------------------------------------------------*/ 9 | /** 10 | * \addtogroup usbd_hidFunctions 11 | * 12 | * USBD_User_HID_0.c implements the application specific functionality of the 13 | * HID class and is used to receive and send data reports to the USB Host. 14 | * 15 | * The implementation must match the configuration file USBD_Config_HID_0.h. 16 | * The following values in USBD_Config_HID_0.h affect the user code: 17 | * 18 | * - 'Endpoint polling Interval' specifies the frequency of requests 19 | * initiated by USB Host for \ref USBD_HIDn_GetReport. 20 | * 21 | * - 'Number of Output Reports' configures the values for \em rid of 22 | * \ref USBD_HIDn_SetReport. 23 | * 24 | * - 'Number of Input Reports' configures the values for \em rid of 25 | * \ref USBD_HIDn_GetReport and \ref USBD_HID_GetReportTrigger. 26 | * 27 | * - 'Maximum Input Report Size' specifies the maximum value for: 28 | * - return of \ref USBD_HIDn_GetReport 29 | * - len of \ref USBD_HID_GetReportTrigger. 30 | * 31 | * - 'Maximum Output Report Size' specifies the maximum value for \em len 32 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_OUTPUT 33 | * 34 | * - 'Maximum Feature Report Size' specifies the maximum value for \em len 35 | * in \ref USBD_HIDn_SetReport for rtype=HID_REPORT_FEATURE 36 | * 37 | */ 38 | 39 | 40 | //! [code_USBD_User_HID] 41 | 42 | #include 43 | #include 44 | #include "cmsis_os2.h" 45 | #define osObjectsExternal 46 | #include "osObjects.h" 47 | #include "rl_usb.h" 48 | #include "USBD_Config_HID_0.h" 49 | #include "DAP_config.h" 50 | #include "DAP.h" 51 | 52 | 53 | #if (USBD_HID0_OUT_REPORT_MAX_SZ != DAP_PACKET_SIZE) 54 | #error "USB HID0 Output Report Size must match DAP Packet Size" 55 | #endif 56 | #if (USBD_HID0_IN_REPORT_MAX_SZ != DAP_PACKET_SIZE) 57 | #error "USB HID Input Report Size must match DAP Packet Size" 58 | #endif 59 | 60 | static volatile uint16_t USB_RequestIndexI; // Request Index In 61 | static volatile uint16_t USB_RequestIndexO; // Request Index Out 62 | static volatile uint16_t USB_RequestCountI; // Request Count In 63 | static volatile uint16_t USB_RequestCountO; // Request Count Out 64 | 65 | static volatile uint16_t USB_ResponseIndexI; // Response Index In 66 | static volatile uint16_t USB_ResponseIndexO; // Response Index Out 67 | static volatile uint16_t USB_ResponseCountI; // Response Count In 68 | static volatile uint16_t USB_ResponseCountO; // Response Count Out 69 | static volatile uint8_t USB_ResponseIdle; // Response Idle Flag 70 | 71 | static uint8_t USB_Request [DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Request Buffer 72 | static uint8_t USB_Response[DAP_PACKET_COUNT][DAP_PACKET_SIZE]; // Response Buffer 73 | 74 | 75 | // Called during USBD_Initialize to initialize the USB HID class instance. 76 | void USBD_HID0_Initialize (void) { 77 | // Initialize variables 78 | USB_RequestIndexI = 0U; 79 | USB_RequestIndexO = 0U; 80 | USB_RequestCountI = 0U; 81 | USB_RequestCountO = 0U; 82 | USB_ResponseIndexI = 0U; 83 | USB_ResponseIndexO = 0U; 84 | USB_ResponseCountI = 0U; 85 | USB_ResponseCountO = 0U; 86 | USB_ResponseIdle = 1U; 87 | } 88 | 89 | 90 | // Called during USBD_Uninitialize to de-initialize the USB HID class instance. 91 | void USBD_HID0_Uninitialize (void) { 92 | } 93 | 94 | 95 | // \brief Prepare HID Report data to send. 96 | // \param[in] rtype report type: 97 | // - HID_REPORT_INPUT = input report requested 98 | // - HID_REPORT_FEATURE = feature report requested 99 | // \param[in] req request type: 100 | // - USBD_HID_REQ_EP_CTRL = control endpoint request 101 | // - USBD_HID_REQ_PERIOD_UPDATE = idle period expiration request 102 | // - USBD_HID_REQ_EP_INT = previously sent report on interrupt endpoint request 103 | // \param[in] rid report ID (0 if only one report exists). 104 | // \param[out] buf buffer containing report data to send. 105 | // \return number of report data bytes prepared to send or invalid report requested. 106 | // - value >= 0: number of report data bytes prepared to send 107 | // - value = -1: invalid report requested 108 | int32_t USBD_HID0_GetReport (uint8_t rtype, uint8_t req, uint8_t rid, uint8_t *buf) { 109 | (void)rid; 110 | 111 | switch (rtype) { 112 | case HID_REPORT_INPUT: 113 | switch (req) { 114 | case USBD_HID_REQ_EP_CTRL: // Explicit USB Host request via Control OUT Endpoint 115 | case USBD_HID_REQ_PERIOD_UPDATE: // Periodic USB Host request via Interrupt OUT Endpoint 116 | break; 117 | case USBD_HID_REQ_EP_INT: // Called after USBD_HID_GetReportTrigger to signal data obtained. 118 | if (USB_ResponseCountI != USB_ResponseCountO) { 119 | // Load data from response buffer to be sent back 120 | memcpy(buf, USB_Response[USB_ResponseIndexO], DAP_PACKET_SIZE); 121 | USB_ResponseIndexO++; 122 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 123 | USB_ResponseIndexO = 0U; 124 | } 125 | USB_ResponseCountO++; 126 | return ((int32_t)DAP_PACKET_SIZE); 127 | } else { 128 | USB_ResponseIdle = 1U; 129 | } 130 | break; 131 | } 132 | break; 133 | case HID_REPORT_FEATURE: 134 | break; 135 | } 136 | return (0); 137 | } 138 | 139 | 140 | // \brief Process received HID Report data. 141 | // \param[in] rtype report type: 142 | // - HID_REPORT_OUTPUT = output report received 143 | // - HID_REPORT_FEATURE = feature report received 144 | // \param[in] req request type: 145 | // - USBD_HID_REQ_EP_CTRL = report received on control endpoint 146 | // - USBD_HID_REQ_EP_INT = report received on interrupt endpoint 147 | // \param[in] rid report ID (0 if only one report exists). 148 | // \param[in] buf buffer that receives report data. 149 | // \param[in] len length of received report data. 150 | // \return true received report data processed. 151 | // \return false received report data not processed or request not supported. 152 | bool USBD_HID0_SetReport (uint8_t rtype, uint8_t req, uint8_t rid, const uint8_t *buf, int32_t len) { 153 | (void)req; 154 | (void)rid; 155 | 156 | switch (rtype) { 157 | case HID_REPORT_OUTPUT: 158 | if (len == 0) { 159 | break; 160 | } 161 | if (buf[0] == ID_DAP_TransferAbort) { 162 | DAP_TransferAbort = 1U; 163 | break; 164 | } 165 | if ((uint16_t)(USB_RequestCountI - USB_RequestCountO) == DAP_PACKET_COUNT) { 166 | osThreadFlagsSet(DAP_v1_ThreadId, 0x80U); 167 | break; // Discard packet when buffer is full 168 | } 169 | // Store received data into request buffer 170 | memcpy(USB_Request[USB_RequestIndexI], buf, (uint32_t)len); 171 | USB_RequestIndexI++; 172 | if (USB_RequestIndexI == DAP_PACKET_COUNT) { 173 | USB_RequestIndexI = 0U; 174 | } 175 | USB_RequestCountI++; 176 | osThreadFlagsSet(DAP_v1_ThreadId, 0x01U); 177 | break; 178 | case HID_REPORT_FEATURE: 179 | break; 180 | } 181 | return true; 182 | } 183 | 184 | 185 | // DAP Thread. 186 | __NO_RETURN void DAP_v1_Thread (void *argument) { 187 | uint32_t flags; 188 | uint32_t n; 189 | (void) argument; 190 | 191 | for (;;) { 192 | osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 193 | 194 | // Process pending requests 195 | while (USB_RequestCountI != USB_RequestCountO) { 196 | 197 | // Handle Queue Commands 198 | n = USB_RequestIndexO; 199 | while (USB_Request[n][0] == ID_DAP_QueueCommands) { 200 | USB_Request[n][0] = ID_DAP_ExecuteCommands; 201 | n++; 202 | if (n == DAP_PACKET_COUNT) { 203 | n = 0U; 204 | } 205 | if (n == USB_RequestIndexI) { 206 | flags = osThreadFlagsWait(0x81U, osFlagsWaitAny, osWaitForever); 207 | if (flags & 0x80U) { 208 | break; 209 | } 210 | } 211 | } 212 | 213 | // Execute DAP Command (process request and prepare response) 214 | DAP_ExecuteCommand(USB_Request[USB_RequestIndexO], USB_Response[USB_ResponseIndexI]); 215 | 216 | // Update Request Index and Count 217 | USB_RequestIndexO++; 218 | if (USB_RequestIndexO == DAP_PACKET_COUNT) { 219 | USB_RequestIndexO = 0U; 220 | } 221 | USB_RequestCountO++; 222 | 223 | // Update Response Index and Count 224 | USB_ResponseIndexI++; 225 | if (USB_ResponseIndexI == DAP_PACKET_COUNT) { 226 | USB_ResponseIndexI = 0U; 227 | } 228 | USB_ResponseCountI++; 229 | 230 | if (USB_ResponseIdle) { 231 | if (USB_ResponseCountI != USB_ResponseCountO) { 232 | // Load data from response buffer to be sent back 233 | n = USB_ResponseIndexO++; 234 | if (USB_ResponseIndexO == DAP_PACKET_COUNT) { 235 | USB_ResponseIndexO = 0U; 236 | } 237 | USB_ResponseCountO++; 238 | USB_ResponseIdle = 0U; 239 | USBD_HID_GetReportTrigger(0U, 0U, USB_Response[n], DAP_PACKET_SIZE); 240 | } 241 | } 242 | } 243 | } 244 | } 245 | 246 | //! [code_USBD_User_HID] 247 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/USER/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file main.c 4 | * @author ARM CMSIS-DAP scource code, modified by RadioOperator 5 | * 6 | * @brief CMSIS-DAP v1 for STLINK-V3MINI 7 | * 8 | * @version V2.0 9 | * @date 2019-12-22 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Includes ------------------------------------------------------------------*/ 14 | 15 | #ifdef _RTE_ 16 | #include "RTE_Components.h" // Component selection 17 | #endif 18 | #ifdef RTE_CMSIS_RTOS2 // when RTE component CMSIS RTOS2 is used 19 | #include "cmsis_os2.h" // ::CMSIS:RTOS2 20 | #endif 21 | #include "stm32f7xx_hal.h" 22 | #include "osObjects.h" 23 | #include "rl_usb.h" 24 | #include "DAP_config.h" 25 | #include "DAP.h" 26 | #include "STLINK_V3MINI_BSP.h" 27 | 28 | 29 | #ifdef RTE_CMSIS_RTOS2_RTX5 30 | /** 31 | * Override default HAL_GetTick function 32 | */ 33 | uint32_t HAL_GetTick (void) { 34 | static uint32_t ticks = 0U; 35 | uint32_t i; 36 | 37 | if (osKernelGetState () == osKernelRunning) { 38 | return ((uint32_t)osKernelGetTickCount ()); 39 | } 40 | 41 | /* If Kernel is not running wait approximately 1 ms then increment 42 | and return auxiliary tick counter value */ 43 | Delayms(1); 44 | 45 | return ++ticks; 46 | } 47 | #endif 48 | 49 | /* Private function prototypes -----------------------------------------------*/ 50 | static void SystemClock_Config(void); 51 | static void Error_Handler(void); 52 | static void MPU_Config(void); 53 | static void CPU_CACHE_Enable(void); 54 | 55 | 56 | /* Private functions ---------------------------------------------------------*/ 57 | // Application Main program 58 | __NO_RETURN void app_main (void *argument) { 59 | (void)argument; 60 | 61 | DAP_Setup(); // DAP Setup 62 | 63 | USBD_Initialize(0U); // USB Device Initialization 64 | USBD_Connect(0U); // USB Device Connect 65 | while (!USBD_Configured(0U)); // Wait for USB Device to configure 66 | 67 | // Create DAP Thread 68 | DAP_ThreadId = osThreadNew(DAP_Thread, NULL, &DAP_ThreadAttr); 69 | 70 | // Create SWO Thread, cannot enable SWO_STREAM in WinUSB+VCP, radiooperator 71 | // SWO_ThreadId = osThreadNew(SWO_Thread, NULL, &SWO_ThreadAttr); 72 | 73 | // create LED Timer Thread, radiooperator 74 | Init_LED_Timer(); 75 | 76 | osDelay(osWaitForever); 77 | for (;;) {}; 78 | } 79 | /** 80 | * @brief Main program 81 | * @param None 82 | * @retval None 83 | */ 84 | int main(void) 85 | { 86 | /* This project template calls firstly two functions in order to configure MPU feature 87 | and to enable the CPU Cache, respectively MPU_Config() and CPU_CACHE_Enable(). 88 | These functions are provided as template implementation that User may integrate 89 | in his application, to enhance the performance in case of use of AXI interface 90 | with several masters. */ 91 | 92 | /* Configure the MPU attributes as Write Through */ 93 | MPU_Config(); 94 | 95 | /* Enable the CPU Cache */ 96 | CPU_CACHE_Enable(); 97 | 98 | /* STM32F7xx HAL library initialization: 99 | - Configure the Flash ART accelerator on ITCM interface 100 | - Configure the Systick to generate an interrupt each 1 msec 101 | - Set NVIC Group Priority to 4 102 | - Low Level Initialization 103 | */ 104 | HAL_Init(); 105 | 106 | /* Configure the System clock to have a frequency of 216 MHz */ 107 | SystemClock_Config(); 108 | SystemCoreClockUpdate(); 109 | 110 | /* Add your application code here 111 | */ 112 | BSP_GPIO_Init(); 113 | 114 | #ifdef RTE_CMSIS_RTOS2 115 | /* Initialize CMSIS-RTOS2 */ 116 | osKernelInitialize (); 117 | 118 | /* Create thread functions that start executing, 119 | Example: osThreadNew(app_main, NULL, NULL); */ 120 | osThreadNew(app_main, NULL, NULL); // Create application main thread 121 | if (osKernelGetState() == osKernelReady) { 122 | osKernelStart(); // Start thread execution 123 | } 124 | /* Start thread execution */ 125 | // osKernelStart(); 126 | #endif 127 | 128 | /* Infinite loop */ 129 | while (1) 130 | { 131 | } 132 | } 133 | 134 | /** 135 | * @brief System Clock Configuration 136 | * The system Clock is configured as follow : 137 | * System Clock source = PLL (HSE) 138 | * SYSCLK(Hz) = 216000000 139 | * HCLK(Hz) = 216000000 140 | * AHB Prescaler = 1 141 | * APB1 Prescaler = 4 142 | * APB2 Prescaler = 2 143 | * HSE Frequency(Hz) = 25000000 144 | * PLL_M = 25 145 | * PLL_N = 432 146 | * PLL_P = 2 147 | * PLL_Q = 9 148 | * VDD(V) = 3.3 149 | * Main regulator output voltage = Scale1 mode 150 | * Flash Latency(WS) = 7 151 | * @param None 152 | * @retval None 153 | */ 154 | static void SystemClock_Config(void) 155 | { 156 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 157 | RCC_OscInitTypeDef RCC_OscInitStruct; 158 | 159 | /* Enable HSE Oscillator and activate PLL with HSE as source */ 160 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 161 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 162 | RCC_OscInitStruct.HSIState = RCC_HSI_OFF; 163 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 164 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 165 | RCC_OscInitStruct.PLL.PLLM = 25; 166 | RCC_OscInitStruct.PLL.PLLN = 432; 167 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 168 | RCC_OscInitStruct.PLL.PLLQ = 9; 169 | if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 170 | { 171 | Error_Handler(); 172 | } 173 | 174 | /* activate the OverDrive to reach the 216 Mhz Frequency */ 175 | if(HAL_PWREx_EnableOverDrive() != HAL_OK) 176 | { 177 | Error_Handler(); 178 | } 179 | 180 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 181 | clocks dividers */ 182 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); 183 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 184 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 185 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 186 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 187 | if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) 188 | { 189 | Error_Handler(); 190 | } 191 | } 192 | 193 | /** 194 | * @brief This function is executed in case of error occurrence. 195 | * @param None 196 | * @retval None 197 | */ 198 | static void Error_Handler(void) 199 | { 200 | /* User may add here some code to deal with this error */ 201 | while(1) 202 | { 203 | } 204 | } 205 | 206 | /** 207 | * @brief Configure the MPU attributes as Write Through Internal SRAM1/SRAM2. 208 | * @note The Base Address is 0x20000000 and Region Size 512KB. 209 | * @param None 210 | * @retval None 211 | */ 212 | static void MPU_Config(void) 213 | { 214 | MPU_Region_InitTypeDef MPU_InitStruct; 215 | 216 | /* Disable the MPU */ 217 | HAL_MPU_Disable(); 218 | 219 | /* Configure the MPU attributes as WT for SRAM */ 220 | MPU_InitStruct.Enable = MPU_REGION_ENABLE; 221 | MPU_InitStruct.BaseAddress = 0x20000000; 222 | MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; 223 | MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; 224 | MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; 225 | MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; 226 | MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; 227 | MPU_InitStruct.Number = MPU_REGION_NUMBER0; 228 | MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; 229 | MPU_InitStruct.SubRegionDisable = 0x00; 230 | MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; 231 | 232 | HAL_MPU_ConfigRegion(&MPU_InitStruct); 233 | 234 | /* Enable the MPU */ 235 | HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); 236 | } 237 | 238 | /** 239 | * @brief CPU L1-Cache enable. 240 | * @param None 241 | * @retval None 242 | */ 243 | static void CPU_CACHE_Enable(void) 244 | { 245 | /* Enable I-Cache */ 246 | SCB_EnableICache(); 247 | 248 | /* Enable D-Cache */ 249 | SCB_EnableDCache(); 250 | } 251 | 252 | #ifdef USE_FULL_ASSERT 253 | 254 | /** 255 | * @brief Reports the name of the source file and the source line number 256 | * where the assert_param error has occurred. 257 | * @param file: pointer to the source file name 258 | * @param line: assert_param error line source number 259 | * @retval None 260 | */ 261 | void assert_failed(uint8_t* file, uint32_t line) 262 | { 263 | /* User can add his own implementation to report the file name and line number, 264 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 265 | 266 | /* Infinite loop */ 267 | while (1) 268 | { 269 | } 270 | } 271 | #endif 272 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/USER/osObjects.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ---------------------------------------------------------------------- 19 | * 20 | * $Date: 1. December 2017 21 | * $Revision: V2.0.0 22 | * 23 | * Project: CMSIS-DAP Examples LPC-Link-II 24 | * Title: osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II 25 | * 26 | *---------------------------------------------------------------------------*/ 27 | 28 | #ifndef __osObjects_h__ 29 | #define __osObjects_h__ 30 | 31 | #include "cmsis_os2.h" 32 | 33 | #ifdef osObjectsExternal 34 | extern osThreadId_t DAP_ThreadId; 35 | extern osThreadId_t SWO_ThreadId; 36 | #else 37 | const osThreadAttr_t DAP_ThreadAttr = { 38 | .priority = osPriorityNormal 39 | }; 40 | const osThreadAttr_t SWO_ThreadAttr = { 41 | .priority = osPriorityAboveNormal 42 | }; 43 | extern osThreadId_t DAP_ThreadId; 44 | osThreadId_t DAP_ThreadId; 45 | extern osThreadId_t SWO_ThreadId; 46 | osThreadId_t SWO_ThreadId; 47 | #endif 48 | 49 | extern void DAP_Thread (void *argument); 50 | extern void SWO_Thread (void *argument); 51 | 52 | extern void app_main (void *argument); 53 | 54 | #endif /* __osObjects_h__ */ 55 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB+VCP/Win7-VCP-Driver/Win7_VCP_Driver.inf: -------------------------------------------------------------------------------- 1 | [Version] 2 | Signature = "$Windows NT$" 3 | Class = Ports 4 | ClassGUID = {4D36E978-E325-11CE-BFC1-08002BE10318} 5 | Provider = %ManufacturerName% 6 | DriverVer=05/07/2020,1.00 7 | 8 | ; ========== Manufacturer/Models sections =========== 9 | 10 | [Manufacturer] 11 | %ManufacturerName% = Standard,NTx86,NTamd64 12 | 13 | ; List of devices supporting the Virtual COM port (with the corresponding interface ID) 14 | 15 | [Standard.NTx86] 16 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A 17 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C 18 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D 19 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_00 20 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_00 21 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_00 22 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_01 23 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_01 24 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_01 25 | 26 | 27 | [Standard.NTamd64] 28 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A 29 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C 30 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D 31 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_00 32 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_00 33 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_00 34 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572A&MI_01 35 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572C&MI_01 36 | %DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_572D&MI_01 37 | 38 | ; =================== Installation =================== 39 | 40 | [USB_InstallVCP] 41 | Include = mdmcpq.inf 42 | CopyFiles = FakeModemCopyFileSection 43 | AddReg = USB_InstallVCP.AddReg 44 | 45 | [USB_InstallVCP.AddReg] 46 | HKR,,DevLoader,,*ntkern 47 | HKR,,NTMPDriver,,usbser.sys 48 | HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" 49 | 50 | [USB_InstallVCP.Services] 51 | AddService=usbser, 0x00000002, DriverService 52 | 53 | [DriverService] 54 | DisplayName=%DeviceNameVCP% 55 | ServiceType=1 56 | StartType=3 57 | ErrorControl=1 58 | ServiceBinary=%12%\usbser.sys 59 | 60 | ; [DestinationDirs] 61 | ; If your INF needs to copy files, you must not use the DefaultDestDir directive here. 62 | ; You must explicitly reference all file-list-section names in this section. 63 | 64 | ; =================== Strings =================== 65 | 66 | [Strings] 67 | ManufacturerName="STM" 68 | ;ClassName="Universal Serial Bus devices" 69 | DeviceNameVCP="CMSIS-DAP VCP" 70 | REG_MULTI_SZ = 0x00010000 71 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/DebugConfig/STLINKv3DAPv2_WinUSB_STM32F723IEKx_2.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // File: STM32F72x_73x.dbgconf 2 | // Version: 1.0.0 3 | // Note: refer to STM32F72xxx STM32F73xxx reference manual (RM0431) 4 | // refer to STM32F72xxx STM32F73xxx datasheets 5 | 6 | // <<< Use Configuration Wizard in Context Menu >>> 7 | 8 | // Debug MCU configuration register (DBGMCU_CR) 9 | // DBG_STANDBY Debug standby mode 10 | // DBG_STOP Debug stop mode 11 | // DBG_SLEEP Debug sleep mode 12 | // 13 | DbgMCU_CR = 0x00000007; 14 | 15 | // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) 16 | // Reserved bits must be kept at reset value 17 | // DBG_CAN1_STOP Debug CAN1 stopped when core is halted 18 | // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 19 | // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 20 | // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted 21 | // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted 22 | // DBG_WWDG_STOP Debug window watchdog stopped when core is halted 23 | // DBG_RTC_STOP RTC stopped when core is halted 24 | // DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted 25 | // DBG_TIM14_STOP TIM14 counter stopped when core is halted 26 | // DBG_TIM13_STOP TIM13 counter stopped when core is halted 27 | // DBG_TIM12_STOP TIM12 counter stopped when core is halted 28 | // DBG_TIM7_STOP TIM7 counter stopped when core is halted 29 | // DBG_TIM6_STOP TIM6 counter stopped when core is halted 30 | // DBG_TIM5_STOP TIM5 counter stopped when core is halted 31 | // DBG_TIM4_STOP TIM4 counter stopped when core is halted 32 | // DBG_TIM3_STOP TIM3 counter stopped when core is halted 33 | // DBG_TIM2_STOP TIM2 counter stopped when core is halted 34 | // 35 | DbgMCU_APB1_Fz = 0x00000000; 36 | 37 | // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) 38 | // Reserved bits must be kept at reset value 39 | // DBG_TIM11_STOP TIM11 counter stopped when core is halted 40 | // DBG_TIM10_STOP TIM10 counter stopped when core is halted 41 | // DBG_TIM9_STOP TIM9 counter stopped when core is halted 42 | // DBG_TIM8_STOP TIM8 counter stopped when core is halted 43 | // DBG_TIM1_STOP TIM1 counter stopped when core is halted 44 | // 45 | DbgMCU_APB2_Fz = 0x00000000; 46 | 47 | // TPIU Pin Routing (TRACECLK fixed on Pin PE2) 48 | // TRACECLK: Pin PE2 49 | // TRACED0 50 | // ETM Trace Data 0 51 | // <0x00040003=> Pin PE3 52 | // <0x00020001=> Pin PC1 53 | // <0x0006000D=> Pin PG13 54 | // TRACED1 55 | // ETM Trace Data 1 56 | // <0x00040004=> Pin PE4 57 | // <0x00020008=> Pin PC8 58 | // <0x0006000E=> Pin PG14 59 | // TRACED2 60 | // ETM Trace Data 2 61 | // <0x00040005=> Pin PE5 62 | // <0x00030002=> Pin PD2 63 | // TRACED3 64 | // ETM Trace Data 3 65 | // <0x00040006=> Pin PE6 66 | // <0x0002000C=> Pin PC12 67 | // 68 | TraceClk_Pin = 0x00040002; 69 | TraceD0_Pin = 0x00040003; 70 | TraceD1_Pin = 0x00040004; 71 | TraceD2_Pin = 0x00040005; 72 | TraceD3_Pin = 0x00040006; 73 | 74 | // <<< end of configuration section >>> 75 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/RTE/CMSIS/RTX_Config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ----------------------------------------------------------------------------- 19 | * 20 | * $Revision: V5.1.0 21 | * 22 | * Project: CMSIS-RTOS RTX 23 | * Title: RTX Configuration 24 | * 25 | * ----------------------------------------------------------------------------- 26 | */ 27 | 28 | #include "cmsis_compiler.h" 29 | #include "rtx_os.h" 30 | 31 | // OS Idle Thread 32 | __WEAK __NO_RETURN void osRtxIdleThread (void *argument) { 33 | (void)argument; 34 | 35 | for (;;) {} 36 | } 37 | 38 | // OS Error Callback function 39 | __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { 40 | (void)object_id; 41 | 42 | switch (code) { 43 | case osRtxErrorStackUnderflow: 44 | // Stack overflow detected for thread (thread_id=object_id) 45 | break; 46 | case osRtxErrorISRQueueOverflow: 47 | // ISR Queue overflow detected when inserting object (object_id) 48 | break; 49 | case osRtxErrorTimerQueueOverflow: 50 | // User Timer Callback Queue overflow detected for timer (timer_id=object_id) 51 | break; 52 | case osRtxErrorClibSpace: 53 | // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM 54 | break; 55 | case osRtxErrorClibMutex: 56 | // Standard C/C++ library mutex initialization failed 57 | break; 58 | default: 59 | // Reserved 60 | break; 61 | } 62 | for (;;) {} 63 | //return 0U; 64 | } 65 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/RTE/Device/project.script: -------------------------------------------------------------------------------- 1 | load STM32F723IEKx 2 | project name STCubeGenerated 3 | project toolchain "MDK-ARM V5" 4 | project path "C:\STM32F723\STM32F723IEK6DAP\RTE\Device\STM32F723IEKx\" 5 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/RTE/USB/USBD_Config_0.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------------ 2 | * MDK Middleware - Component ::USB:Device 3 | * Copyright (c) 2004-2019 Arm Limited (or its affiliates). All rights reserved. 4 | *------------------------------------------------------------------------------ 5 | * Name: USBD_Config_0.c 6 | * Purpose: USB Device Configuration 7 | * Rev.: V5.2.0 8 | *------------------------------------------------------------------------------ 9 | * Use the following configuration settings in the Device Class configuration 10 | * files to assign a Device Class to this USB Device 0. 11 | * 12 | * Configuration Setting Value 13 | * --------------------- ----- 14 | * Assign Device Class to USB Device # = 0 15 | *----------------------------------------------------------------------------*/ 16 | 17 | //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- 18 | 19 | // USB Device 0 20 | // Connect to hardware via Driver_USBD# <0-255> 21 | // Select driver control block for hardware interface. 22 | #define USBD0_PORT 1 23 | 24 | // High-speed 25 | // Enable High-speed functionality (if device supports it). 26 | #define USBD0_HS 1 27 | 28 | // Device Settings 29 | // These settings are used to create the Device Descriptor 30 | // Max Endpoint 0 Packet Size 31 | // Maximum packet size for Endpoint 0 (bMaxPacketSize0). 32 | // <8=>8 Bytes <16=>16 Bytes <32=>32 Bytes <64=>64 Bytes 33 | #define USBD0_MAX_PACKET0 64 34 | 35 | // Vendor ID <0x0000-0xFFFF> 36 | // Vendor ID assigned by USB-IF (idVendor). 37 | #define USBD0_DEV_DESC_IDVENDOR 0x0483 38 | 39 | // Product ID <0x0000-0xFFFF> 40 | // Product ID assigned by manufacturer (idProduct). 41 | #define USBD0_DEV_DESC_IDPRODUCT 0x572E 42 | 43 | // Device Release Number <0x0000-0xFFFF> 44 | // Device Release Number in binary-coded decimal (bcdDevice) 45 | #define USBD0_DEV_DESC_BCDDEVICE 0x0100 46 | 47 | // 48 | 49 | // Configuration Settings 50 | // These settings are used to create the Configuration Descriptor. 51 | // Power 52 | // Default Power Setting (D6: of bmAttributes). 53 | // <0=>Bus-powered 54 | // <1=>Self-powered 55 | // Remote Wakeup 56 | // Configuration support for Remote Wakeup (D5: of bmAttributes). 57 | #define USBD0_CFG_DESC_BMATTRIBUTES 0x80 58 | 59 | // Maximum Power Consumption (in mA) <0-510><#/2> 60 | // Maximum Power Consumption of USB Device from bus in this 61 | // specific configuration when device is fully operational (bMaxPower). 62 | #define USBD0_CFG_DESC_BMAXPOWER 250 63 | 64 | // 65 | 66 | // String Settings 67 | // These settings are used to create the String Descriptor. 68 | // Language ID <0x0000-0xFCFF> 69 | // English (United States) = 0x0409. 70 | #define USBD0_STR_DESC_LANGID 0x0409 71 | 72 | // Manufacturer String 73 | // String Descriptor describing Manufacturer. 74 | #define USBD0_STR_DESC_MAN L"RadioOperator" 75 | 76 | // Product String 77 | // String Descriptor describing Product. 78 | #define USBD0_STR_DESC_PROD L"HS-WinUSB CMSIS-DAP" 79 | 80 | // Serial Number String 81 | // Enable Serial Number String. 82 | // If disabled Serial Number String will not be assigned to USB Device. 83 | #define USBD0_STR_DESC_SER_EN 1 84 | 85 | // Default value 86 | // Default device's Serial Number String. 87 | #define USBD0_STR_DESC_SER L"0001A0000000" 88 | 89 | // Maximum Length (in characters) <0-126> 90 | // Specifies the maximum number of Serial Number String characters that can be set at run-time. 91 | // Maximum value is 126. Use value 0 to disable RAM allocation for string. 92 | #define USBD0_STR_DESC_SER_MAX_LEN 16 93 | 94 | // 95 | // 96 | 97 | // Microsoft OS Descriptors Settings 98 | // These settings are used to create the Microsoft OS Descriptors. 99 | // OS String 100 | // Enable creation of Microsoft OS String and Extended Compat ID OS Feature Descriptors. 101 | #define USBD0_OS_DESC_EN 1 102 | 103 | // Vendor Code <0x01-0xFF> 104 | // Specifies Vendor Code used to retrieve OS Feature Descriptors. 105 | #define USBD0_OS_DESC_VENDOR_CODE 0x01 106 | 107 | // 108 | // 109 | 110 | // Control Transfer Buffer Size <64-65536:64> 111 | // Specifies size of buffer used for Control Transfers. 112 | // It should be at least as big as maximum packet size for Endpoint 0. 113 | #define USBD0_EP0_BUF_SIZE 512 114 | 115 | // OS Resources Settings 116 | // These settings are used to optimize usage of OS resources. 117 | // Core Thread Stack Size <64-65536> 118 | #define USBD0_CORE_THREAD_STACK_SIZE 512 119 | 120 | // Core Thread Priority 121 | #define USBD0_CORE_THREAD_PRIORITY osPriorityAboveNormal 122 | 123 | // 124 | // 125 | 126 | 127 | #include "RTE_Components.h" 128 | 129 | #ifdef RTE_USB_Device_CustomClass_0 130 | #include "USBD_Config_CustomClass_0.h" 131 | #endif 132 | #ifdef RTE_USB_Device_CustomClass_1 133 | #include "USBD_Config_CustomClass_1.h" 134 | #endif 135 | #ifdef RTE_USB_Device_CustomClass_2 136 | #include "USBD_Config_CustomClass_2.h" 137 | #endif 138 | #ifdef RTE_USB_Device_CustomClass_3 139 | #include "USBD_Config_CustomClass_3.h" 140 | #endif 141 | 142 | #ifdef RTE_USB_Device_HID_0 143 | #include "USBD_Config_HID_0.h" 144 | #endif 145 | #ifdef RTE_USB_Device_HID_1 146 | #include "USBD_Config_HID_1.h" 147 | #endif 148 | #ifdef RTE_USB_Device_HID_2 149 | #include "USBD_Config_HID_2.h" 150 | #endif 151 | #ifdef RTE_USB_Device_HID_3 152 | #include "USBD_Config_HID_3.h" 153 | #endif 154 | 155 | #ifdef RTE_USB_Device_MSC_0 156 | #include "USBD_Config_MSC_0.h" 157 | #endif 158 | #ifdef RTE_USB_Device_MSC_1 159 | #include "USBD_Config_MSC_1.h" 160 | #endif 161 | #ifdef RTE_USB_Device_MSC_2 162 | #include "USBD_Config_MSC_2.h" 163 | #endif 164 | #ifdef RTE_USB_Device_MSC_3 165 | #include "USBD_Config_MSC_3.h" 166 | #endif 167 | 168 | #ifdef RTE_USB_Device_CDC_0 169 | #include "USBD_Config_CDC_0.h" 170 | #endif 171 | #ifdef RTE_USB_Device_CDC_1 172 | #include "USBD_Config_CDC_1.h" 173 | #endif 174 | #ifdef RTE_USB_Device_CDC_2 175 | #include "USBD_Config_CDC_2.h" 176 | #endif 177 | #ifdef RTE_USB_Device_CDC_3 178 | #include "USBD_Config_CDC_3.h" 179 | #endif 180 | #ifdef RTE_USB_Device_CDC_4 181 | #include "USBD_Config_CDC_4.h" 182 | #endif 183 | #ifdef RTE_USB_Device_CDC_5 184 | #include "USBD_Config_CDC_5.h" 185 | #endif 186 | #ifdef RTE_USB_Device_CDC_6 187 | #include "USBD_Config_CDC_6.h" 188 | #endif 189 | #ifdef RTE_USB_Device_CDC_7 190 | #include "USBD_Config_CDC_7.h" 191 | #endif 192 | 193 | #ifdef RTE_USB_Device_ADC_0 194 | #include "USBD_Config_ADC_0.h" 195 | #endif 196 | #ifdef RTE_USB_Device_ADC_1 197 | #include "USBD_Config_ADC_1.h" 198 | #endif 199 | #ifdef RTE_USB_Device_ADC_2 200 | #include "USBD_Config_ADC_2.h" 201 | #endif 202 | #ifdef RTE_USB_Device_ADC_3 203 | #include "USBD_Config_ADC_3.h" 204 | #endif 205 | 206 | #include "usbd_config.h" 207 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/RTE/_STLINKv3DAPv2_WinUSB/RTE_Components.h: -------------------------------------------------------------------------------- 1 | 2 | /* 3 | * Auto generated Run-Time-Environment Configuration File 4 | * *** Do not modify ! *** 5 | * 6 | * Project: 'STLINKv3DAPv2_WinUSB' 7 | * Target: 'STLINKv3DAPv2_WinUSB' 8 | */ 9 | 10 | #ifndef RTE_COMPONENTS_H 11 | #define RTE_COMPONENTS_H 12 | 13 | 14 | /* 15 | * Define the Device Header File: 16 | */ 17 | #define CMSIS_device_header "stm32f7xx.h" 18 | 19 | /* ARM::CMSIS:RTOS2:Keil RTX5:Library:5.5.1 */ 20 | #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ 21 | #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */ 22 | /* Keil.MDK-Plus::USB:CORE:Release:6.13.6 */ 23 | #define RTE_USB_Core /* USB Core */ 24 | #define RTE_USB_Core_Release /* USB Core Release Version */ 25 | /* Keil.MDK-Plus::USB:Device:6.13.6 */ 26 | #define RTE_USB_Device_0 /* USB Device 0 */ 27 | 28 | /* Keil.MDK-Plus::USB:Device:Custom Class:6.13.6 */ 29 | #define RTE_USB_Device_CustomClass_0 /* USB Device Custom Class instance 0 */ 30 | 31 | /* Keil::CMSIS Driver:USART:1.13.0 */ 32 | #define RTE_Drivers_USART1 /* Driver USART1 */ 33 | #define RTE_Drivers_USART2 /* Driver USART2 */ 34 | #define RTE_Drivers_USART3 /* Driver USART3 */ 35 | #define RTE_Drivers_USART4 /* Driver USART4 */ 36 | #define RTE_Drivers_USART5 /* Driver USART5 */ 37 | #define RTE_Drivers_USART6 /* Driver USART6 */ 38 | #define RTE_Drivers_USART7 /* Driver USART7 */ 39 | #define RTE_Drivers_USART8 /* Driver USART8 */ 40 | /* Keil::CMSIS Driver:USB Device:High-speed:1.14.0 */ 41 | #define RTE_Drivers_USBD1 /* Driver USBD1 */ 42 | /* Keil::Device:STM32Cube Framework:Classic:1.2.7 */ 43 | #define RTE_DEVICE_FRAMEWORK_CLASSIC 44 | /* Keil::Device:STM32Cube HAL:Common:1.2.7 */ 45 | #define RTE_DEVICE_HAL_COMMON 46 | /* Keil::Device:STM32Cube HAL:Cortex:1.2.7 */ 47 | #define RTE_DEVICE_HAL_CORTEX 48 | /* Keil::Device:STM32Cube HAL:DMA:1.2.7 */ 49 | #define RTE_DEVICE_HAL_DMA 50 | /* Keil::Device:STM32Cube HAL:GPIO:1.2.7 */ 51 | #define RTE_DEVICE_HAL_GPIO 52 | /* Keil::Device:STM32Cube HAL:PWR:1.2.7 */ 53 | #define RTE_DEVICE_HAL_PWR 54 | /* Keil::Device:STM32Cube HAL:RCC:1.2.7 */ 55 | #define RTE_DEVICE_HAL_RCC 56 | /* Keil::Device:STM32Cube HAL:USART:1.2.7 */ 57 | #define RTE_DEVICE_HAL_USART 58 | /* Keil::Device:Startup:1.2.4 */ 59 | #define RTE_DEVICE_STARTUP_STM32F7XX /* Device Startup for STM32F7 */ 60 | 61 | 62 | #endif /* RTE_COMPONENTS_H */ 63 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/USER/STLINK_V3MINI_BSP.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file STLINK-V3MINI_BSP.h 4 | * @author RadioOperator 5 | * @brief STLINK-V3MINI Board Support Package 6 | * LED GPIO initialize 7 | * DAP GPIO initialize 8 | * @version V1.1 9 | * @date 2019-11-09 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Define to prevent recursive inclusion -------------------------------------*/ 14 | #ifndef STLINK_V3MINI_BSP_H 15 | #define STLINK_V3MINI_BSP_H 16 | 17 | /* Includes ------------------------------------------------------------------*/ 18 | #include "stm32f7xx_hal.h" 19 | 20 | 21 | // Debug Port I/O Pins for STM32F723, matched with STLINK-V3MINI board 22 | 23 | //SWCLK/TCK input pin PB2 input 24 | #define PIN_SWCLK_TCK_I_PORT GPIOB 25 | #define PIN_SWCLK_TCK_I_BIT GPIO_PIN_2 26 | 27 | // SWCLK/TCK Pin PH6 output 28 | #define PIN_SWCLK_TCK_O_PORT GPIOH 29 | #define PIN_SWCLK_TCK_O_BIT GPIO_PIN_6 30 | 31 | // SWDIO/TMS Pin input PH7 input 32 | #define PIN_SWDIO_TMS_I_PORT GPIOH 33 | #define PIN_SWDIO_TMS_I_BIT GPIO_PIN_7 34 | 35 | // SWDIO Output Enable Pin PF9 output 36 | #define PIN_SWDIO_TMS_O_PORT GPIOF 37 | #define PIN_SWDIO_TMS_O_BIT GPIO_PIN_9 38 | 39 | // TDI Pin PA1 input 40 | #define PIN_TDI_I_PORT GPIOA 41 | #define PIN_TDI_I_BIT GPIO_PIN_1 42 | 43 | // TDI Pin PF8 output 44 | #define PIN_TDI_O_PORT GPIOF 45 | #define PIN_TDI_O_BIT GPIO_PIN_8 46 | 47 | // TDO Pin PD2, input, UART5_RX 48 | #define PIN_TDO_PORT GPIOD 49 | #define PIN_TDO_BIT GPIO_PIN_2 50 | 51 | // nTRST Pin Not available 52 | #define PIN_nTRST_PORT 53 | #define PIN_nTRST_BIT 54 | 55 | // nRESET Pin PA6 output 56 | #define PIN_nRESET_PORT GPIOA 57 | #define PIN_nRESET_BIT GPIO_PIN_6 58 | 59 | // nRESET Output Enable Pin Not available 60 | #define PIN_nRESET_OE_PORT 61 | #define PIN_nRESET_OE_BIT 62 | 63 | 64 | // Debug Unit LEDs 65 | 66 | // Connected LED PA10 - High, RED 67 | #define LED_CONNECTED_PORT GPIOA 68 | #define LED_CONNECTED_BIT GPIO_PIN_10 69 | 70 | // Target Running LED PA10 - Low, GREEN 71 | #define LED_RUNNING_PORT GPIOA 72 | #define LED_RUNNING_BIT GPIO_PIN_10 73 | 74 | 75 | void BSP_GPIO_Init(void); 76 | 77 | typedef enum 78 | { 79 | LED_STANDBY, //GRN:RED = 15:1, Standby mode, 1=125ms 80 | LED_DEBUG_PAUSE, //GRN:RED = RED, Target board Pause mode, RED only. 81 | LED_DEBUG_RUN, //GRN:RED = 4:4, Target board running mode, slow blink. 82 | LED_VCP_RUN, //GRN:RED = 1:1, VCP data transfering, fast blink, active at Standby mode only. 83 | 84 | } LED_Mode_t; 85 | 86 | extern LED_Mode_t LED_Mode; 87 | 88 | int Init_LED_Timer (void); 89 | 90 | void vResetTarget(uint32_t bit); 91 | 92 | 93 | #endif //#ifndef STLINK_V3MINI_BSP_H 94 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/USER/main.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file main.c 4 | * @author ARM CMSIS-DAP scource code, modified by RadioOperator 5 | * 6 | * @brief CMSIS-DAP v1 for STLINK-V3MINI 7 | * 8 | * @version V2.0 9 | * @date 2019-12-22 10 | ****************************************************************************** 11 | */ 12 | 13 | /* Includes ------------------------------------------------------------------*/ 14 | 15 | #ifdef _RTE_ 16 | #include "RTE_Components.h" // Component selection 17 | #endif 18 | #ifdef RTE_CMSIS_RTOS2 // when RTE component CMSIS RTOS2 is used 19 | #include "cmsis_os2.h" // ::CMSIS:RTOS2 20 | #endif 21 | #include "stm32f7xx_hal.h" 22 | #include "osObjects.h" 23 | #include "rl_usb.h" 24 | #include "DAP_config.h" 25 | #include "DAP.h" 26 | #include "STLINK_V3MINI_BSP.h" 27 | 28 | 29 | #ifdef RTE_CMSIS_RTOS2_RTX5 30 | /** 31 | * Override default HAL_GetTick function 32 | */ 33 | uint32_t HAL_GetTick (void) { 34 | static uint32_t ticks = 0U; 35 | uint32_t i; 36 | 37 | if (osKernelGetState () == osKernelRunning) { 38 | return ((uint32_t)osKernelGetTickCount ()); 39 | } 40 | 41 | /* If Kernel is not running wait approximately 1 ms then increment 42 | and return auxiliary tick counter value */ 43 | Delayms(1); 44 | 45 | return ++ticks; 46 | } 47 | #endif 48 | 49 | /* Private function prototypes -----------------------------------------------*/ 50 | static void SystemClock_Config(void); 51 | static void Error_Handler(void); 52 | static void MPU_Config(void); 53 | static void CPU_CACHE_Enable(void); 54 | 55 | 56 | /* Private functions ---------------------------------------------------------*/ 57 | // Application Main program 58 | __NO_RETURN void app_main (void *argument) { 59 | (void)argument; 60 | 61 | DAP_Setup(); // DAP Setup 62 | 63 | USBD_Initialize(0U); // USB Device Initialization 64 | USBD_Connect(0U); // USB Device Connect 65 | while (!USBD_Configured(0U)); // Wait for USB Device to configure 66 | 67 | // Create DAP Thread 68 | DAP_ThreadId = osThreadNew(DAP_Thread, NULL, &DAP_ThreadAttr); 69 | 70 | // Create SWO Thread 71 | SWO_ThreadId = osThreadNew(SWO_Thread, NULL, &SWO_ThreadAttr); 72 | 73 | // create LED Timer Thread, radiooperator 74 | Init_LED_Timer(); 75 | 76 | osDelay(osWaitForever); 77 | for (;;) {}; 78 | } 79 | /** 80 | * @brief Main program 81 | * @param None 82 | * @retval None 83 | */ 84 | int main(void) 85 | { 86 | /* This project template calls firstly two functions in order to configure MPU feature 87 | and to enable the CPU Cache, respectively MPU_Config() and CPU_CACHE_Enable(). 88 | These functions are provided as template implementation that User may integrate 89 | in his application, to enhance the performance in case of use of AXI interface 90 | with several masters. */ 91 | 92 | /* Configure the MPU attributes as Write Through */ 93 | MPU_Config(); 94 | 95 | /* Enable the CPU Cache */ 96 | CPU_CACHE_Enable(); 97 | 98 | /* STM32F7xx HAL library initialization: 99 | - Configure the Flash ART accelerator on ITCM interface 100 | - Configure the Systick to generate an interrupt each 1 msec 101 | - Set NVIC Group Priority to 4 102 | - Low Level Initialization 103 | */ 104 | HAL_Init(); 105 | 106 | /* Configure the System clock to have a frequency of 216 MHz */ 107 | SystemClock_Config(); 108 | SystemCoreClockUpdate(); 109 | 110 | /* Add your application code here 111 | */ 112 | BSP_GPIO_Init(); 113 | 114 | #ifdef RTE_CMSIS_RTOS2 115 | /* Initialize CMSIS-RTOS2 */ 116 | osKernelInitialize (); 117 | 118 | /* Create thread functions that start executing, 119 | Example: osThreadNew(app_main, NULL, NULL); */ 120 | osThreadNew(app_main, NULL, NULL); // Create application main thread 121 | if (osKernelGetState() == osKernelReady) { 122 | osKernelStart(); // Start thread execution 123 | } 124 | /* Start thread execution */ 125 | // osKernelStart(); 126 | #endif 127 | 128 | /* Infinite loop */ 129 | while (1) 130 | { 131 | } 132 | } 133 | 134 | /** 135 | * @brief System Clock Configuration 136 | * The system Clock is configured as follow : 137 | * System Clock source = PLL (HSE) 138 | * SYSCLK(Hz) = 216000000 139 | * HCLK(Hz) = 216000000 140 | * AHB Prescaler = 1 141 | * APB1 Prescaler = 4 142 | * APB2 Prescaler = 2 143 | * HSE Frequency(Hz) = 25000000 144 | * PLL_M = 25 145 | * PLL_N = 432 146 | * PLL_P = 2 147 | * PLL_Q = 9 148 | * VDD(V) = 3.3 149 | * Main regulator output voltage = Scale1 mode 150 | * Flash Latency(WS) = 7 151 | * @param None 152 | * @retval None 153 | */ 154 | static void SystemClock_Config(void) 155 | { 156 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 157 | RCC_OscInitTypeDef RCC_OscInitStruct; 158 | 159 | /* Enable HSE Oscillator and activate PLL with HSE as source */ 160 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 161 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 162 | RCC_OscInitStruct.HSIState = RCC_HSI_OFF; 163 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 164 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 165 | RCC_OscInitStruct.PLL.PLLM = 25; 166 | RCC_OscInitStruct.PLL.PLLN = 432; 167 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 168 | RCC_OscInitStruct.PLL.PLLQ = 9; 169 | if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 170 | { 171 | Error_Handler(); 172 | } 173 | 174 | /* activate the OverDrive to reach the 216 Mhz Frequency */ 175 | if(HAL_PWREx_EnableOverDrive() != HAL_OK) 176 | { 177 | Error_Handler(); 178 | } 179 | 180 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 181 | clocks dividers */ 182 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); 183 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 184 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 185 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 186 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 187 | if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) 188 | { 189 | Error_Handler(); 190 | } 191 | } 192 | 193 | /** 194 | * @brief This function is executed in case of error occurrence. 195 | * @param None 196 | * @retval None 197 | */ 198 | static void Error_Handler(void) 199 | { 200 | /* User may add here some code to deal with this error */ 201 | while(1) 202 | { 203 | } 204 | } 205 | 206 | /** 207 | * @brief Configure the MPU attributes as Write Through Internal SRAM1/SRAM2. 208 | * @note The Base Address is 0x20000000 and Region Size 512KB. 209 | * @param None 210 | * @retval None 211 | */ 212 | static void MPU_Config(void) 213 | { 214 | MPU_Region_InitTypeDef MPU_InitStruct; 215 | 216 | /* Disable the MPU */ 217 | HAL_MPU_Disable(); 218 | 219 | /* Configure the MPU attributes as WT for SRAM */ 220 | MPU_InitStruct.Enable = MPU_REGION_ENABLE; 221 | MPU_InitStruct.BaseAddress = 0x20000000; 222 | MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; 223 | MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; 224 | MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; 225 | MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; 226 | MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; 227 | MPU_InitStruct.Number = MPU_REGION_NUMBER0; 228 | MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; 229 | MPU_InitStruct.SubRegionDisable = 0x00; 230 | MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; 231 | 232 | HAL_MPU_ConfigRegion(&MPU_InitStruct); 233 | 234 | /* Enable the MPU */ 235 | HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); 236 | } 237 | 238 | /** 239 | * @brief CPU L1-Cache enable. 240 | * @param None 241 | * @retval None 242 | */ 243 | static void CPU_CACHE_Enable(void) 244 | { 245 | /* Enable I-Cache */ 246 | SCB_EnableICache(); 247 | 248 | /* Enable D-Cache */ 249 | SCB_EnableDCache(); 250 | } 251 | 252 | #ifdef USE_FULL_ASSERT 253 | 254 | /** 255 | * @brief Reports the name of the source file and the source line number 256 | * where the assert_param error has occurred. 257 | * @param file: pointer to the source file name 258 | * @param line: assert_param error line source number 259 | * @retval None 260 | */ 261 | void assert_failed(uint8_t* file, uint32_t line) 262 | { 263 | /* User can add his own implementation to report the file name and line number, 264 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 265 | 266 | /* Infinite loop */ 267 | while (1) 268 | { 269 | } 270 | } 271 | #endif 272 | -------------------------------------------------------------------------------- /STLINKv3DAPv2_WinUSB/USER/osObjects.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | * 18 | * ---------------------------------------------------------------------- 19 | * 20 | * $Date: 1. December 2017 21 | * $Revision: V2.0.0 22 | * 23 | * Project: CMSIS-DAP Examples LPC-Link-II 24 | * Title: osObjects.h CMSIS-DAP RTOS2 Objects for LPC-Link-II 25 | * 26 | *---------------------------------------------------------------------------*/ 27 | 28 | #ifndef __osObjects_h__ 29 | #define __osObjects_h__ 30 | 31 | #include "cmsis_os2.h" 32 | 33 | #ifdef osObjectsExternal 34 | extern osThreadId_t DAP_ThreadId; 35 | extern osThreadId_t SWO_ThreadId; 36 | #else 37 | const osThreadAttr_t DAP_ThreadAttr = { 38 | .priority = osPriorityNormal 39 | }; 40 | const osThreadAttr_t SWO_ThreadAttr = { 41 | .priority = osPriorityAboveNormal 42 | }; 43 | extern osThreadId_t DAP_ThreadId; 44 | osThreadId_t DAP_ThreadId; 45 | extern osThreadId_t SWO_ThreadId; 46 | osThreadId_t SWO_ThreadId; 47 | #endif 48 | 49 | extern void DAP_Thread (void *argument); 50 | extern void SWO_Thread (void *argument); 51 | 52 | extern void app_main (void *argument); 53 | 54 | #endif /* __osObjects_h__ */ 55 | -------------------------------------------------------------------------------- /STM32F723IEK6/ES0360 - STM32F72xxx and STM32F73xxx device limitations_en.DM00305994.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STM32F723IEK6/ES0360 - STM32F72xxx and STM32F73xxx device limitations_en.DM00305994.pdf -------------------------------------------------------------------------------- /STM32F723IEK6/PM0253 - STM32F7 Series and STM32H7 Series Cortex-M7 processor programming manual_en.DM00237416.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STM32F723IEK6/PM0253 - STM32F7 Series and STM32H7 Series Cortex-M7 processor programming manual_en.DM00237416.pdf -------------------------------------------------------------------------------- /STM32F723IEK6/RM0431 - STM32F72xxx and STM32F73xxx_en.DM00305990.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STM32F723IEK6/RM0431 - STM32F72xxx and STM32F73xxx_en.DM00305990.pdf -------------------------------------------------------------------------------- /STM32F723IEK6/STM32F723 - DataSheet.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/RadioOperator/CMSIS-DAP_for_STLINK-V3MINI/46ac9393620cf2f91ba0bae52e79184f2ee148ac/STM32F723IEK6/STM32F723 - DataSheet.pdf --------------------------------------------------------------------------------